gcc/

	* config/m68k/m68k-cores.def (68000, 68010): Remove FL_PCREL_16
	from these isa_00 entries.
	(68020, 68030): Remove FL_BITFIELD from these isa_20 entries.
	(68040): Remove FL_BITFIELD and FL_68881 from this isa_40 entry.
	(68060): Likewise this isa_60 entry.
	(5202, 5204, 5206, 5206e, 5249, 5250, 5272, 5307): Remove FL_PCREL16
	from these isa_a entries.
	(5207, 5208, 5211, 5212, 5213, 5214, 5216, 523x, 5270, 5271, 5274)
	(5275, 528x, 532x): Likewise these isa_aplus entries.
	* config/m68k/m68k.c (FL_FOR_isa_00): Include FL_PCREL_16.
	(FL_FOR_isa_20): Include FL_BITFIELD.
	(FL_FOR_isa_40): Include FL_FOR_isa_20 instead of FL_ISA_68020.
	Include FL_68881.
	(FL_FOR_isa_60): Include FL_FOR_isa_40 instead of FL_ISA_68020
	and FL_ISA_68040.
	(FL_FOR_isa_a): Include FL_PCREL_16.
	(FL_FOR_isa_aplus): Include FL_FOR_isa_a instead of FL_COLDFIRE
	and FL_ISA_A.
	(FL_FOR_isa_b): Likewise.
	(FL_FOR_isa_c): Include FL_FOR_isa_b instead of FL_COLDFIRE,
	FL_ISA_A, FL_ISA_B and FL_CF_HWDIV.
	(m68k_isa): Add isa_cpu32.
	(all_architectures): Use FL_FOR_isa_* macros.  In so doing,
	fix the isab entry so that it includes FL_ISA_A and FL_PCREL_16.
	Likewise include these flags and FL_ISA_B in the isac entry.
	(all_tunings): Use FL_FOR_isa_* macros, and in so doing, add
	the FL_ISA_A and FL_PCREL_16 flags to the cfv4 and cf4ve entries.


git-svn-id: https://gcc.gnu.org/svn/gcc/branches/csl/coldfire-4_1@113302 138bc75d-0d04-0410-961f-82ee72b054a4

3 files changed, 95 insertions, 78 deletions

diff --git a/ChangeLog.csl b/ChangeLog.csl
index 59e9318ad99..20b4b9f276c 100644
--- a/ChangeLog.csl
+++ b/ChangeLog.csl
@@ -1,3 +1,33 @@
+2006-04-27  Richard Sandiford  <richard@codesourcery.com>
+
+	* config/m68k/m68k-cores.def (68000, 68010): Remove FL_PCREL_16
+	from these isa_00 entries.
+	(68020, 68030): Remove FL_BITFIELD from these isa_20 entries.
+	(68040): Remove FL_BITFIELD and FL_68881 from this isa_40 entry.
+	(68060): Likewise this isa_60 entry.
+	(5202, 5204, 5206, 5206e, 5249, 5250, 5272, 5307): Remove FL_PCREL16
+	from these isa_a entries.
+	(5207, 5208, 5211, 5212, 5213, 5214, 5216, 523x, 5270, 5271, 5274)
+	(5275, 528x, 532x): Likewise these isa_aplus entries.
+	* config/m68k/m68k.c (FL_FOR_isa_00): Include FL_PCREL_16.
+	(FL_FOR_isa_20): Include FL_BITFIELD.
+	(FL_FOR_isa_40): Include FL_FOR_isa_20 instead of FL_ISA_68020.
+	Include FL_68881.
+	(FL_FOR_isa_60): Include FL_FOR_isa_40 instead of FL_ISA_68020
+	and FL_ISA_68040.
+	(FL_FOR_isa_a): Include FL_PCREL_16.
+	(FL_FOR_isa_aplus): Include FL_FOR_isa_a instead of FL_COLDFIRE
+	and FL_ISA_A.
+	(FL_FOR_isa_b): Likewise.
+	(FL_FOR_isa_c): Include FL_FOR_isa_b instead of FL_COLDFIRE,
+	FL_ISA_A, FL_ISA_B and FL_CF_HWDIV.
+	(m68k_isa): Add isa_cpu32.
+	(all_architectures): Use FL_FOR_isa_* macros.  In so doing,
+	fix the isab entry so that it includes FL_ISA_A and FL_PCREL_16.
+	Likewise include these flags and FL_ISA_B in the isac entry.
+	(all_tunings): Use FL_FOR_isa_* macros, and in so doing, add
+	the FL_ISA_A and FL_PCREL_16 flags to the cfv4 and cf4ve entries.
+
 2006-04-13  Richard Sandiford  <richard@codesourcery.com>
 
 	gcc/testsuite/
diff --git a/gcc/config/m68k/m68k-cores.def b/gcc/config/m68k/m68k-cores.def
index 9334f56b229..dea859df236 100644
--- a/gcc/config/m68k/m68k-cores.def
+++ b/gcc/config/m68k/m68k-cores.def
@@ -40,43 +40,43 @@
 */
 
 /* 680x0 series processors.  */
-M68K_CORE("68000", m68000,   "68000", 68000,    isa_00,    FL_PCREL_16)
-M68K_CORE("68010", m68010,   "68000", 68000,    isa_00,    FL_PCREL_16)
-M68K_CORE("68020", m68020,   "68020", 68020,    isa_20,    FL_BITFIELD)
-M68K_CORE("68030", m68030,   "68020", 68020,    isa_20,    FL_BITFIELD)
-M68K_CORE("68040", m68040,   "68040", 68040,    isa_40,    FL_BITFIELD | FL_68881)
-M68K_CORE("68060", m68060,   "68060", 68060,    isa_60,    FL_BITFIELD | FL_68881)
+M68K_CORE("68000", m68000,   "68000", 68000,    isa_00,    0)
+M68K_CORE("68010", m68010,   "68000", 68000,    isa_00,    0)
+M68K_CORE("68020", m68020,   "68020", 68020,    isa_20,    0)
+M68K_CORE("68030", m68030,   "68020", 68020,    isa_20,    0)
+M68K_CORE("68040", m68040,   "68040", 68040,    isa_40,    0)
+M68K_CORE("68060", m68060,   "68060", 68060,    isa_60,    0)
 M68K_CORE("68302", m68302,   "68000", 68000,    isa_00,    0)
-M68K_CORE("68332", m68332,   "cpu32", cpu32,    isa_20,    0)
-M68K_CORE("cpu32", cpu32,    "cpu32", cpu32,    isa_20,    0)
+M68K_CORE("68332", m68332,   "cpu32", cpu32,    isa_cpu32, 0)
+M68K_CORE("cpu32", cpu32,    "cpu32", cpu32,    isa_cpu32, 0)
 
 /* Coldfire CFV2 processors.  */
 /* FIXME: This information was extracted from several different processor
    manuals, and may be inaccurate.  */
-M68K_CORE("5202",  mcf5202,  "5206",  cfv2,     isa_a,     FL_PCREL_16)
-M68K_CORE("5204",  mcf5204,  "5206",  cfv2,     isa_a,     FL_PCREL_16)
-M68K_CORE("5206",  mcf5206,  "5206",  cfv2,     isa_a,     FL_PCREL_16)
-M68K_CORE("5206e", mcf5206e, "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_MAC | FL_PCREL_16)
-M68K_CORE("5207",  mcf5207,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5208",  mcf5208,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5211",  mcf5211,  "5211",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC | FL_PCREL_16)
-M68K_CORE("5212",  mcf5212,  "5211",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC | FL_PCREL_16)
-M68K_CORE("5213",  mcf5213,  "5211",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC | FL_PCREL_16)
-M68K_CORE("5214",  mcf5214,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5216",  mcf5216,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("523x",  mcf523x,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5249",  mcf5249,  "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5250",  mcf5250,  "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5270",  mcf5270,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5271",  mcf5271,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_PCREL_16)
-M68K_CORE("5272",  mcf5272,  "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_MAC | FL_PCREL_16)
-M68K_CORE("5274",  mcf5274,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("5275",  mcf5275,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
-M68K_CORE("528x",  mcf528x,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
+M68K_CORE("5202",  mcf5202,  "5206",  cfv2,     isa_a,     0)
+M68K_CORE("5204",  mcf5204,  "5206",  cfv2,     isa_a,     0)
+M68K_CORE("5206",  mcf5206,  "5206",  cfv2,     isa_a,     0)
+M68K_CORE("5206e", mcf5206e, "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_MAC)
+M68K_CORE("5207",  mcf5207,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5208",  mcf5208,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5211",  mcf5211,  "5211",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
+M68K_CORE("5212",  mcf5212,  "5211",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
+M68K_CORE("5213",  mcf5213,  "5211",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_MAC)
+M68K_CORE("5214",  mcf5214,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5216",  mcf5216,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("523x",  mcf523x,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5249",  mcf5249,  "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5250",  mcf5250,  "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5270",  mcf5270,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5271",  mcf5271,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV)
+M68K_CORE("5272",  mcf5272,  "5206e", cfv2,     isa_a,     FL_CF_HWDIV | FL_CF_MAC)
+M68K_CORE("5274",  mcf5274,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("5275",  mcf5275,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
+M68K_CORE("528x",  mcf528x,  "5207",  cfv2,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 
 /* CFV3 processors.  */
-M68K_CORE("5307",  mcf5307,  "5307",  cfv3,     isa_a,     FL_CF_HWDIV | FL_CF_MAC | FL_PCREL_16)
-M68K_CORE("532x",  mcf532x,  "532x",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC | FL_PCREL_16)
+M68K_CORE("5307",  mcf5307,  "5307",  cfv3,     isa_a,     FL_CF_HWDIV | FL_CF_MAC)
+M68K_CORE("532x",  mcf532x,  "532x",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 M68K_CORE("537x",  mcf537x,  "532x",  cfv3,     isa_aplus, FL_CF_HWDIV | FL_CF_EMAC)
 
 /* CFV4/CFV4e processors.  */
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index e9f2a72b5c7..5493bcade98 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -262,18 +262,18 @@ int m68k_cf_hwdiv = 0;
 #define FL_ISA_C     (1 << 17)
 
 /* Base flags for 68k ISAs.  */
-#define FL_FOR_isa_00    FL_ISA_68000
-#define FL_FOR_isa_20    FL_ISA_68020
-#define FL_FOR_isa_40    FL_ISA_68040 | FL_ISA_68020
-#define FL_FOR_isa_60    FL_ISA_68060 | FL_ISA_68040 | FL_ISA_68020
+#define FL_FOR_isa_00    (FL_ISA_68000 | FL_PCREL_16)
+#define FL_FOR_isa_20    (FL_ISA_68020 | FL_BITFIELD)
+#define FL_FOR_isa_40    (FL_FOR_isa_20 | FL_ISA_68040 | FL_68881)
+#define FL_FOR_isa_60    (FL_FOR_isa_40 | FL_ISA_68060)
+#define FL_FOR_isa_cpu32 (FL_ISA_68020)
 
 /* Base flags for ColdFire ISAs.  */
-#define FL_FOR_isa_a     (FL_COLDFIRE | FL_ISA_A)
-#define FL_FOR_isa_aplus (FL_COLDFIRE | FL_ISA_A | FL_ISA_APLUS | FL_CF_USP)
+#define FL_FOR_isa_a     (FL_COLDFIRE | FL_ISA_A | FL_PCREL_16)
+#define FL_FOR_isa_aplus (FL_FOR_isa_a | FL_ISA_APLUS | FL_CF_USP)
 /* Note ISA_B doesn't necessarily include USP (user stack pointer) support.  */
-#define FL_FOR_isa_b     (FL_COLDFIRE | FL_ISA_A | FL_ISA_B | FL_CF_HWDIV)
-#define FL_FOR_isa_c     (FL_COLDFIRE | FL_ISA_A | FL_ISA_B | FL_ISA_C \
-                          | FL_CF_USP | FL_CF_HWDIV)
+#define FL_FOR_isa_b     (FL_FOR_isa_a | FL_ISA_B | FL_CF_HWDIV)
+#define FL_FOR_isa_c     (FL_FOR_isa_b | FL_ISA_C | FL_CF_USP)
 
 enum m68k_isa
 {
@@ -282,6 +282,7 @@ enum m68k_isa
   isa_20,
   isa_40,
   isa_60,
+  isa_cpu32,
   /* ColdFire instruction set variants.  */
   isa_a,
   isa_aplus,
@@ -315,50 +316,36 @@ static const struct processors all_cores[] =
 
 static const struct processors all_architectures[] =
 {
-  { "68000",    m68000,   u68000,   isa_00,    FL_ISA_68000 | FL_PCREL_16 },
-  { "68010",    m68010,   u68000,   isa_00,    FL_ISA_68000 | FL_PCREL_16 },
-  { "68020",    m68020,   u68020,   isa_20,    FL_ISA_68020 | FL_BITFIELD },
-  { "68030",    m68030,   u68020,   isa_20,    FL_ISA_68020 | FL_BITFIELD },
-  { "68040",    m68040,   u68040,   isa_40,    FL_ISA_68040 | FL_ISA_68020
-    					       | FL_BITFIELD | FL_68881 },
-  { "68060",    m68060,   u68060,   isa_60,    FL_ISA_68060 | FL_ISA_68040
-    					       | FL_ISA_68020 | FL_BITFIELD
-                                               | FL_68881 },
-  { "cpu32",    cpu32,    ucpu32,   isa_20,    FL_ISA_68020 },
-  { "isaa",     mcf5206e, ucfv2,    isa_a,     FL_COLDFIRE | FL_ISA_A
-    					       | FL_CF_HWDIV | FL_PCREL_16},
-  { "isaaplus", mcf5271,  ucfv2,    isa_aplus, FL_COLDFIRE | FL_ISA_A
-  					       | FL_ISA_APLUS | FL_CF_HWDIV
-    					       | FL_PCREL_16},
-  { "isab",     mcf5407,  ucfv4,    isa_b,     FL_COLDFIRE | FL_ISA_B
-                                               | FL_CF_HWDIV},
-  { "isac",     unk_proc, ucfv4,    isa_c,     FL_COLDFIRE | FL_ISA_C
-                                               | FL_CF_HWDIV | FL_CF_USP
-   					       | FL_CF_FPU | FL_CF_EMAC },
+  { "68000",    m68000,   u68000,   isa_00,    FL_FOR_isa_00 },
+  { "68010",    m68010,   u68000,   isa_00,    FL_FOR_isa_00 },
+  { "68020",    m68020,   u68020,   isa_20,    FL_FOR_isa_20 },
+  { "68030",    m68030,   u68020,   isa_20,    FL_FOR_isa_20 },
+  { "68040",    m68040,   u68040,   isa_40,    FL_FOR_isa_40 },
+  { "68060",    m68060,   u68060,   isa_60,    FL_FOR_isa_60 },
+  { "cpu32",    cpu32,    ucpu32,   isa_20,    FL_FOR_isa_cpu32 },
+  { "isaa",     mcf5206e, ucfv2,    isa_a,     FL_FOR_isa_a | FL_CF_HWDIV },
+  { "isaaplus", mcf5271,  ucfv2,    isa_aplus, FL_FOR_isa_aplus
+					       | FL_CF_HWDIV },
+  { "isab",     mcf5407,  ucfv4,    isa_b,     FL_FOR_isa_b },
+  { "isac",     unk_proc, ucfv4,    isa_c,     FL_FOR_isa_c | FL_CF_FPU
+					       | FL_CF_EMAC },
   { NULL,       unk_proc, unk_arch, isa_max,   0 }
 };
 
 static const struct processors all_tunings[] =
 {
-  { "68000",    m68000,   u68000,   isa_00,  FL_ISA_68000 | FL_PCREL_16 },
-  { "68010",    m68010,   u68000,   isa_00,  FL_ISA_68000 | FL_PCREL_16 },
-  { "68020",    m68020,   u68020,   isa_20,  FL_ISA_68020 | FL_BITFIELD },
-  { "68030",    m68030,   u68020,   isa_20,  FL_ISA_68020 | FL_BITFIELD },
-  { "68040",    m68040,   u68040,   isa_40,  FL_ISA_68040 | FL_ISA_68020
-                                             | FL_BITFIELD | FL_68881 },
-  { "68060",    m68060,   u68060,   isa_60,  FL_ISA_68060 | FL_ISA_68040
-   					     | FL_ISA_68020 | FL_BITFIELD
-                                             | FL_68881 },
-  { "cpu32",    cpu32,    ucpu32,   isa_20,  FL_ISA_68020 },
-  { "cfv2",     mcf5206,  ucfv2,    isa_a,   FL_COLDFIRE | FL_ISA_A
-					     | FL_PCREL_16},
-  { "cfv3",     mcf5307,  ucfv3,    isa_a,   FL_COLDFIRE | FL_ISA_A
-                                             | FL_CF_HWDIV | FL_PCREL_16},
-  { "cfv4",     mcf5407,  ucfv4,    isa_b,   FL_COLDFIRE | FL_ISA_B
-    					     | FL_CF_HWDIV },
-  { "cfv4e",    mcf547x,  ucfv4e,   isa_b,   FL_COLDFIRE | FL_ISA_B
-    					     | FL_CF_HWDIV | FL_CF_EMAC
-					     | FL_CF_FPU | FL_CF_USP },
+  { "68000",    m68000,   u68000,   isa_00,  FL_FOR_isa_00 },
+  { "68010",    m68010,   u68000,   isa_00,  FL_FOR_isa_00 },
+  { "68020",    m68020,   u68020,   isa_20,  FL_FOR_isa_20 },
+  { "68030",    m68030,   u68020,   isa_20,  FL_FOR_isa_20 },
+  { "68040",    m68040,   u68040,   isa_40,  FL_FOR_isa_40 },
+  { "68060",    m68060,   u68060,   isa_60,  FL_FOR_isa_60 },
+  { "cpu32",    cpu32,    ucpu32,   isa_20,  FL_FOR_isa_cpu32 },
+  { "cfv2",     mcf5206,  ucfv2,    isa_a,   FL_FOR_isa_a },
+  { "cfv3",     mcf5307,  ucfv3,    isa_a,   FL_FOR_isa_a | FL_CF_HWDIV },
+  { "cfv4",     mcf5407,  ucfv4,    isa_b,   FL_FOR_isa_b },
+  { "cfv4e",    mcf547x,  ucfv4e,   isa_b,   FL_FOR_isa_b | FL_CF_USP
+					     | FL_CF_EMAC | FL_CF_FPU },
   { NULL,       unk_proc, unk_arch, isa_max, 0 }
 };