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authorJoseph Myers <joseph@codesourcery.com>2006-11-24 16:30:03 +0000
committerJoseph Myers <joseph@codesourcery.com>2006-11-24 16:30:03 +0000
commitada0fdf7f646c89a1d905d41b38e1dc300437082 (patch)
tree4112f3a1e88b23dcb8673a9494790d10f362bf09
parent82532da3de26e5bff92ae01393258ec2187264a8 (diff)
gcc/
* config/rs6000/eabispe.h (TARGET_DEFAULT): Include MASK_STRICT_ALIGN. * config/rs6000/linuxspe.h (TARGET_DEFAULT): Likewise. * config/rs6000/rs6000.c (rs6000_override_options): Use MASK_STRICT_ALIGN for 8540 and 8548. Add MASK_STRICT_ALIGN to POWERPC_MASKS. git-svn-id: https://gcc.gnu.org/svn/gcc/branches/csl/sourcerygxx-4_1@119159 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--ChangeLog.csl10
-rw-r--r--gcc/config/rs6000/eabispe.h3
-rw-r--r--gcc/config/rs6000/linuxspe.h2
-rw-r--r--gcc/config/rs6000/rs6000.c8
4 files changed, 18 insertions, 5 deletions
diff --git a/ChangeLog.csl b/ChangeLog.csl
index 1129cf6227b..b6cc94e75cc 100644
--- a/ChangeLog.csl
+++ b/ChangeLog.csl
@@ -1,5 +1,15 @@
2006-11-24 Joseph Myers <joseph@codesourcery.com>
+ gcc/
+ * config/rs6000/eabispe.h (TARGET_DEFAULT): Include
+ MASK_STRICT_ALIGN.
+ * config/rs6000/linuxspe.h (TARGET_DEFAULT): Likewise.
+ * config/rs6000/rs6000.c (rs6000_override_options): Use
+ MASK_STRICT_ALIGN for 8540 and 8548. Add MASK_STRICT_ALIGN to
+ POWERPC_MASKS.
+
+2006-11-24 Joseph Myers <joseph@codesourcery.com>
+
gcc/testsuite/
* g++.dg/eh/simd-2.C: Use -O -w in general for PowerPC.
diff --git a/gcc/config/rs6000/eabispe.h b/gcc/config/rs6000/eabispe.h
index 5d94028ffc1..2a0b92368c0 100644
--- a/gcc/config/rs6000/eabispe.h
+++ b/gcc/config/rs6000/eabispe.h
@@ -21,7 +21,8 @@
MA 02110-1301, USA. */
#undef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI)
+#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI \
+ | MASK_STRICT_ALIGN)
#undef TARGET_VERSION
#define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded SPE)");
diff --git a/gcc/config/rs6000/linuxspe.h b/gcc/config/rs6000/linuxspe.h
index ca6bb2bf8ad..fd7d20ebd68 100644
--- a/gcc/config/rs6000/linuxspe.h
+++ b/gcc/config/rs6000/linuxspe.h
@@ -25,7 +25,7 @@
/* Override rs6000.h and sysv4.h definition. */
#undef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
+#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN)
#undef TARGET_SPE_ABI
#undef TARGET_SPE
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f47ad4a63f3..03158c97bdc 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1135,9 +1135,11 @@ rs6000_override_options (const char *default_cpu)
{"801", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"821", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"823", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
- {"8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
+ {"8540", PROCESSOR_PPC8540,
+ POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_STRICT_ALIGN},
/* 8548 has a dummy entry for now. */
- {"8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_PPC_GFXOPT},
+ {"8548", PROCESSOR_PPC8540,
+ POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_STRICT_ALIGN},
{"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
{"970", PROCESSOR_POWER4,
POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
@@ -1186,7 +1188,7 @@ rs6000_override_options (const char *default_cpu)
enum {
POWER_MASKS = MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
- POWERPC_MASKS = (POWERPC_BASE_MASK | MASK_PPC_GPOPT
+ POWERPC_MASKS = (POWERPC_BASE_MASK | MASK_PPC_GPOPT | MASK_STRICT_ALIGN
| MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_ALTIVEC
| MASK_MFCRF | MASK_POPCNTB | MASK_FPRND)
};