diff options
| author | Ian Lance Taylor <iant@google.com> | 2009-05-14 22:42:22 +0000 |
|---|---|---|
| committer | Ian Lance Taylor <iant@google.com> | 2009-05-14 22:42:22 +0000 |
| commit | 51d35e7fe2da18a2e8192e0da7907621fb6e66b6 (patch) | |
| tree | c2ee29b01f59c4c2ff434f276375c2b20fa4a9e0 | |
| parent | e7f5acc8f82767ec09017383364c35072d3b84eb (diff) | |
Merge revision 147544 from trunk.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/gcc-in-cxx@147546 138bc75d-0d04-0410-961f-82ee72b054a4
324 files changed, 10559 insertions, 16193 deletions
diff --git a/ChangeLog b/ChangeLog index 39ad00f9602..9a4630eed79 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,44 @@ +2009-05-12 Alexandre Oliva <aoliva@redhat.com> + + PR target/37137 + * Makefile.def (flags_to_pass): Remove redundant and incomplete + STAGE1_CFLAGS, STAGE2_CFLAGS, STAGE3_CFLAGS, and STAGE4_CFLAGS. + Add FLAGS_FOR_TARGET and BUILD_CONFIG. + (bootstrap_stage): Remove bootstrap-debug custom stages. Turn + stage_configureflags, stage_cflags and stage_libcflags into + explicit Makefile macros. + * Makefile.tpl (HOST_EXPORTS, EXTRA_HOST_FLAGS): Pass GCJ and + GFORTRAN. + (POSTSTAGE1_HOST_EXPORTS): Add XGCC_FLAGS_FOR_TARGET and TFLAGS to + CC. Set CC_FOR_BUILD from CC. + (BASE_TARGET_EXPORTS, RAW_CXX_TARGET_EXPORTS, + NORMAL_TARGET_EXPORTS): Move SYSROOT_CFLAGS_FOR_TARGET and + DEBUG_PREFIX_CFLAGS_FOR_TARGET from CFLAGS and CXXFLAGS to + XGCC_FLAGS_FOR_TARGET. Add it along with TFLAGS to CC, CXX, GCJ, + and GFORTRAN. + (TFLAGS, STAGE_CFLAGS, STAGE_TFLAGS, STAGE_CONFIGURE_FLAGS): New. + (_LIBCFLAGS): Renamed to _TFLAGS. + (do-compare-debug, do-compare3-debug): Drop. + (CC, GCC_FOR_TARGET, CXX_FOR_TARGET, RAW_CXX_FOR_TARGET, + GCJ_FOR_TARGET, GFORTRAN_FOR_TARGET): Remove FLAGS_FOR_TARGET. + (FLAGS_FOR_TARGET, SYSROOT_CFLAGS_FOR_TARGET, + DEBUG_PREFIX_CFLAGS_FOR_TARGET): Move down. + (XGCC_FLAGS_FOR_TARGET): New. + (BASE_FLAGS_TO_PASS): Pass STAGEid_CFLAGS, STAGEid_TFLAGS and TFLAGS. + (EXTRA_HOST_FLAGS): Pass GCJ and GFORTRAN. + (POSTSTAGE1_FLAGS_TO_PASS): Move SYSROOT_CFLAGS_FOR_TARGET and + DEBUG_PREFIX_CFLAGS_FOR_TARGET from CFLAGS, CXXFLAGS, LIBCFLAGS, + LIBCXXFLAGS to XGCC_FLAGS_FOR_TARGET. Add it along with TFLAGS + to CC, CXX, GCJ, and GFORTRAN. Pass XGCC_FLAGS_FOR_TARGET and + TFLAGS. + (BUILD_CONFIG): Include if requested. + (all): Set TFLAGS on bootstrap. + (configure-stageid-prefixmodule): Pass TFLAGS, adjust FLAGS. + (all-stageid-prefixmodule): Likewise. + (do-clean, distclean-stageid): Set TFLAGS. + (restrap): Fix whitespace. + * Makefile.in: Rebuilt. + 2009-05-07 Paolo Bonzini <bonzini@gnu.org> * config.guess: Sync with src. diff --git a/Makefile.def b/Makefile.def index 59dcd1a0d7a..758fb906049 100644 --- a/Makefile.def +++ b/Makefile.def @@ -258,12 +258,8 @@ flags_to_pass = { flag= CXXFLAGS ; }; flags_to_pass = { flag= LDFLAGS ; }; flags_to_pass = { flag= LIBCFLAGS ; }; flags_to_pass = { flag= LIBCXXFLAGS ; }; -flags_to_pass = { flag= STAGE1_CFLAGS ; }; flags_to_pass = { flag= STAGE1_CHECKING ; }; flags_to_pass = { flag= STAGE1_LANGUAGES ; }; -flags_to_pass = { flag= STAGE2_CFLAGS ; }; -flags_to_pass = { flag= STAGE3_CFLAGS ; }; -flags_to_pass = { flag= STAGE4_CFLAGS ; }; flags_to_pass = { flag= GNATBIND ; }; flags_to_pass = { flag= GNATMAKE ; }; @@ -276,6 +272,7 @@ flags_to_pass = { flag= CPPFLAGS_FOR_TARGET ; }; flags_to_pass = { flag= CXX_FOR_TARGET ; }; flags_to_pass = { flag= CXXFLAGS_FOR_TARGET ; }; flags_to_pass = { flag= DLLTOOL_FOR_TARGET ; }; +flags_to_pass = { flag= FLAGS_FOR_TARGET ; }; flags_to_pass = { flag= GCJ_FOR_TARGET ; }; flags_to_pass = { flag= GFORTRAN_FOR_TARGET ; }; flags_to_pass = { flag= LD_FOR_TARGET ; }; @@ -291,6 +288,7 @@ flags_to_pass = { flag= WINDRES_FOR_TARGET ; }; flags_to_pass = { flag= WINDMC_FOR_TARGET ; }; // Miscellaneous +flags_to_pass = { flag= BUILD_CONFIG ; }; flags_to_pass = { flag= LANGUAGES ; optional=true ; }; flags_to_pass = { flag= LEAN ; }; @@ -558,62 +556,21 @@ languages = { language=objc; gcc-check-target=check-objc; languages = { language=obj-c++; gcc-check-target=check-obj-c++; }; // Toplevel bootstrap -bootstrap_stage = { - id=1 ; - - // * We force-disable intermodule optimizations, even if - // --enable-intermodule was passed, since the installed compiler - // probably can't handle them. Luckily, autoconf always respects - // the last argument when conflicting --enable arguments are passed. - // * Likewise, we force-disable coverage flags, since the installed - // compiler probably has never heard of them. - stage_configure_flags='--disable-intermodule $(STAGE1_CHECKING) \ - --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)"' ; - stage_cflags='$(STAGE1_CFLAGS)' ; - stage_libcflags='$(STAGE1_LIBCFLAGS)' ; }; +bootstrap_stage = { id=1 ; }; bootstrap_stage = { id=2 ; prev=1 ; - bootstrap_target=bootstrap2 ; - stage_configure_flags="@stage2_werror_flag@" ; - stage_cflags="$(STAGE2_CFLAGS)" ; - stage_libcflags="$(STAGE2_LIBCFLAGS)" ; }; -bootstrap_stage = { - id=b2g0 ; prev=1 ; - bootstrap_target=bootstrap2-debug ; - stage_configure_flags="@stage2_werror_flag@" ; - stage_cflags="$(STAGE2_CFLAGS) -g0" ; - stage_libcflags="$(STAGE2_LIBCFLAGS) -g0" ; }; + bootstrap_target=bootstrap2 ; }; bootstrap_stage = { id=3 ; prev=2 ; lean=1 ; compare_target=compare ; bootstrap_target=bootstrap ; - cleanstrap_target=cleanstrap ; - stage_configure_flags="@stage2_werror_flag@" ; - stage_cflags="$(STAGE3_CFLAGS)" ; - stage_libcflags="$(STAGE3_LIBCFLAGS)" ; }; -bootstrap_stage = { - id=b3g2 ; prev=b2g0 ; lean=1 ; - compare_target=compare-debug ; - bootstrap_target=bootstrap-debug ; - cleanstrap_target=cleanstrap-debug ; - stage_configure_flags="@stage2_werror_flag@" ; - stage_cflags="$(STAGE3_CFLAGS) -g2" ; - stage_libcflags="$(STAGE3_LIBCFLAGS) -g2" ; }; + cleanstrap_target=cleanstrap ; }; bootstrap_stage = { id=4 ; prev=3 ; lean=2 ; compare_target=compare3 ; - bootstrap_target=bootstrap4 ; - stage_configure_flags="@stage2_werror_flag@" ; - stage_cflags="$(STAGE4_CFLAGS)" ; - stage_libcflags="$(STAGE4_CFLAGS)" ; }; + bootstrap_target=bootstrap4 ; }; bootstrap_stage = { - id=profile ; prev=1 ; - stage_configure_flags="@stage2_werror_flag@" ; - stage_cflags='$(STAGE2_CFLAGS) -fprofile-generate' ; - stage_libcflags='$(STAGE2_LIBCFLAGS)' ; }; + id=profile ; prev=1 ; }; bootstrap_stage = { id=feedback ; prev=profile ; - bootstrap_target=profiledbootstrap ; - stage_configure_flags="@stage2_werror_flag@" ; - stage_cflags='$(STAGE3_CFLAGS) -fprofile-use' ; - stage_libcflags='$(STAGE3_LIBCFLAGS) -fprofile-use' ; }; + bootstrap_target=profiledbootstrap ; }; diff --git a/Makefile.in b/Makefile.in index 7fd42972e71..9a9f67bb21f 100644 --- a/Makefile.in +++ b/Makefile.in @@ -3,7 +3,7 @@ # # Makefile for directory with subdirs to build. # Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, -# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009 +# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 # Free Software Foundation # # This file is free software; you can redistribute it and/or modify @@ -175,6 +175,8 @@ HOST_EXPORTS = \ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ CXX="$(CXX)"; export CXX; \ CXXFLAGS="$(CXXFLAGS)"; export CXXFLAGS; \ + GCJ="$(GCJ)"; export GCJ; \ + GFORTRAN="$(GFORTRAN)"; export GFORTRAN; \ AR="$(AR)"; export AR; \ AS="$(AS)"; export AS; \ CC_FOR_BUILD="$(CC_FOR_BUILD)"; export CC_FOR_BUILD; \ @@ -210,11 +212,9 @@ HOST_EXPORTS = \ POSTSTAGE1_HOST_EXPORTS = \ $(HOST_EXPORTS) \ CC="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/xgcc$(exeext) \ - -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/"; export CC; \ - CC_FOR_BUILD="$(STAGE_CC_WRAPPER) \ - $$r/$(HOST_SUBDIR)/prev-gcc/xgcc$(exeext) \ - -B$$r/$(HOST_SUBDIR)/prev-gcc/ \ - -B$(build_tooldir)/bin/"; export CC_FOR_BUILD; \ + -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ \ + $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CC; \ + CC_FOR_BUILD="$$CC"; export CC_FOR_BUILD; \ CXX="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/g++$(exeext) \ -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ \ -nostdinc++ \ @@ -248,13 +248,13 @@ BASE_TARGET_EXPORTS = \ $(BASE_EXPORTS) \ AR="$(AR_FOR_TARGET)"; export AR; \ AS="$(COMPILER_AS_FOR_TARGET)"; export AS; \ - CC="$(CC_FOR_TARGET)"; export CC; \ - CFLAGS="$(CFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CC="$(CC_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CC; \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ CPPFLAGS="$(CPPFLAGS_FOR_TARGET)"; export CPPFLAGS; \ - CXXFLAGS="$(CXXFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ - GCJ="$(GCJ_FOR_TARGET)"; export GCJ; \ - GFORTRAN="$(GFORTRAN_FOR_TARGET)"; export GFORTRAN; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + GCJ="$(GCJ_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GCJ; \ + GFORTRAN="$(GFORTRAN_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GFORTRAN; \ DLLTOOL="$(DLLTOOL_FOR_TARGET)"; export DLLTOOL; \ LD="$(COMPILER_LD_FOR_TARGET)"; export LD; \ LDFLAGS="$(LDFLAGS_FOR_TARGET)"; export LDFLAGS; \ @@ -270,11 +270,11 @@ BASE_TARGET_EXPORTS = \ RAW_CXX_TARGET_EXPORTS = \ $(BASE_TARGET_EXPORTS) \ CXX_FOR_TARGET="$(RAW_CXX_FOR_TARGET)"; export CXX_FOR_TARGET; \ - CXX="$(RAW_CXX_FOR_TARGET)"; export CXX; + CXX="$(RAW_CXX_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CXX; NORMAL_TARGET_EXPORTS = \ $(BASE_TARGET_EXPORTS) \ - CXX="$(CXX_FOR_TARGET)"; export CXX; + CXX="$(CXX_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CXX; # Where to find GMP HOST_GMPLIBS = @gmplibs@ @@ -374,48 +374,90 @@ LIBCFLAGS = $(CFLAGS) CXXFLAGS = @CXXFLAGS@ LIBCXXFLAGS = $(CXXFLAGS) -fno-implicit-templates +TFLAGS = + +# Defaults for all stages; some are overridden below. + +STAGE_CFLAGS = $(BOOT_CFLAGS) +STAGE_TFLAGS = $(TFLAGS) +STAGE_CONFIGURE_FLAGS=@stage2_werror_flag@ + + +# Defaults for stage 1; some are overridden below. +STAGE1_CFLAGS = $(STAGE_CFLAGS) +STAGE1_TFLAGS = $(STAGE_TFLAGS) +STAGE1_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) + +# Defaults for stage 2; some are overridden below. +STAGE2_CFLAGS = $(STAGE_CFLAGS) +STAGE2_TFLAGS = $(STAGE_TFLAGS) +STAGE2_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) + +# Defaults for stage 3; some are overridden below. +STAGE3_CFLAGS = $(STAGE_CFLAGS) +STAGE3_TFLAGS = $(STAGE_TFLAGS) +STAGE3_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) + +# Defaults for stage 4; some are overridden below. +STAGE4_CFLAGS = $(STAGE_CFLAGS) +STAGE4_TFLAGS = $(STAGE_TFLAGS) +STAGE4_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) + +# Defaults for stage profile; some are overridden below. +STAGEprofile_CFLAGS = $(STAGE_CFLAGS) +STAGEprofile_TFLAGS = $(STAGE_TFLAGS) +STAGEprofile_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) + +# Defaults for stage feedback; some are overridden below. +STAGEfeedback_CFLAGS = $(STAGE_CFLAGS) +STAGEfeedback_TFLAGS = $(STAGE_TFLAGS) +STAGEfeedback_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) + + # Only build the C compiler for stage1, because that is the only one that # we can guarantee will build with the native compiler, and also it is the # only thing useful for building stage2. STAGE1_CFLAGS (via CFLAGS), # MAKEINFO and MAKEINFOFLAGS are explicitly passed here to make them # overrideable (for a bootstrap build stage1 also builds gcc.info). +STAGE1_CFLAGS = @stage1_cflags@ STAGE1_CHECKING=@stage1_checking@ STAGE1_LANGUAGES=@stage1_languages@ +# * We force-disable intermodule optimizations, even if +# --enable-intermodule was passed, since the installed compiler +# probably can't handle them. Luckily, autoconf always respects +# the last argument when conflicting --enable arguments are passed. +# * Likewise, we force-disable coverage flags, since the installed +# compiler probably has never heard of them. +STAGE1_CONFIGURE_FLAGS = --disable-intermodule $(STAGE1_CHECKING) \ + --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" -STAGE1_CFLAGS=@stage1_cflags@ -STAGE2_CFLAGS=$(BOOT_CFLAGS) -STAGE3_CFLAGS=$(BOOT_CFLAGS) -STAGE4_CFLAGS=$(BOOT_CFLAGS) +STAGEprofile_CFLAGS = $(STAGE2_CFLAGS) -fprofile-generate +STAGEprofile_TFLAGS = $(STAGE2_TFLAGS) -STAGE1_LIBCFLAGS=$(CFLAGS_FOR_TARGET) -STAGE2_LIBCFLAGS=$(CFLAGS_FOR_TARGET) -STAGE3_LIBCFLAGS=$(CFLAGS_FOR_TARGET) -STAGE4_LIBCFLAGS=$(CFLAGS_FOR_TARGET) +STAGEfeedback_CFLAGS = $(STAGE3_CFLAGS) -fprofile-use +STAGEfeedback_TFLAGS = $(STAGE3_TFLAGS) do-compare = @do_compare@ do-compare3 = $(do-compare) -do-compare-debug = $(SHELL) $(srcdir)/contrib/compare-debug $$f1 $$f2 # ----------------------------------------------- # Programs producing files for the TARGET machine # ----------------------------------------------- -FLAGS_FOR_TARGET = @FLAGS_FOR_TARGET@ - AR_FOR_TARGET=@AR_FOR_TARGET@ AS_FOR_TARGET=@AS_FOR_TARGET@ -CC_FOR_TARGET=$(STAGE_CC_WRAPPER) @CC_FOR_TARGET@ $(FLAGS_FOR_TARGET) +CC_FOR_TARGET=$(STAGE_CC_WRAPPER) @CC_FOR_TARGET@ # If GCC_FOR_TARGET is not overriden on the command line, then this # variable is passed down to the gcc Makefile, where it is used to # build libgcc2.a. We define it here so that it can itself be # overridden on the command line. -GCC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCC_FOR_TARGET@ $(FLAGS_FOR_TARGET) -CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @CXX_FOR_TARGET@ $(FLAGS_FOR_TARGET) -RAW_CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @RAW_CXX_FOR_TARGET@ $(FLAGS_FOR_TARGET) -GCJ_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCJ_FOR_TARGET@ $(FLAGS_FOR_TARGET) -GFORTRAN_FOR_TARGET=$(STAGE_CC_WRAPPER) @GFORTRAN_FOR_TARGET@ $(FLAGS_FOR_TARGET) +GCC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCC_FOR_TARGET@ +CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @CXX_FOR_TARGET@ +RAW_CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @RAW_CXX_FOR_TARGET@ +GCJ_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCJ_FOR_TARGET@ +GFORTRAN_FOR_TARGET=$(STAGE_CC_WRAPPER) @GFORTRAN_FOR_TARGET@ DLLTOOL_FOR_TARGET=@DLLTOOL_FOR_TARGET@ LD_FOR_TARGET=@LD_FOR_TARGET@ @@ -433,13 +475,17 @@ COMPILER_NM_FOR_TARGET=@COMPILER_NM_FOR_TARGET@ CFLAGS_FOR_TARGET = @CFLAGS_FOR_TARGET@ CXXFLAGS_FOR_TARGET = @CXXFLAGS_FOR_TARGET@ -SYSROOT_CFLAGS_FOR_TARGET = @SYSROOT_CFLAGS_FOR_TARGET@ -DEBUG_PREFIX_CFLAGS_FOR_TARGET = @DEBUG_PREFIX_CFLAGS_FOR_TARGET@ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET) LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates LDFLAGS_FOR_TARGET = +FLAGS_FOR_TARGET = @FLAGS_FOR_TARGET@ +SYSROOT_CFLAGS_FOR_TARGET = @SYSROOT_CFLAGS_FOR_TARGET@ +DEBUG_PREFIX_CFLAGS_FOR_TARGET = @DEBUG_PREFIX_CFLAGS_FOR_TARGET@ + +XGCC_FLAGS_FOR_TARGET = $(FLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET) + # ------------------------------------ # Miscellaneous targets and flag lists # ------------------------------------ @@ -574,12 +620,8 @@ BASE_FLAGS_TO_PASS = \ "LDFLAGS=$(LDFLAGS)" \ "LIBCFLAGS=$(LIBCFLAGS)" \ "LIBCXXFLAGS=$(LIBCXXFLAGS)" \ - "STAGE1_CFLAGS=$(STAGE1_CFLAGS)" \ "STAGE1_CHECKING=$(STAGE1_CHECKING)" \ "STAGE1_LANGUAGES=$(STAGE1_LANGUAGES)" \ - "STAGE2_CFLAGS=$(STAGE2_CFLAGS)" \ - "STAGE3_CFLAGS=$(STAGE3_CFLAGS)" \ - "STAGE4_CFLAGS=$(STAGE4_CFLAGS)" \ "GNATBIND=$(GNATBIND)" \ "GNATMAKE=$(GNATMAKE)" \ "AR_FOR_TARGET=$(AR_FOR_TARGET)" \ @@ -590,6 +632,7 @@ BASE_FLAGS_TO_PASS = \ "CXX_FOR_TARGET=$(CXX_FOR_TARGET)" \ "CXXFLAGS_FOR_TARGET=$(CXXFLAGS_FOR_TARGET)" \ "DLLTOOL_FOR_TARGET=$(DLLTOOL_FOR_TARGET)" \ + "FLAGS_FOR_TARGET=$(FLAGS_FOR_TARGET)" \ "GCJ_FOR_TARGET=$(GCJ_FOR_TARGET)" \ "GFORTRAN_FOR_TARGET=$(GFORTRAN_FOR_TARGET)" \ "LD_FOR_TARGET=$(LD_FOR_TARGET)" \ @@ -603,8 +646,22 @@ BASE_FLAGS_TO_PASS = \ "STRIP_FOR_TARGET=$(STRIP_FOR_TARGET)" \ "WINDRES_FOR_TARGET=$(WINDRES_FOR_TARGET)" \ "WINDMC_FOR_TARGET=$(WINDMC_FOR_TARGET)" \ + "BUILD_CONFIG=$(BUILD_CONFIG)" \ "`echo 'LANGUAGES=$(LANGUAGES)' | sed -e s'/[^=][^=]*=$$/XFOO=/'`" \ "LEAN=$(LEAN)" \ + "STAGE1_CFLAGS=$(STAGE1_CFLAGS)" \ + "STAGE1_TFLAGS=$(STAGE1_TFLAGS)" \ + "STAGE2_CFLAGS=$(STAGE2_CFLAGS)" \ + "STAGE2_TFLAGS=$(STAGE2_TFLAGS)" \ + "STAGE3_CFLAGS=$(STAGE3_CFLAGS)" \ + "STAGE3_TFLAGS=$(STAGE3_TFLAGS)" \ + "STAGE4_CFLAGS=$(STAGE4_CFLAGS)" \ + "STAGE4_TFLAGS=$(STAGE4_TFLAGS)" \ + "STAGEprofile_CFLAGS=$(STAGEprofile_CFLAGS)" \ + "STAGEprofile_TFLAGS=$(STAGEprofile_TFLAGS)" \ + "STAGEfeedback_CFLAGS=$(STAGEfeedback_CFLAGS)" \ + "STAGEfeedback_TFLAGS=$(STAGEfeedback_TFLAGS)" \ + "TFLAGS=$(TFLAGS)" \ "CONFIG_SHELL=$(SHELL)" \ "MAKEINFO=$(MAKEINFO) $(MAKEINFOFLAGS)" @@ -619,6 +676,8 @@ EXTRA_HOST_FLAGS = \ 'CC=$(CC)' \ 'CXX=$(CXX)' \ 'DLLTOOL=$(DLLTOOL)' \ + 'GCJ=$(GCJ)' \ + 'GFORTRAN=$(GFORTRAN)' \ 'LD=$(LD)' \ 'LIPO=$(LIPO)' \ 'NM=$(NM)' \ @@ -659,20 +718,24 @@ POSTSTAGE1_FLAGS_TO_PASS = \ EXTRA_TARGET_FLAGS = \ 'AR=$$(AR_FOR_TARGET)' \ 'AS=$(COMPILER_AS_FOR_TARGET)' \ - 'CC=$$(CC_FOR_TARGET)' \ - 'CFLAGS=$$(CFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ - 'CXX=$$(CXX_FOR_TARGET)' \ - 'CXXFLAGS=$$(CXXFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ + 'CC=$$(CC_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ + 'CFLAGS=$$(CFLAGS_FOR_TARGET)' \ + 'CXX=$$(CXX_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ + 'CXXFLAGS=$$(CXXFLAGS_FOR_TARGET)' \ 'DLLTOOL=$$(DLLTOOL_FOR_TARGET)' \ + 'GCJ=$$(GCJ_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ + 'GFORTRAN=$$(GFORTRAN_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ 'LD=$(COMPILER_LD_FOR_TARGET)' \ 'LDFLAGS=$$(LDFLAGS_FOR_TARGET)' \ - 'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ - 'LIBCXXFLAGS=$$(LIBCXXFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ + 'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET)' \ + 'LIBCXXFLAGS=$$(LIBCXXFLAGS_FOR_TARGET)' \ 'NM=$(COMPILER_NM_FOR_TARGET)' \ 'OBJDUMP=$$(OBJDUMP_FOR_TARGET)' \ 'RANLIB=$$(RANLIB_FOR_TARGET)' \ 'WINDRES=$$(WINDRES_FOR_TARGET)' \ - 'WINDMC=$$(WINDMC_FOR_TARGET)' + 'WINDMC=$$(WINDMC_FOR_TARGET)' \ + 'XGCC_FLAGS_FOR_TARGET=$(XGCC_FLAGS_FOR_TARGET)' \ + "TFLAGS=$$TFLAGS" TARGET_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) @@ -692,6 +755,13 @@ EXTRA_GCC_FLAGS = \ GCC_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS) +@if gcc +BUILD_CONFIG = +ifneq ($(BUILD_CONFIG),) +include $(foreach CONFIG, $(BUILD_CONFIG), $(srcdir)/config/$(CONFIG).mk) +endif +@endif gcc + .PHONY: configure-host configure-host: \ maybe-configure-ash \ @@ -804,11 +874,17 @@ all: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - if [ -f stage_last ]; then \ +@if gcc-bootstrap + if [ -f stage_last ]; then : ; \ + TFLAGS="$(STAGE$(shell sed s,^stage,, stage_last)_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target; \ else \ +@endif gcc-bootstrap $(MAKE) $(RECURSE_FLAGS_TO_PASS) all-host all-target; \ - fi +@if gcc-bootstrap + fi; \ +@endif gcc-bootstrap + : .PHONY: all-build @@ -4969,10 +5045,12 @@ configure-stage1-bfd: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/bfd ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ cd $(HOST_SUBDIR)/bfd || exit 1; \ @@ -4986,8 +5064,7 @@ configure-stage1-bfd: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif bfd-bootstrap .PHONY: configure-stage2-bfd maybe-configure-stage2-bfd @@ -4999,11 +5076,13 @@ configure-stage2-bfd: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/bfd ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ cd $(HOST_SUBDIR)/bfd || exit 1; \ @@ -5018,38 +5097,7 @@ configure-stage2-bfd: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif bfd-bootstrap - -.PHONY: configure-stageb2g0-bfd maybe-configure-stageb2g0-bfd -maybe-configure-stageb2g0-bfd: -@if bfd-bootstrap -maybe-configure-stageb2g0-bfd: configure-stageb2g0-bfd -configure-stageb2g0-bfd: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/bfd ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ - cd $(HOST_SUBDIR)/bfd || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/bfd/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/bfd"; \ - libsrcdir="$$s/bfd"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif bfd-bootstrap .PHONY: configure-stage3-bfd maybe-configure-stage3-bfd @@ -5061,11 +5109,13 @@ configure-stage3-bfd: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/bfd ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ cd $(HOST_SUBDIR)/bfd || exit 1; \ @@ -5080,38 +5130,7 @@ configure-stage3-bfd: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif bfd-bootstrap - -.PHONY: configure-stageb3g2-bfd maybe-configure-stageb3g2-bfd -maybe-configure-stageb3g2-bfd: -@if bfd-bootstrap -maybe-configure-stageb3g2-bfd: configure-stageb3g2-bfd -configure-stageb3g2-bfd: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/bfd ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ - cd $(HOST_SUBDIR)/bfd || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/bfd/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/bfd"; \ - libsrcdir="$$s/bfd"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif bfd-bootstrap .PHONY: configure-stage4-bfd maybe-configure-stage4-bfd @@ -5123,11 +5142,13 @@ configure-stage4-bfd: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/bfd ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ cd $(HOST_SUBDIR)/bfd || exit 1; \ @@ -5142,7 +5163,7 @@ configure-stage4-bfd: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif bfd-bootstrap .PHONY: configure-stageprofile-bfd maybe-configure-stageprofile-bfd @@ -5154,11 +5175,13 @@ configure-stageprofile-bfd: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/bfd ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ cd $(HOST_SUBDIR)/bfd || exit 1; \ @@ -5173,7 +5196,7 @@ configure-stageprofile-bfd: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif bfd-bootstrap .PHONY: configure-stagefeedback-bfd maybe-configure-stagefeedback-bfd @@ -5185,11 +5208,13 @@ configure-stagefeedback-bfd: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/bfd/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/bfd ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/bfd ; \ cd $(HOST_SUBDIR)/bfd || exit 1; \ @@ -5204,7 +5229,7 @@ configure-stagefeedback-bfd: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif bfd-bootstrap @@ -5242,13 +5267,18 @@ all-stage1-bfd: configure-stage1-bfd @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/bfd && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-bfd) maybe-clean-stage1-bfd: clean-stage1-bfd @@ -5278,14 +5308,19 @@ all-stage2-bfd: configure-stage2-bfd @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/bfd && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-bfd) maybe-clean-stage2-bfd: clean-stage2-bfd @@ -5304,44 +5339,6 @@ clean-stage2-bfd: @endif bfd-bootstrap -.PHONY: all-stageb2g0-bfd maybe-all-stageb2g0-bfd -.PHONY: clean-stageb2g0-bfd maybe-clean-stageb2g0-bfd -maybe-all-stageb2g0-bfd: -maybe-clean-stageb2g0-bfd: -@if bfd-bootstrap -maybe-all-stageb2g0-bfd: all-stageb2g0-bfd -all-stageb2g0: all-stageb2g0-bfd -TARGET-stageb2g0-bfd = $(TARGET-bfd) -all-stageb2g0-bfd: configure-stageb2g0-bfd - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/bfd && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-bfd) - -maybe-clean-stageb2g0-bfd: clean-stageb2g0-bfd -clean-stageb2g0: clean-stageb2g0-bfd -clean-stageb2g0-bfd: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/bfd/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-bfd/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/bfd && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif bfd-bootstrap - - .PHONY: all-stage3-bfd maybe-all-stage3-bfd .PHONY: clean-stage3-bfd maybe-clean-stage3-bfd maybe-all-stage3-bfd: @@ -5354,14 +5351,19 @@ all-stage3-bfd: configure-stage3-bfd @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/bfd && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-bfd) maybe-clean-stage3-bfd: clean-stage3-bfd @@ -5380,44 +5382,6 @@ clean-stage3-bfd: @endif bfd-bootstrap -.PHONY: all-stageb3g2-bfd maybe-all-stageb3g2-bfd -.PHONY: clean-stageb3g2-bfd maybe-clean-stageb3g2-bfd -maybe-all-stageb3g2-bfd: -maybe-clean-stageb3g2-bfd: -@if bfd-bootstrap -maybe-all-stageb3g2-bfd: all-stageb3g2-bfd -all-stageb3g2: all-stageb3g2-bfd -TARGET-stageb3g2-bfd = $(TARGET-bfd) -all-stageb3g2-bfd: configure-stageb3g2-bfd - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/bfd && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-bfd) - -maybe-clean-stageb3g2-bfd: clean-stageb3g2-bfd -clean-stageb3g2: clean-stageb3g2-bfd -clean-stageb3g2-bfd: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/bfd/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-bfd/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/bfd && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif bfd-bootstrap - - .PHONY: all-stage4-bfd maybe-all-stage4-bfd .PHONY: clean-stage4-bfd maybe-clean-stage4-bfd maybe-all-stage4-bfd: @@ -5430,14 +5394,19 @@ all-stage4-bfd: configure-stage4-bfd @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/bfd && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-bfd) maybe-clean-stage4-bfd: clean-stage4-bfd @@ -5468,14 +5437,19 @@ all-stageprofile-bfd: configure-stageprofile-bfd @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/bfd && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-bfd) maybe-clean-stageprofile-bfd: clean-stageprofile-bfd @@ -5506,14 +5480,19 @@ all-stagefeedback-bfd: configure-stagefeedback-bfd @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/bfd && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-bfd) maybe-clean-stagefeedback-bfd: clean-stagefeedback-bfd @@ -5932,10 +5911,12 @@ configure-stage1-opcodes: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/opcodes ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ cd $(HOST_SUBDIR)/opcodes || exit 1; \ @@ -5949,8 +5930,7 @@ configure-stage1-opcodes: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif opcodes-bootstrap .PHONY: configure-stage2-opcodes maybe-configure-stage2-opcodes @@ -5962,11 +5942,13 @@ configure-stage2-opcodes: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/opcodes ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ cd $(HOST_SUBDIR)/opcodes || exit 1; \ @@ -5981,38 +5963,7 @@ configure-stage2-opcodes: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif opcodes-bootstrap - -.PHONY: configure-stageb2g0-opcodes maybe-configure-stageb2g0-opcodes -maybe-configure-stageb2g0-opcodes: -@if opcodes-bootstrap -maybe-configure-stageb2g0-opcodes: configure-stageb2g0-opcodes -configure-stageb2g0-opcodes: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/opcodes ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ - cd $(HOST_SUBDIR)/opcodes || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/opcodes/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/opcodes"; \ - libsrcdir="$$s/opcodes"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif opcodes-bootstrap .PHONY: configure-stage3-opcodes maybe-configure-stage3-opcodes @@ -6024,11 +5975,13 @@ configure-stage3-opcodes: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/opcodes ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ cd $(HOST_SUBDIR)/opcodes || exit 1; \ @@ -6043,38 +5996,7 @@ configure-stage3-opcodes: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif opcodes-bootstrap - -.PHONY: configure-stageb3g2-opcodes maybe-configure-stageb3g2-opcodes -maybe-configure-stageb3g2-opcodes: -@if opcodes-bootstrap -maybe-configure-stageb3g2-opcodes: configure-stageb3g2-opcodes -configure-stageb3g2-opcodes: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/opcodes ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ - cd $(HOST_SUBDIR)/opcodes || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/opcodes/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/opcodes"; \ - libsrcdir="$$s/opcodes"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif opcodes-bootstrap .PHONY: configure-stage4-opcodes maybe-configure-stage4-opcodes @@ -6086,11 +6008,13 @@ configure-stage4-opcodes: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/opcodes ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ cd $(HOST_SUBDIR)/opcodes || exit 1; \ @@ -6105,7 +6029,7 @@ configure-stage4-opcodes: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif opcodes-bootstrap .PHONY: configure-stageprofile-opcodes maybe-configure-stageprofile-opcodes @@ -6117,11 +6041,13 @@ configure-stageprofile-opcodes: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/opcodes ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ cd $(HOST_SUBDIR)/opcodes || exit 1; \ @@ -6136,7 +6062,7 @@ configure-stageprofile-opcodes: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif opcodes-bootstrap .PHONY: configure-stagefeedback-opcodes maybe-configure-stagefeedback-opcodes @@ -6148,11 +6074,13 @@ configure-stagefeedback-opcodes: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/opcodes/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/opcodes ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/opcodes ; \ cd $(HOST_SUBDIR)/opcodes || exit 1; \ @@ -6167,7 +6095,7 @@ configure-stagefeedback-opcodes: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif opcodes-bootstrap @@ -6205,13 +6133,18 @@ all-stage1-opcodes: configure-stage1-opcodes @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/opcodes && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-opcodes) maybe-clean-stage1-opcodes: clean-stage1-opcodes @@ -6241,14 +6174,19 @@ all-stage2-opcodes: configure-stage2-opcodes @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/opcodes && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-opcodes) maybe-clean-stage2-opcodes: clean-stage2-opcodes @@ -6267,44 +6205,6 @@ clean-stage2-opcodes: @endif opcodes-bootstrap -.PHONY: all-stageb2g0-opcodes maybe-all-stageb2g0-opcodes -.PHONY: clean-stageb2g0-opcodes maybe-clean-stageb2g0-opcodes -maybe-all-stageb2g0-opcodes: -maybe-clean-stageb2g0-opcodes: -@if opcodes-bootstrap -maybe-all-stageb2g0-opcodes: all-stageb2g0-opcodes -all-stageb2g0: all-stageb2g0-opcodes -TARGET-stageb2g0-opcodes = $(TARGET-opcodes) -all-stageb2g0-opcodes: configure-stageb2g0-opcodes - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/opcodes && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-opcodes) - -maybe-clean-stageb2g0-opcodes: clean-stageb2g0-opcodes -clean-stageb2g0: clean-stageb2g0-opcodes -clean-stageb2g0-opcodes: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/opcodes/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-opcodes/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/opcodes && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif opcodes-bootstrap - - .PHONY: all-stage3-opcodes maybe-all-stage3-opcodes .PHONY: clean-stage3-opcodes maybe-clean-stage3-opcodes maybe-all-stage3-opcodes: @@ -6317,14 +6217,19 @@ all-stage3-opcodes: configure-stage3-opcodes @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/opcodes && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-opcodes) maybe-clean-stage3-opcodes: clean-stage3-opcodes @@ -6343,44 +6248,6 @@ clean-stage3-opcodes: @endif opcodes-bootstrap -.PHONY: all-stageb3g2-opcodes maybe-all-stageb3g2-opcodes -.PHONY: clean-stageb3g2-opcodes maybe-clean-stageb3g2-opcodes -maybe-all-stageb3g2-opcodes: -maybe-clean-stageb3g2-opcodes: -@if opcodes-bootstrap -maybe-all-stageb3g2-opcodes: all-stageb3g2-opcodes -all-stageb3g2: all-stageb3g2-opcodes -TARGET-stageb3g2-opcodes = $(TARGET-opcodes) -all-stageb3g2-opcodes: configure-stageb3g2-opcodes - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/opcodes && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-opcodes) - -maybe-clean-stageb3g2-opcodes: clean-stageb3g2-opcodes -clean-stageb3g2: clean-stageb3g2-opcodes -clean-stageb3g2-opcodes: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/opcodes/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-opcodes/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/opcodes && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif opcodes-bootstrap - - .PHONY: all-stage4-opcodes maybe-all-stage4-opcodes .PHONY: clean-stage4-opcodes maybe-clean-stage4-opcodes maybe-all-stage4-opcodes: @@ -6393,14 +6260,19 @@ all-stage4-opcodes: configure-stage4-opcodes @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/opcodes && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-opcodes) maybe-clean-stage4-opcodes: clean-stage4-opcodes @@ -6431,14 +6303,19 @@ all-stageprofile-opcodes: configure-stageprofile-opcodes @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/opcodes && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-opcodes) maybe-clean-stageprofile-opcodes: clean-stageprofile-opcodes @@ -6469,14 +6346,19 @@ all-stagefeedback-opcodes: configure-stagefeedback-opcodes @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/opcodes && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-opcodes) maybe-clean-stagefeedback-opcodes: clean-stagefeedback-opcodes @@ -6895,10 +6777,12 @@ configure-stage1-binutils: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/binutils ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ cd $(HOST_SUBDIR)/binutils || exit 1; \ @@ -6912,8 +6796,7 @@ configure-stage1-binutils: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif binutils-bootstrap .PHONY: configure-stage2-binutils maybe-configure-stage2-binutils @@ -6925,11 +6808,13 @@ configure-stage2-binutils: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/binutils ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ cd $(HOST_SUBDIR)/binutils || exit 1; \ @@ -6944,38 +6829,7 @@ configure-stage2-binutils: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif binutils-bootstrap - -.PHONY: configure-stageb2g0-binutils maybe-configure-stageb2g0-binutils -maybe-configure-stageb2g0-binutils: -@if binutils-bootstrap -maybe-configure-stageb2g0-binutils: configure-stageb2g0-binutils -configure-stageb2g0-binutils: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/binutils ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ - cd $(HOST_SUBDIR)/binutils || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/binutils/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/binutils"; \ - libsrcdir="$$s/binutils"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif binutils-bootstrap .PHONY: configure-stage3-binutils maybe-configure-stage3-binutils @@ -6987,11 +6841,13 @@ configure-stage3-binutils: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/binutils ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ cd $(HOST_SUBDIR)/binutils || exit 1; \ @@ -7006,38 +6862,7 @@ configure-stage3-binutils: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif binutils-bootstrap - -.PHONY: configure-stageb3g2-binutils maybe-configure-stageb3g2-binutils -maybe-configure-stageb3g2-binutils: -@if binutils-bootstrap -maybe-configure-stageb3g2-binutils: configure-stageb3g2-binutils -configure-stageb3g2-binutils: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/binutils ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ - cd $(HOST_SUBDIR)/binutils || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/binutils/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/binutils"; \ - libsrcdir="$$s/binutils"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif binutils-bootstrap .PHONY: configure-stage4-binutils maybe-configure-stage4-binutils @@ -7049,11 +6874,13 @@ configure-stage4-binutils: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/binutils ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ cd $(HOST_SUBDIR)/binutils || exit 1; \ @@ -7068,7 +6895,7 @@ configure-stage4-binutils: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif binutils-bootstrap .PHONY: configure-stageprofile-binutils maybe-configure-stageprofile-binutils @@ -7080,11 +6907,13 @@ configure-stageprofile-binutils: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/binutils ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ cd $(HOST_SUBDIR)/binutils || exit 1; \ @@ -7099,7 +6928,7 @@ configure-stageprofile-binutils: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif binutils-bootstrap .PHONY: configure-stagefeedback-binutils maybe-configure-stagefeedback-binutils @@ -7111,11 +6940,13 @@ configure-stagefeedback-binutils: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/binutils/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/binutils ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/binutils ; \ cd $(HOST_SUBDIR)/binutils || exit 1; \ @@ -7130,7 +6961,7 @@ configure-stagefeedback-binutils: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif binutils-bootstrap @@ -7168,13 +6999,18 @@ all-stage1-binutils: configure-stage1-binutils @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/binutils && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-binutils) maybe-clean-stage1-binutils: clean-stage1-binutils @@ -7204,14 +7040,19 @@ all-stage2-binutils: configure-stage2-binutils @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/binutils && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-binutils) maybe-clean-stage2-binutils: clean-stage2-binutils @@ -7230,44 +7071,6 @@ clean-stage2-binutils: @endif binutils-bootstrap -.PHONY: all-stageb2g0-binutils maybe-all-stageb2g0-binutils -.PHONY: clean-stageb2g0-binutils maybe-clean-stageb2g0-binutils -maybe-all-stageb2g0-binutils: -maybe-clean-stageb2g0-binutils: -@if binutils-bootstrap -maybe-all-stageb2g0-binutils: all-stageb2g0-binutils -all-stageb2g0: all-stageb2g0-binutils -TARGET-stageb2g0-binutils = $(TARGET-binutils) -all-stageb2g0-binutils: configure-stageb2g0-binutils - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/binutils && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-binutils) - -maybe-clean-stageb2g0-binutils: clean-stageb2g0-binutils -clean-stageb2g0: clean-stageb2g0-binutils -clean-stageb2g0-binutils: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/binutils/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-binutils/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/binutils && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif binutils-bootstrap - - .PHONY: all-stage3-binutils maybe-all-stage3-binutils .PHONY: clean-stage3-binutils maybe-clean-stage3-binutils maybe-all-stage3-binutils: @@ -7280,14 +7083,19 @@ all-stage3-binutils: configure-stage3-binutils @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/binutils && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-binutils) maybe-clean-stage3-binutils: clean-stage3-binutils @@ -7306,44 +7114,6 @@ clean-stage3-binutils: @endif binutils-bootstrap -.PHONY: all-stageb3g2-binutils maybe-all-stageb3g2-binutils -.PHONY: clean-stageb3g2-binutils maybe-clean-stageb3g2-binutils -maybe-all-stageb3g2-binutils: -maybe-clean-stageb3g2-binutils: -@if binutils-bootstrap -maybe-all-stageb3g2-binutils: all-stageb3g2-binutils -all-stageb3g2: all-stageb3g2-binutils -TARGET-stageb3g2-binutils = $(TARGET-binutils) -all-stageb3g2-binutils: configure-stageb3g2-binutils - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/binutils && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-binutils) - -maybe-clean-stageb3g2-binutils: clean-stageb3g2-binutils -clean-stageb3g2: clean-stageb3g2-binutils -clean-stageb3g2-binutils: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/binutils/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-binutils/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/binutils && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif binutils-bootstrap - - .PHONY: all-stage4-binutils maybe-all-stage4-binutils .PHONY: clean-stage4-binutils maybe-clean-stage4-binutils maybe-all-stage4-binutils: @@ -7356,14 +7126,19 @@ all-stage4-binutils: configure-stage4-binutils @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/binutils && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-binutils) maybe-clean-stage4-binutils: clean-stage4-binutils @@ -7394,14 +7169,19 @@ all-stageprofile-binutils: configure-stageprofile-binutils @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/binutils && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-binutils) maybe-clean-stageprofile-binutils: clean-stageprofile-binutils @@ -7432,14 +7212,19 @@ all-stagefeedback-binutils: configure-stagefeedback-binutils @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/binutils && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-binutils) maybe-clean-stagefeedback-binutils: clean-stagefeedback-binutils @@ -13373,10 +13158,12 @@ configure-stage1-gas: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/gas ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ cd $(HOST_SUBDIR)/gas || exit 1; \ @@ -13390,8 +13177,7 @@ configure-stage1-gas: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif gas-bootstrap .PHONY: configure-stage2-gas maybe-configure-stage2-gas @@ -13403,11 +13189,13 @@ configure-stage2-gas: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/gas ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ cd $(HOST_SUBDIR)/gas || exit 1; \ @@ -13422,38 +13210,7 @@ configure-stage2-gas: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif gas-bootstrap - -.PHONY: configure-stageb2g0-gas maybe-configure-stageb2g0-gas -maybe-configure-stageb2g0-gas: -@if gas-bootstrap -maybe-configure-stageb2g0-gas: configure-stageb2g0-gas -configure-stageb2g0-gas: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/gas ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ - cd $(HOST_SUBDIR)/gas || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gas/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gas"; \ - libsrcdir="$$s/gas"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif gas-bootstrap .PHONY: configure-stage3-gas maybe-configure-stage3-gas @@ -13465,11 +13222,13 @@ configure-stage3-gas: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/gas ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ cd $(HOST_SUBDIR)/gas || exit 1; \ @@ -13484,38 +13243,7 @@ configure-stage3-gas: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif gas-bootstrap - -.PHONY: configure-stageb3g2-gas maybe-configure-stageb3g2-gas -maybe-configure-stageb3g2-gas: -@if gas-bootstrap -maybe-configure-stageb3g2-gas: configure-stageb3g2-gas -configure-stageb3g2-gas: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/gas ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ - cd $(HOST_SUBDIR)/gas || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gas/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gas"; \ - libsrcdir="$$s/gas"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif gas-bootstrap .PHONY: configure-stage4-gas maybe-configure-stage4-gas @@ -13527,11 +13255,13 @@ configure-stage4-gas: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/gas ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ cd $(HOST_SUBDIR)/gas || exit 1; \ @@ -13546,7 +13276,7 @@ configure-stage4-gas: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif gas-bootstrap .PHONY: configure-stageprofile-gas maybe-configure-stageprofile-gas @@ -13558,11 +13288,13 @@ configure-stageprofile-gas: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/gas ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ cd $(HOST_SUBDIR)/gas || exit 1; \ @@ -13577,7 +13309,7 @@ configure-stageprofile-gas: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif gas-bootstrap .PHONY: configure-stagefeedback-gas maybe-configure-stagefeedback-gas @@ -13589,11 +13321,13 @@ configure-stagefeedback-gas: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gas/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/gas ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gas ; \ cd $(HOST_SUBDIR)/gas || exit 1; \ @@ -13608,7 +13342,7 @@ configure-stagefeedback-gas: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif gas-bootstrap @@ -13646,13 +13380,18 @@ all-stage1-gas: configure-stage1-gas @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gas && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-gas) maybe-clean-stage1-gas: clean-stage1-gas @@ -13682,14 +13421,19 @@ all-stage2-gas: configure-stage2-gas @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gas && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-gas) maybe-clean-stage2-gas: clean-stage2-gas @@ -13708,44 +13452,6 @@ clean-stage2-gas: @endif gas-bootstrap -.PHONY: all-stageb2g0-gas maybe-all-stageb2g0-gas -.PHONY: clean-stageb2g0-gas maybe-clean-stageb2g0-gas -maybe-all-stageb2g0-gas: -maybe-clean-stageb2g0-gas: -@if gas-bootstrap -maybe-all-stageb2g0-gas: all-stageb2g0-gas -all-stageb2g0: all-stageb2g0-gas -TARGET-stageb2g0-gas = $(TARGET-gas) -all-stageb2g0-gas: configure-stageb2g0-gas - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gas && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-gas) - -maybe-clean-stageb2g0-gas: clean-stageb2g0-gas -clean-stageb2g0: clean-stageb2g0-gas -clean-stageb2g0-gas: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/gas/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-gas/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/gas && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif gas-bootstrap - - .PHONY: all-stage3-gas maybe-all-stage3-gas .PHONY: clean-stage3-gas maybe-clean-stage3-gas maybe-all-stage3-gas: @@ -13758,14 +13464,19 @@ all-stage3-gas: configure-stage3-gas @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gas && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-gas) maybe-clean-stage3-gas: clean-stage3-gas @@ -13784,44 +13495,6 @@ clean-stage3-gas: @endif gas-bootstrap -.PHONY: all-stageb3g2-gas maybe-all-stageb3g2-gas -.PHONY: clean-stageb3g2-gas maybe-clean-stageb3g2-gas -maybe-all-stageb3g2-gas: -maybe-clean-stageb3g2-gas: -@if gas-bootstrap -maybe-all-stageb3g2-gas: all-stageb3g2-gas -all-stageb3g2: all-stageb3g2-gas -TARGET-stageb3g2-gas = $(TARGET-gas) -all-stageb3g2-gas: configure-stageb3g2-gas - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gas && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-gas) - -maybe-clean-stageb3g2-gas: clean-stageb3g2-gas -clean-stageb3g2: clean-stageb3g2-gas -clean-stageb3g2-gas: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/gas/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-gas/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/gas && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif gas-bootstrap - - .PHONY: all-stage4-gas maybe-all-stage4-gas .PHONY: clean-stage4-gas maybe-clean-stage4-gas maybe-all-stage4-gas: @@ -13834,14 +13507,19 @@ all-stage4-gas: configure-stage4-gas @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gas && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-gas) maybe-clean-stage4-gas: clean-stage4-gas @@ -13872,14 +13550,19 @@ all-stageprofile-gas: configure-stageprofile-gas @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gas && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-gas) maybe-clean-stageprofile-gas: clean-stageprofile-gas @@ -13910,14 +13593,19 @@ all-stagefeedback-gas: configure-stagefeedback-gas @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gas && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-gas) maybe-clean-stagefeedback-gas: clean-stagefeedback-gas @@ -14336,10 +14024,12 @@ configure-stage1-gcc: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/gcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ cd $(HOST_SUBDIR)/gcc || exit 1; \ @@ -14353,8 +14043,7 @@ configure-stage1-gcc: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif gcc-bootstrap .PHONY: configure-stage2-gcc maybe-configure-stage2-gcc @@ -14366,11 +14055,13 @@ configure-stage2-gcc: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/gcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ cd $(HOST_SUBDIR)/gcc || exit 1; \ @@ -14385,38 +14076,7 @@ configure-stage2-gcc: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif gcc-bootstrap - -.PHONY: configure-stageb2g0-gcc maybe-configure-stageb2g0-gcc -maybe-configure-stageb2g0-gcc: -@if gcc-bootstrap -maybe-configure-stageb2g0-gcc: configure-stageb2g0-gcc -configure-stageb2g0-gcc: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/gcc ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ - cd $(HOST_SUBDIR)/gcc || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gcc/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gcc"; \ - libsrcdir="$$s/gcc"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif gcc-bootstrap .PHONY: configure-stage3-gcc maybe-configure-stage3-gcc @@ -14428,11 +14088,13 @@ configure-stage3-gcc: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/gcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ cd $(HOST_SUBDIR)/gcc || exit 1; \ @@ -14447,38 +14109,7 @@ configure-stage3-gcc: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif gcc-bootstrap - -.PHONY: configure-stageb3g2-gcc maybe-configure-stageb3g2-gcc -maybe-configure-stageb3g2-gcc: -@if gcc-bootstrap -maybe-configure-stageb3g2-gcc: configure-stageb3g2-gcc -configure-stageb3g2-gcc: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/gcc ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ - cd $(HOST_SUBDIR)/gcc || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gcc/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gcc"; \ - libsrcdir="$$s/gcc"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif gcc-bootstrap .PHONY: configure-stage4-gcc maybe-configure-stage4-gcc @@ -14490,11 +14121,13 @@ configure-stage4-gcc: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/gcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ cd $(HOST_SUBDIR)/gcc || exit 1; \ @@ -14509,7 +14142,7 @@ configure-stage4-gcc: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif gcc-bootstrap .PHONY: configure-stageprofile-gcc maybe-configure-stageprofile-gcc @@ -14521,11 +14154,13 @@ configure-stageprofile-gcc: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/gcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ cd $(HOST_SUBDIR)/gcc || exit 1; \ @@ -14540,7 +14175,7 @@ configure-stageprofile-gcc: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif gcc-bootstrap .PHONY: configure-stagefeedback-gcc maybe-configure-stagefeedback-gcc @@ -14552,11 +14187,13 @@ configure-stagefeedback-gcc: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gcc/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/gcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gcc ; \ cd $(HOST_SUBDIR)/gcc || exit 1; \ @@ -14571,7 +14208,7 @@ configure-stagefeedback-gcc: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif gcc-bootstrap @@ -14609,13 +14246,18 @@ all-stage1-gcc: configure-stage1-gcc @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-gcc) maybe-clean-stage1-gcc: clean-stage1-gcc @@ -14645,14 +14287,19 @@ all-stage2-gcc: configure-stage2-gcc @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-gcc) maybe-clean-stage2-gcc: clean-stage2-gcc @@ -14671,44 +14318,6 @@ clean-stage2-gcc: @endif gcc-bootstrap -.PHONY: all-stageb2g0-gcc maybe-all-stageb2g0-gcc -.PHONY: clean-stageb2g0-gcc maybe-clean-stageb2g0-gcc -maybe-all-stageb2g0-gcc: -maybe-clean-stageb2g0-gcc: -@if gcc-bootstrap -maybe-all-stageb2g0-gcc: all-stageb2g0-gcc -all-stageb2g0: all-stageb2g0-gcc -TARGET-stageb2g0-gcc = $(TARGET-gcc) -all-stageb2g0-gcc: configure-stageb2g0-gcc - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gcc && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ - $(TARGET-stageb2g0-gcc) - -maybe-clean-stageb2g0-gcc: clean-stageb2g0-gcc -clean-stageb2g0: clean-stageb2g0-gcc -clean-stageb2g0-gcc: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/gcc/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-gcc/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/gcc && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(EXTRA_GCC_FLAGS) clean -@endif gcc-bootstrap - - .PHONY: all-stage3-gcc maybe-all-stage3-gcc .PHONY: clean-stage3-gcc maybe-clean-stage3-gcc maybe-all-stage3-gcc: @@ -14721,14 +14330,19 @@ all-stage3-gcc: configure-stage3-gcc @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-gcc) maybe-clean-stage3-gcc: clean-stage3-gcc @@ -14747,44 +14361,6 @@ clean-stage3-gcc: @endif gcc-bootstrap -.PHONY: all-stageb3g2-gcc maybe-all-stageb3g2-gcc -.PHONY: clean-stageb3g2-gcc maybe-clean-stageb3g2-gcc -maybe-all-stageb3g2-gcc: -maybe-clean-stageb3g2-gcc: -@if gcc-bootstrap -maybe-all-stageb3g2-gcc: all-stageb3g2-gcc -all-stageb3g2: all-stageb3g2-gcc -TARGET-stageb3g2-gcc = $(TARGET-gcc) -all-stageb3g2-gcc: configure-stageb3g2-gcc - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gcc && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ - $(TARGET-stageb3g2-gcc) - -maybe-clean-stageb3g2-gcc: clean-stageb3g2-gcc -clean-stageb3g2: clean-stageb3g2-gcc -clean-stageb3g2-gcc: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/gcc/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-gcc/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/gcc && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(EXTRA_GCC_FLAGS) clean -@endif gcc-bootstrap - - .PHONY: all-stage4-gcc maybe-all-stage4-gcc .PHONY: clean-stage4-gcc maybe-clean-stage4-gcc maybe-all-stage4-gcc: @@ -14797,14 +14373,19 @@ all-stage4-gcc: configure-stage4-gcc @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-gcc) maybe-clean-stage4-gcc: clean-stage4-gcc @@ -14835,14 +14416,19 @@ all-stageprofile-gcc: configure-stageprofile-gcc @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-gcc) maybe-clean-stageprofile-gcc: clean-stageprofile-gcc @@ -14873,14 +14459,19 @@ all-stagefeedback-gcc: configure-stagefeedback-gcc @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) $(EXTRA_GCC_FLAGS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-gcc) maybe-clean-stagefeedback-gcc: clean-stagefeedback-gcc @@ -16149,10 +15740,12 @@ configure-stage1-gmp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/gmp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ cd $(HOST_SUBDIR)/gmp || exit 1; \ @@ -16166,8 +15759,8 @@ configure-stage1-gmp: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" --disable-shared + $(STAGE1_CONFIGURE_FLAGS) \ + --disable-shared @endif gmp-bootstrap .PHONY: configure-stage2-gmp maybe-configure-stage2-gmp @@ -16179,11 +15772,13 @@ configure-stage2-gmp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/gmp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ cd $(HOST_SUBDIR)/gmp || exit 1; \ @@ -16198,38 +15793,8 @@ configure-stage2-gmp: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared -@endif gmp-bootstrap - -.PHONY: configure-stageb2g0-gmp maybe-configure-stageb2g0-gmp -maybe-configure-stageb2g0-gmp: -@if gmp-bootstrap -maybe-configure-stageb2g0-gmp: configure-stageb2g0-gmp -configure-stageb2g0-gmp: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/gmp ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ - cd $(HOST_SUBDIR)/gmp || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gmp/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gmp"; \ - libsrcdir="$$s/gmp"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared + $(STAGE2_CONFIGURE_FLAGS) \ + --disable-shared @endif gmp-bootstrap .PHONY: configure-stage3-gmp maybe-configure-stage3-gmp @@ -16241,11 +15806,13 @@ configure-stage3-gmp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/gmp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ cd $(HOST_SUBDIR)/gmp || exit 1; \ @@ -16260,38 +15827,8 @@ configure-stage3-gmp: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared -@endif gmp-bootstrap - -.PHONY: configure-stageb3g2-gmp maybe-configure-stageb3g2-gmp -maybe-configure-stageb3g2-gmp: -@if gmp-bootstrap -maybe-configure-stageb3g2-gmp: configure-stageb3g2-gmp -configure-stageb3g2-gmp: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/gmp ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ - cd $(HOST_SUBDIR)/gmp || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gmp/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gmp"; \ - libsrcdir="$$s/gmp"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared + $(STAGE3_CONFIGURE_FLAGS) \ + --disable-shared @endif gmp-bootstrap .PHONY: configure-stage4-gmp maybe-configure-stage4-gmp @@ -16303,11 +15840,13 @@ configure-stage4-gmp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/gmp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ cd $(HOST_SUBDIR)/gmp || exit 1; \ @@ -16322,7 +15861,8 @@ configure-stage4-gmp: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared + $(STAGE4_CONFIGURE_FLAGS) \ + --disable-shared @endif gmp-bootstrap .PHONY: configure-stageprofile-gmp maybe-configure-stageprofile-gmp @@ -16334,11 +15874,13 @@ configure-stageprofile-gmp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/gmp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ cd $(HOST_SUBDIR)/gmp || exit 1; \ @@ -16353,7 +15895,8 @@ configure-stageprofile-gmp: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared + $(STAGEprofile_CONFIGURE_FLAGS) \ + --disable-shared @endif gmp-bootstrap .PHONY: configure-stagefeedback-gmp maybe-configure-stagefeedback-gmp @@ -16365,11 +15908,13 @@ configure-stagefeedback-gmp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gmp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/gmp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gmp ; \ cd $(HOST_SUBDIR)/gmp || exit 1; \ @@ -16384,7 +15929,8 @@ configure-stagefeedback-gmp: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared + $(STAGEfeedback_CONFIGURE_FLAGS) \ + --disable-shared @endif gmp-bootstrap @@ -16422,13 +15968,18 @@ all-stage1-gmp: configure-stage1-gmp @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gmp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-gmp) maybe-clean-stage1-gmp: clean-stage1-gmp @@ -16458,14 +16009,19 @@ all-stage2-gmp: configure-stage2-gmp @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gmp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-gmp) maybe-clean-stage2-gmp: clean-stage2-gmp @@ -16484,44 +16040,6 @@ clean-stage2-gmp: @endif gmp-bootstrap -.PHONY: all-stageb2g0-gmp maybe-all-stageb2g0-gmp -.PHONY: clean-stageb2g0-gmp maybe-clean-stageb2g0-gmp -maybe-all-stageb2g0-gmp: -maybe-clean-stageb2g0-gmp: -@if gmp-bootstrap -maybe-all-stageb2g0-gmp: all-stageb2g0-gmp -all-stageb2g0: all-stageb2g0-gmp -TARGET-stageb2g0-gmp = $(TARGET-gmp) -all-stageb2g0-gmp: configure-stageb2g0-gmp - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gmp && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-gmp) - -maybe-clean-stageb2g0-gmp: clean-stageb2g0-gmp -clean-stageb2g0: clean-stageb2g0-gmp -clean-stageb2g0-gmp: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/gmp/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-gmp/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/gmp && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif gmp-bootstrap - - .PHONY: all-stage3-gmp maybe-all-stage3-gmp .PHONY: clean-stage3-gmp maybe-clean-stage3-gmp maybe-all-stage3-gmp: @@ -16534,14 +16052,19 @@ all-stage3-gmp: configure-stage3-gmp @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gmp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-gmp) maybe-clean-stage3-gmp: clean-stage3-gmp @@ -16560,44 +16083,6 @@ clean-stage3-gmp: @endif gmp-bootstrap -.PHONY: all-stageb3g2-gmp maybe-all-stageb3g2-gmp -.PHONY: clean-stageb3g2-gmp maybe-clean-stageb3g2-gmp -maybe-all-stageb3g2-gmp: -maybe-clean-stageb3g2-gmp: -@if gmp-bootstrap -maybe-all-stageb3g2-gmp: all-stageb3g2-gmp -all-stageb3g2: all-stageb3g2-gmp -TARGET-stageb3g2-gmp = $(TARGET-gmp) -all-stageb3g2-gmp: configure-stageb3g2-gmp - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gmp && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-gmp) - -maybe-clean-stageb3g2-gmp: clean-stageb3g2-gmp -clean-stageb3g2: clean-stageb3g2-gmp -clean-stageb3g2-gmp: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/gmp/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-gmp/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/gmp && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif gmp-bootstrap - - .PHONY: all-stage4-gmp maybe-all-stage4-gmp .PHONY: clean-stage4-gmp maybe-clean-stage4-gmp maybe-all-stage4-gmp: @@ -16610,14 +16095,19 @@ all-stage4-gmp: configure-stage4-gmp @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gmp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-gmp) maybe-clean-stage4-gmp: clean-stage4-gmp @@ -16648,14 +16138,19 @@ all-stageprofile-gmp: configure-stageprofile-gmp @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gmp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-gmp) maybe-clean-stageprofile-gmp: clean-stageprofile-gmp @@ -16686,14 +16181,19 @@ all-stagefeedback-gmp: configure-stagefeedback-gmp @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gmp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-gmp) maybe-clean-stagefeedback-gmp: clean-stagefeedback-gmp @@ -17106,10 +16606,12 @@ configure-stage1-mpfr: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/mpfr ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ cd $(HOST_SUBDIR)/mpfr || exit 1; \ @@ -17123,8 +16625,8 @@ configure-stage1-mpfr: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" --disable-shared @extra_mpfr_configure_flags@ + $(STAGE1_CONFIGURE_FLAGS) \ + --disable-shared @extra_mpfr_configure_flags@ @endif mpfr-bootstrap .PHONY: configure-stage2-mpfr maybe-configure-stage2-mpfr @@ -17136,11 +16638,13 @@ configure-stage2-mpfr: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/mpfr ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ cd $(HOST_SUBDIR)/mpfr || exit 1; \ @@ -17155,38 +16659,8 @@ configure-stage2-mpfr: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared @extra_mpfr_configure_flags@ -@endif mpfr-bootstrap - -.PHONY: configure-stageb2g0-mpfr maybe-configure-stageb2g0-mpfr -maybe-configure-stageb2g0-mpfr: -@if mpfr-bootstrap -maybe-configure-stageb2g0-mpfr: configure-stageb2g0-mpfr -configure-stageb2g0-mpfr: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/mpfr ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ - cd $(HOST_SUBDIR)/mpfr || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/mpfr/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/mpfr"; \ - libsrcdir="$$s/mpfr"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared @extra_mpfr_configure_flags@ + $(STAGE2_CONFIGURE_FLAGS) \ + --disable-shared @extra_mpfr_configure_flags@ @endif mpfr-bootstrap .PHONY: configure-stage3-mpfr maybe-configure-stage3-mpfr @@ -17198,11 +16672,13 @@ configure-stage3-mpfr: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/mpfr ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ cd $(HOST_SUBDIR)/mpfr || exit 1; \ @@ -17217,38 +16693,8 @@ configure-stage3-mpfr: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared @extra_mpfr_configure_flags@ -@endif mpfr-bootstrap - -.PHONY: configure-stageb3g2-mpfr maybe-configure-stageb3g2-mpfr -maybe-configure-stageb3g2-mpfr: -@if mpfr-bootstrap -maybe-configure-stageb3g2-mpfr: configure-stageb3g2-mpfr -configure-stageb3g2-mpfr: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/mpfr ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ - cd $(HOST_SUBDIR)/mpfr || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/mpfr/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/mpfr"; \ - libsrcdir="$$s/mpfr"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared @extra_mpfr_configure_flags@ + $(STAGE3_CONFIGURE_FLAGS) \ + --disable-shared @extra_mpfr_configure_flags@ @endif mpfr-bootstrap .PHONY: configure-stage4-mpfr maybe-configure-stage4-mpfr @@ -17260,11 +16706,13 @@ configure-stage4-mpfr: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/mpfr ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ cd $(HOST_SUBDIR)/mpfr || exit 1; \ @@ -17279,7 +16727,8 @@ configure-stage4-mpfr: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared @extra_mpfr_configure_flags@ + $(STAGE4_CONFIGURE_FLAGS) \ + --disable-shared @extra_mpfr_configure_flags@ @endif mpfr-bootstrap .PHONY: configure-stageprofile-mpfr maybe-configure-stageprofile-mpfr @@ -17291,11 +16740,13 @@ configure-stageprofile-mpfr: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/mpfr ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ cd $(HOST_SUBDIR)/mpfr || exit 1; \ @@ -17310,7 +16761,8 @@ configure-stageprofile-mpfr: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared @extra_mpfr_configure_flags@ + $(STAGEprofile_CONFIGURE_FLAGS) \ + --disable-shared @extra_mpfr_configure_flags@ @endif mpfr-bootstrap .PHONY: configure-stagefeedback-mpfr maybe-configure-stagefeedback-mpfr @@ -17322,11 +16774,13 @@ configure-stagefeedback-mpfr: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/mpfr/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/mpfr ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/mpfr ; \ cd $(HOST_SUBDIR)/mpfr || exit 1; \ @@ -17341,7 +16795,8 @@ configure-stagefeedback-mpfr: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared @extra_mpfr_configure_flags@ + $(STAGEfeedback_CONFIGURE_FLAGS) \ + --disable-shared @extra_mpfr_configure_flags@ @endif mpfr-bootstrap @@ -17379,13 +16834,18 @@ all-stage1-mpfr: configure-stage1-mpfr @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/mpfr && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-mpfr) maybe-clean-stage1-mpfr: clean-stage1-mpfr @@ -17415,14 +16875,19 @@ all-stage2-mpfr: configure-stage2-mpfr @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/mpfr && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-mpfr) maybe-clean-stage2-mpfr: clean-stage2-mpfr @@ -17441,44 +16906,6 @@ clean-stage2-mpfr: @endif mpfr-bootstrap -.PHONY: all-stageb2g0-mpfr maybe-all-stageb2g0-mpfr -.PHONY: clean-stageb2g0-mpfr maybe-clean-stageb2g0-mpfr -maybe-all-stageb2g0-mpfr: -maybe-clean-stageb2g0-mpfr: -@if mpfr-bootstrap -maybe-all-stageb2g0-mpfr: all-stageb2g0-mpfr -all-stageb2g0: all-stageb2g0-mpfr -TARGET-stageb2g0-mpfr = $(TARGET-mpfr) -all-stageb2g0-mpfr: configure-stageb2g0-mpfr - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/mpfr && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-mpfr) - -maybe-clean-stageb2g0-mpfr: clean-stageb2g0-mpfr -clean-stageb2g0: clean-stageb2g0-mpfr -clean-stageb2g0-mpfr: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/mpfr/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-mpfr/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/mpfr && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif mpfr-bootstrap - - .PHONY: all-stage3-mpfr maybe-all-stage3-mpfr .PHONY: clean-stage3-mpfr maybe-clean-stage3-mpfr maybe-all-stage3-mpfr: @@ -17491,14 +16918,19 @@ all-stage3-mpfr: configure-stage3-mpfr @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/mpfr && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-mpfr) maybe-clean-stage3-mpfr: clean-stage3-mpfr @@ -17517,44 +16949,6 @@ clean-stage3-mpfr: @endif mpfr-bootstrap -.PHONY: all-stageb3g2-mpfr maybe-all-stageb3g2-mpfr -.PHONY: clean-stageb3g2-mpfr maybe-clean-stageb3g2-mpfr -maybe-all-stageb3g2-mpfr: -maybe-clean-stageb3g2-mpfr: -@if mpfr-bootstrap -maybe-all-stageb3g2-mpfr: all-stageb3g2-mpfr -all-stageb3g2: all-stageb3g2-mpfr -TARGET-stageb3g2-mpfr = $(TARGET-mpfr) -all-stageb3g2-mpfr: configure-stageb3g2-mpfr - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/mpfr && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-mpfr) - -maybe-clean-stageb3g2-mpfr: clean-stageb3g2-mpfr -clean-stageb3g2: clean-stageb3g2-mpfr -clean-stageb3g2-mpfr: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/mpfr/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-mpfr/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/mpfr && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif mpfr-bootstrap - - .PHONY: all-stage4-mpfr maybe-all-stage4-mpfr .PHONY: clean-stage4-mpfr maybe-clean-stage4-mpfr maybe-all-stage4-mpfr: @@ -17567,14 +16961,19 @@ all-stage4-mpfr: configure-stage4-mpfr @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/mpfr && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-mpfr) maybe-clean-stage4-mpfr: clean-stage4-mpfr @@ -17605,14 +17004,19 @@ all-stageprofile-mpfr: configure-stageprofile-mpfr @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/mpfr && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-mpfr) maybe-clean-stageprofile-mpfr: clean-stageprofile-mpfr @@ -17643,14 +17047,19 @@ all-stagefeedback-mpfr: configure-stagefeedback-mpfr @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/mpfr && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-mpfr) maybe-clean-stagefeedback-mpfr: clean-stagefeedback-mpfr @@ -18063,10 +17472,12 @@ configure-stage1-ppl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/ppl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ cd $(HOST_SUBDIR)/ppl || exit 1; \ @@ -18080,8 +17491,8 @@ configure-stage1-ppl: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ + $(STAGE1_CONFIGURE_FLAGS) \ + --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ @endif ppl-bootstrap .PHONY: configure-stage2-ppl maybe-configure-stage2-ppl @@ -18093,11 +17504,13 @@ configure-stage2-ppl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/ppl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ cd $(HOST_SUBDIR)/ppl || exit 1; \ @@ -18112,38 +17525,8 @@ configure-stage2-ppl: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ -@endif ppl-bootstrap - -.PHONY: configure-stageb2g0-ppl maybe-configure-stageb2g0-ppl -maybe-configure-stageb2g0-ppl: -@if ppl-bootstrap -maybe-configure-stageb2g0-ppl: configure-stageb2g0-ppl -configure-stageb2g0-ppl: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/ppl ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ - cd $(HOST_SUBDIR)/ppl || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/ppl/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/ppl"; \ - libsrcdir="$$s/ppl"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ + $(STAGE2_CONFIGURE_FLAGS) \ + --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ @endif ppl-bootstrap .PHONY: configure-stage3-ppl maybe-configure-stage3-ppl @@ -18155,11 +17538,13 @@ configure-stage3-ppl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/ppl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ cd $(HOST_SUBDIR)/ppl || exit 1; \ @@ -18174,38 +17559,8 @@ configure-stage3-ppl: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ -@endif ppl-bootstrap - -.PHONY: configure-stageb3g2-ppl maybe-configure-stageb3g2-ppl -maybe-configure-stageb3g2-ppl: -@if ppl-bootstrap -maybe-configure-stageb3g2-ppl: configure-stageb3g2-ppl -configure-stageb3g2-ppl: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/ppl ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ - cd $(HOST_SUBDIR)/ppl || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/ppl/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/ppl"; \ - libsrcdir="$$s/ppl"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ + $(STAGE3_CONFIGURE_FLAGS) \ + --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ @endif ppl-bootstrap .PHONY: configure-stage4-ppl maybe-configure-stage4-ppl @@ -18217,11 +17572,13 @@ configure-stage4-ppl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/ppl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ cd $(HOST_SUBDIR)/ppl || exit 1; \ @@ -18236,7 +17593,8 @@ configure-stage4-ppl: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ + $(STAGE4_CONFIGURE_FLAGS) \ + --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ @endif ppl-bootstrap .PHONY: configure-stageprofile-ppl maybe-configure-stageprofile-ppl @@ -18248,11 +17606,13 @@ configure-stageprofile-ppl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/ppl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ cd $(HOST_SUBDIR)/ppl || exit 1; \ @@ -18267,7 +17627,8 @@ configure-stageprofile-ppl: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ + $(STAGEprofile_CONFIGURE_FLAGS) \ + --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ @endif ppl-bootstrap .PHONY: configure-stagefeedback-ppl maybe-configure-stagefeedback-ppl @@ -18279,11 +17640,13 @@ configure-stagefeedback-ppl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ppl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/ppl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ppl ; \ cd $(HOST_SUBDIR)/ppl || exit 1; \ @@ -18298,7 +17661,8 @@ configure-stagefeedback-ppl: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ + $(STAGEfeedback_CONFIGURE_FLAGS) \ + --disable-shared --with-libgmp-prefix=$$r/$(HOST_SUBDIR)/gmp/ --with-libgmpxx-prefix=$$r/$(HOST_SUBDIR)/gmp/ @endif ppl-bootstrap @@ -18336,13 +17700,18 @@ all-stage1-ppl: configure-stage1-ppl @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ppl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-ppl) maybe-clean-stage1-ppl: clean-stage1-ppl @@ -18372,14 +17741,19 @@ all-stage2-ppl: configure-stage2-ppl @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ppl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-ppl) maybe-clean-stage2-ppl: clean-stage2-ppl @@ -18398,44 +17772,6 @@ clean-stage2-ppl: @endif ppl-bootstrap -.PHONY: all-stageb2g0-ppl maybe-all-stageb2g0-ppl -.PHONY: clean-stageb2g0-ppl maybe-clean-stageb2g0-ppl -maybe-all-stageb2g0-ppl: -maybe-clean-stageb2g0-ppl: -@if ppl-bootstrap -maybe-all-stageb2g0-ppl: all-stageb2g0-ppl -all-stageb2g0: all-stageb2g0-ppl -TARGET-stageb2g0-ppl = $(TARGET-ppl) -all-stageb2g0-ppl: configure-stageb2g0-ppl - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/ppl && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-ppl) - -maybe-clean-stageb2g0-ppl: clean-stageb2g0-ppl -clean-stageb2g0: clean-stageb2g0-ppl -clean-stageb2g0-ppl: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/ppl/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-ppl/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/ppl && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif ppl-bootstrap - - .PHONY: all-stage3-ppl maybe-all-stage3-ppl .PHONY: clean-stage3-ppl maybe-clean-stage3-ppl maybe-all-stage3-ppl: @@ -18448,14 +17784,19 @@ all-stage3-ppl: configure-stage3-ppl @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ppl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-ppl) maybe-clean-stage3-ppl: clean-stage3-ppl @@ -18474,44 +17815,6 @@ clean-stage3-ppl: @endif ppl-bootstrap -.PHONY: all-stageb3g2-ppl maybe-all-stageb3g2-ppl -.PHONY: clean-stageb3g2-ppl maybe-clean-stageb3g2-ppl -maybe-all-stageb3g2-ppl: -maybe-clean-stageb3g2-ppl: -@if ppl-bootstrap -maybe-all-stageb3g2-ppl: all-stageb3g2-ppl -all-stageb3g2: all-stageb3g2-ppl -TARGET-stageb3g2-ppl = $(TARGET-ppl) -all-stageb3g2-ppl: configure-stageb3g2-ppl - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/ppl && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-ppl) - -maybe-clean-stageb3g2-ppl: clean-stageb3g2-ppl -clean-stageb3g2: clean-stageb3g2-ppl -clean-stageb3g2-ppl: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/ppl/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-ppl/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/ppl && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif ppl-bootstrap - - .PHONY: all-stage4-ppl maybe-all-stage4-ppl .PHONY: clean-stage4-ppl maybe-clean-stage4-ppl maybe-all-stage4-ppl: @@ -18524,14 +17827,19 @@ all-stage4-ppl: configure-stage4-ppl @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ppl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-ppl) maybe-clean-stage4-ppl: clean-stage4-ppl @@ -18562,14 +17870,19 @@ all-stageprofile-ppl: configure-stageprofile-ppl @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ppl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-ppl) maybe-clean-stageprofile-ppl: clean-stageprofile-ppl @@ -18600,14 +17913,19 @@ all-stagefeedback-ppl: configure-stagefeedback-ppl @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ppl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-ppl) maybe-clean-stagefeedback-ppl: clean-stagefeedback-ppl @@ -19020,10 +18338,12 @@ configure-stage1-cloog: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/cloog ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ cd $(HOST_SUBDIR)/cloog || exit 1; \ @@ -19037,8 +18357,8 @@ configure-stage1-cloog: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp + $(STAGE1_CONFIGURE_FLAGS) \ + --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp @endif cloog-bootstrap .PHONY: configure-stage2-cloog maybe-configure-stage2-cloog @@ -19050,11 +18370,13 @@ configure-stage2-cloog: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/cloog ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ cd $(HOST_SUBDIR)/cloog || exit 1; \ @@ -19069,38 +18391,8 @@ configure-stage2-cloog: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp -@endif cloog-bootstrap - -.PHONY: configure-stageb2g0-cloog maybe-configure-stageb2g0-cloog -maybe-configure-stageb2g0-cloog: -@if cloog-bootstrap -maybe-configure-stageb2g0-cloog: configure-stageb2g0-cloog -configure-stageb2g0-cloog: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/cloog ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ - cd $(HOST_SUBDIR)/cloog || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/cloog/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/cloog"; \ - libsrcdir="$$s/cloog"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp + $(STAGE2_CONFIGURE_FLAGS) \ + --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp @endif cloog-bootstrap .PHONY: configure-stage3-cloog maybe-configure-stage3-cloog @@ -19112,11 +18404,13 @@ configure-stage3-cloog: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/cloog ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ cd $(HOST_SUBDIR)/cloog || exit 1; \ @@ -19131,38 +18425,8 @@ configure-stage3-cloog: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp -@endif cloog-bootstrap - -.PHONY: configure-stageb3g2-cloog maybe-configure-stageb3g2-cloog -maybe-configure-stageb3g2-cloog: -@if cloog-bootstrap -maybe-configure-stageb3g2-cloog: configure-stageb3g2-cloog -configure-stageb3g2-cloog: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/cloog ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ - cd $(HOST_SUBDIR)/cloog || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/cloog/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/cloog"; \ - libsrcdir="$$s/cloog"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ - --target=none-${host_vendor}-${host_os} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp + $(STAGE3_CONFIGURE_FLAGS) \ + --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp @endif cloog-bootstrap .PHONY: configure-stage4-cloog maybe-configure-stage4-cloog @@ -19174,11 +18438,13 @@ configure-stage4-cloog: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/cloog ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ cd $(HOST_SUBDIR)/cloog || exit 1; \ @@ -19193,7 +18459,8 @@ configure-stage4-cloog: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp + $(STAGE4_CONFIGURE_FLAGS) \ + --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp @endif cloog-bootstrap .PHONY: configure-stageprofile-cloog maybe-configure-stageprofile-cloog @@ -19205,11 +18472,13 @@ configure-stageprofile-cloog: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/cloog ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ cd $(HOST_SUBDIR)/cloog || exit 1; \ @@ -19224,7 +18493,8 @@ configure-stageprofile-cloog: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp + $(STAGEprofile_CONFIGURE_FLAGS) \ + --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp @endif cloog-bootstrap .PHONY: configure-stagefeedback-cloog maybe-configure-stagefeedback-cloog @@ -19236,11 +18506,13 @@ configure-stagefeedback-cloog: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/cloog/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/cloog ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/cloog ; \ cd $(HOST_SUBDIR)/cloog || exit 1; \ @@ -19255,7 +18527,8 @@ configure-stagefeedback-cloog: $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \ --target=none-${host_vendor}-${host_os} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp + $(STAGEfeedback_CONFIGURE_FLAGS) \ + --disable-shared --with-gmp-library=$$r/$(HOST_SUBDIR)/gmp/.libs --with-gmp-include=$$r/$(HOST_SUBDIR)/gmp --with-ppl=$$r/$(HOST_SUBDIR)/ppl/ --with-bits=gmp @endif cloog-bootstrap @@ -19293,13 +18566,18 @@ all-stage1-cloog: configure-stage1-cloog @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/cloog && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-cloog) maybe-clean-stage1-cloog: clean-stage1-cloog @@ -19329,14 +18607,19 @@ all-stage2-cloog: configure-stage2-cloog @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/cloog && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-cloog) maybe-clean-stage2-cloog: clean-stage2-cloog @@ -19355,44 +18638,6 @@ clean-stage2-cloog: @endif cloog-bootstrap -.PHONY: all-stageb2g0-cloog maybe-all-stageb2g0-cloog -.PHONY: clean-stageb2g0-cloog maybe-clean-stageb2g0-cloog -maybe-all-stageb2g0-cloog: -maybe-clean-stageb2g0-cloog: -@if cloog-bootstrap -maybe-all-stageb2g0-cloog: all-stageb2g0-cloog -all-stageb2g0: all-stageb2g0-cloog -TARGET-stageb2g0-cloog = $(TARGET-cloog) -all-stageb2g0-cloog: configure-stageb2g0-cloog - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/cloog && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-cloog) - -maybe-clean-stageb2g0-cloog: clean-stageb2g0-cloog -clean-stageb2g0: clean-stageb2g0-cloog -clean-stageb2g0-cloog: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/cloog/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-cloog/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/cloog && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif cloog-bootstrap - - .PHONY: all-stage3-cloog maybe-all-stage3-cloog .PHONY: clean-stage3-cloog maybe-clean-stage3-cloog maybe-all-stage3-cloog: @@ -19405,14 +18650,19 @@ all-stage3-cloog: configure-stage3-cloog @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/cloog && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-cloog) maybe-clean-stage3-cloog: clean-stage3-cloog @@ -19431,44 +18681,6 @@ clean-stage3-cloog: @endif cloog-bootstrap -.PHONY: all-stageb3g2-cloog maybe-all-stageb3g2-cloog -.PHONY: clean-stageb3g2-cloog maybe-clean-stageb3g2-cloog -maybe-all-stageb3g2-cloog: -maybe-clean-stageb3g2-cloog: -@if cloog-bootstrap -maybe-all-stageb3g2-cloog: all-stageb3g2-cloog -all-stageb3g2: all-stageb3g2-cloog -TARGET-stageb3g2-cloog = $(TARGET-cloog) -all-stageb3g2-cloog: configure-stageb3g2-cloog - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/cloog && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-cloog) - -maybe-clean-stageb3g2-cloog: clean-stageb3g2-cloog -clean-stageb3g2: clean-stageb3g2-cloog -clean-stageb3g2-cloog: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/cloog/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-cloog/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/cloog && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif cloog-bootstrap - - .PHONY: all-stage4-cloog maybe-all-stage4-cloog .PHONY: clean-stage4-cloog maybe-clean-stage4-cloog maybe-all-stage4-cloog: @@ -19481,14 +18693,19 @@ all-stage4-cloog: configure-stage4-cloog @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/cloog && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-cloog) maybe-clean-stage4-cloog: clean-stage4-cloog @@ -19519,14 +18736,19 @@ all-stageprofile-cloog: configure-stageprofile-cloog @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/cloog && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-cloog) maybe-clean-stageprofile-cloog: clean-stageprofile-cloog @@ -19557,14 +18779,19 @@ all-stagefeedback-cloog: configure-stagefeedback-cloog @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/cloog && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-cloog) maybe-clean-stagefeedback-cloog: clean-stagefeedback-cloog @@ -20402,10 +19629,12 @@ configure-stage1-gold: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/gold ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ cd $(HOST_SUBDIR)/gold || exit 1; \ @@ -20419,8 +19648,7 @@ configure-stage1-gold: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif gold-bootstrap .PHONY: configure-stage2-gold maybe-configure-stage2-gold @@ -20432,11 +19660,13 @@ configure-stage2-gold: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/gold ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ cd $(HOST_SUBDIR)/gold || exit 1; \ @@ -20451,38 +19681,7 @@ configure-stage2-gold: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif gold-bootstrap - -.PHONY: configure-stageb2g0-gold maybe-configure-stageb2g0-gold -maybe-configure-stageb2g0-gold: -@if gold-bootstrap -maybe-configure-stageb2g0-gold: configure-stageb2g0-gold -configure-stageb2g0-gold: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/gold ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ - cd $(HOST_SUBDIR)/gold || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gold/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gold"; \ - libsrcdir="$$s/gold"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif gold-bootstrap .PHONY: configure-stage3-gold maybe-configure-stage3-gold @@ -20494,11 +19693,13 @@ configure-stage3-gold: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/gold ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ cd $(HOST_SUBDIR)/gold || exit 1; \ @@ -20513,38 +19714,7 @@ configure-stage3-gold: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif gold-bootstrap - -.PHONY: configure-stageb3g2-gold maybe-configure-stageb3g2-gold -maybe-configure-stageb3g2-gold: -@if gold-bootstrap -maybe-configure-stageb3g2-gold: configure-stageb3g2-gold -configure-stageb3g2-gold: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/gold ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ - cd $(HOST_SUBDIR)/gold || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/gold/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/gold"; \ - libsrcdir="$$s/gold"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif gold-bootstrap .PHONY: configure-stage4-gold maybe-configure-stage4-gold @@ -20556,11 +19726,13 @@ configure-stage4-gold: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/gold ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ cd $(HOST_SUBDIR)/gold || exit 1; \ @@ -20575,7 +19747,7 @@ configure-stage4-gold: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif gold-bootstrap .PHONY: configure-stageprofile-gold maybe-configure-stageprofile-gold @@ -20587,11 +19759,13 @@ configure-stageprofile-gold: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/gold ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ cd $(HOST_SUBDIR)/gold || exit 1; \ @@ -20606,7 +19780,7 @@ configure-stageprofile-gold: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif gold-bootstrap .PHONY: configure-stagefeedback-gold maybe-configure-stagefeedback-gold @@ -20618,11 +19792,13 @@ configure-stagefeedback-gold: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/gold/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/gold ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/gold ; \ cd $(HOST_SUBDIR)/gold || exit 1; \ @@ -20637,7 +19813,7 @@ configure-stagefeedback-gold: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif gold-bootstrap @@ -20675,13 +19851,18 @@ all-stage1-gold: configure-stage1-gold @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gold && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-gold) maybe-clean-stage1-gold: clean-stage1-gold @@ -20711,14 +19892,19 @@ all-stage2-gold: configure-stage2-gold @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gold && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-gold) maybe-clean-stage2-gold: clean-stage2-gold @@ -20737,44 +19923,6 @@ clean-stage2-gold: @endif gold-bootstrap -.PHONY: all-stageb2g0-gold maybe-all-stageb2g0-gold -.PHONY: clean-stageb2g0-gold maybe-clean-stageb2g0-gold -maybe-all-stageb2g0-gold: -maybe-clean-stageb2g0-gold: -@if gold-bootstrap -maybe-all-stageb2g0-gold: all-stageb2g0-gold -all-stageb2g0: all-stageb2g0-gold -TARGET-stageb2g0-gold = $(TARGET-gold) -all-stageb2g0-gold: configure-stageb2g0-gold - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gold && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-gold) - -maybe-clean-stageb2g0-gold: clean-stageb2g0-gold -clean-stageb2g0: clean-stageb2g0-gold -clean-stageb2g0-gold: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/gold/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-gold/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/gold && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif gold-bootstrap - - .PHONY: all-stage3-gold maybe-all-stage3-gold .PHONY: clean-stage3-gold maybe-clean-stage3-gold maybe-all-stage3-gold: @@ -20787,14 +19935,19 @@ all-stage3-gold: configure-stage3-gold @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gold && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-gold) maybe-clean-stage3-gold: clean-stage3-gold @@ -20813,44 +19966,6 @@ clean-stage3-gold: @endif gold-bootstrap -.PHONY: all-stageb3g2-gold maybe-all-stageb3g2-gold -.PHONY: clean-stageb3g2-gold maybe-clean-stageb3g2-gold -maybe-all-stageb3g2-gold: -maybe-clean-stageb3g2-gold: -@if gold-bootstrap -maybe-all-stageb3g2-gold: all-stageb3g2-gold -all-stageb3g2: all-stageb3g2-gold -TARGET-stageb3g2-gold = $(TARGET-gold) -all-stageb3g2-gold: configure-stageb3g2-gold - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/gold && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-gold) - -maybe-clean-stageb3g2-gold: clean-stageb3g2-gold -clean-stageb3g2: clean-stageb3g2-gold -clean-stageb3g2-gold: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/gold/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-gold/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/gold && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif gold-bootstrap - - .PHONY: all-stage4-gold maybe-all-stage4-gold .PHONY: clean-stage4-gold maybe-clean-stage4-gold maybe-all-stage4-gold: @@ -20863,14 +19978,19 @@ all-stage4-gold: configure-stage4-gold @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gold && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-gold) maybe-clean-stage4-gold: clean-stage4-gold @@ -20901,14 +20021,19 @@ all-stageprofile-gold: configure-stageprofile-gold @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gold && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-gold) maybe-clean-stageprofile-gold: clean-stageprofile-gold @@ -20939,14 +20064,19 @@ all-stagefeedback-gold: configure-stagefeedback-gold @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/gold && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-gold) maybe-clean-stagefeedback-gold: clean-stagefeedback-gold @@ -23065,10 +22195,12 @@ configure-stage1-intl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/intl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ cd $(HOST_SUBDIR)/intl || exit 1; \ @@ -23082,8 +22214,7 @@ configure-stage1-intl: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif intl-bootstrap .PHONY: configure-stage2-intl maybe-configure-stage2-intl @@ -23095,11 +22226,13 @@ configure-stage2-intl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/intl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ cd $(HOST_SUBDIR)/intl || exit 1; \ @@ -23114,38 +22247,7 @@ configure-stage2-intl: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif intl-bootstrap - -.PHONY: configure-stageb2g0-intl maybe-configure-stageb2g0-intl -maybe-configure-stageb2g0-intl: -@if intl-bootstrap -maybe-configure-stageb2g0-intl: configure-stageb2g0-intl -configure-stageb2g0-intl: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/intl ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ - cd $(HOST_SUBDIR)/intl || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/intl/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/intl"; \ - libsrcdir="$$s/intl"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif intl-bootstrap .PHONY: configure-stage3-intl maybe-configure-stage3-intl @@ -23157,11 +22259,13 @@ configure-stage3-intl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/intl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ cd $(HOST_SUBDIR)/intl || exit 1; \ @@ -23176,38 +22280,7 @@ configure-stage3-intl: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif intl-bootstrap - -.PHONY: configure-stageb3g2-intl maybe-configure-stageb3g2-intl -maybe-configure-stageb3g2-intl: -@if intl-bootstrap -maybe-configure-stageb3g2-intl: configure-stageb3g2-intl -configure-stageb3g2-intl: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/intl ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ - cd $(HOST_SUBDIR)/intl || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/intl/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/intl"; \ - libsrcdir="$$s/intl"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif intl-bootstrap .PHONY: configure-stage4-intl maybe-configure-stage4-intl @@ -23219,11 +22292,13 @@ configure-stage4-intl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/intl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ cd $(HOST_SUBDIR)/intl || exit 1; \ @@ -23238,7 +22313,7 @@ configure-stage4-intl: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif intl-bootstrap .PHONY: configure-stageprofile-intl maybe-configure-stageprofile-intl @@ -23250,11 +22325,13 @@ configure-stageprofile-intl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/intl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ cd $(HOST_SUBDIR)/intl || exit 1; \ @@ -23269,7 +22346,7 @@ configure-stageprofile-intl: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif intl-bootstrap .PHONY: configure-stagefeedback-intl maybe-configure-stagefeedback-intl @@ -23281,11 +22358,13 @@ configure-stagefeedback-intl: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/intl/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/intl ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/intl ; \ cd $(HOST_SUBDIR)/intl || exit 1; \ @@ -23300,7 +22379,7 @@ configure-stagefeedback-intl: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif intl-bootstrap @@ -23338,13 +22417,18 @@ all-stage1-intl: configure-stage1-intl @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/intl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-intl) maybe-clean-stage1-intl: clean-stage1-intl @@ -23374,14 +22458,19 @@ all-stage2-intl: configure-stage2-intl @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/intl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-intl) maybe-clean-stage2-intl: clean-stage2-intl @@ -23400,44 +22489,6 @@ clean-stage2-intl: @endif intl-bootstrap -.PHONY: all-stageb2g0-intl maybe-all-stageb2g0-intl -.PHONY: clean-stageb2g0-intl maybe-clean-stageb2g0-intl -maybe-all-stageb2g0-intl: -maybe-clean-stageb2g0-intl: -@if intl-bootstrap -maybe-all-stageb2g0-intl: all-stageb2g0-intl -all-stageb2g0: all-stageb2g0-intl -TARGET-stageb2g0-intl = $(TARGET-intl) -all-stageb2g0-intl: configure-stageb2g0-intl - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/intl && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-intl) - -maybe-clean-stageb2g0-intl: clean-stageb2g0-intl -clean-stageb2g0: clean-stageb2g0-intl -clean-stageb2g0-intl: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/intl/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-intl/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/intl && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif intl-bootstrap - - .PHONY: all-stage3-intl maybe-all-stage3-intl .PHONY: clean-stage3-intl maybe-clean-stage3-intl maybe-all-stage3-intl: @@ -23450,14 +22501,19 @@ all-stage3-intl: configure-stage3-intl @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/intl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-intl) maybe-clean-stage3-intl: clean-stage3-intl @@ -23476,44 +22532,6 @@ clean-stage3-intl: @endif intl-bootstrap -.PHONY: all-stageb3g2-intl maybe-all-stageb3g2-intl -.PHONY: clean-stageb3g2-intl maybe-clean-stageb3g2-intl -maybe-all-stageb3g2-intl: -maybe-clean-stageb3g2-intl: -@if intl-bootstrap -maybe-all-stageb3g2-intl: all-stageb3g2-intl -all-stageb3g2: all-stageb3g2-intl -TARGET-stageb3g2-intl = $(TARGET-intl) -all-stageb3g2-intl: configure-stageb3g2-intl - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/intl && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-intl) - -maybe-clean-stageb3g2-intl: clean-stageb3g2-intl -clean-stageb3g2: clean-stageb3g2-intl -clean-stageb3g2-intl: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/intl/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-intl/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/intl && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif intl-bootstrap - - .PHONY: all-stage4-intl maybe-all-stage4-intl .PHONY: clean-stage4-intl maybe-clean-stage4-intl maybe-all-stage4-intl: @@ -23526,14 +22544,19 @@ all-stage4-intl: configure-stage4-intl @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/intl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-intl) maybe-clean-stage4-intl: clean-stage4-intl @@ -23564,14 +22587,19 @@ all-stageprofile-intl: configure-stageprofile-intl @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/intl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-intl) maybe-clean-stageprofile-intl: clean-stageprofile-intl @@ -23602,14 +22630,19 @@ all-stagefeedback-intl: configure-stagefeedback-intl @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/intl && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-intl) maybe-clean-stagefeedback-intl: clean-stagefeedback-intl @@ -24863,10 +23896,12 @@ configure-stage1-ld: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/ld ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ cd $(HOST_SUBDIR)/ld || exit 1; \ @@ -24880,8 +23915,7 @@ configure-stage1-ld: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif ld-bootstrap .PHONY: configure-stage2-ld maybe-configure-stage2-ld @@ -24893,11 +23927,13 @@ configure-stage2-ld: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/ld ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ cd $(HOST_SUBDIR)/ld || exit 1; \ @@ -24912,38 +23948,7 @@ configure-stage2-ld: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif ld-bootstrap - -.PHONY: configure-stageb2g0-ld maybe-configure-stageb2g0-ld -maybe-configure-stageb2g0-ld: -@if ld-bootstrap -maybe-configure-stageb2g0-ld: configure-stageb2g0-ld -configure-stageb2g0-ld: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/ld ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ - cd $(HOST_SUBDIR)/ld || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/ld/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/ld"; \ - libsrcdir="$$s/ld"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif ld-bootstrap .PHONY: configure-stage3-ld maybe-configure-stage3-ld @@ -24955,11 +23960,13 @@ configure-stage3-ld: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/ld ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ cd $(HOST_SUBDIR)/ld || exit 1; \ @@ -24974,38 +23981,7 @@ configure-stage3-ld: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif ld-bootstrap - -.PHONY: configure-stageb3g2-ld maybe-configure-stageb3g2-ld -maybe-configure-stageb3g2-ld: -@if ld-bootstrap -maybe-configure-stageb3g2-ld: configure-stageb3g2-ld -configure-stageb3g2-ld: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/ld ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ - cd $(HOST_SUBDIR)/ld || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/ld/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/ld"; \ - libsrcdir="$$s/ld"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif ld-bootstrap .PHONY: configure-stage4-ld maybe-configure-stage4-ld @@ -25017,11 +23993,13 @@ configure-stage4-ld: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/ld ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ cd $(HOST_SUBDIR)/ld || exit 1; \ @@ -25036,7 +24014,7 @@ configure-stage4-ld: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif ld-bootstrap .PHONY: configure-stageprofile-ld maybe-configure-stageprofile-ld @@ -25048,11 +24026,13 @@ configure-stageprofile-ld: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/ld ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ cd $(HOST_SUBDIR)/ld || exit 1; \ @@ -25067,7 +24047,7 @@ configure-stageprofile-ld: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif ld-bootstrap .PHONY: configure-stagefeedback-ld maybe-configure-stagefeedback-ld @@ -25079,11 +24059,13 @@ configure-stagefeedback-ld: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/ld/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/ld ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/ld ; \ cd $(HOST_SUBDIR)/ld || exit 1; \ @@ -25098,7 +24080,7 @@ configure-stagefeedback-ld: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif ld-bootstrap @@ -25136,13 +24118,18 @@ all-stage1-ld: configure-stage1-ld @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ld && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-ld) maybe-clean-stage1-ld: clean-stage1-ld @@ -25172,14 +24159,19 @@ all-stage2-ld: configure-stage2-ld @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ld && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-ld) maybe-clean-stage2-ld: clean-stage2-ld @@ -25198,44 +24190,6 @@ clean-stage2-ld: @endif ld-bootstrap -.PHONY: all-stageb2g0-ld maybe-all-stageb2g0-ld -.PHONY: clean-stageb2g0-ld maybe-clean-stageb2g0-ld -maybe-all-stageb2g0-ld: -maybe-clean-stageb2g0-ld: -@if ld-bootstrap -maybe-all-stageb2g0-ld: all-stageb2g0-ld -all-stageb2g0: all-stageb2g0-ld -TARGET-stageb2g0-ld = $(TARGET-ld) -all-stageb2g0-ld: configure-stageb2g0-ld - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/ld && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-ld) - -maybe-clean-stageb2g0-ld: clean-stageb2g0-ld -clean-stageb2g0: clean-stageb2g0-ld -clean-stageb2g0-ld: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/ld/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-ld/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/ld && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif ld-bootstrap - - .PHONY: all-stage3-ld maybe-all-stage3-ld .PHONY: clean-stage3-ld maybe-clean-stage3-ld maybe-all-stage3-ld: @@ -25248,14 +24202,19 @@ all-stage3-ld: configure-stage3-ld @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ld && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-ld) maybe-clean-stage3-ld: clean-stage3-ld @@ -25274,44 +24233,6 @@ clean-stage3-ld: @endif ld-bootstrap -.PHONY: all-stageb3g2-ld maybe-all-stageb3g2-ld -.PHONY: clean-stageb3g2-ld maybe-clean-stageb3g2-ld -maybe-all-stageb3g2-ld: -maybe-clean-stageb3g2-ld: -@if ld-bootstrap -maybe-all-stageb3g2-ld: all-stageb3g2-ld -all-stageb3g2: all-stageb3g2-ld -TARGET-stageb3g2-ld = $(TARGET-ld) -all-stageb3g2-ld: configure-stageb3g2-ld - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/ld && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-ld) - -maybe-clean-stageb3g2-ld: clean-stageb3g2-ld -clean-stageb3g2: clean-stageb3g2-ld -clean-stageb3g2-ld: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/ld/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-ld/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/ld && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif ld-bootstrap - - .PHONY: all-stage4-ld maybe-all-stage4-ld .PHONY: clean-stage4-ld maybe-clean-stage4-ld maybe-all-stage4-ld: @@ -25324,14 +24245,19 @@ all-stage4-ld: configure-stage4-ld @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ld && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-ld) maybe-clean-stage4-ld: clean-stage4-ld @@ -25362,14 +24288,19 @@ all-stageprofile-ld: configure-stageprofile-ld @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ld && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-ld) maybe-clean-stageprofile-ld: clean-stageprofile-ld @@ -25400,14 +24331,19 @@ all-stagefeedback-ld: configure-stagefeedback-ld @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/ld && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-ld) maybe-clean-stagefeedback-ld: clean-stagefeedback-ld @@ -25826,10 +24762,12 @@ configure-stage1-libcpp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/libcpp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ cd $(HOST_SUBDIR)/libcpp || exit 1; \ @@ -25843,8 +24781,7 @@ configure-stage1-libcpp: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif libcpp-bootstrap .PHONY: configure-stage2-libcpp maybe-configure-stage2-libcpp @@ -25856,11 +24793,13 @@ configure-stage2-libcpp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/libcpp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ cd $(HOST_SUBDIR)/libcpp || exit 1; \ @@ -25875,38 +24814,7 @@ configure-stage2-libcpp: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif libcpp-bootstrap - -.PHONY: configure-stageb2g0-libcpp maybe-configure-stageb2g0-libcpp -maybe-configure-stageb2g0-libcpp: -@if libcpp-bootstrap -maybe-configure-stageb2g0-libcpp: configure-stageb2g0-libcpp -configure-stageb2g0-libcpp: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/libcpp ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ - cd $(HOST_SUBDIR)/libcpp || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/libcpp/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libcpp"; \ - libsrcdir="$$s/libcpp"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif libcpp-bootstrap .PHONY: configure-stage3-libcpp maybe-configure-stage3-libcpp @@ -25918,11 +24826,13 @@ configure-stage3-libcpp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/libcpp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ cd $(HOST_SUBDIR)/libcpp || exit 1; \ @@ -25937,38 +24847,7 @@ configure-stage3-libcpp: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif libcpp-bootstrap - -.PHONY: configure-stageb3g2-libcpp maybe-configure-stageb3g2-libcpp -maybe-configure-stageb3g2-libcpp: -@if libcpp-bootstrap -maybe-configure-stageb3g2-libcpp: configure-stageb3g2-libcpp -configure-stageb3g2-libcpp: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/libcpp ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ - cd $(HOST_SUBDIR)/libcpp || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/libcpp/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libcpp"; \ - libsrcdir="$$s/libcpp"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif libcpp-bootstrap .PHONY: configure-stage4-libcpp maybe-configure-stage4-libcpp @@ -25980,11 +24859,13 @@ configure-stage4-libcpp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/libcpp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ cd $(HOST_SUBDIR)/libcpp || exit 1; \ @@ -25999,7 +24880,7 @@ configure-stage4-libcpp: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif libcpp-bootstrap .PHONY: configure-stageprofile-libcpp maybe-configure-stageprofile-libcpp @@ -26011,11 +24892,13 @@ configure-stageprofile-libcpp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/libcpp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ cd $(HOST_SUBDIR)/libcpp || exit 1; \ @@ -26030,7 +24913,7 @@ configure-stageprofile-libcpp: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif libcpp-bootstrap .PHONY: configure-stagefeedback-libcpp maybe-configure-stagefeedback-libcpp @@ -26042,11 +24925,13 @@ configure-stagefeedback-libcpp: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libcpp/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/libcpp ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libcpp ; \ cd $(HOST_SUBDIR)/libcpp || exit 1; \ @@ -26061,7 +24946,7 @@ configure-stagefeedback-libcpp: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif libcpp-bootstrap @@ -26099,13 +24984,18 @@ all-stage1-libcpp: configure-stage1-libcpp @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libcpp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-libcpp) maybe-clean-stage1-libcpp: clean-stage1-libcpp @@ -26135,14 +25025,19 @@ all-stage2-libcpp: configure-stage2-libcpp @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libcpp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-libcpp) maybe-clean-stage2-libcpp: clean-stage2-libcpp @@ -26161,44 +25056,6 @@ clean-stage2-libcpp: @endif libcpp-bootstrap -.PHONY: all-stageb2g0-libcpp maybe-all-stageb2g0-libcpp -.PHONY: clean-stageb2g0-libcpp maybe-clean-stageb2g0-libcpp -maybe-all-stageb2g0-libcpp: -maybe-clean-stageb2g0-libcpp: -@if libcpp-bootstrap -maybe-all-stageb2g0-libcpp: all-stageb2g0-libcpp -all-stageb2g0: all-stageb2g0-libcpp -TARGET-stageb2g0-libcpp = $(TARGET-libcpp) -all-stageb2g0-libcpp: configure-stageb2g0-libcpp - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/libcpp && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-libcpp) - -maybe-clean-stageb2g0-libcpp: clean-stageb2g0-libcpp -clean-stageb2g0: clean-stageb2g0-libcpp -clean-stageb2g0-libcpp: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/libcpp/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-libcpp/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/libcpp && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif libcpp-bootstrap - - .PHONY: all-stage3-libcpp maybe-all-stage3-libcpp .PHONY: clean-stage3-libcpp maybe-clean-stage3-libcpp maybe-all-stage3-libcpp: @@ -26211,14 +25068,19 @@ all-stage3-libcpp: configure-stage3-libcpp @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libcpp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-libcpp) maybe-clean-stage3-libcpp: clean-stage3-libcpp @@ -26237,44 +25099,6 @@ clean-stage3-libcpp: @endif libcpp-bootstrap -.PHONY: all-stageb3g2-libcpp maybe-all-stageb3g2-libcpp -.PHONY: clean-stageb3g2-libcpp maybe-clean-stageb3g2-libcpp -maybe-all-stageb3g2-libcpp: -maybe-clean-stageb3g2-libcpp: -@if libcpp-bootstrap -maybe-all-stageb3g2-libcpp: all-stageb3g2-libcpp -all-stageb3g2: all-stageb3g2-libcpp -TARGET-stageb3g2-libcpp = $(TARGET-libcpp) -all-stageb3g2-libcpp: configure-stageb3g2-libcpp - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/libcpp && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-libcpp) - -maybe-clean-stageb3g2-libcpp: clean-stageb3g2-libcpp -clean-stageb3g2: clean-stageb3g2-libcpp -clean-stageb3g2-libcpp: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/libcpp/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-libcpp/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/libcpp && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif libcpp-bootstrap - - .PHONY: all-stage4-libcpp maybe-all-stage4-libcpp .PHONY: clean-stage4-libcpp maybe-clean-stage4-libcpp maybe-all-stage4-libcpp: @@ -26287,14 +25111,19 @@ all-stage4-libcpp: configure-stage4-libcpp @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libcpp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-libcpp) maybe-clean-stage4-libcpp: clean-stage4-libcpp @@ -26325,14 +25154,19 @@ all-stageprofile-libcpp: configure-stageprofile-libcpp @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libcpp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-libcpp) maybe-clean-stageprofile-libcpp: clean-stageprofile-libcpp @@ -26363,14 +25197,19 @@ all-stagefeedback-libcpp: configure-stagefeedback-libcpp @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libcpp && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-libcpp) maybe-clean-stagefeedback-libcpp: clean-stagefeedback-libcpp @@ -26789,10 +25628,12 @@ configure-stage1-libdecnumber: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/libdecnumber ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ @@ -26806,8 +25647,7 @@ configure-stage1-libdecnumber: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif libdecnumber-bootstrap .PHONY: configure-stage2-libdecnumber maybe-configure-stage2-libdecnumber @@ -26819,11 +25659,13 @@ configure-stage2-libdecnumber: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/libdecnumber ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ @@ -26838,38 +25680,7 @@ configure-stage2-libdecnumber: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif libdecnumber-bootstrap - -.PHONY: configure-stageb2g0-libdecnumber maybe-configure-stageb2g0-libdecnumber -maybe-configure-stageb2g0-libdecnumber: -@if libdecnumber-bootstrap -maybe-configure-stageb2g0-libdecnumber: configure-stageb2g0-libdecnumber -configure-stageb2g0-libdecnumber: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/libdecnumber ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ - cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/libdecnumber/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libdecnumber"; \ - libsrcdir="$$s/libdecnumber"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif libdecnumber-bootstrap .PHONY: configure-stage3-libdecnumber maybe-configure-stage3-libdecnumber @@ -26881,11 +25692,13 @@ configure-stage3-libdecnumber: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/libdecnumber ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ @@ -26900,38 +25713,7 @@ configure-stage3-libdecnumber: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif libdecnumber-bootstrap - -.PHONY: configure-stageb3g2-libdecnumber maybe-configure-stageb3g2-libdecnumber -maybe-configure-stageb3g2-libdecnumber: -@if libdecnumber-bootstrap -maybe-configure-stageb3g2-libdecnumber: configure-stageb3g2-libdecnumber -configure-stageb3g2-libdecnumber: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/libdecnumber ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ - cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/libdecnumber/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libdecnumber"; \ - libsrcdir="$$s/libdecnumber"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif libdecnumber-bootstrap .PHONY: configure-stage4-libdecnumber maybe-configure-stage4-libdecnumber @@ -26943,11 +25725,13 @@ configure-stage4-libdecnumber: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/libdecnumber ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ @@ -26962,7 +25746,7 @@ configure-stage4-libdecnumber: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif libdecnumber-bootstrap .PHONY: configure-stageprofile-libdecnumber maybe-configure-stageprofile-libdecnumber @@ -26974,11 +25758,13 @@ configure-stageprofile-libdecnumber: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/libdecnumber ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ @@ -26993,7 +25779,7 @@ configure-stageprofile-libdecnumber: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif libdecnumber-bootstrap .PHONY: configure-stagefeedback-libdecnumber maybe-configure-stagefeedback-libdecnumber @@ -27005,11 +25791,13 @@ configure-stagefeedback-libdecnumber: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libdecnumber/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/libdecnumber ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libdecnumber ; \ cd $(HOST_SUBDIR)/libdecnumber || exit 1; \ @@ -27024,7 +25812,7 @@ configure-stagefeedback-libdecnumber: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif libdecnumber-bootstrap @@ -27062,13 +25850,18 @@ all-stage1-libdecnumber: configure-stage1-libdecnumber @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libdecnumber && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-libdecnumber) maybe-clean-stage1-libdecnumber: clean-stage1-libdecnumber @@ -27098,14 +25891,19 @@ all-stage2-libdecnumber: configure-stage2-libdecnumber @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libdecnumber && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-libdecnumber) maybe-clean-stage2-libdecnumber: clean-stage2-libdecnumber @@ -27124,44 +25922,6 @@ clean-stage2-libdecnumber: @endif libdecnumber-bootstrap -.PHONY: all-stageb2g0-libdecnumber maybe-all-stageb2g0-libdecnumber -.PHONY: clean-stageb2g0-libdecnumber maybe-clean-stageb2g0-libdecnumber -maybe-all-stageb2g0-libdecnumber: -maybe-clean-stageb2g0-libdecnumber: -@if libdecnumber-bootstrap -maybe-all-stageb2g0-libdecnumber: all-stageb2g0-libdecnumber -all-stageb2g0: all-stageb2g0-libdecnumber -TARGET-stageb2g0-libdecnumber = $(TARGET-libdecnumber) -all-stageb2g0-libdecnumber: configure-stageb2g0-libdecnumber - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/libdecnumber && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-libdecnumber) - -maybe-clean-stageb2g0-libdecnumber: clean-stageb2g0-libdecnumber -clean-stageb2g0: clean-stageb2g0-libdecnumber -clean-stageb2g0-libdecnumber: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-libdecnumber/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/libdecnumber && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif libdecnumber-bootstrap - - .PHONY: all-stage3-libdecnumber maybe-all-stage3-libdecnumber .PHONY: clean-stage3-libdecnumber maybe-clean-stage3-libdecnumber maybe-all-stage3-libdecnumber: @@ -27174,14 +25934,19 @@ all-stage3-libdecnumber: configure-stage3-libdecnumber @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libdecnumber && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-libdecnumber) maybe-clean-stage3-libdecnumber: clean-stage3-libdecnumber @@ -27200,44 +25965,6 @@ clean-stage3-libdecnumber: @endif libdecnumber-bootstrap -.PHONY: all-stageb3g2-libdecnumber maybe-all-stageb3g2-libdecnumber -.PHONY: clean-stageb3g2-libdecnumber maybe-clean-stageb3g2-libdecnumber -maybe-all-stageb3g2-libdecnumber: -maybe-clean-stageb3g2-libdecnumber: -@if libdecnumber-bootstrap -maybe-all-stageb3g2-libdecnumber: all-stageb3g2-libdecnumber -all-stageb3g2: all-stageb3g2-libdecnumber -TARGET-stageb3g2-libdecnumber = $(TARGET-libdecnumber) -all-stageb3g2-libdecnumber: configure-stageb3g2-libdecnumber - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/libdecnumber && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-libdecnumber) - -maybe-clean-stageb3g2-libdecnumber: clean-stageb3g2-libdecnumber -clean-stageb3g2: clean-stageb3g2-libdecnumber -clean-stageb3g2-libdecnumber: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/libdecnumber/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-libdecnumber/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/libdecnumber && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif libdecnumber-bootstrap - - .PHONY: all-stage4-libdecnumber maybe-all-stage4-libdecnumber .PHONY: clean-stage4-libdecnumber maybe-clean-stage4-libdecnumber maybe-all-stage4-libdecnumber: @@ -27250,14 +25977,19 @@ all-stage4-libdecnumber: configure-stage4-libdecnumber @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libdecnumber && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-libdecnumber) maybe-clean-stage4-libdecnumber: clean-stage4-libdecnumber @@ -27288,14 +26020,19 @@ all-stageprofile-libdecnumber: configure-stageprofile-libdecnumber @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libdecnumber && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-libdecnumber) maybe-clean-stageprofile-libdecnumber: clean-stageprofile-libdecnumber @@ -27326,14 +26063,19 @@ all-stagefeedback-libdecnumber: configure-stagefeedback-libdecnumber @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libdecnumber && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-libdecnumber) maybe-clean-stagefeedback-libdecnumber: clean-stagefeedback-libdecnumber @@ -28177,10 +26919,12 @@ configure-stage1-libiberty: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/libiberty ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ cd $(HOST_SUBDIR)/libiberty || exit 1; \ @@ -28194,8 +26938,7 @@ configure-stage1-libiberty: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif libiberty-bootstrap .PHONY: configure-stage2-libiberty maybe-configure-stage2-libiberty @@ -28207,11 +26950,13 @@ configure-stage2-libiberty: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/libiberty ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ cd $(HOST_SUBDIR)/libiberty || exit 1; \ @@ -28226,38 +26971,7 @@ configure-stage2-libiberty: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif libiberty-bootstrap - -.PHONY: configure-stageb2g0-libiberty maybe-configure-stageb2g0-libiberty -maybe-configure-stageb2g0-libiberty: -@if libiberty-bootstrap -maybe-configure-stageb2g0-libiberty: configure-stageb2g0-libiberty -configure-stageb2g0-libiberty: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/libiberty ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ - cd $(HOST_SUBDIR)/libiberty || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/libiberty/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libiberty"; \ - libsrcdir="$$s/libiberty"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif libiberty-bootstrap .PHONY: configure-stage3-libiberty maybe-configure-stage3-libiberty @@ -28269,11 +26983,13 @@ configure-stage3-libiberty: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/libiberty ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ cd $(HOST_SUBDIR)/libiberty || exit 1; \ @@ -28288,38 +27004,7 @@ configure-stage3-libiberty: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif libiberty-bootstrap - -.PHONY: configure-stageb3g2-libiberty maybe-configure-stageb3g2-libiberty -maybe-configure-stageb3g2-libiberty: -@if libiberty-bootstrap -maybe-configure-stageb3g2-libiberty: configure-stageb3g2-libiberty -configure-stageb3g2-libiberty: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/libiberty ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ - cd $(HOST_SUBDIR)/libiberty || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/libiberty/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libiberty"; \ - libsrcdir="$$s/libiberty"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif libiberty-bootstrap .PHONY: configure-stage4-libiberty maybe-configure-stage4-libiberty @@ -28331,11 +27016,13 @@ configure-stage4-libiberty: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/libiberty ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ cd $(HOST_SUBDIR)/libiberty || exit 1; \ @@ -28350,7 +27037,7 @@ configure-stage4-libiberty: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif libiberty-bootstrap .PHONY: configure-stageprofile-libiberty maybe-configure-stageprofile-libiberty @@ -28362,11 +27049,13 @@ configure-stageprofile-libiberty: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/libiberty ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ cd $(HOST_SUBDIR)/libiberty || exit 1; \ @@ -28381,7 +27070,7 @@ configure-stageprofile-libiberty: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif libiberty-bootstrap .PHONY: configure-stagefeedback-libiberty maybe-configure-stagefeedback-libiberty @@ -28393,11 +27082,13 @@ configure-stagefeedback-libiberty: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/libiberty/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/libiberty ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libiberty ; \ cd $(HOST_SUBDIR)/libiberty || exit 1; \ @@ -28412,7 +27103,7 @@ configure-stagefeedback-libiberty: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif libiberty-bootstrap @@ -28450,13 +27141,18 @@ all-stage1-libiberty: configure-stage1-libiberty @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libiberty && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-libiberty) maybe-clean-stage1-libiberty: clean-stage1-libiberty @@ -28486,14 +27182,19 @@ all-stage2-libiberty: configure-stage2-libiberty @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libiberty && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-libiberty) maybe-clean-stage2-libiberty: clean-stage2-libiberty @@ -28512,44 +27213,6 @@ clean-stage2-libiberty: @endif libiberty-bootstrap -.PHONY: all-stageb2g0-libiberty maybe-all-stageb2g0-libiberty -.PHONY: clean-stageb2g0-libiberty maybe-clean-stageb2g0-libiberty -maybe-all-stageb2g0-libiberty: -maybe-clean-stageb2g0-libiberty: -@if libiberty-bootstrap -maybe-all-stageb2g0-libiberty: all-stageb2g0-libiberty -all-stageb2g0: all-stageb2g0-libiberty -TARGET-stageb2g0-libiberty = $(TARGET-libiberty) -all-stageb2g0-libiberty: configure-stageb2g0-libiberty - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-libiberty) - -maybe-clean-stageb2g0-libiberty: clean-stageb2g0-libiberty -clean-stageb2g0: clean-stageb2g0-libiberty -clean-stageb2g0-libiberty: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/libiberty/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-libiberty/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/libiberty && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif libiberty-bootstrap - - .PHONY: all-stage3-libiberty maybe-all-stage3-libiberty .PHONY: clean-stage3-libiberty maybe-clean-stage3-libiberty maybe-all-stage3-libiberty: @@ -28562,14 +27225,19 @@ all-stage3-libiberty: configure-stage3-libiberty @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libiberty && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-libiberty) maybe-clean-stage3-libiberty: clean-stage3-libiberty @@ -28588,44 +27256,6 @@ clean-stage3-libiberty: @endif libiberty-bootstrap -.PHONY: all-stageb3g2-libiberty maybe-all-stageb3g2-libiberty -.PHONY: clean-stageb3g2-libiberty maybe-clean-stageb3g2-libiberty -maybe-all-stageb3g2-libiberty: -maybe-clean-stageb3g2-libiberty: -@if libiberty-bootstrap -maybe-all-stageb3g2-libiberty: all-stageb3g2-libiberty -all-stageb3g2: all-stageb3g2-libiberty -TARGET-stageb3g2-libiberty = $(TARGET-libiberty) -all-stageb3g2-libiberty: configure-stageb3g2-libiberty - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/libiberty && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-libiberty) - -maybe-clean-stageb3g2-libiberty: clean-stageb3g2-libiberty -clean-stageb3g2: clean-stageb3g2-libiberty -clean-stageb3g2-libiberty: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/libiberty/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-libiberty/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/libiberty && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif libiberty-bootstrap - - .PHONY: all-stage4-libiberty maybe-all-stage4-libiberty .PHONY: clean-stage4-libiberty maybe-clean-stage4-libiberty maybe-all-stage4-libiberty: @@ -28638,14 +27268,19 @@ all-stage4-libiberty: configure-stage4-libiberty @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libiberty && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-libiberty) maybe-clean-stage4-libiberty: clean-stage4-libiberty @@ -28676,14 +27311,19 @@ all-stageprofile-libiberty: configure-stageprofile-libiberty @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libiberty && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-libiberty) maybe-clean-stageprofile-libiberty: clean-stageprofile-libiberty @@ -28714,14 +27354,19 @@ all-stagefeedback-libiberty: configure-stagefeedback-libiberty @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/libiberty && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-libiberty) maybe-clean-stagefeedback-libiberty: clean-stagefeedback-libiberty @@ -39262,10 +37907,12 @@ configure-stage1-zlib: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ - $(HOST_EXPORTS) \ + $(HOST_EXPORTS) \ CFLAGS="$(STAGE1_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE1_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(HOST_SUBDIR)/zlib ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ cd $(HOST_SUBDIR)/zlib || exit 1; \ @@ -39279,8 +37926,7 @@ configure-stage1-zlib: $(SHELL) $${libsrcdir}/configure \ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif zlib-bootstrap .PHONY: configure-stage2-zlib maybe-configure-stage2-zlib @@ -39292,11 +37938,13 @@ configure-stage2-zlib: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE2_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE2_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE2_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(HOST_SUBDIR)/zlib ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ cd $(HOST_SUBDIR)/zlib || exit 1; \ @@ -39311,38 +37959,7 @@ configure-stage2-zlib: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif zlib-bootstrap - -.PHONY: configure-stageb2g0-zlib maybe-configure-stageb2g0-zlib -maybe-configure-stageb2g0-zlib: -@if zlib-bootstrap -maybe-configure-stageb2g0-zlib: configure-stageb2g0-zlib -configure-stageb2g0-zlib: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -g0"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(HOST_SUBDIR)/zlib ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ - cd $(HOST_SUBDIR)/zlib || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/zlib/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/zlib"; \ - libsrcdir="$$s/zlib"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif zlib-bootstrap .PHONY: configure-stage3-zlib maybe-configure-stage3-zlib @@ -39354,11 +37971,13 @@ configure-stage3-zlib: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE3_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE3_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE3_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(HOST_SUBDIR)/zlib ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ cd $(HOST_SUBDIR)/zlib || exit 1; \ @@ -39373,38 +37992,7 @@ configure-stage3-zlib: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif zlib-bootstrap - -.PHONY: configure-stageb3g2-zlib maybe-configure-stageb3g2-zlib -maybe-configure-stageb3g2-zlib: -@if zlib-bootstrap -maybe-configure-stageb3g2-zlib: configure-stageb3g2-zlib -configure-stageb3g2-zlib: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -g2"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(HOST_SUBDIR)/zlib ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ - cd $(HOST_SUBDIR)/zlib || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(HOST_SUBDIR)/zlib/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/zlib"; \ - libsrcdir="$$s/zlib"; \ - $(SHELL) $${libsrcdir}/configure \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif zlib-bootstrap .PHONY: configure-stage4-zlib maybe-configure-stage4-zlib @@ -39416,11 +38004,13 @@ configure-stage4-zlib: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ + $(POSTSTAGE1_HOST_EXPORTS) \ CFLAGS="$(STAGE4_CFLAGS)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + CXXFLAGS="$(STAGE4_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGE4_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(HOST_SUBDIR)/zlib ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ cd $(HOST_SUBDIR)/zlib || exit 1; \ @@ -39435,7 +38025,7 @@ configure-stage4-zlib: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif zlib-bootstrap .PHONY: configure-stageprofile-zlib maybe-configure-stageprofile-zlib @@ -39447,11 +38037,13 @@ configure-stageprofile-zlib: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEprofile_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEprofile_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage profile in $(HOST_SUBDIR)/zlib ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ cd $(HOST_SUBDIR)/zlib || exit 1; \ @@ -39466,7 +38058,7 @@ configure-stageprofile-zlib: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif zlib-bootstrap .PHONY: configure-stagefeedback-zlib maybe-configure-stagefeedback-zlib @@ -39478,11 +38070,13 @@ configure-stagefeedback-zlib: @$(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ test ! -f $(HOST_SUBDIR)/zlib/Makefile || exit 0; \ $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use"; export CXXFLAGS; \ + $(POSTSTAGE1_HOST_EXPORTS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)"; export CXXFLAGS; \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(HOST_SUBDIR)/zlib ; \ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/zlib ; \ cd $(HOST_SUBDIR)/zlib || exit 1; \ @@ -39497,7 +38091,7 @@ configure-stagefeedback-zlib: $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif zlib-bootstrap @@ -39535,13 +38129,18 @@ all-stage1-zlib: configure-stage1-zlib @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(HOST_EXPORTS) \ cd $(HOST_SUBDIR)/zlib && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) \ + CFLAGS="$(STAGE1_CFLAGS)" \ + CXXFLAGS="$(STAGE1_CFLAGS)" \ + LIBCFLAGS="$(LIBCFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-zlib) maybe-clean-stage1-zlib: clean-stage1-zlib @@ -39571,14 +38170,19 @@ all-stage2-zlib: configure-stage2-zlib @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/zlib && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE2_CFLAGS)" \ + CXXFLAGS="$(STAGE2_CFLAGS)" \ + LIBCFLAGS="$(STAGE2_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-zlib) maybe-clean-stage2-zlib: clean-stage2-zlib @@ -39597,44 +38201,6 @@ clean-stage2-zlib: @endif zlib-bootstrap -.PHONY: all-stageb2g0-zlib maybe-all-stageb2g0-zlib -.PHONY: clean-stageb2g0-zlib maybe-clean-stageb2g0-zlib -maybe-all-stageb2g0-zlib: -maybe-clean-stageb2g0-zlib: -@if zlib-bootstrap -maybe-all-stageb2g0-zlib: all-stageb2g0-zlib -all-stageb2g0: all-stageb2g0-zlib -TARGET-stageb2g0-zlib = $(TARGET-zlib) -all-stageb2g0-zlib: configure-stageb2g0-zlib - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/zlib && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb2g0-zlib) - -maybe-clean-stageb2g0-zlib: clean-stageb2g0-zlib -clean-stageb2g0: clean-stageb2g0-zlib -clean-stageb2g0-zlib: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(HOST_SUBDIR)/zlib/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb2g0-zlib/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(HOST_SUBDIR)/zlib && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif zlib-bootstrap - - .PHONY: all-stage3-zlib maybe-all-stage3-zlib .PHONY: clean-stage3-zlib maybe-clean-stage3-zlib maybe-all-stage3-zlib: @@ -39647,14 +38213,19 @@ all-stage3-zlib: configure-stage3-zlib @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/zlib && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGE3_CFLAGS)" \ + CXXFLAGS="$(STAGE3_CFLAGS)" \ + LIBCFLAGS="$(STAGE3_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-zlib) maybe-clean-stage3-zlib: clean-stage3-zlib @@ -39673,44 +38244,6 @@ clean-stage3-zlib: @endif zlib-bootstrap -.PHONY: all-stageb3g2-zlib maybe-all-stageb3g2-zlib -.PHONY: clean-stageb3g2-zlib maybe-clean-stageb3g2-zlib -maybe-all-stageb3g2-zlib: -maybe-clean-stageb3g2-zlib: -@if zlib-bootstrap -maybe-all-stageb3g2-zlib: all-stageb3g2-zlib -all-stageb3g2: all-stageb3g2-zlib -TARGET-stageb3g2-zlib = $(TARGET-zlib) -all-stageb3g2-zlib: configure-stageb3g2-zlib - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(HOST_EXPORTS) \ - $(POSTSTAGE1_HOST_EXPORTS) \ - cd $(HOST_SUBDIR)/zlib && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ - $(TARGET-stageb3g2-zlib) - -maybe-clean-stageb3g2-zlib: clean-stageb3g2-zlib -clean-stageb3g2: clean-stageb3g2-zlib -clean-stageb3g2-zlib: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(HOST_SUBDIR)/zlib/Makefile ] || exit 0; \ - else \ - [ -f $(HOST_SUBDIR)/stageb3g2-zlib/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(HOST_SUBDIR)/zlib && \ - $(MAKE) $(EXTRA_HOST_FLAGS) \ - $(POSTSTAGE1_FLAGS_TO_PASS) \ - clean -@endif zlib-bootstrap - - .PHONY: all-stage4-zlib maybe-all-stage4-zlib .PHONY: clean-stage4-zlib maybe-clean-stage4-zlib maybe-all-stage4-zlib: @@ -39723,14 +38256,19 @@ all-stage4-zlib: configure-stage4-zlib @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/zlib && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ + CFLAGS="$(STAGE4_CFLAGS)" \ + CXXFLAGS="$(STAGE4_CFLAGS)" \ LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-zlib) maybe-clean-stage4-zlib: clean-stage4-zlib @@ -39761,14 +38299,19 @@ all-stageprofile-zlib: configure-stageprofile-zlib @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/zlib && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEprofile_CFLAGS)" \ + CXXFLAGS="$(STAGEprofile_CFLAGS)" \ + LIBCFLAGS="$(STAGEprofile_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-zlib) maybe-clean-stageprofile-zlib: clean-stageprofile-zlib @@ -39799,14 +38342,19 @@ all-stagefeedback-zlib: configure-stagefeedback-zlib @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(HOST_EXPORTS) \ $(POSTSTAGE1_HOST_EXPORTS) \ cd $(HOST_SUBDIR)/zlib && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + CFLAGS="$(STAGEfeedback_CFLAGS)" \ + CXXFLAGS="$(STAGEfeedback_CFLAGS)" \ + LIBCFLAGS="$(STAGEfeedback_CFLAGS)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_HOST_FLAGS) $(POSTSTAGE1_FLAGS_TO_PASS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-zlib) maybe-clean-stagefeedback-zlib: clean-stagefeedback-zlib @@ -45552,6 +44100,7 @@ configure-stage1-target-libgcc: @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ echo "Checking multilib configuration for libgcc..."; \ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ @@ -45565,9 +44114,10 @@ configure-stage1-target-libgcc: mv $(TARGET_SUBDIR)/libgcc/multilib.tmp $(TARGET_SUBDIR)/libgcc/multilib.out; \ fi; \ test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ - $(NORMAL_TARGET_EXPORTS) \ - CFLAGS="$(STAGE1_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE1_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + $(NORMAL_TARGET_EXPORTS) \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS; \ echo Configuring stage 1 in $(TARGET_SUBDIR)/libgcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ cd $(TARGET_SUBDIR)/libgcc || exit 1; \ @@ -45581,8 +44131,7 @@ configure-stage1-target-libgcc: $(SHELL) $${libsrcdir}/configure \ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ --target=${target_alias} $${srcdiroption} \ - \ - --disable-intermodule $(STAGE1_CHECKING) --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" + $(STAGE1_CONFIGURE_FLAGS) @endif target-libgcc-bootstrap .PHONY: configure-stage2-target-libgcc maybe-configure-stage2-target-libgcc @@ -45594,6 +44143,7 @@ configure-stage2-target-libgcc: @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ echo "Checking multilib configuration for libgcc..."; \ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ @@ -45608,9 +44158,10 @@ configure-stage2-target-libgcc: fi; \ test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ $(NORMAL_TARGET_EXPORTS) \ - \ - CFLAGS="$(STAGE2_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS; \ echo Configuring stage 2 in $(TARGET_SUBDIR)/libgcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ cd $(TARGET_SUBDIR)/libgcc || exit 1; \ @@ -45625,50 +44176,7 @@ configure-stage2-target-libgcc: $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif target-libgcc-bootstrap - -.PHONY: configure-stageb2g0-target-libgcc maybe-configure-stageb2g0-target-libgcc -maybe-configure-stageb2g0-target-libgcc: -@if target-libgcc-bootstrap -maybe-configure-stageb2g0-target-libgcc: configure-stageb2g0-target-libgcc -configure-stageb2g0-target-libgcc: - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - echo "Checking multilib configuration for libgcc..."; \ - $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ - if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ - if cmp -s $(TARGET_SUBDIR)/libgcc/multilib.tmp $(TARGET_SUBDIR)/libgcc/multilib.out; then \ - rm -f $(TARGET_SUBDIR)/libgcc/multilib.tmp; \ - else \ - rm -f $(TARGET_SUBDIR)/libgcc/Makefile; \ - mv $(TARGET_SUBDIR)/libgcc/multilib.tmp $(TARGET_SUBDIR)/libgcc/multilib.out; \ - fi; \ - else \ - mv $(TARGET_SUBDIR)/libgcc/multilib.tmp $(TARGET_SUBDIR)/libgcc/multilib.out; \ - fi; \ - test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ - $(NORMAL_TARGET_EXPORTS) \ - \ - CFLAGS="$(STAGE2_LIBCFLAGS) -g0 $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_LIBCFLAGS) -g0 $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ - echo Configuring stage b2g0 in $(TARGET_SUBDIR)/libgcc ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ - cd $(TARGET_SUBDIR)/libgcc || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(TARGET_SUBDIR)/libgcc/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libgcc"; \ - libsrcdir="$$s/libgcc"; \ - $(SHELL) $${libsrcdir}/configure \ - $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE2_CONFIGURE_FLAGS) @endif target-libgcc-bootstrap .PHONY: configure-stage3-target-libgcc maybe-configure-stage3-target-libgcc @@ -45680,6 +44188,7 @@ configure-stage3-target-libgcc: @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ echo "Checking multilib configuration for libgcc..."; \ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ @@ -45694,9 +44203,10 @@ configure-stage3-target-libgcc: fi; \ test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ $(NORMAL_TARGET_EXPORTS) \ - \ - CFLAGS="$(STAGE3_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS; \ echo Configuring stage 3 in $(TARGET_SUBDIR)/libgcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ cd $(TARGET_SUBDIR)/libgcc || exit 1; \ @@ -45711,50 +44221,7 @@ configure-stage3-target-libgcc: $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ -@endif target-libgcc-bootstrap - -.PHONY: configure-stageb3g2-target-libgcc maybe-configure-stageb3g2-target-libgcc -maybe-configure-stageb3g2-target-libgcc: -@if target-libgcc-bootstrap -maybe-configure-stageb3g2-target-libgcc: configure-stageb3g2-target-libgcc -configure-stageb3g2-target-libgcc: - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - echo "Checking multilib configuration for libgcc..."; \ - $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ - if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ - if cmp -s $(TARGET_SUBDIR)/libgcc/multilib.tmp $(TARGET_SUBDIR)/libgcc/multilib.out; then \ - rm -f $(TARGET_SUBDIR)/libgcc/multilib.tmp; \ - else \ - rm -f $(TARGET_SUBDIR)/libgcc/Makefile; \ - mv $(TARGET_SUBDIR)/libgcc/multilib.tmp $(TARGET_SUBDIR)/libgcc/multilib.out; \ - fi; \ - else \ - mv $(TARGET_SUBDIR)/libgcc/multilib.tmp $(TARGET_SUBDIR)/libgcc/multilib.out; \ - fi; \ - test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ - $(NORMAL_TARGET_EXPORTS) \ - \ - CFLAGS="$(STAGE3_LIBCFLAGS) -g2 $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_LIBCFLAGS) -g2 $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ - echo Configuring stage b3g2 in $(TARGET_SUBDIR)/libgcc ; \ - $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ - cd $(TARGET_SUBDIR)/libgcc || exit 1; \ - case $(srcdir) in \ - /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ - *) topdir=`echo $(TARGET_SUBDIR)/libgcc/ | \ - sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ - esac; \ - srcdiroption="--srcdir=$${topdir}/libgcc"; \ - libsrcdir="$$s/libgcc"; \ - $(SHELL) $${libsrcdir}/configure \ - $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ - --target=${target_alias} $${srcdiroption} \ - --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE3_CONFIGURE_FLAGS) @endif target-libgcc-bootstrap .PHONY: configure-stage4-target-libgcc maybe-configure-stage4-target-libgcc @@ -45766,6 +44233,7 @@ configure-stage4-target-libgcc: @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ echo "Checking multilib configuration for libgcc..."; \ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ @@ -45780,9 +44248,10 @@ configure-stage4-target-libgcc: fi; \ test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ $(NORMAL_TARGET_EXPORTS) \ - \ - CFLAGS="$(STAGE4_CFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE4_CFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS; \ echo Configuring stage 4 in $(TARGET_SUBDIR)/libgcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ cd $(TARGET_SUBDIR)/libgcc || exit 1; \ @@ -45797,7 +44266,7 @@ configure-stage4-target-libgcc: $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGE4_CONFIGURE_FLAGS) @endif target-libgcc-bootstrap .PHONY: configure-stageprofile-target-libgcc maybe-configure-stageprofile-target-libgcc @@ -45809,6 +44278,7 @@ configure-stageprofile-target-libgcc: @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ echo "Checking multilib configuration for libgcc..."; \ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ @@ -45823,9 +44293,10 @@ configure-stageprofile-target-libgcc: fi; \ test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ $(NORMAL_TARGET_EXPORTS) \ - \ - CFLAGS="$(STAGE2_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE2_LIBCFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS; \ echo Configuring stage profile in $(TARGET_SUBDIR)/libgcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ cd $(TARGET_SUBDIR)/libgcc || exit 1; \ @@ -45840,7 +44311,7 @@ configure-stageprofile-target-libgcc: $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEprofile_CONFIGURE_FLAGS) @endif target-libgcc-bootstrap .PHONY: configure-stagefeedback-target-libgcc maybe-configure-stagefeedback-target-libgcc @@ -45852,6 +44323,7 @@ configure-stagefeedback-target-libgcc: @$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ echo "Checking multilib configuration for libgcc..."; \ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgcc/multilib.tmp 2> /dev/null ; \ if test -r $(TARGET_SUBDIR)/libgcc/multilib.out; then \ @@ -45866,9 +44338,10 @@ configure-stagefeedback-target-libgcc: fi; \ test ! -f $(TARGET_SUBDIR)/libgcc/Makefile || exit 0; \ $(NORMAL_TARGET_EXPORTS) \ - \ - CFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS; \ echo Configuring stage feedback in $(TARGET_SUBDIR)/libgcc ; \ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgcc ; \ cd $(TARGET_SUBDIR)/libgcc || exit 1; \ @@ -45883,7 +44356,7 @@ configure-stagefeedback-target-libgcc: $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ --target=${target_alias} $${srcdiroption} \ --with-build-libsubdir=$(HOST_SUBDIR) \ - @stage2_werror_flag@ + $(STAGEfeedback_CONFIGURE_FLAGS) @endif target-libgcc-bootstrap @@ -45921,13 +44394,18 @@ all-stage1-target-libgcc: configure-stage1-target-libgcc @[ $(current_stage) = stage1 ] || $(MAKE) stage1-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE1_TFLAGS)"; \ $(NORMAL_TARGET_EXPORTS) \ cd $(TARGET_SUBDIR)/libgcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE1_CFLAGS)" CXXFLAGS="$(STAGE1_CFLAGS)" \ - LIBCFLAGS="$(STAGE1_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE1_LIBCFLAGS)" $(EXTRA_TARGET_FLAGS) \ + CFLAGS="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_TARGET_FLAGS) \ + TFLAGS="$(STAGE1_TFLAGS)" \ $(TARGET-stage1-target-libgcc) maybe-clean-stage1-target-libgcc: clean-stage1-target-libgcc @@ -45957,14 +44435,19 @@ all-stage2-target-libgcc: configure-stage2-target-libgcc @[ $(current_stage) = stage2 ] || $(MAKE) stage2-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(NORMAL_TARGET_EXPORTS) \ \ cd $(TARGET_SUBDIR)/libgcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS)" CXXFLAGS="$(STAGE2_CFLAGS)" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_TARGET_FLAGS) \ + CFLAGS="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_TARGET_FLAGS) \ + TFLAGS="$(STAGE2_TFLAGS)" \ $(TARGET-stage2-target-libgcc) maybe-clean-stage2-target-libgcc: clean-stage2-target-libgcc @@ -45983,44 +44466,6 @@ clean-stage2-target-libgcc: @endif target-libgcc-bootstrap -.PHONY: all-stageb2g0-target-libgcc maybe-all-stageb2g0-target-libgcc -.PHONY: clean-stageb2g0-target-libgcc maybe-clean-stageb2g0-target-libgcc -maybe-all-stageb2g0-target-libgcc: -maybe-clean-stageb2g0-target-libgcc: -@if target-libgcc-bootstrap -maybe-all-stageb2g0-target-libgcc: all-stageb2g0-target-libgcc -all-stageb2g0: all-stageb2g0-target-libgcc -TARGET-stageb2g0-target-libgcc = $(TARGET-target-libgcc) -all-stageb2g0-target-libgcc: configure-stageb2g0-target-libgcc - @[ $(current_stage) = stageb2g0 ] || $(MAKE) stageb2g0-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - \ - cd $(TARGET_SUBDIR)/libgcc && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -g0" CXXFLAGS="$(STAGE2_CFLAGS) -g0" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS) -g0" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS) -g0" $(EXTRA_TARGET_FLAGS) \ - $(TARGET-stageb2g0-target-libgcc) - -maybe-clean-stageb2g0-target-libgcc: clean-stageb2g0-target-libgcc -clean-stageb2g0: clean-stageb2g0-target-libgcc -clean-stageb2g0-target-libgcc: - @if [ $(current_stage) = stageb2g0 ]; then \ - [ -f $(TARGET_SUBDIR)/libgcc/Makefile ] || exit 0; \ - else \ - [ -f $(TARGET_SUBDIR)/stageb2g0-libgcc/Makefile ] || exit 0; \ - $(MAKE) stageb2g0-start; \ - fi; \ - cd $(TARGET_SUBDIR)/libgcc && \ - $(MAKE) $(EXTRA_TARGET_FLAGS) \ - \ - clean -@endif target-libgcc-bootstrap - - .PHONY: all-stage3-target-libgcc maybe-all-stage3-target-libgcc .PHONY: clean-stage3-target-libgcc maybe-clean-stage3-target-libgcc maybe-all-stage3-target-libgcc: @@ -46033,14 +44478,19 @@ all-stage3-target-libgcc: configure-stage3-target-libgcc @[ $(current_stage) = stage3 ] || $(MAKE) stage3-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(NORMAL_TARGET_EXPORTS) \ \ cd $(TARGET_SUBDIR)/libgcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS)" CXXFLAGS="$(STAGE3_CFLAGS)" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS)" $(EXTRA_TARGET_FLAGS) \ + CFLAGS="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_TARGET_FLAGS) \ + TFLAGS="$(STAGE3_TFLAGS)" \ $(TARGET-stage3-target-libgcc) maybe-clean-stage3-target-libgcc: clean-stage3-target-libgcc @@ -46059,44 +44509,6 @@ clean-stage3-target-libgcc: @endif target-libgcc-bootstrap -.PHONY: all-stageb3g2-target-libgcc maybe-all-stageb3g2-target-libgcc -.PHONY: clean-stageb3g2-target-libgcc maybe-clean-stageb3g2-target-libgcc -maybe-all-stageb3g2-target-libgcc: -maybe-clean-stageb3g2-target-libgcc: -@if target-libgcc-bootstrap -maybe-all-stageb3g2-target-libgcc: all-stageb3g2-target-libgcc -all-stageb3g2: all-stageb3g2-target-libgcc -TARGET-stageb3g2-target-libgcc = $(TARGET-target-libgcc) -all-stageb3g2-target-libgcc: configure-stageb3g2-target-libgcc - @[ $(current_stage) = stageb3g2 ] || $(MAKE) stageb3g2-start - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(NORMAL_TARGET_EXPORTS) \ - \ - cd $(TARGET_SUBDIR)/libgcc && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -g2" CXXFLAGS="$(STAGE3_CFLAGS) -g2" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -g2" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -g2" $(EXTRA_TARGET_FLAGS) \ - $(TARGET-stageb3g2-target-libgcc) - -maybe-clean-stageb3g2-target-libgcc: clean-stageb3g2-target-libgcc -clean-stageb3g2: clean-stageb3g2-target-libgcc -clean-stageb3g2-target-libgcc: - @if [ $(current_stage) = stageb3g2 ]; then \ - [ -f $(TARGET_SUBDIR)/libgcc/Makefile ] || exit 0; \ - else \ - [ -f $(TARGET_SUBDIR)/stageb3g2-libgcc/Makefile ] || exit 0; \ - $(MAKE) stageb3g2-start; \ - fi; \ - cd $(TARGET_SUBDIR)/libgcc && \ - $(MAKE) $(EXTRA_TARGET_FLAGS) \ - \ - clean -@endif target-libgcc-bootstrap - - .PHONY: all-stage4-target-libgcc maybe-all-stage4-target-libgcc .PHONY: clean-stage4-target-libgcc maybe-clean-stage4-target-libgcc maybe-all-stage4-target-libgcc: @@ -46109,14 +44521,19 @@ all-stage4-target-libgcc: configure-stage4-target-libgcc @[ $(current_stage) = stage4 ] || $(MAKE) stage4-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(NORMAL_TARGET_EXPORTS) \ \ cd $(TARGET_SUBDIR)/libgcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE4_CFLAGS)" CXXFLAGS="$(STAGE4_CFLAGS)" \ - LIBCFLAGS="$(STAGE4_CFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE4_CFLAGS)" $(EXTRA_TARGET_FLAGS) \ + CFLAGS="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_TARGET_FLAGS) \ + TFLAGS="$(STAGE4_TFLAGS)" \ $(TARGET-stage4-target-libgcc) maybe-clean-stage4-target-libgcc: clean-stage4-target-libgcc @@ -46147,14 +44564,19 @@ all-stageprofile-target-libgcc: configure-stageprofile-target-libgcc @[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEprofile_TFLAGS)"; \ $(NORMAL_TARGET_EXPORTS) \ \ cd $(TARGET_SUBDIR)/libgcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" CXXFLAGS="$(STAGE2_CFLAGS) -fprofile-generate" \ - LIBCFLAGS="$(STAGE2_LIBCFLAGS)" \ - CFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" \ - CXXFLAGS_FOR_TARGET="$(STAGE2_LIBCFLAGS)" $(EXTRA_TARGET_FLAGS) \ + CFLAGS="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_TARGET_FLAGS) \ + TFLAGS="$(STAGEprofile_TFLAGS)" \ $(TARGET-stageprofile-target-libgcc) maybe-clean-stageprofile-target-libgcc: clean-stageprofile-target-libgcc @@ -46185,14 +44607,19 @@ all-stagefeedback-target-libgcc: configure-stagefeedback-target-libgcc @[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(NORMAL_TARGET_EXPORTS) \ \ cd $(TARGET_SUBDIR)/libgcc && \ $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="$(STAGE3_CFLAGS) -fprofile-use" CXXFLAGS="$(STAGE3_CFLAGS) -fprofile-use" \ - LIBCFLAGS="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" \ - CXXFLAGS_FOR_TARGET="$(STAGE3_LIBCFLAGS) -fprofile-use" $(EXTRA_TARGET_FLAGS) \ + CFLAGS="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + $(EXTRA_TARGET_FLAGS) \ + TFLAGS="$(STAGEfeedback_TFLAGS)" \ $(TARGET-stagefeedback-target-libgcc) maybe-clean-stagefeedback-target-libgcc: clean-stagefeedback-target-libgcc @@ -54179,6 +52606,7 @@ bootstrap2: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target bootstrap2-lean: @@ -54189,6 +52617,7 @@ bootstrap2-lean: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE2_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target @@ -54204,274 +52633,6 @@ distclean-stage2:: @endif gcc-bootstrap -.PHONY: stageb2g0-start stageb2g0-end - -stageb2g0-start:: - @: $(MAKE); $(stage); \ - echo stageb2g0 > stage_current ; \ - echo stageb2g0 > stage_last; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) -@if bfd - @cd $(HOST_SUBDIR); [ -d stageb2g0-bfd ] || \ - mkdir stageb2g0-bfd; \ - mv stageb2g0-bfd bfd ; \ - mv stage1-bfd prev-bfd || test -f stage1-lean -@endif bfd -@if opcodes - @cd $(HOST_SUBDIR); [ -d stageb2g0-opcodes ] || \ - mkdir stageb2g0-opcodes; \ - mv stageb2g0-opcodes opcodes ; \ - mv stage1-opcodes prev-opcodes || test -f stage1-lean -@endif opcodes -@if binutils - @cd $(HOST_SUBDIR); [ -d stageb2g0-binutils ] || \ - mkdir stageb2g0-binutils; \ - mv stageb2g0-binutils binutils ; \ - mv stage1-binutils prev-binutils || test -f stage1-lean -@endif binutils -@if gas - @cd $(HOST_SUBDIR); [ -d stageb2g0-gas ] || \ - mkdir stageb2g0-gas; \ - mv stageb2g0-gas gas ; \ - mv stage1-gas prev-gas || test -f stage1-lean -@endif gas -@if gcc - @cd $(HOST_SUBDIR); [ -d stageb2g0-gcc ] || \ - mkdir stageb2g0-gcc; \ - mv stageb2g0-gcc gcc ; \ - mv stage1-gcc prev-gcc || test -f stage1-lean -@endif gcc -@if gmp - @cd $(HOST_SUBDIR); [ -d stageb2g0-gmp ] || \ - mkdir stageb2g0-gmp; \ - mv stageb2g0-gmp gmp ; \ - mv stage1-gmp prev-gmp || test -f stage1-lean -@endif gmp -@if mpfr - @cd $(HOST_SUBDIR); [ -d stageb2g0-mpfr ] || \ - mkdir stageb2g0-mpfr; \ - mv stageb2g0-mpfr mpfr ; \ - mv stage1-mpfr prev-mpfr || test -f stage1-lean -@endif mpfr -@if ppl - @cd $(HOST_SUBDIR); [ -d stageb2g0-ppl ] || \ - mkdir stageb2g0-ppl; \ - mv stageb2g0-ppl ppl ; \ - mv stage1-ppl prev-ppl || test -f stage1-lean -@endif ppl -@if cloog - @cd $(HOST_SUBDIR); [ -d stageb2g0-cloog ] || \ - mkdir stageb2g0-cloog; \ - mv stageb2g0-cloog cloog ; \ - mv stage1-cloog prev-cloog || test -f stage1-lean -@endif cloog -@if gold - @cd $(HOST_SUBDIR); [ -d stageb2g0-gold ] || \ - mkdir stageb2g0-gold; \ - mv stageb2g0-gold gold ; \ - mv stage1-gold prev-gold || test -f stage1-lean -@endif gold -@if intl - @cd $(HOST_SUBDIR); [ -d stageb2g0-intl ] || \ - mkdir stageb2g0-intl; \ - mv stageb2g0-intl intl ; \ - mv stage1-intl prev-intl || test -f stage1-lean -@endif intl -@if ld - @cd $(HOST_SUBDIR); [ -d stageb2g0-ld ] || \ - mkdir stageb2g0-ld; \ - mv stageb2g0-ld ld ; \ - mv stage1-ld prev-ld || test -f stage1-lean -@endif ld -@if libcpp - @cd $(HOST_SUBDIR); [ -d stageb2g0-libcpp ] || \ - mkdir stageb2g0-libcpp; \ - mv stageb2g0-libcpp libcpp ; \ - mv stage1-libcpp prev-libcpp || test -f stage1-lean -@endif libcpp -@if libdecnumber - @cd $(HOST_SUBDIR); [ -d stageb2g0-libdecnumber ] || \ - mkdir stageb2g0-libdecnumber; \ - mv stageb2g0-libdecnumber libdecnumber ; \ - mv stage1-libdecnumber prev-libdecnumber || test -f stage1-lean -@endif libdecnumber -@if libiberty - @cd $(HOST_SUBDIR); [ -d stageb2g0-libiberty ] || \ - mkdir stageb2g0-libiberty; \ - mv stageb2g0-libiberty libiberty ; \ - mv stage1-libiberty prev-libiberty || test -f stage1-lean -@endif libiberty -@if zlib - @cd $(HOST_SUBDIR); [ -d stageb2g0-zlib ] || \ - mkdir stageb2g0-zlib; \ - mv stageb2g0-zlib zlib ; \ - mv stage1-zlib prev-zlib || test -f stage1-lean -@endif zlib - @[ -d stageb2g0-$(TARGET_SUBDIR) ] || \ - mkdir stageb2g0-$(TARGET_SUBDIR); \ - mv stageb2g0-$(TARGET_SUBDIR) $(TARGET_SUBDIR) ; \ - mv stage1-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stage1-lean - -stageb2g0-end:: -@if bfd - @if test -d $(HOST_SUBDIR)/bfd ; then \ - cd $(HOST_SUBDIR); mv bfd stageb2g0-bfd ; \ - mv prev-bfd stage1-bfd ; : ; \ - fi -@endif bfd -@if opcodes - @if test -d $(HOST_SUBDIR)/opcodes ; then \ - cd $(HOST_SUBDIR); mv opcodes stageb2g0-opcodes ; \ - mv prev-opcodes stage1-opcodes ; : ; \ - fi -@endif opcodes -@if binutils - @if test -d $(HOST_SUBDIR)/binutils ; then \ - cd $(HOST_SUBDIR); mv binutils stageb2g0-binutils ; \ - mv prev-binutils stage1-binutils ; : ; \ - fi -@endif binutils -@if gas - @if test -d $(HOST_SUBDIR)/gas ; then \ - cd $(HOST_SUBDIR); mv gas stageb2g0-gas ; \ - mv prev-gas stage1-gas ; : ; \ - fi -@endif gas -@if gcc - @if test -d $(HOST_SUBDIR)/gcc ; then \ - cd $(HOST_SUBDIR); mv gcc stageb2g0-gcc ; \ - mv prev-gcc stage1-gcc ; : ; \ - fi -@endif gcc -@if gmp - @if test -d $(HOST_SUBDIR)/gmp ; then \ - cd $(HOST_SUBDIR); mv gmp stageb2g0-gmp ; \ - mv prev-gmp stage1-gmp ; : ; \ - fi -@endif gmp -@if mpfr - @if test -d $(HOST_SUBDIR)/mpfr ; then \ - cd $(HOST_SUBDIR); mv mpfr stageb2g0-mpfr ; \ - mv prev-mpfr stage1-mpfr ; : ; \ - fi -@endif mpfr -@if ppl - @if test -d $(HOST_SUBDIR)/ppl ; then \ - cd $(HOST_SUBDIR); mv ppl stageb2g0-ppl ; \ - mv prev-ppl stage1-ppl ; : ; \ - fi -@endif ppl -@if cloog - @if test -d $(HOST_SUBDIR)/cloog ; then \ - cd $(HOST_SUBDIR); mv cloog stageb2g0-cloog ; \ - mv prev-cloog stage1-cloog ; : ; \ - fi -@endif cloog -@if gold - @if test -d $(HOST_SUBDIR)/gold ; then \ - cd $(HOST_SUBDIR); mv gold stageb2g0-gold ; \ - mv prev-gold stage1-gold ; : ; \ - fi -@endif gold -@if intl - @if test -d $(HOST_SUBDIR)/intl ; then \ - cd $(HOST_SUBDIR); mv intl stageb2g0-intl ; \ - mv prev-intl stage1-intl ; : ; \ - fi -@endif intl -@if ld - @if test -d $(HOST_SUBDIR)/ld ; then \ - cd $(HOST_SUBDIR); mv ld stageb2g0-ld ; \ - mv prev-ld stage1-ld ; : ; \ - fi -@endif ld -@if libcpp - @if test -d $(HOST_SUBDIR)/libcpp ; then \ - cd $(HOST_SUBDIR); mv libcpp stageb2g0-libcpp ; \ - mv prev-libcpp stage1-libcpp ; : ; \ - fi -@endif libcpp -@if libdecnumber - @if test -d $(HOST_SUBDIR)/libdecnumber ; then \ - cd $(HOST_SUBDIR); mv libdecnumber stageb2g0-libdecnumber ; \ - mv prev-libdecnumber stage1-libdecnumber ; : ; \ - fi -@endif libdecnumber -@if libiberty - @if test -d $(HOST_SUBDIR)/libiberty ; then \ - cd $(HOST_SUBDIR); mv libiberty stageb2g0-libiberty ; \ - mv prev-libiberty stage1-libiberty ; : ; \ - fi -@endif libiberty -@if zlib - @if test -d $(HOST_SUBDIR)/zlib ; then \ - cd $(HOST_SUBDIR); mv zlib stageb2g0-zlib ; \ - mv prev-zlib stage1-zlib ; : ; \ - fi -@endif zlib - @if test -d $(TARGET_SUBDIR) ; then \ - mv $(TARGET_SUBDIR) stageb2g0-$(TARGET_SUBDIR) ; \ - mv prev-$(TARGET_SUBDIR) stage1-$(TARGET_SUBDIR) ; : ; \ - fi - rm -f stage_current - -# Bubble a bug fix through all the stages up to stage b2g0. They are -# remade, but not reconfigured. The next stage (if any) will not be -# reconfigured either. -.PHONY: stageb2g0-bubble -stageb2g0-bubble:: stage1-bubble - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - if test -f stageb2g0-lean || test -f stage1-lean ; then \ - echo Skipping rebuild of stageb2g0 ; \ - else \ - $(MAKE) stageb2g0-start; \ - $(MAKE) $(RECURSE_FLAGS_TO_PASS) all-stageb2g0; \ - fi - -.PHONY: all-stageb2g0 clean-stageb2g0 -do-clean: clean-stageb2g0 - -# FIXME: Will not need to be conditional when toplevel bootstrap is the -# only possibility, but now it conflicts with no-bootstrap rules -@if gcc-bootstrap - - - -.PHONY: bootstrap2-debug bootstrap2-debug-lean -bootstrap2-debug: - echo stageb2g0 > stage_final - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(RECURSE_FLAGS_TO_PASS) stageb2g0-bubble - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target - -bootstrap2-debug-lean: - echo stageb2g0 > stage_final - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(RECURSE_FLAGS_TO_PASS) LEAN=: stageb2g0-bubble - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target - - -# Rules to wipe a stage and all the following ones, also used for cleanstrap -distclean-stage1:: distclean-stageb2g0 -.PHONY: distclean-stageb2g0 -distclean-stageb2g0:: - @: $(MAKE); $(stage) - @test "`cat stage_last`" != stageb2g0 || rm -f stage_last - rm -rf stageb2g0-* - - -@endif gcc-bootstrap - - .PHONY: stage3-start stage3-end stage3-start:: @@ -54758,6 +52919,7 @@ bootstrap: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target bootstrap-lean: @@ -54768,6 +52930,7 @@ bootstrap-lean: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target @@ -54789,328 +52952,7 @@ cleanstrap: do-distclean local-clean @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target - -@endif gcc-bootstrap - - -.PHONY: stageb3g2-start stageb3g2-end - -stageb3g2-start:: - @: $(MAKE); $(stage); \ - echo stageb3g2 > stage_current ; \ - echo stageb3g2 > stage_last; \ - $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR) -@if bfd - @cd $(HOST_SUBDIR); [ -d stageb3g2-bfd ] || \ - mkdir stageb3g2-bfd; \ - mv stageb3g2-bfd bfd ; \ - mv stageb2g0-bfd prev-bfd || test -f stageb2g0-lean -@endif bfd -@if opcodes - @cd $(HOST_SUBDIR); [ -d stageb3g2-opcodes ] || \ - mkdir stageb3g2-opcodes; \ - mv stageb3g2-opcodes opcodes ; \ - mv stageb2g0-opcodes prev-opcodes || test -f stageb2g0-lean -@endif opcodes -@if binutils - @cd $(HOST_SUBDIR); [ -d stageb3g2-binutils ] || \ - mkdir stageb3g2-binutils; \ - mv stageb3g2-binutils binutils ; \ - mv stageb2g0-binutils prev-binutils || test -f stageb2g0-lean -@endif binutils -@if gas - @cd $(HOST_SUBDIR); [ -d stageb3g2-gas ] || \ - mkdir stageb3g2-gas; \ - mv stageb3g2-gas gas ; \ - mv stageb2g0-gas prev-gas || test -f stageb2g0-lean -@endif gas -@if gcc - @cd $(HOST_SUBDIR); [ -d stageb3g2-gcc ] || \ - mkdir stageb3g2-gcc; \ - mv stageb3g2-gcc gcc ; \ - mv stageb2g0-gcc prev-gcc || test -f stageb2g0-lean -@endif gcc -@if gmp - @cd $(HOST_SUBDIR); [ -d stageb3g2-gmp ] || \ - mkdir stageb3g2-gmp; \ - mv stageb3g2-gmp gmp ; \ - mv stageb2g0-gmp prev-gmp || test -f stageb2g0-lean -@endif gmp -@if mpfr - @cd $(HOST_SUBDIR); [ -d stageb3g2-mpfr ] || \ - mkdir stageb3g2-mpfr; \ - mv stageb3g2-mpfr mpfr ; \ - mv stageb2g0-mpfr prev-mpfr || test -f stageb2g0-lean -@endif mpfr -@if ppl - @cd $(HOST_SUBDIR); [ -d stageb3g2-ppl ] || \ - mkdir stageb3g2-ppl; \ - mv stageb3g2-ppl ppl ; \ - mv stageb2g0-ppl prev-ppl || test -f stageb2g0-lean -@endif ppl -@if cloog - @cd $(HOST_SUBDIR); [ -d stageb3g2-cloog ] || \ - mkdir stageb3g2-cloog; \ - mv stageb3g2-cloog cloog ; \ - mv stageb2g0-cloog prev-cloog || test -f stageb2g0-lean -@endif cloog -@if gold - @cd $(HOST_SUBDIR); [ -d stageb3g2-gold ] || \ - mkdir stageb3g2-gold; \ - mv stageb3g2-gold gold ; \ - mv stageb2g0-gold prev-gold || test -f stageb2g0-lean -@endif gold -@if intl - @cd $(HOST_SUBDIR); [ -d stageb3g2-intl ] || \ - mkdir stageb3g2-intl; \ - mv stageb3g2-intl intl ; \ - mv stageb2g0-intl prev-intl || test -f stageb2g0-lean -@endif intl -@if ld - @cd $(HOST_SUBDIR); [ -d stageb3g2-ld ] || \ - mkdir stageb3g2-ld; \ - mv stageb3g2-ld ld ; \ - mv stageb2g0-ld prev-ld || test -f stageb2g0-lean -@endif ld -@if libcpp - @cd $(HOST_SUBDIR); [ -d stageb3g2-libcpp ] || \ - mkdir stageb3g2-libcpp; \ - mv stageb3g2-libcpp libcpp ; \ - mv stageb2g0-libcpp prev-libcpp || test -f stageb2g0-lean -@endif libcpp -@if libdecnumber - @cd $(HOST_SUBDIR); [ -d stageb3g2-libdecnumber ] || \ - mkdir stageb3g2-libdecnumber; \ - mv stageb3g2-libdecnumber libdecnumber ; \ - mv stageb2g0-libdecnumber prev-libdecnumber || test -f stageb2g0-lean -@endif libdecnumber -@if libiberty - @cd $(HOST_SUBDIR); [ -d stageb3g2-libiberty ] || \ - mkdir stageb3g2-libiberty; \ - mv stageb3g2-libiberty libiberty ; \ - mv stageb2g0-libiberty prev-libiberty || test -f stageb2g0-lean -@endif libiberty -@if zlib - @cd $(HOST_SUBDIR); [ -d stageb3g2-zlib ] || \ - mkdir stageb3g2-zlib; \ - mv stageb3g2-zlib zlib ; \ - mv stageb2g0-zlib prev-zlib || test -f stageb2g0-lean -@endif zlib - @[ -d stageb3g2-$(TARGET_SUBDIR) ] || \ - mkdir stageb3g2-$(TARGET_SUBDIR); \ - mv stageb3g2-$(TARGET_SUBDIR) $(TARGET_SUBDIR) ; \ - mv stageb2g0-$(TARGET_SUBDIR) prev-$(TARGET_SUBDIR) || test -f stageb2g0-lean - -stageb3g2-end:: -@if bfd - @if test -d $(HOST_SUBDIR)/bfd ; then \ - cd $(HOST_SUBDIR); mv bfd stageb3g2-bfd ; \ - mv prev-bfd stageb2g0-bfd ; : ; \ - fi -@endif bfd -@if opcodes - @if test -d $(HOST_SUBDIR)/opcodes ; then \ - cd $(HOST_SUBDIR); mv opcodes stageb3g2-opcodes ; \ - mv prev-opcodes stageb2g0-opcodes ; : ; \ - fi -@endif opcodes -@if binutils - @if test -d $(HOST_SUBDIR)/binutils ; then \ - cd $(HOST_SUBDIR); mv binutils stageb3g2-binutils ; \ - mv prev-binutils stageb2g0-binutils ; : ; \ - fi -@endif binutils -@if gas - @if test -d $(HOST_SUBDIR)/gas ; then \ - cd $(HOST_SUBDIR); mv gas stageb3g2-gas ; \ - mv prev-gas stageb2g0-gas ; : ; \ - fi -@endif gas -@if gcc - @if test -d $(HOST_SUBDIR)/gcc ; then \ - cd $(HOST_SUBDIR); mv gcc stageb3g2-gcc ; \ - mv prev-gcc stageb2g0-gcc ; : ; \ - fi -@endif gcc -@if gmp - @if test -d $(HOST_SUBDIR)/gmp ; then \ - cd $(HOST_SUBDIR); mv gmp stageb3g2-gmp ; \ - mv prev-gmp stageb2g0-gmp ; : ; \ - fi -@endif gmp -@if mpfr - @if test -d $(HOST_SUBDIR)/mpfr ; then \ - cd $(HOST_SUBDIR); mv mpfr stageb3g2-mpfr ; \ - mv prev-mpfr stageb2g0-mpfr ; : ; \ - fi -@endif mpfr -@if ppl - @if test -d $(HOST_SUBDIR)/ppl ; then \ - cd $(HOST_SUBDIR); mv ppl stageb3g2-ppl ; \ - mv prev-ppl stageb2g0-ppl ; : ; \ - fi -@endif ppl -@if cloog - @if test -d $(HOST_SUBDIR)/cloog ; then \ - cd $(HOST_SUBDIR); mv cloog stageb3g2-cloog ; \ - mv prev-cloog stageb2g0-cloog ; : ; \ - fi -@endif cloog -@if gold - @if test -d $(HOST_SUBDIR)/gold ; then \ - cd $(HOST_SUBDIR); mv gold stageb3g2-gold ; \ - mv prev-gold stageb2g0-gold ; : ; \ - fi -@endif gold -@if intl - @if test -d $(HOST_SUBDIR)/intl ; then \ - cd $(HOST_SUBDIR); mv intl stageb3g2-intl ; \ - mv prev-intl stageb2g0-intl ; : ; \ - fi -@endif intl -@if ld - @if test -d $(HOST_SUBDIR)/ld ; then \ - cd $(HOST_SUBDIR); mv ld stageb3g2-ld ; \ - mv prev-ld stageb2g0-ld ; : ; \ - fi -@endif ld -@if libcpp - @if test -d $(HOST_SUBDIR)/libcpp ; then \ - cd $(HOST_SUBDIR); mv libcpp stageb3g2-libcpp ; \ - mv prev-libcpp stageb2g0-libcpp ; : ; \ - fi -@endif libcpp -@if libdecnumber - @if test -d $(HOST_SUBDIR)/libdecnumber ; then \ - cd $(HOST_SUBDIR); mv libdecnumber stageb3g2-libdecnumber ; \ - mv prev-libdecnumber stageb2g0-libdecnumber ; : ; \ - fi -@endif libdecnumber -@if libiberty - @if test -d $(HOST_SUBDIR)/libiberty ; then \ - cd $(HOST_SUBDIR); mv libiberty stageb3g2-libiberty ; \ - mv prev-libiberty stageb2g0-libiberty ; : ; \ - fi -@endif libiberty -@if zlib - @if test -d $(HOST_SUBDIR)/zlib ; then \ - cd $(HOST_SUBDIR); mv zlib stageb3g2-zlib ; \ - mv prev-zlib stageb2g0-zlib ; : ; \ - fi -@endif zlib - @if test -d $(TARGET_SUBDIR) ; then \ - mv $(TARGET_SUBDIR) stageb3g2-$(TARGET_SUBDIR) ; \ - mv prev-$(TARGET_SUBDIR) stageb2g0-$(TARGET_SUBDIR) ; : ; \ - fi - rm -f stage_current - -# Bubble a bug fix through all the stages up to stage b3g2. They are -# remade, but not reconfigured. The next stage (if any) will not be -# reconfigured either. -.PHONY: stageb3g2-bubble -stageb3g2-bubble:: stageb2g0-bubble - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - if test -f stageb3g2-lean || test -f stageb2g0-lean ; then \ - echo Skipping rebuild of stageb3g2 ; \ - else \ - $(MAKE) stageb3g2-start; \ - if $(LEAN); then \ - rm -rf stage1-* ; \ - $(STAMP) stage1-lean ; \ - fi; \ - $(MAKE) $(RECURSE_FLAGS_TO_PASS) all-stageb3g2; \ - fi - $(MAKE) $(RECURSE_FLAGS_TO_PASS) compare-debug - -.PHONY: all-stageb3g2 clean-stageb3g2 -do-clean: clean-stageb3g2 - -# FIXME: Will not need to be conditional when toplevel bootstrap is the -# only possibility, but now it conflicts with no-bootstrap rules -@if gcc-bootstrap - -compare-debug: - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - if test -f stageb2g0-lean; then \ - echo Cannot compare object files as stage b2g0 was deleted. ; \ - exit 0 ; \ - fi; \ - : $(MAKE); $(stage); \ - rm -f .bad_compare ; \ - echo Comparing stages b2g0 and b3g2 ; \ - cd stageb3g2-gcc; \ - files=`find . -name "*$(objext)" -print` ; \ - cd .. ; \ - for file in $${files} ; do \ - f1=$$r/stageb2g0-gcc/$$file; f2=$$r/stageb3g2-gcc/$$file; \ - $(do-compare-debug) > /dev/null 2>&1; \ - if test $$? -eq 1; then \ - case $$file in \ - ./cc*-checksum$(objext) | ./libgcc/* ) \ - echo warning: $$file differs ;; \ - *) \ - echo $$file differs >> .bad_compare ;; \ - esac ; \ - fi ; \ - done ; \ - if [ -f .bad_compare ]; then \ - echo "Bootstrap comparison failure!"; \ - cat .bad_compare; \ - exit 1; \ - else \ - echo Comparison successful.; \ - fi ; \ - $(STAMP) compare-debug - if $(LEAN); then \ - rm -rf stageb2g0-*; \ - $(STAMP) stageb2g0-lean; \ - fi - - - -.PHONY: bootstrap-debug bootstrap-debug-lean -bootstrap-debug: - echo stageb3g2 > stage_final - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(RECURSE_FLAGS_TO_PASS) stageb3g2-bubble - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target - -bootstrap-debug-lean: - echo stageb3g2 > stage_final - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(RECURSE_FLAGS_TO_PASS) LEAN=: stageb3g2-bubble - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target - - -# Rules to wipe a stage and all the following ones, also used for cleanstrap -distclean-stageb2g0:: distclean-stageb3g2 -.PHONY: distclean-stageb3g2 -distclean-stageb3g2:: - @: $(MAKE); $(stage) - @test "`cat stage_last`" != stageb3g2 || rm -f stage_last - rm -rf stageb3g2-* compare-debug - - -.PHONY: cleanstrap-debug -cleanstrap-debug: do-distclean local-clean - echo stageb3g2 > stage_final - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - $(MAKE) $(RECURSE_FLAGS_TO_PASS) stageb3g2-bubble - @: $(MAKE); $(unstage) - @r=`${PWD_COMMAND}`; export r; \ - s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE3_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target @endif gcc-bootstrap @@ -55402,6 +53244,7 @@ bootstrap4: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target bootstrap4-lean: @@ -55412,6 +53255,7 @@ bootstrap4-lean: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE4_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target @@ -55917,6 +53761,7 @@ profiledbootstrap: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target profiledbootstrap-lean: @@ -55927,6 +53772,7 @@ profiledbootstrap-lean: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGEfeedback_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target @@ -55974,7 +53820,7 @@ stage_current: .PHONY: restrap restrap:: @: $(MAKE); $(stage) - rm -rf stage1-$(TARGET_SUBDIR) stage2-* stageb2g0-* stage3-* stageb3g2-* stage4-* stageprofile-* stagefeedback-* + rm -rf stage1-$(TARGET_SUBDIR) stage2-* stage3-* stage4-* stageprofile-* stagefeedback-* restrap:: all @endif gcc-bootstrap @@ -55997,9 +53843,7 @@ configure-target-libssp: stage_last configure-target-newlib: stage_last configure-stage1-target-libgcc: maybe-all-stage1-gcc configure-stage2-target-libgcc: maybe-all-stage2-gcc -configure-stageb2g0-target-libgcc: maybe-all-stageb2g0-gcc configure-stage3-target-libgcc: maybe-all-stage3-gcc -configure-stageb3g2-target-libgcc: maybe-all-stageb3g2-gcc configure-stage4-target-libgcc: maybe-all-stage4-gcc configure-stageprofile-target-libgcc: maybe-all-stageprofile-gcc configure-stagefeedback-target-libgcc: maybe-all-stagefeedback-gcc @@ -56076,9 +53920,7 @@ configure-gcc: maybe-configure-intl configure-stage1-gcc: maybe-configure-stage1-intl configure-stage2-gcc: maybe-configure-stage2-intl -configure-stageb2g0-gcc: maybe-configure-stageb2g0-intl configure-stage3-gcc: maybe-configure-stage3-intl -configure-stageb3g2-gcc: maybe-configure-stageb3g2-intl configure-stage4-gcc: maybe-configure-stage4-intl configure-stageprofile-gcc: maybe-configure-stageprofile-intl configure-stagefeedback-gcc: maybe-configure-stagefeedback-intl @@ -56086,9 +53928,7 @@ configure-gcc: maybe-all-binutils configure-stage1-gcc: maybe-all-stage1-binutils configure-stage2-gcc: maybe-all-stage2-binutils -configure-stageb2g0-gcc: maybe-all-stageb2g0-binutils configure-stage3-gcc: maybe-all-stage3-binutils -configure-stageb3g2-gcc: maybe-all-stageb3g2-binutils configure-stage4-gcc: maybe-all-stage4-binutils configure-stageprofile-gcc: maybe-all-stageprofile-binutils configure-stagefeedback-gcc: maybe-all-stagefeedback-binutils @@ -56096,9 +53936,7 @@ configure-gcc: maybe-all-gas configure-stage1-gcc: maybe-all-stage1-gas configure-stage2-gcc: maybe-all-stage2-gas -configure-stageb2g0-gcc: maybe-all-stageb2g0-gas configure-stage3-gcc: maybe-all-stage3-gas -configure-stageb3g2-gcc: maybe-all-stageb3g2-gas configure-stage4-gcc: maybe-all-stage4-gas configure-stageprofile-gcc: maybe-all-stageprofile-gas configure-stagefeedback-gcc: maybe-all-stagefeedback-gas @@ -56106,9 +53944,7 @@ configure-gcc: maybe-all-ld configure-stage1-gcc: maybe-all-stage1-ld configure-stage2-gcc: maybe-all-stage2-ld -configure-stageb2g0-gcc: maybe-all-stageb2g0-ld configure-stage3-gcc: maybe-all-stage3-ld -configure-stageb3g2-gcc: maybe-all-stageb3g2-ld configure-stage4-gcc: maybe-all-stage4-ld configure-stageprofile-gcc: maybe-all-stageprofile-ld configure-stagefeedback-gcc: maybe-all-stagefeedback-ld @@ -56116,9 +53952,7 @@ configure-gcc: maybe-all-gold configure-stage1-gcc: maybe-all-stage1-gold configure-stage2-gcc: maybe-all-stage2-gold -configure-stageb2g0-gcc: maybe-all-stageb2g0-gold configure-stage3-gcc: maybe-all-stage3-gold -configure-stageb3g2-gcc: maybe-all-stageb3g2-gold configure-stage4-gcc: maybe-all-stage4-gold configure-stageprofile-gcc: maybe-all-stageprofile-gold configure-stagefeedback-gcc: maybe-all-stagefeedback-gold @@ -56126,9 +53960,7 @@ all-gcc: all-libiberty all-stage1-gcc: all-stage1-libiberty all-stage2-gcc: all-stage2-libiberty -all-stageb2g0-gcc: all-stageb2g0-libiberty all-stage3-gcc: all-stage3-libiberty -all-stageb3g2-gcc: all-stageb3g2-libiberty all-stage4-gcc: all-stage4-libiberty all-stageprofile-gcc: all-stageprofile-libiberty all-stagefeedback-gcc: all-stagefeedback-libiberty @@ -56136,9 +53968,7 @@ all-gcc: maybe-all-gmp all-stage1-gcc: maybe-all-stage1-gmp all-stage2-gcc: maybe-all-stage2-gmp -all-stageb2g0-gcc: maybe-all-stageb2g0-gmp all-stage3-gcc: maybe-all-stage3-gmp -all-stageb3g2-gcc: maybe-all-stageb3g2-gmp all-stage4-gcc: maybe-all-stage4-gmp all-stageprofile-gcc: maybe-all-stageprofile-gmp all-stagefeedback-gcc: maybe-all-stagefeedback-gmp @@ -56146,9 +53976,7 @@ all-gcc: maybe-all-intl all-stage1-gcc: maybe-all-stage1-intl all-stage2-gcc: maybe-all-stage2-intl -all-stageb2g0-gcc: maybe-all-stageb2g0-intl all-stage3-gcc: maybe-all-stage3-intl -all-stageb3g2-gcc: maybe-all-stageb3g2-intl all-stage4-gcc: maybe-all-stage4-intl all-stageprofile-gcc: maybe-all-stageprofile-intl all-stagefeedback-gcc: maybe-all-stagefeedback-intl @@ -56156,9 +53984,7 @@ all-gcc: maybe-all-mpfr all-stage1-gcc: maybe-all-stage1-mpfr all-stage2-gcc: maybe-all-stage2-mpfr -all-stageb2g0-gcc: maybe-all-stageb2g0-mpfr all-stage3-gcc: maybe-all-stage3-mpfr -all-stageb3g2-gcc: maybe-all-stageb3g2-mpfr all-stage4-gcc: maybe-all-stage4-mpfr all-stageprofile-gcc: maybe-all-stageprofile-mpfr all-stagefeedback-gcc: maybe-all-stagefeedback-mpfr @@ -56166,9 +53992,7 @@ all-gcc: maybe-all-ppl all-stage1-gcc: maybe-all-stage1-ppl all-stage2-gcc: maybe-all-stage2-ppl -all-stageb2g0-gcc: maybe-all-stageb2g0-ppl all-stage3-gcc: maybe-all-stage3-ppl -all-stageb3g2-gcc: maybe-all-stageb3g2-ppl all-stage4-gcc: maybe-all-stage4-ppl all-stageprofile-gcc: maybe-all-stageprofile-ppl all-stagefeedback-gcc: maybe-all-stagefeedback-ppl @@ -56176,9 +54000,7 @@ all-gcc: maybe-all-cloog all-stage1-gcc: maybe-all-stage1-cloog all-stage2-gcc: maybe-all-stage2-cloog -all-stageb2g0-gcc: maybe-all-stageb2g0-cloog all-stage3-gcc: maybe-all-stage3-cloog -all-stageb3g2-gcc: maybe-all-stageb3g2-cloog all-stage4-gcc: maybe-all-stage4-cloog all-stageprofile-gcc: maybe-all-stageprofile-cloog all-stagefeedback-gcc: maybe-all-stagefeedback-cloog @@ -56186,9 +54008,7 @@ all-gcc: maybe-all-build-texinfo all-stage1-gcc: maybe-all-build-texinfo all-stage2-gcc: maybe-all-build-texinfo -all-stageb2g0-gcc: maybe-all-build-texinfo all-stage3-gcc: maybe-all-build-texinfo -all-stageb3g2-gcc: maybe-all-build-texinfo all-stage4-gcc: maybe-all-build-texinfo all-stageprofile-gcc: maybe-all-build-texinfo all-stagefeedback-gcc: maybe-all-build-texinfo @@ -56196,9 +54016,7 @@ all-gcc: maybe-all-build-bison all-stage1-gcc: maybe-all-build-bison all-stage2-gcc: maybe-all-build-bison -all-stageb2g0-gcc: maybe-all-build-bison all-stage3-gcc: maybe-all-build-bison -all-stageb3g2-gcc: maybe-all-build-bison all-stage4-gcc: maybe-all-build-bison all-stageprofile-gcc: maybe-all-build-bison all-stagefeedback-gcc: maybe-all-build-bison @@ -56206,9 +54024,7 @@ all-gcc: maybe-all-build-byacc all-stage1-gcc: maybe-all-build-byacc all-stage2-gcc: maybe-all-build-byacc -all-stageb2g0-gcc: maybe-all-build-byacc all-stage3-gcc: maybe-all-build-byacc -all-stageb3g2-gcc: maybe-all-build-byacc all-stage4-gcc: maybe-all-build-byacc all-stageprofile-gcc: maybe-all-build-byacc all-stagefeedback-gcc: maybe-all-build-byacc @@ -56216,9 +54032,7 @@ all-gcc: maybe-all-build-flex all-stage1-gcc: maybe-all-build-flex all-stage2-gcc: maybe-all-build-flex -all-stageb2g0-gcc: maybe-all-build-flex all-stage3-gcc: maybe-all-build-flex -all-stageb3g2-gcc: maybe-all-build-flex all-stage4-gcc: maybe-all-build-flex all-stageprofile-gcc: maybe-all-build-flex all-stagefeedback-gcc: maybe-all-build-flex @@ -56226,9 +54040,7 @@ all-gcc: maybe-all-build-libiberty all-stage1-gcc: maybe-all-build-libiberty all-stage2-gcc: maybe-all-build-libiberty -all-stageb2g0-gcc: maybe-all-build-libiberty all-stage3-gcc: maybe-all-build-libiberty -all-stageb3g2-gcc: maybe-all-build-libiberty all-stage4-gcc: maybe-all-build-libiberty all-stageprofile-gcc: maybe-all-build-libiberty all-stagefeedback-gcc: maybe-all-build-libiberty @@ -56236,9 +54048,7 @@ all-gcc: maybe-all-build-fixincludes all-stage1-gcc: maybe-all-build-fixincludes all-stage2-gcc: maybe-all-build-fixincludes -all-stageb2g0-gcc: maybe-all-build-fixincludes all-stage3-gcc: maybe-all-build-fixincludes -all-stageb3g2-gcc: maybe-all-build-fixincludes all-stage4-gcc: maybe-all-build-fixincludes all-stageprofile-gcc: maybe-all-build-fixincludes all-stagefeedback-gcc: maybe-all-build-fixincludes @@ -56246,9 +54056,7 @@ all-gcc: maybe-all-zlib all-stage1-gcc: maybe-all-stage1-zlib all-stage2-gcc: maybe-all-stage2-zlib -all-stageb2g0-gcc: maybe-all-stageb2g0-zlib all-stage3-gcc: maybe-all-stage3-zlib -all-stageb3g2-gcc: maybe-all-stageb3g2-zlib all-stage4-gcc: maybe-all-stage4-zlib all-stageprofile-gcc: maybe-all-stageprofile-zlib all-stagefeedback-gcc: maybe-all-stagefeedback-zlib @@ -56256,9 +54064,7 @@ all-gcc: all-libcpp all-stage1-gcc: all-stage1-libcpp all-stage2-gcc: all-stage2-libcpp -all-stageb2g0-gcc: all-stageb2g0-libcpp all-stage3-gcc: all-stage3-libcpp -all-stageb3g2-gcc: all-stageb3g2-libcpp all-stage4-gcc: all-stage4-libcpp all-stageprofile-gcc: all-stageprofile-libcpp all-stagefeedback-gcc: all-stagefeedback-libcpp @@ -56266,9 +54072,7 @@ all-gcc: all-libdecnumber all-stage1-gcc: all-stage1-libdecnumber all-stage2-gcc: all-stage2-libdecnumber -all-stageb2g0-gcc: all-stageb2g0-libdecnumber all-stage3-gcc: all-stage3-libdecnumber -all-stageb3g2-gcc: all-stageb3g2-libdecnumber all-stage4-gcc: all-stage4-libdecnumber all-stageprofile-gcc: all-stageprofile-libdecnumber all-stagefeedback-gcc: all-stagefeedback-libdecnumber @@ -56276,9 +54080,7 @@ all-gcc: maybe-all-libiberty all-stage1-gcc: maybe-all-stage1-libiberty all-stage2-gcc: maybe-all-stage2-libiberty -all-stageb2g0-gcc: maybe-all-stageb2g0-libiberty all-stage3-gcc: maybe-all-stage3-libiberty -all-stageb3g2-gcc: maybe-all-stageb3g2-libiberty all-stage4-gcc: maybe-all-stage4-libiberty all-stageprofile-gcc: maybe-all-stageprofile-libiberty all-stagefeedback-gcc: maybe-all-stagefeedback-libiberty @@ -56288,9 +54090,7 @@ configure-libcpp: configure-libiberty configure-stage1-libcpp: configure-stage1-libiberty configure-stage2-libcpp: configure-stage2-libiberty -configure-stageb2g0-libcpp: configure-stageb2g0-libiberty configure-stage3-libcpp: configure-stage3-libiberty -configure-stageb3g2-libcpp: configure-stageb3g2-libiberty configure-stage4-libcpp: configure-stage4-libiberty configure-stageprofile-libcpp: configure-stageprofile-libiberty configure-stagefeedback-libcpp: configure-stagefeedback-libiberty @@ -56298,9 +54098,7 @@ configure-libcpp: maybe-configure-intl configure-stage1-libcpp: maybe-configure-stage1-intl configure-stage2-libcpp: maybe-configure-stage2-intl -configure-stageb2g0-libcpp: maybe-configure-stageb2g0-intl configure-stage3-libcpp: maybe-configure-stage3-intl -configure-stageb3g2-libcpp: maybe-configure-stageb3g2-intl configure-stage4-libcpp: maybe-configure-stage4-intl configure-stageprofile-libcpp: maybe-configure-stageprofile-intl configure-stagefeedback-libcpp: maybe-configure-stagefeedback-intl @@ -56308,9 +54106,7 @@ all-libcpp: all-libiberty all-stage1-libcpp: all-stage1-libiberty all-stage2-libcpp: all-stage2-libiberty -all-stageb2g0-libcpp: all-stageb2g0-libiberty all-stage3-libcpp: all-stage3-libiberty -all-stageb3g2-libcpp: all-stageb3g2-libiberty all-stage4-libcpp: all-stage4-libiberty all-stageprofile-libcpp: all-stageprofile-libiberty all-stagefeedback-libcpp: all-stagefeedback-libiberty @@ -56318,9 +54114,7 @@ all-libcpp: maybe-all-intl all-stage1-libcpp: maybe-all-stage1-intl all-stage2-libcpp: maybe-all-stage2-intl -all-stageb2g0-libcpp: maybe-all-stageb2g0-intl all-stage3-libcpp: maybe-all-stage3-intl -all-stageb3g2-libcpp: maybe-all-stageb3g2-intl all-stage4-libcpp: maybe-all-stage4-intl all-stageprofile-libcpp: maybe-all-stageprofile-intl all-stagefeedback-libcpp: maybe-all-stagefeedback-intl @@ -56330,9 +54124,7 @@ configure-mpfr: maybe-all-gmp configure-stage1-mpfr: maybe-all-stage1-gmp configure-stage2-mpfr: maybe-all-stage2-gmp -configure-stageb2g0-mpfr: maybe-all-stageb2g0-gmp configure-stage3-mpfr: maybe-all-stage3-gmp -configure-stageb3g2-mpfr: maybe-all-stageb3g2-gmp configure-stage4-mpfr: maybe-all-stage4-gmp configure-stageprofile-mpfr: maybe-all-stageprofile-gmp configure-stagefeedback-mpfr: maybe-all-stagefeedback-gmp @@ -56340,9 +54132,7 @@ configure-ppl: maybe-all-gmp configure-stage1-ppl: maybe-all-stage1-gmp configure-stage2-ppl: maybe-all-stage2-gmp -configure-stageb2g0-ppl: maybe-all-stageb2g0-gmp configure-stage3-ppl: maybe-all-stage3-gmp -configure-stageb3g2-ppl: maybe-all-stageb3g2-gmp configure-stage4-ppl: maybe-all-stage4-gmp configure-stageprofile-ppl: maybe-all-stageprofile-gmp configure-stagefeedback-ppl: maybe-all-stagefeedback-gmp @@ -56350,9 +54140,7 @@ configure-ppl: maybe-all-mpfr configure-stage1-ppl: maybe-all-stage1-mpfr configure-stage2-ppl: maybe-all-stage2-mpfr -configure-stageb2g0-ppl: maybe-all-stageb2g0-mpfr configure-stage3-ppl: maybe-all-stage3-mpfr -configure-stageb3g2-ppl: maybe-all-stageb3g2-mpfr configure-stage4-ppl: maybe-all-stage4-mpfr configure-stageprofile-ppl: maybe-all-stageprofile-mpfr configure-stagefeedback-ppl: maybe-all-stagefeedback-mpfr @@ -56360,9 +54148,7 @@ configure-cloog: maybe-all-ppl configure-stage1-cloog: maybe-all-stage1-ppl configure-stage2-cloog: maybe-all-stage2-ppl -configure-stageb2g0-cloog: maybe-all-stageb2g0-ppl configure-stage3-cloog: maybe-all-stage3-ppl -configure-stageb3g2-cloog: maybe-all-stageb3g2-ppl configure-stage4-cloog: maybe-all-stage4-ppl configure-stageprofile-cloog: maybe-all-stageprofile-ppl configure-stagefeedback-cloog: maybe-all-stagefeedback-ppl @@ -56387,9 +54173,7 @@ configure-bfd: configure-libiberty configure-stage1-bfd: configure-stage1-libiberty configure-stage2-bfd: configure-stage2-libiberty -configure-stageb2g0-bfd: configure-stageb2g0-libiberty configure-stage3-bfd: configure-stage3-libiberty -configure-stageb3g2-bfd: configure-stageb3g2-libiberty configure-stage4-bfd: configure-stage4-libiberty configure-stageprofile-bfd: configure-stageprofile-libiberty configure-stagefeedback-bfd: configure-stagefeedback-libiberty @@ -56397,9 +54181,7 @@ configure-bfd: maybe-configure-intl configure-stage1-bfd: maybe-configure-stage1-intl configure-stage2-bfd: maybe-configure-stage2-intl -configure-stageb2g0-bfd: maybe-configure-stageb2g0-intl configure-stage3-bfd: maybe-configure-stage3-intl -configure-stageb3g2-bfd: maybe-configure-stageb3g2-intl configure-stage4-bfd: maybe-configure-stage4-intl configure-stageprofile-bfd: maybe-configure-stageprofile-intl configure-stagefeedback-bfd: maybe-configure-stagefeedback-intl @@ -56407,9 +54189,7 @@ all-bfd: maybe-all-libiberty all-stage1-bfd: maybe-all-stage1-libiberty all-stage2-bfd: maybe-all-stage2-libiberty -all-stageb2g0-bfd: maybe-all-stageb2g0-libiberty all-stage3-bfd: maybe-all-stage3-libiberty -all-stageb3g2-bfd: maybe-all-stageb3g2-libiberty all-stage4-bfd: maybe-all-stage4-libiberty all-stageprofile-bfd: maybe-all-stageprofile-libiberty all-stagefeedback-bfd: maybe-all-stagefeedback-libiberty @@ -56417,9 +54197,7 @@ all-bfd: maybe-all-intl all-stage1-bfd: maybe-all-stage1-intl all-stage2-bfd: maybe-all-stage2-intl -all-stageb2g0-bfd: maybe-all-stageb2g0-intl all-stage3-bfd: maybe-all-stage3-intl -all-stageb3g2-bfd: maybe-all-stageb3g2-intl all-stage4-bfd: maybe-all-stage4-intl all-stageprofile-bfd: maybe-all-stageprofile-intl all-stagefeedback-bfd: maybe-all-stagefeedback-intl @@ -56427,9 +54205,7 @@ configure-opcodes: configure-libiberty configure-stage1-opcodes: configure-stage1-libiberty configure-stage2-opcodes: configure-stage2-libiberty -configure-stageb2g0-opcodes: configure-stageb2g0-libiberty configure-stage3-opcodes: configure-stage3-libiberty -configure-stageb3g2-opcodes: configure-stageb3g2-libiberty configure-stage4-opcodes: configure-stage4-libiberty configure-stageprofile-opcodes: configure-stageprofile-libiberty configure-stagefeedback-opcodes: configure-stagefeedback-libiberty @@ -56437,9 +54213,7 @@ all-opcodes: maybe-all-libiberty all-stage1-opcodes: maybe-all-stage1-libiberty all-stage2-opcodes: maybe-all-stage2-libiberty -all-stageb2g0-opcodes: maybe-all-stageb2g0-libiberty all-stage3-opcodes: maybe-all-stage3-libiberty -all-stageb3g2-opcodes: maybe-all-stageb3g2-libiberty all-stage4-opcodes: maybe-all-stage4-libiberty all-stageprofile-opcodes: maybe-all-stageprofile-libiberty all-stagefeedback-opcodes: maybe-all-stagefeedback-libiberty @@ -56447,9 +54221,7 @@ configure-binutils: maybe-configure-intl configure-stage1-binutils: maybe-configure-stage1-intl configure-stage2-binutils: maybe-configure-stage2-intl -configure-stageb2g0-binutils: maybe-configure-stageb2g0-intl configure-stage3-binutils: maybe-configure-stage3-intl -configure-stageb3g2-binutils: maybe-configure-stageb3g2-intl configure-stage4-binutils: maybe-configure-stage4-intl configure-stageprofile-binutils: maybe-configure-stageprofile-intl configure-stagefeedback-binutils: maybe-configure-stagefeedback-intl @@ -56457,9 +54229,7 @@ all-binutils: maybe-all-libiberty all-stage1-binutils: maybe-all-stage1-libiberty all-stage2-binutils: maybe-all-stage2-libiberty -all-stageb2g0-binutils: maybe-all-stageb2g0-libiberty all-stage3-binutils: maybe-all-stage3-libiberty -all-stageb3g2-binutils: maybe-all-stageb3g2-libiberty all-stage4-binutils: maybe-all-stage4-libiberty all-stageprofile-binutils: maybe-all-stageprofile-libiberty all-stagefeedback-binutils: maybe-all-stagefeedback-libiberty @@ -56467,9 +54237,7 @@ all-binutils: maybe-all-opcodes all-stage1-binutils: maybe-all-stage1-opcodes all-stage2-binutils: maybe-all-stage2-opcodes -all-stageb2g0-binutils: maybe-all-stageb2g0-opcodes all-stage3-binutils: maybe-all-stage3-opcodes -all-stageb3g2-binutils: maybe-all-stageb3g2-opcodes all-stage4-binutils: maybe-all-stage4-opcodes all-stageprofile-binutils: maybe-all-stageprofile-opcodes all-stagefeedback-binutils: maybe-all-stagefeedback-opcodes @@ -56477,9 +54245,7 @@ all-binutils: maybe-all-bfd all-stage1-binutils: maybe-all-stage1-bfd all-stage2-binutils: maybe-all-stage2-bfd -all-stageb2g0-binutils: maybe-all-stageb2g0-bfd all-stage3-binutils: maybe-all-stage3-bfd -all-stageb3g2-binutils: maybe-all-stageb3g2-bfd all-stage4-binutils: maybe-all-stage4-bfd all-stageprofile-binutils: maybe-all-stageprofile-bfd all-stagefeedback-binutils: maybe-all-stagefeedback-bfd @@ -56487,9 +54253,7 @@ all-binutils: maybe-all-build-flex all-stage1-binutils: maybe-all-build-flex all-stage2-binutils: maybe-all-build-flex -all-stageb2g0-binutils: maybe-all-build-flex all-stage3-binutils: maybe-all-build-flex -all-stageb3g2-binutils: maybe-all-build-flex all-stage4-binutils: maybe-all-build-flex all-stageprofile-binutils: maybe-all-build-flex all-stagefeedback-binutils: maybe-all-build-flex @@ -56497,9 +54261,7 @@ all-binutils: maybe-all-build-bison all-stage1-binutils: maybe-all-build-bison all-stage2-binutils: maybe-all-build-bison -all-stageb2g0-binutils: maybe-all-build-bison all-stage3-binutils: maybe-all-build-bison -all-stageb3g2-binutils: maybe-all-build-bison all-stage4-binutils: maybe-all-build-bison all-stageprofile-binutils: maybe-all-build-bison all-stagefeedback-binutils: maybe-all-build-bison @@ -56507,9 +54269,7 @@ all-binutils: maybe-all-build-byacc all-stage1-binutils: maybe-all-build-byacc all-stage2-binutils: maybe-all-build-byacc -all-stageb2g0-binutils: maybe-all-build-byacc all-stage3-binutils: maybe-all-build-byacc -all-stageb3g2-binutils: maybe-all-build-byacc all-stage4-binutils: maybe-all-build-byacc all-stageprofile-binutils: maybe-all-build-byacc all-stagefeedback-binutils: maybe-all-build-byacc @@ -56517,9 +54277,7 @@ all-binutils: maybe-all-intl all-stage1-binutils: maybe-all-stage1-intl all-stage2-binutils: maybe-all-stage2-intl -all-stageb2g0-binutils: maybe-all-stageb2g0-intl all-stage3-binutils: maybe-all-stage3-intl -all-stageb3g2-binutils: maybe-all-stageb3g2-intl all-stage4-binutils: maybe-all-stage4-intl all-stageprofile-binutils: maybe-all-stageprofile-intl all-stagefeedback-binutils: maybe-all-stagefeedback-intl @@ -56529,9 +54287,7 @@ configure-gas: maybe-configure-intl configure-stage1-gas: maybe-configure-stage1-intl configure-stage2-gas: maybe-configure-stage2-intl -configure-stageb2g0-gas: maybe-configure-stageb2g0-intl configure-stage3-gas: maybe-configure-stage3-intl -configure-stageb3g2-gas: maybe-configure-stageb3g2-intl configure-stage4-gas: maybe-configure-stage4-intl configure-stageprofile-gas: maybe-configure-stageprofile-intl configure-stagefeedback-gas: maybe-configure-stagefeedback-intl @@ -56539,9 +54295,7 @@ all-gas: maybe-all-libiberty all-stage1-gas: maybe-all-stage1-libiberty all-stage2-gas: maybe-all-stage2-libiberty -all-stageb2g0-gas: maybe-all-stageb2g0-libiberty all-stage3-gas: maybe-all-stage3-libiberty -all-stageb3g2-gas: maybe-all-stageb3g2-libiberty all-stage4-gas: maybe-all-stage4-libiberty all-stageprofile-gas: maybe-all-stageprofile-libiberty all-stagefeedback-gas: maybe-all-stagefeedback-libiberty @@ -56549,9 +54303,7 @@ all-gas: maybe-all-opcodes all-stage1-gas: maybe-all-stage1-opcodes all-stage2-gas: maybe-all-stage2-opcodes -all-stageb2g0-gas: maybe-all-stageb2g0-opcodes all-stage3-gas: maybe-all-stage3-opcodes -all-stageb3g2-gas: maybe-all-stageb3g2-opcodes all-stage4-gas: maybe-all-stage4-opcodes all-stageprofile-gas: maybe-all-stageprofile-opcodes all-stagefeedback-gas: maybe-all-stagefeedback-opcodes @@ -56559,9 +54311,7 @@ all-gas: maybe-all-bfd all-stage1-gas: maybe-all-stage1-bfd all-stage2-gas: maybe-all-stage2-bfd -all-stageb2g0-gas: maybe-all-stageb2g0-bfd all-stage3-gas: maybe-all-stage3-bfd -all-stageb3g2-gas: maybe-all-stageb3g2-bfd all-stage4-gas: maybe-all-stage4-bfd all-stageprofile-gas: maybe-all-stageprofile-bfd all-stagefeedback-gas: maybe-all-stagefeedback-bfd @@ -56569,9 +54319,7 @@ all-gas: maybe-all-intl all-stage1-gas: maybe-all-stage1-intl all-stage2-gas: maybe-all-stage2-intl -all-stageb2g0-gas: maybe-all-stageb2g0-intl all-stage3-gas: maybe-all-stage3-intl -all-stageb3g2-gas: maybe-all-stageb3g2-intl all-stage4-gas: maybe-all-stage4-intl all-stageprofile-gas: maybe-all-stageprofile-intl all-stagefeedback-gas: maybe-all-stagefeedback-intl @@ -56584,9 +54332,7 @@ configure-ld: maybe-configure-intl configure-stage1-ld: maybe-configure-stage1-intl configure-stage2-ld: maybe-configure-stage2-intl -configure-stageb2g0-ld: maybe-configure-stageb2g0-intl configure-stage3-ld: maybe-configure-stage3-intl -configure-stageb3g2-ld: maybe-configure-stageb3g2-intl configure-stage4-ld: maybe-configure-stage4-intl configure-stageprofile-ld: maybe-configure-stageprofile-intl configure-stagefeedback-ld: maybe-configure-stagefeedback-intl @@ -56594,9 +54340,7 @@ all-ld: maybe-all-libiberty all-stage1-ld: maybe-all-stage1-libiberty all-stage2-ld: maybe-all-stage2-libiberty -all-stageb2g0-ld: maybe-all-stageb2g0-libiberty all-stage3-ld: maybe-all-stage3-libiberty -all-stageb3g2-ld: maybe-all-stageb3g2-libiberty all-stage4-ld: maybe-all-stage4-libiberty all-stageprofile-ld: maybe-all-stageprofile-libiberty all-stagefeedback-ld: maybe-all-stagefeedback-libiberty @@ -56604,9 +54348,7 @@ all-ld: maybe-all-bfd all-stage1-ld: maybe-all-stage1-bfd all-stage2-ld: maybe-all-stage2-bfd -all-stageb2g0-ld: maybe-all-stageb2g0-bfd all-stage3-ld: maybe-all-stage3-bfd -all-stageb3g2-ld: maybe-all-stageb3g2-bfd all-stage4-ld: maybe-all-stage4-bfd all-stageprofile-ld: maybe-all-stageprofile-bfd all-stagefeedback-ld: maybe-all-stagefeedback-bfd @@ -56614,9 +54356,7 @@ all-ld: maybe-all-opcodes all-stage1-ld: maybe-all-stage1-opcodes all-stage2-ld: maybe-all-stage2-opcodes -all-stageb2g0-ld: maybe-all-stageb2g0-opcodes all-stage3-ld: maybe-all-stage3-opcodes -all-stageb3g2-ld: maybe-all-stageb3g2-opcodes all-stage4-ld: maybe-all-stage4-opcodes all-stageprofile-ld: maybe-all-stageprofile-opcodes all-stagefeedback-ld: maybe-all-stagefeedback-opcodes @@ -56624,9 +54364,7 @@ all-ld: maybe-all-build-bison all-stage1-ld: maybe-all-build-bison all-stage2-ld: maybe-all-build-bison -all-stageb2g0-ld: maybe-all-build-bison all-stage3-ld: maybe-all-build-bison -all-stageb3g2-ld: maybe-all-build-bison all-stage4-ld: maybe-all-build-bison all-stageprofile-ld: maybe-all-build-bison all-stagefeedback-ld: maybe-all-build-bison @@ -56634,9 +54372,7 @@ all-ld: maybe-all-build-byacc all-stage1-ld: maybe-all-build-byacc all-stage2-ld: maybe-all-build-byacc -all-stageb2g0-ld: maybe-all-build-byacc all-stage3-ld: maybe-all-build-byacc -all-stageb3g2-ld: maybe-all-build-byacc all-stage4-ld: maybe-all-build-byacc all-stageprofile-ld: maybe-all-build-byacc all-stagefeedback-ld: maybe-all-build-byacc @@ -56644,9 +54380,7 @@ all-ld: maybe-all-build-flex all-stage1-ld: maybe-all-build-flex all-stage2-ld: maybe-all-build-flex -all-stageb2g0-ld: maybe-all-build-flex all-stage3-ld: maybe-all-build-flex -all-stageb3g2-ld: maybe-all-build-flex all-stage4-ld: maybe-all-build-flex all-stageprofile-ld: maybe-all-build-flex all-stagefeedback-ld: maybe-all-build-flex @@ -56654,9 +54388,7 @@ all-ld: maybe-all-intl all-stage1-ld: maybe-all-stage1-intl all-stage2-ld: maybe-all-stage2-intl -all-stageb2g0-ld: maybe-all-stageb2g0-intl all-stage3-ld: maybe-all-stage3-intl -all-stageb3g2-ld: maybe-all-stageb3g2-intl all-stage4-ld: maybe-all-stage4-intl all-stageprofile-ld: maybe-all-stageprofile-intl all-stagefeedback-ld: maybe-all-stagefeedback-intl @@ -56664,9 +54396,7 @@ configure-gold: maybe-configure-intl configure-stage1-gold: maybe-configure-stage1-intl configure-stage2-gold: maybe-configure-stage2-intl -configure-stageb2g0-gold: maybe-configure-stageb2g0-intl configure-stage3-gold: maybe-configure-stage3-intl -configure-stageb3g2-gold: maybe-configure-stageb3g2-intl configure-stage4-gold: maybe-configure-stage4-intl configure-stageprofile-gold: maybe-configure-stageprofile-intl configure-stagefeedback-gold: maybe-configure-stagefeedback-intl @@ -56674,9 +54404,7 @@ all-gold: maybe-all-libiberty all-stage1-gold: maybe-all-stage1-libiberty all-stage2-gold: maybe-all-stage2-libiberty -all-stageb2g0-gold: maybe-all-stageb2g0-libiberty all-stage3-gold: maybe-all-stage3-libiberty -all-stageb3g2-gold: maybe-all-stageb3g2-libiberty all-stage4-gold: maybe-all-stage4-libiberty all-stageprofile-gold: maybe-all-stageprofile-libiberty all-stagefeedback-gold: maybe-all-stagefeedback-libiberty @@ -56684,9 +54412,7 @@ all-gold: maybe-all-intl all-stage1-gold: maybe-all-stage1-intl all-stage2-gold: maybe-all-stage2-intl -all-stageb2g0-gold: maybe-all-stageb2g0-intl all-stage3-gold: maybe-all-stage3-intl -all-stageb3g2-gold: maybe-all-stageb3g2-intl all-stage4-gold: maybe-all-stage4-intl all-stageprofile-gold: maybe-all-stageprofile-intl all-stagefeedback-gold: maybe-all-stagefeedback-intl @@ -56694,9 +54420,7 @@ all-gold: maybe-all-bfd all-stage1-gold: maybe-all-stage1-bfd all-stage2-gold: maybe-all-stage2-bfd -all-stageb2g0-gold: maybe-all-stageb2g0-bfd all-stage3-gold: maybe-all-stage3-bfd -all-stageb3g2-gold: maybe-all-stageb3g2-bfd all-stage4-gold: maybe-all-stage4-bfd all-stageprofile-gold: maybe-all-stageprofile-bfd all-stagefeedback-gold: maybe-all-stagefeedback-bfd @@ -56704,9 +54428,7 @@ all-gold: maybe-all-build-bison all-stage1-gold: maybe-all-build-bison all-stage2-gold: maybe-all-build-bison -all-stageb2g0-gold: maybe-all-build-bison all-stage3-gold: maybe-all-build-bison -all-stageb3g2-gold: maybe-all-build-bison all-stage4-gold: maybe-all-build-bison all-stageprofile-gold: maybe-all-build-bison all-stagefeedback-gold: maybe-all-build-bison @@ -56714,9 +54436,7 @@ all-gold: maybe-all-build-byacc all-stage1-gold: maybe-all-build-byacc all-stage2-gold: maybe-all-build-byacc -all-stageb2g0-gold: maybe-all-build-byacc all-stage3-gold: maybe-all-build-byacc -all-stageb3g2-gold: maybe-all-build-byacc all-stage4-gold: maybe-all-build-byacc all-stageprofile-gold: maybe-all-build-byacc all-stagefeedback-gold: maybe-all-build-byacc @@ -56724,9 +54444,7 @@ check-gold: maybe-all-binutils check-stage1-gold: maybe-all-stage1-binutils check-stage2-gold: maybe-all-stage2-binutils -check-stageb2g0-gold: maybe-all-stageb2g0-binutils check-stage3-gold: maybe-all-stage3-binutils -check-stageb3g2-gold: maybe-all-stageb3g2-binutils check-stage4-gold: maybe-all-stage4-binutils check-stageprofile-gold: maybe-all-stageprofile-binutils check-stagefeedback-gold: maybe-all-stagefeedback-binutils @@ -56734,9 +54452,7 @@ configure-opcodes: maybe-configure-intl configure-stage1-opcodes: maybe-configure-stage1-intl configure-stage2-opcodes: maybe-configure-stage2-intl -configure-stageb2g0-opcodes: maybe-configure-stageb2g0-intl configure-stage3-opcodes: maybe-configure-stage3-intl -configure-stageb3g2-opcodes: maybe-configure-stageb3g2-intl configure-stage4-opcodes: maybe-configure-stage4-intl configure-stageprofile-opcodes: maybe-configure-stageprofile-intl configure-stagefeedback-opcodes: maybe-configure-stagefeedback-intl @@ -56744,9 +54460,7 @@ all-opcodes: maybe-all-bfd all-stage1-opcodes: maybe-all-stage1-bfd all-stage2-opcodes: maybe-all-stage2-bfd -all-stageb2g0-opcodes: maybe-all-stageb2g0-bfd all-stage3-opcodes: maybe-all-stage3-bfd -all-stageb3g2-opcodes: maybe-all-stageb3g2-bfd all-stage4-opcodes: maybe-all-stage4-bfd all-stageprofile-opcodes: maybe-all-stageprofile-bfd all-stagefeedback-opcodes: maybe-all-stagefeedback-bfd @@ -56754,9 +54468,7 @@ all-opcodes: maybe-all-libiberty all-stage1-opcodes: maybe-all-stage1-libiberty all-stage2-opcodes: maybe-all-stage2-libiberty -all-stageb2g0-opcodes: maybe-all-stageb2g0-libiberty all-stage3-opcodes: maybe-all-stage3-libiberty -all-stageb3g2-opcodes: maybe-all-stageb3g2-libiberty all-stage4-opcodes: maybe-all-stage4-libiberty all-stageprofile-opcodes: maybe-all-stageprofile-libiberty all-stagefeedback-opcodes: maybe-all-stagefeedback-libiberty @@ -56764,9 +54476,7 @@ all-opcodes: maybe-all-intl all-stage1-opcodes: maybe-all-stage1-intl all-stage2-opcodes: maybe-all-stage2-intl -all-stageb2g0-opcodes: maybe-all-stageb2g0-intl all-stage3-opcodes: maybe-all-stage3-intl -all-stageb3g2-opcodes: maybe-all-stageb3g2-intl all-stage4-opcodes: maybe-all-stage4-intl all-stageprofile-opcodes: maybe-all-stageprofile-intl all-stagefeedback-opcodes: maybe-all-stagefeedback-intl diff --git a/Makefile.tpl b/Makefile.tpl index d8c8725d94f..743de484714 100644 --- a/Makefile.tpl +++ b/Makefile.tpl @@ -6,7 +6,7 @@ in # # Makefile for directory with subdirs to build. # Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, -# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009 +# 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 # Free Software Foundation # # This file is free software; you can redistribute it and/or modify @@ -178,6 +178,8 @@ HOST_EXPORTS = \ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ CXX="$(CXX)"; export CXX; \ CXXFLAGS="$(CXXFLAGS)"; export CXXFLAGS; \ + GCJ="$(GCJ)"; export GCJ; \ + GFORTRAN="$(GFORTRAN)"; export GFORTRAN; \ AR="$(AR)"; export AR; \ AS="$(AS)"; export AS; \ CC_FOR_BUILD="$(CC_FOR_BUILD)"; export CC_FOR_BUILD; \ @@ -213,11 +215,9 @@ HOST_EXPORTS = \ POSTSTAGE1_HOST_EXPORTS = \ $(HOST_EXPORTS) \ CC="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/xgcc$(exeext) \ - -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/"; export CC; \ - CC_FOR_BUILD="$(STAGE_CC_WRAPPER) \ - $$r/$(HOST_SUBDIR)/prev-gcc/xgcc$(exeext) \ - -B$$r/$(HOST_SUBDIR)/prev-gcc/ \ - -B$(build_tooldir)/bin/"; export CC_FOR_BUILD; \ + -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ \ + $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CC; \ + CC_FOR_BUILD="$$CC"; export CC_FOR_BUILD; \ CXX="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/g++$(exeext) \ -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ \ -nostdinc++ \ @@ -251,13 +251,13 @@ BASE_TARGET_EXPORTS = \ $(BASE_EXPORTS) \ AR="$(AR_FOR_TARGET)"; export AR; \ AS="$(COMPILER_AS_FOR_TARGET)"; export AS; \ - CC="$(CC_FOR_TARGET)"; export CC; \ - CFLAGS="$(CFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CC="$(CC_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CC; \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ CPPFLAGS="$(CPPFLAGS_FOR_TARGET)"; export CPPFLAGS; \ - CXXFLAGS="$(CXXFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; \ - GCJ="$(GCJ_FOR_TARGET)"; export GCJ; \ - GFORTRAN="$(GFORTRAN_FOR_TARGET)"; export GFORTRAN; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + GCJ="$(GCJ_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GCJ; \ + GFORTRAN="$(GFORTRAN_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GFORTRAN; \ DLLTOOL="$(DLLTOOL_FOR_TARGET)"; export DLLTOOL; \ LD="$(COMPILER_LD_FOR_TARGET)"; export LD; \ LDFLAGS="$(LDFLAGS_FOR_TARGET)"; export LDFLAGS; \ @@ -273,11 +273,11 @@ BASE_TARGET_EXPORTS = \ RAW_CXX_TARGET_EXPORTS = \ $(BASE_TARGET_EXPORTS) \ CXX_FOR_TARGET="$(RAW_CXX_FOR_TARGET)"; export CXX_FOR_TARGET; \ - CXX="$(RAW_CXX_FOR_TARGET)"; export CXX; + CXX="$(RAW_CXX_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CXX; NORMAL_TARGET_EXPORTS = \ $(BASE_TARGET_EXPORTS) \ - CXX="$(CXX_FOR_TARGET)"; export CXX; + CXX="$(CXX_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export CXX; # Where to find GMP HOST_GMPLIBS = @gmplibs@ @@ -377,48 +377,65 @@ LIBCFLAGS = $(CFLAGS) CXXFLAGS = @CXXFLAGS@ LIBCXXFLAGS = $(CXXFLAGS) -fno-implicit-templates +TFLAGS = + +# Defaults for all stages; some are overridden below. + +STAGE_CFLAGS = $(BOOT_CFLAGS) +STAGE_TFLAGS = $(TFLAGS) +STAGE_CONFIGURE_FLAGS=@stage2_werror_flag@ + +[+ FOR bootstrap-stage +] +# Defaults for stage [+id+]; some are overridden below. +STAGE[+id+]_CFLAGS = $(STAGE_CFLAGS) +STAGE[+id+]_TFLAGS = $(STAGE_TFLAGS) +STAGE[+id+]_CONFIGURE_FLAGS = $(STAGE_CONFIGURE_FLAGS) +[+ ENDFOR bootstrap-stage +] + # Only build the C compiler for stage1, because that is the only one that # we can guarantee will build with the native compiler, and also it is the # only thing useful for building stage2. STAGE1_CFLAGS (via CFLAGS), # MAKEINFO and MAKEINFOFLAGS are explicitly passed here to make them # overrideable (for a bootstrap build stage1 also builds gcc.info). +STAGE1_CFLAGS = @stage1_cflags@ STAGE1_CHECKING=@stage1_checking@ STAGE1_LANGUAGES=@stage1_languages@ +# * We force-disable intermodule optimizations, even if +# --enable-intermodule was passed, since the installed compiler +# probably can't handle them. Luckily, autoconf always respects +# the last argument when conflicting --enable arguments are passed. +# * Likewise, we force-disable coverage flags, since the installed +# compiler probably has never heard of them. +STAGE1_CONFIGURE_FLAGS = --disable-intermodule $(STAGE1_CHECKING) \ + --disable-coverage --enable-languages="$(STAGE1_LANGUAGES)" -STAGE1_CFLAGS=@stage1_cflags@ -STAGE2_CFLAGS=$(BOOT_CFLAGS) -STAGE3_CFLAGS=$(BOOT_CFLAGS) -STAGE4_CFLAGS=$(BOOT_CFLAGS) +STAGEprofile_CFLAGS = $(STAGE2_CFLAGS) -fprofile-generate +STAGEprofile_TFLAGS = $(STAGE2_TFLAGS) -STAGE1_LIBCFLAGS=$(CFLAGS_FOR_TARGET) -STAGE2_LIBCFLAGS=$(CFLAGS_FOR_TARGET) -STAGE3_LIBCFLAGS=$(CFLAGS_FOR_TARGET) -STAGE4_LIBCFLAGS=$(CFLAGS_FOR_TARGET) +STAGEfeedback_CFLAGS = $(STAGE3_CFLAGS) -fprofile-use +STAGEfeedback_TFLAGS = $(STAGE3_TFLAGS) do-compare = @do_compare@ do-compare3 = $(do-compare) -do-compare-debug = $(SHELL) $(srcdir)/contrib/compare-debug $$f1 $$f2 # ----------------------------------------------- # Programs producing files for the TARGET machine # ----------------------------------------------- -FLAGS_FOR_TARGET = @FLAGS_FOR_TARGET@ - AR_FOR_TARGET=@AR_FOR_TARGET@ AS_FOR_TARGET=@AS_FOR_TARGET@ -CC_FOR_TARGET=$(STAGE_CC_WRAPPER) @CC_FOR_TARGET@ $(FLAGS_FOR_TARGET) +CC_FOR_TARGET=$(STAGE_CC_WRAPPER) @CC_FOR_TARGET@ # If GCC_FOR_TARGET is not overriden on the command line, then this # variable is passed down to the gcc Makefile, where it is used to # build libgcc2.a. We define it here so that it can itself be # overridden on the command line. -GCC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCC_FOR_TARGET@ $(FLAGS_FOR_TARGET) -CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @CXX_FOR_TARGET@ $(FLAGS_FOR_TARGET) -RAW_CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @RAW_CXX_FOR_TARGET@ $(FLAGS_FOR_TARGET) -GCJ_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCJ_FOR_TARGET@ $(FLAGS_FOR_TARGET) -GFORTRAN_FOR_TARGET=$(STAGE_CC_WRAPPER) @GFORTRAN_FOR_TARGET@ $(FLAGS_FOR_TARGET) +GCC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCC_FOR_TARGET@ +CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @CXX_FOR_TARGET@ +RAW_CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @RAW_CXX_FOR_TARGET@ +GCJ_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCJ_FOR_TARGET@ +GFORTRAN_FOR_TARGET=$(STAGE_CC_WRAPPER) @GFORTRAN_FOR_TARGET@ DLLTOOL_FOR_TARGET=@DLLTOOL_FOR_TARGET@ LD_FOR_TARGET=@LD_FOR_TARGET@ @@ -436,13 +453,17 @@ COMPILER_NM_FOR_TARGET=@COMPILER_NM_FOR_TARGET@ CFLAGS_FOR_TARGET = @CFLAGS_FOR_TARGET@ CXXFLAGS_FOR_TARGET = @CXXFLAGS_FOR_TARGET@ -SYSROOT_CFLAGS_FOR_TARGET = @SYSROOT_CFLAGS_FOR_TARGET@ -DEBUG_PREFIX_CFLAGS_FOR_TARGET = @DEBUG_PREFIX_CFLAGS_FOR_TARGET@ LIBCFLAGS_FOR_TARGET = $(CFLAGS_FOR_TARGET) LIBCXXFLAGS_FOR_TARGET = $(CXXFLAGS_FOR_TARGET) -fno-implicit-templates LDFLAGS_FOR_TARGET = +FLAGS_FOR_TARGET = @FLAGS_FOR_TARGET@ +SYSROOT_CFLAGS_FOR_TARGET = @SYSROOT_CFLAGS_FOR_TARGET@ +DEBUG_PREFIX_CFLAGS_FOR_TARGET = @DEBUG_PREFIX_CFLAGS_FOR_TARGET@ + +XGCC_FLAGS_FOR_TARGET = $(FLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET) + # ------------------------------------ # Miscellaneous targets and flag lists # ------------------------------------ @@ -492,7 +513,10 @@ HOST_LIB_PATH_[+module+] = \ # Flags to pass down to all sub-makes. BASE_FLAGS_TO_PASS =[+ FOR flags_to_pass +][+ IF optional +] \ "`echo '[+flag+]=$([+flag+])' | sed -e s'/[^=][^=]*=$$/XFOO=/'`"[+ ELSE optional +] \ - "[+flag+]=$([+flag+])"[+ ENDIF optional+][+ ENDFOR flags_to_pass +] \ + "[+flag+]=$([+flag+])"[+ ENDIF optional+][+ ENDFOR flags_to_pass +][+ FOR bootstrap-stage +] \ + "STAGE[+id+]_CFLAGS=$(STAGE[+id+]_CFLAGS)" \ + "STAGE[+id+]_TFLAGS=$(STAGE[+id+]_TFLAGS)"[+ ENDFOR bootstrap-stage +] \ + "TFLAGS=$(TFLAGS)" \ "CONFIG_SHELL=$(SHELL)" \ "MAKEINFO=$(MAKEINFO) $(MAKEINFOFLAGS)" @@ -507,6 +531,8 @@ EXTRA_HOST_FLAGS = \ 'CC=$(CC)' \ 'CXX=$(CXX)' \ 'DLLTOOL=$(DLLTOOL)' \ + 'GCJ=$(GCJ)' \ + 'GFORTRAN=$(GFORTRAN)' \ 'LD=$(LD)' \ 'LIPO=$(LIPO)' \ 'NM=$(NM)' \ @@ -547,20 +573,24 @@ POSTSTAGE1_FLAGS_TO_PASS = \ EXTRA_TARGET_FLAGS = \ 'AR=$$(AR_FOR_TARGET)' \ 'AS=$(COMPILER_AS_FOR_TARGET)' \ - 'CC=$$(CC_FOR_TARGET)' \ - 'CFLAGS=$$(CFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ - 'CXX=$$(CXX_FOR_TARGET)' \ - 'CXXFLAGS=$$(CXXFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ + 'CC=$$(CC_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ + 'CFLAGS=$$(CFLAGS_FOR_TARGET)' \ + 'CXX=$$(CXX_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ + 'CXXFLAGS=$$(CXXFLAGS_FOR_TARGET)' \ 'DLLTOOL=$$(DLLTOOL_FOR_TARGET)' \ + 'GCJ=$$(GCJ_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ + 'GFORTRAN=$$(GFORTRAN_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \ 'LD=$(COMPILER_LD_FOR_TARGET)' \ 'LDFLAGS=$$(LDFLAGS_FOR_TARGET)' \ - 'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ - 'LIBCXXFLAGS=$$(LIBCXXFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)' \ + 'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET)' \ + 'LIBCXXFLAGS=$$(LIBCXXFLAGS_FOR_TARGET)' \ 'NM=$(COMPILER_NM_FOR_TARGET)' \ 'OBJDUMP=$$(OBJDUMP_FOR_TARGET)' \ 'RANLIB=$$(RANLIB_FOR_TARGET)' \ 'WINDRES=$$(WINDRES_FOR_TARGET)' \ - 'WINDMC=$$(WINDMC_FOR_TARGET)' + 'WINDMC=$$(WINDMC_FOR_TARGET)' \ + 'XGCC_FLAGS_FOR_TARGET=$(XGCC_FLAGS_FOR_TARGET)' \ + "TFLAGS=$$TFLAGS" TARGET_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) @@ -580,6 +610,13 @@ EXTRA_GCC_FLAGS = \ GCC_FLAGS_TO_PASS = $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) $(EXTRA_GCC_FLAGS) +@if gcc +BUILD_CONFIG = +ifneq ($(BUILD_CONFIG),) +include $(foreach CONFIG, $(BUILD_CONFIG), $(srcdir)/config/$(CONFIG).mk) +endif +@endif gcc + .PHONY: configure-host configure-host: [+ FOR host_modules +] \ @@ -603,11 +640,17 @@ all: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ - if [ -f stage_last ]; then \ +@if gcc-bootstrap + if [ -f stage_last ]; then : ; \ + TFLAGS="$(STAGE$(shell sed s,^stage,, stage_last)_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target; \ else \ +@endif gcc-bootstrap $(MAKE) $(RECURSE_FLAGS_TO_PASS) all-host all-target; \ - fi +@if gcc-bootstrap + fi; \ +@endif gcc-bootstrap + : .PHONY: all-build [+ FOR build_modules +] @@ -888,6 +931,7 @@ configure-stage[+id+]-[+prefix+][+module+]: @$(SHELL) $(srcdir)/mkinstalldirs [+subdir+]/[+module+] @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE[+id+]_TFLAGS)"; \ [+ IF check_multilibs +]echo "Checking multilib configuration for [+module+]..."; \ $(CC_FOR_TARGET) --print-multi-lib > [+subdir+]/[+module+]/multilib.tmp 2> /dev/null ; \ @@ -903,11 +947,14 @@ configure-stage[+id+]-[+prefix+][+module+]: fi; \ [+ ENDIF check_multilibs +]test ! -f [+subdir+]/[+module+]/Makefile || exit 0; \ [+exports+][+ IF prev +] \ - [+poststage1_exports+][+ ENDIF prev +] [+ IF prefix +] \ - CFLAGS="[+stage_libcflags+] $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \ - CXXFLAGS="[+stage_libcflags+] $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CXXFLAGS; [+ ELSE +] \ - CFLAGS="[+stage_cflags+]"; export CFLAGS; \ - CXXFLAGS="[+stage_cflags+]"; export CXXFLAGS; [+ ENDIF +] \ + [+poststage1_exports+][+ ENDIF prev +][+ IF prefix +] \ + CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS;[+ ELSE prefix +] \ + CFLAGS="$(STAGE[+id+]_CFLAGS)"; export CFLAGS; \ + CXXFLAGS="$(STAGE[+id+]_CFLAGS)"; export CXXFLAGS;[+ IF prev +] \ + LIBCFLAGS="$(STAGE[+id+]_CFLAGS)"[+ ELSE prev +] \ + LIBCFLAGS="$(LIBCFLAGS)"[+ ENDIF prev +]; export LIBCFLAGS;[+ ENDIF prefix +] \ echo Configuring stage [+id+] in [+subdir+]/[+module+] ; \ $(SHELL) $(srcdir)/mkinstalldirs [+subdir+]/[+module+] ; \ cd [+subdir+]/[+module+] || exit 1; \ @@ -920,9 +967,10 @@ configure-stage[+id+]-[+prefix+][+module+]: libsrcdir="$$s/[+module+]"; \ $(SHELL) $${libsrcdir}/configure \ [+args+] --build=${build_alias} --host=[+host_alias+] \ - --target=[+target_alias+] $${srcdiroption} \ - [+ IF prev +]--with-build-libsubdir=$(HOST_SUBDIR)[+ ENDIF prev +] \ - [+stage_configure_flags+] [+extra_configure_flags+] + --target=[+target_alias+] $${srcdiroption} [+ IF prev +]\ + --with-build-libsubdir=$(HOST_SUBDIR) [+ ENDIF prev +]\ + $(STAGE[+id+]_CONFIGURE_FLAGS)[+ IF extra_configure_flags +] \ + [+extra_configure_flags+][+ ENDIF extra_configure_flags +] @endif [+prefix+][+module+]-bootstrap [+ ENDFOR bootstrap_stage +] [+ ENDIF bootstrap +] @@ -962,16 +1010,25 @@ all-stage[+id+]-[+prefix+][+module+]: configure-stage[+id+]-[+prefix+][+module+] @[ $(current_stage) = stage[+id+] ] || $(MAKE) stage[+id+]-start @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE[+id+]_TFLAGS)"; \ [+exports+][+ IF prev +] \ [+poststage1_exports+][+ ENDIF prev +] \ cd [+subdir+]/[+module+] && \ - $(MAKE) $(BASE_FLAGS_TO_PASS) \ - CFLAGS="[+stage_cflags+]" CXXFLAGS="[+stage_cflags+]" \ - LIBCFLAGS="[+stage_libcflags+]" \ - CFLAGS_FOR_TARGET="[+stage_libcflags+]" \ - CXXFLAGS_FOR_TARGET="[+stage_libcflags+]" [+args+] [+ + $(MAKE) $(BASE_FLAGS_TO_PASS)[+ IF prefix +] \ + CFLAGS="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"[+ ELSE prefix +] \ + CFLAGS="$(STAGE[+id+]_CFLAGS)" \ + CXXFLAGS="$(STAGE[+id+]_CFLAGS)"[+ IF prev +] \ + LIBCFLAGS="$(STAGE[+id+]_CFLAGS)"[+ ELSE prev +] \ + LIBCFLAGS="$(LIBCFLAGS)"[+ ENDIF prev +][+ ENDIF prefix +] \ + CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \ + CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \ + LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \ + [+args+] [+ IF prev +][+poststage1_args+][+ ENDIF prev +] [+extra_make_flags+] \ + TFLAGS="$(STAGE[+id+]_TFLAGS)" \ $(TARGET-stage[+id+]-[+prefix+][+module+]) maybe-clean-stage[+id+]-[+prefix+][+module+]: clean-stage[+id+]-[+prefix+][+module+] @@ -1429,6 +1486,7 @@ do-clean: clean-stage[+id+] @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE[+id+]_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target [+bootstrap-target+]-lean: @@ -1439,6 +1497,7 @@ do-clean: clean-stage[+id+] @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE[+id+]_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target [+ ENDIF bootstrap-target +] @@ -1461,6 +1520,7 @@ distclean-stage[+id+]:: @: $(MAKE); $(unstage) @r=`${PWD_COMMAND}`; export r; \ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ + TFLAGS="$(STAGE[+id+]_TFLAGS)"; \ $(MAKE) $(TARGET_FLAGS_TO_PASS) all-host all-target [+ ENDIF cleanstrap-target +] @endif gcc-bootstrap @@ -1498,8 +1558,8 @@ stage_current: .PHONY: restrap restrap:: @: $(MAKE); $(stage) - rm -rf stage1-$(TARGET_SUBDIR) [+ FOR bootstrap-stage +][+ IF prev - +]stage[+id+]-* [+ ENDIF prev +][+ ENDFOR bootstrap-stage +] + rm -rf stage1-$(TARGET_SUBDIR)[+ FOR bootstrap-stage +][+ IF prev + +] stage[+id+]-*[+ ENDIF prev +][+ ENDFOR bootstrap-stage +] restrap:: all @endif gcc-bootstrap diff --git a/config/ChangeLog b/config/ChangeLog index d670de4e371..e1ca63e7471 100644 --- a/config/ChangeLog +++ b/config/ChangeLog @@ -1,3 +1,11 @@ +2009-05-12 Alexandre Oliva <aoliva@redhat.com> + + * multi.m4: Save CXX, GFORTRAN and GCJ in config.status. + * mt-gnu (CXXFLAGS_FOR_TARGET): Adjust. + * bootstrap-O1.mk: New. + * bootstrap-O3.mk: New. + * bootstrap-debug.mk: New. + 2009-05-07 Paolo Bonzini Sync from src: diff --git a/config/bootstrap-O1.mk b/config/bootstrap-O1.mk new file mode 100644 index 00000000000..031645a1251 --- /dev/null +++ b/config/bootstrap-O1.mk @@ -0,0 +1 @@ +BOOT_CFLAGS := -O1 $(filter-out -O%, $(BOOT_CFLAGS)) diff --git a/config/bootstrap-O3.mk b/config/bootstrap-O3.mk new file mode 100644 index 00000000000..b269a3f7e12 --- /dev/null +++ b/config/bootstrap-O3.mk @@ -0,0 +1 @@ +BOOT_CFLAGS := -O3 $(filter-out -O%, $(BOOT_CFLAGS)) diff --git a/config/bootstrap-debug.mk b/config/bootstrap-debug.mk new file mode 100644 index 00000000000..521be824194 --- /dev/null +++ b/config/bootstrap-debug.mk @@ -0,0 +1,2 @@ +STAGE2_CFLAGS += -g0 +do-compare = $(SHELL) $(srcdir)/contrib/compare-debug $$f1 $$f2 diff --git a/config/mt-gnu b/config/mt-gnu index 2400fa44e55..15bf4171603 100644 --- a/config/mt-gnu +++ b/config/mt-gnu @@ -1,2 +1 @@ -CXXFLAGS_FOR_TARGET = $(CXXFLAGS) $(SYSROOT_CFLAGS_FOR_TARGET) \ - $(DEBUG_PREFIX_CFLAGS_FOR_TARGET) -D_GNU_SOURCE +CXXFLAGS_FOR_TARGET = $(CXXFLAGS) -D_GNU_SOURCE diff --git a/config/multi.m4 b/config/multi.m4 index 98417679f51..5b62ecc0aa0 100644 --- a/config/multi.m4 +++ b/config/multi.m4 @@ -1,5 +1,5 @@ ## -*- Autoconf -*- -# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006 +# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2008 # Free Software Foundation, Inc. # # This file is free software; the Free Software Foundation @@ -62,4 +62,7 @@ with_target_subdir="$with_target_subdir" ac_configure_args="${multilib_arg} ${ac_configure_args}" multi_basedir="$multi_basedir" CONFIG_SHELL=${CONFIG_SHELL-/bin/sh} -CC="$CC"])])dnl +CC="$CC" +CXX="$CXX" +GFORTRAN="$GFORTRAN" +GCJ="$GCJ"])])dnl diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e1c13f5884b..ac58e2b1611 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,1037 @@ +2009-05-14 Ian Lance Taylor <iant@google.com> + + * passes.c (finish_optimization_passes): Change i to int. + * plugin.c (plugins_active_p): Change event to int. + (dump_active_plugins): Likewise. + * reginfo.c (invalid_mode_change_p): Change to to unsigned int. + Add cast. + * tree.c (tree_range_check_failed): Change c to unsigned int. + (omp_clause_range_check_failed): Likewise. + (build_common_builtin_nodes): Change mode to int. Add cast. + * config/ia64/ia64.c (is_emitted): Change r to unsigned int. + (ia64_hard_regno_rename_ok, ia64_eh_uses): Likewise. + + * c-typeck.c (build_unary_op): If -Wc++-compat, warn about using + ++ or -- with a variable of enum type. + +2009-05-14 Steven Bosscher <steven@gcc.gnu.org> + + PR driver/40144 + * opts.c (common_handle_option): Add OPT_fcse_skip_blocks as a no-op. + +2009-05-14 Steven Bosscher <steven@gcc.gnu.org> + + * store-motion.c: Do not include params.h + * Makefile.in: Fix dependencies for various files. + +2009-05-14 Steven Bosscher <steven@gcc.gnu.org> + + * auto-inc-dec.c: Fix pass description, remove apparent + accidental duplication. + +2009-05-14 H.J. Lu <hongjiu.lu@intel.com> + + PR middle-end/40147 + * ipa-utils.h (memory_identifier_string): Moved to ... + * tree.h (memory_identifier_string): Here. Add GTY(()). + +2009-05-14 Paolo Bonzini <bonzini@gnu.org> + + * doc/tm.texi (TARGET_LEGITIMATE_ADDRESS_P): Refer mainly to this + in the former documentation of... + (GO_IF_LEGITIMATE_ADDRESS): ... this. + * ira-conflicts.c (get_dup_num): Use address_operand. + * targhooks.c (default_legitimate_address_p): New. + * targhooks.h (default_legitimate_address_p): New. + * reload.c (strict_memory_address_p) [!GO_IF_LEGITIMATE_ADDRESS]: + Call hook. + * recog.c (memory_address_p) [!GO_IF_LEGITIMATE_ADDRESS]: Call hook. + * target.h (struct target): Add legitimate_address_p. + * target-def.h (TARGET_LEGITIMATE_ADDRESS_P): New. + (TARGET_INITIALIZER): Include it. + + * config/alpha/alpha.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/alpha/alpha-protos.h (alpha_legitimate_address_p): Remove. + * config/alpha/alpha.c (alpha_legitimate_address_p): Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/frv/frv.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + (REG_OK_STRICT_P): Delete. + * config/frv/frv-protos.h (frv_legitimate_address_p): Rename to... + (frv_legitimate_address_p_1): ... this. + * config/frv/frv.c (frv_legitimate_address_p): Forward to... + (frv_legitimate_address_p_1): ... the renamed old + frv_legitimate_address_p. + * config/frv/predicates.md: Adjust calls to frv_legitimate_address_p. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/s390/s390.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/s390/s390-protos.h (legitimate_address_p): Remove. + * config/s390/s390.c (legitimate_address_p): Rename to... + (s390_legitimate_address_p): ... this, make static. + (legitimize_address): Adjust call. + (TARGET_LEGITIMATE_ADDRESS_P): New. + * config/s390/constraints.md ("e"): Call strict_memory_address_p. + + * config/m32c/m32c.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/m32c/m32c-protos.h (m32c_legitimate_address_p): Remove. + * config/m32c/m32c.c (m32c_legitimate_address_p): Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/spu/spu.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/spu/spu-protos.h (spu_legitimate_address): Remove. + * config/spu/spu.c (spu_legitimate_address): Rename to... + (spu_legitimate_address_p): ... this, make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/sparc/sparc.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/sparc/sparc-protos.h (legitimate_address_p): Remove. + * config/sparc/sparc.c (legitimate_address_p): Rename to... + (sparc_legitimate_address_p): ... this, make static and return bool. + (legitimize_address): Adjust call. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/i386/i386.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/i386/i386-protos.h (legitimate_address_p): Remove. + * config/i386/i386.c (legitimate_address_p): Rename to... + (ix86_legitimate_address_p): ... this, make static. + (constant_address_p): Move after it, adjust call. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/avr/avr.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/avr/avr-protos.h (legitimate_address_p): Remove. + * config/avr/avr.c (legitimate_address_p): Rename to... + (avr_legitimate_address_p): ... this, make static. + (legitimize_address): Adjust call. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/crx/crx.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/crx/crx-protos.h (crx_legitimate_address_p): Remove. + * config/crx/crx.c (crx_legitimate_address_p): Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/xtensa/xtensa.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/xtensa/xtensa-protos.h (xtensa_legitimate_address_p): Remove. + * config/xtensa/xtensa.c (xtensa_legitimate_address_p): Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/stormy16/stormy16.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p): + Remove. + * config/stormy16/stormy16.c (xstormy16_legitimate_address_p): + Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/m68hc11/m68hc11.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/m68hc11/m68hc11-protos.h (m68hc11_go_if_legitimate_address): + Remove. + * config/m68hc11/m68hc11.c (m68hc11_go_if_legitimate_address): + Rename to... + (m68hc11_legitimate_address_p): ... this, make static. + (go_if_legitimate_address_internal): Rename to... + (m68hc11_legitimate_address_p_1): ... this. + (legitimize_address): Adjust call. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/iq2000/iq2000.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/iq2000/iq2000-protos.h (iq2000_legitimate_address_p): + Remove. + * config/iq2000/iq2000.c (iq2000_legitimate_address_p): + Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/mn10300/mn10300.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/mn10300/mn10300-protos.h (legitimate_address_p): Remove. + * config/mn10300/mn10300.c (legitimate_address_p): Rename to... + (mn10300_legitimate_address_p): ... this, make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/m68k/m68k.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/m68k/m68k-protos.h (m68k_legitimate_address_p): Remove. + * config/m68k/m68k.c (m68k_legitimate_address_p): Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/rs6000/rs6000.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + (REG_OK_STRICT_FLAG, REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P): Delete. + (INT_REG_OK_FOR_BASE_P, INT_REG_OK_FOR_INDEX_P): Move above. + * config/rs6000/rs6000.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/rs6000/rs6000-protos.h (rs6000_legitimate_address): Remove. + * config/rs6000/rs6000.c (rs6000_legitimate_address): Rename to... + (rs6000_legitimate_address_p): ... this, make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + (REG_MODE_OK_FOR_BASE_P): Delete. + (rs6000_legitimize_reload_address): Use INT_REG_OK_FOR_BASE_P. + + * config/picochip/picochip.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/picochip/picochip-protos.h (picochip_legitimate_address_p): + Delete. + * config/picochip/picochip.c (picochip_legitimate_address_p): Make + static, adjust types. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/score/score.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/score/score.c (score_address_p): Rename to... + (score_legitimate_address_p): ... this. + (TARGET_LEGITIMATE_ADDRESS_P): New. + * config/score/score3.c (score3_address_p): Rename to... + (score3_legitimate_address_p): ... this. + * config/score/score7.c (score7_address_p): Rename to... + (score7_legitimate_address_p): ... this. + + * config/arm/arm.h (ARM_GO_IF_LEGITIMATE_ADDRESS, + THUMB2_GO_IF_LEGITIMATE_ADDRESS, THUMB1_GO_IF_LEGITIMATE_ADDRESS, + GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/arm/arm-protos.h (thumb1_legitimate_address_p, + thumb2_legitimate_address_p): Delete. + (arm_legitimate_address_p): Rename to... + (arm_legitimate_address_outer_p): ... this. + * config/arm/constraints.md ("Uq"): Adjust call. + * config/arm/predicates.md (arm_extendqisi_mem_op): Likewise. + * config/arm/arm.c (arm_legitimate_address_p): New, rename old one to... + (arm_legitimate_address_outer_p): ... this. + (thumb1_legitimate_address_p, thumb2_legitimate_address_p): Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/mips/mips.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/mips/mips-protos.h (mips_legitimate_address_p): Remove. + * config/mips/mips.c (mips_legitimate_address_p): ... Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/vax/vax.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/vax/vax-protos.h (legitimate_address_p): Remove. + * config/vax/vax.c (legitimate_address_p): Rename to... + (vax_legitimate_address_p): ... this, make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/h8300/h8300.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/h8300/h8300-protos.h (h8300_legitimate_address_p): Remove. + * config/h8300/h8300.c (h8300_legitimate_address_p): ... Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/mmix/mmix.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/mmix/mmix-protos.h (mmix_legitimize_address): Remove. + * config/mmix/mmix.c (mmix_legitimate_address): Rename to... + (mmix_legitimate_address_p): ... this, make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + + * config/bfin/bfin.h (GO_IF_LEGITIMATE_ADDRESS): Delete. + * config/bfin/bfin-protos.h (bfin_legitimate_address_p): Remove. + * config/bfin/bfin.c (bfin_legitimate_address_p): ... Make static. + (TARGET_LEGITIMATE_ADDRESS_P): New. + +2009-05-14 Paolo Bonzini <bonzini@gnu.org> + + * config/arm/arm.h (PROMOTE_FUNCTION_MODE): Remove handling + of MODE_COMPLEX_INT. + +2009-05-14 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> + + * config/alpha/alpha.c (alpha_initialize_trampoline): Change 0 to + LCT_NORMAL in function call. + * mips-tdump.c (print_file_desc): Add cast to enum type. + * mips-tfile.c (add_ext_symbol): Add casts to enum types. + (mark_stabs): Add casts to enum types. + (parse_stabs_common): Add casts to enum types. + +2009-05-13 Adam Nemet <anemet@caviumnetworks.com> + + * config/mips/mips.c (mips_print_operand) <REG, MEM, default>: + Check for invalid values of LETTER. + +2009-05-13 Taras Glek <tglek@mozilla.com> + + * attribs.c moved out attribute registration into register_attribute + * doc/plugins.texi Documented register_attribute and PLUGIN_ATTRIBUTES + * gcc-plugin.h Added forward decl for register_attribute + * plugin.c Added PLUGIN_ATTRIBUTES boilerplate + * plugin.h Added PLUGIN_ATTRIBUTES + +2009-05-14 Dave Korn <dave.korn.cygwin@gmail.com> + + * config/i386/msformat-c.c (ms_printf_length_specs): Use enumeration + values even in sentinel and empty entries. + (ms_printf_flag_specs): Likewise. + (ms_scanf_flag_specs): Likewise. + (ms_strftime_flag_specs): Likewise. + (ms_print_char_table): Likewise. + (ms_scan_char_table): Likewise. + (ms_time_char_table): Likewise. + +2009-05-13 Doug Kwan <dougkwan@google.com> + + * tree-ssa-sccvn.c (compare_ops): Stabilize qsort. + +2009-05-13 Adam Nemet <anemet@caviumnetworks.com> + + * config/mips/mips.md (store): Add attributes for QI and HI. + Update comment. + (truncdisi2, truncdihi2, truncdiqi2): Merge these into ... + (truncdi<mode>2): ... this new pattern. + +2009-05-13 Brad Hards <bradh@kde.org> + + * Makefile.in (TEXI_GCCINT_FILES): Add plugins.texi. + +2009-05-14 Jakub Jelinek <jakub@redhat.com> + Ben Elliston <bje@au.ibm.com> + + PR middle-end/40035 + * dse.c (check_mem_read_rtx): Guard against width == -1. + +2009-05-13 Michael Matz <matz@suse.de> + + PR middle-end/39976 + * tree-outof-ssa.c (maybe_renumber_stmts_bb): New function. + (trivially_conflicts_p): New function. + (insert_backedge_copies): Use it. + +2009-05-13 Janis Johnson <janis187@us.ibm.com> + + * c-pragma.c (enum pragma_switch_t): Prefix constants with PRAGMA_. + (handle_stdc_pragma): Use new enum constant names. + (handle_pragma_float_const_decimal64): Ditto. + +2009-05-13 Ian Lance Taylor <iant@google.com> + + * Makefile.in (build/gencheck.o): Depend upon all-tree.def, not + tree.def. + +2009-05-13 Nathan Sidwell <nathan@codesourcery.com> + + * config/m68k/t-uclinux (M68K_MLIB_CPU): Check for FL_UCLINUX. + * config/m68k/m68k-devices.def: Add FL_UCLINUX to 68020 and 54455 + multilibs. + * config/m68k/m68k.h (FL_UCLINUX): Define. + +2009-05-13 Jan Hubicka <jh@suse.cz> + + * options.c (gfc_post_options): -fwhole-program imply -fwhole-file. + +2009-05-12 Kaz Kojima <kkojima@gcc.gnu.org> + + * config/sh/sh.h (OVERRIDE_OPTIONS): Clear flag_schedule_insns + unless -fschedule-insns is specified. + +2009-05-12 Kaz Kojima <kkojima@gcc.gnu.org> + + PR target/39561 + * config/sh/sh.h (OPTIMIZATION_OPTIONS): Don't set + TARGET_EXPAND_CBRANCHDI4. + * config/sh/sh.md (cbranchdi4): Don't check TARGET_EXPAND_CBRANCHDI4. + * config/sh/sh.opt (mexpand-cbranchdi): Remove. + (cmpeqdi): Fix comment. + +2009-05-12 Kaz Kojima <kkojima@gcc.gnu.org> + + * config/sh/sh-protos.h (sh_legitimate_index_p): Declare. + (sh_legitimate_address_p): Likewise. + * config/sh/sh.c (sh_legitimate_index_p): New. + (sh_legitimate_address_p): Likewise. + * config/sh/sh.h (REG_OK_FOR_BASE_P): Add STRICT parameter. + (REG_OK_FOR_INDEX_P, SUBREG_OK_FOR_INDEX_P): Likewise. + (MODE_DISP_OK_4, MODE_DISP_OK_8): Remove. + (MAYBE_BASE_REGISTER_RTX_P): New macro. + (MAYBE_INDEX_REGISTER_RTX_P): Likewise. + (BASE_REGISTER_RTX_P): Use MAYBE_BASE_REGISTER_RTX_P. + (INDEX_REGISTER_RTX_P): Use MAYBE_INDEX_REGISTER_RTX_P. + (GO_IF_LEGITIMATE_INDEX): Use sh_legitimate_index_p. + (GO_IF_LEGITIMATE_ADDRESS): Use sh_legitimate_address_p. + +2009-05-12 Jan Hubicka <jh@suse.cz> + + * tree-inline.c (estimate_operator_cost): Add operands; + when division happens by constant, it is cheap. + (estimate_num_insns): Loads and stores are not having cost of 0; + EH magic stuff is cheap; when computing runtime cost of switch, + use log2 base of amount of its cases; builtin_expect has cost of 0; + compute cost for moving return value of call. + (init_inline_once): Initialize time_based flags. + * tree-inline.h (eni_weights_d): Add time_based flag. + +2009-05-12 Paolo Bonzini <bonzini@gnu.org> + + * df-core.c: Update head documentation. + +2009-05-12 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR bootstrap/40118 + * rs6000.c (rs6000_generate_compare): Use op1b instead of + shadowing exisiting variable op1. + +2009-05-12 Uros Bizjak <ubizjak@gmail.com> + + PR target/37179 + * config/i386/driver-i386.c (processor_signatures): New enum. + (SIG_GEODE): Move from vendor_signatures to processor_signatures. + (host_detect_local_cpu): For SIG_AMD vendor, check for SIG_GEODE + processor signature to detect geode processor. + +2009-05-12 Paolo Bonzini <bonzini@gnu.org> + + Revert: + + 2009-05-12 Paolo Bonzini <bonzini@gnu.org> + + * optabs.c (prepare_cmp_insn): Temporarily disable test that + causes spurious differences between trunk and cond-optab branch. + +2009-05-12 Paolo Bonzini <bonzini@gnu.org> + + * dojump.c (compare_from_rtx): Delete. + * expmed.c (emit_store_flag): Only try cstore_optab. Canonicalize + any MODE_CC mode to the cstorecc4 pattern. Use prepare_operand, fail + if the comparison does not satisfy the predicate; test predicates for + operands 2 and 3 of a cstore pattern. Don't try cstore optab + further if one existing pattern fails. + * expr.h (compare_from_rtx): Delete. + (prepare_operand): Declare it. + * optabs.c: Change "lib call" to "libcall" throughout. + (bcc_gen_fctn, setcc_gen_code, trap_rtx, + HAVE_conditional_trap, emit_cmp_insn): Delete. + (can_compare_p): Delete cmp_optab case. + (prepare_float_lib_cmp): Return an rtx and a machine mode. + Accept other parameters by value. + (prepare_operand): Make non-static. + (prepare_cmp_insn): Return an rtx and a machine mode. Accept + other parameters by value. Try to widen operands here based on + an optab_methods argument and looking at cbranch_optab. + (emit_cmp_and_jump_insn_1): Accept test and mode, remove widening + loop. Use cbranch_optab directly. + (emit_cmp_and_jump_insns): Fix comment. Adjust call to + prepare_cmp_insn and emit_cmp_and_jump_insn_1, remove obsolete + assertion. + (emit_conditional_move, emit_conditional_add): Inline what's needed + of compare_from_rtx, using new prepare_cmp_insn for the rest. + (init_optabs): Init cmp_optab with UNKNOWN, cbranch_optab + with COMPARE. Move cmov_optab and cstore_optab above + with cbranch_optab, move cmp_optab down with ucmp_optab, + remove tst_otpab. Do not initialize trap_rtx. + (gen_cond_trap): Do it here. Use ctrap_optab. Test predicate + for trap code. Do not check HAVE_conditional_trap. Use + prepare_cmp_insn. Accept no predicate for operand 3. + * optabs.h (OTI_cmp): Mark as used only for libcalls. + (OTI_ctrap, ctrap_optab): New. + (tst_optab): Delete. + (bcc_gen_fctn, setcc_gen_code, emit_cmp_insn): Delete. + * ifcvt.c (find_if_header): Replace HAVE_conditional_trap + with lookup of ctrap_optab. + * genopinit.c (cmp_optab, tst_optab, bcc_gen_fctn, + setcc_gen_code): Delete. + (ctrap_optab): New. + + * combine.c (combine_simplify_rtx, simplify_set): Do not + special case comparing against zero for cc0 machines. + * simplify-rtx.c (simplify_binary_operation_1): Never remove + COMPARE on cc0 machines. + (simplify_relational_operation): Return a new expression when + a COMPARE could be removed. + * final.c (final_scan_insn): Compare cc_status values + against LHS of a (compare FOO (const_int 0)) cc0 source. + Also check if cc_status.value is the full compare. + + * doc/md.texi (bCC, sCC, tstMM, cmpMM): Delete. + (cstoreMM4): Document. + (conditional_trap): Document ctrapMM4 instead. + (sync_compare_and_swapMM): Refer to cbranchcc4. + (Dependent Patterns): Eliminate obsolete information referring to + the old jump optimization phase. + (Canonicalization): Include cbranchcc4 case, omit canonicalization + of compares with 0 on cc0 machines. + (Jump Patterns): Refer to MODE_CC jump patterns preferably, + avoiding references to cc0. Remove text about storing operands + in cmpMM. + * doc/tm.texi (Condition Codes): Include blurb on different + condition code representations, separate into subsections for + CC0, MODE_CC and conditional execution. + + * config/alpha/alpha-protos.h (alpha_emit_conditional_branch, + alpha_emit_setcc): Accept operands and a machine mode. + * config/alpha/alpha.c (alpha_emit_conditional_branch): + Get code/op0/op1 from operands, use machine mode argument + instead of alpha_compare.fp_p. Emit the branch here. + (alpha_emit_setcc): Likewise, and return boolean. + (alpha_emit_conditional_move): Likewise. Assert that + cmp_op_mode == cmp_mode, and simplify accordingly. + * config/alpha/alpha.h (struct alpha_compare, alpha_compare): Delete. + * config/alpha/alpha.md (cmpdf, cmptf, cmpdi, bCC, sCC): Delete. + (cbranchdf4, cbranchtf4, cbranchdi4, cstoredf4, cstoretf4,cstoredi4): + Delete. + (stack probe test): Use cbranchdi4. + * config/alpha/predicates.md (alpha_cbranch_operator): New. + + * config/arc/arc.c (gen_compare_reg): Do not emit cmp. + * config/arc/arc.h (movsicc, movsfcc): Use it. + (movdicc, *movdicc_insn, movdfcc, *movdfcc_insn): Remove. + (cbranchsi4, cstoresi4): New. + (cmpsi, bCC and sCC expanders): Remove. + + * config/arm/arm.c (arm_compare_op0, arm_compare_op1): Delete. + * config/arm/arm.h (arm_compare_op0, arm_compare_op1): Delete. + * config/arm/predicates.md (arm_comparison_operator): Only include + floating-point operators if there is a hardware floating-point unit. + * config/arm/arm.md (cbranchsi4, cstoresi4): Enable for TARGET_32BIT, + deferring to cbranch_cc and cstore_cc respectively. + (cbranchsf4, cbranchdf4, cbranchdi4, cstoresf4, cstoredf4, cstoredi4, + cbranch_cc, cstore_cc): New. + (movsicc, movsfcc, movdfcc): Do not use arm_compare_op0 and + arm_compare_op1. + (bCC, sCC, cmpsi, cmpsf, cmpdf, cmpdi): Delete. + + * config/avr/avr-protos.h (out_tstsi, out_tsthi): Adjust prototype. + * config/avr/avr.c (out_tstsi, out_tsthi): Get the tested operand + as an argument. + (adjust_insn_length): Adjust calls. + (avr_reorg): Handle (compare (foo) (const_int 0)). + * config/avr/avr.md (tstqi, tsthi, tstsi): Remove. + (*negated_tstqi, *negated_tsthi, *negated_tstsi): Unmacroize. + (*reversed_tsthi, *reversed_tstsi): Add a scratch for simplicity. + (cmpqi, cmphi, cmpsi): Prepend asterisk, fuse tst[qhs]i here. + (bCC): Remove. + (cbranchqi4, cbranchhi4, cbranchsi4): New. + (tst -> sbrc/sbrs peephole2, cpse peephole): Wrap RHS with COMPARE. + + * config/bfin/bfin.md (cmpbi, cmpsi, bCC, sCC): Delete. + (cbranchsi4, cstorebi4, cstoresi4): New. + (movbisi): This insn is duplicate, split it to zero_extend. + * config/bfin/bfin.c (bfin_compare_op0, bfin_compare_op1): Delete + (bfin_gen_compare): Do not use them. Emit VOIDmode SET, not BImode. + (bfin_optimize_loop): Use cbranch expander. + * config/bfin/bfin.h (bfin_compare_op0, bfin_compare_op1): Delete. + * config/bfin/predicates.md (bfin_cbranch_operator): Rename to... + (bfin_bimode_comparison_operator): ... this. + (bfin_direct_comparison_operator): New. + + * config/cris/cris.c (cris_normal_notice_update_cc): Look + inside (compare FOO (const_int 0)). + (cris_rtx_costs): Handle ZERO_EXTRACT. + * config/cris/cris.md (tstdi, tst<mode>, cmpdi): Delete. + (*tstdi_non_v32): Fold in *cmpdi_non_v32. + (*tstdi_v32): Delete. + (*cmpdi_non_v32): Add M alternative for operand 1. + (cmpsi, cmp<mode>): Make private. + (*tstsi, *tst<mode>_cmp, *tst<mode>_non_cmp, *btst): Wrap LHS + with COMPARE. + (cbranch<mode>4, cbranchdi4, cstore<mode>4): New. + + * config/crx/crx.md (cstore<mode>4, cbranchcc4): New. + (cmp<mode>, bCOND_internal, b<code>, s<code>): Delete. + (cbranch<mode>4, sCOND_internal): Use ordered_comparison_operator. + (cc_reg_operand): New. + (any_cond): Delete. + * config/crx/crx.c (crx_compare_op0, crx_compare_op1, + crx_expand_compare, crx_expand_branch, crx_expand_scond): Delete. + * config/crx/crx.h (crx_compare_op0, crx_compare_op1): Delete. + * config/crx/crx-protos.h (crx_expand_compare, crx_expand_branch, + crx_expand_scond): Delete. + + * config/fr30/fr30.md (cmp<mode>, bCC): Delete. + (cbranchsi4): New. + * config/fr30/fr30.c (fr30_compare_op0, fr30_compare_op1): Delete + * config/fr30/fr30.h (fr30_compare_op0, fr30_compare_op1): Delete. + + * config/frv/frv.md (cbranchsi4, cbranchsf4, cbranchdf4, + cstoresi4, cstoresf4, cstoredf4): New. + (cmpdi, cmpsi, cmpsf, cmpdf, bCC, sCC): Remove. + * config/frv/frv-protos.h (frv_emit_cbranch, frv_emit_scc): + Receive the entire operands array. + * config/frv/frv.h (frv_compare_op0, frv_compare_op1): Delete. + * config/frv/frv.c (frv_compare_op0, frv_compare_op1): Delete. + * config/frv/frv-protos.h (frv_emit_cbranch, frv_emit_scc): + Get test/op0/op1 from the operands array. + (frv_emit_cond_move): Get test/op0/op1 from the test_rtx. + + * config/h8300/h8300-protos.h (h8300_expand_branch): Accept operands. + (h8300_expand_store): New. + * config/h8300/h8300.c (h8300_rtx_costs): Handle (compare FOO + (const_int 0)). + (h8300_expand_branch): Emit compare here. Adjust for new arguments. + (h8300_expand_store): New. + * config/h8300/h8300.md (btst combine patterns): Wrap with COMPARE + or do not try to produce (set (cc0) REG). + (peepholes): Wrap arguments with COMPARE. Add a peephole to + change a compare into a move to a scratch register. Disable some + peepholes when comparing with zero. + (tstsi, tsthi, tstsi, cmpqi): Make private. + (cmphi): Delete. + (bCC, sCC): Delete. + (cbranchqi4, cbranchhi4, cbranchsi4, cstoreqi4, cstorehi4, + cstoresi4): New. + + * config/i386/i386.c (ix86_expand_int_movcc, ix86_expand_int_addcc, + ix86_expand_fp_movcc): Set ix86_compare_op0 and ix86_compare_op1. + (ix86_emit_i387_log1p): Use gen_cbranchxf4. + (ix86_emit_i387_log1p): Use cbranchxf2. + (ix86_expand_setcc): Return void. + * config/i386/i386-protos.h (ix86_expand_setcc): Return void. + * config/i386/i386.md (cmpti, cmpdi, cmpsi, cmphi, cmpqi, cmpxf, + cmp<MODEF>, cmpcc): Remove. + (cbranchti4, cbranchdi4, cbranchsi4, cbranchhi4, cbranchqi4, + cbranchxf4, cbranch<MODEF>4, cbranchcc4, cstoredi4, cstoresi4, + cstorehi4, cstoreqi4, cstorexf4, cstore<MODEF>4, cstorecc): New. + (sCC and bCC expanders): Remove. + (stack_protect_test): Use cbranchcc4. + + * config/ia64/ia64-protos.h (ia64_compare_op0, ia64_compare_op1): + Delete. + (ia64_expand_compare): Accept three rtx by reference and return void. + * config/ia64/ia64.c (ia64_compare_op0, ia64_compare_op1): Delete. + (ia64_expand_compare): Replace op0/op1 with *op0/*op1. Get code + from *expr. Update *expr with the BImode comparison to do. + * config/ia64/ia64.md (cmpbi, cmpsi, cmpdi, cmpsf, cmpdf, cmpxf, + cmptf, bCC, sCC, conditional_trap): Delete. + (cbranchbi4, cbranchsi4, cbranchdi4, cbranchsf4, cbranchdf4, + cbranchxf4, cbranchtf4, cstorebi4, cstoresi4, cstoredi4, cstoresf4, + cstoredf4, cstorexf4, cstoretf4, ctrapbi4, ctrapsi4, ctrapdi4, + ctrapsf4, ctrapdf4, ctrapxf4, ctraptf4): New. + * config/ia64/predicates.md (ia64_cbranch_operator): New. + + * config/iq2000/iq2000-protos.h (gen_conditional_branch): Change + type of last argument. + * config/iq2000/iq2000.c (branch_cmp, branch_type): Remove. + (gen_conditional_branch): Get code/cmp0/cmp1 from operands, + use machine mode argument instead of branch_type. Remove dead + code for floating-point comparisons. + * config/iq2000/iq2000.h (branch_cmp, branch_type): Remove. + * config/iq2000/iq2000.md (cmpsi, cmpdi, cmpsf, cmpdf, tstsi, bCC): + Remove. + (cbranchsi4, cstoresi4): New. + * config/iq2000/predicates.md (reg_or_const_operand): New. + + * config/m32c/m32c.md (cbranch splitter): Use match_op_dup. + * config/m32c/m32c.md (any_cond, gl_cond): Delete. + (b<code>_op): Rewrite to... + (bcc_op): ... this, using match_operator. + (s<code>_op): Rewrite to... + (scc_op): ... this, using match_operator. + (s<code>_24_op): Rewrite to... + (scc_op_24): ... this, using match_operator. + (s<code>_<mode>): Rewrite to... + (cstore<mode>4): ... this, using match_operator. + (s<code>_<mode>_24): Rewrite to... + (cstore<mode>4_24): ... this, using match_operator. + * config/m32c/m32c-protos.h (m32c_cmp_flg_0, m32c_pend_compare, + m32c_unpend_compare, m32c_expand_scc): Delete. + * config/m32c/m32c.c (compare_op0, compare_op1, m32c_cmp_flg_0, + m32c_pend_compare, m32c_unpend_compare, m32c_expand_scc): Delete. + (m32c_expand_movcc): Change NE to EQ if necessary. + (m32c_init_libfuncs): Modify cstore optab instead of setcc_gen_code. + + * config/m32r/m32r-protos.h (gen_cond_store): New. + * config/m32r/m32r.c (m32r_compare_op0, m32r_compare_op1): Delete. + (gen_cond_store): New, from sCC patterns. + (m32r_expand_block_move): Use cbranchsi4. + * config/m32r/m32r.h (m32r_compare_op0, m32r_compare_op1): Delete. + * config/m32r/m32r.md (cmpsi, bCC, sCC): Delete. + (cbranchsi4, cstoresi4): New. + + * config/m68hc11/m68hc11.c (m68hc11_compare_op0, m68hc11_compare_op1): + Delete. + (m68hc11_rtx_costs_1, m68hc11_rtx_costs): Handle ZERO_EXTRACT. + (m68hc11_notice_update_cc): Look into a compare with 0. + * config/m68hc11/m68hc11.h (m68hc11_compare_op0, m68hc11_compare_op1): + Delete. + * config/m68hc11/m68hc11.md (tstsi, tsthi, tstqi, cmpsi, + cmphi, cmpqi, bCC): Delete. + (cbranchsi4, cbranchhi4, cbranchqi4): New. + (tstqi_1, tstqi_z_used, tstqi_1, bitcmpqi, bitcmpqi_z_used, + bitcmpqi_12, bitcmphi, various splits and peephole2s): Wrap cc0<-reg + sets with COMPARE. + + * config/m68k/predicates.md (m68k_cstore_comparison_operator, + const0_operand, const1_operand, m68k_subword_comparison_operand): New. + * config/m68k/constraints.md (H): New. + * config/m68k/m68k.md (tstdi): Remove define_expand, use name for + the define_insn below. + (tstsi, tsthi, tst<FP:mode>, cmphi, cmpqi, cmp<FP:mode>): Delete. + (*tstsi_internal_68020_cf, *tstsi_internal, *tsthi_internal, + *tstqi_internal, tst<mode>_6881, tst<mode>_cf, many unnamed + patterns): Wrap RHS with COMPARE. + (tst<FP>_68881, tst<FP>_cf): Use const0_operand. + (*cmpdi_internal): Name this pattern. + (cmpdi): Change to define_insn. + (cbranchdi4, cstoredi4, cbranchsi4, cstoresi4, cbranchhi4, cstorehi4, + cbranchqi4, cstoreqi4, cbranch<FP:mode>4, cstore<FP:mode>4): New. + (scc0_di, scc0_di_5200, scc_di): Use the ordered_comparison_operator + predicate. + (seq, sne, sgt, sgtu, slt, sltu, sge, sgeu, sle, sleu, sordered, + sunordered, suneq, sunge, sungt, sunle, sunlt, sltgt): Delete + (conditional_trap): Change to... + (ctrapdi4, ctrapsi4, ctraphi4, ctrapqi4): ... these. + (*conditional_trap): Use the ordered_comparison_operator and + const1_operand predicates. + * config/m68k/m68k.c (m68k_last_compare_had_fp_operands): Delete. + (m68k_expand_prologue): Use ctrapsi4 instead of cmpsi+conditional_trap. + (m68k_rtx_costs): Look for ZERO_EXTRACT in a COMPARE. + * config/m68k/m68k.h (m68k_last_compare_had_fp_operands): Delete. + + * config/mcore/mcore-protos.h (arch_compare_op0, arch_compare_op1, + mcore_modify_comparison, mcore_gen_compare_reg): Remove. + (mcore_gen_compare): New. + * config/mcore/mcore.c (arch_compare_op0, arch_compare_op1): Delete. + (mcore_modify_comparison, mcore_gen_compare_reg): Fold into... + (mcore_gen_compare): ... this. + * config/mcore/mcore.md (cmpsi, bCC, sCC): Remove. + (cbranchsi4, cstoresi4): New, using mcore_gen_compare. + (stack probe pattern): Use cbranchsi4. + + * config/mips/predicates.md (mips_cstore_operator): New. + * config/mips/mips-ps-3d.md (movv2sfcc): Do not use cmp_operands. + * config/mips/mips.md (any_cond): Delete. + (conditional_trap): Rename to ctrap<GPR:mode>4. Adjust predicates, + always succeed. + (fixuns_truncdfsi2, fixuns_truncdfdi2, fixuns_truncsfsi2, + fixuns_truncsfdi2): Use cbranch patterns. + (cmp<GPR:mode>, cmp<SCALARF:mode>): Delete. + (b<code>): Change to cbranch<GPR:mode>4 and cbranch<SCALARF:mode>4. + Adjust call to mips_expand_conditional_branch. + (seq, sne, slt<u>, sle<u>, sgt<u>, sge<u>): Change to + cstore<GPR:mode>4. + * config/mips/mips-protos.h (mips_expand_conditional_branch, + mips_expand_scc, mips_expand_conditional_trap): Adjust prototypes. + * config/mips/mips.c (cmp_operands): Delete. + (mips_emit_compare): Get comparison operands from *op0/*op1. + (mips_expand_scc): Get code/op0/op1/target from operands. Assert + that it succeeds. Use op0/op1 instead of cmp_operands. + (mips_expand_conditional_branch, mips_expand_conditional_move, + mips_expand_conditional_trap): Likewise. + (mips_block_move_loop): Use cbranch patterns. + * config/mips/mips.h (cmp_operands): Delete. + + * config/mmix/mmix.c (mmix_valid_comparison): Delete. + (mmix_gen_compare_reg): Just return a register in the right CC mode. + * config/mmix/mmix.h (mmix_compare_op0, mmix_compare_op1): New. + * config/mmix/mmix.md (cmpdi, cmpdf): Remove. + (*cmpcc_folded): Rename to... + (*cmpdi_folded): this. + (*cmpcc): Rename to... + (*cmps): ... this. + (movdfcc, movdicc): Adjust for new semantics of mmix_gen_compare_reg. + (bCC): Remove. + (cbranchdi4): New. + (cbranchdf4): New. Handle invalid comparisons here. + * config/mmix/predicates.md (float_comparison_operator): New. + + * config/mn10300/mn10300.c (mn10300_rtx_costs): Consider 0 and + zero_extract to be cheap in (compare (zero_extract) (const_int 0). + * config/mn10300/mn10300.md (tst): Delete. + (*tst_extqisi_am33, *tst_extqisi, *tst_exthisi_am33, *tst_exthisi): + Name these patterns and wrap RHS in a compare. + (*cmpsi): Make this pattern private. Include tst. + (*cmpsf): Make this pattern private. + (and and zero_extract cc0 set): Wrap RHS in a COMPARE. + (compare with zero peepholes): Likewise. + (bCC): Remove. + (cbranchsi4, cbranchsf4): New. + (casesi): Use cbranchsi4. + + * config/pa/pa.c (hppa_compare_op0, hppa_compare_op1, + hppa_branch_type): Delete. + (return_addr_rtx): Use cbranchsi4. + (emit_bcond_fp): Accept all operands. Replace CODE with NE. + Emit CCFPmode comparison here. + (gen_cmp_fp): Delete, now part of emit_bcond_fp. + * config/pa/pa.h (enum cmp_type, hppa_compare_op0, hppa_compare_op1, + hppa_branch_type): Delete. + * config/pa/pa.md (cmpdi, cmpsi, cmpsf, cmpdf, sCC, bCC): Delete. + (movsicc, movdicc): Remove references to hppa_compare_op0, + hppa_compare_op1 and compare_from_rtx. + (cbranchdi4, cbranchsi4, cbranchsf4, cbranchdf4, cstoresi4): New. + (casesi): Use cbranchsi4. + + * config/pdp11/pdp11-protos.h (output_jump): Change prototype. + * config/pdp11/pdp11.c (output_jump): Embed opcodes here. + * config/pdp11/pdp11.md (register_or_const0_operand): New. + (cmpdf, cmphi, cmpqi): Make private. Add tst alternatives. + (cmpsi, tstsi, tstdf, tsthi, tstqi): Delete. + (bCC): Delete. + (cbranchdf4, cbranchhi4, cbranchqi4): New. + (*branch, *branch_inverted): New. + + * config/picochip/picochip.md (cbranchhi4): Use + ordered_comparison_operator. + (cmphi, bCC): Remove. + + * config/rs6000/predicates.md (rs6000_cbranch_operator): New. + (trap_comparison_operator): Delete. + * config/rs6000/rs6000-protos.h (rs6000_emit_sCOND, + rs6000_emit_cbranch): Accept mode and operands. + * config/rs6000/rs6000.c (rs6000_compare_op0, rs6000_compare_op1, + rs6000_compare_fp_p): Delete. + (rs6000_generate_compare): Accept mode and comparison. Extract code + and op0/op1 from there. Replace references to rs6000_compare_op0 + and rs6000_compare_op1. + (rs6000_emit_sCOND): Adjust call to rs6000_generate_compare and + extract result from passed operands. + (rs6000_emit_cbranch): Adjust call to rs6000_generate_compare and + extract loc from passed operands. + (rs6000_emit_cmove): Likewise. + * config/rs6000/rs6000.h (rs6000_compare_op0, rs6000_compare_op1, + rs6000_compare_fp_p): Delete. + * config/rs6000/rs6000.md (cmp<GPR>, cmp<FP>, bCC, sCC): Delete. + (cbranch<GPR>4, cbranch<FP>4): New. + (cstore<mode>4): New. Consolidate here all choices about when to use + portable or specialized sCC sequences. + (stack_protect_test): Use cbranchsi4. + (conditional_trap): Replace with ctrap<GPR>4. + (conditional trap insn): Replace trap_comparison_operator with + ordered_comparison_operator. + + * config/s390/s390.c (s390_compare_op0, s390_compare_op1): Delete. + (s390_emit_prologue): Use ctrap. + * config/s390/s390.h (s390_compare_op0, s390_compare_op1): Delete. + * config/s390/predicates.md (s390_eqne_operator, s390_scond_operator): + New predicates replacing... + * config/s390/s390.md (COMPARE, SCOND): ... these iterators. + (cmp<GPR>, cmp<FP>, cmpcc): Delete. + (trunc patterns): Use emit_cmp_and_jump_insns instead of cmp/branch. + (add<mode>cc): Do not use s390_compare_op0/op1. + (s<code>): Change to... + (cstore<mode>4): ... this. Do not use s390_compare_op0/op1. + (seq): Change to... + (cstorecc4): ... this. Handle EQ or NE equally. + (*sne): Un-privatize for use in cstorecc4. + (b<code>): Change to... + (cbranch<GPR>4, cbranch<FP>4, cbranchcc4): ... these. + (conditional_trap): Replace with... + (ctrap<GPR>4, ctrap<FP>4): ... these. + (stack_protect): Use cbranchcc4. + + * config/score/score-conv.h (cmp_op0, cmp_op1): Delete. + * config/score/score-protos.h (score_gen_cmp): Delete. + * config/score/score.c (cmp_op0, cmp_op1, score_gen_cmp): Delete. + (score_block_move-loop): Use cbranchsi4. + * config/score/score.md (cbranchsi4): New. + (cmpsi, bCC): Delete. + * config/score/score3.c (cmp_op0, cmp_op1, score3_gen_cmp): Delete. + (score3_movsicc): Use ops[1] operands instead of cmp_op0/cmp_op1. + * config/score/score7.c (cmp_op0, cmp_op1, score7_gen_cmp): Delete. + (score7_movsicc): Use ops[1] operands instead of cmp_op0/cmp_op1. + * config/score/score3.h (score3_gen_cmp): Delete. + * config/score/score7.h (score7_gen_cmp): Delete. + + * config/sh/sh-protos.h (prepare_scc_operands): Rename to... + (sh_emit_scc_to_t): ... this. Return void. + (from_compare): Rename to... + (sh_emit_compare_and_branch): ... this. + (sh_emit_compare_and_set): New. + (sh_expand_t_scc): Accept operands. + * config/sh/predicates.md (sh_float_comparison_operator): New. + * config/sh/sh.c (sh_compare_op0, sh_compare_op1): Delete. + (prepare_scc_operands): Rename to... + (sh_emit_scc_to_t): ... this. Return void. Get op0/op1 from + arguments. + (sh_emit_cheap_store_flag): New. + (sh_emit_set_t_insn): New. + (from_compare): Rename to... + (sh_emit_compare_and_branch): ... this. Accept mode. Rewrite + handling of TARGET_SH2E floating point to avoid recursive call. + Generate branch here. + (sh_emit_compare_and_set): New. + (sh_expand_t_scc): Get op0/op1 from arguments. + (sh_emit_cheap_store_flag): New. + * config/sh/sh.md (cbranchdi4, cbranchsi4): Include -mno-cbranchdi + cases. + (cbranchdi4_i): Use an "I08" constraint instead of an "i" constraint. + (cmpsi, cmpdi, cmpsf, cmpdf): Delete. + (movsicc, movdicc): Do nothing when it recreated operands from + sh_compare_*. Use sh_emit_cheap_store_flag. Adjust call to + prepare_scc_operands (now sh_emit_scc_to_t). + (udivdi3): Use cstoresi4. + (beq_media, bne_media, bge_media, bgtu_media, bgeu_media, beq, + bne, bgt, blt, ble, bge, bgtu, bltu, bgeu, bleu, bunordered): Delete. + (cbranchint4_media, cbranchfp4_media): New. + (casesi): Use cbranchdi4. + (seq, slt, sle, sgt, sge, sgtu, sltu, sgeu, sne, sleu, sunordered): + Delete. + (cstore4_media, cstoresi4, cstoredi4, cstoresf4, cstoredf4): New. + (movnegt): Remove second operand. + (cbranchsf4, cbranchdf4): New. + (stack_protect): Use cbranchdi4/cbranchsi4. + + * config/sparc/sparc.c (sparc_compare_op0, sparc_compare_op1): Delete. + (gen_compare_reg): Accept comparison, extract part of it to... + (gen_compare_reg_1): ... this. + (gen_compare_operator): Delete. + (gen_v9_scc): Accept separate destination, comparison code and arms. + Do not use sparc_compare_op0/sparc_compare_op1. + (emit_scc_insn, emit_conditional_branch_insn): New. + (emit_v9_brxx): Make static. Remove useless assertion. + (sparc_emit_float_lib_cmp): Return RTL instead of calling + emit_cmp_insn. + (sparc_expand_compare_and_swap_12): Use gen_compare_reg_1+cbranchcc4. + * config/sparc/sparc-protos.h (gen_compare_reg, + sparc_emit_float_lib_cmp): Adjust prototype. + (emit_scc_insn, emit_conditional_branch_insn): New. + (gen_v9_scc, emit_v9_brxx_insn, gen_compare_operator): Delete. + * config/sparc/sparc.h (sparc_compare_op0, sparc_compare_op1): Delete. + * config/sparc/sparc.md (P, I, F, V32, V32I, V64, V64I): Move all + iterators to the top. + (cmpsi, cmpdi, cmpsf, cmpdf, cmptf, seqsi_special_extend, + snesi_special_extend, sCC, bCC, seqdi_special_trunc, + snedi_special_trunc): Delete. + (seqdi_special, snedi_special): Use expansion of seqdi_special_trunc + and snedi_special_trunc. + (cstoresi4, cstoredi4, cstore<F:mode>4, cbranchcc4, cbranchsi4, + cbranchdi4, cbranch<F:mode>4): New. + (mov<I:mode>cc, mov<F:mode>cc): Handle sparc_emit_float_lib_cmp + here. Use gen_compare_reg instead of gen_compare_operator. + (conditional_trap): Replace with... + (ctrapsi4, ctrapdi4): ... this. + (stack_protect_test): Use cbranchcc4. + + * config/spu/spu-protos.h (spu_emit_branch_or_set): Change second + argument to rtx. + * config/spu/spu.c (spu_compare_op0, spu_compare_op1): Remove. + (spu_emit_branch_or_set): Get code/op0/op1 from second argument. + Change spu_compare_op0/op1 to op0/op1 throughout. Get target + from operands[0] or operands[3] depending on is_set. + * config/spu/spu.h (spu_compare_op0, spu_compare_op1): Remove. + * config/spu/spu.md (cmp<mode:VQHSI>, cmp<mode:DTI>, cmp<mode:VSF>, + cmpdf, bCC), sCC: Remove. + (cbranch<mode:VQHSI>4, cbranch<mode:DTI>, cbranch<mode:VSF>4, + cbranchdf4, cstore<mode:VQHSI>4, cstore<mode:DTI>, cstore<mode:VSF>4, + cstoredf4): New. + (mov<mode>cc): Accept ordered_comparison_operator, adjust call to + spu_emit_branch_or_set. + + * config/stormy16/stormy16-protos.h (xstormy16_emit_cbranch): + Add two arguments. + * config/stormy16/stormy16.h (xstormy16_compare_op0, + xstormy16_compare_op1): Delete. + * config/stormy16/stormy16.c (xstormy16_compare_op0, + xstormy16_compare_op1): Delete. + (xstormy16_emit_cbranch): Get op0/op1 from the new arguments. + Adjust calls. + * config/stormy16/stormy16.md (cbranchsi4, cbranchhi4): New. + (cmphi, cmpsi, bCC): Remove. + + * config/v850/v850.md (tstsi, cmpsi): Fold into... + (*cmpsi): ... this one. + (cbranchsi4, cstoresi4): New. + (bCC expanders): Delete. + (sCC insns): Fold into... + (*setcc): ... this one. + (casesi): Do not use gen_cmpsi and gen_bgtu. + (various splits): Wrap "naked" RHS of a cc0 set with COMPARE. + (movsicc): Simplify. + * config/v850/v850.c (v850_rtx_costs): Handle ZERO_EXTRACT in COMPARE. + + * config/vax/vax-protos.h (cond_name): New. + (vax_output_conditional_branch): Remove. + * config/vax/vax.c (cond_name): New. + (vax_output_conditional_branch): Remove. + * config/vax/vax.h (PRINT_OPERAND): Dispatch %c to cond_name. + * config/vax/vax.md (tst<VAXint>, tst<VAXfp>): Remove. + (cmp<VAXint>, cmp<VAXfp>): Privatize. Add constraints for tst. + (bit<VAXint>): Wrap source with (compare). + (b<code> and following unnamed pattern): Rename to *branch and + *branch_reversed. Change macroization to match_operator. + (cbranch<VAXint>4, cbranch<VAXfp>4): New. + + * config/xtensa/predicates.md (xtensa_cstoresi_operator): New. + * config/xtensa/xtensa-protos.h (xtensa_expand_conditional_branch): + Change last argument to machine_mode. + (xtensa_expand_scc): Add machine_mode argument. + * config/xtensa/xtensa.c (branch_cmp, branch_type): Remove. + (gen_conditional_move, xtensa_expand_conditional_branch, + xtensa_expand_scc, xtensa_expand_conditional_move): Use mode + instead of branch_type, fetch cmp0/cmp1/test_code from operands[]. + Adjust operand numbers. + * config/xtensa/xtensa.h (enum cmp_type, branch_cmp, branch_type): + Delete. + * config/xtensa/xtensa.md (any_cond, any_scc): Delete. + (cmpsi, cmpsf, b<code>, s<code>): Delete. + (cbranchsi4, cbranchsf4, cstoresi4, cstoresf4): New. + +2009-05-12 Paolo Bonzini <bonzini@gnu.org> + + * optabs.c (prepare_cmp_insn): Temporarily disable test that + causes spurious differences between trunk and cond-optab branch. + +2009-05-12 Alexandre Oliva <aoliva@redhat.com> + + PR target/37137 + * doc/install.texi (STAGE1_TFLAGS, BUILD_CONFIG): Document. + +2009-05-12 Alexandre Oliva <aoliva@redhat.com> + + * tree.c (iterative_hash_pointer): Delete. + (iterative_hash_expr): Short-circuit handling of NULL pointer. + Hash UIDs and versions of SSA names. Don't special-case built-in + function declarations. + +2009-05-11 Ian Lance Taylor <iant@google.com> + + PR bootstrap/40103 + * graphite.c: Force -Wc++-compat to only be a warning before + #including "cloog/cloog.h". + +2009-05-11 Martin Jambor <mjambor@suse.cz> + + * ipa-cp.c (ipcp_cloning_candidate_p): Add missing return false. + +2009-05-11 Jan Hubicka <jh@suse.cz> + + * tree-ssa-loop-ivcanon.c: Include target.h + (struct loop_size): new structure. + (constant_after_peeling): New predicate. + (tree_estimate_loop_size): New function. + (estimated_unrolled_size): Rewrite for new estimates. + (try_unroll_loop_completely): Use new estimates. + * Makefile.in (tree-ssa-loop-ivcanon.o): Add dependenc on target.h + +2009-05-11 Andrew Pinski <andrew_pinski@playstation.sony.com> + + * config/spu/spu-c.c (spu_categorize_keyword): Update for recent + libcpp interface change. + (spu_macro_to_expand): Likewise. + +2009-05-11 Paolo Bonzini <bonzini@gnu.org> + + PR tree-optimization/40026 + * gimplify.c (gimplify_init_constructor): Change initial conditional + to assertion. Rewrite TREE_OPERAND (*expr_p, 1) after + optimize_compound_literals_in_ctor. + +2009-05-11 Nathan Sidwell <nathan@codesourcery.com> + + * config/m68k/m68k-devices.def (52274, 52277, 5301x, 5225x, 51xx): + New devices. + * doc/invoke.texi (M680x0 Options): Document new coldfire cpus. + +2009-05-11 H.J. Lu <hongjiu.lu@intel.com> + + * tree-vect-data-refs.c (vect_analyze_group_access): Use + HOST_WIDE_INT for gap. + +2009-05-11 Ira Rosen <irar@il.ibm.com> + + PR tree-optimization/40074 + * tree-vect-data-refs.c (vect_analyze_group_access): Take gaps into + account in group size and step comparison. + +2009-05-11 Richard Guenther <rguenther@suse.de> + + * passes.c (init_optimization_passes): Strip now incorrect comment. + (execute_function_todo): Do not set PROP_alias. + * tree-pass.h (PROP_alias): Remove. + * tree-ssa-structalias.c (pass_build_alias): Do not provide PROP_alias. + * tree-if-conv.c (pass_if_conversion): Do not require PROP_alias. + * tree-nrv.c (pass_return_slot): Likewise. + * tree-object-size.c (pass_object_sizes): Likewise. + * tree-ssa-dom.c (pass_dominator): Likewise. + (pass_phi_only_cprop): Likewise. + * tree-ssa-dse.c (pass_dse): Likewise. + * tree-ssa-phiopt.c (pass_phiopt): Likewise. + (pass_cselim): Likewise. + * tree-ssa-pre.c (pass_pre): Likewise. + (pass_fre): Likewise. + * tree-ssa-reassoc.c (pass_reassoc): Likewise. + * tree-ssa-sink.c (pass_sink_code): Likewise. + * tree-stdarg.c (pass_stdarg): Likewise. + * tree-tailcall.c (pass_tail_calls): Likewise. + * tree-vrp.c (pass_vrp): Likewise. + 2009-05-10 Ian Lance Taylor <iant@google.com> * basic-block.h (enum profile_status): Break out of struct @@ -6,20 +1040,16 @@ cgraph_local_info. * cgraphunit.c (enum cgraph_order_sort_kind): New enum, broken out of struct cgraph_order_sort. - * combine.c (enum undo_kind): New enum, broken out of struct - undo. + * combine.c (enum undo_kind): New enum, broken out of struct undo. * cse.c (struct branch_path): Break out of struct cse_basic_block_data. * except.h (enum eh_region_type): Break out of struct eh_region. * gcc.c (enum add_del): Break out of struct modify_target. - * genrecog.c (enum decision_type): Break out of struct - decision_test. + * genrecog.c (enum decision_type): Break out of struct decision_test. * ggc-page.c (struct ggc_pch_ondisk): Break out of struct ggc_pch_data. - * matrix-reorg.c (struct free_info): Break out of struct - matrix_info. - * regmove.c (enum match_use): New enum, broken out of struct - match. + * matrix-reorg.c (struct free_info): Break out of struct matrix_info. + * regmove.c (enum match_use): New enum, broken out of struct match. * sched-int.h (enum post_call_group): New enum, broken out of struct deps. (struct deps_reg): Break out of struct deps. @@ -41,8 +1071,7 @@ and loc parameters. Change all callers. Change error calls to error_at, using loc. For a redefinition, if the location of the original definition is known, report it. Set in_struct and - struct_types. If -Wc++-compat warn if in sizeof, typeof, or - alignof. + struct_types. If -Wc++-compat warn if in sizeof, typeof, or alignof. (finish_struct): Add new parameters enclosing_in_struct and enclosing_struct_types. Change all callers. Set C_TYPE_DEFINED_IN_STRUCT for all struct/union/enum types defined @@ -52,10 +1081,8 @@ location of the original definition is known, report it. If in a struct, add this enum type to struct_types. If -Wc++-compat warn if in sizeof, typeof, or alignof. - * c-parser.c (disable_extension_diagnostics): Disable - -Wc++-compat. - (enable_extension_diagnostics): Reenable -Wc++-compat if - appropriate. + * c-parser.c (disable_extension_diagnostics): Disable -Wc++-compat. + (enable_extension_diagnostics): Reenable -Wc++-compat if appropriate. (c_parser_enum_specifier): Get enum location for start_enum. (c_parser_struct_or_union_specifier): Get struct location for start_struct. Save in_struct and struct_types status between @@ -64,12 +1091,10 @@ (c_parser_alignof_expression): Get location of type. (c_parser_postfix_expression): Likewise. (c_parser_postfix_expression_after_paren_type): Add type_loc - parameter. Change all callers. Call - check_compound_literal_type. Use type_loc for error about - variable size type. - * c-typeck.c (build_external_ref): If -Wc++-compat, warn about a - use of an enum constant from an enum type defined in a struct or - union. + parameter. Change all callers. Call check_compound_literal_type. + Use type_loc for error about variable size type. + * c-typeck.c (build_external_ref): If -Wc++-compat, warn about a use + of an enum constant from an enum type defined in a struct or union. (c_cast_expr): Add loc parameter. Change all callers. If -Wc++-compat, warn about defining a type in a cast. * c-tree.h (C_TYPE_DEFINED_IN_STRUCT): Define. @@ -103,7 +1128,8 @@ 2009-05-10 Jan Hubicka <jh@suse.cz> * tree-inline.c (delete_unreachable_blocks_update_callgraph): Declare. - (estimate_move_cost): Assert that it does not get called for VOID_TYPE_P. + (estimate_move_cost): Assert that it does not get called for + VOID_TYPE_P. (estimate_num_insns): Skip VOID types in argument handling. (optimize_inline_calls): Delete unreachable blocks and verify that callgraph is valid. @@ -1415,8 +2441,8 @@ (vectorize_loops): Fix comment. Use REPORT_VECTORIZED_LOCATIONS and vect_location. Use REPORT_UNVECTORIZED_LOCATIONS instead REPORT_UNVECTORIZED_LOOPS. - * tree-vectorizer.h (enum vect_def_type): Rename vect_invariant_def and - vect_loop_def to vect_external_def and vect_internal_def. + * tree-vectorizer.h (enum vect_def_type): Rename vect_invariant_def + and vect_loop_def to vect_external_def and vect_internal_def. (enum verbosity_levels): Rename REPORT_VECTORIZED_LOOPS and REPORT_UNVECTORIZED_LOOPS to REPORT_VECTORIZED_LOCATIONS and REPORT_UNVECTORIZED_LOCATIONS. @@ -1436,8 +2462,9 @@ vect_analyze_operations. (vect_is_simple_reduction): Use new names. (vectorizable_live_operation, vect_transform_loop): Likewise. - * tree-vect-data-refs.c (vect_check_interleaving): Add a return value to - specify whether the data references can be a part of interleaving chain. + * tree-vect-data-refs.c (vect_check_interleaving): Add a return value + to specify whether the data references can be a part of interleaving + chain. (vect_analyze_data_ref_dependence): Use new names. (vect_analyze_data_refs_alignment, vect_analyze_data_refs): Likewise. (vect_create_addr_base_for_vector_ref): Remove redundant code. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 88a3462552b..b9ebe7fa8d2 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20090511 +20090514 diff --git a/gcc/Makefile.in b/gcc/Makefile.in index 804699ae3fe..275d13a591f 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -2102,8 +2102,8 @@ stor-layout.o : stor-layout.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ tree-ssa-structalias.o: tree-ssa-structalias.c \ $(SYSTEM_H) $(CONFIG_H) coretypes.h $(TM_H) $(GGC_H) $(OBSTACK_H) $(BITMAP_H) \ $(FLAGS_H) $(RTL_H) $(TM_P_H) hard-reg-set.h $(BASIC_BLOCK_H) output.h \ - $(DIAGNOSTIC_H) $(TREE_H) $(C_COMMON_H) $(TREE_FLOW_H) $(TREE_INLINE_H) varray.h \ - $(C_TREE_H) $(GIMPLE_H) $(HASHTAB_H) $(FUNCTION_H) $(CGRAPH_H) \ + $(DIAGNOSTIC_H) $(TREE_H) $(TREE_FLOW_H) $(TREE_INLINE_H) varray.h \ + $(GIMPLE_H) $(HASHTAB_H) $(FUNCTION_H) $(CGRAPH_H) \ $(TREE_PASS_H) $(TIMEVAR_H) alloc-pool.h $(SPLAY_TREE_H) $(PARAMS_H) \ gt-tree-ssa-structalias.h $(CGRAPH_H) $(ALIAS_H) pointer-set.h tree-ssa.o : tree-ssa.c $(TREE_FLOW_H) $(CONFIG_H) $(SYSTEM_H) \ @@ -2240,7 +2240,7 @@ tree-nested.o: tree-nested.c $(CONFIG_H) $(SYSTEM_H) $(TM_H) $(TREE_H) \ $(GGC_H) gt-tree-nested.h coretypes.h $(TREE_FLOW_H) pointer-set.h tree-if-conv.o: tree-if-conv.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(TREE_H) $(FLAGS_H) $(TIMEVAR_H) $(BASIC_BLOCK_H) $(TREE_FLOW_H) \ - $(CFGLOOP_H) $(RTL_H) $(C_COMMON_H) tree-chrec.h $(TREE_DATA_REF_H) \ + $(CFGLOOP_H) $(RTL_H) tree-chrec.h $(TREE_DATA_REF_H) \ $(SCEV_H) $(TREE_PASS_H) $(DIAGNOSTIC_H) $(TARGET_H) $(TREE_DUMP_H) \ $(VARRAY_H) tree-iterator.o : tree-iterator.c $(CONFIG_H) $(SYSTEM_H) $(TREE_H) \ @@ -2282,7 +2282,7 @@ tree-ssa-loop-ivcanon.o : tree-ssa-loop-ivcanon.c $(TREE_FLOW_H) $(CONFIG_H) \ $(SYSTEM_H) $(RTL_H) $(TREE_H) $(TM_P_H) $(CFGLOOP_H) $(PARAMS_H) \ $(TREE_INLINE_H) output.h $(DIAGNOSTIC_H) $(TM_H) coretypes.h $(TREE_DUMP_H) \ $(FLAGS_H) $(TREE_PASS_H) $(SCEV_H) $(BASIC_BLOCK_H) $(GGC_H) \ - hard-reg-set.h tree-chrec.h + hard-reg-set.h tree-chrec.h $(TARGET_H) tree-ssa-loop-ch.o : tree-ssa-loop-ch.c $(TREE_FLOW_H) $(CONFIG_H) \ $(SYSTEM_H) $(RTL_H) $(TREE_H) $(TM_P_H) $(CFGLOOP_H) $(TREE_INLINE_H) \ output.h $(DIAGNOSTIC_H) $(TIMEVAR_H) $(TM_H) coretypes.h $(TREE_DUMP_H) \ @@ -2519,7 +2519,7 @@ rtlanal.o : rtlanal.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TOPLEV_H) \ varasm.o : varasm.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) \ $(RTL_H) $(FLAGS_H) $(FUNCTION_H) $(EXPR_H) hard-reg-set.h $(REGS_H) \ - output.h $(C_PRAGMA_H) $(TOPLEV_H) xcoffout.h debug.h $(GGC_H) $(TM_P_H) \ + output.h $(TOPLEV_H) xcoffout.h debug.h $(GGC_H) $(TM_P_H) \ $(HASHTAB_H) $(TARGET_H) langhooks.h gt-varasm.h $(BASIC_BLOCK_H) \ $(CFGLAYOUT_H) $(CGRAPH_H) targhooks.h tree-mudflap.h $(REAL_H) tree-iterator.h function.o : function.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \ @@ -2627,7 +2627,7 @@ cgraph.o : cgraph.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) \ cgraphunit.o : cgraphunit.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ $(TREE_H) langhooks.h $(TREE_INLINE_H) $(TOPLEV_H) $(FLAGS_H) $(GGC_H) \ $(TARGET_H) $(CGRAPH_H) intl.h pointer-set.h $(FUNCTION_H) $(GIMPLE_H) \ - $(TREE_FLOW_H) $(TREE_PASS_H) $(C_COMMON_H) debug.h $(DIAGNOSTIC_H) \ + $(TREE_FLOW_H) $(TREE_PASS_H) debug.h $(DIAGNOSTIC_H) \ $(FIBHEAP_H) output.h $(PARAMS_H) $(RTL_H) $(TIMEVAR_H) $(IPA_PROP_H) \ gt-cgraphunit.h tree-iterator.h $(COVERAGE_H) cgraphbuild.o : cgraphbuild.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ @@ -2648,10 +2648,10 @@ ipa-cp.o : ipa-cp.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ $(TREE_PASS_H) $(FLAGS_H) $(TIMEVAR_H) $(DIAGNOSTIC_H) $(TREE_DUMP_H) \ $(TREE_INLINE_H) $(FIBHEAP_H) $(PARAMS_H) matrix-reorg.o : matrix-reorg.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(TREE_H) $(RTL_H) $(C_TREE_H) $(TREE_INLINE_H) $(TREE_FLOW_H) \ + $(TM_H) $(TREE_H) $(RTL_H) $(TREE_INLINE_H) $(TREE_FLOW_H) \ tree-flow-inline.h langhooks.h $(HASHTAB_H) $(TOPLEV_H) $(FLAGS_H) $(GGC_H) \ debug.h $(TARGET_H) $(CGRAPH_H) $(DIAGNOSTIC_H) $(TIMEVAR_H) $(PARAMS_H) \ - $(FIBHEAP_H) $(C_COMMON_H) intl.h $(FUNCTION_H) $(BASIC_BLOCK_H) $(CFGLOOP_H) \ + $(FIBHEAP_H) intl.h $(FUNCTION_H) $(BASIC_BLOCK_H) $(CFGLOOP_H) \ tree-iterator.h $(TREE_PASS_H) opts.h $(TREE_DATA_REF_H) tree-chrec.h \ tree-scalar-evolution.h ipa-inline.o : ipa-inline.c gt-ipa-inline.h $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ @@ -2660,30 +2660,30 @@ ipa-inline.o : ipa-inline.c gt-ipa-inline.h $(CONFIG_H) $(SYSTEM_H) coretypes.h $(HASHTAB_H) $(COVERAGE_H) $(GGC_H) $(TREE_FLOW_H) $(RTL_H) $(IPA_PROP_H) ipa-utils.o : ipa-utils.c $(IPA_UTILS_H) $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(TREE_H) $(TREE_FLOW_H) $(TREE_INLINE_H) langhooks.h \ - pointer-set.h $(GGC_H) $(C_COMMON_H) $(GIMPLE_H) \ + pointer-set.h $(GGC_H) $(GIMPLE_H) $(SPLAY_TREE_H) \ $(CGRAPH_H) output.h $(FLAGS_H) $(TREE_PASS_H) $(TIMEVAR_H) $(DIAGNOSTIC_H) ipa-reference.o : ipa-reference.c $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(TREE_H) $(TREE_FLOW_H) $(TREE_INLINE_H) langhooks.h \ - pointer-set.h $(GGC_H) $(IPA_REFERENCE_H) $(IPA_UTILS_H) $(C_COMMON_H) \ + pointer-set.h $(GGC_H) $(IPA_REFERENCE_H) $(IPA_UTILS_H) $(SPLAY_TREE_H) \ $(GIMPLE_H) $(CGRAPH_H) output.h $(FLAGS_H) $(TREE_PASS_H) \ $(TIMEVAR_H) $(DIAGNOSTIC_H) $(FUNCTION_H) gt-ipa-reference.h ipa-pure-const.o : ipa-pure-const.c $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(TREE_H) $(TREE_FLOW_H) $(TREE_INLINE_H) langhooks.h \ - pointer-set.h $(GGC_H) $(IPA_UTILS_H) $(C_COMMON_H) $(TARGET_H) \ + pointer-set.h $(GGC_H) $(IPA_UTILS_H) $(TARGET_H) \ $(GIMPLE_H) $(CGRAPH_H) output.h $(FLAGS_H) $(TREE_PASS_H) $(TIMEVAR_H) \ $(DIAGNOSTIC_H) ipa-type-escape.o : ipa-type-escape.c $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(TREE_H) $(TREE_FLOW_H) $(TREE_INLINE_H) langhooks.h \ - pointer-set.h $(GGC_H) $(IPA_TYPE_ESCAPE_H) $(IPA_UTILS_H) $(C_COMMON_H) \ + pointer-set.h $(GGC_H) $(IPA_TYPE_ESCAPE_H) $(IPA_UTILS_H) $(SPLAY_TREE_H) \ $(GIMPLE_H) $(CGRAPH_H) output.h $(FLAGS_H) $(TREE_PASS_H) \ $(TIMEVAR_H) $(DIAGNOSTIC_H) $(FUNCTION_H) ipa-struct-reorg.o: ipa-struct-reorg.c ipa-struct-reorg.h $(CONFIG_H) $(SYSTEM_H) \ coretypes.h $(TM_H) $(GGC_H) $(TREE_H) $(RTL_H) $(GIMPLE_H) tree-inline.h \ - $(TREE_FLOW_H) langhooks.h pointer-set.h $(HASHTAB_H) $(C_TREE_H) $(TOPLEV_H) \ + $(TREE_FLOW_H) langhooks.h pointer-set.h $(HASHTAB_H) $(TOPLEV_H) \ $(FLAGS_H) debug.h $(TARGET_H) $(CGRAPH_H) $(DIAGNOSTIC_H) $(TIMEVAR_H) \ $(PARAMS_H) $(FIBHEAP_H) intl.h $(FUNCTION_H) $(BASIC_BLOCK_H) tree-iterator.h \ - $(TREE_PASS_H) opts.h $(IPA_TYPE_ESCAPE_H) $(TREE_DUMP_H) $(C_COMMON_H) \ + $(TREE_PASS_H) opts.h $(IPA_TYPE_ESCAPE_H) $(TREE_DUMP_H) \ $(GIMPLE_H) coverage.o : coverage.c $(GCOV_IO_H) $(CONFIG_H) $(SYSTEM_H) coretypes.h \ @@ -2725,7 +2725,7 @@ gcse.o : gcse.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \ store-motion.o : store-motion.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \ $(REGS_H) hard-reg-set.h $(FLAGS_H) $(REAL_H) insn-config.h $(GGC_H) \ $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) output.h $(TOPLEV_H) \ - $(TM_P_H) $(PARAMS_H) $(EXCEPT_H) gt-gcse.h $(TREE_H) cselib.h $(TIMEVAR_H) \ + $(TM_P_H) $(EXCEPT_H) $(TREE_H) $(TIMEVAR_H) \ intl.h $(OBSTACK_H) $(TREE_PASS_H) $(DF_H) $(DBGCNT_H) resource.o : resource.c $(CONFIG_H) $(RTL_H) hard-reg-set.h $(SYSTEM_H) \ coretypes.h $(TM_H) $(REGS_H) $(FLAGS_H) output.h $(RESOURCE_H) $(DF_H) \ @@ -3435,7 +3435,7 @@ build/genattrtab.o : genattrtab.c $(RTL_BASE_H) $(OBSTACK_H) \ build/genautomata.o : genautomata.c $(RTL_BASE_H) $(OBSTACK_H) \ $(BCONFIG_H) $(SYSTEM_H) coretypes.h $(GTM_H) errors.h vec.h \ $(HASHTAB_H) gensupport.h -build/gencheck.o : gencheck.c tree.def $(BCONFIG_H) $(GTM_H) \ +build/gencheck.o : gencheck.c all-tree.def $(BCONFIG_H) $(GTM_H) \ $(SYSTEM_H) coretypes.h $(lang_tree_files) gimple.def build/genchecksum.o : genchecksum.c $(BCONFIG_H) $(SYSTEM_H) $(MD5_H) build/gencodes.o : gencodes.c $(RTL_BASE_H) $(BCONFIG_H) $(SYSTEM_H) \ @@ -3733,7 +3733,7 @@ TEXI_GCCINT_FILES = gccint.texi gcc-common.texi gcc-vers.texi \ configfiles.texi collect2.texi headerdirs.texi funding.texi \ gnu.texi gpl_v3.texi fdl.texi contrib.texi languages.texi \ sourcebuild.texi gty.texi libgcc.texi cfg.texi tree-ssa.texi \ - loop.texi generic.texi gimple.texi + loop.texi generic.texi gimple.texi plugins.texi TEXI_GCCINSTALL_FILES = install.texi install-old.texi fdl.texi \ gcc-common.texi gcc-vers.texi diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 473d8f37bbe..99806dda7fd 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,17 +1,31 @@ +2009-05-14 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/decl.c (elaborate_expression_1): Remove GNAT_EXPR + parameter and move check for static expression to... + (elaborate_expression): ...here. Adjust call to above function. + (gnat_to_gnu_entity): Likewise for all calls. Use correct arguments + in calls to elaborate_expression. + (elaborate_entity): Likewise. + (substitution_list): Likewise. + (maybe_variable): Fix formatting. + (substitute_in_type) <REAL_TYPE>: Merge with INTEGER_TYPE case and add + missing guard. + * gcc-interface/trans.c (protect_multiple_eval): Minor cleanup. + 2009-05-07 Arnaud Charlet <charlet@adacore.com> - * gcc-interface/Make-lang.in: Update dependencies + * gcc-interface/Make-lang.in: Update dependencies. -2009-05-06 Laurent GUERBY <laurent@guerby.net> +2009-05-06 Laurent GUERBY <laurent@guerby.net> + + * s-linux.ads, s-linux-alpha.ads, s-linux-hppa.ads, osinte-linux.ads: + Define sa_handler_pos. + * s-osinte-linux.ads: Use it. + * s-linux-mipsel.ads: New. + * system-linux-mips64el.ads: New. + * gcc-interface/Makefile.in: Multilib handling for mipsel-linux and + mips64el-linux. - * s-linux.ads, s-linux-alpha.ads, s-linux-hppa.ads, - osinte-linux.ads: Define sa_handler_pos. - * s-osinte-linux.ads: Use it. - * s-linux-mipsel.ads: New. - * system-linux-mips64el.ads: New. - * gcc-interface/Makefile.in: Multilib handling for - mipsel-linux and mips64el-linux. - 2009-05-06 Arnaud Charlet <charlet@adacore.com> * exp_ch5.adb, exp_util.adb, exp_attr.adb, sem_util.adb, sem_res.adb, @@ -6279,7 +6293,7 @@ PR ada/39221 * a-teioed.adb (Expand): Fix Result overflow. -2009-02-25 Laurent GUERBY <laurent@guerby.net> +2009-02-25 Laurent GUERBY <laurent@guerby.net> * gcc-interface/Makefile.in: Fix multilib handling for sparc64-linux. diff --git a/gcc/ada/gcc-interface/decl.c b/gcc/ada/gcc-interface/decl.c index d55d56b61f6..6feadbdece0 100644 --- a/gcc/ada/gcc-interface/decl.c +++ b/gcc/ada/gcc-interface/decl.c @@ -128,8 +128,7 @@ static void prepend_one_attribute_to (struct attrib **, static void prepend_attributes (Entity_Id, struct attrib **); static tree elaborate_expression (Node_Id, Entity_Id, tree, bool, bool, bool); static bool is_variable_size (tree); -static tree elaborate_expression_1 (Node_Id, Entity_Id, tree, tree, - bool, bool); +static tree elaborate_expression_1 (tree, Entity_Id, tree, bool, bool); static tree make_packable_type (tree, bool); static tree gnat_to_gnu_field (Entity_Id, tree, int, bool); static tree gnat_to_gnu_param (Entity_Id, Mechanism_Type, Entity_Id, bool, @@ -1563,15 +1562,15 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) TYPE_MIN_VALUE (gnu_type) = convert (TREE_TYPE (gnu_type), elaborate_expression (Type_Low_Bound (gnat_entity), - gnat_entity, - get_identifier ("L"), definition, 1, + gnat_entity, get_identifier ("L"), + definition, true, Needs_Debug_Info (gnat_entity))); TYPE_MAX_VALUE (gnu_type) = convert (TREE_TYPE (gnu_type), elaborate_expression (Type_High_Bound (gnat_entity), - gnat_entity, - get_identifier ("U"), definition, 1, + gnat_entity, get_identifier ("U"), + definition, true, Needs_Debug_Info (gnat_entity))); /* One of the above calls might have caused us to be elaborated, @@ -1747,14 +1746,14 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) = convert (TREE_TYPE (gnu_type), elaborate_expression (Type_Low_Bound (gnat_entity), gnat_entity, get_identifier ("L"), - definition, 1, + definition, true, Needs_Debug_Info (gnat_entity))); TYPE_MAX_VALUE (gnu_type) = convert (TREE_TYPE (gnu_type), elaborate_expression (Type_High_Bound (gnat_entity), gnat_entity, get_identifier ("U"), - definition, 1, + definition, true, Needs_Debug_Info (gnat_entity))); /* One of the above calls might have caused us to be elaborated, @@ -2434,9 +2433,9 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) tree eltype = TREE_TYPE (gnu_arr_type); TYPE_SIZE (gnu_arr_type) - = elaborate_expression_1 (gnat_entity, gnat_entity, - TYPE_SIZE (gnu_arr_type), - gnu_str_name, definition, 0); + = elaborate_expression_1 (TYPE_SIZE (gnu_arr_type), + gnat_entity, gnu_str_name, + definition, false); /* ??? For now, store the size as a multiple of the alignment of the element type in bytes so that we @@ -2445,12 +2444,12 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) = build_binary_op (MULT_EXPR, sizetype, elaborate_expression_1 - (gnat_entity, gnat_entity, - build_binary_op (EXACT_DIV_EXPR, sizetype, + (build_binary_op (EXACT_DIV_EXPR, sizetype, TYPE_SIZE_UNIT (gnu_arr_type), size_int (TYPE_ALIGN (eltype) / BITS_PER_UNIT)), - concat_name (gnu_str_name, "A_U"), definition, 0), + gnat_entity, concat_name (gnu_str_name, "A_U"), + definition, false), size_int (TYPE_ALIGN (eltype) / BITS_PER_UNIT)); /* ??? create_type_decl is not invoked on the inner types so @@ -4515,19 +4514,17 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) TYPE_SIZE (gnu_type), 0)) { TYPE_SIZE (gnu_type) - = elaborate_expression_1 (gnat_entity, gnat_entity, - TYPE_SIZE (gnu_type), - get_identifier ("SIZE"), - definition, 0); + = elaborate_expression_1 (TYPE_SIZE (gnu_type), + gnat_entity, get_identifier ("SIZE"), + definition, false); SET_TYPE_ADA_SIZE (gnu_type, TYPE_SIZE (gnu_type)); } else { TYPE_SIZE (gnu_type) - = elaborate_expression_1 (gnat_entity, gnat_entity, - TYPE_SIZE (gnu_type), - get_identifier ("SIZE"), - definition, 0); + = elaborate_expression_1 (TYPE_SIZE (gnu_type), + gnat_entity, get_identifier ("SIZE"), + definition, false); /* ??? For now, store the size as a multiple of the alignment in bytes so that we can see the alignment from the tree. */ @@ -4535,23 +4532,21 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) = build_binary_op (MULT_EXPR, sizetype, elaborate_expression_1 - (gnat_entity, gnat_entity, - build_binary_op (EXACT_DIV_EXPR, sizetype, + (build_binary_op (EXACT_DIV_EXPR, sizetype, TYPE_SIZE_UNIT (gnu_type), size_int (TYPE_ALIGN (gnu_type) / BITS_PER_UNIT)), - get_identifier ("SIZE_A_UNIT"), - definition, 0), + gnat_entity, get_identifier ("SIZE_A_UNIT"), + definition, false), size_int (TYPE_ALIGN (gnu_type) / BITS_PER_UNIT)); if (TREE_CODE (gnu_type) == RECORD_TYPE) SET_TYPE_ADA_SIZE (gnu_type, - elaborate_expression_1 (gnat_entity, + elaborate_expression_1 (TYPE_ADA_SIZE (gnu_type), gnat_entity, - TYPE_ADA_SIZE (gnu_type), get_identifier ("RM_SIZE"), - definition, 0)); + definition, false)); } } @@ -4577,13 +4572,12 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, int definition) = build_binary_op (MULT_EXPR, sizetype, elaborate_expression_1 - (gnat_temp, gnat_temp, - build_binary_op (EXACT_DIV_EXPR, sizetype, + (build_binary_op (EXACT_DIV_EXPR, sizetype, DECL_FIELD_OFFSET (gnu_field), size_int (DECL_OFFSET_ALIGN (gnu_field) / BITS_PER_UNIT)), - get_identifier ("OFFSET"), - definition, 0), + gnat_temp, get_identifier ("OFFSET"), + definition, false), size_int (DECL_OFFSET_ALIGN (gnu_field) / BITS_PER_UNIT)); /* ??? The context of gnu_field is not necessarily gnu_type so @@ -5265,10 +5259,10 @@ elaborate_entity (Entity_Id gnat_entity) conversions on bounds of real types. */ if (!Raises_Constraint_Error (gnat_lb)) elaborate_expression (gnat_lb, gnat_entity, get_identifier ("L"), - 1, 0, Needs_Debug_Info (gnat_entity)); + true, false, Needs_Debug_Info (gnat_entity)); if (!Raises_Constraint_Error (gnat_hb)) elaborate_expression (gnat_hb, gnat_entity, get_identifier ("U"), - 1, 0, Needs_Debug_Info (gnat_entity)); + true, false, Needs_Debug_Info (gnat_entity)); break; } @@ -5304,8 +5298,8 @@ elaborate_entity (Entity_Id gnat_entity) /* ??? For now, ignore access discriminants. */ if (!Is_Access_Type (Etype (Node (gnat_discriminant_expr)))) elaborate_expression (Node (gnat_discriminant_expr), - gnat_entity, - get_entity_name (gnat_field), 1, 0, 0); + gnat_entity, get_entity_name (gnat_field), + true, false, false); } break; @@ -5457,7 +5451,7 @@ substitution_list (Entity_Id gnat_subtype, Entity_Id gnat_type, elaborate_expression (Node (gnat_value), gnat_subtype, get_entity_name (gnat_discrim), definition, - 1, 0), + true, false), gnu_list); return gnu_list; @@ -5591,63 +5585,66 @@ prepend_attributes (Entity_Id gnat_entity, struct attrib ** attr_list) } } -/* Called when we need to protect a variable object using a save_expr. */ +/* Called when we need to protect a variable object using a SAVE_EXPR. */ tree maybe_variable (tree gnu_operand) { - if (TREE_CONSTANT (gnu_operand) || TREE_READONLY (gnu_operand) + if (TREE_CONSTANT (gnu_operand) + || TREE_READONLY (gnu_operand) || TREE_CODE (gnu_operand) == SAVE_EXPR || TREE_CODE (gnu_operand) == NULL_EXPR) return gnu_operand; if (TREE_CODE (gnu_operand) == UNCONSTRAINED_ARRAY_REF) { - tree gnu_result = build1 (UNCONSTRAINED_ARRAY_REF, - TREE_TYPE (gnu_operand), - variable_size (TREE_OPERAND (gnu_operand, 0))); + tree gnu_result + = build1 (UNCONSTRAINED_ARRAY_REF, TREE_TYPE (gnu_operand), + variable_size (TREE_OPERAND (gnu_operand, 0))); TREE_READONLY (gnu_result) = TREE_STATIC (gnu_result) = TYPE_READONLY (TREE_TYPE (TREE_TYPE (gnu_operand))); return gnu_result; } - else - return variable_size (gnu_operand); + + return variable_size (gnu_operand); } /* Given a GNAT tree GNAT_EXPR, for an expression which is a value within a type definition (either a bound or a discriminant value) for GNAT_ENTITY, - return the GCC tree to use for that expression. GNU_NAME is the - qualification to use if an external name is appropriate and DEFINITION is - true if this is a definition of GNAT_ENTITY. If NEED_VALUE is true, we - need a result. Otherwise, we are just elaborating this for side-effects. - If NEED_DEBUG is true we need the symbol for debugging purposes even if it + return the GCC tree to use for that expression. GNU_NAME is the suffix + to use if a variable needs to be created and DEFINITION is true if this + is a definition of GNAT_ENTITY. If NEED_VALUE is true, we need a result; + otherwise, we are just elaborating the expression for side-effects. If + NEED_DEBUG is true, we need a variable for debugging purposes even if it isn't needed for code generation. */ static tree -elaborate_expression (Node_Id gnat_expr, Entity_Id gnat_entity, - tree gnu_name, bool definition, bool need_value, - bool need_debug) +elaborate_expression (Node_Id gnat_expr, Entity_Id gnat_entity, tree gnu_name, + bool definition, bool need_value, bool need_debug) { tree gnu_expr; - /* If we already elaborated this expression (e.g., it was involved + /* If we already elaborated this expression (e.g. it was involved in the definition of a private type), use the old value. */ if (present_gnu_tree (gnat_expr)) return get_gnu_tree (gnat_expr); - /* If we don't need a value and this is static or a discriminant, we - don't need to do anything. */ - else if (!need_value - && (Is_OK_Static_Expression (gnat_expr) - || (Nkind (gnat_expr) == N_Identifier - && Ekind (Entity (gnat_expr)) == E_Discriminant))) - return 0; + /* If we don't need a value and this is static or a discriminant, + we don't need to do anything. */ + if (!need_value + && (Is_OK_Static_Expression (gnat_expr) + || (Nkind (gnat_expr) == N_Identifier + && Ekind (Entity (gnat_expr)) == E_Discriminant))) + return NULL_TREE; + + /* If it's a static expression, we don't need a variable for debugging. */ + if (need_debug && Is_OK_Static_Expression (gnat_expr)) + need_debug = false; - /* Otherwise, convert this tree to its GCC equivalent. */ - gnu_expr - = elaborate_expression_1 (gnat_expr, gnat_entity, gnat_to_gnu (gnat_expr), - gnu_name, definition, need_debug); + /* Otherwise, convert this tree to its GCC equivalent and elaborate it. */ + gnu_expr = elaborate_expression_1 (gnat_to_gnu (gnat_expr), gnat_entity, + gnu_name, definition, need_debug); /* Save the expression in case we try to elaborate this entity again. Since it's not a DECL, don't check it. Don't save if it's a discriminant. */ @@ -5657,29 +5654,27 @@ elaborate_expression (Node_Id gnat_expr, Entity_Id gnat_entity, return need_value ? gnu_expr : error_mark_node; } -/* Similar, but take a GNU expression. */ +/* Similar, but take a GNU expression and always return a result. */ static tree -elaborate_expression_1 (Node_Id gnat_expr, Entity_Id gnat_entity, - tree gnu_expr, tree gnu_name, bool definition, - bool need_debug) +elaborate_expression_1 (tree gnu_expr, Entity_Id gnat_entity, tree gnu_name, + bool definition, bool need_debug) { - tree gnu_decl = NULL_TREE; /* Skip any conversions and simple arithmetics to see if the expression is a read-only variable. ??? This really should remain read-only, but we have to think about the typing of the tree here. */ tree gnu_inner_expr = skip_simple_arithmetic (remove_conversions (gnu_expr, true)); + tree gnu_decl = NULL_TREE; bool expr_global = Is_Public (gnat_entity) || global_bindings_p (); bool expr_variable; - /* In most cases, we won't see a naked FIELD_DECL here because a - discriminant reference will have been replaced with a COMPONENT_REF - when the type is being elaborated. However, there are some cases - involving child types where we will. So convert it to a COMPONENT_REF - here. We have to hope it will be at the highest level of the - expression in these cases. */ + /* In most cases, we won't see a naked FIELD_DECL because a discriminant + reference will have been replaced with a COMPONENT_REF when the type + is being elaborated. However, there are some cases involving child + types where we will. So convert it to a COMPONENT_REF. We hope it + will be at the highest level of the expression in these cases. */ if (TREE_CODE (gnu_expr) == FIELD_DECL) gnu_expr = build3 (COMPONENT_REF, TREE_TYPE (gnu_expr), build0 (PLACEHOLDER_EXPR, DECL_CONTEXT (gnu_expr)), @@ -5693,19 +5688,14 @@ elaborate_expression_1 (Node_Id gnat_expr, Entity_Id gnat_entity, by the variable; otherwise use a SAVE_EXPR if needed. Note that we rely here on the fact that an expression cannot contain both the discriminant and some other variable. */ - expr_variable = (!CONSTANT_CLASS_P (gnu_expr) && !(TREE_CODE (gnu_inner_expr) == VAR_DECL && (TREE_READONLY (gnu_inner_expr) || DECL_READONLY_ONCE_ELAB (gnu_inner_expr))) && !CONTAINS_PLACEHOLDER_P (gnu_expr)); - /* If this is a static expression or contains a discriminant, we don't - need the variable for debugging (and can't elaborate anyway if a - discriminant). */ - if (need_debug - && (Is_OK_Static_Expression (gnat_expr) - || CONTAINS_PLACEHOLDER_P (gnu_expr))) + /* If GNU_EXPR contains a discriminant, we can't elaborate a variable. */ + if (need_debug && CONTAINS_PLACEHOLDER_P (gnu_expr)) need_debug = false; /* Now create the variable if we need it. */ @@ -5721,10 +5711,8 @@ elaborate_expression_1 (Node_Id gnat_expr, Entity_Id gnat_entity, can do the right thing in the local case. */ if (expr_global && expr_variable) return gnu_decl; - else if (!expr_variable) - return gnu_expr; - else - return maybe_variable (gnu_expr); + + return expr_variable ? maybe_variable (gnu_expr) : gnu_expr; } /* Create a record type that contains a SIZE bytes long field of TYPE with a @@ -7714,6 +7702,7 @@ substitute_in_type (tree t, tree f, tree r) case INTEGER_TYPE: case ENUMERAL_TYPE: case BOOLEAN_TYPE: + case REAL_TYPE: if (CONTAINS_PLACEHOLDER_P (TYPE_MIN_VALUE (t)) || CONTAINS_PLACEHOLDER_P (TYPE_MAX_VALUE (t))) { @@ -7726,27 +7715,11 @@ substitute_in_type (tree t, tree f, tree r) new = copy_type (t); TYPE_MIN_VALUE (new) = low; TYPE_MAX_VALUE (new) = high; - if (TYPE_INDEX_TYPE (t)) + + if (TREE_CODE (t) == INTEGER_TYPE && TYPE_INDEX_TYPE (t)) SET_TYPE_INDEX_TYPE (new, substitute_in_type (TYPE_INDEX_TYPE (t), f, r)); - return new; - } - - return t; - - case REAL_TYPE: - if (CONTAINS_PLACEHOLDER_P (TYPE_MIN_VALUE (t)) - || CONTAINS_PLACEHOLDER_P (TYPE_MAX_VALUE (t))) - { - tree low = SUBSTITUTE_IN_EXPR (TYPE_MIN_VALUE (t), f, r); - tree high = SUBSTITUTE_IN_EXPR (TYPE_MAX_VALUE (t), f, r); - - if (low == TYPE_MIN_VALUE (t) && high == TYPE_MAX_VALUE (t)) - return t; - new = copy_type (t); - TYPE_MIN_VALUE (new) = low; - TYPE_MAX_VALUE (new) = high; return new; } diff --git a/gcc/ada/gcc-interface/trans.c b/gcc/ada/gcc-interface/trans.c index d6aa7dfa123..ee65c81503a 100644 --- a/gcc/ada/gcc-interface/trans.c +++ b/gcc/ada/gcc-interface/trans.c @@ -7246,30 +7246,29 @@ protect_multiple_eval (tree exp) if (!TREE_SIDE_EFFECTS (exp)) return exp; - /* If it is a conversion, protect what's inside the conversion. + /* If this is a conversion, protect what's inside the conversion. Similarly, if we're indirectly referencing something, we only - actually need to protect the address since the data itself can't - change in these situations. */ - else if (TREE_CODE (exp) == NON_LVALUE_EXPR - || CONVERT_EXPR_P (exp) - || TREE_CODE (exp) == VIEW_CONVERT_EXPR - || TREE_CODE (exp) == INDIRECT_REF - || TREE_CODE (exp) == UNCONSTRAINED_ARRAY_REF) - return build1 (TREE_CODE (exp), type, - protect_multiple_eval (TREE_OPERAND (exp, 0))); - - /* If EXP is a fat pointer or something that can be placed into a register, - just make a SAVE_EXPR. */ + need to protect the address since the data itself can't change + in these situations. */ + if (TREE_CODE (exp) == NON_LVALUE_EXPR + || CONVERT_EXPR_P (exp) + || TREE_CODE (exp) == VIEW_CONVERT_EXPR + || TREE_CODE (exp) == INDIRECT_REF + || TREE_CODE (exp) == UNCONSTRAINED_ARRAY_REF) + return build1 (TREE_CODE (exp), type, + protect_multiple_eval (TREE_OPERAND (exp, 0))); + + /* If this is a fat pointer or something that can be placed into a + register, just make a SAVE_EXPR. */ if (TYPE_FAT_POINTER_P (type) || TYPE_MODE (type) != BLKmode) return save_expr (exp); - /* Otherwise, dereference, protect the address, and re-reference. */ - else - return - build_unary_op (INDIRECT_REF, type, - save_expr (build_unary_op (ADDR_EXPR, - build_reference_type (type), - exp))); + /* Otherwise, reference, protect the address and dereference. */ + return + build_unary_op (INDIRECT_REF, type, + save_expr (build_unary_op (ADDR_EXPR, + build_reference_type (type), + exp))); } /* This is equivalent to stabilize_reference in tree.c, but we know how to diff --git a/gcc/attribs.c b/gcc/attribs.c index 38223d306ec..6b10b5f9748 100644 --- a/gcc/attribs.c +++ b/gcc/attribs.c @@ -33,6 +33,7 @@ along with GCC; see the file COPYING3. If not see #include "target.h" #include "langhooks.h" #include "hashtab.h" +#include "plugin.h" static void init_attributes (void); @@ -182,18 +183,27 @@ init_attributes (void) for (i = 0; i < ARRAY_SIZE (attribute_tables); i++) for (k = 0; attribute_tables[i][k].name != NULL; k++) { + register_attribute (&attribute_tables[i][k]); + } + invoke_plugin_callbacks (PLUGIN_ATTRIBUTES, NULL); + attributes_initialized = true; +} + +/* Insert a single ATTR into the attribute table. */ + +void +register_attribute (const struct attribute_spec *attr) +{ struct substring str; void **slot; - str.str = attribute_tables[i][k].name; - str.length = strlen (attribute_tables[i][k].name); + str.str = attr->name; + str.length = strlen (str.str); slot = htab_find_slot_with_hash (attribute_hash, &str, substring_hash (str.str, str.length), INSERT); gcc_assert (!*slot); - *slot = CONST_CAST (struct attribute_spec*, &attribute_tables[i][k]); - } - attributes_initialized = true; + *slot = CONST_CAST (struct attribute_spec *, attr); } /* Return the spec for the attribute named NAME. */ diff --git a/gcc/auto-inc-dec.c b/gcc/auto-inc-dec.c index c871baa8aad..08beda22a03 100644 --- a/gcc/auto-inc-dec.c +++ b/gcc/auto-inc-dec.c @@ -46,6 +46,7 @@ along with GCC; see the file COPYING3. If not see There are (4) basic forms that are matched: + (1) FORM_PRE_ADD a <- b + c ... *a @@ -55,6 +56,9 @@ along with GCC; see the file COPYING3. If not see a <- b ... *(a += c) pre + + + (2) FORM_PRE_INC a += c ... *a @@ -62,18 +66,24 @@ along with GCC; see the file COPYING3. If not see becomes *(a += c) pre + + + (3) FORM_POST_ADD *a ... b <- a + c - for this case to be true, b must not be assigned or used between - the *a and the assignment to b. B must also be a Pmode reg. + (For this case to be true, b must not be assigned or used between + the *a and the assignment to b. B must also be a Pmode reg.) becomes b <- a ... *(b += c) post + + + (4) FORM_POST_INC *a ... a <- a + c @@ -99,56 +109,8 @@ along with GCC; see the file COPYING3. If not see The is one special case: if a already had an offset equal to it +- its width and that offset is equal to -c when the increment was before the ref or +c if the increment was after the ref, then if we - can do the combination but switch the pre/post bit. - - (1) FORM_PRE_ADD - - a <- b + c - ... - *(a - c) - - becomes - - a <- b - ... - *(a += c) post - - (2) FORM_PRE_INC - - a += c - ... - *(a - c) - - becomes - - *(a += c) post + can do the combination but switch the pre/post bit. */ - (3) FORM_POST_ADD - - *(a + c) - ... - b <- a + c - - for this case to be true, b must not be assigned or used between - the *a and the assignment to b. B must also be a Pmode reg. - - becomes - - b <- a - ... - *(b += c) pre - - - (4) FORM_POST_INC - - *(a + c) - ... - a <- a + c - - becomes - - *(a += c) pre -*/ #ifdef AUTO_INC_DEC enum form diff --git a/gcc/c-pragma.c b/gcc/c-pragma.c index bd71d1d79e8..751c895d694 100644 --- a/gcc/c-pragma.c +++ b/gcc/c-pragma.c @@ -1180,7 +1180,7 @@ valid_location_for_stdc_pragma_p (void) return valid_location_for_stdc_pragma; } -enum pragma_switch_t { ON, OFF, DEFAULT, BAD }; +enum pragma_switch_t { PRAGMA_ON, PRAGMA_OFF, PRAGMA_DEFAULT, PRAGMA_BAD }; /* A STDC pragma must appear outside of external declarations or preceding all explicit declarations and statements inside a compound @@ -1198,33 +1198,33 @@ handle_stdc_pragma (const char *pname) { warning (OPT_Wpragmas, "invalid location for %<pragma %s%>, ignored", pname); - return BAD; + return PRAGMA_BAD; } if (pragma_lex (&t) != CPP_NAME) { warning (OPT_Wpragmas, "malformed %<#pragma %s%>, ignored", pname); - return BAD; + return PRAGMA_BAD; } arg = IDENTIFIER_POINTER (t); if (!strcmp (arg, "ON")) - ret = ON; + ret = PRAGMA_ON; else if (!strcmp (arg, "OFF")) - ret = OFF; + ret = PRAGMA_OFF; else if (!strcmp (arg, "DEFAULT")) - ret = DEFAULT; + ret = PRAGMA_DEFAULT; else { warning (OPT_Wpragmas, "malformed %<#pragma %s%>, ignored", pname); - return BAD; + return PRAGMA_BAD; } if (pragma_lex (&t) != CPP_EOF) { warning (OPT_Wpragmas, "junk at end of %<#pragma %s%>", pname); - return BAD; + return PRAGMA_BAD; } return ret; @@ -1260,14 +1260,14 @@ handle_pragma_float_const_decimal64 (cpp_reader *ARG_UNUSED (dummy)) switch (handle_stdc_pragma ("STDC FLOAT_CONST_DECIMAL64")) { - case ON: + case PRAGMA_ON: set_float_const_decimal64 (); break; - case OFF: - case DEFAULT: + case PRAGMA_OFF: + case PRAGMA_DEFAULT: clear_float_const_decimal64 (); break; - case BAD: + case PRAGMA_BAD: break; } } diff --git a/gcc/c-typeck.c b/gcc/c-typeck.c index f1dc7a34c59..13cd3e33a4b 100644 --- a/gcc/c-typeck.c +++ b/gcc/c-typeck.c @@ -3267,6 +3267,16 @@ build_unary_op (location_t location, : lv_decrement))) return error_mark_node; + if (warn_cxx_compat && TREE_CODE (TREE_TYPE (arg)) == ENUMERAL_TYPE) + { + if (code == PREINCREMENT_EXPR || code == POSTINCREMENT_EXPR) + warning_at (location, OPT_Wc___compat, + "increment of enumeration value is invalid in C++"); + else + warning_at (location, OPT_Wc___compat, + "decrement of enumeration value is invalid in C++"); + } + /* Ensure the argument is fully folded inside any SAVE_EXPR. */ arg = c_fully_fold (arg, false, NULL); diff --git a/gcc/combine.c b/gcc/combine.c index 0c06b2d102c..7cdf396a66c 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -4906,24 +4906,6 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest) return gen_lowpart (mode, XEXP (x, 0)); break; -#ifdef HAVE_cc0 - case COMPARE: - /* Convert (compare FOO (const_int 0)) to FOO unless we aren't - using cc0, in which case we want to leave it as a COMPARE - so we can distinguish it from a register-register-copy. */ - if (XEXP (x, 1) == const0_rtx) - return XEXP (x, 0); - - /* x - 0 is the same as x unless x's mode has signed zeros and - allows rounding towards -infinity. Under those conditions, - 0 - 0 is -0. */ - if (!(HONOR_SIGNED_ZEROS (GET_MODE (XEXP (x, 0))) - && HONOR_SIGN_DEPENDENT_ROUNDING (GET_MODE (XEXP (x, 0)))) - && XEXP (x, 1) == CONST0_RTX (GET_MODE (XEXP (x, 0)))) - return XEXP (x, 0); - break; -#endif - case CONST: /* (const (const X)) can become (const X). Do it this way rather than returning the inner CONST since CONST can be shared with a @@ -5758,17 +5740,6 @@ simplify_set (rtx x) if (other_changed) undobuf.other_insn = other_insn; -#ifdef HAVE_cc0 - /* If we are now comparing against zero, change our source if - needed. If we do not use cc0, we always have a COMPARE. */ - if (op1 == const0_rtx && dest == cc0_rtx) - { - SUBST (SET_SRC (x), op0); - src = op0; - } - else -#endif - /* Otherwise, if we didn't previously have a COMPARE in the correct mode, we need one. */ if (GET_CODE (src) != COMPARE || GET_MODE (src) != compare_mode) diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h index 66c68aebc91..80c1e4f8f63 100644 --- a/gcc/config/alpha/alpha-protos.h +++ b/gcc/config/alpha/alpha-protos.h @@ -38,7 +38,6 @@ extern rtx alpha_tablejump_addr_vec (rtx); extern rtx alpha_tablejump_best_label (rtx); extern bool alpha_legitimate_constant_p (rtx); -extern bool alpha_legitimate_address_p (enum machine_mode, rtx, int); extern rtx alpha_legitimize_reload_address (rtx, enum machine_mode, int, int, int); @@ -88,8 +87,8 @@ extern int check_float_value (enum machine_mode, REAL_VALUE_TYPE *, int); #endif #ifdef RTX_CODE -extern rtx alpha_emit_conditional_branch (enum rtx_code); -extern rtx alpha_emit_setcc (enum rtx_code); +extern void alpha_emit_conditional_branch (rtx[], enum machine_mode); +extern bool alpha_emit_setcc (rtx[], enum machine_mode); extern int alpha_split_conditional_move (enum rtx_code, rtx, rtx, rtx, rtx); extern void alpha_emit_xfloating_arith (enum rtx_code, rtx[]); extern void alpha_emit_xfloating_cvt (enum rtx_code, rtx[]); diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index bb6542a37f9..368ef507995 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -81,11 +81,6 @@ enum alpha_fp_rounding_mode alpha_fprm; enum alpha_fp_trap_mode alpha_fptm; -/* Save information from a "cmpxx" operation until the branch or scc is - emitted. */ - -struct alpha_compare alpha_compare; - /* Nonzero if inside of a function, because the Alpha asm can't handle .files inside of functions. */ @@ -806,8 +801,8 @@ alpha_linkage_symbol_p (const char *symname) any of those forms can be surrounded with an AND that clear the low-order three bits; this is an "unaligned" access. */ -bool -alpha_legitimate_address_p (enum machine_mode mode, rtx x, int strict) +static bool +alpha_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { /* If this is an ldq_u type address, discard the outer AND. */ if (mode == DImode @@ -2424,19 +2419,20 @@ alpha_emit_floatuns (rtx operands[2]) /* Generate the comparison for a conditional branch. */ -rtx -alpha_emit_conditional_branch (enum rtx_code code) +void +alpha_emit_conditional_branch (rtx operands[], enum machine_mode cmp_mode) { enum rtx_code cmp_code, branch_code; - enum machine_mode cmp_mode, branch_mode = VOIDmode; - rtx op0 = alpha_compare.op0, op1 = alpha_compare.op1; + enum machine_mode branch_mode = VOIDmode; + enum rtx_code code = GET_CODE (operands[0]); + rtx op0 = operands[1], op1 = operands[2]; rtx tem; - if (alpha_compare.fp_p && GET_MODE (op0) == TFmode) + if (cmp_mode == TFmode) { op0 = alpha_emit_xfloating_compare (&code, op0, op1); op1 = const0_rtx; - alpha_compare.fp_p = 0; + cmp_mode = DImode; } /* The general case: fold the comparison code to the types of compares @@ -2457,7 +2453,7 @@ alpha_emit_conditional_branch (enum rtx_code code) case GE: case GT: case GEU: case GTU: /* For FP, we swap them, for INT, we reverse them. */ - if (alpha_compare.fp_p) + if (cmp_mode == DFmode) { cmp_code = swap_condition (code); branch_code = NE; @@ -2474,9 +2470,8 @@ alpha_emit_conditional_branch (enum rtx_code code) gcc_unreachable (); } - if (alpha_compare.fp_p) + if (cmp_mode == DFmode) { - cmp_mode = DFmode; if (flag_unsafe_math_optimizations && cmp_code != UNORDERED) { /* When we are not as concerned about non-finite values, and we @@ -2501,8 +2496,6 @@ alpha_emit_conditional_branch (enum rtx_code code) } else { - cmp_mode = DImode; - /* The following optimizations are only for signed compares. */ if (code != LEU && code != LTU && code != GEU && code != GTU) { @@ -2544,36 +2537,38 @@ alpha_emit_conditional_branch (enum rtx_code code) emit_move_insn (tem, gen_rtx_fmt_ee (cmp_code, cmp_mode, op0, op1)); } - /* Zero the operands. */ - memset (&alpha_compare, 0, sizeof (alpha_compare)); - - /* Return the branch comparison. */ - return gen_rtx_fmt_ee (branch_code, branch_mode, tem, CONST0_RTX (cmp_mode)); + /* Emit the branch instruction. */ + tem = gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_IF_THEN_ELSE (VOIDmode, + gen_rtx_fmt_ee (branch_code, + branch_mode, tem, + CONST0_RTX (cmp_mode)), + gen_rtx_LABEL_REF (VOIDmode, + operands[3]), + pc_rtx)); + emit_jump_insn (tem); } /* Certain simplifications can be done to make invalid setcc operations valid. Return the final comparison, or NULL if we can't work. */ -rtx -alpha_emit_setcc (enum rtx_code code) +bool +alpha_emit_setcc (rtx operands[], enum machine_mode cmp_mode) { enum rtx_code cmp_code; - rtx op0 = alpha_compare.op0, op1 = alpha_compare.op1; - int fp_p = alpha_compare.fp_p; + enum rtx_code code = GET_CODE (operands[1]); + rtx op0 = operands[2], op1 = operands[3]; rtx tmp; - /* Zero the operands. */ - memset (&alpha_compare, 0, sizeof (alpha_compare)); - - if (fp_p && GET_MODE (op0) == TFmode) + if (cmp_mode == TFmode) { op0 = alpha_emit_xfloating_compare (&code, op0, op1); op1 = const0_rtx; - fp_p = 0; + cmp_mode = DImode; } - if (fp_p && !TARGET_FIX) - return NULL_RTX; + if (cmp_mode == DFmode && !TARGET_FIX) + return 0; /* The general case: fold the comparison code to the types of compares that we have, choosing the branch as necessary. */ @@ -2584,12 +2579,12 @@ alpha_emit_setcc (enum rtx_code code) case EQ: case LE: case LT: case LEU: case LTU: case UNORDERED: /* We have these compares. */ - if (fp_p) + if (cmp_mode == DFmode) cmp_code = code, code = NE; break; case NE: - if (!fp_p && op1 == const0_rtx) + if (cmp_mode == DImode && op1 == const0_rtx) break; /* FALLTHRU */ @@ -2601,10 +2596,10 @@ alpha_emit_setcc (enum rtx_code code) case GE: case GT: case GEU: case GTU: /* These normally need swapping, but for integer zero we have special patterns that recognize swapped operands. */ - if (!fp_p && op1 == const0_rtx) + if (cmp_mode == DImode && op1 == const0_rtx) break; code = swap_condition (code); - if (fp_p) + if (cmp_mode == DFmode) cmp_code = code, code = NE; tmp = op0, op0 = op1, op1 = tmp; break; @@ -2613,7 +2608,7 @@ alpha_emit_setcc (enum rtx_code code) gcc_unreachable (); } - if (!fp_p) + if (cmp_mode == DImode) { if (!register_operand (op0, DImode)) op0 = force_reg (DImode, op0); @@ -2624,18 +2619,18 @@ alpha_emit_setcc (enum rtx_code code) /* Emit an initial compare instruction, if necessary. */ if (cmp_code != UNKNOWN) { - enum machine_mode mode = fp_p ? DFmode : DImode; - - tmp = gen_reg_rtx (mode); + tmp = gen_reg_rtx (cmp_mode); emit_insn (gen_rtx_SET (VOIDmode, tmp, - gen_rtx_fmt_ee (cmp_code, mode, op0, op1))); + gen_rtx_fmt_ee (cmp_code, cmp_mode, op0, op1))); - op0 = fp_p ? gen_lowpart (DImode, tmp) : tmp; + op0 = cmp_mode == DImode ? gen_lowpart (DImode, tmp) : tmp; op1 = const0_rtx; } - /* Return the setcc comparison. */ - return gen_rtx_fmt_ee (code, DImode, op0, op1); + /* Emit the setcc instruction. */ + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_fmt_ee (code, DImode, op0, op1))); + return true; } @@ -2651,20 +2646,17 @@ alpha_emit_conditional_move (rtx cmp, enum machine_mode mode) { enum rtx_code code = GET_CODE (cmp); enum rtx_code cmov_code = NE; - rtx op0 = alpha_compare.op0; - rtx op1 = alpha_compare.op1; - int fp_p = alpha_compare.fp_p; + rtx op0 = XEXP (cmp, 0); + rtx op1 = XEXP (cmp, 1); enum machine_mode cmp_mode = (GET_MODE (op0) == VOIDmode ? DImode : GET_MODE (op0)); - enum machine_mode cmp_op_mode = fp_p ? DFmode : DImode; enum machine_mode cmov_mode = VOIDmode; int local_fast_math = flag_unsafe_math_optimizations; rtx tem; - /* Zero the operands. */ - memset (&alpha_compare, 0, sizeof (alpha_compare)); + gcc_assert (cmp_mode == DFmode || cmp_mode == DImode); - if (fp_p != FLOAT_MODE_P (mode)) + if (FLOAT_MODE_P (cmp_mode) != FLOAT_MODE_P (mode)) { enum rtx_code cmp_code; @@ -2691,7 +2683,7 @@ alpha_emit_conditional_move (rtx cmp, enum machine_mode mode) case GE: case GT: case GEU: case GTU: /* These normally need swapping, but for integer zero we have special patterns that recognize swapped operands. */ - if (!fp_p && op1 == const0_rtx) + if (cmp_mode == DImode && op1 == const0_rtx) cmp_code = code, code = NE; else { @@ -2705,22 +2697,21 @@ alpha_emit_conditional_move (rtx cmp, enum machine_mode mode) gcc_unreachable (); } - tem = gen_reg_rtx (cmp_op_mode); + tem = gen_reg_rtx (cmp_mode); emit_insn (gen_rtx_SET (VOIDmode, tem, - gen_rtx_fmt_ee (cmp_code, cmp_op_mode, + gen_rtx_fmt_ee (cmp_code, cmp_mode, op0, op1))); - cmp_mode = cmp_op_mode = fp_p ? DImode : DFmode; - op0 = gen_lowpart (cmp_op_mode, tem); - op1 = CONST0_RTX (cmp_op_mode); - fp_p = !fp_p; + cmp_mode = cmp_mode == DImode ? DFmode : DImode; + op0 = gen_lowpart (cmp_mode, tem); + op1 = CONST0_RTX (cmp_mode); local_fast_math = 1; } /* We may be able to use a conditional move directly. This avoids emitting spurious compares. */ if (signed_comparison_operator (cmp, VOIDmode) - && (!fp_p || local_fast_math) + && (cmp_mode == DImode || local_fast_math) && (op0 == CONST0_RTX (cmp_mode) || op1 == CONST0_RTX (cmp_mode))) return gen_rtx_fmt_ee (code, VOIDmode, op0, op1); @@ -2757,7 +2748,7 @@ alpha_emit_conditional_move (rtx cmp, enum machine_mode mode) gcc_unreachable (); } - if (!fp_p) + if (cmp_mode == DImode) { if (!reg_or_0_operand (op0, DImode)) op0 = force_reg (DImode, op0); @@ -2768,12 +2759,12 @@ alpha_emit_conditional_move (rtx cmp, enum machine_mode mode) /* ??? We mark the branch mode to be CCmode to prevent the compare and cmov from being combined, since the compare insn follows IEEE rules that the cmov does not. */ - if (fp_p && !local_fast_math) + if (cmp_mode == DFmode && !local_fast_math) cmov_mode = CCmode; - tem = gen_reg_rtx (cmp_op_mode); - emit_move_insn (tem, gen_rtx_fmt_ee (code, cmp_op_mode, op0, op1)); - return gen_rtx_fmt_ee (cmov_code, cmov_mode, tem, CONST0_RTX (cmp_op_mode)); + tem = gen_reg_rtx (cmp_mode); + emit_move_insn (tem, gen_rtx_fmt_ee (code, cmp_mode, op0, op1)); + return gen_rtx_fmt_ee (cmov_code, cmov_mode, tem, CONST0_RTX (cmp_mode)); } /* Simplify a conditional move of two constants into a setcc with @@ -5497,7 +5488,7 @@ alpha_initialize_trampoline (rtx tramp, rtx fnaddr, rtx cxt, #ifdef ENABLE_EXECUTE_STACK emit_library_call (init_one_libfunc ("__enable_execute_stack"), - 0, VOIDmode, 1, tramp, Pmode); + LCT_NORMAL, VOIDmode, 1, tramp, Pmode); #endif if (jmpofs >= 0) @@ -10848,6 +10839,9 @@ alpha_init_libfuncs (void) #define TARGET_MANGLE_TYPE alpha_mangle_type #endif +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P alpha_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index f33e8e63854..3bfbd50e89e 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -803,24 +803,6 @@ extern int alpha_memory_latency; #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ function_arg((CUM), (MODE), (TYPE), (NAMED)) -/* Try to output insns to set TARGET equal to the constant C if it can be - done in less than N insns. Do all computations in MODE. Returns the place - where the output has been placed if it can be done and the insns have been - emitted. If it would take more than N insns, zero is returned and no - insns and emitted. */ - -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. Note that we can't use "rtx" here - since it hasn't been defined! */ - -struct alpha_compare -{ - struct rtx_def *op0, *op1; - int fp_p; -}; - -extern struct alpha_compare alpha_compare; - /* Make (or fake) .linkage entry for function call. IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */ @@ -992,23 +974,6 @@ do { \ #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X) #endif -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a - valid memory address for an instruction. */ - -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ -do { \ - if (alpha_legitimate_address_p (MODE, X, 1)) \ - goto WIN; \ -} while (0) -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ -do { \ - if (alpha_legitimate_address_p (MODE, X, 0)) \ - goto WIN; \ -} while (0) -#endif - /* Try a machine-dependent way of reloading an illegitimate address operand. If we find one, push the reload and jump to WIN. This macro is used in only one place: `find_reloads_address' in reload.c. */ diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 543ed533080..e6a05780bba 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -3963,206 +3963,53 @@ ;; These are the main define_expand's used to make conditional branches ;; and compares. -(define_expand "cmpdf" - [(set (cc0) (compare (match_operand:DF 0 "reg_or_0_operand" "") - (match_operand:DF 1 "reg_or_0_operand" "")))] +(define_expand "cbranchdf4" + [(use (match_operator 0 "alpha_cbranch_operator" + [(match_operand:DF 1 "reg_or_0_operand" "") + (match_operand:DF 2 "reg_or_0_operand" "")])) + (use (match_operand 3 ""))] "TARGET_FP" -{ - alpha_compare.op0 = operands[0]; - alpha_compare.op1 = operands[1]; - alpha_compare.fp_p = 1; - DONE; -}) + { alpha_emit_conditional_branch (operands, DFmode); DONE; }) -(define_expand "cmptf" - [(set (cc0) (compare (match_operand:TF 0 "general_operand" "") - (match_operand:TF 1 "general_operand" "")))] +(define_expand "cbranchtf4" + [(use (match_operator 0 "alpha_cbranch_operator" + [(match_operand:TF 1 "general_operand") + (match_operand:TF 2 "general_operand")])) + (use (match_operand 3 ""))] "TARGET_HAS_XFLOATING_LIBS" -{ - alpha_compare.op0 = operands[0]; - alpha_compare.op1 = operands[1]; - alpha_compare.fp_p = 1; - DONE; -}) - -(define_expand "cmpdi" - [(set (cc0) (compare (match_operand:DI 0 "some_operand" "") - (match_operand:DI 1 "some_operand" "")))] - "" -{ - alpha_compare.op0 = operands[0]; - alpha_compare.op1 = operands[1]; - alpha_compare.fp_p = 0; - DONE; -}) - -(define_expand "beq" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (EQ); }") - -(define_expand "bne" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (NE); }") - -(define_expand "blt" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (LT); }") + { alpha_emit_conditional_branch (operands, TFmode); DONE; }) -(define_expand "ble" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (LE); }") - -(define_expand "bgt" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] +(define_expand "cbranchdi4" + [(use (match_operator 0 "alpha_cbranch_operator" + [(match_operand:DI 1 "some_operand") + (match_operand:DI 2 "some_operand")])) + (use (match_operand 3 ""))] "" - "{ operands[1] = alpha_emit_conditional_branch (GT); }") + { alpha_emit_conditional_branch (operands, DImode); DONE; }) -(define_expand "bge" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (GE); }") - -(define_expand "bltu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (LTU); }") - -(define_expand "bleu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (LEU); }") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (GTU); }") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (GEU); }") - -(define_expand "bunordered" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (UNORDERED); }") - -(define_expand "bordered" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ operands[1] = alpha_emit_conditional_branch (ORDERED); }") - -(define_expand "seq" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (EQ)) == NULL_RTX) FAIL; }") - -(define_expand "sne" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (NE)) == NULL_RTX) FAIL; }") - -(define_expand "slt" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (LT)) == NULL_RTX) FAIL; }") - -(define_expand "sle" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (LE)) == NULL_RTX) FAIL; }") - -(define_expand "sgt" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (GT)) == NULL_RTX) FAIL; }") - -(define_expand "sge" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (GE)) == NULL_RTX) FAIL; }") - -(define_expand "sltu" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (LTU)) == NULL_RTX) FAIL; }") - -(define_expand "sleu" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (LEU)) == NULL_RTX) FAIL; }") - -(define_expand "sgtu" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (GTU)) == NULL_RTX) FAIL; }") - -(define_expand "sgeu" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (GEU)) == NULL_RTX) FAIL; }") +(define_expand "cstoredf4" + [(use (match_operator:DI 1 "alpha_cbranch_operator" + [(match_operand:DF 2 "reg_or_0_operand") + (match_operand:DF 3 "reg_or_0_operand")])) + (clobber (match_operand:DI 0 "register_operand"))] + "TARGET_FP" + { if (!alpha_emit_setcc (operands, DFmode)) FAIL; else DONE; }) -(define_expand "sunordered" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] - "" - "{ if ((operands[1] = alpha_emit_setcc (UNORDERED)) == NULL_RTX) FAIL; }") +(define_expand "cstoretf4" + [(use (match_operator:DI 1 "alpha_cbranch_operator" + [(match_operand:TF 2 "general_operand") + (match_operand:TF 3 "general_operand")])) + (clobber (match_operand:DI 0 "register_operand"))] + "TARGET_HAS_XFLOATING_LIBS" + { if (!alpha_emit_setcc (operands, TFmode)) FAIL; else DONE; }) -(define_expand "sordered" - [(set (match_operand:DI 0 "register_operand" "") - (match_dup 1))] +(define_expand "cstoredi4" + [(use (match_operator:DI 1 "alpha_cbranch_operator" + [(match_operand:DI 2 "some_operand") + (match_operand:DI 3 "some_operand")])) + (clobber (match_operand:DI 0 "register_operand"))] "" - "{ if ((operands[1] = alpha_emit_setcc (ORDERED)) == NULL_RTX) FAIL; }") + { if (!alpha_emit_setcc (operands, DImode)) FAIL; else DONE; }) ;; These are the main define_expand's used to make conditional moves. @@ -6766,7 +6613,7 @@ rtx loop_label = gen_label_rtx (); rtx want = gen_reg_rtx (Pmode); rtx tmp = gen_reg_rtx (Pmode); - rtx memref; + rtx memref, test; emit_insn (gen_subdi3 (want, stack_pointer_rtx, force_reg (Pmode, operands[1]))); @@ -6775,8 +6622,8 @@ if (!CONST_INT_P (operands[1])) { out_label = gen_label_rtx (); - emit_insn (gen_cmpdi (want, tmp)); - emit_jump_insn (gen_bgeu (out_label)); + test = gen_rtx_GEU (VOIDmode, want, tmp); + emit_jump_insn (gen_cbranchdi4 (test, want, tmp, out_label)); } emit_label (loop_label); @@ -6784,8 +6631,8 @@ MEM_VOLATILE_P (memref) = 1; emit_move_insn (memref, const0_rtx); emit_insn (gen_adddi3 (tmp, tmp, GEN_INT(-8192))); - emit_insn (gen_cmpdi (tmp, want)); - emit_jump_insn (gen_bgtu (loop_label)); + test = gen_rtx_GTU (VOIDmode, tmp, want); + emit_jump_insn (gen_cbranchdi4 (test, tmp, want, loop_label)); memref = gen_rtx_MEM (DImode, want); MEM_VOLATILE_P (memref) = 1; diff --git a/gcc/config/alpha/predicates.md b/gcc/config/alpha/predicates.md index 425134ac820..ec11eaa3d1f 100644 --- a/gcc/config/alpha/predicates.md +++ b/gcc/config/alpha/predicates.md @@ -543,6 +543,12 @@ (and (match_code "reg") (match_operand 0 "register_operand"))) +;; Return 1 if OP is a valid Alpha comparison operator for "cbranch" +;; instructions. +(define_predicate "alpha_cbranch_operator" + (ior (match_operand 0 "ordered_comparison_operator") + (match_code "ordered,unordered"))) + ;; Return 1 if OP is a valid Alpha comparison operator for "cmp" style ;; instructions. (define_predicate "alpha_comparison_operator" diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 3f81f611f80..1f456b63cd7 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -49,10 +49,6 @@ int arc_cpu_type; cpu (or NULL). */ const char *arc_mangle_cpu; -/* Save the operands last given to a compare for use when we - generate a scc or bcc insn. */ -rtx arc_compare_op0, arc_compare_op1; - /* Name of text, data, and rodata sections used in varasm.c. */ const char *arc_text_section; const char *arc_data_section; @@ -729,21 +725,14 @@ proper_comparison_operator (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) /* Misc. utilities. */ -/* X and Y are two things to compare using CODE. Emit the compare insn and - return the rtx for the cc reg in the proper mode. */ +/* X and Y are two things to compare using CODE. Return the rtx + for the cc reg in the proper mode. */ rtx gen_compare_reg (enum rtx_code code, rtx x, rtx y) { enum machine_mode mode = SELECT_CC_MODE (code, x, y); - rtx cc_reg; - - cc_reg = gen_rtx_REG (mode, 61); - - emit_insn (gen_rtx_SET (VOIDmode, cc_reg, - gen_rtx_COMPARE (mode, x, y))); - - return cc_reg; + return gen_rtx_REG (mode, 61); } /* Return 1 if VALUE, a const_double, will fit in a limm (4 byte number). diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index db6829bc560..4153ad6f6b6 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -1067,11 +1067,6 @@ do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0) /* ??? Not defined in tm.texi. */ #define SETJMP_VIA_SAVE_AREA -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. Note that we can't use "rtx" here - since it hasn't been defined! */ -extern struct rtx_def *arc_compare_op0, *arc_compare_op1; - /* ARC function types. */ enum arc_function_type { ARC_FUNCTION_UNKNOWN, ARC_FUNCTION_NORMAL, diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index b67984babbb..09e47daf1d1 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -585,29 +585,11 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg - = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), - 61); - - operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); + rtx cc_reg = gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, cc_reg, const0_rtx); }") -;(define_expand "movdicc" -; [(set (match_operand:DI 0 "register_operand" "") -; (if_then_else:DI (match_operand 1 "comparison_operator" "") -; (match_operand:DI 2 "nonmemory_operand" "") -; (match_operand:DI 3 "register_operand" "")))] -; "0 /* ??? this would work better if we had cmpdi */" -; " -;{ -; enum rtx_code code = GET_CODE (operands[1]); -; rtx ccreg -; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), -; 61); -; -; operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); -;}") - (define_expand "movsfcc" [(set (match_operand:SF 0 "register_operand" "") (if_then_else:SF (match_operand 1 "comparison_operator" "") @@ -617,29 +599,11 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg - = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), - 61); - - operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); + rtx cc_reg = gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, cc_reg, const0_rtx); }") -;(define_expand "movdfcc" -; [(set (match_operand:DF 0 "register_operand" "") -; (if_then_else:DF (match_operand 1 "comparison_operator" "") -; (match_operand:DF 2 "nonmemory_operand" "") -; (match_operand:DF 3 "register_operand" "")))] -; "0 /* ??? can generate less efficient code if constants involved */" -; " -;{ -; enum rtx_code code = GET_CODE (operands[1]); -; rtx ccreg -; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), -; 61); -; -; operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); -;}") - (define_insn "*movsicc_insn" [(set (match_operand:SI 0 "register_operand" "=r") (if_then_else:SI (match_operand 1 "comparison_operator" "") @@ -649,32 +613,6 @@ "mov.%d1 %0,%S2" [(set_attr "type" "cmove")]) -; ??? This doesn't properly handle constants. -;(define_insn "*movdicc_insn" -; [(set (match_operand:DI 0 "register_operand" "=r,r") -; (if_then_else:DI (match_operand 1 "comparison_operator" "") -; (match_operand:DI 2 "nonmemory_operand" "r,Ji") -; (match_operand:DI 3 "register_operand" "0,0")))] -; "0" -; "* -;{ -; switch (which_alternative) -; { -; case 0 : -; /* We normally copy the low-numbered register first. However, if -; the first register operand 0 is the same as the second register of -; operand 1, we must copy in the opposite order. */ -; if (REGNO (operands[0]) == REGNO (operands[2]) + 1) -; return \"mov.%d1 %R0,%R2\;mov.%d1 %0,%2\"; -; else -; return \"mov.%d1 %0,%2\;mov.%d1 %R0,%R2\"; -; case 1 : -; return \"mov.%d1 %0,%2\;mov.%d1 %R0,%R2\"; -; } -;}" -; [(set_attr "type" "cmove,cmove") -; (set_attr "length" "2,4")]) - (define_insn "*movsfcc_insn" [(set (match_operand:SF 0 "register_operand" "=r,r") (if_then_else:SF (match_operand 1 "comparison_operator" "") @@ -686,30 +624,6 @@ mov.%d1 %0,%2 ; %A2" [(set_attr "type" "cmove,cmove")]) -;(define_insn "*movdfcc_insn" -; [(set (match_operand:DF 0 "register_operand" "=r,r") -; (if_then_else:DF (match_operand 1 "comparison_operator" "") -; (match_operand:DF 2 "nonmemory_operand" "r,E") -; (match_operand:DF 3 "register_operand" "0,0")))] -; "0" -; "* -;{ -; switch (which_alternative) -; { -; case 0 : -; /* We normally copy the low-numbered register first. However, if -; the first register operand 0 is the same as the second register of -; operand 1, we must copy in the opposite order. */ -; if (REGNO (operands[0]) == REGNO (operands[2]) + 1) -; return \"mov.%d1 %R0,%R2\;mov.%d1 %0,%2\"; -; else -; return \"mov.%d1 %0,%2\;mov.%d1 %R0,%R2\"; -; case 1 : -; return \"mov.%d1 %0,%L2\;mov.%d1 %R0,%H2 ; %A2\"; -; } -;}" -; [(set_attr "type" "cmove,cmove") -; (set_attr "length" "2,4")]) ;; Zero extension instructions. ;; ??? We don't support volatile memrefs here, but I'm not sure why. @@ -1156,22 +1070,6 @@ ;; Compare instructions. ;; This controls RTL generation and register allocation. -;; We generate RTL for comparisons and branches by having the cmpxx -;; patterns store away the operands. Then, the scc and bcc patterns -;; emit RTL for both the compare and the branch. - -(define_expand "cmpsi" - [(set (reg:CC 61) - (compare:CC (match_operand:SI 0 "register_operand" "") - (match_operand:SI 1 "nonmemory_operand" "")))] - "" - " -{ - arc_compare_op0 = operands[0]; - arc_compare_op1 = operands[1]; - DONE; -}") - ;; ??? We may be able to relax this a bit by adding a new constant 'K' for 0. ;; This assumes sub.f 0,symbol,0 is a valid insn. ;; Note that "sub.f 0,r0,1" is an 8 byte insn. To avoid unnecessarily @@ -1211,96 +1109,25 @@ sub.f 0,%0,%1" [(set_attr "type" "compare,compare,compare")]) -;; Next come the scc insns. - -(define_expand "seq" - [(set (match_operand:SI 0 "register_operand" "=r") - (eq:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (EQ, arc_compare_op0, arc_compare_op1); -}") +;; Next come the scc insn and its expander. -(define_expand "sne" - [(set (match_operand:SI 0 "register_operand" "=r") - (ne:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (NE, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "sgt" - [(set (match_operand:SI 0 "register_operand" "=r") - (gt:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (GT, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "sle" - [(set (match_operand:SI 0 "register_operand" "=r") - (le:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (LE, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "sge" - [(set (match_operand:SI 0 "register_operand" "=r") - (ge:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (GE, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "slt" - [(set (match_operand:SI 0 "register_operand" "=r") - (lt:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (LT, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "sgtu" - [(set (match_operand:SI 0 "register_operand" "=r") - (gtu:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (GTU, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "sleu" - [(set (match_operand:SI 0 "register_operand" "=r") - (leu:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (LEU, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "sgeu" - [(set (match_operand:SI 0 "register_operand" "=r") - (geu:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = gen_compare_reg (GEU, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "sltu" - [(set (match_operand:SI 0 "register_operand" "=r") - (ltu:SI (match_dup 1) (const_int 0)))] +(define_expand "cstoresi4" + [(set (match_dup 4) + (match_op_dup 5 + [(match_operand:SI 2 "register_operand" "") + (match_operand:SI 3 "nonmemory_operand" "")])) + (set (match_operand:SI 0 "register_operand") + (match_operator:SI 1 "ordered_comparison_operator" + [(match_dup 4) + (const_int 0)]))] "" " { - operands[1] = gen_compare_reg (LTU, arc_compare_op0, arc_compare_op1); + operands[4] = gen_compare_reg (GET_CODE (operands[1]), + operands[2], operands[3]); + operands[5] = gen_rtx_fmt_ee (COMPARE, + GET_MODE (operands[4]), + operands[2], operands[3]); }") (define_insn "*scc_insn" @@ -1332,114 +1159,26 @@ ;; These control RTL generation for conditional jump insns -(define_expand "beq" - [(set (pc) - (if_then_else (eq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (EQ, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (NE, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (GT, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "ble" - [(set (pc) - (if_then_else (le (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (LE, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (GE, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (LT, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (GTU, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (LEU, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare_reg (GEU, arc_compare_op0, arc_compare_op1); -}") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] +(define_expand "cbranchsi4" + [(set (match_dup 4) + (match_op_dup 5 + [(match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" "")])) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" + [(match_dup 4) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" " { - operands[1] = gen_compare_reg (LTU, arc_compare_op0, arc_compare_op1); + operands[4] = gen_compare_reg (GET_CODE (operands[0]), + operands[1], operands[2]); + operands[5] = gen_rtx_fmt_ee (COMPARE, + GET_MODE (operands[4]), + operands[1], operands[2]); }") ;; Now match both normal and inverted jump. diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 34d266b139b..3b7ba794fa4 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -54,9 +54,7 @@ extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, enum machine_mode, extern int legitimate_pic_operand_p (rtx); extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); extern rtx legitimize_tls_address (rtx, rtx); -extern int arm_legitimate_address_p (enum machine_mode, rtx, RTX_CODE, int); -extern int thumb1_legitimate_address_p (enum machine_mode, rtx, int); -extern int thumb2_legitimate_address_p (enum machine_mode, rtx, int); +extern int arm_legitimate_address_outer_p (enum machine_mode, rtx, RTX_CODE, int); extern int thumb_legitimate_offset_p (enum machine_mode, HOST_WIDE_INT); extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int, int); diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 1d9b4265843..464bba57720 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -76,6 +76,7 @@ static int thumb1_base_register_rtx_p (rtx, enum machine_mode, int); static rtx arm_legitimize_address (rtx, rtx, enum machine_mode); static rtx thumb_legitimize_address (rtx, rtx, enum machine_mode); inline static int thumb1_index_register_rtx_p (rtx, int); +static bool arm_legitimate_address_p (enum machine_mode, rtx, bool); static int thumb_far_jump_used_p (void); static bool thumb_force_lr_save (void); static int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); @@ -403,6 +404,9 @@ static bool arm_allocate_stack_slots_for_args (void); #define TARGET_ASM_OUTPUT_DWARF_DTPREL arm_output_dwarf_dtprel #endif +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P arm_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; /* Obstack for minipool constant handling. */ @@ -418,10 +422,6 @@ extern FILE * asm_out_file; /* True if we are currently building a constant table. */ int making_const_table; -/* Define the information needed to generate branch insns. This is - stored from the compare operation. */ -rtx arm_compare_op0, arm_compare_op1; - /* The processor for which instructions should be scheduled. */ enum processor_type arm_tune = arm_none; @@ -3918,8 +3918,8 @@ pcrel_constant_p (rtx x) /* Return nonzero if X is a valid ARM state address operand. */ int -arm_legitimate_address_p (enum machine_mode mode, rtx x, RTX_CODE outer, - int strict_p) +arm_legitimate_address_outer_p (enum machine_mode mode, rtx x, RTX_CODE outer, + int strict_p) { bool use_ldrd; enum rtx_code code = GET_CODE (x); @@ -4003,7 +4003,7 @@ arm_legitimate_address_p (enum machine_mode mode, rtx x, RTX_CODE outer, } /* Return nonzero if X is a valid Thumb-2 address operand. */ -int +static int thumb2_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) { bool use_ldrd; @@ -4309,7 +4309,7 @@ thumb1_index_register_rtx_p (rtx x, int strict_p) addresses based on the frame pointer or arg pointer until the reload pass starts. This is so that eliminating such addresses into stack based ones won't produce impossible code. */ -int +static int thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) { /* ??? Not clear if this is right. Experiment. */ @@ -4423,6 +4423,17 @@ thumb_legitimate_offset_p (enum machine_mode mode, HOST_WIDE_INT val) } } +bool +arm_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) +{ + if (TARGET_ARM) + return arm_legitimate_address_outer_p (mode, x, SET, strict_p); + else if (TARGET_THUMB2) + return thumb2_legitimate_address_p (mode, x, strict_p); + else /* if (TARGET_THUMB1) */ + return thumb1_legitimate_address_p (mode, x, strict_p); +} + /* Build the SYMBOL_REF for __tls_get_addr. */ static GTY(()) rtx tls_get_addr_libfunc; @@ -4658,7 +4669,7 @@ arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) } /* XXX We don't allow MINUS any more -- see comment in - arm_legitimate_address_p (). */ + arm_legitimate_address_outer_p (). */ else if (GET_CODE (x) == MINUS) { rtx xop0 = XEXP (x, 0); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index e7bc7a7a2d5..ee0eee694d2 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -124,10 +124,6 @@ extern arm_cc arm_current_cc; extern int arm_target_label; extern int arm_ccfsm_state; extern GTY(()) rtx arm_target_insn; -/* Define the information needed to generate branch insns. This is - stored from the compare operation. */ -extern GTY(()) rtx arm_compare_op0; -extern GTY(()) rtx arm_compare_op1; /* The label of the current constant pool. */ extern rtx pool_vector_label; /* Set to 1 when a return insn is output, this means that the epilogue @@ -484,10 +480,9 @@ extern int arm_arch_hwdiv; } #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \ - if ((GET_MODE_CLASS (MODE) == MODE_INT \ - || GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT) \ + if (GET_MODE_CLASS (MODE) == MODE_INT \ && GET_MODE_SIZE (MODE) < 4) \ - (MODE) = SImode; \ + (MODE) = SImode; /* Define this if most significant bit is lowest numbered in instructions that operate on numbered bit-fields. */ @@ -2166,43 +2161,11 @@ typedef struct #define REG_MODE_OK_FOR_REG_BASE_P(X, MODE) \ REG_OK_FOR_INDEX_P (X) -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression - that is a valid memory address for an instruction. - The MODE argument is the machine mode for the MEM expression - that wants to use this address. */ - #define ARM_BASE_REGISTER_RTX_P(X) \ (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X)) #define ARM_INDEX_REGISTER_RTX_P(X) \ (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X)) - -#define ARM_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \ - { \ - if (arm_legitimate_address_p (MODE, X, SET, REG_STRICT_P)) \ - goto WIN; \ - } - -#define THUMB2_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \ - { \ - if (thumb2_legitimate_address_p (MODE, X, REG_STRICT_P)) \ - goto WIN; \ - } - -#define THUMB1_GO_IF_LEGITIMATE_ADDRESS(MODE,X,WIN) \ - { \ - if (thumb1_legitimate_address_p (MODE, X, REG_STRICT_P)) \ - goto WIN; \ - } - -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ - if (TARGET_ARM) \ - ARM_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN) \ - else if (TARGET_THUMB2) \ - THUMB2_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN) \ - else /* if (TARGET_THUMB1) */ \ - THUMB1_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN) - /* Define this for compatibility reasons. */ #define HANDLE_PRAGMA_PACK_PUSH_POP diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 801865287b7..b18173e1aff 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -6386,8 +6386,16 @@ (match_operand:SI 2 "nonmemory_operand" "")]) (label_ref (match_operand 3 "" "")) (pc)))] - "TARGET_THUMB1" + "TARGET_THUMB1 || TARGET_32BIT" " + if (!TARGET_THUMB1) + { + if (!arm_add_operand (operands[2], SImode)) + operands[2] = force_reg (SImode, operands[2]); + emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2], + operands[3])); + DONE; + } if (thumb1_cmpneg_operand (operands[2], SImode)) { emit_jump_insn (gen_cbranchsi4_scratch (NULL, operands[1], operands[2], @@ -6398,6 +6406,43 @@ operands[2] = force_reg (SImode, operands[2]); ") +(define_expand "cbranchsf4" + [(set (pc) (if_then_else + (match_operator 0 "arm_comparison_operator" + [(match_operand:SF 1 "s_register_operand" "") + (match_operand:SF 2 "arm_float_compare_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_32BIT && TARGET_HARD_FLOAT" + "emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2], + operands[3])); DONE;" +) + +(define_expand "cbranchdf4" + [(set (pc) (if_then_else + (match_operator 0 "arm_comparison_operator" + [(match_operand:DF 1 "s_register_operand" "") + (match_operand:DF 2 "arm_float_compare_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_32BIT && TARGET_HARD_FLOAT" + "emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2], + operands[3])); DONE;" +) + +;; this uses the Cirrus DI compare instruction +(define_expand "cbranchdi4" + [(set (pc) (if_then_else + (match_operator 0 "arm_comparison_operator" + [(match_operand:DI 1 "cirrus_fp_register" "") + (match_operand:DI 2 "cirrus_fp_register" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" + "emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2], + operands[3])); DONE;" +) + (define_insn "*cbranchsi4_insn" [(set (pc) (if_then_else (match_operator 0 "arm_comparison_operator" @@ -7451,39 +7496,6 @@ ;; Comparison and test insns -(define_expand "cmpsi" - [(match_operand:SI 0 "s_register_operand" "") - (match_operand:SI 1 "arm_add_operand" "")] - "TARGET_32BIT" - "{ - arm_compare_op0 = operands[0]; - arm_compare_op1 = operands[1]; - DONE; - }" -) - -(define_expand "cmpsf" - [(match_operand:SF 0 "s_register_operand" "") - (match_operand:SF 1 "arm_float_compare_operand" "")] - "TARGET_32BIT && TARGET_HARD_FLOAT" - " - arm_compare_op0 = operands[0]; - arm_compare_op1 = operands[1]; - DONE; - " -) - -(define_expand "cmpdf" - [(match_operand:DF 0 "s_register_operand" "") - (match_operand:DF 1 "arm_float_compare_operand" "")] - "TARGET_32BIT && TARGET_HARD_FLOAT" - " - arm_compare_op0 = operands[0]; - arm_compare_op1 = operands[1]; - DONE; - " -) - (define_insn "*arm_cmpsi_insn" [(set (reg:CC CC_REGNUM) (compare:CC (match_operand:SI 0 "s_register_operand" "r,r") @@ -7562,17 +7574,6 @@ (set_attr "cirrus" "compare")] ) -;; Cirrus DI compare instruction -(define_expand "cmpdi" - [(match_operand:DI 0 "cirrus_fp_register" "") - (match_operand:DI 1 "cirrus_fp_register" "")] - "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" - "{ - arm_compare_op0 = operands[0]; - arm_compare_op1 = operands[1]; - DONE; - }") - (define_insn "*cirrus_cmpdi" [(set (reg:CC CC_REGNUM) (compare:CC (match_operand:DI 0 "cirrus_fp_register" "v") @@ -7600,170 +7601,16 @@ ;; Conditional branch insns -(define_expand "beq" - [(set (pc) - (if_then_else (eq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (EQ, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bne" +(define_expand "cbranch_cc" [(set (pc) - (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (NE, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "" [(match_operand 1 "" "") + (match_operand 2 "" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GT, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "ble" - [(set (pc) - (if_then_else (le (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LT, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GTU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GEU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LTU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bunordered" - [(set (pc) - (if_then_else (unordered (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNORDERED, arm_compare_op0, - arm_compare_op1);" -) - -(define_expand "bordered" - [(set (pc) - (if_then_else (ordered (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (ORDERED, arm_compare_op0, - arm_compare_op1);" -) - -(define_expand "bungt" - [(set (pc) - (if_then_else (ungt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bunlt" - [(set (pc) - (if_then_else (unlt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bunge" - [(set (pc) - (if_then_else (unge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bunle" - [(set (pc) - (if_then_else (unle (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0, arm_compare_op1);" -) - -;; The following two patterns need two branch instructions, since there is -;; no single instruction that will handle all cases. -(define_expand "buneq" - [(set (pc) - (if_then_else (uneq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNEQ, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "bltgt" - [(set (pc) - (if_then_else (ltgt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (LTGT, arm_compare_op0, arm_compare_op1);" + "operands[1] = arm_gen_compare_reg (GET_CODE (operands[0]), + operands[1], operands[2]); + operands[2] = const0_rtx;" ) ;; @@ -7876,141 +7723,16 @@ ; scc insns -(define_expand "seq" - [(set (match_operand:SI 0 "s_register_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (EQ, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sne" - [(set (match_operand:SI 0 "s_register_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (NE, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sgt" - [(set (match_operand:SI 0 "s_register_operand" "") - (gt:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GT, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sle" - [(set (match_operand:SI 0 "s_register_operand" "") - (le:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LE, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sge" - [(set (match_operand:SI 0 "s_register_operand" "") - (ge:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GE, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "slt" - [(set (match_operand:SI 0 "s_register_operand" "") - (lt:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LT, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sgtu" - [(set (match_operand:SI 0 "s_register_operand" "") - (gtu:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GTU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sleu" - [(set (match_operand:SI 0 "s_register_operand" "") - (leu:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LEU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sgeu" +(define_expand "cstore_cc" [(set (match_operand:SI 0 "s_register_operand" "") - (geu:SI (match_dup 1) (const_int 0)))] + (match_operator:SI 1 "" [(match_operand 2 "" "") + (match_operand 3 "" "")]))] "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (GEU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sltu" - [(set (match_operand:SI 0 "s_register_operand" "") - (ltu:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT" - "operands[1] = arm_gen_compare_reg (LTU, arm_compare_op0, arm_compare_op1);" -) - -(define_expand "sunordered" - [(set (match_operand:SI 0 "s_register_operand" "") - (unordered:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNORDERED, arm_compare_op0, - arm_compare_op1);" -) - -(define_expand "sordered" - [(set (match_operand:SI 0 "s_register_operand" "") - (ordered:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (ORDERED, arm_compare_op0, - arm_compare_op1);" -) - -(define_expand "sungt" - [(set (match_operand:SI 0 "s_register_operand" "") - (ungt:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNGT, arm_compare_op0, - arm_compare_op1);" -) - -(define_expand "sunge" - [(set (match_operand:SI 0 "s_register_operand" "") - (unge:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNGE, arm_compare_op0, - arm_compare_op1);" -) - -(define_expand "sunlt" - [(set (match_operand:SI 0 "s_register_operand" "") - (unlt:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNLT, arm_compare_op0, - arm_compare_op1);" -) - -(define_expand "sunle" - [(set (match_operand:SI 0 "s_register_operand" "") - (unle:SI (match_dup 1) (const_int 0)))] - "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" - "operands[1] = arm_gen_compare_reg (UNLE, arm_compare_op0, - arm_compare_op1);" + "operands[2] = arm_gen_compare_reg (GET_CODE (operands[1]), + operands[2], operands[3]); + operands[3] = const0_rtx;" ) -;;; DO NOT add patterns for SUNEQ or SLTGT, these can't be represented with -;;; simple ARM instructions. -; -; (define_expand "suneq" -; [(set (match_operand:SI 0 "s_register_operand" "") -; (uneq:SI (match_dup 1) (const_int 0)))] -; "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -; "gcc_unreachable ();" -; ) -; -; (define_expand "sltgt" -; [(set (match_operand:SI 0 "s_register_operand" "") -; (ltgt:SI (match_dup 1) (const_int 0)))] -; "TARGET_32BIT && TARGET_HARD_FLOAT && (TARGET_FPA || TARGET_VFP)" -; "gcc_unreachable ();" -; ) - (define_insn "*mov_scc" [(set (match_operand:SI 0 "s_register_operand" "=r") (match_operator:SI 1 "arm_comparison_operator" @@ -8046,10 +7768,19 @@ (match_operator:SI 1 "arm_comparison_operator" [(match_operand:SI 2 "s_register_operand" "") (match_operand:SI 3 "reg_or_int_operand" "")]))] - "TARGET_THUMB1" + "TARGET_32BIT || TARGET_THUMB1" "{ rtx op3, scratch, scratch2; + if (!TARGET_THUMB1) + { + if (!arm_add_operand (operands[3], SImode)) + operands[3] = force_reg (SImode, operands[3]); + emit_insn (gen_cstore_cc (operands[0], operands[1], + operands[2], operands[3])); + DONE; + } + if (operands[3] == const0_rtx) { switch (GET_CODE (operands[1])) @@ -8170,6 +7901,38 @@ DONE; }") +(define_expand "cstoresf4" + [(set (match_operand:SI 0 "s_register_operand" "") + (match_operator:SI 1 "arm_comparison_operator" + [(match_operand:SF 2 "s_register_operand" "") + (match_operand:SF 3 "arm_float_compare_operand" "")]))] + "TARGET_32BIT && TARGET_HARD_FLOAT" + "emit_insn (gen_cstore_cc (operands[0], operands[1], + operands[2], operands[3])); DONE;" +) + +(define_expand "cstoredf4" + [(set (match_operand:SI 0 "s_register_operand" "") + (match_operator:SI 1 "arm_comparison_operator" + [(match_operand:DF 2 "s_register_operand" "") + (match_operand:DF 3 "arm_float_compare_operand" "")]))] + "TARGET_32BIT && TARGET_HARD_FLOAT" + "emit_insn (gen_cstore_cc (operands[0], operands[1], + operands[2], operands[3])); DONE;" +) + +;; this uses the Cirrus DI compare instruction +(define_expand "cstoredi4" + [(set (match_operand:SI 0 "s_register_operand" "") + (match_operator:SI 1 "arm_comparison_operator" + [(match_operand:DI 2 "cirrus_fp_register" "") + (match_operand:DI 3 "cirrus_fp_register" "")]))] + "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK" + "emit_insn (gen_cstore_cc (operands[0], operands[1], + operands[2], operands[3])); DONE;" +) + + (define_expand "cstoresi_eq0_thumb1" [(parallel [(set (match_operand:SI 0 "s_register_operand" "") @@ -8250,7 +8013,8 @@ if (code == UNEQ || code == LTGT) FAIL; - ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); + ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); }" ) @@ -8275,7 +8039,8 @@ || (!arm_float_add_operand (operands[3], SFmode))) operands[3] = force_reg (SFmode, operands[3]); - ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); + ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); }" ) @@ -8294,7 +8059,8 @@ if (code == UNEQ || code == LTGT) FAIL; - ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1); + ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); }" ) diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md index 0c8fa733f75..b5ade5ce1f3 100644 --- a/gcc/config/arm/constraints.md +++ b/gcc/config/arm/constraints.md @@ -231,8 +231,8 @@ In ARM state an address valid in ldrsb instructions." (and (match_code "mem") (match_test "TARGET_ARM - && arm_legitimate_address_p (GET_MODE (op), XEXP (op, 0), - SIGN_EXTEND, 0)"))) + && arm_legitimate_address_outer_p (GET_MODE (op), XEXP (op, 0), + SIGN_EXTEND, 0)"))) (define_memory_constraint "Q" "@internal diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index c7d63355d34..7997cc94cf5 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -191,9 +191,13 @@ (define_special_predicate "equality_operator" (match_code "eq,ne")) -;; True for comparisons other than LTGT or UNEQ. +;; True for integer comparisons and, if FP is active, for comparisons +;; other than LTGT or UNEQ. (define_special_predicate "arm_comparison_operator" - (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt")) + (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu") + (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT + && (TARGET_FPA || TARGET_VFP)") + (match_code "unordered,ordered,unlt,unle,unge,ungt")))) (define_special_predicate "minmax_operator" (and (match_code "smin,smax,umin,umax") @@ -231,8 +235,8 @@ (define_special_predicate "arm_extendqisi_mem_op" (and (match_operand 0 "memory_operand") - (match_test "arm_legitimate_address_p (mode, XEXP (op, 0), SIGN_EXTEND, - 0)"))) + (match_test "arm_legitimate_address_outer_p (mode, XEXP (op, 0), + SIGN_EXTEND, 0)"))) (define_special_predicate "arm_reg_or_extendqisi_mem_op" (ior (match_operand 0 "arm_extendqisi_mem_op") diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h index 44246901b32..03b84c00049 100644 --- a/gcc/config/avr/avr-protos.h +++ b/gcc/config/avr/avr-protos.h @@ -61,7 +61,6 @@ extern void function_arg_advance (CUMULATIVE_ARGS *cum, #ifdef RTX_CODE extern void asm_output_external_libcall (FILE *file, rtx symref); -extern int legitimate_address_p (enum machine_mode mode, rtx x, int strict); extern int compare_diff_p (rtx insn); extern const char *output_movqi (rtx insn, rtx operands[], int *l); extern const char *output_movhi (rtx insn, rtx operands[], int *l); @@ -72,8 +71,8 @@ extern const char *out_movhi_mr_r (rtx insn, rtx op[], int *l); extern const char *out_movsi_r_mr (rtx insn, rtx op[], int *l); extern const char *out_movsi_mr_r (rtx insn, rtx op[], int *l); extern const char *output_movsisf (rtx insn, rtx operands[], int *l); -extern const char *out_tstsi (rtx insn, int *l); -extern const char *out_tsthi (rtx insn, int *l); +extern const char *out_tstsi (rtx insn, rtx src, int *l); +extern const char *out_tsthi (rtx insn, rtx src, int *l); extern const char *ret_cond_branch (rtx x, int len, int reverse); extern const char *ashlqi3_out (rtx insn, rtx operands[], int *len); diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 6bcc8e80372..ed668b67495 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -71,6 +71,7 @@ const struct attribute_spec avr_attribute_table[]; static bool avr_assemble_integer (rtx, unsigned int, int); static void avr_file_start (void); static void avr_file_end (void); +static bool avr_legitimate_address_p (enum machine_mode, rtx, bool); static void avr_asm_function_end_prologue (FILE *); static void avr_asm_function_begin_epilogue (FILE *); static rtx avr_function_value (const_tree, const_tree, bool); @@ -367,6 +368,9 @@ static const struct mcu_type_s avr_mcu_types[] = { #undef TARGET_CASE_VALUES_THRESHOLD #define TARGET_CASE_VALUES_THRESHOLD avr_case_values_threshold +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P avr_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; void @@ -1099,8 +1103,8 @@ avr_asm_function_begin_epilogue (FILE *file) /* Return nonzero if X (an RTX) is a legitimate memory address on the target machine for a memory operand of mode MODE. */ -int -legitimate_address_p (enum machine_mode mode, rtx x, int strict) +bool +avr_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { enum reg_class r = NO_REGS; @@ -2915,21 +2919,21 @@ compare_eq_p (rtx insn) /* Output test instruction for HImode. */ const char * -out_tsthi (rtx insn, int *l) +out_tsthi (rtx insn, rtx op, int *l) { if (compare_sign_p (insn)) { if (l) *l = 1; return AS1 (tst,%B0); } - if (reg_unused_after (insn, SET_SRC (PATTERN (insn))) + if (reg_unused_after (insn, op) && compare_eq_p (insn)) { /* Faster than sbiw if we can clobber the operand. */ if (l) *l = 1; return AS2 (or,%A0,%B0); } - if (test_hard_reg_class (ADDW_REGS, SET_SRC (PATTERN (insn)))) + if (test_hard_reg_class (ADDW_REGS, op)) { if (l) *l = 1; return AS2 (sbiw,%0,0); @@ -2943,14 +2947,14 @@ out_tsthi (rtx insn, int *l) /* Output test instruction for SImode. */ const char * -out_tstsi (rtx insn, int *l) +out_tstsi (rtx insn, rtx op, int *l) { if (compare_sign_p (insn)) { if (l) *l = 1; return AS1 (tst,%D0); } - if (test_hard_reg_class (ADDW_REGS, SET_SRC (PATTERN (insn)))) + if (test_hard_reg_class (ADDW_REGS, op)) { if (l) *l = 3; return (AS2 (sbiw,%A0,0) CR_TAB @@ -4367,8 +4371,8 @@ adjust_insn_length (rtx insn, int len) { switch (GET_MODE (op[1])) { - case HImode: out_tsthi (insn,&len); break; - case SImode: out_tstsi (insn,&len); break; + case HImode: out_tsthi (insn, op[1], &len); break; + case SImode: out_tstsi (insn, op[1], &len); break; default: break; } } @@ -5734,6 +5738,21 @@ avr_reorg (void) XEXP (pattern,1) = x; INSN_CODE (next) = -1; } + else if (true_regnum (XEXP (pattern, 0)) >= 0 + && XEXP (pattern, 1) == const0_rtx) + { + /* This is a tst insn, we can reverse it. */ + rtx next = next_real_insn (insn); + rtx pat = PATTERN (next); + rtx src = SET_SRC (pat); + rtx t = XEXP (src,0); + + PUT_CODE (t, swap_condition (GET_CODE (t))); + XEXP (pattern, 1) = XEXP (pattern, 0); + XEXP (pattern, 0) = const0_rtx; + INSN_CODE (next) = -1; + INSN_CODE (insn) = -1; + } else if (true_regnum (XEXP (pattern,0)) >= 0 && GET_CODE (XEXP (pattern,1)) == CONST_INT) { @@ -5753,20 +5772,6 @@ avr_reorg (void) } } } - else if (true_regnum (SET_SRC (pattern)) >= 0) - { - /* This is a tst insn */ - rtx next = next_real_insn (insn); - rtx pat = PATTERN (next); - rtx src = SET_SRC (pat); - rtx t = XEXP (src,0); - - PUT_CODE (t, swap_condition (GET_CODE (t))); - SET_SRC (pattern) = gen_rtx_COMPARE (GET_MODE (SET_SRC (pattern)), const0_rtx, - SET_SRC (pattern)); - INSN_CODE (next) = -1; - INSN_CODE (insn) = -1; - } } } } diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h index 79d81b94923..d431790a647 100644 --- a/gcc/config/avr/avr.h +++ b/gcc/config/avr/avr.h @@ -408,20 +408,6 @@ extern int avr_reg_order[]; #define MAX_REGS_PER_ADDRESS 1 -#ifdef REG_OK_STRICT -# define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \ -{ \ - if (legitimate_address_p (mode, operand, 1)) \ - goto ADDR; \ -} -# else -# define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \ -{ \ - if (legitimate_address_p (mode, operand, 0)) \ - goto ADDR; \ -} -#endif - #define REG_OK_FOR_BASE_NOSTRICT_P(X) \ (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X)) diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 269e2c5ddb5..86a217dc23c 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -2202,53 +2202,65 @@ ;;<=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=><=> ;; compare -(define_insn "tstqi" +; Optimize negated tests into reverse compare if overflow is undefined. +(define_insn "*negated_tstqi" [(set (cc0) - (match_operand:QI 0 "register_operand" "r"))] - "" - "tst %0" + (compare (neg:QI (match_operand:QI 0 "register_operand" "r")) + (const_int 0)))] + "(!flag_wrapv && !flag_trapv && flag_strict_overflow)" + "cp __zero_reg__,%0" [(set_attr "cc" "compare") (set_attr "length" "1")]) (define_insn "*reversed_tstqi" [(set (cc0) - (compare (const_int 0) + (compare (const_int 0) (match_operand:QI 0 "register_operand" "r")))] "" "cp __zero_reg__,%0" - [(set_attr "cc" "compare") - (set_attr "length" "1")]) +[(set_attr "cc" "compare") + (set_attr "length" "2")]) -(define_insn "tsthi" +(define_insn "*negated_tsthi" [(set (cc0) - (match_operand:HI 0 "register_operand" "!w,r"))] - "" - "* return out_tsthi (insn,NULL);" -[(set_attr "cc" "compare,compare") - (set_attr "length" "1,2")]) + (compare (neg:HI (match_operand:HI 0 "register_operand" "r")) + (const_int 0)))] + "(!flag_wrapv && !flag_trapv && flag_strict_overflow)" + "cp __zero_reg__,%A0 + cpc __zero_reg__,%B0" +[(set_attr "cc" "compare") + (set_attr "length" "2")]) +;; Leave here the clobber used by the cmphi pattern for simplicity, even +;; though it is unused, because this pattern is synthesized by avr_reorg. (define_insn "*reversed_tsthi" [(set (cc0) (compare (const_int 0) - (match_operand:HI 0 "register_operand" "r")))] + (match_operand:HI 0 "register_operand" "r"))) + (clobber (match_scratch:QI 1 "=X"))] "" "cp __zero_reg__,%A0 cpc __zero_reg__,%B0" [(set_attr "cc" "compare") (set_attr "length" "2")]) -(define_insn "tstsi" +(define_insn "*negated_tstsi" [(set (cc0) - (match_operand:SI 0 "register_operand" "r"))] - "" - "* return out_tstsi (insn,NULL);" + (compare (neg:SI (match_operand:SI 0 "register_operand" "r")) + (const_int 0)))] + "(!flag_wrapv && !flag_trapv && flag_strict_overflow)" + "cp __zero_reg__,%A0 + cpc __zero_reg__,%B0 + cpc __zero_reg__,%C0 + cpc __zero_reg__,%D0" [(set_attr "cc" "compare") (set_attr "length" "4")]) (define_insn "*reversed_tstsi" [(set (cc0) - (compare (const_int 0) - (match_operand:SI 0 "register_operand" "r")))] + (compare (const_int 0) + (match_operand:SI 0 "register_operand" "r"))) + (clobber (match_scratch:QI 1 "=X"))] "" "cp __zero_reg__,%A0 cpc __zero_reg__,%B0 @@ -2258,16 +2270,17 @@ (set_attr "length" "4")]) -(define_insn "cmpqi" +(define_insn "*cmpqi" [(set (cc0) - (compare (match_operand:QI 0 "register_operand" "r,d") - (match_operand:QI 1 "nonmemory_operand" "r,i")))] + (compare (match_operand:QI 0 "register_operand" "r,r,d") + (match_operand:QI 1 "nonmemory_operand" "L,r,i")))] "" "@ + tst %0 cp %0,%1 cpi %0,lo8(%1)" - [(set_attr "cc" "compare,compare") - (set_attr "length" "1,1")]) + [(set_attr "cc" "compare,compare,compare") + (set_attr "length" "1,1,1")]) (define_insn "*cmpqi_sign_extend" [(set (cc0) @@ -2279,19 +2292,22 @@ [(set_attr "cc" "compare") (set_attr "length" "1")]) -(define_insn "cmphi" +(define_insn "*cmphi" [(set (cc0) - (compare (match_operand:HI 0 "register_operand" "r,d,d,r,r") - (match_operand:HI 1 "nonmemory_operand" "r,M,i,M,i"))) - (clobber (match_scratch:QI 2 "=X,X,&d,&d,&d"))] + (compare (match_operand:HI 0 "register_operand" "!w,r,r,d,d,r,r") + (match_operand:HI 1 "nonmemory_operand" "L,L,r,M,i,M,i"))) + (clobber (match_scratch:QI 2 "=X,X,X,X,&d,&d,&d"))] "" "*{ switch (which_alternative) { - case 0: + case 0: case 1: + return out_tsthi (insn, operands[0], NULL); + + case 2: return (AS2 (cp,%A0,%A1) CR_TAB AS2 (cpc,%B0,%B1)); - case 1: + case 3: if (reg_unused_after (insn, operands[0]) && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 63 && test_hard_reg_class (ADDW_REGS, operands[0])) @@ -2299,7 +2315,7 @@ else return (AS2 (cpi,%0,%1) CR_TAB AS2 (cpc,%B0,__zero_reg__)); - case 2: + case 4: if (reg_unused_after (insn, operands[0])) return (AS2 (subi,%0,lo8(%1)) CR_TAB AS2 (sbci,%B0,hi8(%1))); @@ -2307,12 +2323,12 @@ return (AS2 (ldi, %2,hi8(%1)) CR_TAB AS2 (cpi, %A0,lo8(%1)) CR_TAB AS2 (cpc, %B0,%2)); - case 3: + case 5: return (AS2 (ldi, %2,lo8(%1)) CR_TAB AS2 (cp, %A0,%2) CR_TAB AS2 (cpc, %B0,__zero_reg__)); - case 4: + case 6: return (AS2 (ldi, %2,lo8(%1)) CR_TAB AS2 (cp, %A0,%2) CR_TAB AS2 (ldi, %2,hi8(%1)) CR_TAB @@ -2320,25 +2336,28 @@ } return \"bug\"; }" - [(set_attr "cc" "compare,compare,compare,compare,compare") - (set_attr "length" "2,2,3,3,4")]) + [(set_attr "cc" "compare,compare,compare,compare,compare,compare,compare") + (set_attr "length" "1,2,2,2,3,3,4")]) -(define_insn "cmpsi" +(define_insn "*cmpsi" [(set (cc0) - (compare (match_operand:SI 0 "register_operand" "r,d,d,r,r") - (match_operand:SI 1 "nonmemory_operand" "r,M,i,M,i"))) - (clobber (match_scratch:QI 2 "=X,X,&d,&d,&d"))] + (compare (match_operand:SI 0 "register_operand" "r,r,d,d,r,r") + (match_operand:SI 1 "nonmemory_operand" "L,r,M,i,M,i"))) + (clobber (match_scratch:QI 2 "=X,X,X,&d,&d,&d"))] "" "*{ switch (which_alternative) { case 0: + return out_tstsi (insn, operands[0], NULL); + + case 1: return (AS2 (cp,%A0,%A1) CR_TAB AS2 (cpc,%B0,%B1) CR_TAB AS2 (cpc,%C0,%C1) CR_TAB AS2 (cpc,%D0,%D1)); - case 1: + case 2: if (reg_unused_after (insn, operands[0]) && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 63 && test_hard_reg_class (ADDW_REGS, operands[0])) @@ -2350,7 +2369,7 @@ AS2 (cpc,%B0,__zero_reg__) CR_TAB AS2 (cpc,%C0,__zero_reg__) CR_TAB AS2 (cpc,%D0,__zero_reg__)); - case 2: + case 3: if (reg_unused_after (insn, operands[0])) return (AS2 (subi,%A0,lo8(%1)) CR_TAB AS2 (sbci,%B0,hi8(%1)) CR_TAB @@ -2364,13 +2383,13 @@ AS2 (cpc, %C0,%2) CR_TAB AS2 (ldi, %2,hhi8(%1)) CR_TAB AS2 (cpc, %D0,%2)); - case 3: + case 4: return (AS2 (ldi,%2,lo8(%1)) CR_TAB AS2 (cp,%A0,%2) CR_TAB AS2 (cpc,%B0,__zero_reg__) CR_TAB AS2 (cpc,%C0,__zero_reg__) CR_TAB AS2 (cpc,%D0,__zero_reg__)); - case 4: + case 5: return (AS2 (ldi, %2,lo8(%1)) CR_TAB AS2 (cp, %A0,%2) CR_TAB AS2 (ldi, %2,hi8(%1)) CR_TAB @@ -2382,113 +2401,53 @@ } return \"bug\"; }" - [(set_attr "cc" "compare,compare,compare,compare,compare") - (set_attr "length" "4,4,7,5,8")]) - -; Optimize negated tests into reverse compare if overflow is undefined. -(define_insn_and_split "negated_tst<mode>" - [(set (cc0) - (neg:QISI (match_operand:QISI 0 "register_operand")))] + [(set_attr "cc" "compare,compare,compare,compare,compare,compare") + (set_attr "length" "4,4,4,7,5,8")]) - "(!flag_wrapv && !flag_trapv && flag_strict_overflow)" - "#" - "" - [(set (cc0) - (compare (const_int 0) - (match_dup 0)))] - "") ;; ---------------------------------------------------------------------- ;; JUMP INSTRUCTIONS ;; ---------------------------------------------------------------------- ;; Conditional jump instructions -(define_expand "beq" - [(set (pc) - (if_then_else (eq (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - - - -/**************************************************************** - AVR not have following conditional jumps: LE,LEU,GT,GTU. - Convert them all to proper jumps. -*****************************************************************/ - -(define_expand "ble" - [(set (pc) - (if_then_else (le (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") +(define_expand "cbranchsi4" + [(parallel [(set (cc0) + (compare (match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" ""))) + (clobber (match_scratch:QI 4 ""))]) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "") + +(define_expand "cbranchhi4" + [(parallel [(set (cc0) + (compare (match_operand:HI 1 "register_operand" "") + (match_operand:HI 2 "nonmemory_operand" ""))) + (clobber (match_scratch:QI 4 ""))]) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "") -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") +(define_expand "cbranchqi4" + [(set (cc0) + (compare (match_operand:QI 1 "register_operand" "") + (match_operand:QI 2 "nonmemory_operand" ""))) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "") -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") ;; Test a single bit in a QI/HI/SImode register. (define_insn "*sbrx_branch" @@ -2557,7 +2516,8 @@ ;; Convert sign tests to bit 7/15/31 tests that match the above insns. (define_peephole2 - [(set (cc0) (match_operand:QI 0 "register_operand" "")) + [(set (cc0) (compare (match_operand:QI 0 "register_operand" "") + (const_int 0))) (set (pc) (if_then_else (ge (cc0) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] @@ -2571,7 +2531,8 @@ "") (define_peephole2 - [(set (cc0) (match_operand:QI 0 "register_operand" "")) + [(set (cc0) (compare (match_operand:QI 0 "register_operand" "") + (const_int 0))) (set (pc) (if_then_else (lt (cc0) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] @@ -2585,7 +2546,9 @@ "") (define_peephole2 - [(set (cc0) (match_operand:HI 0 "register_operand" "")) + [(parallel [(set (cc0) (compare (match_operand:HI 0 "register_operand" "") + (const_int 0))) + (clobber (match_operand:HI 2 ""))]) (set (pc) (if_then_else (ge (cc0) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] @@ -2597,7 +2560,9 @@ "") (define_peephole2 - [(set (cc0) (match_operand:HI 0 "register_operand" "")) + [(parallel [(set (cc0) (compare (match_operand:HI 0 "register_operand" "") + (const_int 0))) + (clobber (match_operand:HI 2 ""))]) (set (pc) (if_then_else (lt (cc0) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] @@ -2609,7 +2574,9 @@ "") (define_peephole2 - [(set (cc0) (match_operand:SI 0 "register_operand" "")) + [(parallel [(set (cc0) (compare (match_operand:SI 0 "register_operand" "") + (const_int 0))) + (clobber (match_operand:SI 2 ""))]) (set (pc) (if_then_else (ge (cc0) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] @@ -2621,7 +2588,9 @@ "operands[2] = GEN_INT (-2147483647 - 1);") (define_peephole2 - [(set (cc0) (match_operand:SI 0 "register_operand" "")) + [(parallel [(set (cc0) (compare (match_operand:SI 0 "register_operand" "") + (const_int 0))) + (clobber (match_operand:SI 2 ""))]) (set (pc) (if_then_else (lt (cc0) (const_int 0)) (label_ref (match_operand 1 "" "")) (pc)))] @@ -2650,6 +2619,11 @@ [(set_attr "type" "branch") (set_attr "cc" "clobber")]) +;; **************************************************************** +;; AVR does not have following conditional jumps: LE,LEU,GT,GTU. +;; Convert them all to proper jumps. +;; ****************************************************************/ + (define_insn "difficult_branch" [(set (pc) (if_then_else (match_operator 1 "difficult_comparison_operator" @@ -3150,7 +3124,9 @@ }") (define_peephole - [(set (cc0) (match_operand:QI 0 "register_operand" "")) + [(set (cc0) + (compare (match_operand:QI 0 "register_operand" "") + (const_int 0))) (set (pc) (if_then_else (eq (cc0) (const_int 0)) (label_ref (match_operand 1 "" "")) diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h index 33de846da95..13542411221 100644 --- a/gcc/config/bfin/bfin-protos.h +++ b/gcc/config/bfin/bfin-protos.h @@ -146,7 +146,6 @@ extern rtx bfin_gen_compare (rtx, Mmode); extern int bfin_local_alignment (tree, int); extern void initialize_trampoline (rtx, rtx, rtx); -extern bool bfin_legitimate_address_p (Mmode, rtx, int); extern rtx bfin_va_arg (tree, tree); extern void bfin_expand_prologue (void); diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 077d5c544a7..f4a8c4dc3d4 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -67,10 +67,6 @@ struct GTY(()) machine_function int has_loopreg_clobber; }; -/* Test and compare insns in bfin.md store the information needed to - generate branch and scc insns here. */ -rtx bfin_compare_op0, bfin_compare_op1; - /* RTX for condition code flag register and RETS register */ extern GTY(()) rtx bfin_cc_rtx; extern GTY(()) rtx bfin_rets_rtx; @@ -2714,7 +2710,7 @@ rtx bfin_gen_compare (rtx cmp, enum machine_mode mode ATTRIBUTE_UNUSED) { enum rtx_code code1, code2; - rtx op0 = bfin_compare_op0, op1 = bfin_compare_op1; + rtx op0 = XEXP (cmp, 0), op1 = XEXP (cmp, 1); rtx tem = bfin_cc_rtx; enum rtx_code code = GET_CODE (cmp); @@ -2742,7 +2738,7 @@ bfin_gen_compare (rtx cmp, enum machine_mode mode ATTRIBUTE_UNUSED) code2 = EQ; break; } - emit_insn (gen_rtx_SET (BImode, tem, + emit_insn (gen_rtx_SET (VOIDmode, tem, gen_rtx_fmt_ee (code1, BImode, op0, op1))); } @@ -2899,8 +2895,26 @@ bfin_valid_reg_p (unsigned int regno, int strict, enum machine_mode mode, return REGNO_OK_FOR_BASE_NONSTRICT_P (regno, mode, outer_code, SCRATCH); } -bool -bfin_legitimate_address_p (enum machine_mode mode, rtx x, int strict) +/* Recognize an RTL expression that is a valid memory address for an + instruction. The MODE argument is the machine mode for the MEM expression + that wants to use this address. + + Blackfin addressing modes are as follows: + + [preg] + [preg + imm16] + + B [ Preg + uimm15 ] + W [ Preg + uimm16m2 ] + [ Preg + uimm17m4 ] + + [preg++] + [preg--] + [--sp] +*/ + +static bool +bfin_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { switch (GET_CODE (x)) { case REG: @@ -4219,17 +4233,17 @@ bfin_optimize_loop (loop_info loop) { /* If loop->iter_reg is a DREG or PREG, we can split it here without scratch register. */ - rtx insn; + rtx insn, test; emit_insn_before (gen_addsi3 (loop->iter_reg, loop->iter_reg, constm1_rtx), loop->loop_end); - emit_insn_before (gen_cmpsi (loop->iter_reg, const0_rtx), - loop->loop_end); - - insn = emit_jump_insn_before (gen_bne (loop->start_label), + test = gen_rtx_NE (VOIDmode, loop->iter_reg, const0_rtx); + insn = emit_jump_insn_before (gen_cbranchsi4 (test, + loop->iter_reg, const0_rtx, + loop->start_label), loop->loop_end); JUMP_LABEL (insn) = loop->start_label; @@ -6322,4 +6336,7 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY bfin_return_in_memory +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P bfin_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h index d97fe8faaf4..7cd6756309b 100644 --- a/gcc/config/bfin/bfin.h +++ b/gcc/config/bfin/bfin.h @@ -912,42 +912,9 @@ typedef struct { would ever accept. */ #define MAX_REGS_PER_ADDRESS 1 -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression - that is a valid memory address for an instruction. - The MODE argument is the machine mode for the MEM expression - that wants to use this address. - - Blackfin addressing modes are as follows: - - [preg] - [preg + imm16] - - B [ Preg + uimm15 ] - W [ Preg + uimm16m2 ] - [ Preg + uimm17m4 ] - - [preg++] - [preg--] - [--sp] -*/ - #define LEGITIMATE_MODE_FOR_AUTOINC_P(MODE) \ (GET_MODE_SIZE (MODE) <= 4 || (MODE) == PDImode) -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ - do { \ - if (bfin_legitimate_address_p (MODE, X, 1)) \ - goto WIN; \ - } while (0); -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ - do { \ - if (bfin_legitimate_address_p (MODE, X, 0)) \ - goto WIN; \ - } while (0); -#endif - #define HAVE_POST_INCREMENT 1 #define HAVE_POST_DECREMENT 1 #define HAVE_PRE_DECREMENT 1 @@ -1292,7 +1259,6 @@ do { \ #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) fprintf (FILE, "[SP--] = %s;\n", reg_names[REGNO]) #define ASM_OUTPUT_REG_POP(FILE, REGNO) fprintf (FILE, "%s = [SP++];\n", reg_names[REGNO]) -extern struct rtx_def *bfin_compare_op0, *bfin_compare_op1; extern struct rtx_def *bfin_cc_rtx, *bfin_rets_rtx; /* This works for GAS and some other assemblers. */ diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md index 4397b7a139a..755a0d3ced6 100644 --- a/gcc/config/bfin/bfin.md +++ b/gcc/config/bfin/bfin.md @@ -2255,29 +2255,6 @@ ;; Conditional branch patterns ;; The Blackfin has only few condition codes: eq, lt, lte, ltu, leu -;; The only outcome of this pattern is that global variables -;; bfin_compare_op[01] are set for use in bcond patterns. - -(define_expand "cmpbi" - [(set (cc0) (compare (match_operand:BI 0 "register_operand" "") - (match_operand:BI 1 "immediate_operand" "")))] - "" -{ - bfin_compare_op0 = operands[0]; - bfin_compare_op1 = operands[1]; - DONE; -}) - -(define_expand "cmpsi" - [(set (cc0) (compare (match_operand:SI 0 "register_operand" "") - (match_operand:SI 1 "reg_or_const_int_operand" "")))] - "" -{ - bfin_compare_op0 = operands[0]; - bfin_compare_op1 = operands[1]; - DONE; -}) - (define_insn "compare_eq" [(set (match_operand:BI 0 "register_operand" "=C,C") (eq:BI (match_operand:SI 1 "register_operand" "d,a") @@ -2326,106 +2303,6 @@ "cc =%1<%2 (iu);" [(set_attr "type" "compare")]) -(define_expand "beq" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - rtx op0 = bfin_compare_op0, op1 = bfin_compare_op1; - operands[1] = bfin_cc_rtx; /* hard register: CC */ - operands[2] = gen_rtx_EQ (BImode, op0, op1); - /* If we have a BImode input, then we already have a compare result, and - do not need to emit another comparison. */ - if (GET_MODE (bfin_compare_op0) == BImode) - { - gcc_assert (bfin_compare_op1 == const0_rtx); - emit_insn (gen_cbranchbi4 (operands[2], op0, op1, operands[0])); - DONE; - } - - operands[3] = gen_rtx_NE (BImode, operands[1], const0_rtx); -}) - -(define_expand "bne" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - rtx op0 = bfin_compare_op0, op1 = bfin_compare_op1; - /* If we have a BImode input, then we already have a compare result, and - do not need to emit another comparison. */ - if (GET_MODE (bfin_compare_op0) == BImode) - { - rtx cmp = gen_rtx_NE (BImode, op0, op1); - - gcc_assert (bfin_compare_op1 == const0_rtx); - emit_insn (gen_cbranchbi4 (cmp, op0, op1, operands[0])); - DONE; - } - - operands[1] = bfin_cc_rtx; /* hard register: CC */ - operands[2] = gen_rtx_EQ (BImode, op0, op1); - operands[3] = gen_rtx_EQ (BImode, operands[1], const0_rtx); -}) - -(define_expand "bgt" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LE (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_EQ (BImode, operands[1], const0_rtx); -}) - -(define_expand "bgtu" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LEU (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_EQ (BImode, operands[1], const0_rtx); -}) - -(define_expand "blt" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LT (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_NE (BImode, operands[1], const0_rtx); -}) - -(define_expand "bltu" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LTU (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_NE (BImode, operands[1], const0_rtx); -}) - ;; Same as above, but and CC with the overflow bit generated by the first ;; multiplication. (define_insn "flag_mul_macv2hi_parts_acconly_andcc0" @@ -2490,63 +2367,25 @@ (set_attr "length" "6") (set_attr "seq_insns" "multi")]) -(define_expand "bge" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LT (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_EQ (BImode, operands[1], const0_rtx); -}) - -(define_expand "bgeu" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LTU (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_EQ (BImode, operands[1], const0_rtx); -}) - -(define_expand "ble" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LE (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_NE (BImode, operands[1], const0_rtx); -}) - -(define_expand "bleu" - [(set (match_dup 1) (match_dup 2)) - (set (pc) - (if_then_else (match_dup 3) - (label_ref (match_operand 0 "" "")) - (pc))) - ] +(define_expand "cbranchsi4" + [(set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "reg_or_const_int_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" { - operands[1] = bfin_cc_rtx; - operands[2] = gen_rtx_LEU (BImode, bfin_compare_op0, bfin_compare_op1); - operands[3] = gen_rtx_NE (BImode, operands[1], const0_rtx); + rtx bi_compare = bfin_gen_compare (operands[0], SImode); + emit_jump_insn (gen_cbranchbi4 (bi_compare, bfin_cc_rtx, CONST0_RTX (BImode), + operands[3])); + DONE; }) (define_insn "cbranchbi4" [(set (pc) (if_then_else - (match_operator 0 "bfin_cbranch_operator" + (match_operator 0 "bfin_bimode_comparison_operator" [(match_operand:BI 1 "register_operand" "C") (match_operand:BI 2 "immediate_operand" "P0")]) (label_ref (match_operand 3 "" "")) @@ -2564,7 +2403,7 @@ (define_insn "cbranch_predicted_taken" [(set (pc) (if_then_else - (match_operator 0 "bfin_cbranch_operator" + (match_operator 0 "bfin_bimode_comparison_operator" [(match_operand:BI 1 "register_operand" "C") (match_operand:BI 2 "immediate_operand" "P0")]) (label_ref (match_operand 3 "" "")) @@ -2580,7 +2419,7 @@ (define_insn "cbranch_with_nops" [(set (pc) (if_then_else - (match_operator 0 "bfin_cbranch_operator" + (match_operator 0 "bfin_bimode_comparison_operator" [(match_operand:BI 1 "register_operand" "C") (match_operand:BI 2 "immediate_operand" "P0")]) (label_ref (match_operand 3 "" "")) @@ -2594,60 +2433,49 @@ [(set_attr "type" "brcc") (set_attr "length" "8")]) -;; setcc insns. */ -(define_expand "seq" - [(set (match_dup 1) (eq:BI (match_dup 2) (match_dup 3))) - (set (match_operand:SI 0 "register_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" -{ - operands[2] = bfin_compare_op0; - operands[3] = bfin_compare_op1; - operands[1] = bfin_cc_rtx; -}) +;; setcc insns. -(define_expand "slt" - [(set (match_dup 1) (lt:BI (match_dup 2) (match_dup 3))) +(define_expand "cstorebi4" + [(set (match_dup 4) + (match_operator:BI 1 "bfin_bimode_comparison_operator" + [(match_operand:BI 2 "register_operand" "") + (match_operand:BI 3 "reg_or_const_int_operand" "")])) (set (match_operand:SI 0 "register_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] + (ne:SI (match_dup 4) (const_int 0)))] "" { - operands[2] = bfin_compare_op0; - operands[3] = bfin_compare_op1; - operands[1] = bfin_cc_rtx; -}) + /* It could be expanded as a movbisi instruction, but the portable + alternative produces better code. */ + if (GET_CODE (operands[1]) == NE) + FAIL; -(define_expand "sle" - [(set (match_dup 1) (le:BI (match_dup 2) (match_dup 3))) - (set (match_operand:SI 0 "register_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" -{ - operands[2] = bfin_compare_op0; - operands[3] = bfin_compare_op1; - operands[1] = bfin_cc_rtx; + operands[4] = bfin_cc_rtx; }) -(define_expand "sltu" - [(set (match_dup 1) (ltu:BI (match_dup 2) (match_dup 3))) - (set (match_operand:SI 0 "register_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] +(define_expand "cstoresi4" + [(set (match_operand:SI 0 "register_operand") + (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:SI 2 "register_operand" "") + (match_operand:SI 3 "reg_or_const_int_operand" "")]))] "" { - operands[2] = bfin_compare_op0; - operands[3] = bfin_compare_op1; - operands[1] = bfin_cc_rtx; -}) + rtx bi_compare, test; -(define_expand "sleu" - [(set (match_dup 1) (leu:BI (match_dup 2) (match_dup 3))) - (set (match_operand:SI 0 "register_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" -{ - operands[2] = bfin_compare_op0; - operands[3] = bfin_compare_op1; - operands[1] = bfin_cc_rtx; + if (!bfin_direct_comparison_operator (operands[1], SImode)) + { + if (!register_operand (operands[3], SImode) + || GET_CODE (operands[1]) == NE) + FAIL; + test = gen_rtx_fmt_ee (swap_condition (GET_CODE (operands[1])), + SImode, operands[3], operands[2]); + } + else + test = operands[1]; + + bi_compare = bfin_gen_compare (test, SImode); + gcc_assert (GET_CODE (bi_compare) == NE); + emit_insn (gen_movbisi (operands[0], bfin_cc_rtx)); + DONE; }) (define_insn "nop" @@ -2676,13 +2504,16 @@ "CC = %1;" [(set_attr "length" "2")]) -(define_insn "movbisi" +(define_insn_and_split "movbisi" [(set (match_operand:SI 0 "register_operand" "=d") (ne:SI (match_operand:BI 1 "register_operand" "C") (const_int 0)))] "" - "%0 = CC;" - [(set_attr "length" "2")]) + "#" + "" + [(set (match_operand:SI 0 "register_operand" "") + (zero_extend:SI (match_operand:BI 1 "register_operand" "")))] + "") (define_insn "notbi" [(set (match_operand:BI 0 "register_operand" "=C") diff --git a/gcc/config/bfin/predicates.md b/gcc/config/bfin/predicates.md index 7aac5b0534c..bce725a7009 100644 --- a/gcc/config/bfin/predicates.md +++ b/gcc/config/bfin/predicates.md @@ -172,10 +172,14 @@ && REGNO (op) <= LAST_VIRTUAL_REGISTER)); }) -;; Test for an operator valid in a conditional branch -(define_predicate "bfin_cbranch_operator" +;; Test for an operator valid in a BImode conditional branch +(define_predicate "bfin_bimode_comparison_operator" (match_code "eq,ne")) +;; Test for an operator whose result is accessible with movbisi. +(define_predicate "bfin_direct_comparison_operator" + (match_code "eq,lt,le,leu,ltu")) + ;; The following two are used to compute the addrtype attribute. They return ;; true if passed a memory address usable for a 16-bit load or store using a ;; P or I register, respectively. If neither matches, we know we have a diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index 2112670de6c..bc634ddbf3e 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -1431,13 +1431,18 @@ cris_normal_notice_update_cc (rtx exp, rtx insn) if (SET_DEST (exp) == cc0_rtx) { CC_STATUS_INIT; - cc_status.value1 = SET_SRC (exp); - /* Handle flags for the special btstq on one bit. */ - if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT - && XEXP (SET_SRC (exp), 1) == const1_rtx) + if (GET_CODE (SET_SRC (exp)) == COMPARE + && XEXP (SET_SRC (exp), 1) == const0_rtx) + cc_status.value1 = XEXP (SET_SRC (exp), 0); + else + cc_status.value1 = SET_SRC (exp); + + /* Handle flags for the special btstq on one bit. */ + if (GET_CODE (cc_status.value1) == ZERO_EXTRACT + && XEXP (cc_status.value1, 1) == const1_rtx) { - if (CONST_INT_P (XEXP (SET_SRC (exp), 0))) + if (CONST_INT_P (XEXP (cc_status.value1, 0))) /* Using cmpq. */ cc_status.flags = CC_INVERTED; else @@ -1445,7 +1450,7 @@ cris_normal_notice_update_cc (rtx exp, rtx insn) cc_status.flags = CC_Z_IN_NOT_N; } - if (GET_CODE (SET_SRC (exp)) == COMPARE) + else if (GET_CODE (SET_SRC (exp)) == COMPARE) { if (!REG_P (XEXP (SET_SRC (exp), 0)) && XEXP (SET_SRC (exp), 1) != const0_rtx) @@ -1855,6 +1860,11 @@ cris_rtx_costs (rtx x, int code, int outer_code, int *total, } return false; + case ZERO_EXTRACT: + if (outer_code != COMPARE) + return false; + /* fall through */ + case ZERO_EXTEND: case SIGN_EXTEND: *total = rtx_cost (XEXP (x, 0), outer_code, speed); return true; diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index f4b2128ea19..79eb8da3b0d 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -248,40 +248,16 @@ ;; Test insns. -;; DImode -;; -;; Allow register and offsettable mem operands only; post-increment is -;; not worth the trouble. - -(define_expand "tstdi" - [(set (cc0) (match_operand:DI 0 "nonimmediate_operand"))] - "" -{ - if (TARGET_V32 && MEM_P (operands[0])) - operands[0] = force_reg (DImode, operands[0]); -}) - -(define_insn "*tstdi_non_v32" - [(set (cc0) - (match_operand:DI 0 "nonimmediate_operand" "r,o"))] - "!TARGET_V32" - "test.d %M0\;ax\;test.d %H0") - -(define_insn "*tstdi_v32" - [(set (cc0) - (match_operand:DI 0 "register_operand" "r"))] - "TARGET_V32" - "cmpq 0,%M0\;ax\;cmpq 0,%H0") - ;; No test insns with side-effect on the mem addressing. ;; ;; See note on cmp-insns with side-effects (or lack of them) ;; Normal named test patterns from SI on. -(define_insn "tstsi" +(define_insn "*tstsi" [(set (cc0) - (match_operand:SI 0 "nonimmediate_operand" "r,Q>,m"))] + (compare (match_operand:SI 0 "nonimmediate_operand" "r,Q>,m") + (const_int 0)))] "" { if (which_alternative == 0 && TARGET_V32) @@ -290,15 +266,10 @@ } [(set_attr "slottable" "yes,yes,no")]) -(define_expand "tst<mode>" - [(set (cc0) - (match_operand:BW 0 "nonimmediate_operand"))] - "" - "") - (define_insn "*tst<mode>_cmp" [(set (cc0) - (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m"))] + (compare (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m") + (const_int 0)))] "cris_cc0_user_requires_cmp (insn)" "@ cmp<m> 0,%0 @@ -308,7 +279,8 @@ (define_insn "*tst<mode>_non_cmp" [(set (cc0) - (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m"))] + (compare (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m") + (const_int 0)))] "!cris_cc0_user_requires_cmp (insn)" "@ move<m> %0,%0 @@ -332,24 +304,13 @@ ;; DImode for anything else but a structure/block-mode. Just do the ;; obvious stuff for the straight-forward constraint letters. -(define_expand "cmpdi" - [(set (cc0) - (compare (match_operand:DI 0 "nonimmediate_operand" "") - (match_operand:DI 1 "general_operand" "")))] - "" -{ - if (TARGET_V32 && !REG_P (operands[0])) - operands[0] = force_reg (DImode, operands[0]); - if (TARGET_V32 && MEM_P (operands[1])) - operands[1] = force_reg (DImode, operands[1]); -}) - (define_insn "*cmpdi_non_v32" [(set (cc0) - (compare (match_operand:DI 0 "nonimmediate_operand" "r,r,r,r,r,r,o") - (match_operand:DI 1 "general_operand" "Kc,I,P,n,r,o,r")))] + (compare (match_operand:DI 0 "nonimmediate_operand" "rm,r,r,r,r,r,r,o") + (match_operand:DI 1 "general_operand" "M,Kc,I,P,n,r,o,r")))] "!TARGET_V32" "@ + test.d %M0\;ax\;test.d %H0 cmpq %1,%M0\;ax\;cmpq 0,%H0 cmpq %1,%M0\;ax\;cmpq -1,%H0 cmp%e1.%z1 %1,%M0\;ax\;cmpq %H1,%H0 @@ -415,9 +376,9 @@ (set_attr "cc" "rev")]) ;; The "normal" compare patterns, from SI on. Special-cases with zero -;; should not happen. +;; are covered above. -(define_insn "cmpsi" +(define_insn "*cmpsi" [(set (cc0) (compare (match_operand:SI 0 "nonimmediate_operand" "r,r,r, Q>,r,r,m") @@ -434,7 +395,7 @@ [(set_attr "slottable" "yes,yes,yes,yes,no,no,no") (set_attr "cc" "normal,normal,normal,rev,normal,normal,rev")]) -(define_insn "cmp<mode>" +(define_insn "*cmp<mode>" [(set (cc0) (compare (match_operand:BW 0 "nonimmediate_operand" "r,r, Q>,r,m") (match_operand:BW 1 "general_operand" "r,Q>,r, g,r")))] @@ -457,10 +418,12 @@ ;; extends subregs for lower-size modes. FIXME: Add testcase. (define_insn "*btst" [(set (cc0) - (zero_extract - (match_operand:SI 0 "nonmemory_operand" "r, r,r, r,r, r,Kp") - (match_operand:SI 1 "const_int_operand" "Kc,n,Kc,n,Kc,n,n") - (match_operand:SI 2 "nonmemory_operand" "M, M,Kc,n,r, r,r")))] + (compare + (zero_extract:SI + (match_operand:SI 0 "nonmemory_operand" "r, r,r, r,r, r,Kp") + (match_operand:SI 1 "const_int_operand" "Kc,n,Kc,n,Kc,n,n") + (match_operand:SI 2 "nonmemory_operand" "M, M,Kc,n,r, r,r")) + (const_int 0)))] ;; Either it is a single bit, or consecutive ones starting at 0. ;; The btst ones depend on stuff in NOTICE_UPDATE_CC. "CONST_INT_P (operands[1]) @@ -3550,6 +3513,36 @@ ;; Conditional branches. +(define_expand "cbranch<mode>4" + [(set (cc0) (compare + (match_operand:BWD 1 "nonimmediate_operand") + (match_operand:BWD 2 "general_operand"))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "" + "") + +(define_expand "cbranchdi4" + [(set (cc0) + (compare (match_operand:DI 1 "nonimmediate_operand" "") + (match_operand:DI 2 "general_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "" +{ + if (TARGET_V32 && !REG_P (operands[1])) + operands[1] = force_reg (DImode, operands[1]); + if (TARGET_V32 && MEM_P (operands[2])) + operands[2] = force_reg (DImode, operands[2]); +}) + + ;; We suffer from the same overflow-bit-gets-in-the-way problem as ;; e.g. m68k, so we have to check if overflow bit is set on all "signed" ;; conditions. @@ -3634,6 +3627,31 @@ ;; Set on condition: sCC. +(define_expand "cstoredi4" + [(set (cc0) (compare + (match_operand:DI 2 "nonimmediate_operand") + (match_operand:DI 3 "general_operand"))) + (set (match_operand:SI 0 "register_operand") + (match_operator:SI 1 "ordered_comparison_operator" + [(cc0) (const_int 0)]))] + "" +{ + if (TARGET_V32 && !REG_P (operands[2])) + operands[2] = force_reg (DImode, operands[2]); + if (TARGET_V32 && MEM_P (operands[3])) + operands[3] = force_reg (DImode, operands[3]); +}) + +(define_expand "cstore<mode>4" + [(set (cc0) (compare + (match_operand:BWD 2 "nonimmediate_operand") + (match_operand:BWD 3 "general_operand"))) + (set (match_operand:SI 0 "register_operand") + (match_operator:SI 1 "ordered_comparison_operator" + [(cc0) (const_int 0)]))] + "" + "") + ;; Like bCC, we have to check the overflow bit for ;; signed conditions. diff --git a/gcc/config/crx/crx-protos.h b/gcc/config/crx/crx-protos.h index 0be641dd89e..b35051d99f5 100644 --- a/gcc/config/crx/crx-protos.h +++ b/gcc/config/crx/crx-protos.h @@ -53,7 +53,6 @@ enum crx_addrtype }; extern enum crx_addrtype crx_decompose_address (rtx addr, struct crx_address *out); -extern int crx_legitimate_address_p (enum machine_mode, rtx, int); extern int crx_const_double_ok (rtx op); @@ -62,10 +61,6 @@ extern void crx_print_operand (FILE *, rtx, int); extern void crx_print_operand_address (FILE *, rtx); /* Misc functions called from crx.md. */ -extern rtx crx_expand_compare (enum rtx_code, enum machine_mode); -extern void crx_expand_branch (enum rtx_code, rtx); -extern void crx_expand_scond (enum rtx_code, rtx); - extern void crx_expand_movmem_single (rtx, rtx, rtx, rtx, rtx, unsigned HOST_WIDE_INT *); extern int crx_expand_movmem (rtx, rtx, rtx, rtx); #endif /* RTX_CODE */ diff --git a/gcc/config/crx/crx.c b/gcc/config/crx/crx.c index 6f10afd2e5f..c45189eb0d3 100644 --- a/gcc/config/crx/crx.c +++ b/gcc/config/crx/crx.c @@ -124,10 +124,6 @@ static enum machine_mode output_memory_reference_mode; /* Table of machine attributes. */ const struct attribute_spec crx_attribute_table[]; -/* Test and compare insns use these globals to generate branch insns. */ -rtx crx_compare_op0 = NULL_RTX; -rtx crx_compare_op1 = NULL_RTX; - /*****************************************************************************/ /* TARGETM FUNCTION PROTOTYPES */ /*****************************************************************************/ @@ -137,6 +133,14 @@ static rtx crx_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, int incoming ATTRIBUTE_UNUSED); static bool crx_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED); static int crx_address_cost (rtx, bool); +static bool crx_legitimate_address_p (enum machine_mode, rtx, bool); + +/*****************************************************************************/ +/* RTL VALIDITY */ +/*****************************************************************************/ + +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P crx_legitimate_address_p /*****************************************************************************/ /* STACK LAYOUT AND CALLING CONVENTIONS */ @@ -726,9 +730,9 @@ crx_decompose_address (rtx addr, struct crx_address *out) return retval; } -int +bool crx_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, - rtx addr, int strict) + rtx addr, bool strict) { enum crx_addrtype addrtype; struct crx_address address; @@ -1217,43 +1221,6 @@ crx_expand_movmem (rtx dstbase, rtx srcbase, rtx count_exp, rtx align_exp) return 1; } -rtx -crx_expand_compare (enum rtx_code code, enum machine_mode mode) -{ - rtx op0, op1, cc_reg, ret; - - op0 = crx_compare_op0; - op1 = crx_compare_op1; - - /* Emit the compare that writes into CC_REGNUM) */ - cc_reg = gen_rtx_REG (CCmode, CC_REGNUM); - ret = gen_rtx_COMPARE (CCmode, op0, op1); - emit_insn (gen_rtx_SET (VOIDmode, cc_reg, ret)); - /* debug_rtx (get_last_insn ()); */ - - /* Return the rtx for using the result in CC_REGNUM */ - return gen_rtx_fmt_ee (code, mode, cc_reg, const0_rtx); -} - -void -crx_expand_branch (enum rtx_code code, rtx label) -{ - rtx tmp = crx_expand_compare (code, VOIDmode); - tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, - gen_rtx_LABEL_REF (VOIDmode, label), - pc_rtx); - emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp)); - /* debug_rtx (get_last_insn ()); */ -} - -void -crx_expand_scond (enum rtx_code code, rtx dest) -{ - rtx tmp = crx_expand_compare (code, GET_MODE (dest)); - emit_move_insn (dest, tmp); - /* debug_rtx (get_last_insn ()); */ -} - static void mpushpop_str (char *stringbuffer, const char *mnemonic, char *mask) { diff --git a/gcc/config/crx/crx.h b/gcc/config/crx/crx.h index 69065f3795b..d22db7da903 100644 --- a/gcc/config/crx/crx.h +++ b/gcc/config/crx/crx.h @@ -404,20 +404,6 @@ struct cumulative_args #define REG_OK_FOR_INDEX_P(X) 1 #endif /* REG_OK_STRICT */ -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ -{ \ - if (crx_legitimate_address_p (MODE, X, 1)) \ - goto LABEL; \ -} -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ -{ \ - if (crx_legitimate_address_p (MODE, X, 0)) \ - goto LABEL; \ -} -#endif /* REG_OK_STRICT */ - #define LEGITIMATE_CONSTANT_P(X) 1 /*****************************************************************************/ @@ -520,11 +506,4 @@ struct cumulative_args #define FUNCTION_MODE QImode -/*****************************************************************************/ -/* EXTERNAL DECLARATIONS FOR VARIABLES DEFINED IN CRX.C */ -/*****************************************************************************/ - -extern rtx crx_compare_op0; /* operand 0 for comparisons */ -extern rtx crx_compare_op1; /* operand 1 for comparisons */ - #endif /* ! GCC_CRX_H */ diff --git a/gcc/config/crx/crx.md b/gcc/config/crx/crx.md index b9655544ffc..229e345d32f 100644 --- a/gcc/config/crx/crx.md +++ b/gcc/config/crx/crx.md @@ -63,6 +63,10 @@ (ior (match_code "symbol_ref") (match_operand 0 "register_operand"))) +(define_predicate "cc_reg_operand" + (and (match_code "reg") + (match_test "REGNO (op) == CC_REGNUM"))) + (define_predicate "nosp_reg_operand" (and (match_operand 0 "register_operand") (match_test "REGNO (op) != SP_REGNUM"))) @@ -107,8 +111,6 @@ (define_code_iterator mima_oprnd [smax umax smin umin]) (define_code_attr mimaIsa [(smax "maxs") (umax "maxu") (smin "mins") (umin "minu")]) -(define_code_iterator any_cond [eq ne gt gtu lt ltu ge geu le leu]) - ;; Addition Instructions (define_insn "adddi3" @@ -522,9 +524,21 @@ ;; Compare and Branch Instructions +(define_insn "cbranchcc4" + [(set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:CC 1 "cc_reg_operand" "r") + (match_operand 2 "cst4_operand" "L")]) + (label_ref (match_operand 3 "")) + (pc)))] + "" + "b%d0\t%l3" + [(set_attr "length" "6")] +) + (define_insn "cbranch<mode>4" [(set (pc) - (if_then_else (match_operator 0 "comparison_operator" + (if_then_else (match_operator 0 "ordered_comparison_operator" [(match_operand:CRXIM 1 "register_operand" "r") (match_operand:CRXIM 2 "reg_or_cst4_operand" "rL")]) (label_ref (match_operand 3 "" "")) @@ -535,18 +549,18 @@ [(set_attr "length" "6")] ) -;; Compare Instructions -(define_expand "cmp<mode>" +;; Scond Instructions + +(define_expand "cstore<mode>4" [(set (reg:CC CC_REGNUM) - (compare:CC (match_operand:CRXIM 0 "register_operand" "") - (match_operand:CRXIM 1 "nonmemory_operand" "")))] + (compare:CC (match_operand:CRXIM 2 "register_operand" "") + (match_operand:CRXIM 3 "nonmemory_operand" ""))) + (set (match_operand:SI 0 "register_operand") + (match_operator:SI 1 "ordered_comparison_operator" + [(reg:CC CC_REGNUM) (const_int 0)]))] + "" "" - { - crx_compare_op0 = operands[0]; - crx_compare_op1 = operands[1]; - DONE; - } ) (define_insn "cmp<mode>_internal" @@ -558,48 +572,9 @@ [(set_attr "length" "2,<lImmArith>")] ) -;; Conditional Branch Instructions - -(define_expand "b<code>" - [(set (pc) - (if_then_else (any_cond (reg:CC CC_REGNUM) - (const_int 0)) - (label_ref (match_operand 0 "")) - (pc)))] - "" - { - crx_expand_branch (<CODE>, operands[0]); - DONE; - } -) - -(define_insn "bCOND_internal" - [(set (pc) - (if_then_else (match_operator 0 "comparison_operator" - [(reg:CC CC_REGNUM) - (const_int 0)]) - (label_ref (match_operand 1 "")) - (pc)))] - "" - "b%d0\t%l1" - [(set_attr "length" "6")] -) - -;; Scond Instructions - -(define_expand "s<code>" - [(set (match_operand:SI 0 "register_operand") - (any_cond:SI (reg:CC CC_REGNUM) (const_int 0)))] - "" - { - crx_expand_scond (<CODE>, operands[0]); - DONE; - } -) - (define_insn "sCOND_internal" [(set (match_operand:SI 0 "register_operand" "=r") - (match_operator:SI 1 "comparison_operator" + (match_operator:SI 1 "ordered_comparison_operator" [(reg:CC CC_REGNUM) (const_int 0)]))] "" "s%d1\t%0" diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c index e7f2e3cfd86..5642c548a29 100644 --- a/gcc/config/fr30/fr30.c +++ b/gcc/config/fr30/fr30.c @@ -48,12 +48,6 @@ /*}}}*/ /*{{{ Function Prologues & Epilogues */ -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. */ - -struct rtx_def * fr30_compare_op0; -struct rtx_def * fr30_compare_op1; - /* The FR30 stack looks like this: Before call After call diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h index c1e8e0a9723..b958a678db4 100644 --- a/gcc/config/fr30/fr30.h +++ b/gcc/config/fr30/fr30.h @@ -1106,16 +1106,6 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE) #endif /*}}}*/ -/*{{{ Exported variables */ - -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. Note that we can't use "rtx" here - since it hasn't been defined! */ - -extern struct rtx_def * fr30_compare_op0; -extern struct rtx_def * fr30_compare_op1; - -/*}}}*/ /* Local Variables: */ /* folded-file: t */ diff --git a/gcc/config/fr30/fr30.md b/gcc/config/fr30/fr30.md index a198ea3544d..fa115c4cfa1 100644 --- a/gcc/config/fr30/fr30.md +++ b/gcc/config/fr30/fr30.md @@ -916,23 +916,7 @@ ;;}}} ;;{{{ Comparisons -;; Note, we store the operands in the comparison insns, and use them later -;; when generating the branch or scc operation. - -;; First the routines called by the machine independent part of the compiler -(define_expand "cmpsi" - [(set (reg:CC 16) - (compare:CC (match_operand:SI 0 "register_operand" "") - (match_operand:SI 1 "nonmemory_operand" "")))] - "" - "{ - fr30_compare_op0 = operands[0]; - fr30_compare_op1 = operands[1]; - DONE; - }" -) - -;; Now, the actual comparisons, generated by the branch and/or scc operations +;; The actual comparisons, generated by the cbranch and/or cstore expanders (define_insn "*cmpsi_internal" [(set (reg:CC 16) @@ -951,165 +935,19 @@ ;; Define_expands called by the machine independent part of the compiler ;; to allocate a new comparison register -(define_expand "beq" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (eq:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "bne" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (ne:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "blt" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (lt:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "ble" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (le:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "bgt" +(define_expand "cbranchsi4" [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) + (compare:CC (match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" ""))) (set (pc) - (if_then_else (gt:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator:CC 0 "ordered_comparison_operator" + [(reg:CC 16) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "bge" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (ge:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "bltu" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (ltu:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "bleu" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (leu:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) - -(define_expand "bgtu" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (gtu:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" ) -(define_expand "bgeu" - [(set (reg:CC 16) - (compare:CC (match_dup 1) - (match_dup 2))) - (set (pc) - (if_then_else (geu:CC (reg:CC 16) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "{ - operands[1] = fr30_compare_op0; - operands[2] = fr30_compare_op1; - }" -) ;; Actual branches. We must allow for the (label_ref) and the (pc) to be ;; swapped. If they are swapped, it reverses the sense of the branch. diff --git a/gcc/config/frv/frv-protos.h b/gcc/config/frv/frv-protos.h index c34d02cf96f..56f42439640 100644 --- a/gcc/config/frv/frv-protos.h +++ b/gcc/config/frv/frv-protos.h @@ -47,7 +47,7 @@ extern int frv_frame_pointer_required (void); extern int frv_initial_elimination_offset (int, int); #ifdef RTX_CODE -extern int frv_legitimate_address_p (enum machine_mode, rtx, +extern int frv_legitimate_address_p_1 (enum machine_mode, rtx, int, int, int); extern rtx frv_find_base_term (rtx); @@ -81,8 +81,8 @@ extern const char *output_move_single (rtx *, rtx); extern const char *output_move_double (rtx *, rtx); extern const char *output_condmove_single (rtx *, rtx); -extern int frv_emit_cond_branch (enum rtx_code, rtx); -extern int frv_emit_scc (enum rtx_code, rtx); +extern int frv_emit_cond_branch (rtx *); +extern int frv_emit_scc (rtx *); extern rtx frv_split_scc (rtx, rtx, rtx, rtx, HOST_WIDE_INT); extern int frv_emit_cond_move (rtx, rtx, rtx, rtx); extern rtx frv_split_cond_move (rtx *); diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c index 4e8c1b24cf8..1db3496b5be 100644 --- a/gcc/config/frv/frv.c +++ b/gcc/config/frv/frv.c @@ -193,11 +193,6 @@ typedef struct int base_offset; } frv_frame_accessor_t; -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. */ -rtx frv_compare_op0; -rtx frv_compare_op1; - /* Conditional execution support gathered together in one structure. */ typedef struct { @@ -269,6 +264,7 @@ frv_cpu_t frv_cpu_type = CPU_TYPE; /* value of -mcpu= */ /* Forward references */ static bool frv_handle_option (size_t, const char *, int); +static bool frv_legitimate_address_p (enum machine_mode, rtx, bool); static int frv_default_flags_for_cpu (void); static int frv_string_begins_with (const_tree, const char *); static FRV_INLINE bool frv_small_data_reloc_p (rtx, int); @@ -472,6 +468,9 @@ static bool frv_secondary_reload (bool, rtx, enum reg_class, #undef TARGET_SECONDARY_RELOAD #define TARGET_SECONDARY_RELOAD frv_secondary_reload +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P frv_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; #define FRV_SYMBOL_REF_TLS_P(RTX) \ @@ -2537,7 +2536,7 @@ frv_return_addr_rtx (int count, rtx frame) MEMREF has already happened. MEMREF must be a legitimate operand for modes larger than SImode. - GO_IF_LEGITIMATE_ADDRESS forbids register+register addresses, which + frv_legitimate_address_p forbids register+register addresses, which this function cannot handle. */ rtx frv_index_memory (rtx memref, enum machine_mode mode, int index) @@ -3363,11 +3362,11 @@ frv_regno_ok_for_base_p (int regno, int strict_p) `PRINT_OPERAND_ADDRESS'. */ int -frv_legitimate_address_p (enum machine_mode mode, - rtx x, - int strict_p, - int condexec_p, - int allow_double_reg_p) +frv_legitimate_address_p_1 (enum machine_mode mode, + rtx x, + int strict_p, + int condexec_p, + int allow_double_reg_p) { rtx x0, x1; int ret = 0; @@ -3494,6 +3493,12 @@ frv_legitimate_address_p (enum machine_mode mode, return ret; } +bool +frv_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) +{ + return frv_legitimate_address_p_1 (mode, x, strict_p, FALSE, FALSE); +} + /* Given an ADDR, generate code to inline the PLT. */ static rtx gen_inlined_tls_plt (rtx addr) @@ -3788,8 +3793,8 @@ frv_legitimate_memory_operand (rtx op, enum machine_mode mode, int condexec_p) { return ((GET_MODE (op) == mode || mode == VOIDmode) && GET_CODE (op) == MEM - && frv_legitimate_address_p (mode, XEXP (op, 0), - reload_completed, condexec_p, FALSE)); + && frv_legitimate_address_p_1 (mode, XEXP (op, 0), + reload_completed, condexec_p, FALSE)); } void @@ -3949,7 +3954,7 @@ condexec_memory_operand (rtx op, enum machine_mode mode) return FALSE; addr = XEXP (op, 0); - return frv_legitimate_address_p (mode, addr, reload_completed, TRUE, FALSE); + return frv_legitimate_address_p_1 (mode, addr, reload_completed, TRUE, FALSE); } /* Return true if the bare return instruction can be used outside of the @@ -4768,19 +4773,18 @@ frv_emit_comparison (enum rtx_code test, rtx op0, rtx op1) } -/* Emit code for a conditional branch. The comparison operands were previously - stored in frv_compare_op0 and frv_compare_op1. - +/* Emit code for a conditional branch. XXX: I originally wanted to add a clobber of a CCR register to use in conditional execution, but that confuses the rest of the compiler. */ int -frv_emit_cond_branch (enum rtx_code test, rtx label) +frv_emit_cond_branch (rtx operands[]) { rtx test_rtx; rtx label_ref; rtx if_else; - rtx cc_reg = frv_emit_comparison (test, frv_compare_op0, frv_compare_op1); + enum rtx_code test = GET_CODE (operands[0]); + rtx cc_reg = frv_emit_comparison (test, operands[1], operands[2]); enum machine_mode cc_mode = GET_MODE (cc_reg); /* Branches generate: @@ -4788,7 +4792,7 @@ frv_emit_cond_branch (enum rtx_code test, rtx label) (if_then_else (<test>, <cc_reg>, (const_int 0)) (label_ref <branch_label>) (pc))) */ - label_ref = gen_rtx_LABEL_REF (VOIDmode, label); + label_ref = gen_rtx_LABEL_REF (VOIDmode, operands[3]); test_rtx = gen_rtx_fmt_ee (test, cc_mode, cc_reg, const0_rtx); if_else = gen_rtx_IF_THEN_ELSE (cc_mode, test_rtx, label_ref, pc_rtx); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, if_else)); @@ -4796,23 +4800,23 @@ frv_emit_cond_branch (enum rtx_code test, rtx label) } -/* Emit code to set a gpr to 1/0 based on a comparison. The comparison - operands were previously stored in frv_compare_op0 and frv_compare_op1. */ +/* Emit code to set a gpr to 1/0 based on a comparison. */ int -frv_emit_scc (enum rtx_code test, rtx target) +frv_emit_scc (rtx operands[]) { rtx set; rtx test_rtx; rtx clobber; rtx cr_reg; - rtx cc_reg = frv_emit_comparison (test, frv_compare_op0, frv_compare_op1); + enum rtx_code test = GET_CODE (operands[1]); + rtx cc_reg = frv_emit_comparison (test, operands[2], operands[3]); /* SCC instructions generate: (parallel [(set <target> (<test>, <cc_reg>, (const_int 0)) (clobber (<ccr_reg>))]) */ test_rtx = gen_rtx_fmt_ee (test, SImode, cc_reg, const0_rtx); - set = gen_rtx_SET (VOIDmode, target, test_rtx); + set = gen_rtx_SET (VOIDmode, operands[0], test_rtx); cr_reg = ((TARGET_ALLOC_CC) ? gen_reg_rtx (CC_CCRmode) @@ -4874,7 +4878,8 @@ frv_emit_cond_move (rtx dest, rtx test_rtx, rtx src1, rtx src2) rtx cr_reg; rtx if_rtx; enum rtx_code test = GET_CODE (test_rtx); - rtx cc_reg = frv_emit_comparison (test, frv_compare_op0, frv_compare_op1); + rtx cc_reg = frv_emit_comparison (test, + XEXP (test_rtx, 0), XEXP (test_rtx, 1)); enum machine_mode cc_mode = GET_MODE (cc_reg); /* Conditional move instructions generate: @@ -5851,7 +5856,7 @@ frv_ifcvt_rewrite_mem (rtx mem, enum machine_mode mode, rtx insn) { rtx addr = XEXP (mem, 0); - if (!frv_legitimate_address_p (mode, addr, reload_completed, TRUE, FALSE)) + if (!frv_legitimate_address_p_1 (mode, addr, reload_completed, TRUE, FALSE)) { if (GET_CODE (addr) == PLUS) { diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h index b6fdca4aa0a..e605bb21a8e 100644 --- a/gcc/config/frv/frv.h +++ b/gcc/config/frv/frv.h @@ -2025,77 +2025,6 @@ __asm__("\n" \ number that `GO_IF_LEGITIMATE_ADDRESS' would ever accept. */ #define MAX_REGS_PER_ADDRESS 2 -/* A C compound statement with a conditional `goto LABEL;' executed if X (an - RTX) is a legitimate memory address on the target machine for a memory - operand of mode MODE. - - It usually pays to define several simpler macros to serve as subroutines for - this one. Otherwise it may be too complicated to understand. - - This macro must exist in two variants: a strict variant and a non-strict - one. The strict variant is used in the reload pass. It must be defined so - that any pseudo-register that has not been allocated a hard register is - considered a memory reference. In contexts where some kind of register is - required, a pseudo-register with no hard register must be rejected. - - The non-strict variant is used in other passes. It must be defined to - accept all pseudo-registers in every context where some kind of register is - required. - - Compiler source files that want to use the strict variant of this macro - define the macro `REG_OK_STRICT'. You should use an `#ifdef REG_OK_STRICT' - conditional to define the strict variant in that case and the non-strict - variant otherwise. - - Subroutines to check for acceptable registers for various purposes (one for - base registers, one for index registers, and so on) are typically among the - subroutines used to define `GO_IF_LEGITIMATE_ADDRESS'. Then only these - subroutine macros need have two variants; the higher levels of macros may be - the same whether strict or not. - - Normally, constant addresses which are the sum of a `symbol_ref' and an - integer are stored inside a `const' RTX to mark them as constant. - Therefore, there is no need to recognize such sums specifically as - legitimate addresses. Normally you would simply recognize any `const' as - legitimate. - - Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant sums that - are not marked with `const'. It assumes that a naked `plus' indicates - indexing. If so, then you *must* reject such naked constant sums as - illegitimate addresses, so that none of them will be given to - `PRINT_OPERAND_ADDRESS'. - - On some machines, whether a symbolic address is legitimate depends on the - section that the address refers to. On these machines, define the macro - `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and - then check for it here. When you see a `const', you will have to look - inside it to find the `symbol_ref' in order to determine the section. - - The best way to modify the name string is by adding text to the beginning, - with suitable punctuation to prevent any ambiguity. Allocate the new name - in `saveable_obstack'. You will have to modify `ASM_OUTPUT_LABELREF' to - remove and decode the added text and output the name accordingly, and define - `(* targetm.strip_name_encoding)' to access the original name string. - - You can check the information stored here into the `symbol_ref' in the - definitions of the macros `GO_IF_LEGITIMATE_ADDRESS' and - `PRINT_OPERAND_ADDRESS'. */ - -#ifdef REG_OK_STRICT -#define REG_OK_STRICT_P 1 -#else -#define REG_OK_STRICT_P 0 -#endif - -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ - do \ - { \ - if (frv_legitimate_address_p (MODE, X, REG_OK_STRICT_P, \ - FALSE, FALSE)) \ - goto LABEL; \ - } \ - while (0) - /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for use as a base register. For hard registers, it should always accept those which the hardware permits and reject the others. Whether the macro accepts @@ -2913,9 +2842,6 @@ enum frv_builtins /* Enable prototypes on the call rtl functions. */ #define MD_CALL_PROTOTYPES 1 -extern GTY(()) rtx frv_compare_op0; /* operand save for */ -extern GTY(()) rtx frv_compare_op1; /* comparison generation */ - #define CPU_UNITS_QUERY 1 #ifdef __FRV_FDPIC__ diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md index aadf02c4fbd..9315f9b623c 100644 --- a/gcc/config/frv/frv.md +++ b/gcc/config/frv/frv.md @@ -3734,59 +3734,7 @@ ;; :: ;; :::::::::::::::::::: -;; Note, we store the operands in the comparison insns, and use them later -;; when generating the branch or scc operation. - -;; First the routines called by the machine independent part of the compiler -(define_expand "cmpsi" - [(set (cc0) - (compare (match_operand:SI 0 "integer_register_operand" "") - (match_operand:SI 1 "gpr_or_int10_operand" "")))] - "" - " -{ - frv_compare_op0 = operands[0]; - frv_compare_op1 = operands[1]; - DONE; -}") - -;(define_expand "cmpdi" -; [(set (cc0) -; (compare (match_operand:DI 0 "register_operand" "") -; (match_operand:DI 1 "nonmemory_operand" "")))] -; "" -; " -;{ -; frv_compare_op0 = operands[0]; -; frv_compare_op1 = operands[1]; -; DONE; -;}") - -(define_expand "cmpsf" - [(set (cc0) - (compare (match_operand:SF 0 "fpr_operand" "") - (match_operand:SF 1 "fpr_operand" "")))] - "TARGET_HARD_FLOAT" - " -{ - frv_compare_op0 = operands[0]; - frv_compare_op1 = operands[1]; - DONE; -}") - -(define_expand "cmpdf" - [(set (cc0) - (compare (match_operand:DF 0 "fpr_operand" "") - (match_operand:DF 1 "fpr_operand" "")))] - "TARGET_HARD_FLOAT && TARGET_DOUBLE" - " -{ - frv_compare_op0 = operands[0]; - frv_compare_op1 = operands[1]; - DONE; -}") - -;; Now, the actual comparisons, generated by the branch and/or scc operations +;; The comparisons are generated by the branch and/or scc operations (define_insn "cmpsi_cc" [(set (match_operand:CC 0 "icc_operand" "=t,t") @@ -3847,137 +3795,31 @@ ;; :::::::::::::::::::: ;; Define_expands called by the machine independent part of the compiler -;; to allocate a new comparison register. Each of these named patterns -;; must be present, and they cannot be amalgamated into one pattern. -;; -;; If a fixed condition code register is being used, (as opposed to, say, -;; using cc0), then the expands should look like this: -;; -;; (define_expand "<name_of_test>" -;; [(set (reg:CC <number_of_CC_register>) -;; (compare:CC (match_dup 1) -;; (match_dup 2))) -;; (set (pc) -;; (if_then_else (eq:CC (reg:CC <number_of_CC_register>) -;; (const_int 0)) -;; (label_ref (match_operand 0 "" "")) -;; (pc)))] -;; "" -;; "{ -;; operands[1] = frv_compare_op0; -;; operands[2] = frv_compare_op1; -;; }" -;; ) - -(define_expand "beq" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (EQ, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "bne" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (NE, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "blt" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (LT, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "ble" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (LE, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "bgt" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (GT, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "bge" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (GE, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "bltu" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (LTU, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "bleu" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (LEU, operands[0])) - FAIL; - - DONE; -}") +;; to allocate a new comparison register. -(define_expand "bgtu" - [(use (match_operand 0 "" ""))] - "" - " -{ - if (! frv_emit_cond_branch (GTU, operands[0])) - FAIL; +(define_expand "cbranchdf4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:DF 1 "fpr_operand" "") + (match_operand:DF 2 "fpr_operand" "")])) + (use (match_operand 3 ""))] + "TARGET_HARD_FLOAT && TARGET_DOUBLE" + { if (frv_emit_cond_branch (operands)) DONE; gcc_unreachable (); }) - DONE; -}") +(define_expand "cbranchsf4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:SF 1 "fpr_operand" "") + (match_operand:SF 2 "fpr_operand" "")])) + (use (match_operand 3 ""))] + "TARGET_HARD_FLOAT" + { if (frv_emit_cond_branch (operands)) DONE; gcc_unreachable (); }) -(define_expand "bgeu" - [(use (match_operand 0 "" ""))] +(define_expand "cbranchsi4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:SI 1 "integer_register_operand" "") + (match_operand:SI 2 "gpr_or_int10_operand" "")])) + (use (match_operand 3 ""))] "" - " -{ - if (! frv_emit_cond_branch (GEU, operands[0])) - FAIL; - - DONE; -}") + { if (frv_emit_cond_branch (operands)) DONE; gcc_unreachable (); }) ;; Actual branches. We must allow for the (label_ref) and the (pc) to be ;; swapped. If they are swapped, it reverses the sense of the branch. @@ -4142,115 +3984,29 @@ ;; Define_expands called by the machine independent part of the compiler ;; to allocate a new comparison register -(define_expand "seq" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (EQ, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "sne" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (NE, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "slt" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (LT, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "sle" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (LE, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "sgt" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (GT, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "sge" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (GE, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "sltu" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (LTU, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "sleu" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (LEU, operands[0])) - FAIL; - - DONE; -}") - -(define_expand "sgtu" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (GTU, operands[0])) - FAIL; - - DONE; -}") +(define_expand "cstoredf4" + [(use (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:DF 2 "fpr_operand") + (match_operand:DF 3 "fpr_operand")])) + (clobber (match_operand:SI 0 "register_operand"))] + "TARGET_HARD_FLOAT && TARGET_DOUBLE" + { if (frv_emit_scc (operands)) DONE; else FAIL; }) -(define_expand "sgeu" - [(match_operand:SI 0 "integer_register_operand" "")] - "TARGET_SCC" - " -{ - if (! frv_emit_scc (GEU, operands[0])) - FAIL; +(define_expand "cstoresf4" + [(use (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:SF 2 "fpr_operand") + (match_operand:SF 3 "fpr_operand")])) + (clobber (match_operand:SI 0 "register_operand"))] + "TARGET_HARD_FLOAT" + { if (frv_emit_scc (operands)) DONE; else FAIL; }) - DONE; -}") +(define_expand "cstoresi4" + [(use (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:SI 2 "integer_register_operand") + (match_operand:SI 3 "gpr_or_int10_operand")])) + (clobber (match_operand:SI 0 "register_operand"))] + "" + { if (frv_emit_scc (operands)) DONE; else FAIL; }) (define_insn "*scc_int" [(set (match_operand:SI 0 "integer_register_operand" "=d") diff --git a/gcc/config/frv/predicates.md b/gcc/config/frv/predicates.md index 5f7ef4edac9..4ecfa9aed45 100644 --- a/gcc/config/frv/predicates.md +++ b/gcc/config/frv/predicates.md @@ -239,8 +239,8 @@ subreg = SUBREG_REG (op); code = GET_CODE (subreg); if (code == MEM) - return frv_legitimate_address_p (mode, XEXP (subreg, 0), - reload_completed, FALSE, FALSE); + return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0), + reload_completed, FALSE, FALSE); return (code == REG); @@ -278,8 +278,8 @@ subreg = SUBREG_REG (op); code = GET_CODE (subreg); if (code == MEM) - return frv_legitimate_address_p (mode, XEXP (subreg, 0), - reload_completed, FALSE, FALSE); + return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0), + reload_completed, FALSE, FALSE); return (code == REG); @@ -334,8 +334,8 @@ subreg = SUBREG_REG (op); code = GET_CODE (subreg); if (code == MEM) - return frv_legitimate_address_p (mode, XEXP (subreg, 0), - reload_completed, TRUE, FALSE); + return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0), + reload_completed, TRUE, FALSE); return (code == REG); @@ -373,8 +373,8 @@ subreg = SUBREG_REG (op); code = GET_CODE (subreg); if (code == MEM) - return frv_legitimate_address_p (mode, XEXP (subreg, 0), - reload_completed, TRUE, FALSE); + return frv_legitimate_address_p_1 (mode, XEXP (subreg, 0), + reload_completed, TRUE, FALSE); return (code == REG); @@ -599,7 +599,7 @@ if (GET_MODE (op) != mode && GET_MODE (op) != VOIDmode) return FALSE; - return frv_legitimate_address_p (DImode, op, reload_completed, FALSE, TRUE); + return frv_legitimate_address_p_1 (DImode, op, reload_completed, FALSE, TRUE); }) ;; TODO: Add a comment here. diff --git a/gcc/config/h8300/h8300-protos.h b/gcc/config/h8300/h8300-protos.h index 2e7b72fe6c4..35023c6236d 100644 --- a/gcc/config/h8300/h8300-protos.h +++ b/gcc/config/h8300/h8300-protos.h @@ -44,7 +44,8 @@ extern const char *output_logical_op (enum machine_mode, rtx *); extern unsigned int compute_logical_op_length (enum machine_mode, rtx *); extern int compute_logical_op_cc (enum machine_mode, rtx *); -extern void h8300_expand_branch (enum rtx_code, rtx); +extern void h8300_expand_branch (rtx[]); +extern void h8300_expand_store (rtx[]); extern bool expand_a_shift (enum machine_mode, int, rtx[]); extern int h8300_shift_needs_scratch_p (int, enum machine_mode); extern int expand_a_rotate (rtx[]); @@ -59,7 +60,6 @@ extern int same_cmp_preceding_p (rtx); extern int same_cmp_following_p (rtx); extern int h8300_legitimate_constant_p (rtx); -extern int h8300_legitimate_address_p (enum machine_mode, rtx, int); /* Used in builtins.c */ extern rtx h8300_return_addr_rtx (int, rtx); diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index 34d1f82687c..8630823ca85 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -1226,6 +1226,11 @@ h8300_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed) *total = 20; return true; + case COMPARE: + if (XEXP (x, 1) == const0_rtx) + *total = 0; + return false; + case AND: if (!h8300_dst_operand (XEXP (x, 0), VOIDmode) || !h8300_src_operand (XEXP (x, 1), VOIDmode)) @@ -3503,16 +3508,42 @@ compute_logical_op_cc (enum machine_mode mode, rtx *operands) /* Expand a conditional branch. */ void -h8300_expand_branch (enum rtx_code code, rtx label) +h8300_expand_branch (rtx operands[]) { + enum rtx_code code = GET_CODE (operands[0]); + rtx op0 = operands[1]; + rtx op1 = operands[2]; + rtx label = operands[3]; rtx tmp; + tmp = gen_rtx_COMPARE (VOIDmode, op0, op1); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, tmp)); + tmp = gen_rtx_fmt_ee (code, VOIDmode, cc0_rtx, const0_rtx); tmp = gen_rtx_IF_THEN_ELSE (VOIDmode, tmp, gen_rtx_LABEL_REF (VOIDmode, label), pc_rtx); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, tmp)); } + + +/* Expand a conditional store. */ + +void +h8300_expand_store (rtx operands[]) +{ + rtx dest = operands[0]; + enum rtx_code code = GET_CODE (operands[1]); + rtx op0 = operands[2]; + rtx op1 = operands[3]; + rtx tmp; + + tmp = gen_rtx_COMPARE (VOIDmode, op0, op1); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, tmp)); + + tmp = gen_rtx_fmt_ee (code, GET_MODE (dest), cc0_rtx, const0_rtx); + emit_insn (gen_rtx_SET (VOIDmode, dest, tmp)); +} /* Shifts. @@ -5655,8 +5686,8 @@ h8300_rtx_ok_for_base_p (rtx x, int strict) legitimate address has the form REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */ -int -h8300_legitimate_address_p (enum machine_mode mode, rtx x, int strict) +static bool +h8300_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { /* The register indirect addresses like @er0 is always valid. */ if (h8300_rtx_ok_for_base_p (x, strict)) @@ -5764,6 +5795,9 @@ h8300_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) #undef TARGET_HARD_REGNO_SCRATCH_OK #define TARGET_HARD_REGNO_SCRATCH_OK h8300_hard_regno_scratch_ok +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P h8300_legitimate_address_p + #undef TARGET_DEFAULT_TARGET_FLAGS #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h index 7e3711323aa..dd95ed7253d 100644 --- a/gcc/config/h8300/h8300.h +++ b/gcc/config/h8300/h8300.h @@ -921,24 +921,6 @@ struct cum_arg ((C) == 'W') -#ifndef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - do \ - { \ - if (h8300_legitimate_address_p ((MODE), (X), 0)) \ - goto ADDR; \ - } \ - while (0) -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - do \ - { \ - if (h8300_legitimate_address_p ((MODE), (X), 1)) \ - goto ADDR; \ - } \ - while (0) -#endif - /* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index 61f876c8399..c05e8c6966f 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -961,28 +961,33 @@ ;; ---------------------------------------------------------------------- (define_insn "" - [(set (cc0) (zero_extract:HI (match_operand:QI 0 "bit_memory_operand" "r,U") - (const_int 1) - (match_operand 1 "const_int_operand" "n,n")))] + [(set (cc0) (compare + (zero_extract:QI (match_operand:QI 0 "bit_memory_operand" "r,U") + (const_int 1) + (match_operand 1 "const_int_operand" "n,n")) + (const_int 0)))] "TARGET_H8300" "btst %Z1,%Y0" [(set_attr "length" "2,4") (set_attr "cc" "set_zn,set_zn")]) (define_insn "" - [(set (cc0) (zero_extract:HI (match_operand:HI 0 "register_operand" "r") - (const_int 1) - (match_operand 1 "const_int_operand" "n")))] + [(set (cc0) (compare + (zero_extract:HI (match_operand:HI 0 "register_operand" "r") + (const_int 1) + (match_operand 1 "const_int_operand" "n")) + (const_int 0)))] "TARGET_H8300" "btst %Z1,%Y0" [(set_attr "length" "2") (set_attr "cc" "set_zn")]) (define_insn_and_split "*tst_extzv_1_n" - [(set (cc0) - (zero_extract:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>") - (const_int 1) - (match_operand 1 "const_int_operand" "n,n,n"))) + [(set (cc0) (compare + (zero_extract:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>") + (const_int 1) + (match_operand 1 "const_int_operand" "n,n,n")) + (const_int 0))) (clobber (match_scratch:QI 2 "=X,X,&r"))] "(TARGET_H8300H || TARGET_H8300S)" "@ @@ -993,18 +998,20 @@ && !OK_FOR_U (operands[0])" [(set (match_dup 2) (match_dup 0)) - (parallel [(set (cc0) (zero_extract:SI (match_dup 2) - (const_int 1) - (match_dup 1))) + (parallel [(set (cc0) (compare (zero_extract:SI (match_dup 2) + (const_int 1) + (match_dup 1)) + (const_int 0))) (clobber (scratch:QI))])] "" [(set_attr "length" "2,8,10") (set_attr "cc" "set_zn,set_zn,set_zn")]) (define_insn "" - [(set (cc0) (zero_extract:SI (match_operand:SI 0 "register_operand" "r") - (const_int 1) - (match_operand 1 "const_int_operand" "n")))] + [(set (cc0) (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "r") + (const_int 1) + (match_operand 1 "const_int_operand" "n")) + (const_int 0)))] "(TARGET_H8300H || TARGET_H8300S) && INTVAL (operands[1]) <= 15" "btst %Z1,%Y0" @@ -1012,10 +1019,10 @@ (set_attr "cc" "set_zn")]) (define_insn_and_split "*tstsi_upper_bit" - [(set (cc0) - (zero_extract:SI (match_operand:SI 0 "register_operand" "r") - (const_int 1) - (match_operand 1 "const_int_operand" "n"))) + [(set (cc0) (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "r") + (const_int 1) + (match_operand 1 "const_int_operand" "n")) + (const_int 0))) (clobber (match_scratch:SI 2 "=&r"))] "(TARGET_H8300H || TARGET_H8300S) && INTVAL (operands[1]) >= 16" @@ -1026,18 +1033,18 @@ (const_int -65536)) (lshiftrt:SI (match_dup 0) (const_int 16)))) - (set (cc0) - (zero_extract:SI (match_dup 2) - (const_int 1) - (match_dup 3)))] + (set (cc0) (compare (zero_extract:SI (match_dup 2) + (const_int 1) + (match_dup 3)) + (const_int 0)))] "operands[3] = GEN_INT (INTVAL (operands[1]) - 16);") (define_insn "*tstsi_variable_bit" - [(set (cc0) - (zero_extract:SI (match_operand:SI 0 "register_operand" "r") - (const_int 1) - (and:SI (match_operand:SI 1 "register_operand" "r") - (const_int 7))))] + [(set (cc0) (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "r") + (const_int 1) + (and:SI (match_operand:SI 1 "register_operand" "r") + (const_int 7))) + (const_int 0)))] "TARGET_H8300H || TARGET_H8300S" "btst %w1,%w0" [(set_attr "length" "2") @@ -1045,10 +1052,12 @@ (define_insn_and_split "*tstsi_variable_bit_qi" [(set (cc0) - (zero_extract:SI (zero_extend:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>")) - (const_int 1) - (and:SI (match_operand:SI 1 "register_operand" "r,r,r") - (const_int 7)))) + (compare + (zero_extract:SI (zero_extend:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>")) + (const_int 1) + (and:SI (match_operand:SI 1 "register_operand" "r,r,r") + (const_int 7))) + (const_int 0))) (clobber (match_scratch:QI 2 "=X,X,&r"))] "(TARGET_H8300H || TARGET_H8300S)" "@ @@ -1059,55 +1068,59 @@ && !OK_FOR_U (operands[0])" [(set (match_dup 2) (match_dup 0)) - (parallel [(set (cc0) (zero_extract:SI (zero_extend:SI (match_dup 2)) - (const_int 1) - (and:SI (match_dup 1) - (const_int 7)))) + (parallel [(set (cc0) (compare (zero_extract:SI (zero_extend:SI (match_dup 2)) + (const_int 1) + (and:SI (match_dup 1) + (const_int 7))) + (const_int 0))) (clobber (scratch:QI))])] "" [(set_attr "length" "2,8,10") (set_attr "cc" "set_zn,set_zn,set_zn")]) -(define_insn "tstqi" - [(set (cc0) (match_operand:QI 0 "register_operand" "r"))] +(define_insn "*tstqi" + [(set (cc0) (compare (match_operand:QI 0 "register_operand" "r") + (const_int 0)))] "" "mov.b %X0,%X0" [(set_attr "length" "2") (set_attr "cc" "set_znv")]) -(define_insn "tsthi" - [(set (cc0) (match_operand:HI 0 "register_operand" "r"))] +(define_insn "*tsthi" + [(set (cc0) (compare (match_operand:HI 0 "register_operand" "r") + (const_int 0)))] "" "mov.w %T0,%T0" [(set_attr "length" "2") (set_attr "cc" "set_znv")]) (define_insn "*tsthi_upper" - [(set (cc0) - (and:HI (match_operand:HI 0 "register_operand" "r") - (const_int -256)))] + [(set (cc0) (compare (and:HI (match_operand:HI 0 "register_operand" "r") + (const_int -256)) + (const_int 0)))] "" "mov.b %t0,%t0" [(set_attr "length" "2") (set_attr "cc" "set_znv")]) -(define_insn "tstsi" - [(set (cc0) (match_operand:SI 0 "register_operand" "r"))] +(define_insn "*tstsi" + [(set (cc0) (compare (match_operand:SI 0 "register_operand" "r") + (const_int 0)))] "TARGET_H8300H || TARGET_H8300S" "mov.l %S0,%S0" [(set_attr "length" "2") (set_attr "cc" "set_znv")]) (define_insn "*tstsi_upper" - [(set (cc0) - (and:SI (match_operand:SI 0 "register_operand" "r") - (const_int -65536)))] + [(set (cc0) (compare (and:SI (match_operand:SI 0 "register_operand" "r") + (const_int -65536)) + (const_int 0)))] "" "mov.w %e0,%e0" [(set_attr "length" "2") (set_attr "cc" "set_znv")]) -(define_insn "cmpqi" +(define_insn "*cmpqi" [(set (cc0) (compare (match_operand:QI 0 "h8300_dst_operand" "rQ") (match_operand:QI 1 "h8300_src_operand" "rQi")))] @@ -1116,19 +1129,6 @@ [(set_attr "length_table" "addb") (set_attr "cc" "compare")]) -(define_expand "cmphi" - [(set (cc0) - (compare (match_operand:HI 0 "h8300_dst_operand" "") - (match_operand:HI 1 "h8300_src_operand" "")))] - "" - " -{ - /* Force operand1 into a register if we're compiling - for the H8/300. */ - if (GET_CODE (operands[1]) != REG && TARGET_H8300) - operands[1] = force_reg (HImode, operands[1]); -}") - (define_insn "*cmphi_h8300_znvc" [(set (cc0) (compare (match_operand:HI 0 "register_operand" "r") @@ -2155,55 +2155,37 @@ ;; Conditional jump instructions -(define_expand "ble" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (LE, operands[0]); DONE;") - -(define_expand "bleu" - [(match_operand 0 "" "")] +(define_expand "cbranchqi4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:QI 1 "h8300_dst_operand" "") + (match_operand:QI 2 "h8300_src_operand" "")])) + (use (match_operand 3 ""))] "" - "h8300_expand_branch (LEU, operands[0]); DONE;") + "h8300_expand_branch (operands); DONE;") -(define_expand "bge" - [(match_operand 0 "" "")] +(define_expand "cbranchhi4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:HI 1 "h8300_dst_operand" "") + (match_operand:HI 2 "h8300_src_operand" "")])) + (use (match_operand 3 ""))] "" - "h8300_expand_branch (GE, operands[0]); DONE;") - -(define_expand "bgeu" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (GEU, operands[0]); DONE;") - -(define_expand "blt" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (LT, operands[0]); DONE;") - -(define_expand "bltu" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (LTU, operands[0]); DONE;") - -(define_expand "bgt" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (GT, operands[0]); DONE;") - -(define_expand "bgtu" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (GTU, operands[0]); DONE;") - -(define_expand "beq" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (EQ, operands[0]); DONE;") + " +{ + /* Force operand1 into a register if we're compiling + for the H8/300. */ + if ((GET_CODE (operands[2]) != REG && operands[2] != const0_rtx) + && TARGET_H8300) + operands[2] = force_reg (HImode, operands[2]); + h8300_expand_branch (operands); DONE; +}") -(define_expand "bne" - [(match_operand 0 "" "")] - "" - "h8300_expand_branch (NE, operands[0]); DONE;") +(define_expand "cbranchsi4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:SI 1 "h8300_dst_operand" "") + (match_operand:SI 2 "h8300_src_operand" "")])) + (use (match_operand 3 ""))] + "TARGET_H8300H || TARGET_H8300S" + "h8300_expand_branch (operands); DONE;") (define_insn "branch_true" [(set (pc) @@ -3019,8 +3001,8 @@ (clobber (match_operand:QI 3 "register_operand" ""))] "epilogue_completed && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))" - [(set (cc0) - (match_dup 1)) + [(set (cc0) (compare (match_dup 1) + (const_int 0))) (set (pc) (if_then_else (le (cc0) (const_int 0)) (label_ref (match_dup 5)) @@ -3032,8 +3014,8 @@ (clobber (scratch:QI))]) (set (match_dup 1) (plus:QI (match_dup 1) (const_int -1))) - (set (cc0) - (match_dup 1)) + (set (cc0) (compare (match_dup 1) + (const_int 0))) (set (pc) (if_then_else (ne (cc0) (const_int 0)) (label_ref (match_dup 4)) @@ -3052,8 +3034,8 @@ && !find_regno_note (insn, REG_DEAD, REGNO (operands[1]))" [(set (match_dup 3) (match_dup 1)) - (set (cc0) - (match_dup 3)) + (set (cc0) (compare (match_dup 3) + (const_int 0))) (set (pc) (if_then_else (le (cc0) (const_int 0)) (label_ref (match_dup 5)) @@ -3065,8 +3047,8 @@ (clobber (scratch:QI))]) (set (match_dup 3) (plus:QI (match_dup 3) (const_int -1))) - (set (cc0) - (match_dup 3)) + (set (cc0) (compare (match_dup 3) + (const_int 0))) (set (pc) (if_then_else (ne (cc0) (const_int 0)) (label_ref (match_dup 4)) @@ -3413,17 +3395,29 @@ [(set_attr "cc" "none_0hit") (set_attr "length_table" "bitfield")]) -(define_expand "seq" - [(set (match_operand:HI 0 "register_operand" "") - (eq:HI (cc0) (const_int 0)))] +(define_expand "cstoreqi4" + [(use (match_operator 1 "eqne_operator" + [(match_operand:QI 2 "h8300_dst_operand" "") + (match_operand:QI 3 "h8300_src_operand" "")])) + (clobber (match_operand:HI 0 "register_operand"))] "TARGET_H8300SX" - "") + "h8300_expand_store (operands); DONE;") -(define_expand "sne" - [(set (match_operand:HI 0 "register_operand" "") - (ne:HI (cc0) (const_int 0)))] +(define_expand "cstorehi4" + [(use (match_operator 1 "eqne_operator" + [(match_operand:HI 2 "h8300_dst_operand" "") + (match_operand:HI 3 "h8300_src_operand" "")])) + (clobber (match_operand:HI 0 "register_operand"))] "TARGET_H8300SX" - "") + "h8300_expand_store (operands); DONE;") + +(define_expand "cstoresi4" + [(use (match_operator 1 "eqne_operator" + [(match_operand:SI 2 "h8300_dst_operand" "") + (match_operand:SI 3 "h8300_src_operand" "")])) + (clobber (match_operand:HI 0 "register_operand"))] + "TARGET_H8300SX" + "h8300_expand_store (operands); DONE;") (define_insn "*bstzhireg" [(set (match_operand:HI 0 "register_operand" "=r") @@ -3451,13 +3445,7 @@ [(set (cc0) (match_dup 5)) (set (zero_extract:QI (match_dup 0) (const_int 1) (match_dup 1)) (match_op_dup:QI 2 [(cc0) (const_int 0)]))] - " -{ - if (operands[4] == const0_rtx && GET_CODE (operands[3]) == REG) - operands[5] = operands[3]; - else - operands[5] = gen_rtx_COMPARE (VOIDmode, operands[3], operands[4]); -}" + "operands[5] = gen_rtx_COMPARE (VOIDmode, operands[3], operands[4]);" [(set_attr "cc" "set_znv,compare")]) (define_insn "*bstz" @@ -3499,13 +3487,7 @@ (if_then_else:QI (match_op_dup 1 [(cc0) (const_int 0)]) (ior:QI (match_dup 4) (match_dup 5)) (match_dup 4)))] - " -{ - if (operands[3] == const0_rtx && GET_CODE (operands[2]) == REG) - operands[6] = operands[2]; - else - operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]); -}" + "operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);" [(set_attr "cc" "set_znv,compare")]) (define_insn "*condbset" @@ -3541,13 +3523,7 @@ (if_then_else:QI (match_op_dup 1 [(cc0) (const_int 0)]) (and:QI (match_dup 4) (match_dup 5)) (match_dup 4)))] - " -{ - if (operands[3] == const0_rtx && GET_CODE (operands[2]) == REG) - operands[6] = operands[2]; - else - operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]); -}" + "operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);" [(set_attr "cc" "set_znv,compare")]) (define_insn "*condbclr" @@ -3587,13 +3563,7 @@ (ashift:QI (const_int 1) (match_operand:QI 5 "register_operand" "r,r"))) (match_dup 4)))] - " -{ - if (operands[3] == const0_rtx && GET_CODE (operands[2]) == REG) - operands[6] = operands[2]; - else - operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]); -}" + "operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);" [(set_attr "cc" "set_znv,compare")]) (define_insn "*condbsetreg" @@ -3634,13 +3604,7 @@ (ashift:QI (const_int 1) (match_operand:QI 5 "register_operand" "r,r"))) (match_dup 4)))] - " -{ - if (operands[3] == const0_rtx && GET_CODE (operands[2]) == REG) - operands[6] = operands[2]; - else - operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]); -}" + "operands[6] = gen_rtx_COMPARE (VOIDmode, operands[2], operands[3]);" [(set_attr "cc" "set_znv,compare")]) (define_insn "*condbclrreg" @@ -3878,10 +3842,10 @@ "(TARGET_H8300H || TARGET_H8300S)" "#" "&& reload_completed" - [(set (cc0) - (zero_extract:SI (match_dup 1) - (const_int 1) - (const_int 0))) + [(set (cc0) (compare (zero_extract:SI (match_dup 1) + (const_int 1) + (const_int 0)) + (const_int 0))) (set (pc) (if_then_else (eq (cc0) (const_int 0)) @@ -3901,10 +3865,10 @@ "(TARGET_H8300H || TARGET_H8300S)" "#" "&& reload_completed" - [(set (cc0) - (zero_extract:SI (match_dup 1) - (const_int 1) - (const_int 0))) + [(set (cc0) (compare (zero_extract:SI (match_dup 1) + (const_int 1) + (const_int 0)) + (const_int 0))) (set (pc) (if_then_else (ne (cc0) (const_int 0)) @@ -4398,8 +4362,8 @@ "" "#" "" - [(set (cc0) - (match_dup 0)) + [(set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (ge (cc0) (const_int 0)) @@ -4418,8 +4382,8 @@ "" "#" "" - [(set (cc0) - (match_dup 0)) + [(set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (lt (cc0) (const_int 0)) @@ -4852,8 +4816,8 @@ [(set (match_operand:HI 0 "register_operand" "") (plus:HI (match_dup 0) (match_operand 1 "incdec_operand" ""))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_operator 3 "eqne_operator" [(cc0) (const_int 0)]) @@ -4864,8 +4828,8 @@ (unspec:HI [(match_dup 0) (match_dup 1)] UNSPEC_INCDEC)) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -4878,8 +4842,8 @@ [(set (match_operand:SI 0 "register_operand" "") (plus:SI (match_dup 0) (match_operand 1 "incdec_operand" ""))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_operator 3 "eqne_operator" [(cc0) (const_int 0)]) @@ -4890,8 +4854,8 @@ (unspec:SI [(match_dup 0) (match_dup 1)] UNSPEC_INCDEC)) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -4900,9 +4864,10 @@ (define_peephole2 [(parallel [(set (cc0) - (zero_extract:SI (match_operand:QI 0 "register_operand" "") - (const_int 1) - (const_int 7))) + (compare (zero_extract:SI (match_operand:QI 0 "register_operand" "") + (const_int 1) + (const_int 7)) + (const_int 0))) (clobber (scratch:QI))]) (set (pc) (if_then_else (match_operator 1 "eqne_operator" @@ -4910,8 +4875,8 @@ (label_ref (match_operand 2 "" "")) (pc)))] "(TARGET_H8300H || TARGET_H8300S)" - [(set (cc0) - (match_dup 0)) + [(set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5032,6 +4997,45 @@ "operands[3] = gen_lowpart (HImode, operands[0]); operands[4] = gen_lowpart (HImode, operands[1]);") +;; Convert a memory comparison to a move if there is a scratch register. + +(define_peephole2 + [(match_scratch:QI 1 "r") + (set (cc0) + (compare (match_operand:QI 0 "memory_operand" "") + (const_int 0)))] + "" + [(set (match_dup 1) + (match_dup 0)) + (set (cc0) (compare (match_dup 1) + (const_int 0)))] + "") + +(define_peephole2 + [(match_scratch:HI 1 "r") + (set (cc0) + (compare (match_operand:HI 0 "memory_operand" "") + (const_int 0)))] + "(TARGET_H8300H || TARGET_H8300S)" + [(set (match_dup 1) + (match_dup 0)) + (set (cc0) (compare (match_dup 1) + (const_int 0)))] + "") + +(define_peephole2 + [(match_scratch:SI 1 "r") + (set (cc0) + (compare (match_operand:SI 0 "memory_operand" "") + (const_int 0)))] + "(TARGET_H8300H || TARGET_H8300S)" + [(set (match_dup 1) + (match_dup 0)) + (set (cc0) (compare (match_dup 1) + (const_int 0)))] + "") + + ;; (compare (reg:HI) (const_int)) takes 4 bytes, so we try to achieve ;; the equivalent with shorter sequences. Here is the summary. Cases ;; are grouped for each define_peephole2. @@ -5073,13 +5077,14 @@ (label_ref (match_operand 2 "" "")) (pc)))] "(TARGET_H8300H || TARGET_H8300S) + && INTVAL (operands[1]) != 0 && peep2_reg_dead_p (1, operands[0])" [(set (match_dup 0) (unspec:HI [(match_dup 0) (match_dup 4)] UNSPEC_INCDEC)) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5113,8 +5118,8 @@ (ashiftrt:HI (match_dup 0) (match_dup 4))) (clobber (scratch:QI))]) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_dup 2) (label_ref (match_dup 3)) @@ -5148,8 +5153,8 @@ (ashiftrt:HI (match_dup 0) (match_dup 4))) (clobber (scratch:QI))]) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_dup 5) (label_ref (match_dup 3)) @@ -5182,9 +5187,9 @@ (label_ref (match_operand 2 "" "")) (pc)))] "TARGET_H8300H || TARGET_H8300S" - [(set (cc0) - (and:HI (match_dup 0) - (const_int -256))) + [(set (cc0) (compare (and:HI (match_dup 0) + (const_int -256)) + (const_int 0))) (set (pc) (if_then_else (match_dup 1) (label_ref (match_dup 2)) @@ -5211,9 +5216,9 @@ (label_ref (match_operand 2 "" "")) (pc)))] "TARGET_H8300H || TARGET_H8300S" - [(set (cc0) - (and:HI (match_dup 0) - (const_int -256))) + [(set (cc0) (compare (and:HI (match_dup 0) + (const_int -256)) + (const_int 0))) (set (pc) (if_then_else (match_dup 3) (label_ref (match_dup 2)) @@ -5307,13 +5312,14 @@ (label_ref (match_operand 2 "" "")) (pc)))] "(TARGET_H8300H || TARGET_H8300S) + && INTVAL (operands[1]) != 0 && peep2_reg_dead_p (1, operands[0])" [(set (match_dup 0) (unspec:SI [(match_dup 0) (match_dup 4)] UNSPEC_INCDEC)) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5348,8 +5354,8 @@ [(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5381,13 +5387,14 @@ && ((INTVAL (operands[1]) & 0x00ff) == INTVAL (operands[1]) || (INTVAL (operands[1]) & 0xff00) == INTVAL (operands[1]) || INTVAL (operands[1]) == 0x0000ffff) + && INTVAL (operands[1]) != 0 && INTVAL (operands[1]) != 1 && INTVAL (operands[1]) != 2" [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5425,8 +5432,8 @@ (match_dup 4))) (set (match_dup 0) (not:SI (match_dup 0))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5464,8 +5471,8 @@ (unspec:SI [(match_dup 0) (const_int -1)] UNSPEC_INCDEC)) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5507,8 +5514,8 @@ (ashiftrt:SI (match_dup 4) (match_dup 5))) (clobber (scratch:QI))]) - (set (cc0) - (match_dup 4)) + (set (cc0) (compare (match_dup 4) + (const_int 0))) (set (pc) (if_then_else (match_dup 2) (label_ref (match_dup 3)) @@ -5550,8 +5557,8 @@ (ashiftrt:SI (match_dup 4) (match_dup 5))) (clobber (scratch:QI))]) - (set (cc0) - (match_dup 4)) + (set (cc0) (compare (match_dup 4) + (const_int 0))) (set (pc) (if_then_else (match_dup 6) (label_ref (match_dup 3)) @@ -5591,8 +5598,8 @@ (ashiftrt:SI (match_dup 0) (match_dup 4))) (clobber (scratch:QI))]) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_dup 2) (label_ref (match_dup 3)) @@ -5626,8 +5633,8 @@ (ashiftrt:SI (match_dup 0) (match_dup 4))) (clobber (scratch:QI))]) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_dup 5) (label_ref (match_dup 3)) @@ -5672,8 +5679,8 @@ [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 4))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_dup 2) (label_ref (match_dup 3)) @@ -5712,8 +5719,8 @@ [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 4))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_dup 5) (label_ref (match_dup 3)) @@ -5746,9 +5753,9 @@ (label_ref (match_operand 2 "" "")) (pc)))] "TARGET_H8300H || TARGET_H8300S" - [(set (cc0) - (and:SI (match_dup 0) - (const_int -65536))) + [(set (cc0) (compare (and:SI (match_dup 0) + (const_int -65536)) + (const_int 0))) (set (pc) (if_then_else (match_dup 1) (label_ref (match_dup 2)) @@ -5775,9 +5782,9 @@ (label_ref (match_operand 2 "" "")) (pc)))] "TARGET_H8300H || TARGET_H8300S" - [(set (cc0) - (and:SI (match_dup 0) - (const_int -65536))) + [(set (cc0) (compare (and:SI (match_dup 0) + (const_int -65536)) + (const_int 0))) (set (pc) (if_then_else (match_dup 3) (label_ref (match_dup 2)) @@ -5814,6 +5821,7 @@ (label_ref (match_operand 2 "" "")) (pc)))] "(TARGET_H8300H || TARGET_H8300S) + && INTVAL (operands[1]) != 0 && !peep2_reg_dead_p (1, operands[0]) && !same_cmp_following_p (insn)" [(set (match_dup 4) @@ -5822,8 +5830,8 @@ (unspec:SI [(match_dup 4) (match_dup 5)] UNSPEC_INCDEC)) - (set (cc0) - (match_dup 4)) + (set (cc0) (compare (match_dup 4) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5836,8 +5844,8 @@ [(set (match_operand:HI 0 "register_operand" "") (and:HI (match_dup 0) (match_operand:HI 1 "const_int_qi_operand" ""))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_operator 3 "eqne_operator" [(cc0) (const_int 0)]) @@ -5847,8 +5855,8 @@ [(set (match_dup 4) (and:QI (match_dup 4) (match_dup 5))) - (set (cc0) - (match_dup 4)) + (set (cc0) (compare (match_dup 4) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5860,8 +5868,8 @@ [(set (match_operand:SI 0 "register_operand" "") (and:SI (match_dup 0) (match_operand:SI 1 "const_int_qi_operand" ""))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_operator 3 "eqne_operator" [(cc0) (const_int 0)]) @@ -5871,8 +5879,8 @@ [(set (match_dup 4) (and:QI (match_dup 4) (match_dup 5))) - (set (cc0) - (match_dup 4)) + (set (cc0) (compare (match_dup 4) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5884,8 +5892,8 @@ [(set (match_operand:SI 0 "register_operand" "") (and:SI (match_dup 0) (match_operand:SI 1 "const_int_hi_operand" ""))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_operator 3 "eqne_operator" [(cc0) (const_int 0)]) @@ -5895,8 +5903,8 @@ [(set (match_dup 4) (and:HI (match_dup 4) (match_dup 5))) - (set (cc0) - (match_dup 4)) + (set (cc0) (compare (match_dup 4) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 3 [(cc0) (const_int 0)]) (label_ref (match_dup 2)) @@ -5911,8 +5919,8 @@ (set (match_dup 0) (xor:SI (match_dup 0) (match_operand:SI 2 "const_int_qi_operand" ""))) - (set (cc0) - (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (pc) (if_then_else (match_operator 4 "eqne_operator" [(cc0) (const_int 0)]) @@ -5926,8 +5934,8 @@ (set (match_dup 5) (xor:QI (match_dup 5) (match_dup 7))) - (set (cc0) - (match_dup 5)) + (set (cc0) (compare (match_dup 5) + (const_int 0))) (set (pc) (if_then_else (match_op_dup 4 [(cc0) (const_int 0)]) (label_ref (match_dup 3)) @@ -6088,7 +6096,8 @@ (match_operand 2 "h8300_src_operand" "")))] "TARGET_H8300SX && peep2_reg_dead_p (2, operands[0]) - && !reg_overlap_mentioned_p (operands[0], operands[2])" + && !reg_overlap_mentioned_p (operands[0], operands[2]) + && operands[2] != const0_rtx" [(set (cc0) (compare (match_dup 1) (match_dup 2)))]) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index 69c6c0c7f3b..cb669378a43 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -336,7 +336,11 @@ detect_caches_intel (bool xeon_mp, unsigned max_level, unsigned max_ext_level) enum vendor_signatures { SIG_INTEL = 0x756e6547 /* Genu */, - SIG_AMD = 0x68747541 /* Auth */, + SIG_AMD = 0x68747541 /* Auth */ +}; + +enum processor_signatures +{ SIG_GEODE = 0x646f6547 /* Geod */ }; @@ -433,19 +437,27 @@ const char *host_detect_local_cpu (int argc, const char **argv) if (vendor == SIG_AMD) { - processor = PROCESSOR_PENTIUM; + unsigned int name; - if (has_mmx) - processor = PROCESSOR_K6; - if (has_3dnowp) - processor = PROCESSOR_ATHLON; - if (has_sse2 || has_longmode) - processor = PROCESSOR_K8; - if (has_sse4a) + /* Detect geode processor by its processor signature. */ + if (ext_level > 0x80000001) + __cpuid (0x80000002, name, ebx, ecx, edx); + else + name = 0; + + if (name == SIG_GEODE) + processor = PROCESSOR_GEODE; + else if (has_sse4a) processor = PROCESSOR_AMDFAM10; + else if (has_sse2 || has_longmode) + processor = PROCESSOR_K8; + else if (has_3dnowp) + processor = PROCESSOR_ATHLON; + else if (has_mmx) + processor = PROCESSOR_K6; + else + processor = PROCESSOR_PENTIUM; } - else if (vendor == SIG_GEODE) - processor = PROCESSOR_GEODE; else { switch (family) diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 803a9da7ca3..8ae5bd66b26 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -56,7 +56,6 @@ extern bool legitimate_constant_p (rtx); extern bool constant_address_p (rtx); extern bool legitimate_pic_operand_p (rtx); extern int legitimate_pic_address_disp_p (rtx); -extern int legitimate_address_p (enum machine_mode, rtx, int); extern void print_reg (rtx, int, FILE*); extern void print_operand (FILE*, rtx, int); @@ -106,7 +105,7 @@ extern int ix86_match_ccmode (rtx, enum machine_mode); extern rtx ix86_expand_compare (enum rtx_code, rtx *, rtx *); extern int ix86_use_fcomi_compare (enum rtx_code); extern void ix86_expand_branch (enum rtx_code, rtx); -extern int ix86_expand_setcc (enum rtx_code, rtx); +extern void ix86_expand_setcc (enum rtx_code, rtx); extern int ix86_expand_int_movcc (rtx[]); extern int ix86_expand_fp_movcc (rtx[]); extern bool ix86_expand_fp_vcond (rtx[]); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 0a329ac1192..d6cabe5eea7 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -9086,13 +9086,6 @@ ix86_cannot_force_const_mem (rtx x) return !legitimate_constant_p (x); } -/* Determine if a given RTX is a valid constant address. */ - -bool -constant_address_p (rtx x) -{ - return CONSTANT_P (x) && legitimate_address_p (Pmode, x, 1); -} /* Nonzero if the constant value X is a legitimate general operand when generating PIC code. It is given that flag_pic is on and @@ -9269,9 +9262,9 @@ legitimate_pic_address_disp_p (rtx disp) convert common non-canonical forms to canonical form so that they will be recognized. */ -int -legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, - rtx addr, int strict) +static bool +ix86_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, + rtx addr, bool strict) { struct ix86_address parts; rtx base, index, disp; @@ -9495,6 +9488,14 @@ legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, report_error: return FALSE; } + +/* Determine if a given RTX is a valid constant address. */ + +bool +constant_address_p (rtx x) +{ + return CONSTANT_P (x) && ix86_legitimate_address_p (Pmode, x, 1); +} /* Return a unique alias set for the GOT. */ @@ -10150,7 +10151,7 @@ ix86_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, } } - if (changed && legitimate_address_p (mode, x, FALSE)) + if (changed && ix86_legitimate_address_p (mode, x, FALSE)) return x; if (GET_CODE (XEXP (x, 0)) == MULT) @@ -10176,7 +10177,7 @@ ix86_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, x = legitimize_pic_address (x, 0); } - if (changed && legitimate_address_p (mode, x, FALSE)) + if (changed && ix86_legitimate_address_p (mode, x, FALSE)) return x; if (REG_P (XEXP (x, 0))) @@ -14943,15 +14944,12 @@ ix86_split_fp_branch (enum rtx_code code, rtx op1, rtx op2, emit_label (label); } -int +void ix86_expand_setcc (enum rtx_code code, rtx dest) { rtx ret, tmp, tmpreg, equiv; rtx second_test, bypass_test; - if (GET_MODE (ix86_compare_op0) == (TARGET_64BIT ? TImode : DImode)) - return 0; /* FAIL */ - gcc_assert (GET_MODE (dest) == QImode); ret = ix86_expand_compare (code, &second_test, &bypass_test); @@ -14990,8 +14988,6 @@ ix86_expand_setcc (enum rtx_code code, rtx dest) ix86_compare_op0, ix86_compare_op1); set_unique_reg_note (get_last_insn (), REG_EQUAL, equiv); } - - return 1; /* DONE */ } /* Expand comparison setting or clearing carry flag. Return true when @@ -15139,6 +15135,8 @@ ix86_expand_int_movcc (rtx operands[]) bool sign_bit_compare_p = false;; start_sequence (); + ix86_compare_op0 = XEXP (operands[1], 0); + ix86_compare_op1 = XEXP (operands[1], 1); compare_op = ix86_expand_compare (code, &second_test, &bypass_test); compare_seq = get_insns (); end_sequence (); @@ -15856,6 +15854,8 @@ ix86_expand_fp_movcc (rtx operands[]) enum rtx_code code = GET_CODE (operands[1]); rtx tmp, compare_op, second_test, bypass_test; + ix86_compare_op0 = XEXP (operands[1], 0); + ix86_compare_op1 = XEXP (operands[1], 1); if (TARGET_SSE_MATH && SSE_FLOAT_MODE_P (mode)) { enum machine_mode cmode; @@ -16383,6 +16383,8 @@ ix86_expand_int_addcc (rtx operands[]) bool fpcmp = false; enum machine_mode mode = GET_MODE (operands[0]); + ix86_compare_op0 = XEXP (operands[1], 0); + ix86_compare_op1 = XEXP (operands[1], 1); if (operands[3] != const1_rtx && operands[3] != constm1_rtx) return 0; @@ -28866,13 +28868,14 @@ void ix86_emit_i387_log1p (rtx op0, rtx op1) rtx tmp = gen_reg_rtx (XFmode); rtx tmp2 = gen_reg_rtx (XFmode); + rtx test; emit_insn (gen_absxf2 (tmp, op1)); - emit_insn (gen_cmpxf (tmp, + test = gen_rtx_GE (VOIDmode, tmp, CONST_DOUBLE_FROM_REAL_VALUE ( REAL_VALUE_ATOF ("0.29289321881345247561810596348408353", XFmode), - XFmode))); - emit_jump_insn (gen_bge (label1)); + XFmode)); + emit_jump_insn (gen_cbranchxf4 (test, XEXP (test, 0), XEXP (test, 1), label1)); emit_move_insn (tmp2, standard_80387_constant_rtx (4)); /* fldln2 */ emit_insn (gen_fyl2xp1xf3_i387 (op0, op1, tmp2)); @@ -30261,6 +30264,9 @@ ix86_enum_va_list (int idx, const char **pname, tree *ptree) #undef TARGET_EXPAND_TO_RTL_HOOK #define TARGET_EXPAND_TO_RTL_HOOK ix86_maybe_switch_abi +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P ix86_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-i386.h" diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 4aafd9c92fe..0a9e8a66732 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1823,22 +1823,6 @@ typedef struct ix86_args { #define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -do { \ - if (legitimate_address_p ((MODE), (X), 1)) \ - goto ADDR; \ -} while (0) - -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -do { \ - if (legitimate_address_p ((MODE), (X), 0)) \ - goto ADDR; \ -} while (0) - -#endif - /* If defined, a C expression to determine the base term of address X. This macro is used in only one place: `find_base_term' in alias.c. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 1bb96fd07db..198b59d2e47 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -759,77 +759,183 @@ (include "constraints.md") -;; Compare instructions. +;; Compare and branch/compare and store instructions. -;; All compare insns have expanders that save the operands away without -;; actually generating RTL. The bCOND or sCOND (emitted immediately -;; after the cmp) will actually emit the cmpM. +(define_expand "cbranchti4" + [(set (reg:CC FLAGS_REG) + (compare:CC (match_operand:TI 1 "nonimmediate_operand" "") + (match_operand:TI 2 "x86_64_general_operand" ""))) + (set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_64BIT" +{ + if (MEM_P (operands[1]) && MEM_P (operands[2])) + operands[1] = force_reg (TImode, operands[1]); + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); + DONE; +}) -(define_expand "cmpti" +(define_expand "cbranchdi4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:TI 0 "nonimmediate_operand" "") - (match_operand:TI 1 "x86_64_general_operand" "")))] + (compare:CC (match_operand:DI 1 "nonimmediate_operand" "") + (match_operand:DI 2 "x86_64_general_operand" ""))) + (set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "" +{ + if (MEM_P (operands[1]) && MEM_P (operands[2])) + operands[1] = force_reg (DImode, operands[1]); + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); + DONE; +}) + +(define_expand "cstoredi4" + [(set (reg:CC FLAGS_REG) + (compare:CC (match_operand:DI 2 "nonimmediate_operand" "") + (match_operand:DI 3 "x86_64_general_operand" ""))) + (set (match_operand:QI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]))] "TARGET_64BIT" { - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[0] = force_reg (TImode, operands[0]); - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + if (MEM_P (operands[2]) && MEM_P (operands[3])) + operands[2] = force_reg (DImode, operands[2]); + ix86_compare_op0 = operands[2]; + ix86_compare_op1 = operands[3]; + ix86_expand_setcc (GET_CODE (operands[1]), operands[0]); DONE; }) -(define_expand "cmpdi" +(define_expand "cbranchsi4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:DI 0 "nonimmediate_operand" "") - (match_operand:DI 1 "x86_64_general_operand" "")))] + (compare:CC (match_operand:SI 1 "cmpsi_operand" "") + (match_operand:SI 2 "general_operand" ""))) + (set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" { - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[0] = force_reg (DImode, operands[0]); - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + if (MEM_P (operands[1]) && MEM_P (operands[2])) + operands[1] = force_reg (SImode, operands[1]); + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); DONE; }) -(define_expand "cmpsi" +(define_expand "cstoresi4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:SI 0 "cmpsi_operand" "") - (match_operand:SI 1 "general_operand" "")))] + (compare:CC (match_operand:SI 2 "cmpsi_operand" "") + (match_operand:SI 3 "general_operand" ""))) + (set (match_operand:QI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]))] "" { - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[0] = force_reg (SImode, operands[0]); - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + if (MEM_P (operands[2]) && MEM_P (operands[3])) + operands[2] = force_reg (SImode, operands[2]); + ix86_compare_op0 = operands[2]; + ix86_compare_op1 = operands[3]; + ix86_expand_setcc (GET_CODE (operands[1]), operands[0]); DONE; }) -(define_expand "cmphi" +(define_expand "cbranchhi4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:HI 0 "nonimmediate_operand" "") - (match_operand:HI 1 "general_operand" "")))] + (compare:CC (match_operand:HI 1 "nonimmediate_operand" "") + (match_operand:HI 2 "general_operand" ""))) + (set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" { - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[0] = force_reg (HImode, operands[0]); - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + if (MEM_P (operands[1]) && MEM_P (operands[2])) + operands[1] = force_reg (HImode, operands[1]); + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); DONE; }) -(define_expand "cmpqi" +(define_expand "cstorehi4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:QI 0 "nonimmediate_operand" "") - (match_operand:QI 1 "general_operand" "")))] - "TARGET_QIMODE_MATH" + (compare:CC (match_operand:HI 2 "nonimmediate_operand" "") + (match_operand:HI 3 "general_operand" ""))) + (set (match_operand:QI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]))] + "" { - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[0] = force_reg (QImode, operands[0]); - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + if (MEM_P (operands[2]) && MEM_P (operands[3])) + operands[2] = force_reg (HImode, operands[2]); + ix86_compare_op0 = operands[2]; + ix86_compare_op1 = operands[3]; + ix86_expand_setcc (GET_CODE (operands[1]), operands[0]); + DONE; +}) + + +(define_expand "cbranchqi4" + [(set (reg:CC FLAGS_REG) + (compare:CC (match_operand:QI 1 "nonimmediate_operand" "") + (match_operand:QI 2 "general_operand" ""))) + (set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "" +{ + if (MEM_P (operands[1]) && MEM_P (operands[2])) + operands[1] = force_reg (QImode, operands[1]); + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); + DONE; +}) + + +(define_expand "cstoreqi4" + [(set (reg:CC FLAGS_REG) + (compare:CC (match_operand:QI 2 "nonimmediate_operand" "") + (match_operand:QI 3 "general_operand" ""))) + (set (match_operand:QI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]))] + "" +{ + if (MEM_P (operands[2]) && MEM_P (operands[3])) + operands[2] = force_reg (QImode, operands[2]); + ix86_compare_op0 = operands[2]; + ix86_compare_op1 = operands[3]; + ix86_expand_setcc (GET_CODE (operands[1]), operands[0]); DONE; }) + (define_insn "cmpdi_ccno_1_rex64" [(set (reg FLAGS_REG) (compare (match_operand:DI 0 "nonimmediate_operand" "r,?mr") @@ -1078,39 +1184,103 @@ ;; which would allow mix and match FP modes on the compares. Which is what ;; the old patterns did, but with many more of them. -(define_expand "cmpxf" +(define_expand "cbranchxf4" + [(set (reg:CC FLAGS_REG) + (compare:CC (match_operand:XF 1 "nonmemory_operand" "") + (match_operand:XF 2 "nonmemory_operand" ""))) + (set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_80387" +{ + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); + DONE; +}) + +(define_expand "cstorexf4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:XF 0 "nonmemory_operand" "") - (match_operand:XF 1 "nonmemory_operand" "")))] + (compare:CC (match_operand:XF 2 "nonmemory_operand" "") + (match_operand:XF 3 "nonmemory_operand" ""))) + (set (match_operand:QI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]))] "TARGET_80387" { - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + ix86_compare_op0 = operands[2]; + ix86_compare_op1 = operands[3]; + ix86_expand_setcc (GET_CODE (operands[1]), operands[0]); DONE; }) -(define_expand "cmp<mode>" +(define_expand "cbranch<mode>4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand:MODEF 0 "cmp_fp_expander_operand" "") - (match_operand:MODEF 1 "cmp_fp_expander_operand" "")))] + (compare:CC (match_operand:MODEF 1 "cmp_fp_expander_operand" "") + (match_operand:MODEF 2 "cmp_fp_expander_operand" ""))) + (set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] "TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)" { - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); DONE; }) -(define_expand "cmpcc" +(define_expand "cstore<mode>4" [(set (reg:CC FLAGS_REG) - (compare:CC (match_operand 0 "flags_reg_operand" "") - (match_operand 1 "general_operand" "")))] + (compare:CC (match_operand:MODEF 2 "cmp_fp_expander_operand" "") + (match_operand:MODEF 3 "cmp_fp_expander_operand" ""))) + (set (match_operand:QI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(reg:CC FLAGS_REG) + (const_int 0)]))] + "TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)" +{ + ix86_compare_op0 = operands[2]; + ix86_compare_op1 = operands[3]; + ix86_expand_setcc (GET_CODE (operands[1]), operands[0]); + DONE; +}) + +(define_expand "cbranchcc4" + [(set (pc) (if_then_else + (match_operator 0 "comparison_operator" + [(match_operand 1 "flags_reg_operand" "") + (match_operand 2 "const0_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "" +{ + ix86_compare_op0 = operands[1]; + ix86_compare_op1 = operands[2]; + ix86_expand_branch (GET_CODE (operands[0]), operands[3]); + DONE; +}) + +(define_expand "cstorecc4" + [(set (match_operand:QI 0 "register_operand" "") + (match_operator 1 "comparison_operator" + [(match_operand 2 "flags_reg_operand" "") + (match_operand 3 "const0_operand" "")]))] "" { - ix86_compare_op0 = operands[0]; - ix86_compare_op1 = operands[1]; + ix86_compare_op0 = operands[2]; + ix86_compare_op1 = operands[3]; + ix86_expand_setcc (GET_CODE (operands[1]), operands[0]); DONE; }) + ;; FP compares, step 1: ;; Set the FP condition codes. ;; @@ -14182,18 +14352,6 @@ ;; to avoid partial register stalls. Otherwise do things the setcc+movzx ;; way, which can later delete the movzx if only QImode is needed. -(define_expand "s<code>" - [(set (match_operand:QI 0 "register_operand" "") - (int_cond:QI (reg:CC FLAGS_REG) (const_int 0)))] - "" - "if (ix86_expand_setcc (<CODE>, operands[0])) DONE; else FAIL;") - -(define_expand "s<code>" - [(set (match_operand:QI 0 "register_operand" "") - (fp_cond:QI (reg:CC FLAGS_REG) (const_int 0)))] - "TARGET_80387 || TARGET_SSE" - "if (ix86_expand_setcc (<CODE>, operands[0])) DONE; else FAIL;") - (define_insn "*setcc_1" [(set (match_operand:QI 0 "nonimmediate_operand" "=qm") (match_operator:QI 1 "ix86_comparison_operator" @@ -14322,27 +14480,6 @@ ;; Basic conditional jump instructions. ;; We ignore the overflow flag for signed branch instructions. -;; For all bCOND expanders, also expand the compare or test insn that -;; generates reg FLAGS_REG. Generate an equality comparison if `beq' or `bne'. - -(define_expand "b<code>" - [(set (pc) - (if_then_else (int_cond:CC (reg:CC FLAGS_REG) - (const_int 0)) - (label_ref (match_operand 0 "")) - (pc)))] - "" - "ix86_expand_branch (<CODE>, operands[0]); DONE;") - -(define_expand "b<code>" - [(set (pc) - (if_then_else (fp_cond:CC (reg:CC FLAGS_REG) - (const_int 0)) - (label_ref (match_operand 0 "")) - (pc)))] - "TARGET_80387 || TARGET_SSE_MATH" - "ix86_expand_branch (<CODE>, operands[0]); DONE;") - (define_insn "*jcc_1" [(set (pc) (if_then_else (match_operator 1 "ix86_comparison_operator" @@ -22004,9 +22141,8 @@ emit_insn (gen_stack_protect_test_si (flags, operands[0], operands[1])); #endif - ix86_compare_op0 = flags; - ix86_compare_op1 = const0_rtx; - emit_jump_insn (gen_beq (operands[2])); + emit_jump_insn (gen_cbranchcc4 (gen_rtx_EQ (VOIDmode, flags, const0_rtx), + flags, const0_rtx, operands[2])); DONE; }) diff --git a/gcc/config/i386/msformat-c.c b/gcc/config/i386/msformat-c.c index 4648c8d582b..dec8f40d478 100644 --- a/gcc/config/i386/msformat-c.c +++ b/gcc/config/i386/msformat-c.c @@ -36,12 +36,12 @@ along with GCC; see the file COPYING3. If not see static format_length_info ms_printf_length_specs[] = { - { "h", FMT_LEN_h, STD_C89, NULL, 0, 0 }, - { "l", FMT_LEN_l, STD_C89, NULL, 0, 0 }, - { "I32", FMT_LEN_l, STD_EXT, NULL, 0, 0 }, - { "I64", FMT_LEN_ll, STD_EXT, NULL, 0, 0 }, - { "I", FMT_LEN_L, STD_EXT, NULL, 0, 0 }, - { NULL, 0, 0, NULL, 0, 0 } + { "h", FMT_LEN_h, STD_C89, NULL, FMT_LEN_none, STD_C89 }, + { "l", FMT_LEN_l, STD_C89, NULL, FMT_LEN_none, STD_C89 }, + { "I32", FMT_LEN_l, STD_EXT, NULL, FMT_LEN_none, STD_C89 }, + { "I64", FMT_LEN_ll, STD_EXT, NULL, FMT_LEN_none, STD_C89 }, + { "I", FMT_LEN_L, STD_EXT, NULL, FMT_LEN_none, STD_C89 }, + { NULL, FMT_LEN_none, STD_C89, NULL, FMT_LEN_none, STD_C89 } }; static const format_flag_spec ms_printf_flag_specs[] = @@ -55,7 +55,7 @@ static const format_flag_spec ms_printf_flag_specs[] = { 'w', 0, 0, N_("field width"), N_("field width in printf format"), STD_C89 }, { 'p', 0, 0, N_("precision"), N_("precision in printf format"), STD_C89 }, { 'L', 0, 0, N_("length modifier"), N_("length modifier in printf format"), STD_C89 }, - { 0, 0, 0, NULL, NULL, 0 } + { 0, 0, 0, NULL, NULL, STD_C89 } }; static const format_flag_pair ms_printf_flag_pairs[] = @@ -72,7 +72,7 @@ static const format_flag_spec ms_scanf_flag_specs[] = { 'w', 0, 0, N_("field width"), N_("field width in scanf format"), STD_C89 }, { 'L', 0, 0, N_("length modifier"), N_("length modifier in scanf format"), STD_C89 }, { '\'', 0, 0, N_("''' flag"), N_("the ''' scanf flag"), STD_EXT }, - { 0, 0, 0, NULL, NULL, 0 } + { 0, 0, 0, NULL, NULL, STD_C89 } }; static const format_flag_pair ms_scanf_flag_pairs[] = @@ -84,7 +84,7 @@ static const format_flag_pair ms_scanf_flag_pairs[] = static const format_flag_spec ms_strftime_flag_specs[] = { { '#', 0, 0, N_("'#' flag"), N_("the '#' strftime flag"), STD_EXT }, - { 0, 0, 0, NULL, NULL, 0 } + { 0, 0, 0, NULL, NULL, STD_C89 } }; static const format_flag_pair ms_strftime_flag_pairs[] = @@ -107,7 +107,7 @@ static const format_char_info ms_print_char_table[] = /* X/Open conversion specifiers. */ { "C", 0, STD_EXT, { TEX_WI, BADLEN, T89_S, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-w", "", NULL }, { "S", 1, STD_EXT, { TEX_W, BADLEN, T89_S, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "-wp", "R", NULL }, - { NULL, 0, 0, NOLENGTHS, NULL, NULL, NULL } + { NULL, 0, STD_C89, NOLENGTHS, NULL, NULL, NULL } }; static const format_char_info ms_scan_char_table[] = @@ -125,7 +125,7 @@ static const format_char_info ms_scan_char_table[] = /* X/Open conversion specifiers. */ { "C", 1, STD_EXT, { TEX_W, BADLEN, T89_S, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*w", "W", NULL }, { "S", 1, STD_EXT, { TEX_W, BADLEN, T89_S, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN, BADLEN }, "*aw", "W", NULL }, - { NULL, 0, 0, NOLENGTHS, NULL, NULL, NULL } + { NULL, 0, STD_C89, NOLENGTHS, NULL, NULL, NULL } }; static const format_char_info ms_time_char_table[] = @@ -142,7 +142,7 @@ static const format_char_info ms_time_char_table[] = { "%", 0, STD_C89, NOLENGTHS, "", "", NULL }, /* C99 conversion specifiers. */ { "z", 0, STD_C99, NOLENGTHS, "#", "", NULL }, - { NULL, 0, 0, NOLENGTHS, NULL, NULL, NULL } + { NULL, 0, STD_C89, NOLENGTHS, NULL, NULL, NULL } }; const format_kind_info mingw_format_attributes[3] = diff --git a/gcc/config/ia64/ia64-protos.h b/gcc/config/ia64/ia64-protos.h index e3b78641eb8..0859c7f53af 100644 --- a/gcc/config/ia64/ia64-protos.h +++ b/gcc/config/ia64/ia64-protos.h @@ -18,13 +18,6 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ -/* Variables defined in ia64.c. */ - -#ifdef RTX_CODE -extern GTY(()) rtx ia64_compare_op0; -extern GTY(()) rtx ia64_compare_op1; -#endif - /* Functions defined in ia64.c */ extern int bundling_p; @@ -43,7 +36,7 @@ extern void ia64_emit_cond_move (rtx, rtx, rtx); extern int ia64_depz_field_mask (rtx, rtx); extern void ia64_split_tmode_move (rtx[]); extern bool ia64_expand_movxf_movrf (enum machine_mode, rtx[]); -extern rtx ia64_expand_compare (enum rtx_code, enum machine_mode); +extern void ia64_expand_compare (rtx *, rtx *, rtx *); extern void ia64_expand_vecint_cmov (rtx[]); extern bool ia64_expand_vecint_minmax (enum rtx_code, enum machine_mode, rtx[]); extern void ia64_expand_widen_sum (rtx[], bool); diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index acf73c52969..b44f53087f3 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -63,11 +63,6 @@ along with GCC; see the file COPYING3. If not see ASM_OUTPUT_LABELREF. */ int ia64_asm_output_label = 0; -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. */ -struct rtx_def * ia64_compare_op0; -struct rtx_def * ia64_compare_op1; - /* Register names for ia64_expand_prologue. */ static const char * const ia64_reg_numbers[96] = { "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", @@ -1493,28 +1488,28 @@ ia64_expand_movxf_movrf (enum machine_mode mode, rtx operands[]) return false; } -/* Emit comparison instruction if necessary, returning the expression - that holds the compare result in the proper mode. */ +/* Emit comparison instruction if necessary, replacing *EXPR, *OP0, *OP1 + with the expression that holds the compare result (in VOIDmode). */ static GTY(()) rtx cmptf_libfunc; -rtx -ia64_expand_compare (enum rtx_code code, enum machine_mode mode) +void +ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1) { - rtx op0 = ia64_compare_op0, op1 = ia64_compare_op1; + enum rtx_code code = GET_CODE (*expr); rtx cmp; /* If we have a BImode input, then we already have a compare result, and do not need to emit another comparison. */ - if (GET_MODE (op0) == BImode) + if (GET_MODE (*op0) == BImode) { - gcc_assert ((code == NE || code == EQ) && op1 == const0_rtx); - cmp = op0; + gcc_assert ((code == NE || code == EQ) && *op1 == const0_rtx); + cmp = *op0; } /* HPUX TFmode compare requires a library call to _U_Qfcmp, which takes a magic number as its third argument, that indicates what to do. The return value is an integer to be compared against zero. */ - else if (TARGET_HPUX && GET_MODE (op0) == TFmode) + else if (TARGET_HPUX && GET_MODE (*op0) == TFmode) { enum qfcmp_magic { QCMP_INV = 1, /* Raise FP_INVALID on SNaN as a side effect. */ @@ -1527,7 +1522,7 @@ ia64_expand_compare (enum rtx_code code, enum machine_mode mode) enum rtx_code ncode; rtx ret, insns; - gcc_assert (cmptf_libfunc && GET_MODE (op1) == TFmode); + gcc_assert (cmptf_libfunc && GET_MODE (*op1) == TFmode); switch (code) { /* 1 = equal, 0 = not equal. Equality operators do @@ -1552,7 +1547,7 @@ ia64_expand_compare (enum rtx_code code, enum machine_mode mode) start_sequence (); ret = emit_library_call_value (cmptf_libfunc, 0, LCT_CONST, DImode, 3, - op0, TFmode, op1, TFmode, + *op0, TFmode, *op1, TFmode, GEN_INT (magic), DImode); cmp = gen_reg_rtx (BImode); emit_insn (gen_rtx_SET (VOIDmode, cmp, @@ -1563,18 +1558,20 @@ ia64_expand_compare (enum rtx_code code, enum machine_mode mode) end_sequence (); emit_libcall_block (insns, cmp, cmp, - gen_rtx_fmt_ee (code, BImode, op0, op1)); + gen_rtx_fmt_ee (code, BImode, *op0, *op1)); code = NE; } else { cmp = gen_reg_rtx (BImode); emit_insn (gen_rtx_SET (VOIDmode, cmp, - gen_rtx_fmt_ee (code, BImode, op0, op1))); + gen_rtx_fmt_ee (code, BImode, *op0, *op1))); code = NE; } - return gen_rtx_fmt_ee (code, mode, cmp, const0_rtx); + *expr = gen_rtx_fmt_ee (code, VOIDmode, cmp, const0_rtx); + *op0 = cmp; + *op1 = const0_rtx; } /* Generate an integral vector comparison. Return true if the condition has @@ -1946,7 +1943,7 @@ get_reg (enum ia64_frame_regs r) static bool is_emitted (int regno) { - enum ia64_frame_regs r; + unsigned int r; for (r = reg_fp; r < number_of_ia64_frame_regs; r++) if (emitted_frame_related_regs[r] == regno) @@ -3660,7 +3657,7 @@ int ia64_hard_regno_rename_ok (int from, int to) { /* Don't clobber any of the registers we reserved for the prologue. */ - enum ia64_frame_regs r; + unsigned int r; for (r = reg_fp; r <= reg_save_ar_lc; r++) if (to == current_frame_info.r[r] @@ -9320,7 +9317,7 @@ ia64_epilogue_uses (int regno) int ia64_eh_uses (int regno) { - enum ia64_frame_regs r; + unsigned int r; if (! reload_completed) return 0; diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 26e71f841b5..e5a6d81730c 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -409,6 +409,7 @@ (set_attr "speculable2" "no, no, no, no, yes,no,no, no, no, yes,no, no, no, no, no, no, no, no, no")]) (define_mode_iterator MODE [BI QI HI SI DI SF DF XF TI]) +(define_mode_iterator MODE_FOR_CMP [BI SI DI SF DF XF (TF "TARGET_HPUX")]) (define_mode_iterator MODE_FOR_EXTEND [QI HI SI]) (define_mode_attr output_a [ @@ -4759,82 +4760,76 @@ ;; :: ;; :::::::::::::::::::: -(define_expand "cmpbi" - [(set (cc0) - (compare (match_operand:BI 0 "register_operand" "") - (match_operand:BI 1 "const_int_operand" "")))] +(define_expand "cbranchbi4" + [(set (pc) + (if_then_else (match_operator 0 "ia64_cbranch_operator" + [(match_operand:BI 1 "register_operand" "") + (match_operand:BI 2 "const_int_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" -{ - ia64_compare_op0 = operands[0]; - ia64_compare_op1 = operands[1]; - DONE; -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") -(define_expand "cmpsi" - [(set (cc0) - (compare (match_operand:SI 0 "gr_register_operand" "") - (match_operand:SI 1 "gr_reg_or_8bit_and_adjusted_operand" "")))] +(define_expand "cbranchsi4" + [(set (pc) + (if_then_else (match_operator 0 "ia64_cbranch_operator" + [(match_operand:SI 1 "gr_register_operand" "") + (match_operand:SI 2 "gr_reg_or_8bit_and_adjusted_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" -{ - ia64_compare_op0 = operands[0]; - ia64_compare_op1 = operands[1]; - DONE; -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") -(define_expand "cmpdi" - [(set (cc0) - (compare (match_operand:DI 0 "gr_register_operand" "") - (match_operand:DI 1 "gr_reg_or_8bit_and_adjusted_operand" "")))] +(define_expand "cbranchdi4" + [(set (pc) + (if_then_else (match_operator 0 "ia64_cbranch_operator" + [(match_operand:DI 1 "gr_register_operand" "") + (match_operand:DI 2 "gr_reg_or_8bit_and_adjusted_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" -{ - ia64_compare_op0 = operands[0]; - ia64_compare_op1 = operands[1]; - DONE; -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") -(define_expand "cmpsf" - [(set (cc0) - (compare (match_operand:SF 0 "fr_reg_or_fp01_operand" "") - (match_operand:SF 1 "fr_reg_or_fp01_operand" "")))] +(define_expand "cbranchsf4" + [(set (pc) + (if_then_else (match_operator 0 "ia64_cbranch_operator" + [(match_operand:SF 1 "fr_reg_or_fp01_operand" "") + (match_operand:SF 2 "fr_reg_or_fp01_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" -{ - ia64_compare_op0 = operands[0]; - ia64_compare_op1 = operands[1]; - DONE; -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") -(define_expand "cmpdf" - [(set (cc0) - (compare (match_operand:DF 0 "fr_reg_or_fp01_operand" "") - (match_operand:DF 1 "fr_reg_or_fp01_operand" "")))] +(define_expand "cbranchdf4" + [(set (pc) + (if_then_else (match_operator 0 "ia64_cbranch_operator" + [(match_operand:DF 1 "fr_reg_or_fp01_operand" "") + (match_operand:DF 2 "fr_reg_or_fp01_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" -{ - ia64_compare_op0 = operands[0]; - ia64_compare_op1 = operands[1]; - DONE; -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") -(define_expand "cmpxf" - [(set (cc0) - (compare (match_operand:XF 0 "xfreg_or_fp01_operand" "") - (match_operand:XF 1 "xfreg_or_fp01_operand" "")))] +(define_expand "cbranchxf4" + [(set (pc) + (if_then_else (match_operator 0 "ia64_cbranch_operator" + [(match_operand:XF 1 "xfreg_or_fp01_operand" "") + (match_operand:XF 2 "xfreg_or_fp01_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" -{ - ia64_compare_op0 = operands[0]; - ia64_compare_op1 = operands[1]; - DONE; -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") -(define_expand "cmptf" - [(set (cc0) - (compare (match_operand:TF 0 "gr_register_operand" "") - (match_operand:TF 1 "gr_register_operand" "")))] +(define_expand "cbranchtf4" + [(set (pc) + (if_then_else (match_operator 0 "ia64_cbranch_operator" + [(match_operand:TF 1 "gr_register_operand" "") + (match_operand:TF 2 "gr_register_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] "TARGET_HPUX" -{ - ia64_compare_op0 = operands[0]; - ia64_compare_op1 = operands[1]; - DONE; -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + (define_insn "*cmpsi_normal" [(set (match_operand:BI 0 "register_operand" "=c") @@ -4933,102 +4928,6 @@ ;; :: ;; :::::::::::::::::::: -(define_expand "beq" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (EQ, VOIDmode);") - -(define_expand "bne" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (NE, VOIDmode);") - -(define_expand "blt" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (LT, VOIDmode);") - -(define_expand "ble" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (LE, VOIDmode);") - -(define_expand "bgt" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (GT, VOIDmode);") - -(define_expand "bge" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (GE, VOIDmode);") - -(define_expand "bltu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (LTU, VOIDmode);") - -(define_expand "bleu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (LEU, VOIDmode);") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (GTU, VOIDmode);") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (GEU, VOIDmode);") - -(define_expand "bunordered" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (UNORDERED, VOIDmode);") - -(define_expand "bordered" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "operands[1] = ia64_expand_compare (ORDERED, VOIDmode);") - (define_insn "*br_true" [(set (pc) (if_then_else (match_operator 0 "predicate_operator" @@ -5094,65 +4993,61 @@ ;; :: ;; :::::::::::::::::::: -(define_expand "seq" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] +(define_expand "cstorebi4" + [(set (match_operand:DI 0 "gr_register_operand" "") + (match_operator:DI 1 "ia64_cbranch_operator" + [(match_operand:BI 2 "register_operand" "") + (match_operand:BI 3 "const_int_operand" "")]))] "" - "operands[1] = ia64_expand_compare (EQ, DImode);") + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") -(define_expand "sne" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] +(define_expand "cstoresi4" + [(set (match_operand:DI 0 "gr_register_operand" "") + (match_operator:DI 1 "ia64_cbranch_operator" + [(match_operand:SI 2 "gr_register_operand" "") + (match_operand:SI 3 "gr_reg_or_8bit_and_adjusted_operand" "")]))] "" - "operands[1] = ia64_expand_compare (NE, DImode);") + "ia64_expand_compare (&operands[1], &operands[2], &operands[3]);") -(define_expand "slt" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] +(define_expand "cstoredi4" + [(set (match_operand:DI 0 "gr_register_operand" "") + (match_operator:DI 1 "ia64_cbranch_operator" + [(match_operand:DI 2 "gr_register_operand" "") + (match_operand:DI 3 "gr_reg_or_8bit_and_adjusted_operand" "")]))] "" - "operands[1] = ia64_expand_compare (LT, DImode);") + "ia64_expand_compare (&operands[1], &operands[2], &operands[3]);") -(define_expand "sle" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] +(define_expand "cstoresf4" + [(set (match_operand:DI 0 "gr_register_operand" "") + (match_operator:DI 1 "ia64_cbranch_operator" + [(match_operand:SF 2 "fr_reg_or_fp01_operand" "") + (match_operand:SF 3 "fr_reg_or_fp01_operand" "")]))] "" - "operands[1] = ia64_expand_compare (LE, DImode);") + "ia64_expand_compare (&operands[1], &operands[2], &operands[3]);") -(define_expand "sgt" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] +(define_expand "cstoredf4" + [(set (match_operand:DI 0 "gr_register_operand" "") + (match_operator:DI 1 "ia64_cbranch_operator" + [(match_operand:DF 2 "fr_reg_or_fp01_operand" "") + (match_operand:DF 3 "fr_reg_or_fp01_operand" "")]))] "" - "operands[1] = ia64_expand_compare (GT, DImode);") + "ia64_expand_compare (&operands[1], &operands[2], &operands[3]);") -(define_expand "sge" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] +(define_expand "cstorexf4" + [(set (match_operand:DI 0 "gr_register_operand" "") + (match_operator:DI 1 "ia64_cbranch_operator" + [(match_operand:XF 2 "xfreg_or_fp01_operand" "") + (match_operand:XF 3 "xfreg_or_fp01_operand" "")]))] "" - "operands[1] = ia64_expand_compare (GE, DImode);") + "ia64_expand_compare (&operands[1], &operands[2], &operands[3]);") -(define_expand "sltu" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] - "" - "operands[1] = ia64_expand_compare (LTU, DImode);") - -(define_expand "sleu" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] - "" - "operands[1] = ia64_expand_compare (LEU, DImode);") - -(define_expand "sgtu" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] - "" - "operands[1] = ia64_expand_compare (GTU, DImode);") - -(define_expand "sgeu" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] - "" - "operands[1] = ia64_expand_compare (GEU, DImode);") - -(define_expand "sunordered" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] - "" - "operands[1] = ia64_expand_compare (UNORDERED, DImode);") - -(define_expand "sordered" - [(set (match_operand:DI 0 "gr_register_operand" "") (match_dup 1))] - "" - "operands[1] = ia64_expand_compare (ORDERED, DImode);") +(define_expand "cstoretf4" + [(set (match_operand:DI 0 "gr_register_operand" "") + (match_operator:DI 1 "ia64_cbranch_operator" + [(match_operand:TF 2 "gr_register_operand" "") + (match_operand:TF 3 "gr_register_operand" "")]))] + "TARGET_HPUX" + "ia64_expand_compare (&operands[1], &operands[2], &operands[3]);") ;; Don't allow memory as destination here, because cmov/cmov/st is more ;; efficient than mov/mov/cst/cst. @@ -6018,12 +5913,62 @@ "break %0" [(set_attr "itanium_class" "chk_s_i")]) -(define_expand "conditional_trap" - [(trap_if (match_operand 0 "" "") (match_operand 1 "" ""))] +(define_expand "ctrapbi4" + [(trap_if (match_operator 0 "ia64_cbranch_operator" + [(match_operand:BI 1 "register_operand" "") + (match_operand:BI 2 "const_int_operand" "")]) + (match_operand 3 "" ""))] "" -{ - operands[0] = ia64_expand_compare (GET_CODE (operands[0]), VOIDmode); -}) + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + +(define_expand "ctrapsi4" + [(trap_if (match_operator 0 "ia64_cbranch_operator" + [(match_operand:SI 1 "gr_register_operand" "") + (match_operand:SI 2 "gr_reg_or_8bit_and_adjusted_operand" "")]) + (match_operand 3 "" ""))] + "" + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + +(define_expand "ctrapdi4" + [(trap_if (match_operator 0 "ia64_cbranch_operator" + [(match_operand:DI 1 "gr_register_operand" "") + (match_operand:DI 2 "gr_reg_or_8bit_and_adjusted_operand" "")]) + (match_operand 3 "" ""))] + "" + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + +(define_expand "ctrapsf4" + [(trap_if (match_operator 0 "ia64_cbranch_operator" + [(match_operand:SF 1 "fr_reg_or_fp01_operand" "") + (match_operand:SF 2 "fr_reg_or_fp01_operand" "")]) + (match_operand 3 "" ""))] + "" + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + +(define_expand "ctrapdf4" + [(trap_if (match_operator 0 "ia64_cbranch_operator" + [(match_operand:DF 1 "fr_reg_or_fp01_operand" "") + (match_operand:DF 2 "fr_reg_or_fp01_operand" "")]) + (match_operand 3 "" ""))] + "" + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + +(define_expand "ctrapxf4" + [(trap_if (match_operator 0 "ia64_cbranch_operator" + [(match_operand:XF 1 "xfreg_or_fp01_operand" "") + (match_operand:XF 2 "xfreg_or_fp01_operand" "")]) + (match_operand 3 "" ""))] + "" + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + +(define_expand "ctraptf4" + [(trap_if (match_operator 0 "ia64_cbranch_operator" + [(match_operand:TF 1 "gr_register_operand" "") + (match_operand:TF 2 "gr_register_operand" "")]) + (match_operand 3 "" ""))] + "TARGET_HPUX" + "ia64_expand_compare (&operands[0], &operands[1], &operands[2]);") + (define_insn "*conditional_trap" [(trap_if (match_operator 0 "predicate_operator" diff --git a/gcc/config/ia64/predicates.md b/gcc/config/ia64/predicates.md index 5a957490390..1503a0520cb 100644 --- a/gcc/config/ia64/predicates.md +++ b/gcc/config/ia64/predicates.md @@ -536,6 +536,11 @@ (and (match_code "const_double,const_vector") (match_test "op == CONST0_RTX (GET_MODE (op))")))) +;; Return 1 if OP is a valid comparison operator for "cbranch" instructions. +(define_predicate "ia64_cbranch_operator" + (ior (match_operand 0 "ordered_comparison_operator") + (match_code "ordered,unordered"))) + ;; True if this is a comparison operator, which accepts a normal 8-bit ;; signed immediate operand. (define_predicate "normal_comparison_operator" diff --git a/gcc/config/iq2000/iq2000-protos.h b/gcc/config/iq2000/iq2000-protos.h index 094bcbf2f12..0e4dba77eb4 100644 --- a/gcc/config/iq2000/iq2000-protos.h +++ b/gcc/config/iq2000/iq2000-protos.h @@ -22,7 +22,6 @@ extern int iq2000_check_split (rtx, enum machine_mode); extern int iq2000_reg_mode_ok_for_base_p (rtx, enum machine_mode, int); -extern int iq2000_legitimate_address_p (enum machine_mode, rtx, int); extern const char * iq2000_fill_delay_slot (const char *, enum delay_type, rtx *, rtx); extern const char * iq2000_move_1word (rtx *, rtx, int); extern void override_options (void); @@ -41,7 +40,7 @@ extern void print_operand (FILE *, rtx, int); #ifdef RTX_CODE extern rtx gen_int_relational (enum rtx_code, rtx, rtx, rtx, int *); -extern void gen_conditional_branch (rtx *, enum rtx_code); +extern void gen_conditional_branch (rtx *, enum machine_mode); #endif #ifdef TREE_CODE diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c index 3b9e1166b27..d61ec3f7192 100644 --- a/gcc/config/iq2000/iq2000.c +++ b/gcc/config/iq2000/iq2000.c @@ -118,13 +118,6 @@ enum processor_type iq2000_tune; /* Which instruction set architecture to use. */ int iq2000_isa; -/* Cached operands, and operator to compare for use in set/branch/trap - on condition codes. */ -rtx branch_cmp[2]; - -/* What type of branch to use. */ -enum cmp_type branch_type; - /* Local variables. */ /* The next branch instruction is a branch likely, not branch normal. */ @@ -171,6 +164,7 @@ static bool iq2000_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, static int iq2000_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, tree, bool); static void iq2000_va_start (tree, rtx); +static bool iq2000_legitimate_address_p (enum machine_mode, rtx, bool); #undef TARGET_INIT_BUILTINS #define TARGET_INIT_BUILTINS iq2000_init_builtins @@ -219,6 +213,9 @@ static void iq2000_va_start (tree, rtx); #undef TARGET_EXPAND_BUILTIN_VA_START #define TARGET_EXPAND_BUILTIN_VA_START iq2000_va_start +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P iq2000_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; /* Return nonzero if we split the address into high and low parts. */ @@ -256,8 +253,8 @@ iq2000_reg_mode_ok_for_base_p (rtx reg, memory operand of the indicated MODE. STRICT is nonzero if this function is called during reload. */ -int -iq2000_legitimate_address_p (enum machine_mode mode, rtx xinsn, int strict) +bool +iq2000_legitimate_address_p (enum machine_mode mode, rtx xinsn, bool strict) { if (TARGET_DEBUG_A_MODE) { @@ -318,7 +315,7 @@ iq2000_legitimate_address_p (enum machine_mode mode, rtx xinsn, int strict) } if (TARGET_DEBUG_A_MODE) - GO_PRINTF ("Not a legitimate address\n"); + GO_PRINTF ("Not a enum machine_mode mode, legitimate address\n"); /* The address was not legitimate. */ return 0; @@ -1010,60 +1007,31 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1, The comparison operands are saved away by cmp{si,di,sf,df}. */ void -gen_conditional_branch (rtx operands[], enum rtx_code test_code) +gen_conditional_branch (rtx operands[], enum machine_mode mode) { - enum cmp_type type = branch_type; - rtx cmp0 = branch_cmp[0]; - rtx cmp1 = branch_cmp[1]; - enum machine_mode mode; + enum rtx_code test_code = GET_CODE (operands[0]); + rtx cmp0 = operands[1]; + rtx cmp1 = operands[2]; rtx reg; int invert; rtx label1, label2; - switch (type) - { - case CMP_SI: - case CMP_DI: - mode = type == CMP_SI ? SImode : DImode; - invert = 0; - reg = gen_int_relational (test_code, NULL_RTX, cmp0, cmp1, &invert); - - if (reg) - { - cmp0 = reg; - cmp1 = const0_rtx; - test_code = NE; - } - else if (GET_CODE (cmp1) == CONST_INT && INTVAL (cmp1) != 0) - /* We don't want to build a comparison against a nonzero - constant. */ - cmp1 = force_reg (mode, cmp1); - - break; - - case CMP_SF: - case CMP_DF: - reg = gen_reg_rtx (CCmode); - - /* For cmp0 != cmp1, build cmp0 == cmp1, and test for result == 0. */ - emit_insn (gen_rtx_SET (VOIDmode, reg, - gen_rtx_fmt_ee (test_code == NE ? EQ : test_code, - CCmode, cmp0, cmp1))); + invert = 0; + reg = gen_int_relational (test_code, NULL_RTX, cmp0, cmp1, &invert); - test_code = test_code == NE ? EQ : NE; - mode = CCmode; + if (reg) + { cmp0 = reg; cmp1 = const0_rtx; - invert = 0; - break; - - default: - abort_with_insn (gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1), - "bad test"); + test_code = NE; } + else if (GET_CODE (cmp1) == CONST_INT && INTVAL (cmp1) != 0) + /* We don't want to build a comparison against a nonzero + constant. */ + cmp1 = force_reg (mode, cmp1); /* Generate the branch. */ - label1 = gen_rtx_LABEL_REF (VOIDmode, operands[0]); + label1 = gen_rtx_LABEL_REF (VOIDmode, operands[3]); label2 = pc_rtx; if (invert) diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h index 30642b2a13f..c1506a4a1f1 100644 --- a/gcc/config/iq2000/iq2000.h +++ b/gcc/config/iq2000/iq2000.h @@ -528,20 +528,6 @@ typedef struct iq2000_args #define MAX_REGS_PER_ADDRESS 1 -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - { \ - if (iq2000_legitimate_address_p (MODE, X, 1)) \ - goto ADDR; \ - } -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - { \ - if (iq2000_legitimate_address_p (MODE, X, 0)) \ - goto ADDR; \ - } -#endif - #define REG_OK_FOR_INDEX_P(X) 0 #define LEGITIMATE_CONSTANT_P(X) (1) @@ -1001,13 +987,6 @@ extern enum processor_type iq2000_tune; /* Which instruction set architecture to use. */ extern int iq2000_isa; -/* Cached operands, and operator to compare for use in set/branch/trap - on condition codes. */ -extern rtx branch_cmp[2]; - -/* What type of branch to use. */ -extern enum cmp_type branch_type; - enum iq2000_builtins { IQ2000_BUILTIN_ADO16, diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md index 919f6a20231..61275f2c671 100644 --- a/gcc/config/iq2000/iq2000.md +++ b/gcc/config/iq2000/iq2000.md @@ -989,63 +989,25 @@ ;; ;; .................... ;; -;; COMPARISONS +;; CONDITIONAL BRANCHES ;; ;; .................... -;; Flow here is rather complex: -;; -;; 1) The cmp{si,di,sf,df} routine is called. It deposits the -;; arguments into the branch_cmp array, and the type into -;; branch_type. No RTL is generated. -;; -;; 2) The appropriate branch define_expand is called, which then -;; creates the appropriate RTL for the comparison and branch. -;; Different CC modes are used, based on what type of branch is -;; done, so that we can constrain things appropriately. There -;; are assumptions in the rest of GCC that break if we fold the -;; operands into the branches for integer operations, and use cc0 -;; for floating point, so we use the fp status register instead. -;; If needed, an appropriate temporary is created to hold the -;; of the integer compare. - -(define_expand "cmpsi" - [(set (cc0) - (compare:CC (match_operand:SI 0 "register_operand" "") - (match_operand:SI 1 "arith_operand" "")))] +(define_expand "cbranchsi4" + [(set (pc) + (if_then_else + (match_operator:SI 0 "ordered_comparison_operator" + [(match_operand:SI 1 "register_operand") + (match_operand:SI 2 "reg_or_const_operand")]) + (label_ref (match_operand:SI 3 "")) + (pc)))] "" " { - if (operands[0]) /* avoid unused code message */ - { - branch_cmp[0] = operands[0]; - branch_cmp[1] = operands[1]; - branch_type = CMP_SI; - DONE; - } + gen_conditional_branch (operands, SImode); + DONE; }") -(define_expand "tstsi" - [(set (cc0) - (match_operand:SI 0 "register_operand" ""))] - "" - " -{ - if (operands[0]) /* avoid unused code message */ - { - branch_cmp[0] = operands[0]; - branch_cmp[1] = const0_rtx; - branch_type = CMP_SI; - DONE; - } -}") - -;; -;; .................... -;; -;; CONDITIONAL BRANCHES -;; -;; .................... ;; Conditional branches on comparisons with zero. @@ -1135,166 +1097,6 @@ [(set_attr "type" "branch") (set_attr "mode" "none")]) -(define_expand "beq" - [(set (pc) - (if_then_else (eq:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, EQ); - DONE; - } -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, NE); - DONE; - } -}") - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, GT); - DONE; - } -}") - -(define_expand "bge" - [(set (pc) - (if_then_else (ge:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, GE); - DONE; - } -}") - -(define_expand "blt" - [(set (pc) - (if_then_else (lt:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, LT); - DONE; - } -}") - -(define_expand "ble" - [(set (pc) - (if_then_else (le:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, LE); - DONE; - } -}") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, GTU); - DONE; - } -}") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, GEU); - DONE; - } -}") - - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, LTU); - DONE; - } -}") - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (operands[0]) /* avoid unused code warning */ - { - gen_conditional_branch (operands, LEU); - DONE; - } -}") ;; Recognize bbi and bbin instructions. These use two unusual template ;; patterns, %Ax and %Px. %Ax outputs an 'i' if operand `x' is a LABEL_REF @@ -1390,25 +1192,19 @@ ;; ;; .................... -(define_expand "seq" +(define_expand "cstoresi4" [(set (match_operand:SI 0 "register_operand" "=d") - (eq:SI (match_dup 1) - (match_dup 2)))] + (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:SI 2 "register_operand") + (match_operand:SI 3 "reg_or_const_operand")]))] "" " { - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (EQ, operands[0], operands[1], operands[2], (int *)0); + gen_int_relational (GET_CODE (operands[1]), operands[0], + operands[2], operands[3], (int *)0); DONE; }") - (define_insn "seq_si_zero" [(set (match_operand:SI 0 "register_operand" "=d") (eq:SI (match_operand:SI 1 "register_operand" "d") @@ -1418,24 +1214,6 @@ [(set_attr "type" "arith") (set_attr "mode" "SI")]) -(define_expand "sne" - [(set (match_operand:SI 0 "register_operand" "=d") - (ne:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (NE, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - (define_insn "sne_si_zero" [(set (match_operand:SI 0 "register_operand" "=d") (ne:SI (match_operand:SI 1 "register_operand" "d") @@ -1445,24 +1223,6 @@ [(set_attr "type" "arith") (set_attr "mode" "SI")]) -(define_expand "sgt" - [(set (match_operand:SI 0 "register_operand" "=d") - (gt:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (GT, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - (define_insn "sgt_si" [(set (match_operand:SI 0 "register_operand" "=d,=d") (gt:SI (match_operand:SI 1 "register_operand" "d,d") @@ -1474,42 +1234,6 @@ [(set_attr "type" "arith,arith") (set_attr "mode" "SI,SI")]) -(define_expand "sge" - [(set (match_operand:SI 0 "register_operand" "=d") - (ge:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (GE, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - -(define_expand "slt" - [(set (match_operand:SI 0 "register_operand" "=d") - (lt:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (LT, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - (define_insn "slt_si" [(set (match_operand:SI 0 "register_operand" "=d,=d") (lt:SI (match_operand:SI 1 "register_operand" "d,d") @@ -1521,24 +1245,6 @@ [(set_attr "type" "arith,arith") (set_attr "mode" "SI,SI")]) -(define_expand "sle" - [(set (match_operand:SI 0 "register_operand" "=d") - (le:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (LE, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - (define_insn "sle_si_const" [(set (match_operand:SI 0 "register_operand" "=d") (le:SI (match_operand:SI 1 "register_operand" "d") @@ -1552,24 +1258,6 @@ [(set_attr "type" "arith") (set_attr "mode" "SI")]) -(define_expand "sgtu" - [(set (match_operand:SI 0 "register_operand" "=d") - (gtu:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (GTU, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - (define_insn "sgtu_si" [(set (match_operand:SI 0 "register_operand" "=d") (gtu:SI (match_operand:SI 1 "register_operand" "d") @@ -1588,42 +1276,6 @@ [(set_attr "type" "arith") (set_attr "mode" "SI")]) -(define_expand "sgeu" - [(set (match_operand:SI 0 "register_operand" "=d") - (geu:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (GEU, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - -(define_expand "sltu" - [(set (match_operand:SI 0 "register_operand" "=d") - (ltu:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (LTU, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - (define_insn "sltu_si" [(set (match_operand:SI 0 "register_operand" "=d,=d") (ltu:SI (match_operand:SI 1 "register_operand" "d,d") @@ -1635,24 +1287,6 @@ [(set_attr "type" "arith,arith") (set_attr "mode" "SI,SI")]) -(define_expand "sleu" - [(set (match_operand:SI 0 "register_operand" "=d") - (leu:SI (match_dup 1) - (match_dup 2)))] - "" - " -{ - if (branch_type != CMP_SI && (branch_type != CMP_DI)) - FAIL; - - /* Set up operands from compare. */ - operands[1] = branch_cmp[0]; - operands[2] = branch_cmp[1]; - - gen_int_relational (LEU, operands[0], operands[1], operands[2], (int *)0); - DONE; -}") - (define_insn "sleu_si_const" [(set (match_operand:SI 0 "register_operand" "=d") (leu:SI (match_operand:SI 1 "register_operand" "d") diff --git a/gcc/config/iq2000/predicates.md b/gcc/config/iq2000/predicates.md index 53471e455ad..f275090309b 100644 --- a/gcc/config/iq2000/predicates.md +++ b/gcc/config/iq2000/predicates.md @@ -41,6 +41,14 @@ return register_operand (op, mode); }) +;; Return 1 if OP is a register or a constant. gen_int_relational +;; takes care of forcing out-of-range constants into a register. + +(define_predicate "reg_or_const_operand" + (ior (match_code "const_int") + (and (match_code "reg,subreg") + (match_operand 0 "register_operand")))) + ;; Return 1 if OP is a integer which fits in 16 bits. (define_predicate "small_int" diff --git a/gcc/config/m32c/cond.md b/gcc/config/m32c/cond.md index 60d83eea6ca..c751070e716 100644 --- a/gcc/config/m32c/cond.md +++ b/gcc/config/m32c/cond.md @@ -58,12 +58,23 @@ [(set (reg:CC FLG_REGNO) (compare (match_dup 1) (match_dup 2))) - (set (pc) (if_then_else (match_dup 4) + (set (pc) (if_then_else (match_op_dup 0 [(reg:CC FLG_REGNO) (const_int 0)]) (label_ref (match_dup 3)) (pc)))] - "operands[4] = m32c_cmp_flg_0 (operands[0]);" + "" ) +(define_insn "bcc_op" + [(set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(reg:CC FLG_REGNO) (const_int 0)]) + (label_ref (match_operand 1 "")) + (pc)))] + "" + "j%c0\t%l1" + [(set_attr "flags" "n")] +) + (define_insn "stzx_16" [(set (match_operand:QI 0 "mrai_operand" "=R0w,R0w,R0w") (if_then_else:QI (eq (reg:CC FLG_REGNO) (const_int 0)) @@ -113,34 +124,6 @@ "* return m32c_output_compare(insn, operands); " [(set_attr "flags" "oszc")]) -(define_expand "cmp<mode>" - [(set (reg:CC FLG_REGNO) - (compare (match_operand:QHPSI 0 "mra_operand" "RraSd") - (match_operand:QHPSI 1 "mrai_operand" "RraSdi")))] - "" - "m32c_pend_compare (operands); DONE;") - -(define_insn "b<code>_op" - [(set (pc) - (if_then_else (any_cond (reg:CC FLG_REGNO) - (const_int 0)) - (label_ref (match_operand 0 "")) - (pc)))] - "" - "j<code>\t%l0" - [(set_attr "flags" "n")] -) - -(define_expand "b<code>" - [(set (pc) - (if_then_else (any_cond (reg:CC FLG_REGNO) - (const_int 0)) - (label_ref (match_operand 0 "")) - (pc)))] - "" - "m32c_unpend_compare ();" -) - ;; m32c_conditional_register_usage changes the setcc_gen_code array to ;; point to the _24 variants if needed. @@ -151,51 +134,54 @@ ;; These are the post-split patterns for the conditional sets. -(define_insn "s<code>_op" +(define_insn "scc_op" [(set (match_operand:QI 0 "register_operand" "=Rqi") - (any_cond:QI (reg:CC FLG_REGNO) (const_int 0)))] + (match_operator:QI 1 "ordered_comparison_operator" + [(reg:CC FLG_REGNO) (const_int 0)]))] "TARGET_A16 && reload_completed" - "* return m32c_scc_pattern(operands, <CODE>);") + "* return m32c_scc_pattern(operands, GET_CODE (operands[1]));") -(define_insn "s<code>_24_op" +(define_insn "scc_24_op" [(set (match_operand:HI 0 "mra_operand" "=RhiSd") - (any_cond:HI (reg:CC FLG_REGNO) (const_int 0)))] + (match_operator:HI 1 "ordered_comparison_operator" + [(reg:CC FLG_REGNO) (const_int 0)]))] "TARGET_A24 && reload_completed" - "sc<code>\t%0" + "sc%c1\t%0" [(set_attr "flags" "n")] ) -;; These are the pre-split patterns for the conditional sets. Yes, -;; there are a lot of permutations. +;; These are the pre-split patterns for the conditional sets. -(define_insn_and_split "s<code>_<mode>" +(define_insn_and_split "cstore<mode>4" [(set (match_operand:QI 0 "register_operand" "=Rqi") - (any_cond:QI (match_operand:QHPSI 1 "mra_operand" "RraSd") - (match_operand:QHPSI 2 "mrai_operand" "RraSdi")))] + (match_operator:QI 1 "ordered_comparison_operator" + [(match_operand:QHPSI 2 "mra_operand" "RraSd") + (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))] "TARGET_A16" "#" "reload_completed" [(set (reg:CC FLG_REGNO) - (compare (match_dup 1) - (match_dup 2))) + (compare (match_dup 2) + (match_dup 3))) (set (match_dup 0) - (any_cond:QI (reg:CC FLG_REGNO) (const_int 0)))] + (match_op_dup 1 [(reg:CC FLG_REGNO) (const_int 0)]))] "" [(set_attr "flags" "x")] ) -(define_insn_and_split "s<code>_<mode>_24" +(define_insn_and_split "cstore<mode>4_24" [(set (match_operand:HI 0 "mra_nopp_operand" "=RhiSd") - (any_cond:HI (match_operand:QHPSI 1 "mra_operand" "RraSd") - (match_operand:QHPSI 2 "mrai_operand" "RraSdi")))] + (match_operator:HI 1 "ordered_comparison_operator" + [(match_operand:QHPSI 2 "mra_operand" "RraSd") + (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))] "TARGET_A24" "#" "reload_completed" [(set (reg:CC FLG_REGNO) - (compare (match_dup 1) - (match_dup 2))) + (compare (match_dup 2) + (match_dup 3))) (set (match_dup 0) - (any_cond:HI (reg:CC FLG_REGNO) (const_int 0)))] + (match_op_dup 1 [(reg:CC FLG_REGNO) (const_int 0)]))] "" [(set_attr "flags" "x")] ) @@ -240,21 +226,7 @@ [(set_attr "flags" "x")] ) -;; And these are the expanders, which read the pending compare -;; operands to build a combined insn. - -(define_expand "s<code>" - [(set (match_operand:QI 0 "register_operand" "=Rqi") - (any_cond:QI (reg:CC FLG_REGNO) (const_int 0)))] - "TARGET_A16" - "m32c_expand_scc (<CODE>, operands); DONE;") - -(define_expand "s<code>_24" - [(set (match_operand:HI 0 "mra_nopp_operand" "=RhiSd") - (any_cond:HI (reg:CC FLG_REGNO) (const_int 0)))] - "TARGET_A24" - "m32c_expand_scc (<CODE>, operands); DONE;") - +;; And these are the expanders. (define_expand "movqicc" [(set (match_operand:QI 0 "register_operand" "") diff --git a/gcc/config/m32c/m32c-protos.h b/gcc/config/m32c/m32c-protos.h index 650c918b44a..d332475784f 100644 --- a/gcc/config/m32c/m32c-protos.h +++ b/gcc/config/m32c/m32c-protos.h @@ -45,7 +45,6 @@ void m32c_register_pragmas (void); int m32c_regno_ok_for_base_p (int); int m32c_trampoline_alignment (void); int m32c_trampoline_size (void); -void m32c_unpend_compare (void); #if defined(RTX_CODE) && defined(TREE_CODE) @@ -58,7 +57,6 @@ rtx m32c_function_value (const_tree, const_tree); int m32c_cannot_change_mode_class (MM, MM, int); int m32c_class_max_nregs (int, MM); -rtx m32c_cmp_flg_0 (rtx); rtx m32c_eh_return_stackadj_rtx (void); void m32c_emit_eh_epilogue (rtx); int m32c_expand_cmpstr (rtx *); @@ -68,7 +66,6 @@ int m32c_expand_movmemhi (rtx *); int m32c_expand_movstr (rtx *); void m32c_expand_neg_mulpsi3 (rtx *); int m32c_expand_setmemhi (rtx *); -void m32c_expand_scc (int, rtx *); int m32c_extra_constraint_p (rtx, char, const char *); int m32c_extra_constraint_p2 (rtx, char, const char *); int m32c_hard_regno_nregs (int, MM); @@ -77,7 +74,6 @@ bool m32c_illegal_subreg_p (rtx); bool m32c_immd_dbl_mov (rtx *, MM); rtx m32c_incoming_return_addr_rtx (void); void m32c_initialize_trampoline (rtx, rtx, rtx); -int m32c_legitimate_address_p (MM, rtx, int); int m32c_legitimate_constant_p (rtx); int m32c_legitimize_reload_address (rtx *, MM, int, int, int); rtx m32c_libcall_value (MM); @@ -86,7 +82,6 @@ int m32c_memory_move_cost (MM, int, int); int m32c_modes_tieable_p (MM, MM); bool m32c_mov_ok (rtx *, MM); char * m32c_output_compare (rtx, rtx *); -void m32c_pend_compare (rtx *); int m32c_preferred_output_reload_class (rtx, int); int m32c_preferred_reload_class (rtx, int); int m32c_prepare_move (rtx *, MM); diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index d0980dd63a6..989f823df92 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -68,6 +68,7 @@ static int m32c_comp_type_attributes (const_tree, const_tree); static bool m32c_fixed_condition_code_regs (unsigned int *, unsigned int *); static struct machine_function *m32c_init_machine_status (void); static void m32c_insert_attributes (tree, tree *); +static bool m32c_legitimate_address_p (enum machine_mode, rtx, bool); static bool m32c_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool); static bool m32c_promote_prototypes (const_tree); @@ -1746,34 +1747,28 @@ m32c_initialize_trampoline (rtx tramp, rtx function, rtx chainval) static void m32c_init_libfuncs (void) { + /* We do this because the M32C has an HImode operand, but the + M16C has an 8-bit operand. Since gcc looks at the match data + and not the expanded rtl, we have to reset the optab so that + the right modes are found. */ if (TARGET_A24) { - /* We do this because the M32C has an HImode operand, but the - M16C has an 8-bit operand. Since gcc looks at the match data - and not the expanded rtl, we have to reset the array so that - the right modes are found. */ - setcc_gen_code[EQ] = CODE_FOR_seq_24; - setcc_gen_code[NE] = CODE_FOR_sne_24; - setcc_gen_code[GT] = CODE_FOR_sgt_24; - setcc_gen_code[GE] = CODE_FOR_sge_24; - setcc_gen_code[LT] = CODE_FOR_slt_24; - setcc_gen_code[LE] = CODE_FOR_sle_24; - setcc_gen_code[GTU] = CODE_FOR_sgtu_24; - setcc_gen_code[GEU] = CODE_FOR_sgeu_24; - setcc_gen_code[LTU] = CODE_FOR_sltu_24; - setcc_gen_code[LEU] = CODE_FOR_sleu_24; + optab_handler (cstore_optab, QImode)->insn_code = CODE_FOR_cstoreqi4_24; + optab_handler (cstore_optab, HImode)->insn_code = CODE_FOR_cstorehi4_24; + optab_handler (cstore_optab, PSImode)->insn_code = CODE_FOR_cstorepsi4_24; } } /* Addressing Modes */ -/* Used by GO_IF_LEGITIMATE_ADDRESS. The r8c/m32c family supports a - wide range of non-orthogonal addressing modes, including the - ability to double-indirect on *some* of them. Not all insns - support all modes, either, but we rely on predicates and - constraints to deal with that. */ -int -m32c_legitimate_address_p (enum machine_mode mode, rtx x, int strict) +/* The r8c/m32c family supports a wide range of non-orthogonal + addressing modes, including the ability to double-indirect on *some* + of them. Not all insns support all modes, either, but we rely on + predicates and constraints to deal with that. */ +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P m32c_legitimate_address_p +bool +m32c_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { int mode_adjust; if (CONSTANT_P (x)) @@ -3691,57 +3686,8 @@ m32c_expand_neg_mulpsi3 (rtx * operands) emit_insn (gen_truncsipsi2 (operands[0], temp2)); } -static rtx compare_op0, compare_op1; - -void -m32c_pend_compare (rtx *operands) -{ - compare_op0 = operands[0]; - compare_op1 = operands[1]; -} - -void -m32c_unpend_compare (void) -{ - switch (GET_MODE (compare_op0)) - { - case QImode: - emit_insn (gen_cmpqi_op (compare_op0, compare_op1)); - case HImode: - emit_insn (gen_cmphi_op (compare_op0, compare_op1)); - case PSImode: - emit_insn (gen_cmppsi_op (compare_op0, compare_op1)); - default: - /* Just to silence the "missing case" warnings. */ ; - } -} - -void -m32c_expand_scc (int code, rtx *operands) -{ - enum machine_mode mode = TARGET_A16 ? QImode : HImode; - - emit_insn (gen_rtx_SET (mode, - operands[0], - gen_rtx_fmt_ee (code, - mode, - compare_op0, - compare_op1))); -} - /* Pattern Output Functions */ -/* Returns a (OP (reg:CC FLG_REGNO) (const_int 0)) from some other - match_operand rtx's OP. */ -rtx -m32c_cmp_flg_0 (rtx cmp) -{ - return gen_rtx_fmt_ee (GET_CODE (cmp), - GET_MODE (cmp), - gen_rtx_REG (CCmode, FLG_REGNO), - GEN_INT (0)); -} - int m32c_expand_movcc (rtx *operands) { @@ -3753,22 +3699,17 @@ m32c_expand_movcc (rtx *operands) if (GET_CODE (operands[2]) != CONST_INT || GET_CODE (operands[3]) != CONST_INT) return 1; - emit_insn (gen_cmpqi(XEXP (rel, 0), XEXP (rel, 1))); if (GET_CODE (rel) == NE) { rtx tmp = operands[2]; operands[2] = operands[3]; operands[3] = tmp; + rel = gen_rtx_EQ (GET_MODE (rel), XEXP (rel, 0), XEXP (rel, 1)); } - cmp = gen_rtx_fmt_ee (GET_CODE (rel), - GET_MODE (rel), - compare_op0, - compare_op1); - emit_move_insn (operands[0], gen_rtx_IF_THEN_ELSE (GET_MODE (operands[0]), - cmp, + rel, operands[2], operands[3])); return 0; diff --git a/gcc/config/m32c/m32c.h b/gcc/config/m32c/m32c.h index cb2b8bea1f0..5c3130534a4 100644 --- a/gcc/config/m32c/m32c.h +++ b/gcc/config/m32c/m32c.h @@ -578,10 +578,6 @@ typedef struct m32c_cumulative_args #define REG_OK_STRICT_V 0 #endif -#define GO_IF_LEGITIMATE_ADDRESS(MODE,X,LABEL) \ - if (m32c_legitimate_address_p (MODE, X, REG_OK_STRICT_V)) \ - goto LABEL; - #define REG_OK_FOR_BASE_P(X) m32c_reg_ok_for_base_p (X, REG_OK_STRICT_V) #define REG_OK_FOR_INDEX_P(X) 0 diff --git a/gcc/config/m32c/m32c.md b/gcc/config/m32c/m32c.md index 4bc4d05fbf1..da0f8dd23f9 100644 --- a/gcc/config/m32c/m32c.md +++ b/gcc/config/m32c/m32c.md @@ -60,10 +60,7 @@ (define_mode_iterator QHSI [QI HI (SI "TARGET_A24")]) (define_mode_attr bwl [(QI "b") (HI "w") (PSI "l") (SI "l")]) -(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu]) (define_code_iterator eqne_cond [eq ne]) -(define_code_iterator gl_cond [gt ge lt le gtu geu ltu leu]) - (define_insn "nop" diff --git a/gcc/config/m32r/m32r-protos.h b/gcc/config/m32r/m32r-protos.h index 33a9f9dd01f..04533b9b49e 100644 --- a/gcc/config/m32r/m32r-protos.h +++ b/gcc/config/m32r/m32r-protos.h @@ -38,6 +38,7 @@ extern enum m32r_function_type m32r_compute_function_type (tree); extern int easy_di_const (rtx); extern int easy_df_const (rtx); extern rtx gen_compare (enum rtx_code, rtx, rtx, int); +extern bool gen_cond_store (enum rtx_code, rtx, rtx, rtx); extern rtx gen_split_move_double (rtx *); extern int m32r_address_code (rtx); extern void m32r_initialize_trampoline (rtx, rtx, rtx); diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 656c0eae1be..0b5ff6bc6fd 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -43,10 +43,6 @@ #include "target-def.h" #include "tm-constrs.h" -/* Save the operands last given to a compare for use when we - generate a scc or bcc insn. */ -rtx m32r_compare_op0, m32r_compare_op1; - /* Array of valid operand punctuation characters. */ char m32r_punct_chars[256]; @@ -864,6 +860,151 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare) return gen_rtx_fmt_ee (branch_code, VOIDmode, cc_reg, CONST0_RTX (CCmode)); } + +bool +gen_cond_store (enum rtx_code code, rtx op0, rtx op1, rtx op2) +{ + enum machine_mode mode = GET_MODE (op0); + + gcc_assert (mode == SImode); + switch (code) + { + case EQ: + if (!register_operand (op1, mode)) + op1 = force_reg (mode, op1); + + if (TARGET_M32RX || TARGET_M32R2) + { + if (!reg_or_zero_operand (op2, mode)) + op2 = force_reg (mode, op2); + + emit_insn (gen_seq_insn_m32rx (op0, op1, op2)); + return true; + } + if (GET_CODE (op2) == CONST_INT && INTVAL (op2) == 0) + { + emit_insn (gen_seq_zero_insn (op0, op1)); + return true; + } + + if (!reg_or_eq_int16_operand (op2, mode)) + op2 = force_reg (mode, op2); + + emit_insn (gen_seq_insn (op0, op1, op2)); + return true; + + case NE: + if (GET_CODE (op2) != CONST_INT + || (INTVAL (op2) != 0 && satisfies_constraint_K (op2))) + { + rtx reg; + + if (reload_completed || reload_in_progress) + return false; + + reg = gen_reg_rtx (SImode); + emit_insn (gen_xorsi3 (reg, op1, op2)); + op1 = reg; + + if (!register_operand (op1, mode)) + op1 = force_reg (mode, op1); + + emit_insn (gen_sne_zero_insn (op0, op1)); + return true; + } + return false; + + case LT: + case GT: + if (code == GT) + { + rtx tmp = op2; + op2 = op1; + op1 = tmp; + code = LT; + } + + if (!register_operand (op1, mode)) + op1 = force_reg (mode, op1); + + if (!reg_or_int16_operand (op2, mode)) + op2 = force_reg (mode, op2); + + emit_insn (gen_slt_insn (op0, op1, op2)); + return true; + + case LTU: + case GTU: + if (code == GTU) + { + rtx tmp = op2; + op2 = op1; + op1 = tmp; + code = LTU; + } + + if (!register_operand (op1, mode)) + op1 = force_reg (mode, op1); + + if (!reg_or_int16_operand (op2, mode)) + op2 = force_reg (mode, op2); + + emit_insn (gen_sltu_insn (op0, op1, op2)); + return true; + + case GE: + case GEU: + if (!register_operand (op1, mode)) + op1 = force_reg (mode, op1); + + if (!reg_or_int16_operand (op2, mode)) + op2 = force_reg (mode, op2); + + if (code == GE) + emit_insn (gen_sge_insn (op0, op1, op2)); + else + emit_insn (gen_sgeu_insn (op0, op1, op2)); + return true; + + case LE: + case LEU: + if (!register_operand (op1, mode)) + op1 = force_reg (mode, op1); + + if (GET_CODE (op2) == CONST_INT) + { + HOST_WIDE_INT value = INTVAL (op2); + if (value >= 2147483647) + { + emit_move_insn (op0, const1_rtx); + return true; + } + + op2 = GEN_INT (value + 1); + if (value < -32768 || value >= 32767) + op2 = force_reg (mode, op2); + + if (code == LEU) + emit_insn (gen_sltu_insn (op0, op1, op2)); + else + emit_insn (gen_slt_insn (op0, op1, op2)); + return true; + } + + if (!register_operand (op2, mode)) + op2 = force_reg (mode, op2); + + if (code == LEU) + emit_insn (gen_sleu_insn (op0, op1, op2)); + else + emit_insn (gen_sle_insn (op0, op1, op2)); + return true; + + default: + gcc_unreachable (); + } +} + /* Split a 2 word move (DI or DF) into component parts. */ @@ -2291,8 +2432,8 @@ m32r_expand_block_move (rtx operands[]) if (bytes > MAX_MOVE_BYTES) { - emit_insn (gen_cmpsi (src_reg, final_src)); - emit_jump_insn (gen_bne (label)); + rtx test = gen_rtx_NE (VOIDmode, src_reg, final_src); + emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label)); } } diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index 9bc0fa98a0a..41dc07abad6 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -1495,12 +1495,6 @@ extern char m32r_punct_chars[256]; /* A function address in a call instruction. */ #define FUNCTION_MODE SImode -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. Note that we can't use "rtx" here - since it hasn't been defined! */ -extern struct rtx_def * m32r_compare_op0; -extern struct rtx_def * m32r_compare_op1; - /* M32R function types. */ enum m32r_function_type { diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md index d117e1e6928..0c76a044ccc 100644 --- a/gcc/config/m32r/m32r.md +++ b/gcc/config/m32r/m32r.md @@ -1180,18 +1180,6 @@ ;; thus merge the compare and branch into one instruction, so they are ;; preferred. -(define_expand "cmpsi" - [(set (reg:CC 17) - (compare:CC (match_operand:SI 0 "register_operand" "") - (match_operand:SI 1 "reg_or_cmp_int16_operand" "")))] - "" - " -{ - m32r_compare_op0 = operands[0]; - m32r_compare_op1 = operands[1]; - DONE; -}") - (define_insn "cmp_eqsi_zero_insn" [(set (reg:CC 17) (eq:CC (match_operand:SI 0 "register_operand" "r,r") @@ -1256,114 +1244,20 @@ ;; These control RTL generation for conditional jump insns. -(define_expand "beq" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (EQ, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (NE, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "bgt" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (GT, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "ble" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (LE, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "bge" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (GE, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "blt" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (LT, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (GTU, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "bleu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (LEU, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = gen_compare (GEU, m32r_compare_op0, m32r_compare_op1, FALSE); -}") - -(define_expand "bltu" +(define_expand "cbranchsi4" + ; the comparison is emitted by gen_compare if needed. [(set (pc) - (if_then_else (match_dup 1) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "reg_or_cmp_int16_operand" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - operands[1] = gen_compare (LTU, m32r_compare_op0, m32r_compare_op1, FALSE); + operands[0] = gen_compare (GET_CODE (operands[0]), operands[1], operands[2], FALSE); + operands[1] = XEXP (operands[0], 0); + operands[2] = XEXP (operands[0], 1); }") ;; Now match both normal and inverted jump. @@ -1597,40 +1491,21 @@ ;; S<cc> operations to set a register to 1/0 based on a comparison -(define_expand "seq" - [(match_operand:SI 0 "register_operand" "")] +(define_expand "cstoresi4" + [(match_operand:SI 0 "register_operand" "") + (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:SI 2 "register_operand" "") + (match_operand:SI 3 "reg_or_cmp_int16_operand" "")])] "" " { - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) + if (GET_MODE (operands[0]) != SImode) FAIL; - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (TARGET_M32RX || TARGET_M32R2) - { - if (! reg_or_zero_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_seq_insn_m32rx (op0, op1, op2)); - DONE; - } - if (GET_CODE (op2) == CONST_INT && INTVAL (op2) == 0) - { - emit_insn (gen_seq_zero_insn (op0, op1)); - DONE; - } - - if (! reg_or_eq_int16_operand (op2, mode)) - op2 = force_reg (mode, op2); + if (!gen_cond_store (GET_CODE (operands[1]), + operands[0], operands[2], operands[3])) + FAIL; - emit_insn (gen_seq_insn (op0, op1, op2)); DONE; }") @@ -1739,41 +1614,6 @@ end_sequence (); }") -(define_expand "sne" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (GET_CODE (op2) != CONST_INT - || (INTVAL (op2) != 0 && satisfies_constraint_K (op2))) - { - rtx reg; - - if (reload_completed || reload_in_progress) - FAIL; - - reg = gen_reg_rtx (SImode); - emit_insn (gen_xorsi3 (reg, op1, op2)); - op1 = reg; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - emit_insn (gen_sne_zero_insn (op0, op1)); - DONE; - } - else - FAIL; -}") - (define_insn "sne_zero_insn" [(set (match_operand:SI 0 "register_operand" "=r") (ne:SI (match_operand:SI 1 "register_operand" "r") @@ -1801,29 +1641,6 @@ (ne:SI (reg:CC 17) (const_int 0)))] "") -(define_expand "slt" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (! reg_or_int16_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_slt_insn (op0, op1, op2)); - DONE; -}") - (define_insn "slt_insn" [(set (match_operand:SI 0 "register_operand" "=r,r") (lt:SI (match_operand:SI 1 "register_operand" "r,r") @@ -1847,46 +1664,6 @@ (ne:SI (reg:CC 17) (const_int 0)))] "") -(define_expand "sle" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (GET_CODE (op2) == CONST_INT) - { - HOST_WIDE_INT value = INTVAL (op2); - if (value >= 2147483647) - { - emit_move_insn (op0, const1_rtx); - DONE; - } - - op2 = GEN_INT (value+1); - if (value < -32768 || value >= 32767) - op2 = force_reg (mode, op2); - - emit_insn (gen_slt_insn (op0, op1, op2)); - DONE; - } - - if (! register_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_sle_insn (op0, op1, op2)); - DONE; -}") - (define_insn "sle_insn" [(set (match_operand:SI 0 "register_operand" "=r") (le:SI (match_operand:SI 1 "register_operand" "r") @@ -1933,52 +1710,6 @@ (neg:SI (match_dup 0)))] "") -(define_expand "sgt" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (! register_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_slt_insn (op0, op2, op1)); - DONE; -}") - -(define_expand "sge" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (! reg_or_int16_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_sge_insn (op0, op1, op2)); - DONE; -}") - (define_insn "sge_insn" [(set (match_operand:SI 0 "register_operand" "=r,r") (ge:SI (match_operand:SI 1 "register_operand" "r,r") @@ -2025,29 +1756,6 @@ (neg:SI (match_dup 0)))] "") -(define_expand "sltu" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (! reg_or_int16_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_sltu_insn (op0, op1, op2)); - DONE; -}") - (define_insn "sltu_insn" [(set (match_operand:SI 0 "register_operand" "=r,r") (ltu:SI (match_operand:SI 1 "register_operand" "r,r") @@ -2071,43 +1779,6 @@ (ne:SI (reg:CC 17) (const_int 0)))] "") -(define_expand "sleu" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (GET_CODE (op2) == CONST_INT) - { - HOST_WIDE_INT value = INTVAL (op2); - if (value >= 2147483647) - { - emit_move_insn (op0, const1_rtx); - DONE; - } - - op2 = GEN_INT (value+1); - if (value < 0 || value >= 32767) - op2 = force_reg (mode, op2); - - emit_insn (gen_sltu_insn (op0, op1, op2)); - DONE; - } - - if (! register_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_sleu_insn (op0, op1, op2)); - DONE; -}") - (define_insn "sleu_insn" [(set (match_operand:SI 0 "register_operand" "=r") (leu:SI (match_operand:SI 1 "register_operand" "r") @@ -2154,52 +1825,6 @@ (neg:SI (match_dup 0)))] "") -(define_expand "sgtu" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (! register_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_sltu_insn (op0, op2, op1)); - DONE; -}") - -(define_expand "sgeu" - [(match_operand:SI 0 "register_operand" "")] - "" - " -{ - rtx op0 = operands[0]; - rtx op1 = m32r_compare_op0; - rtx op2 = m32r_compare_op1; - enum machine_mode mode = GET_MODE (op0); - - if (mode != SImode) - FAIL; - - if (! register_operand (op1, mode)) - op1 = force_reg (mode, op1); - - if (! reg_or_int16_operand (op2, mode)) - op2 = force_reg (mode, op2); - - emit_insn (gen_sgeu_insn (op0, op1, op2)); - DONE; -}") - (define_insn "sgeu_insn" [(set (match_operand:SI 0 "register_operand" "=r,r") (geu:SI (match_operand:SI 1 "register_operand" "r,r") @@ -2546,8 +2171,8 @@ FAIL; /* Generate the comparison that will set the carry flag. */ - operands[1] = gen_compare (GET_CODE (operands[1]), m32r_compare_op0, - m32r_compare_op1, TRUE); + operands[1] = gen_compare (GET_CODE (operands[1]), XEXP (operands[1], 0), + XEXP (operands[1], 1), TRUE); /* See other movsicc pattern below for reason why. */ emit_insn (gen_blockage ()); diff --git a/gcc/config/m68hc11/m68hc11-protos.h b/gcc/config/m68hc11/m68hc11-protos.h index 5412e1d3eea..2f138c724ea 100644 --- a/gcc/config/m68hc11/m68hc11-protos.h +++ b/gcc/config/m68hc11/m68hc11-protos.h @@ -48,8 +48,6 @@ extern void m68hc11_initialize_trampoline (rtx, rtx, rtx); extern rtx m68hc11_expand_compare_and_branch (enum rtx_code, rtx, rtx, rtx); extern enum reg_class preferred_reload_class (rtx, enum reg_class); -extern int m68hc11_go_if_legitimate_address (rtx, enum machine_mode, int); - extern void m68hc11_notice_update_cc (rtx, rtx); extern void m68hc11_notice_keep_cc (rtx); diff --git a/gcc/config/m68hc11/m68hc11.c b/gcc/config/m68hc11/m68hc11.c index 10bc7a0e66e..ae4f7057c76 100644 --- a/gcc/config/m68hc11/m68hc11.c +++ b/gcc/config/m68hc11/m68hc11.c @@ -64,7 +64,8 @@ static void emit_move_after_reload (rtx, rtx, rtx); static rtx simplify_logical (enum machine_mode, int, rtx, rtx *); static void m68hc11_emit_logical (enum machine_mode, int, rtx *); static void m68hc11_reorg (void); -static int go_if_legitimate_address_internal (rtx, enum machine_mode, int); +static bool m68hc11_legitimate_address_p_1 (enum machine_mode, rtx, bool); +static bool m68hc11_legitimate_address_p (enum machine_mode, rtx, bool); static rtx m68hc11_expand_compare (enum rtx_code, rtx, rtx); static int must_parenthesize (rtx); static int m68hc11_address_cost (rtx, bool); @@ -141,10 +142,6 @@ int m68hc11_sp_correction; int m68hc11_addr_mode; int m68hc11_mov_addr_mode; - -/* Comparison operands saved by the "tstxx" and "cmpxx" expand patterns. */ -rtx m68hc11_compare_op0; -rtx m68hc11_compare_op1; const struct processor_costs *m68hc11_cost; @@ -264,6 +261,9 @@ static const struct processor_costs m6812_cost = { #undef TARGET_STRIP_NAME_ENCODING #define TARGET_STRIP_NAME_ENCODING m68hc11_strip_name_encoding +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P m68hc11_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; int @@ -725,9 +725,9 @@ m68hc11_register_indirect_p (rtx operand, enum machine_mode mode) return m68hc11_valid_addressing_p (operand, mode, addr_mode); } -static int -go_if_legitimate_address_internal (rtx operand, enum machine_mode mode, - int strict) +static bool +m68hc11_legitimate_address_p_1 (enum machine_mode mode, rtx operand, + bool strict) { int addr_mode; @@ -756,9 +756,9 @@ go_if_legitimate_address_internal (rtx operand, enum machine_mode mode, return 0; } -int -m68hc11_go_if_legitimate_address (rtx operand, enum machine_mode mode, - int strict) +bool +m68hc11_legitimate_address_p (enum machine_mode mode, rtx operand, + bool strict) { int result; @@ -769,7 +769,7 @@ m68hc11_go_if_legitimate_address (rtx operand, enum machine_mode mode, debug_rtx (operand); } - result = go_if_legitimate_address_internal (operand, mode, strict); + result = m68hc11_legitimate_address_p_1 (mode, operand, strict); if (debug_m6811) { @@ -3877,7 +3877,11 @@ m68hc11_notice_update_cc (rtx exp, rtx insn ATTRIBUTE_UNUSED) { cc_status.flags = 0; cc_status.value1 = XEXP (exp, 0); - cc_status.value2 = XEXP (exp, 1); + if (GET_CODE (XEXP (exp, 1)) == COMPARE + && XEXP (XEXP (exp, 1), 1) == CONST0_RTX (GET_MODE (XEXP (XEXP (exp, 1), 0)))) + cc_status.value2 = XEXP (XEXP (exp, 1), 0); + else + cc_status.value2 = XEXP (exp, 1); } else { @@ -5355,6 +5359,7 @@ m68hc11_rtx_costs_1 (rtx x, enum rtx_code code, case COMPARE: case ABS: case ZERO_EXTEND: + case ZERO_EXTRACT: total = extra_cost + rtx_cost (XEXP (x, 0), code, !optimize_size); if (mode == QImode) { @@ -5405,6 +5410,10 @@ m68hc11_rtx_costs (rtx x, int code, int outer_code, int *total, *total = 0; return true; + case ZERO_EXTRACT: + if (outer_code != COMPARE) + return false; + case ROTATE: case ROTATERT: case ASHIFT: diff --git a/gcc/config/m68hc11/m68hc11.h b/gcc/config/m68hc11/m68hc11.h index 35176592601..a394403752a 100644 --- a/gcc/config/m68hc11/m68hc11.h +++ b/gcc/config/m68hc11/m68hc11.h @@ -1169,19 +1169,6 @@ extern unsigned char m68hc11_reg_valid_for_index[FIRST_PSEUDO_REGISTER]; (((GET_CODE (X) == PRE_DEC) || (GET_CODE (X) == POST_INC)) \ && SP_REG_P (XEXP (X, 0))) -/* Go to ADDR if X is a valid address. */ -#ifndef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (m68hc11_go_if_legitimate_address ((X), (MODE), 0)) goto ADDR; \ -} -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (m68hc11_go_if_legitimate_address ((X), (MODE), 1)) goto ADDR; \ -} -#endif - /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. The usual definition accepts all pseudo regs; the other rejects @@ -1498,8 +1485,6 @@ extern int current_function_interrupt; extern int current_function_trap; extern int current_function_far; -extern GTY(()) rtx m68hc11_compare_op0; -extern GTY(()) rtx m68hc11_compare_op1; extern GTY(()) rtx m68hc11_soft_tmp_reg; extern GTY(()) rtx ix_reg; extern GTY(()) rtx iy_reg; diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index 0d40278cebb..f4ff3ebbb4c 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -162,31 +162,11 @@ ;; An offsetable memory operand should be ok. The 'tst_operand' and ;; 'cmp_operand' predicates take care of this rule. ;; -(define_expand "tstsi" - [(set (cc0) - (match_operand:SI 0 "tst_operand" ""))] - "" - " -{ - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = const0_rtx; - DONE; -}") - -(define_expand "tsthi" - [(set (cc0) - (match_operand:HI 0 "tst_operand" ""))] - "" - " -{ - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = const0_rtx; - DONE; -}") (define_insn "tsthi_1" [(set (cc0) - (match_operand:HI 0 "tst_operand" "dx,*y"))] + (compare (match_operand:HI 0 "tst_operand" "dx,*y") + (const_int 0)))] "" "* { @@ -196,34 +176,26 @@ return \"cp%0\\t#0\"; }") -(define_expand "tstqi" - [(set (cc0) - (match_operand:QI 0 "tst_operand" ""))] - "" - " -{ - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = const0_rtx; - DONE; -}") - ;; ;; Split pattern for (tst:QI) on an address register. ;; (define_split [(set (cc0) - (match_operand:QI 0 "hard_addr_reg_operand" ""))] + (compare (match_operand:QI 0 "hard_addr_reg_operand" "") + (const_int 0)))] "z_replacement_completed == 2 && GET_MODE (operands[0]) == QImode" [(parallel [(set (reg:HI D_REGNUM) (match_dup 1)) (set (match_dup 1) (reg:HI D_REGNUM))]) - (set (cc0) (reg:QI D_REGNUM)) + (set (cc0) (compare (reg:QI D_REGNUM) + (const_int 0))) (parallel [(set (reg:HI D_REGNUM) (match_dup 1)) (set (match_dup 1) (reg:HI D_REGNUM))])] "operands[1] = gen_rtx_REG (HImode, REGNO (operands[0]));") (define_insn "tstqi_1" [(set (cc0) - (match_operand:QI 0 "tst_operand" "m,d,*A,!u"))] + (compare (match_operand:QI 0 "tst_operand" "m,d,*A,!u") + (const_int 0)))] "" "* { @@ -252,8 +224,8 @@ ;; after Z register replacement. ;; (define_insn_and_split "tstqi_z_used" - [(set (cc0) - (match_operand:QI 0 "tst_operand" "m")) + [(set (cc0) (compare (match_operand:QI 0 "tst_operand" "m") + (const_int 0))) (use (match_operand:HI 1 "hard_reg_operand" "dxy")) (use (reg:HI SOFT_Z_REGNUM))] "" @@ -261,7 +233,8 @@ "z_replacement_completed == 2" [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNUM))) (match_dup 1)) (set (match_dup 1) (match_dup 2)) - (set (cc0) (match_dup 0)) + (set (cc0) (compare (match_dup 0) + (const_int 0))) (set (match_dup 1) (mem:HI (post_inc:HI (reg:HI SP_REGNUM))))] "operands[2] = gen_rtx_REG (HImode, SOFT_Z_REGNUM);") @@ -270,21 +243,6 @@ ;;- Compare ;;-------------------------------------------------------------------- -(define_expand "cmpsi" - [(set (cc0) - (compare (match_operand:SI 0 "tst_operand" "") - (match_operand:SI 1 "cmp_operand" "")))] - "" - " -{ - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[0] = force_reg (SImode, operands[0]); - - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = operands[1]; - DONE; -}") - ;; ;; Comparison of a hard register with another one is provided because ;; it helps GCC to avoid to spill a pseudo hard register. @@ -316,21 +274,6 @@ (compare (match_dup 0) (mem:HI (post_inc:HI (reg:HI SP_REGNUM)))))] "") -(define_expand "cmphi" - [(set (cc0) - (compare (match_operand:HI 0 "tst_operand" "") - (match_operand:HI 1 "cmp_operand" "")))] - "" - " -{ - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[0] = force_reg (HImode, operands[0]); - - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = operands[1]; - DONE; -}") - (define_insn "cmphi_1_hc12" [(set (cc0) (compare (match_operand:HI 0 "tst_operand" @@ -419,25 +362,11 @@ operands[3] = gen_rtx_REG (HImode, SOFT_TMP_REGNUM); operands[4] = gen_rtx_REG (HImode, REGNO (operands[1]));") -(define_expand "cmpqi" - [(set (cc0) - (compare (match_operand:QI 0 "tst_operand" "") - (match_operand:QI 1 "cmp_operand" "")))] - "" - " -{ - if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM) - operands[0] = force_reg (QImode, operands[0]); - - m68hc11_compare_op0 = operands[0]; - m68hc11_compare_op1 = operands[1]; - DONE; -}") - (define_insn "bitcmpqi" [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "d,d,d,m,!u") - (match_operand:QI 1 "cmp_operand" "im,*B,u,d,d")))] + (compare (and:QI (match_operand:QI 0 "tst_operand" "d,d,d,m,!u") + (match_operand:QI 1 "cmp_operand" "im,*B,u,d,d")) + (const_int 0)))] "" "@ bitb\\t%b1 @@ -448,8 +377,9 @@ (define_split /* "bitcmpqi" */ [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "") - (match_operand:QI 1 "hard_addr_reg_operand" "")))] + (compare (and:QI (match_operand:QI 0 "tst_operand" "") + (match_operand:QI 1 "hard_addr_reg_operand" "")) + (const_int 0)))] "z_replacement_completed == 2" [(set (match_dup 3) (match_dup 2)) (set (cc0) (and:QI (match_dup 0) (match_dup 4)))] @@ -459,8 +389,9 @@ (define_insn_and_split "bitcmpqi_z_used" [(set (cc0) - (and:QI (match_operand:QI 0 "tst_operand" "d,m") - (match_operand:QI 1 "cmp_operand" "m,d"))) + (compare (and:QI (match_operand:QI 0 "tst_operand" "d,m") + (match_operand:QI 1 "cmp_operand" "m,d")) + (const_int 0))) (use (match_operand:HI 2 "hard_reg_operand" "xy,xy")) (use (reg:HI SOFT_Z_REGNUM))] "" @@ -474,8 +405,9 @@ (define_insn "bitcmphi" [(set (cc0) - (and:HI (match_operand:HI 0 "tst_operand" "d") - (match_operand:HI 1 "const_int_operand" "i")))] + (compare (and:HI (match_operand:HI 0 "tst_operand" "d") + (match_operand:HI 1 "const_int_operand" "i")) + (const_int 0)))] "(INTVAL (operands[1]) & 0x0ff) == 0 || (INTVAL (operands[1]) & 0x0ff00) == 0" "* @@ -488,9 +420,10 @@ (define_insn "bitcmpqi_12" [(set (cc0) - (zero_extract (match_operand:HI 0 "tst_operand" "d") - (match_operand:HI 1 "const_int_operand" "i") - (match_operand:HI 2 "const_int_operand" "i")))] + (compare (zero_extract:HI (match_operand:HI 0 "tst_operand" "d") + (match_operand:HI 1 "const_int_operand" "i") + (match_operand:HI 2 "const_int_operand" "i")) + (const_int 0)))] "(unsigned) (INTVAL (operands[2]) + INTVAL (operands[1])) <= 8 || (((unsigned) (INTVAL (operands[2]) + INTVAL (operands[1])) <= 16) && (unsigned) INTVAL (operands[2]) >= 8)" @@ -6134,155 +6067,66 @@ "" "bra\\t%l0") -(define_expand "beq" - [(set (pc) - (if_then_else (eq (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (EQ, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (NE, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchsi4" + [(set (cc0) + (compare (match_operand:SI 1 "tst_operand" "") + (match_operand:SI 2 "cmp_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - m68hc11_expand_compare_and_branch (GT, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") + if (GET_CODE (operands[1]) == MEM && GET_CODE (operands[2]) == MEM) + operands[1] = force_reg (SImode, operands[1]); -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (GTU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); + m68hc11_expand_compare_and_branch (GET_CODE (operands[0]), operands[1], + operands[2], operands[3]); DONE; }") -(define_expand "blt" - [(set (pc) - (if_then_else (lt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (LT, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchhi4" + [(set (cc0) + (compare (match_operand:HI 1 "tst_operand" "") + (match_operand:HI 2 "cmp_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - m68hc11_expand_compare_and_branch (LTU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") + if (GET_CODE (operands[1]) == MEM && GET_CODE (operands[2]) == MEM) + operands[1] = force_reg (HImode, operands[1]); -(define_expand "bge" - [(set (pc) - (if_then_else (ge (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (GE, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); + m68hc11_expand_compare_and_branch (GET_CODE (operands[0]), operands[1], + operands[2], operands[3]); DONE; }") -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchqi4" + [(set (cc0) + (compare (match_operand:QI 1 "tst_operand" "") + (match_operand:QI 2 "cmp_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - m68hc11_expand_compare_and_branch (GEU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") + if (GET_CODE (operands[1]) == MEM && GET_CODE (operands[2]) == MEM) + operands[1] = force_reg (QImode, operands[1]); -(define_expand "ble" - [(set (pc) - (if_then_else (le (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (LE, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); + m68hc11_expand_compare_and_branch (GET_CODE (operands[0]), operands[1], + operands[2], operands[3]); DONE; }") -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - m68hc11_expand_compare_and_branch (LEU, m68hc11_compare_op0, - m68hc11_compare_op1, - operands[0]); - DONE; -}") ;; ;; Test and branch instructions for 68HC12 for EQ and NE. @@ -7091,11 +6935,14 @@ (plus:HI (match_dup 0) (match_operand:HI 1 "const_int_operand" ""))) (set (cc0) - (match_operand:QI 2 "memory_operand" ""))] + (compare (match_operand:QI 2 "memory_operand" "") + (const_int 0)))] "TARGET_AUTO_INC_DEC && (INTVAL (operands[1]) == -1 || INTVAL (operands[1]) == 1) && reg_mentioned_p (operands[0], operands[2])" - [(set (cc0) (match_dup 3))] + [(set (cc0) + (compare (match_dup 3) + (const_int 0)))] "if (INTVAL (operands[1]) == 1) operands[3] = gen_rtx_MEM (QImode, gen_rtx_PRE_INC (HImode, operands[0])); @@ -7326,7 +7173,8 @@ (match_operand:HI 1 "hard_reg_operand" "")) (set (match_dup 1) (plus:HI (match_dup 1) (match_operand:HI 2 "const_int_operand" ""))) - (set (cc0) (match_dup 0))] + (set (cc0) (compare (match_dup 0) + (const_int 0)))] "peep2_reg_dead_p (3, operands[0]) && !Z_REG_P (operands[1])" [(set (match_dup 1) (plus:HI (match_dup 1) (match_dup 2))) (set (cc0) (compare (match_dup 1) (match_dup 2)))] @@ -7339,7 +7187,8 @@ (plus:HI (match_dup 2) (match_operand:HI 3 "const_int_operand" ""))) (set (match_operand:HI 4 "memory_operand" "") (match_dup 2)) - (set (cc0) (match_operand:HI 5 "hard_reg_operand" ""))] + (set (cc0) (compare (match_operand:HI 5 "hard_reg_operand" "") + (const_int 0)))] "peep2_reg_dead_p (4, operands[5]) && !Z_REG_P (operands[2]) && !reg_mentioned_p (operands[2], operands[4]) diff --git a/gcc/config/m68k/constraints.md b/gcc/config/m68k/constraints.md index 592112a155b..8be423788d6 100644 --- a/gcc/config/m68k/constraints.md +++ b/gcc/config/m68k/constraints.md @@ -78,6 +78,11 @@ (and (match_code "const_double") (match_test "!(TARGET_68881 && standard_68881_constant_p (op))"))) +(define_constraint "H" + "Defines a real zero constant." + (and (match_code "const_double") + (match_test "op == CONST0_RTX (GET_MODE (op))"))) + (define_constraint "S" "Used for operands that satisfy 'm' when -mpcrel is in effect." (and (match_code "mem") diff --git a/gcc/config/m68k/m68k-devices.def b/gcc/config/m68k/m68k-devices.def index 6f8f4c2e6e3..6f87ce07613 100644 --- a/gcc/config/m68k/m68k-devices.def +++ b/gcc/config/m68k/m68k-devices.def @@ -72,8 +72,8 @@ /* 680x0 series processors. */ M68K_DEVICE ("68000", m68000, "68000", "68000", 68000, isa_00, 0) M68K_DEVICE ("68010", m68010, "68010", "68000", 68010, isa_10, 0) -M68K_DEVICE ("68020", m68020, "68020", "68020", 68020, isa_20, FL_MMU) -M68K_DEVICE ("68030", m68030, "68030", "68020", 68030, isa_20, FL_MMU) +M68K_DEVICE ("68020", m68020, "68020", "68020", 68020, isa_20, FL_MMU | FL_UCLINUX) +M68K_DEVICE ("68030", m68030, "68030", "68020", 68030, isa_20, FL_MMU | FL_UCLINUX) M68K_DEVICE ("68040", m68040, "68040", "68040", 68040, isa_40, FL_MMU) M68K_DEVICE ("68060", m68060, "68060", "68060", 68060, isa_40, FL_MMU) M68K_DEVICE ("68302", m68302, "68302", "68000", 68000, isa_00, FL_MMU) @@ -81,7 +81,13 @@ M68K_DEVICE ("68332", m68332, "68332", "cpu32", cpu32, isa_cpu32, FL_MMU) M68K_DEVICE ("cpu32", cpu32, "cpu32", "cpu32", cpu32, isa_cpu32, FL_MMU) /* ColdFire CFV1 processor. */ -M68K_DEVICE ("51qe", mcf51qe, "51qe", "51qe", cfv1, isa_c, FL_CF_USP) +/* For historical reasons, the 51 multilib is named 51qe. */ +M68K_DEVICE ("51", mcf51, "51", "51qe", cfv1, isa_c, FL_CF_USP) +M68K_DEVICE ("51ac", mcf51ac, "51", "51qe", cfv1, isa_c, FL_CF_USP) +M68K_DEVICE ("51cn", mcf51cn, "51", "51qe", cfv1, isa_c, FL_CF_USP) +M68K_DEVICE ("51em", mcf51em, "51", "51qe", cfv1, isa_c, FL_CF_USP | FL_CF_MAC) +M68K_DEVICE ("51jm", mcf51jm, "51", "51qe", cfv1, isa_c, FL_CF_USP) +M68K_DEVICE ("51qe", mcf51qe, "51", "51qe", cfv1, isa_c, FL_CF_USP) /* ColdFire CFV2 processors. */ M68K_DEVICE ("5202", mcf5202, "5206", "5206", cfv2, isa_a, 0) @@ -107,6 +113,14 @@ M68K_DEVICE ("52234", mcf52234, "52235", "5208", cfv2, isa_aplus, FL_CF_HWD M68K_DEVICE ("52235", mcf52235, "52235", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) M68K_DEVICE ("5224", mcf5224, "5225", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_MAC) M68K_DEVICE ("5225", mcf5225, "5225", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_MAC) +M68K_DEVICE ("52252", mcf52252, "52259", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("52254", mcf52254, "52259", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("52255", mcf52255, "52259", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("52256", mcf52256, "52259", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("52258", mcf52258, "52259", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("52259", mcf52259, "52259", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("52274", mcf52274, "52277", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("52277", mcf52277, "52277", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) M68K_DEVICE ("5232", mcf5232, "5235", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) M68K_DEVICE ("5233", mcf5233, "5235", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) M68K_DEVICE ("5234", mcf5234, "5235", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) @@ -126,6 +140,13 @@ M68K_DEVICE ("5282", mcf5282, "5282", "5208", cfv2, isa_aplus, FL_CF_HWD M68K_DEVICE ("528x", mcf528x, "5282", "5208", cfv2, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) /* CFV3 processors. */ +M68K_DEVICE ("53011", mcf53011, "53017", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("53012", mcf53012, "53017", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("53013", mcf53013, "53017", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("53014", mcf53014, "53017", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("53015", mcf53015, "53017", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("53016", mcf53016, "53017", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) +M68K_DEVICE ("53017", mcf53017, "53017", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) M68K_DEVICE ("5307", mcf5307, "5307", "5307", cfv3, isa_a, FL_CF_HWDIV | FL_CF_MAC) M68K_DEVICE ("5327", mcf5327, "5329", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) M68K_DEVICE ("5328", mcf5328, "5329", "5329", cfv3, isa_aplus, FL_CF_HWDIV | FL_CF_EMAC) @@ -137,12 +158,12 @@ M68K_DEVICE ("537x", mcf537x, "5373", "5329", cfv3, isa_aplus, FL_CF_HWD /* CFV4/CFV4e processors. */ M68K_DEVICE ("5407", mcf5407, "5407", "5407", cfv4, isa_b, FL_CF_MAC) -M68K_DEVICE ("54450", mcf54450, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU) -M68K_DEVICE ("54451", mcf54451, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU) -M68K_DEVICE ("54452", mcf54452, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU) -M68K_DEVICE ("54453", mcf54453, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU) -M68K_DEVICE ("54454", mcf54454, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU) -M68K_DEVICE ("54455", mcf54455, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU) +M68K_DEVICE ("54450", mcf54450, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX) +M68K_DEVICE ("54451", mcf54451, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX) +M68K_DEVICE ("54452", mcf54452, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX) +M68K_DEVICE ("54453", mcf54453, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX) +M68K_DEVICE ("54454", mcf54454, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX) +M68K_DEVICE ("54455", mcf54455, "54455", "54455", cfv4, isa_c, FL_CF_HWDIV | FL_CF_USP | FL_CF_EMAC | FL_MMU | FL_UCLINUX) M68K_DEVICE ("5470", mcf5470, "5475", "5475", cfv4e, isa_b, FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU) M68K_DEVICE ("5471", mcf5471, "5475", "5475", cfv4e, isa_b, FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU) M68K_DEVICE ("5472", mcf5472, "5475", "5475", cfv4e, isa_b, FL_CF_USP | FL_CF_EMAC | FL_CF_FPU | FL_MMU) diff --git a/gcc/config/m68k/m68k-protos.h b/gcc/config/m68k/m68k-protos.h index 43a457fe1d8..1b91709e45d 100644 --- a/gcc/config/m68k/m68k-protos.h +++ b/gcc/config/m68k/m68k-protos.h @@ -56,7 +56,6 @@ extern void notice_update_cc (rtx, rtx); extern bool m68k_legitimate_base_reg_p (rtx, bool); extern bool m68k_legitimate_index_reg_p (rtx, bool); extern bool m68k_illegitimate_symbolic_constant_p (rtx); -extern bool m68k_legitimate_address_p (enum machine_mode, rtx, bool); extern bool m68k_matches_q_p (rtx); extern bool m68k_matches_u_p (rtx); extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index d3734efd9cf..ce028a02a66 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -131,6 +131,7 @@ static void m68k_sched_dfa_pre_advance_cycle (void); static void m68k_sched_dfa_post_advance_cycle (void); static int m68k_sched_first_cycle_multipass_dfa_lookahead (void); +static bool m68k_legitimate_address_p (enum machine_mode, rtx, bool); static bool m68k_handle_option (size_t, const char *, int); static rtx find_addr_reg (rtx); static const char *singlemove_string (rtx *); @@ -152,11 +153,6 @@ static bool m68k_return_in_memory (const_tree, const_tree); /* Specify the identification number of the library being built */ const char *m68k_library_id_string = "_current_shared_library_a5_offset_"; - -/* Nonzero if the last compare/test insn had FP operands. The - sCC expanders peek at this to determine what to do for the - 68060, which has no fsCC instructions. */ -int m68k_last_compare_had_fp_operands; /* Initialize the GCC target structure. */ @@ -253,6 +249,9 @@ int m68k_last_compare_had_fp_operands; #define TARGET_RETURN_IN_MEMORY m68k_return_in_memory #endif +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P m68k_legitimate_address_p + static const struct attribute_spec m68k_attribute_table[] = { /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */ @@ -1024,10 +1023,10 @@ m68k_expand_prologue (void) emit_move_insn (gen_rtx_REG (Pmode, D0_REG), limit); limit = gen_rtx_REG (Pmode, D0_REG); } - emit_insn (gen_cmpsi (stack_pointer_rtx, limit)); - emit_insn (gen_conditional_trap (gen_rtx_LTU (VOIDmode, - cc0_rtx, const0_rtx), - const1_rtx)); + emit_insn (gen_ctrapsi4 (gen_rtx_LTU (VOIDmode, + stack_pointer_rtx, limit), + stack_pointer_rtx, limit, + const1_rtx)); } fsize_with_regs = current_frame.size; @@ -1110,12 +1109,11 @@ m68k_expand_prologue (void) if (crtl->limit_stack) { if (REG_P (stack_limit_rtx)) - { - emit_insn (gen_cmpsi (stack_pointer_rtx, stack_limit_rtx)); - emit_insn (gen_conditional_trap (gen_rtx_LTU (VOIDmode, - cc0_rtx, const0_rtx), - const1_rtx)); - } + emit_insn (gen_ctrapsi4 (gen_rtx_LTU (VOIDmode, stack_pointer_rtx, + stack_limit_rtx), + stack_pointer_rtx, stack_limit_rtx, + const1_rtx)); + else if (GET_CODE (stack_limit_rtx) != SYMBOL_REF) warning (0, "stack limit expression is not supported"); } @@ -2418,6 +2416,11 @@ m68k_rtx_costs (rtx x, int code, int outer_code, int *total, *total = COSTS_N_INSNS (43); /* div.l */ return true; + case ZERO_EXTRACT: + if (outer_code == COMPARE) + *total = 0; + return false; + default: return false; } diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 875667dc428..e91ab00fcc9 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -232,6 +232,7 @@ along with GCC; see the file COPYING3. If not see #define FL_ISA_C (1 << 16) #define FL_FIDOA (1 << 17) #define FL_MMU 0 /* Used by multilib machinery. */ +#define FL_UCLINUX 0 /* Used by multilib machinery. */ #define TARGET_68010 ((m68k_cpu_flags & FL_ISA_68010) != 0) #define TARGET_68020 ((m68k_cpu_flags & FL_ISA_68020) != 0) @@ -757,14 +758,6 @@ __transfer_from_trampoline () \ #define REG_OK_FOR_INDEX_P(X) \ m68k_legitimate_index_reg_p (X, REG_STRICT_P) -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - do \ - { \ - if (m68k_legitimate_address_p (MODE, X, REG_STRICT_P)) \ - goto ADDR; \ - } \ - while (0) - /* This address is OK as it stands. */ #define PIC_CASE_VECTOR_ADDRESS(index) index @@ -1060,7 +1053,6 @@ enum m68k_function_kind /* Variables in m68k.c; see there for details. */ extern const char *m68k_library_id_string; -extern int m68k_last_compare_had_fp_operands; extern enum target_device m68k_cpu; extern enum uarch_type m68k_tune; extern enum fpu_type m68k_fpu; diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 68442fd5746..33058fa08b8 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -300,17 +300,10 @@ ;; (set (cc0) (const_int foo)) has no mode information. Such insns will ;; be folded while optimizing anyway. -(define_expand "tstdi" - [(parallel [(set (cc0) - (match_operand:DI 0 "nonimmediate_operand" "")) - (clobber (match_scratch:SI 1 "")) - (clobber (match_scratch:DI 2 ""))])] - "" - "m68k_last_compare_had_fp_operands = 0;") - -(define_insn "" +(define_insn "tstdi" [(set (cc0) - (match_operand:DI 0 "nonimmediate_operand" "am,d")) + (compare (match_operand:DI 0 "nonimmediate_operand" "am,d") + (const_int 0))) (clobber (match_scratch:SI 1 "=X,d")) (clobber (match_scratch:DI 2 "=d,X"))] "" @@ -339,17 +332,12 @@ return "sub%.l %1,%1\;tst%.l %R0\;subx%.l %1,%0"; }) -(define_expand "tstsi" - [(set (cc0) - (match_operand:SI 0 "nonimmediate_operand" ""))] - "" - "m68k_last_compare_had_fp_operands = 0;") - ;; If you think that the 68020 does not support tstl a0, ;; reread page B-167 of the 68020 manual more carefully. (define_insn "*tstsi_internal_68020_cf" [(set (cc0) - (match_operand:SI 0 "nonimmediate_operand" "rm"))] + (compare (match_operand:SI 0 "nonimmediate_operand" "rm") + (const_int 0)))] "TARGET_68020 || TARGET_COLDFIRE" "tst%.l %0" [(set_attr "type" "tst_l")]) @@ -357,7 +345,8 @@ ;; On an address reg, cmpw may replace cmpl. (define_insn "*tstsi_internal" [(set (cc0) - (match_operand:SI 0 "nonimmediate_operand" "dm,r"))] + (compare (match_operand:SI 0 "nonimmediate_operand" "dm,r") + (const_int 0)))] "!(TARGET_68020 || TARGET_COLDFIRE)" "@ tst%.l %0 @@ -366,43 +355,26 @@ ;; This can't use an address register, because comparisons ;; with address registers as second operand always test the whole word. -(define_expand "tsthi" - [(set (cc0) - (match_operand:HI 0 "nonimmediate_operand" ""))] - "" - "m68k_last_compare_had_fp_operands = 0;") - (define_insn "*tsthi_internal" [(set (cc0) - (match_operand:HI 0 "nonimmediate_operand" "dm"))] + (compare (match_operand:HI 0 "nonimmediate_operand" "dm") + (const_int 0)))] "" "tst%.w %0" [(set_attr "type" "tst")]) -(define_expand "tstqi" - [(set (cc0) - (match_operand:QI 0 "nonimmediate_operand" ""))] - "" - "m68k_last_compare_had_fp_operands = 0;") - (define_insn "*tstqi_internal" [(set (cc0) - (match_operand:QI 0 "nonimmediate_operand" "dm"))] + (compare (match_operand:QI 0 "nonimmediate_operand" "dm") + (const_int 0)))] "" "tst%.b %0" [(set_attr "type" "tst")]) -(define_expand "tst<mode>" - [(set (cc0) - (match_operand:FP 0 "general_operand" ""))] - "TARGET_HARD_FLOAT" -{ - m68k_last_compare_had_fp_operands = 1; -}) - (define_insn "tst<mode>_68881" [(set (cc0) - (match_operand:FP 0 "general_operand" "f<FP:dreg>m"))] + (compare (match_operand:FP 0 "general_operand" "f<FP:dreg>m") + (match_operand:FP 1 "const0_operand" "H")))] "TARGET_68881" { cc_status.flags = CC_IN_68881; @@ -414,7 +386,8 @@ (define_insn "tst<mode>_cf" [(set (cc0) - (match_operand:FP 0 "general_operand" "f<FP:dreg><Q>U"))] + (compare (match_operand:FP 0 "general_operand" "f<FP:dreg><Q>U") + (match_operand:FP 1 "const0_operand" "H")))] "TARGET_COLDFIRE_FPU" { cc_status.flags = CC_IN_68881; @@ -427,20 +400,11 @@ ;; compare instructions. -(define_expand "cmpdi" - [(parallel - [(set (cc0) - (compare (match_operand:DI 0 "nonimmediate_operand" "") - (match_operand:DI 1 "general_operand" ""))) - (clobber (match_scratch:DI 2 ""))])] - "" - "m68k_last_compare_had_fp_operands = 0;") - -(define_insn "" - [(set (cc0) - (compare (match_operand:DI 1 "nonimmediate_operand" "0,d") - (match_operand:DI 2 "general_operand" "d,0"))) - (clobber (match_scratch:DI 0 "=d,d"))] +(define_insn "*cmpdi_internal" + [(set (cc0) + (compare (match_operand:DI 1 "nonimmediate_operand" "0,d") + (match_operand:DI 2 "general_operand" "d,0"))) + (clobber (match_scratch:DI 0 "=d,d"))] "" { if (rtx_equal_p (operands[0], operands[1])) @@ -452,15 +416,71 @@ } }) -(define_expand "cmpsi" - [(set (cc0) - (compare (match_operand:SI 0 "nonimmediate_operand" "") - (match_operand:SI 1 "general_operand" "")))] +(define_insn "cmpdi" + [(set (cc0) + (compare (match_operand:DI 0 "nonimmediate_operand") + (match_operand:DI 1 "general_operand"))) + (clobber (match_scratch:DI 2))] + "" + "") + + +(define_expand "cbranchdi4" + [(set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:DI 1 "nonimmediate_operand") + (match_operand:DI 2 "general_operand")]) + (label_ref (match_operand 3 "")) + (pc)))] "" { - m68k_last_compare_had_fp_operands = 0; + if (operands[2] == const0_rtx) + emit_insn (gen_tstdi (operands[1])); + else + emit_insn (gen_cmpdi (operands[1], operands[2])); + operands[1] = cc0_rtx; + operands[2] = const0_rtx; +}) + +(define_expand "cstoredi4" + [(set (match_operand:QI 0 "register_operand") + (match_operator:QI 1 "ordered_comparison_operator" + [(match_operand:DI 2 "nonimmediate_operand") + (match_operand:DI 3 "general_operand")]))] + "" +{ + if (operands[3] == const0_rtx) + emit_insn (gen_tstdi (operands[2])); + else + emit_insn (gen_cmpdi (operands[2], operands[3])); + operands[2] = cc0_rtx; + operands[3] = const0_rtx; }) + +(define_expand "cbranchsi4" + [(set (cc0) + (compare (match_operand:SI 1 "nonimmediate_operand" "") + (match_operand:SI 2 "general_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "")) + (pc)))] + "" + "") + +(define_expand "cstoresi4" + [(set (cc0) + (compare (match_operand:SI 2 "nonimmediate_operand" "") + (match_operand:SI 3 "general_operand" ""))) + (set (match_operand:QI 0 "register_operand") + (match_operator:QI 1 "ordered_comparison_operator" + [(cc0) (const_int 0)]))] + "" + "") + + ;; A composite of the cmp, cmpa, cmpi & cmpm m68000 op codes. (define_insn "" [(set (cc0) @@ -500,12 +520,27 @@ } [(set_attr "type" "cmp_l")]) -(define_expand "cmphi" +(define_expand "cbranchhi4" [(set (cc0) - (compare (match_operand:HI 0 "nonimmediate_src_operand" "") - (match_operand:HI 1 "general_src_operand" "")))] - "!TARGET_COLDFIRE" - "m68k_last_compare_had_fp_operands = 0;") + (compare (match_operand:HI 1 "nonimmediate_src_operand" "") + (match_operand:HI 2 "m68k_subword_comparison_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "")) + (pc)))] + "" + "") + +(define_expand "cstorehi4" + [(set (cc0) + (compare (match_operand:HI 2 "nonimmediate_operand" "") + (match_operand:HI 3 "m68k_subword_comparison_operand" ""))) + (set (match_operand:QI 0 "register_operand") + (match_operator:QI 1 "ordered_comparison_operator" + [(cc0) (const_int 0)]))] + "" + "") (define_insn "" [(set (cc0) @@ -524,12 +559,27 @@ return "cmp%.w %d1,%d0"; }) -(define_expand "cmpqi" +(define_expand "cbranchqi4" [(set (cc0) - (compare (match_operand:QI 0 "nonimmediate_src_operand" "") - (match_operand:QI 1 "general_src_operand" "")))] - "!TARGET_COLDFIRE" - "m68k_last_compare_had_fp_operands = 0;") + (compare (match_operand:QI 1 "nonimmediate_src_operand" "") + (match_operand:QI 2 "m68k_subword_comparison_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "")) + (pc)))] + "" + "") + +(define_expand "cstoreqi4" + [(set (cc0) + (compare (match_operand:QI 2 "nonimmediate_src_operand" "") + (match_operand:QI 3 "m68k_subword_comparison_operand" ""))) + (set (match_operand:QI 0 "register_operand") + (match_operator:QI 1 "ordered_comparison_operator" + [(cc0) (const_int 0)]))] + "" + "") (define_insn "" [(set (cc0) @@ -548,12 +598,28 @@ return "cmp%.b %d1,%d0"; }) -(define_expand "cmp<mode>" +(define_expand "cbranch<mode>4" [(set (cc0) - (compare (match_operand:FP 0 "register_operand" "") - (match_operand:FP 1 "fp_src_operand" "")))] + (compare (match_operand:FP 1 "register_operand" "") + (match_operand:FP 2 "fp_src_operand" ""))) + (set (pc) + (if_then_else (match_operator 0 "comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "")) + (pc)))] "TARGET_HARD_FLOAT" - "m68k_last_compare_had_fp_operands = 1;") + "") + +(define_expand "cstore<mode>4" + [(set (cc0) + (compare (match_operand:FP 2 "register_operand" "") + (match_operand:FP 3 "fp_src_operand" ""))) + (set (match_operand:QI 0 "register_operand") + (match_operator:QI 1 "m68k_cstore_comparison_operator" + [(cc0) (const_int 0)]))] + "TARGET_HARD_FLOAT && !(TUNE_68060 || TARGET_COLDFIRE_FPU)" + "if (TARGET_COLDFIRE && operands[2] != const0_rtx) + FAIL;") (define_insn "*cmp<mode>_68881" [(set (cc0) @@ -588,10 +654,13 @@ ;; from a MEM at a constant bit position if we can't use this as a constraint. (define_insn "" - [(set (cc0) (zero_extract (match_operand:QI 0 "memory_src_operand" "oS") - (const_int 1) - (minus:SI (const_int 7) - (match_operand:SI 1 "general_operand" "di"))))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:QI 0 "memory_src_operand" "oS") + (const_int 1) + (minus:SI (const_int 7) + (match_operand:SI 1 "general_operand" "di"))) + (const_int 0)))] "!TARGET_COLDFIRE" { return output_btst (operands, operands[1], operands[0], insn, 7); @@ -601,20 +670,26 @@ ;; has been deleted. (define_insn "" - [(set (cc0) (zero_extract (match_operand:QI 0 "memory_operand" "o") - (const_int 1) - (minus:SI (const_int 7) - (match_operand:SI 1 "general_operand" "d"))))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:QI 0 "memory_operand" "o") + (const_int 1) + (minus:SI (const_int 7) + (match_operand:SI 1 "general_operand" "d"))) + (const_int 0)))] "TARGET_COLDFIRE" { return output_btst (operands, operands[1], operands[0], insn, 7); }) (define_insn "" - [(set (cc0) (zero_extract (match_operand:SI 0 "register_operand" "d") - (const_int 1) - (minus:SI (const_int 31) - (match_operand:SI 1 "general_operand" "di"))))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "d") + (const_int 1) + (minus:SI (const_int 31) + (match_operand:SI 1 "general_operand" "di"))) + (const_int 0)))] "" { return output_btst (operands, operands[1], operands[0], insn, 31); @@ -625,24 +700,30 @@ ;; are automatically masked to 3 or 5 bits. (define_insn "" - [(set (cc0) (zero_extract (match_operand:QI 0 "memory_operand" "o") - (const_int 1) - (minus:SI (const_int 7) - (and:SI - (match_operand:SI 1 "register_operand" "d") - (const_int 7)))))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:QI 0 "memory_operand" "o") + (const_int 1) + (minus:SI (const_int 7) + (and:SI + (match_operand:SI 1 "register_operand" "d") + (const_int 7)))) + (const_int 0)))] "" { return output_btst (operands, operands[1], operands[0], insn, 7); }) (define_insn "" - [(set (cc0) (zero_extract (match_operand:SI 0 "register_operand" "d") - (const_int 1) - (minus:SI (const_int 31) - (and:SI - (match_operand:SI 1 "register_operand" "d") - (const_int 31)))))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "d") + (const_int 1) + (minus:SI (const_int 31) + (and:SI + (match_operand:SI 1 "register_operand" "d") + (const_int 31)))) + (const_int 0)))] "" { return output_btst (operands, operands[1], operands[0], insn, 31); @@ -651,9 +732,12 @@ ;; Nonoffsettable mem refs are ok in this one pattern ;; since we don't try to adjust them. (define_insn "" - [(set (cc0) (zero_extract (match_operand:QI 0 "memory_operand" "m") - (const_int 1) - (match_operand:SI 1 "const_int_operand" "n")))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:QI 0 "memory_operand" "m") + (const_int 1) + (match_operand:SI 1 "const_int_operand" "n")) + (const_int 0)))] "(unsigned) INTVAL (operands[1]) < 8 && !TARGET_COLDFIRE" { operands[1] = GEN_INT (7 - INTVAL (operands[1])); @@ -661,9 +745,12 @@ }) (define_insn "" - [(set (cc0) (zero_extract (match_operand:SI 0 "register_operand" "do") - (const_int 1) - (match_operand:SI 1 "const_int_operand" "n")))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "do") + (const_int 1) + (match_operand:SI 1 "const_int_operand" "n")) + (const_int 0)))] "!TARGET_COLDFIRE" { if (GET_CODE (operands[0]) == MEM) @@ -681,9 +768,12 @@ ;; The 'o' has been replaced with 'Q'. (define_insn "" - [(set (cc0) (zero_extract (match_operand:SI 0 "register_operand" "dQ") - (const_int 1) - (match_operand:SI 1 "const_int_operand" "n")))] + [(set + (cc0) + (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "dQ") + (const_int 1) + (match_operand:SI 1 "const_int_operand" "n")) + (const_int 0)))] "TARGET_COLDFIRE" { if (GET_CODE (operands[0]) == MEM) @@ -5751,9 +5841,10 @@ (define_insn "" [(set (cc0) - (zero_extract:SI (match_operand:QI 0 "memory_operand" "o") - (match_operand:SI 1 "const_int_operand" "n") - (match_operand:SI 2 "general_operand" "dn")))] + (compare (zero_extract:SI (match_operand:QI 0 "memory_operand" "o") + (match_operand:SI 1 "const_int_operand" "n") + (match_operand:SI 2 "general_operand" "dn")) + (const_int 0)))] "TARGET_68020 && TARGET_BITFIELD" { if (operands[1] == const1_rtx @@ -5776,9 +5867,10 @@ ;;; now handle the register cases (define_insn "" [(set (cc0) - (zero_extract:SI (match_operand:SI 0 "register_operand" "d") - (match_operand:SI 1 "const_int_operand" "n") - (match_operand:SI 2 "general_operand" "dn")))] + (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "d") + (match_operand:SI 1 "const_int_operand" "n") + (match_operand:SI 2 "general_operand" "dn")) + (const_int 0)))] "TARGET_68020 && TARGET_BITFIELD" { if (operands[1] == const1_rtx @@ -5798,7 +5890,7 @@ (define_insn "scc0_di" [(set (match_operand:QI 0 "nonimmediate_operand" "=dm") - (match_operator 1 "valid_dbcc_comparison_p" + (match_operator 1 "ordered_comparison_operator" [(match_operand:DI 2 "general_operand" "ro") (const_int 0)]))] "! TARGET_COLDFIRE" { @@ -5807,7 +5899,7 @@ (define_insn "scc0_di_5200" [(set (match_operand:QI 0 "nonimmediate_operand" "=d") - (match_operator 1 "valid_dbcc_comparison_p" + (match_operator 1 "ordered_comparison_operator" [(match_operand:DI 2 "general_operand" "ro") (const_int 0)]))] "TARGET_COLDFIRE" { @@ -5816,7 +5908,7 @@ (define_insn "scc_di" [(set (match_operand:QI 0 "nonimmediate_operand" "=dm,dm") - (match_operator 1 "valid_dbcc_comparison_p" + (match_operator 1 "ordered_comparison_operator" [(match_operand:DI 2 "general_operand" "ro,r") (match_operand:DI 3 "general_operand" "r,ro")]))] "! TARGET_COLDFIRE" @@ -5826,7 +5918,7 @@ (define_insn "scc_di_5200" [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d") - (match_operator 1 "valid_dbcc_comparison_p" + (match_operator 1 "ordered_comparison_operator" [(match_operand:DI 2 "general_operand" "ro,r") (match_operand:DI 3 "general_operand" "r,ro")]))] "TARGET_COLDFIRE" @@ -5838,19 +5930,6 @@ ;; memory, but we cannot allow it to be in memory in case the address ;; needs to be reloaded. -(define_expand "seq" - [(set (match_operand:QI 0 "register_operand" "") - (eq:QI (cc0) (const_int 0)))] - "" -{ - if ((TUNE_68060 || TARGET_COLDFIRE_FPU) - && m68k_last_compare_had_fp_operands) - { - m68k_last_compare_had_fp_operands = 0; - FAIL; - } -}) - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (eq:QI (cc0) (const_int 0)))] @@ -5860,19 +5939,6 @@ OUTPUT_JUMP ("seq %0", "fseq %0", "seq %0"); }) -(define_expand "sne" - [(set (match_operand:QI 0 "register_operand" "") - (ne:QI (cc0) (const_int 0)))] - "" -{ - if ((TUNE_68060 || TARGET_COLDFIRE_FPU) - && m68k_last_compare_had_fp_operands) - { - m68k_last_compare_had_fp_operands = 0; - FAIL; - } -}) - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (ne:QI (cc0) (const_int 0)))] @@ -5882,19 +5948,6 @@ OUTPUT_JUMP ("sne %0", "fsne %0", "sne %0"); }) -(define_expand "sgt" - [(set (match_operand:QI 0 "register_operand" "") - (gt:QI (cc0) (const_int 0)))] - "" -{ - if ((TUNE_68060 || TARGET_COLDFIRE_FPU) - && m68k_last_compare_had_fp_operands) - { - m68k_last_compare_had_fp_operands = 0; - FAIL; - } -}) - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (gt:QI (cc0) (const_int 0)))] @@ -5904,12 +5957,6 @@ OUTPUT_JUMP ("sgt %0", "fsgt %0", 0); }) -(define_expand "sgtu" - [(set (match_operand:QI 0 "register_operand" "") - (gtu:QI (cc0) (const_int 0)))] - "" - "") - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (gtu:QI (cc0) (const_int 0)))] @@ -5919,19 +5966,6 @@ return "shi %0"; }) -(define_expand "slt" - [(set (match_operand:QI 0 "register_operand" "") - (lt:QI (cc0) (const_int 0)))] - "" -{ - if ((TUNE_68060 || TARGET_COLDFIRE_FPU) - && m68k_last_compare_had_fp_operands) - { - m68k_last_compare_had_fp_operands = 0; - FAIL; - } -}) - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (lt:QI (cc0) (const_int 0)))] @@ -5941,12 +5975,6 @@ OUTPUT_JUMP ("slt %0", "fslt %0", "smi %0"); }) -(define_expand "sltu" - [(set (match_operand:QI 0 "register_operand" "") - (ltu:QI (cc0) (const_int 0)))] - "" - "") - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (ltu:QI (cc0) (const_int 0)))] @@ -5956,19 +5984,6 @@ return "scs %0"; }) -(define_expand "sge" - [(set (match_operand:QI 0 "register_operand" "") - (ge:QI (cc0) (const_int 0)))] - "" -{ - if ((TUNE_68060 || TARGET_COLDFIRE_FPU) - && m68k_last_compare_had_fp_operands) - { - m68k_last_compare_had_fp_operands = 0; - FAIL; - } -}) - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (ge:QI (cc0) (const_int 0)))] @@ -5978,12 +5993,6 @@ OUTPUT_JUMP ("sge %0", "fsge %0", "spl %0"); }) -(define_expand "sgeu" - [(set (match_operand:QI 0 "register_operand" "") - (geu:QI (cc0) (const_int 0)))] - "" - "") - (define_insn "*scc" [(set (match_operand:QI 0 "register_operand" "=d") (geu:QI (cc0) (const_int 0)))] @@ -5994,19 +6003,6 @@ } [(set_attr "type" "scc")]) -(define_expand "sle" - [(set (match_operand:QI 0 "register_operand" "") - (le:QI (cc0) (const_int 0)))] - "" -{ - if ((TUNE_68060 || TARGET_COLDFIRE_FPU) - && m68k_last_compare_had_fp_operands) - { - m68k_last_compare_had_fp_operands = 0; - FAIL; - } -}) - (define_insn "" [(set (match_operand:QI 0 "register_operand" "=d") (le:QI (cc0) (const_int 0)))] @@ -6016,12 +6012,6 @@ OUTPUT_JUMP ("sle %0", "fsle %0", 0); }) -(define_expand "sleu" - [(set (match_operand:QI 0 "register_operand" "") - (leu:QI (cc0) (const_int 0)))] - "" - "") - (define_insn "*sls" [(set (match_operand:QI 0 "register_operand" "=d") (leu:QI (cc0) (const_int 0)))] @@ -6032,15 +6022,6 @@ } [(set_attr "type" "scc")]) -(define_expand "sordered" - [(set (match_operand:QI 0 "register_operand" "") - (ordered:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*sordered_1" [(set (match_operand:QI 0 "register_operand" "=d") (ordered:QI (cc0) (const_int 0)))] @@ -6050,15 +6031,6 @@ return "fsor %0"; }) -(define_expand "sunordered" - [(set (match_operand:QI 0 "register_operand" "") - (unordered:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*sunordered_1" [(set (match_operand:QI 0 "register_operand" "=d") (unordered:QI (cc0) (const_int 0)))] @@ -6068,15 +6040,6 @@ return "fsun %0"; }) -(define_expand "suneq" - [(set (match_operand:QI 0 "register_operand" "") - (uneq:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*suneq_1" [(set (match_operand:QI 0 "register_operand" "=d") (uneq:QI (cc0) (const_int 0)))] @@ -6086,15 +6049,6 @@ return "fsueq %0"; }) -(define_expand "sunge" - [(set (match_operand:QI 0 "register_operand" "") - (unge:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*sunge_1" [(set (match_operand:QI 0 "register_operand" "=d") (unge:QI (cc0) (const_int 0)))] @@ -6104,15 +6058,6 @@ return "fsuge %0"; }) -(define_expand "sungt" - [(set (match_operand:QI 0 "register_operand" "") - (ungt:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*sungt_1" [(set (match_operand:QI 0 "register_operand" "=d") (ungt:QI (cc0) (const_int 0)))] @@ -6122,15 +6067,6 @@ return "fsugt %0"; }) -(define_expand "sunle" - [(set (match_operand:QI 0 "register_operand" "") - (unle:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*sunle_1" [(set (match_operand:QI 0 "register_operand" "=d") (unle:QI (cc0) (const_int 0)))] @@ -6140,15 +6076,6 @@ return "fsule %0"; }) -(define_expand "sunlt" - [(set (match_operand:QI 0 "register_operand" "") - (unlt:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*sunlt_1" [(set (match_operand:QI 0 "register_operand" "=d") (unlt:QI (cc0) (const_int 0)))] @@ -6158,15 +6085,6 @@ return "fsult %0"; }) -(define_expand "sltgt" - [(set (match_operand:QI 0 "register_operand" "") - (ltgt:QI (cc0) (const_int 0)))] - "TARGET_68881 && !TUNE_68060" -{ - gcc_assert (m68k_last_compare_had_fp_operands); - m68k_last_compare_had_fp_operands = 0; -}) - (define_insn "*sltgt_1" [(set (match_operand:QI 0 "register_operand" "=d") (ltgt:QI (cc0) (const_int 0)))] @@ -7758,23 +7676,54 @@ "trap #7" [(set_attr "type" "trap")]) -(define_expand "conditional_trap" - [(trap_if (match_operator 0 "valid_dbcc_comparison_p" +(define_expand "ctrapdi4" + [(trap_if (match_operator 0 "ordered_comparison_operator" [(cc0) (const_int 0)]) - (match_operand:SI 1 "const_int_operand" "I"))] + (match_operand:SI 3 "const1_operand" ""))] "TARGET_68020" { - if (m68k_last_compare_had_fp_operands) - { - m68k_last_compare_had_fp_operands = 0; - FAIL; - } + if (operands[2] == const0_rtx) + emit_insn (gen_tstdi (operands[1])); + else + emit_insn (gen_cmpdi (operands[1], operands[2])); + operands[1] = cc0_rtx; + operands[2] = const0_rtx; }) +(define_expand "ctrapsi4" + [(set (cc0) + (compare (match_operand:SI 1 "nonimmediate_operand" "") + (match_operand:SI 2 "general_operand" ""))) + (trap_if (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (match_operand:SI 3 "const1_operand" ""))] + "TARGET_68020" + "") + +(define_expand "ctraphi4" + [(set (cc0) + (compare (match_operand:HI 1 "nonimmediate_src_operand" "") + (match_operand:HI 2 "general_src_operand" ""))) + (trap_if (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (match_operand:SI 3 "const1_operand" ""))] + "TARGET_68020" + "") + +(define_expand "ctrapqi4" + [(set (cc0) + (compare (match_operand:QI 1 "nonimmediate_src_operand" "") + (match_operand:QI 2 "general_src_operand" ""))) + (trap_if (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (match_operand:SI 3 "const1_operand" ""))] + "TARGET_68020" + "") + (define_insn "*conditional_trap" - [(trap_if (match_operator 0 "valid_dbcc_comparison_p" + [(trap_if (match_operator 0 "ordered_comparison_operator" [(cc0) (const_int 0)]) - (match_operand:SI 1 "const_int_operand" "I"))] + (match_operand:SI 1 "const1_operand" "I"))] "TARGET_68020 && ! flags_in_68881 ()" { switch (GET_CODE (operands[0])) diff --git a/gcc/config/m68k/predicates.md b/gcc/config/m68k/predicates.md index b43e55b8972..417989f6d6c 100644 --- a/gcc/config/m68k/predicates.md +++ b/gcc/config/m68k/predicates.md @@ -124,6 +124,11 @@ (and (match_code "eq,ne,gtu,ltu,geu,leu,gt,lt,ge,le") (match_test "valid_dbcc_comparison_p_2 (op, mode)"))) +(define_predicate "m68k_cstore_comparison_operator" + (if_then_else (match_test "TARGET_68881") + (match_operand 0 "comparison_operator") + (match_operand 0 "ordered_comparison_operator"))) + ;; Check for sign_extend or zero_extend. Used for bit-count operands. (define_predicate "extend_operator" @@ -193,6 +198,24 @@ (and (match_code "mem") (match_test "GET_CODE (XEXP (op, 0)) == PRE_DEC"))) +;; A zero constant. +(define_predicate "const0_operand" + (and (match_code "const_int,const_double,const_vector") + (match_test "op == CONST0_RTX (mode)"))) + +;; A one constant (operand for conditional_trap). +(define_predicate "const1_operand" + (and (match_code "const_int") + (match_test "op == const1_rtx"))) + +;; A valid operand for a HImode or QImode conditional operation. +;; ColdFire has tst patterns, but not cmp patterns. +(define_predicate "m68k_subword_comparison_operand" + (if_then_else (match_test "TARGET_COLDFIRE") + (and (match_code "const_int") + (match_test "op == const0_rtx")) + (match_operand 0 "general_src_operand"))) + ;; An operand for movsi_const0 pattern. (define_predicate "movsi_const0_operand" (and (match_operand 0 "nonimmediate_operand") diff --git a/gcc/config/m68k/t-uclinux b/gcc/config/m68k/t-uclinux index 15d68aa8dd6..e1711a3443e 100644 --- a/gcc/config/m68k/t-uclinux +++ b/gcc/config/m68k/t-uclinux @@ -19,8 +19,8 @@ # crti and crtn are provided by uClibc. EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o -# Only include multilibs for the 68020 and for CPUs without an MMU. -M68K_MLIB_CPU += && (MLIB == "68020" || !match(FLAGS, "FL_MMU")) +# Include multilibs for CPUs without an MMU or with FL_UCLINUX +M68K_MLIB_CPU += && (!match(FLAGS, "FL_MMU") || match(FLAGS, "FL_UCLINUX")) # Add multilibs for execute-in-place and shared-library code. M68K_MLIB_OPTIONS += msep-data/mid-shared-library diff --git a/gcc/config/mcore/mcore-protos.h b/gcc/config/mcore/mcore-protos.h index 93c7c11e766..331cf7191d7 100644 --- a/gcc/config/mcore/mcore-protos.h +++ b/gcc/config/mcore/mcore-protos.h @@ -46,21 +46,17 @@ extern rtx mcore_function_value (const_tree, const_tree); #ifdef RTX_CODE -extern GTY(()) rtx arch_compare_op0; -extern GTY(()) rtx arch_compare_op1; - extern const char * mcore_output_bclri (rtx, int); extern const char * mcore_output_bseti (rtx, int); extern const char * mcore_output_cmov (rtx *, int, const char *); extern char * mcore_output_call (rtx *, int); extern int mcore_is_dead (rtx, rtx); extern int mcore_expand_insv (rtx *); -extern int mcore_modify_comparison (RTX_CODE); extern bool mcore_expand_block_move (rtx *); extern const char * mcore_output_andn (rtx, rtx *); extern void mcore_print_operand_address (FILE *, rtx); extern void mcore_print_operand (FILE *, rtx, int); -extern rtx mcore_gen_compare_reg (RTX_CODE); +extern bool mcore_gen_compare (RTX_CODE, rtx, rtx); extern int mcore_symbolic_address_p (rtx); extern bool mcore_r15_operand_p (rtx); extern enum reg_class mcore_secondary_reload_class (enum reg_class, enum machine_mode, rtx); diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c index 24cc9406ed7..472bb75562a 100644 --- a/gcc/config/mcore/mcore.c +++ b/gcc/config/mcore/mcore.c @@ -57,11 +57,6 @@ long mcore_current_compilation_timestamp = 0; /* Global variables for machine-dependent things. */ -/* Saved operands from the last compare to use when we generate an scc - or bcc insn. */ -rtx arch_compare_op0; -rtx arch_compare_op1; - /* Provides the class number of the smallest class containing reg number. */ const int regno_reg_class[FIRST_PSEUDO_REGISTER] = @@ -519,26 +514,36 @@ mcore_rtx_costs (rtx x, int code, int outer_code, int * total, } } -/* Check to see if a comparison against a constant can be made more efficient - by incrementing/decrementing the constant to get one that is more efficient - to load. */ +/* Prepare the operands for a comparison. Return whether the branch/setcc + should reverse the operands. */ -int -mcore_modify_comparison (enum rtx_code code) +bool +mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1) { - rtx op1 = arch_compare_op1; - + rtx cc_reg = gen_rtx_REG (CCmode, CC_REG); + bool invert; + if (GET_CODE (op1) == CONST_INT) { HOST_WIDE_INT val = INTVAL (op1); switch (code) { + case GTU: + /* Unsigned > 0 is the same as != 0; everything else is converted + below to LEU (reversed cmphs). */ + if (val == 0) + code = NE; + break; + + /* Check whether (LE A imm) can become (LT A imm + 1), + or (GT A imm) can become (GE A imm + 1). */ + case GT: case LE: if (CONST_OK_FOR_J (val + 1)) { - arch_compare_op1 = GEN_INT (val + 1); - return 1; + op1 = GEN_INT (val + 1); + code = code == LE ? LT : GE; } break; @@ -546,28 +551,18 @@ mcore_modify_comparison (enum rtx_code code) break; } } - - return 0; -} - -/* Prepare the operands for a comparison. */ - -rtx -mcore_gen_compare_reg (enum rtx_code code) -{ - rtx op0 = arch_compare_op0; - rtx op1 = arch_compare_op1; - rtx cc_reg = gen_rtx_REG (CCmode, CC_REG); - + if (CONSTANT_P (op1) && GET_CODE (op1) != CONST_INT) op1 = force_reg (SImode, op1); /* cmpnei: 0-31 (K immediate) cmplti: 1-32 (J immediate, 0 using btsti x,31). */ + invert = false; switch (code) { case EQ: /* Use inverted condition, cmpne. */ code = NE; + invert = true; /* Drop through. */ case NE: /* Use normal condition, cmpne. */ @@ -577,6 +572,7 @@ mcore_gen_compare_reg (enum rtx_code code) case LE: /* Use inverted condition, reversed cmplt. */ code = GT; + invert = true; /* Drop through. */ case GT: /* Use normal condition, reversed cmplt. */ @@ -586,6 +582,7 @@ mcore_gen_compare_reg (enum rtx_code code) case GE: /* Use inverted condition, cmplt. */ code = LT; + invert = true; /* Drop through. */ case LT: /* Use normal condition, cmplt. */ @@ -597,13 +594,10 @@ mcore_gen_compare_reg (enum rtx_code code) break; case GTU: /* Use inverted condition, cmple. */ - /* Unsigned > 0 is the same as != 0, but we need to invert the - condition, so we want to set code = EQ. This cannot be done - however, as the mcore does not support such a test. Instead - we cope with this case in the "bgtu" pattern itself so we - should never reach this point. */ + /* We coped with unsigned > 0 above. */ gcc_assert (GET_CODE (op1) != CONST_INT || INTVAL (op1) != 0); code = LEU; + invert = true; /* Drop through. */ case LEU: /* Use normal condition, reversed cmphs. */ @@ -613,6 +607,7 @@ mcore_gen_compare_reg (enum rtx_code code) case LTU: /* Use inverted condition, cmphs. */ code = GEU; + invert = true; /* Drop through. */ case GEU: /* Use normal condition, cmphs. */ @@ -624,9 +619,10 @@ mcore_gen_compare_reg (enum rtx_code code) break; } - emit_insn (gen_rtx_SET (VOIDmode, cc_reg, gen_rtx_fmt_ee (code, CCmode, op0, op1))); - - return cc_reg; + emit_insn (gen_rtx_SET (VOIDmode, + cc_reg, + gen_rtx_fmt_ee (code, CCmode, op0, op1))); + return invert; } int diff --git a/gcc/config/mcore/mcore.md b/gcc/config/mcore/mcore.md index 74906993e20..65b91588fc2 100644 --- a/gcc/config/mcore/mcore.md +++ b/gcc/config/mcore/mcore.md @@ -303,22 +303,6 @@ "" "cmphs %1,%0") -;; We save the compare operands in the cmpxx patterns and use them when -;; we generate the branch. - -;; We accept constants here, in case we can modify them to ones which -;; are more efficient to load. E.g. change 'x <= 62' to 'x < 63'. - -(define_expand "cmpsi" - [(set (reg:CC 17) (compare:CC (match_operand:SI 0 "mcore_compare_operand" "") - (match_operand:SI 1 "nonmemory_operand" "")))] - "" - " -{ arch_compare_op0 = operands[0]; - arch_compare_op1 = operands[1]; - DONE; -}") - ;; ------------------------------------------------------------------------- ;; Logical operations ;; ------------------------------------------------------------------------- @@ -1479,6 +1463,10 @@ ;; Define the real conditional branch instructions. ;; ------------------------------------------------------------------------ +;; At top-level, condition test are eq/ne, because we +;; are comparing against the condition register (which +;; has the result of the true relational test + (define_insn "branch_true" [(set (pc) (if_then_else (ne (reg:CC 17) (const_int 0)) (label_ref (match_operand 0 "" "")) @@ -1513,189 +1501,28 @@ ;; Conditional branch insns -;; At top-level, condition test are eq/ne, because we -;; are comparing against the condition register (which -;; has the result of the true relational test - -; There is no beq compare, so we reverse the branch arms. - -(define_expand "beq" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (EQ); -}") - -(define_expand "bne" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (NE); -}") - -; check whether (GT A imm) can become (LE A imm) with the branch reversed. -; if so, emit a (LT A imm + 1) in place of the (LE A imm). BRC - -(define_expand "bgt" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (mcore_modify_comparison (LE)) - { - emit_jump_insn (gen_reverse_blt (operands[0])); - DONE; - } - operands[1] = mcore_gen_compare_reg (GT); -}") - -; There is no ble compare, so we reverse the branch arms. -; reversed the condition and branch arms for ble -- the check_dbra_loop() -; transformation assumes that ble uses a branch-true with the label as -; as the target. BRC - -; check whether (LE A imm) can become (LT A imm + 1). - -(define_expand "ble" - [(set (pc) (if_then_else (eq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (mcore_modify_comparison (LE)) - { - emit_jump_insn (gen_blt (operands[0])); - DONE; - } - operands[1] = mcore_gen_compare_reg (LE); -}") - -; make generating a reversed blt simple -(define_expand "reverse_blt" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (LT); -}") - -(define_expand "blt" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (LT); -}") - -; There is no bge compare, so we reverse the branch arms. - -(define_expand "bge" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (GE); -}") - -; There is no gtu compare, so we reverse the branch arms - -;(define_expand "bgtu" -; [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) -; (pc) -; (label_ref (match_operand 0 "" ""))))] -; "" -; " -;{ -; if (GET_CODE (arch_compare_op1) == CONST_INT -; && INTVAL (arch_compare_op1) == 0) -; operands[1] = mcore_gen_compare_reg (NE); -; else -; { if (mcore_modify_comparison (GTU)) -; { -; emit_jump_insn (gen_bgeu (operands[0])); -; DONE; -; } -; operands[1] = mcore_gen_compare_reg (LEU); -; } -;}") - -(define_expand "bgtu" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - " -{ - if (GET_CODE (arch_compare_op1) == CONST_INT - && INTVAL (arch_compare_op1) == 0) - { - /* The inverse of '> 0' for an unsigned test is - '== 0' but we do not have such an instruction available. - Instead we must reverse the branch (back to the normal - ordering) and test '!= 0'. */ - - operands[1] = mcore_gen_compare_reg (NE); - - emit_jump_insn (gen_rtx_SET (VOIDmode, - pc_rtx, - gen_rtx_IF_THEN_ELSE (VOIDmode, - gen_rtx_NE (VOIDmode, - operands[1], - const0_rtx), - gen_rtx_LABEL_REF (VOIDmode,operands[0]), - pc_rtx))); - DONE; - } - operands[1] = mcore_gen_compare_reg (GTU); -}") - - -(define_expand "bleu" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] +(define_expand "cbranchsi4" + [(set (pc) + (if_then_else (match_operator:SI 0 "ordered_comparison_operator" + [(match_operand:SI 1 "mcore_compare_operand") + (match_operand:SI 2 "nonmemory_operand")]) + (label_ref (match_operand 3 "")) + (pc)))] "" " { - operands[1] = mcore_gen_compare_reg (LEU); -}") + bool invert; + invert = mcore_gen_compare (GET_CODE (operands[0]), + operands[1], operands[2]); -; There is no bltu compare, so we reverse the branch arms -(define_expand "bltu" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (LTU); + if (invert) + emit_jump_insn (gen_branch_false (operands[3])); + else + emit_jump_insn (gen_branch_true (operands[3])); + DONE; }") -(define_expand "bgeu" - [(set (pc) (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (GEU); -}") ;; ------------------------------------------------------------------------ ;; Jump and linkage insns @@ -1853,118 +1680,23 @@ (set (match_dup 0) (eq:SI (reg:CC 17) (const_int 0)))]) -(define_expand "seq" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (NE); -}") - -(define_expand "sne" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (NE); -}") - -(define_expand "slt" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (LT); -}") - -; make generating a LT with the comparison reversed easy. BRC -(define_expand "reverse_slt" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (LT); -}") - -(define_expand "sge" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (LT); -}") - -; check whether (GT A imm) can become (LE A imm) with the comparison -; reversed. if so, emit a (LT A imm + 1) in place of the (LE A imm). BRC - -(define_expand "sgt" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" - " -{ - if (mcore_modify_comparison (LE)) - { - emit_insn (gen_reverse_slt (operands[0])); - DONE; - } - - operands[1] = mcore_gen_compare_reg (GT); -}") - -(define_expand "sle" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] - "" - " -{ - if (mcore_modify_comparison (LE)) - { - emit_insn (gen_slt (operands[0])); - DONE; - } - operands[1] = mcore_gen_compare_reg (GT); -}") - -(define_expand "sltu" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (GEU); -}") - -(define_expand "sgeu" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (GEU); -}") - -(define_expand "sgtu" +(define_expand "cstoresi4" [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] + (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:SI 2 "mcore_compare_operand" "") + (match_operand:SI 3 "nonmemory_operand" "")]))] "" " { - operands[1] = mcore_gen_compare_reg (LEU); -}") + bool invert; + invert = mcore_gen_compare (GET_CODE (operands[1]), + operands[2], operands[3]); -(define_expand "sleu" - [(set (match_operand:SI 0 "mcore_arith_reg_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" - " -{ - operands[1] = mcore_gen_compare_reg (LEU); + if (invert) + emit_insn (gen_mvcv (operands[0])); + else + emit_insn (gen_mvc (operands[0])); + DONE; }") (define_insn "incscc" @@ -3308,7 +3040,7 @@ rtx loop_label = gen_label_rtx (); rtx step = gen_reg_rtx (Pmode); rtx tmp = gen_reg_rtx (Pmode); - rtx memref; + rtx test, memref; #if 1 emit_insn (gen_movsi (tmp, operands[1])); @@ -3317,8 +3049,8 @@ if (GET_CODE (operands[1]) != CONST_INT) { out_label = gen_label_rtx (); - emit_insn (gen_cmpsi (step, tmp)); /* quick out */ - emit_jump_insn (gen_bgeu (out_label)); + test = gen_rtx_GEU (VOIDmode, step, tmp); /* quick out */ + emit_jump_insn (gen_cbranchsi4 (test, step, tmp, out_label)); } /* Run a loop that steps it incrementally. */ @@ -3332,8 +3064,8 @@ emit_insn(gen_subsi3(tmp, tmp, step)); /* Loop condition -- going back up. */ - emit_insn (gen_cmpsi (step, tmp)); - emit_jump_insn (gen_bltu (loop_label)); + test = gen_rtx_LTU (VOIDmode, step, tmp); + emit_jump_insn (gen_cbranchsi4 (test, step, tmp, loop_label)); if (out_label) emit_label (out_label); diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index b95461a4c4f..bbae18a13a5 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -184,7 +184,6 @@ enum mips_call_type { extern bool mips_symbolic_constant_p (rtx, enum mips_symbol_context, enum mips_symbol_type *); extern int mips_regno_mode_ok_for_base_p (int, enum machine_mode, bool); -extern bool mips_legitimate_address_p (enum machine_mode, rtx, bool); extern bool mips_stack_address_p (rtx, enum machine_mode); extern int mips_address_insns (rtx, enum machine_mode, bool); extern int mips_const_insns (rtx); @@ -222,11 +221,11 @@ extern void mips_split_doubleword_move (rtx, rtx); extern const char *mips_output_move (rtx, rtx); extern void mips_restore_gp (rtx); #ifdef RTX_CODE -extern bool mips_expand_scc (enum rtx_code, rtx); -extern void mips_expand_conditional_branch (rtx *, enum rtx_code); +extern void mips_expand_scc (rtx *); +extern void mips_expand_conditional_branch (rtx *); extern void mips_expand_vcondv2sf (rtx, rtx, rtx, enum rtx_code, rtx, rtx); extern void mips_expand_conditional_move (rtx *); -extern void mips_expand_conditional_trap (enum rtx_code); +extern void mips_expand_conditional_trap (rtx); #endif extern bool mips_use_pic_fn_addr_reg_p (const_rtx); extern rtx mips_expand_call (enum mips_call_type, rtx, rtx, rtx, rtx, bool); diff --git a/gcc/config/mips/mips-ps-3d.md b/gcc/config/mips/mips-ps-3d.md index d4efe4cbf79..98932d85b11 100644 --- a/gcc/config/mips/mips-ps-3d.md +++ b/gcc/config/mips/mips-ps-3d.md @@ -58,7 +58,7 @@ MOVZ.PS. MOVT.PS and MOVF.PS depend on two CC values and move each item independently. */ - if (GET_MODE_CLASS (GET_MODE (cmp_operands[0])) != MODE_INT) + if (GET_MODE_CLASS (GET_MODE (XEXP (operands[1], 0))) != MODE_INT) FAIL; mips_expand_conditional_move (operands); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 32c898bcf83..36521ca8ceb 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -448,9 +448,6 @@ static int set_noat; normal branch. */ static bool mips_branch_likely; -/* The operands passed to the last cmpMM expander. */ -rtx cmp_operands[2]; - /* The current instruction-set architecture. */ enum processor_type mips_arch; const struct mips_cpu_info *mips_arch_info; @@ -2119,10 +2116,9 @@ mips_classify_address (struct mips_address_info *info, rtx x, } } -/* Return true if X is a legitimate address for a memory operand of mode - MODE. STRICT_P is true if REG_OK_STRICT is in effect. */ +/* Implement TARGET_LEGITIMATE_ADDRESS_P. */ -bool +static bool mips_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) { struct mips_address_info addr; @@ -4221,8 +4217,8 @@ mips_reversed_fp_cond (enum rtx_code *code) } /* Convert a comparison into something that can be used in a branch or - conditional move. cmp_operands[0] and cmp_operands[1] are the values - being compared and *CODE is the code used to compare them. + conditional move. On entry, *OP0 and *OP1 are the values being + compared and *CODE is the code used to compare them. Update *CODE, *OP0 and *OP1 so that they describe the final comparison. If NEED_EQ_NE_P, then only EQ or NE comparisons against zero are possible, @@ -4235,42 +4231,38 @@ mips_reversed_fp_cond (enum rtx_code *code) static void mips_emit_compare (enum rtx_code *code, rtx *op0, rtx *op1, bool need_eq_ne_p) { - if (GET_MODE_CLASS (GET_MODE (cmp_operands[0])) == MODE_INT) + rtx cmp_op0 = *op0; + rtx cmp_op1 = *op1; + + if (GET_MODE_CLASS (GET_MODE (*op0)) == MODE_INT) { - if (!need_eq_ne_p && cmp_operands[1] == const0_rtx) - { - *op0 = cmp_operands[0]; - *op1 = cmp_operands[1]; - } + if (!need_eq_ne_p && *op1 == const0_rtx) + ; else if (*code == EQ || *code == NE) { if (need_eq_ne_p) { - *op0 = mips_zero_if_equal (cmp_operands[0], cmp_operands[1]); + *op0 = mips_zero_if_equal (cmp_op0, cmp_op1); *op1 = const0_rtx; } else - { - *op0 = cmp_operands[0]; - *op1 = force_reg (GET_MODE (*op0), cmp_operands[1]); - } + *op1 = force_reg (GET_MODE (cmp_op0), cmp_op1); } else { /* The comparison needs a separate scc instruction. Store the result of the scc in *OP0 and compare it against zero. */ bool invert = false; - *op0 = gen_reg_rtx (GET_MODE (cmp_operands[0])); - mips_emit_int_order_test (*code, &invert, *op0, - cmp_operands[0], cmp_operands[1]); + *op0 = gen_reg_rtx (GET_MODE (cmp_op0)); + mips_emit_int_order_test (*code, &invert, *op0, cmp_op0, cmp_op1); *code = (invert ? EQ : NE); *op1 = const0_rtx; } } - else if (ALL_FIXED_POINT_MODE_P (GET_MODE (cmp_operands[0]))) + else if (ALL_FIXED_POINT_MODE_P (GET_MODE (cmp_op0))) { *op0 = gen_rtx_REG (CCDSPmode, CCDSP_CC_REGNUM); - mips_emit_binary (*code, *op0, cmp_operands[0], cmp_operands[1]); + mips_emit_binary (*code, *op0, cmp_op0, cmp_op1); *code = NE; *op1 = const0_rtx; } @@ -4290,49 +4282,55 @@ mips_emit_compare (enum rtx_code *code, rtx *op0, rtx *op1, bool need_eq_ne_p) ? gen_reg_rtx (CCmode) : gen_rtx_REG (CCmode, FPSW_REGNUM)); *op1 = const0_rtx; - mips_emit_binary (cmp_code, *op0, cmp_operands[0], cmp_operands[1]); + mips_emit_binary (cmp_code, *op0, cmp_op0, cmp_op1); } } -/* Try comparing cmp_operands[0] and cmp_operands[1] using rtl code CODE. - Store the result in TARGET and return true if successful. +/* Try performing the comparison in OPERANDS[1], whose arms are OPERANDS[2] + and OPERAND[3]. Store the result in OPERANDS[0]. - On 64-bit targets, TARGET may be narrower than cmp_operands[0]. */ + On 64-bit targets, the mode of the comparison and target will always be + SImode, thus possibly narrower than that of the comparison's operands. */ -bool -mips_expand_scc (enum rtx_code code, rtx target) +void +mips_expand_scc (rtx operands[]) { - if (GET_MODE_CLASS (GET_MODE (cmp_operands[0])) != MODE_INT) - return false; + rtx target = operands[0]; + enum rtx_code code = GET_CODE (operands[1]); + rtx op0 = operands[2]; + rtx op1 = operands[3]; + + gcc_assert (GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT); if (code == EQ || code == NE) { if (ISA_HAS_SEQ_SNE - && reg_imm10_operand (cmp_operands[1], GET_MODE (cmp_operands[1]))) - mips_emit_binary (code, target, cmp_operands[0], cmp_operands[1]); + && reg_imm10_operand (op1, GET_MODE (op1))) + mips_emit_binary (code, target, op0, op1); else { - rtx zie = mips_zero_if_equal (cmp_operands[0], cmp_operands[1]); + rtx zie = mips_zero_if_equal (op0, op1); mips_emit_binary (code, target, zie, const0_rtx); } } else - mips_emit_int_order_test (code, 0, target, - cmp_operands[0], cmp_operands[1]); - return true; + mips_emit_int_order_test (code, 0, target, op0, op1); } -/* Compare cmp_operands[0] with cmp_operands[1] using comparison code - CODE and jump to OPERANDS[0] if the condition holds. */ +/* Compare OPERANDS[1] with OPERANDS[2] using comparison code + CODE and jump to OPERANDS[3] if the condition holds. */ void -mips_expand_conditional_branch (rtx *operands, enum rtx_code code) +mips_expand_conditional_branch (rtx *operands) { - rtx op0, op1, condition; + enum rtx_code code = GET_CODE (operands[0]); + rtx op0 = operands[1]; + rtx op1 = operands[2]; + rtx condition; mips_emit_compare (&code, &op0, &op1, TARGET_MIPS16); condition = gen_rtx_fmt_ee (code, VOIDmode, op0, op1); - emit_jump_insn (gen_condjump (condition, operands[0])); + emit_jump_insn (gen_condjump (condition, operands[3])); } /* Implement: @@ -4359,35 +4357,36 @@ mips_expand_vcondv2sf (rtx dest, rtx true_src, rtx false_src, cmp_result)); } -/* Compare cmp_operands[0] with cmp_operands[1] using the code of - OPERANDS[1]. Move OPERANDS[2] into OPERANDS[0] if the condition - holds, otherwise move OPERANDS[3] into OPERANDS[0]. */ +/* Perform the comparison in OPERANDS[1]. Move OPERANDS[2] into OPERANDS[0] + if the condition holds, otherwise move OPERANDS[3] into OPERANDS[0]. */ void mips_expand_conditional_move (rtx *operands) { - enum rtx_code code; - rtx cond, op0, op1; + rtx cond; + enum rtx_code code = GET_CODE (operands[1]); + rtx op0 = XEXP (operands[1], 0); + rtx op1 = XEXP (operands[1], 1); - code = GET_CODE (operands[1]); mips_emit_compare (&code, &op0, &op1, true); - cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1), + cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1); emit_insn (gen_rtx_SET (VOIDmode, operands[0], gen_rtx_IF_THEN_ELSE (GET_MODE (operands[0]), cond, operands[2], operands[3]))); } -/* Compare cmp_operands[0] with cmp_operands[1] using rtl code CODE, - then trap if the condition holds. */ +/* Perform the comparison in COMPARISON, then trap if the condition holds. */ void -mips_expand_conditional_trap (enum rtx_code code) +mips_expand_conditional_trap (rtx comparison) { rtx op0, op1; enum machine_mode mode; + enum rtx_code code; /* MIPS conditional trap instructions don't have GT or LE flavors, so we must swap the operands and convert to LT and GE respectively. */ + code = GET_CODE (comparison); switch (code) { case GT: @@ -4395,17 +4394,17 @@ mips_expand_conditional_trap (enum rtx_code code) case GTU: case LEU: code = swap_condition (code); - op0 = cmp_operands[1]; - op1 = cmp_operands[0]; + op0 = XEXP (comparison, 1); + op1 = XEXP (comparison, 0); break; default: - op0 = cmp_operands[0]; - op1 = cmp_operands[1]; + op0 = XEXP (comparison, 0); + op1 = XEXP (comparison, 1); break; } - mode = GET_MODE (cmp_operands[0]); + mode = GET_MODE (XEXP (comparison, 0)); op0 = force_reg (mode, op0); if (!arith_operand (op1, mode)) op1 = force_reg (mode, op1); @@ -6396,7 +6395,7 @@ static void mips_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length, HOST_WIDE_INT bytes_per_iter) { - rtx label, src_reg, dest_reg, final_src; + rtx label, src_reg, dest_reg, final_src, test; HOST_WIDE_INT leftover; leftover = length % bytes_per_iter; @@ -6423,11 +6422,11 @@ mips_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length, mips_emit_move (dest_reg, plus_constant (dest_reg, bytes_per_iter)); /* Emit the loop condition. */ + test = gen_rtx_NE (VOIDmode, src_reg, final_src); if (Pmode == DImode) - emit_insn (gen_cmpdi (src_reg, final_src)); + emit_jump_insn (gen_cbranchdi4 (test, src_reg, final_src, label)); else - emit_insn (gen_cmpsi (src_reg, final_src)); - emit_jump_insn (gen_bne (label)); + emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label)); /* Mop up any left-over bytes. */ if (leftover) @@ -7292,6 +7291,8 @@ mips_print_operand (FILE *file, rtx op, int letter) || (letter == 'L' && TARGET_BIG_ENDIAN) || letter == 'D') regno++; + else if (letter && letter != 'z' && letter != 'M' && letter != 'L') + output_operand_lossage ("invalid use of '%%%c'", letter); /* We need to print $0 .. $31 for COP0 registers. */ if (COP0_REG_P (regno)) fprintf (file, "$%s", ®_names[regno][4]); @@ -7303,6 +7304,8 @@ mips_print_operand (FILE *file, rtx op, int letter) case MEM: if (letter == 'D') output_address (plus_constant (XEXP (op, 0), 4)); + else if (letter && letter != 'z') + output_operand_lossage ("invalid use of '%%%c'", letter); else output_address (XEXP (op, 0)); break; @@ -7310,6 +7313,8 @@ mips_print_operand (FILE *file, rtx op, int letter) default: if (letter == 'z' && op == CONST0_RTX (GET_MODE (op))) fputs (reg_names[GP_REG_FIRST], file); + else if (letter && letter != 'z') + output_operand_lossage ("invalid use of '%%%c'", letter); else if (CONST_GP_P (op)) fputs (reg_names[GLOBAL_POINTER_REGNUM], file); else @@ -14909,6 +14914,9 @@ mips_final_postscan_insn (FILE *file, rtx insn, rtx *opvec, int noperands) #undef TARGET_ASM_FINAL_POSTSCAN_INSN #define TARGET_ASM_FINAL_POSTSCAN_INSN mips_final_postscan_insn +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P mips_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-mips.h" diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 5c68688ccce..5b64346fef6 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2504,25 +2504,11 @@ typedef struct mips_args { #define MAX_REGS_PER_ADDRESS 1 -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (mips_legitimate_address_p (MODE, X, 1)) \ - goto ADDR; \ -} -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (mips_legitimate_address_p (MODE, X, 0)) \ - goto ADDR; \ -} -#endif - /* Check for constness inline but use mips_legitimate_address_p to check whether a constant really is an address. */ #define CONSTANT_ADDRESS_P(X) \ - (CONSTANT_P (X) && mips_legitimate_address_p (SImode, X, 0)) + (CONSTANT_P (X) && memory_address_p (SImode, X)) #define LEGITIMATE_CONSTANT_P(X) (mips_const_insns (X) > 0) @@ -3432,7 +3418,6 @@ extern int mips_dbx_regno[]; extern int mips_dwarf_regno[]; extern bool mips_split_p[]; extern bool mips_split_hi_p[]; -extern GTY(()) rtx cmp_operands[2]; extern enum processor_type mips_arch; /* which cpu to codegen for */ extern enum processor_type mips_tune; /* which cpu to schedule for */ extern int mips_isa; /* architectural level */ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 95ba6ba2620..3b44a84104b 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -727,9 +727,10 @@ ;; This attributes gives the mode mask of a SHORT. (define_mode_attr mask [(QI "0x00ff") (HI "0xffff")]) -;; Mode attributes for GPR loads and stores. +;; Mode attributes for GPR loads. (define_mode_attr load [(SI "lw") (DI "ld")]) -(define_mode_attr store [(SI "sw") (DI "sd")]) +;; Instruction names for stores. +(define_mode_attr store [(QI "sb") (HI "sh") (SI "sw") (DI "sd")]) ;; Similarly for MIPS IV indexed FPR loads and stores. (define_mode_attr loadx [(SF "lwxc1") (DF "ldxc1") (V2SF "ldxc1")]) @@ -791,11 +792,6 @@ (DF "ISA_HAS_FP4 && TARGET_FLOAT64") (V2SF "TARGET_SB1")]) -;; This code iterator allows all branch instructions to be generated from -;; a single define_expand template. -(define_code_iterator any_cond [unordered ordered unlt unge uneq ltgt unle ungt - eq ne gt ge lt le gtu geu ltu leu]) - ;; This code iterator allows signed and unsigned widening multiplications ;; to use the same template. (define_code_iterator any_extend [sign_extend zero_extend]) @@ -994,19 +990,15 @@ } [(set_attr "type" "trap")]) -(define_expand "conditional_trap" +(define_expand "ctrap<mode>4" [(trap_if (match_operator 0 "comparison_operator" - [(match_dup 2) (match_dup 3)]) - (match_operand 1 "const_int_operand"))] + [(match_operand:GPR 1 "reg_or_0_operand") + (match_operand:GPR 2 "arith_operand")]) + (match_operand 3 "const_0_operand"))] "ISA_HAS_COND_TRAP" { - if (GET_MODE_CLASS (GET_MODE (cmp_operands[0])) == MODE_INT - && operands[1] == const0_rtx) - { - mips_expand_conditional_trap (GET_CODE (operands[0])); - DONE; - } - FAIL; + mips_expand_conditional_trap (operands[0]); + DONE; }) (define_insn "*conditional_trap<mode>" @@ -2701,33 +2693,13 @@ ;; ;; Step A needs a real instruction but step B does not. -(define_insn "truncdisi2" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,m") - (truncate:SI (match_operand:DI 1 "register_operand" "d,d")))] - "TARGET_64BIT" - "@ - sll\t%0,%1,0 - sw\t%1,%0" - [(set_attr "move_type" "sll0,store") - (set_attr "mode" "SI")]) - -(define_insn "truncdihi2" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,m") - (truncate:HI (match_operand:DI 1 "register_operand" "d,d")))] - "TARGET_64BIT" - "@ - sll\t%0,%1,0 - sh\t%1,%0" - [(set_attr "move_type" "sll0,store") - (set_attr "mode" "SI")]) - -(define_insn "truncdiqi2" - [(set (match_operand:QI 0 "nonimmediate_operand" "=d,m") - (truncate:QI (match_operand:DI 1 "register_operand" "d,d")))] +(define_insn "truncdi<mode>2" + [(set (match_operand:SUBDI 0 "nonimmediate_operand" "=d,m") + (truncate:SUBDI (match_operand:DI 1 "register_operand" "d,d")))] "TARGET_64BIT" "@ sll\t%0,%1,0 - sb\t%1,%0" + <store>\t%1,%0" [(set_attr "move_type" "sll0,store") (set_attr "mode" "SI")]) @@ -3243,6 +3215,7 @@ rtx reg3 = gen_reg_rtx (SImode); rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); + rtx test; REAL_VALUE_TYPE offset; real_2expN (&offset, 31, DFmode); @@ -3252,8 +3225,8 @@ mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, DFmode)); do_pending_stack_adjust (); - emit_insn (gen_cmpdf (operands[1], reg1)); - emit_jump_insn (gen_bge (label1)); + test = gen_rtx_GE (VOIDmode, operands[1], reg1); + emit_jump_insn (gen_cbranchdf4 (test, operands[1], reg1, label1)); emit_insn (gen_fix_truncdfsi2 (operands[0], operands[1])); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, @@ -3288,6 +3261,7 @@ rtx reg3 = gen_reg_rtx (DImode); rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); + rtx test; REAL_VALUE_TYPE offset; real_2expN (&offset, 63, DFmode); @@ -3295,8 +3269,8 @@ mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, DFmode)); do_pending_stack_adjust (); - emit_insn (gen_cmpdf (operands[1], reg1)); - emit_jump_insn (gen_bge (label1)); + test = gen_rtx_GE (VOIDmode, operands[1], reg1); + emit_jump_insn (gen_cbranchdf4 (test, operands[1], reg1, label1)); emit_insn (gen_fix_truncdfdi2 (operands[0], operands[1])); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, @@ -3330,6 +3304,7 @@ rtx reg3 = gen_reg_rtx (SImode); rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); + rtx test; REAL_VALUE_TYPE offset; real_2expN (&offset, 31, SFmode); @@ -3337,8 +3312,8 @@ mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, SFmode)); do_pending_stack_adjust (); - emit_insn (gen_cmpsf (operands[1], reg1)); - emit_jump_insn (gen_bge (label1)); + test = gen_rtx_GE (VOIDmode, operands[1], reg1); + emit_jump_insn (gen_cbranchsf4 (test, operands[1], reg1, label1)); emit_insn (gen_fix_truncsfsi2 (operands[0], operands[1])); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, @@ -3372,6 +3347,7 @@ rtx reg3 = gen_reg_rtx (DImode); rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); + rtx test; REAL_VALUE_TYPE offset; real_2expN (&offset, 63, SFmode); @@ -3379,8 +3355,8 @@ mips_emit_move (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, SFmode)); do_pending_stack_adjust (); - emit_insn (gen_cmpsf (operands[1], reg1)); - emit_jump_insn (gen_bge (label1)); + test = gen_rtx_GE (VOIDmode, operands[1], reg1); + emit_jump_insn (gen_cbranchsf4 (test, operands[1], reg1, label1)); emit_insn (gen_fix_truncsfdi2 (operands[0], operands[1])); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, @@ -5011,50 +4987,6 @@ ;; ;; .................... ;; -;; COMPARISONS -;; -;; .................... - -;; Flow here is rather complex: -;; -;; 1) The cmp{si,di,sf,df} routine is called. It deposits the arguments -;; into cmp_operands[] but generates no RTL. -;; -;; 2) The appropriate branch define_expand is called, which then -;; creates the appropriate RTL for the comparison and branch. -;; Different CC modes are used, based on what type of branch is -;; done, so that we can constrain things appropriately. There -;; are assumptions in the rest of GCC that break if we fold the -;; operands into the branches for integer operations, and use cc0 -;; for floating point, so we use the fp status register instead. -;; If needed, an appropriate temporary is created to hold the -;; of the integer compare. - -(define_expand "cmp<mode>" - [(set (cc0) - (compare:CC (match_operand:GPR 0 "register_operand") - (match_operand:GPR 1 "nonmemory_operand")))] - "" -{ - cmp_operands[0] = operands[0]; - cmp_operands[1] = operands[1]; - DONE; -}) - -(define_expand "cmp<mode>" - [(set (cc0) - (compare:CC (match_operand:SCALARF 0 "register_operand") - (match_operand:SCALARF 1 "register_operand")))] - "" -{ - cmp_operands[0] = operands[0]; - cmp_operands[1] = operands[1]; - DONE; -}) - -;; -;; .................... -;; ;; CONDITIONAL BRANCHES ;; ;; .................... @@ -5189,15 +5121,29 @@ [(set_attr "type" "branch") (set_attr "mode" "none")]) -(define_expand "b<code>" +(define_expand "cbranch<mode>4" [(set (pc) - (if_then_else (any_cond:CC (cc0) - (const_int 0)) - (label_ref (match_operand 0 "")) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:GPR 1 "register_operand") + (match_operand:GPR 2 "nonmemory_operand")]) + (label_ref (match_operand 3 "")) (pc)))] "" { - mips_expand_conditional_branch (operands, <CODE>); + mips_expand_conditional_branch (operands); + DONE; +}) + +(define_expand "cbranch<mode>4" + [(set (pc) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:SCALARF 1 "register_operand") + (match_operand:SCALARF 2 "register_operand")]) + (label_ref (match_operand 3 "")) + (pc)))] + "" +{ + mips_expand_conditional_branch (operands); DONE; }) @@ -5261,12 +5207,16 @@ ;; Destination is always set in SI mode. -(define_expand "seq" +(define_expand "cstore<mode>4" [(set (match_operand:SI 0 "register_operand") - (eq:SI (match_dup 1) - (match_dup 2)))] + (match_operator:SI 1 "mips_cstore_operator" + [(match_operand:GPR 2 "register_operand") + (match_operand:GPR 3 "nonmemory_operand")]))] "" - { if (mips_expand_scc (EQ, operands[0])) DONE; else FAIL; }) +{ + mips_expand_scc (operands); + DONE; +}) (define_insn "*seq_zero_<GPR:mode><GPR2:mode>" [(set (match_operand:GPR2 0 "register_operand" "=d") @@ -5299,16 +5249,6 @@ [(set_attr "type" "slt") (set_attr "mode" "<GPR:MODE>")]) -;; "sne" uses sltu instructions in which the first operand is $0. -;; This isn't possible in mips16 code. - -(define_expand "sne" - [(set (match_operand:SI 0 "register_operand") - (ne:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_MIPS16" - { if (mips_expand_scc (NE, operands[0])) DONE; else FAIL; }) - (define_insn "*sne_zero_<GPR:mode><GPR2:mode>" [(set (match_operand:GPR2 0 "register_operand" "=d") (ne:GPR2 (match_operand:GPR 1 "register_operand" "d") @@ -5331,13 +5271,6 @@ [(set_attr "type" "slt") (set_attr "mode" "<GPR:MODE>")]) -(define_expand "sgt<u>" - [(set (match_operand:SI 0 "register_operand") - (any_gt:SI (match_dup 1) - (match_dup 2)))] - "" - { if (mips_expand_scc (<CODE>, operands[0])) DONE; else FAIL; }) - (define_insn "*sgt<u>_<GPR:mode><GPR2:mode>" [(set (match_operand:GPR2 0 "register_operand" "=d") (any_gt:GPR2 (match_operand:GPR 1 "register_operand" "d") @@ -5356,13 +5289,6 @@ [(set_attr "type" "slt") (set_attr "mode" "<GPR:MODE>")]) -(define_expand "sge<u>" - [(set (match_operand:SI 0 "register_operand") - (any_ge:SI (match_dup 1) - (match_dup 2)))] - "" - { if (mips_expand_scc (<CODE>, operands[0])) DONE; else FAIL; }) - (define_insn "*sge<u>_<GPR:mode><GPR2:mode>" [(set (match_operand:GPR2 0 "register_operand" "=d") (any_ge:GPR2 (match_operand:GPR 1 "register_operand" "d") @@ -5372,13 +5298,6 @@ [(set_attr "type" "slt") (set_attr "mode" "<GPR:MODE>")]) -(define_expand "slt<u>" - [(set (match_operand:SI 0 "register_operand") - (any_lt:SI (match_dup 1) - (match_dup 2)))] - "" - { if (mips_expand_scc (<CODE>, operands[0])) DONE; else FAIL; }) - (define_insn "*slt<u>_<GPR:mode><GPR2:mode>" [(set (match_operand:GPR2 0 "register_operand" "=d") (any_lt:GPR2 (match_operand:GPR 1 "register_operand" "d") @@ -5402,13 +5321,6 @@ (const_int 4) (const_int 8))])]) -(define_expand "sle<u>" - [(set (match_operand:SI 0 "register_operand") - (any_le:SI (match_dup 1) - (match_dup 2)))] - "" - { if (mips_expand_scc (<CODE>, operands[0])) DONE; else FAIL; }) - (define_insn "*sle<u>_<GPR:mode><GPR2:mode>" [(set (match_operand:GPR2 0 "register_operand" "=d") (any_le:GPR2 (match_operand:GPR 1 "register_operand" "d") diff --git a/gcc/config/mips/predicates.md b/gcc/config/mips/predicates.md index aaebdded674..d32eaf13f8e 100644 --- a/gcc/config/mips/predicates.md +++ b/gcc/config/mips/predicates.md @@ -285,6 +285,12 @@ (define_predicate "order_operator" (match_code "lt,ltu,le,leu,ge,geu,gt,gtu")) +;; For NE, cstore uses sltu instructions in which the first operand is $0. +;; This isn't possible in mips16 code. + +(define_predicate "mips_cstore_operator" + (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu") + (and (match_code "ne") (match_test "!TARGET_MIPS16")))) (define_predicate "small_data_pattern" (and (match_code "set,parallel,unspec,unspec_volatile,prefetch") diff --git a/gcc/config/mmix/mmix-protos.h b/gcc/config/mmix/mmix-protos.h index d71064aa6d7..e839d864697 100644 --- a/gcc/config/mmix/mmix-protos.h +++ b/gcc/config/mmix/mmix-protos.h @@ -82,7 +82,6 @@ extern rtx mmix_eh_return_stackadj_rtx (void); extern rtx mmix_eh_return_handler_rtx (void); extern void mmix_initialize_trampoline (rtx, rtx, rtx); extern int mmix_constant_address_p (rtx); -extern int mmix_legitimate_address (enum machine_mode, rtx, int); extern int mmix_legitimate_constant_p (rtx); extern void mmix_print_operand (FILE *, rtx, int); extern void mmix_print_operand_address (FILE *, rtx); @@ -96,7 +95,6 @@ extern void mmix_setup_frame_addresses (void); /* Needs to be ifdef:d for sake of enum rtx_code. */ extern enum machine_mode mmix_select_cc_mode (enum rtx_code, rtx, rtx); extern void mmix_canonicalize_comparison (enum rtx_code *, rtx *, rtx *); -extern int mmix_valid_comparison (enum rtx_code, enum machine_mode, rtx); extern rtx mmix_gen_compare_reg (enum rtx_code, rtx, rtx); #endif diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c index ceed8dbb6db..d2115a5d703 100644 --- a/gcc/config/mmix/mmix.c +++ b/gcc/config/mmix/mmix.c @@ -125,6 +125,7 @@ static void mmix_emit_sp_add (HOST_WIDE_INT offset); static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT); static void mmix_target_asm_function_end_prologue (FILE *); static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT); +static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool); static void mmix_reorg (void); static void mmix_asm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); @@ -206,6 +207,9 @@ static bool mmix_pass_by_reference (CUMULATIVE_ARGS *, #undef TARGET_DEFAULT_TARGET_FLAGS #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P mmix_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; /* Functions that are expansions for target macros. @@ -985,13 +989,12 @@ mmix_constant_address_p (rtx x) return constant_ok || (addend & 3) == 0; } -/* Return 1 if the address is OK, otherwise 0. - Used by GO_IF_LEGITIMATE_ADDRESS. */ +/* Return 1 if the address is OK, otherwise 0. */ -int -mmix_legitimate_address (enum machine_mode mode ATTRIBUTE_UNUSED, - rtx x, - int strict_checking) +bool +mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, + rtx x, + bool strict_checking) { #define MMIX_REG_OK(X) \ ((strict_checking \ @@ -2359,70 +2362,14 @@ mmix_shiftable_wyde_value (unsigned HOST_WIDEST_INT value) return 1; } -/* Returns zero if code and mode is not a valid condition from a - compare-type insn. Nonzero if it is. The parameter op, if non-NULL, - is the comparison of mode is CC-somethingmode. */ - -int -mmix_valid_comparison (RTX_CODE code, enum machine_mode mode, rtx op) -{ - if (mode == VOIDmode && op != NULL_RTX) - mode = GET_MODE (op); - - /* We don't care to look at these, they should always be valid. */ - if (mode == CCmode || mode == CC_UNSmode || mode == DImode) - return 1; - - if ((mode == CC_FPmode || mode == DFmode) - && (code == GT || code == LT)) - return 1; - - if ((mode == CC_FPEQmode || mode == DFmode) - && (code == EQ || code == NE)) - return 1; - - if ((mode == CC_FUNmode || mode == DFmode) - && (code == ORDERED || code == UNORDERED)) - return 1; - - return 0; -} - -/* X and Y are two things to compare using CODE. Emit a compare insn if - possible and return the rtx for the cc-reg in the proper mode, or - NULL_RTX if this is not a valid comparison. */ +/* X and Y are two things to compare using CODE. Return the rtx for + the cc-reg in the proper mode. */ rtx mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y) { enum machine_mode ccmode = SELECT_CC_MODE (code, x, y); - rtx cc_reg; - - /* FIXME: Do we get constants here? Of double mode? */ - enum machine_mode mode - = GET_MODE (x) == VOIDmode - ? GET_MODE (y) - : GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT ? DFmode : DImode; - - if (! mmix_valid_comparison (code, mode, x)) - return NULL_RTX; - - cc_reg = gen_reg_rtx (ccmode); - - /* FIXME: Can we avoid emitting a compare insn here? */ - if (! REG_P (x) && ! REG_P (y)) - x = force_reg (mode, x); - - /* If it's not quite right yet, put y in a register. */ - if (! REG_P (y) - && (GET_CODE (y) != CONST_INT - || ! CONST_OK_FOR_LETTER_P (INTVAL (y), 'I'))) - y = force_reg (mode, y); - - emit_insn (gen_rtx_SET (VOIDmode, cc_reg, - gen_rtx_COMPARE (ccmode, x, y))); - - return cc_reg; + return gen_reg_rtx (ccmode); } /* Local (static) helper functions. */ diff --git a/gcc/config/mmix/mmix.h b/gcc/config/mmix/mmix.h index a7fb6e5884e..fb3d3019b29 100644 --- a/gcc/config/mmix/mmix.h +++ b/gcc/config/mmix/mmix.h @@ -81,11 +81,6 @@ along with GCC; see the file COPYING3. If not see #define MMIX_FUNCTION_ARG_SIZE(MODE, TYPE) \ ((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) -/* Declarations for helper variables that are not tied to a particular - target macro. */ -extern GTY(()) rtx mmix_compare_op0; -extern GTY(()) rtx mmix_compare_op1; - /* Per-function machine data. This is normally an opaque type just defined and used in the tm.c file, but we need to see the definition in mmix.md too. */ @@ -695,10 +690,6 @@ typedef struct { int regs; int lib; } CUMULATIVE_ARGS; #define MAX_REGS_PER_ADDRESS 2 -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ - if (mmix_legitimate_address (MODE, X, MMIX_REG_OK_STRICT)) \ - goto LABEL - #ifndef REG_OK_STRICT # define REG_OK_FOR_BASE_P(X) \ (REGNO (X) <= MMIX_LAST_GENERAL_REGISTER \ diff --git a/gcc/config/mmix/mmix.md b/gcc/config/mmix/mmix.md index aa878af0f82..44263e47f64 100644 --- a/gcc/config/mmix/mmix.md +++ b/gcc/config/mmix/mmix.md @@ -440,30 +440,6 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2") "" "NOR %0,%1,0") -;; Since we don't have cc0, we do what is recommended in the manual; -;; store away the operands for use in the branch, scc or movcc insn. -(define_expand "cmpdi" - [(match_operand:DI 0 "register_operand" "") - (match_operand:DI 1 "mmix_reg_or_8bit_operand" "")] - "" - " -{ - mmix_compare_op0 = operands[0]; - mmix_compare_op1 = operands[1]; - DONE; -}") - -(define_expand "cmpdf" - [(match_operand:DF 0 "register_operand" "") - (match_operand:DF 1 "register_operand" "")] - "" - " -{ - mmix_compare_op0 = operands[0]; - mmix_compare_op1 = operands[1]; - DONE; -}") - ;; When the user-patterns expand, the resulting insns will match the ;; patterns below. @@ -474,7 +450,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2") ;; unsigned, so that has to be done another way. ;; FIXME: Perhaps a peep2 changing CCcode to a new code, that ;; gets folded here. -(define_insn "*cmpcc_folded" +(define_insn "*cmpdi_folded" [(set (match_operand:CC 0 "register_operand" "=r") (compare:CC (match_operand:DI 1 "register_operand" "r") @@ -485,7 +461,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2") && REGNO (operands[1]) == REGNO (operands[0])" "%% folded: cmp %0,%1,0") -(define_insn "*cmpcc" +(define_insn "*cmps" [(set (match_operand:CC 0 "register_operand" "=r") (compare:CC (match_operand:DI 1 "register_operand" "r") @@ -724,7 +700,8 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2") ;; 0 to use in movdfcc. (define_expand "movdfcc" - [(set (match_operand:DF 0 "register_operand" "") + [(set (match_dup 4) (match_dup 5)) + (set (match_operand:DF 0 "register_operand" "") (if_then_else:DF (match_operand 1 "comparison_operator" "") (match_operand:DF 2 "mmix_reg_or_0_operand" "") @@ -733,15 +710,20 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2") " { enum rtx_code code = GET_CODE (operands[1]); - rtx cc_reg = mmix_gen_compare_reg (code, mmix_compare_op0, - mmix_compare_op1); - if (cc_reg == NULL_RTX) + if (code == LE || code == GE) FAIL; - operands[1] = gen_rtx_fmt_ee (code, VOIDmode, cc_reg, const0_rtx); + + operands[4] = mmix_gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); + operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]), + XEXP (operands[1], 0), + XEXP (operands[1], 1)); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, operands[4], const0_rtx); }") (define_expand "movdicc" - [(set (match_operand:DI 0 "register_operand" "") + [(set (match_dup 4) (match_dup 5)) + (set (match_operand:DI 0 "register_operand" "") (if_then_else:DI (match_operand 1 "comparison_operator" "") (match_operand:DI 2 "mmix_reg_or_8bit_operand" "") @@ -750,11 +732,15 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2") " { enum rtx_code code = GET_CODE (operands[1]); - rtx cc_reg = mmix_gen_compare_reg (code, mmix_compare_op0, - mmix_compare_op1); - if (cc_reg == NULL_RTX) + if (code == LE || code == GE) FAIL; - operands[1] = gen_rtx_fmt_ee (code, VOIDmode, cc_reg, const0_rtx); + + operands[4] = mmix_gen_compare_reg (code, XEXP (operands[1], 0), + XEXP (operands[1], 1)); + operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]), + XEXP (operands[1], 0), + XEXP (operands[1], 1)); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, operands[4], const0_rtx); }") ;; FIXME: Is this the right way to do "folding" of CCmode -> DImode? @@ -854,175 +840,65 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2") CS%d2 %0,%3,%1 ZS%d2 %0,%3,%1") -;; FIXME: scc patterns will probably help, I just skip them +;; FIXME: scc insns will probably help, I just skip them ;; right now. Revisit. -(define_expand "beq" - [(set (pc) - (if_then_else (eq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (EQ, mmix_compare_op0, mmix_compare_op1); -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] +(define_expand "cbranchdi4" + [(set (match_dup 4) + (match_op_dup 5 + [(match_operand:DI 1 "register_operand" "") + (match_operand:DI 2 "mmix_reg_or_8bit_operand" "")])) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" + [(match_dup 4) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" " { - operands[1] - = mmix_gen_compare_reg (NE, mmix_compare_op0, mmix_compare_op1); + operands[4] = mmix_gen_compare_reg (GET_CODE (operands[0]), + operands[1], operands[2]); + operands[5] = gen_rtx_fmt_ee (COMPARE, + GET_MODE (operands[4]), + operands[1], operands[2]); }") -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] +(define_expand "cbranchdf4" + [(set (match_dup 4) + (match_op_dup 5 + [(match_operand:DF 1 "register_operand" "") + (match_operand:DF 2 "register_operand" "")])) + (set (pc) + (if_then_else + (match_operator 0 "float_comparison_operator" + [(match_dup 4) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" " { - operands[1] - = mmix_gen_compare_reg (GT, mmix_compare_op0, mmix_compare_op1); -}") - -(define_expand "ble" - [(set (pc) - (if_then_else (le (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (LE, mmix_compare_op0, mmix_compare_op1); - /* The head comment of optabs.c:can_compare_p says we're required to implement this, so we have to clean up the mess here. */ - if (operands[1] == NULL_RTX) + if (GET_CODE (operands[0]) == LE || GET_CODE (operands[0]) == GE) { - /* FIXME: Watch out for sharing/unsharing of rtx:es. */ - emit_jump_insn ((*bcc_gen_fctn[(int) LT]) (operands[0])); - emit_jump_insn ((*bcc_gen_fctn[(int) EQ]) (operands[0])); + enum rtx_code ltgt_code = GET_CODE (operands[0]) == LE ? LT : GT; + emit_cmp_and_jump_insns (operands[1], operands[2], ltgt_code, NULL_RTX, + DFmode, 0, operands[3]); + emit_cmp_and_jump_insns (operands[1], operands[2], EQ, NULL_RTX, + DFmode, 0, operands[3]); DONE; } -}") - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (GE, mmix_compare_op0, mmix_compare_op1); - /* The head comment of optabs.c:can_compare_p says we're required to - implement this, so we have to clean up the mess here. */ - if (operands[1] == NULL_RTX) - { - /* FIXME: Watch out for sharing/unsharing of rtx:es. */ - emit_jump_insn ((*bcc_gen_fctn[(int) GT]) (operands[0])); - emit_jump_insn ((*bcc_gen_fctn[(int) EQ]) (operands[0])); - DONE; - } + operands[4] = mmix_gen_compare_reg (GET_CODE (operands[0]), + operands[1], operands[2]); + operands[5] = gen_rtx_fmt_ee (COMPARE, + GET_MODE (operands[4]), + operands[1], operands[2]); }") -(define_expand "blt" - [(set (pc) - (if_then_else (lt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (LT, mmix_compare_op0, mmix_compare_op1); -}") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (GTU, mmix_compare_op0, mmix_compare_op1); -}") - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (LEU, mmix_compare_op0, mmix_compare_op1); -}") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (GEU, mmix_compare_op0, mmix_compare_op1); -}") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (LTU, mmix_compare_op0, mmix_compare_op1); -}") - -(define_expand "bunordered" - [(set (pc) - (if_then_else (unordered (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (UNORDERED, mmix_compare_op0, mmix_compare_op1); - - if (operands[1] == NULL_RTX) - FAIL; -}") - -(define_expand "bordered" - [(set (pc) - (if_then_else (ordered (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - operands[1] - = mmix_gen_compare_reg (ORDERED, mmix_compare_op0, mmix_compare_op1); -}") ;; FIXME: we can emit an unordered-or-*not*-equal compare in one insn, but ;; there's no RTL code for it. Maybe revisit in future. diff --git a/gcc/config/mmix/predicates.md b/gcc/config/mmix/predicates.md index 5c5792e1f6b..b5773b87aee 100644 --- a/gcc/config/mmix/predicates.md +++ b/gcc/config/mmix/predicates.md @@ -17,6 +17,11 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. +;; Return 1 if OP is a valid comparison operator for "cbranch" instructions. +;; LE and GE are further lowered by the cbranchdf4 pattern. +(define_predicate "float_comparison_operator" + (match_code "ne, eq, le, ge, lt, gt, ordered, unordered")) + ;; True if this is a foldable comparison operator ;; - one where a the result of (compare:CC (reg) (const_int 0)) can be ;; replaced by (reg). */ diff --git a/gcc/config/mn10300/mn10300-protos.h b/gcc/config/mn10300/mn10300-protos.h index 935cb8f81f6..ae4728ae0cb 100644 --- a/gcc/config/mn10300/mn10300-protos.h +++ b/gcc/config/mn10300/mn10300-protos.h @@ -23,7 +23,6 @@ along with GCC; see the file COPYING3. If not see extern void mn10300_override_options (void); extern rtx legitimize_pic_address (rtx, rtx); extern int legitimate_pic_operand_p (rtx); -extern bool legitimate_address_p (enum machine_mode, rtx, int); extern void print_operand (FILE *, rtx, int); extern void print_operand_address (FILE *, rtx); extern void mn10300_print_reg_list (FILE *, int); diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index ceb77e862c2..e32f3766d64 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -69,6 +69,7 @@ enum processor_type mn10300_processor = PROCESSOR_DEFAULT; static bool mn10300_handle_option (size_t, const char *, int); +static bool mn10300_legitimate_address_p (enum machine_mode, rtx, bool); static int mn10300_address_cost_1 (rtx, int *); static int mn10300_address_cost (rtx, bool); static bool mn10300_rtx_costs (rtx, int, int, int *, bool); @@ -127,6 +128,9 @@ static unsigned int mn10300_case_values_threshold (void); #undef TARGET_CASE_VALUES_THRESHOLD #define TARGET_CASE_VALUES_THRESHOLD mn10300_case_values_threshold +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P mn10300_legitimate_address_p + static void mn10300_encode_section_info (tree, rtx, int); struct gcc_target targetm = TARGET_INITIALIZER; @@ -1900,9 +1904,21 @@ legitimate_pic_operand_p (rtx x) } /* Return TRUE if the address X, taken from a (MEM:MODE X) rtx, is - legitimate, and FALSE otherwise. */ + legitimate, and FALSE otherwise. + + On the mn10300, the value in the address register must be + in the same memory space/segment as the effective address. + + This is problematical for reload since it does not understand + that base+index != index+base in a memory reference. + + Note it is still possible to use reg+reg addressing modes, + it's just much more difficult. For a discussion of a possible + workaround and solution, see the comments in pa.c before the + function record_unscaled_index_insn_codes. */ + bool -legitimate_address_p (enum machine_mode mode, rtx x, int strict) +mn10300_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { if (CONSTANT_ADDRESS_P (x) && (! flag_pic || legitimate_pic_operand_p (x))) @@ -2030,7 +2046,7 @@ mn10300_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed ATTRI { case CONST_INT: /* Zeros are extremely cheap. */ - if (INTVAL (x) == 0 && outer_code == SET) + if (INTVAL (x) == 0 && (outer_code == SET || outer_code == COMPARE)) *total = 0; /* If it fits in 8 bits, then it's still relatively cheap. */ else if (INT_8_BITS (INTVAL (x))) @@ -2059,6 +2075,12 @@ mn10300_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed ATTRI *total = 8; return true; + case ZERO_EXTRACT: + /* This is cheap, we can use btst. */ + if (outer_code == COMPARE) + *total = 0; + return false; + /* ??? This probably needs more work. */ case MOD: case DIV: diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h index b35894435a2..77be9962907 100644 --- a/gcc/config/mn10300/mn10300.h +++ b/gcc/config/mn10300/mn10300.h @@ -655,26 +655,6 @@ struct cum_arg {int nbytes; }; #define HAVE_POST_INCREMENT (TARGET_AM33) -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression - that is a valid memory address for an instruction. - The MODE argument is the machine mode for the MEM expression - that wants to use this address. - - The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, - except for CONSTANT_ADDRESS_P which is actually - machine-independent. - - On the mn10300, the value in the address register must be - in the same memory space/segment as the effective address. - - This is problematical for reload since it does not understand - that base+index != index+base in a memory reference. - - Note it is still possible to use reg+reg addressing modes, - it's just much more difficult. For a discussion of a possible - workaround and solution, see the comments in pa.c before the - function record_unscaled_index_insn_codes. */ - /* Accept either REG or SUBREG where a register is valid. */ #define RTX_OK_FOR_BASE_P(X, strict) \ @@ -684,14 +664,6 @@ struct cum_arg {int nbytes; }; && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \ (strict)))) -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -do \ - { \ - if (legitimate_address_p ((MODE), (X), REG_STRICT)) \ - goto ADDR; \ - } \ -while (0) - /* Nonzero if the constant value X is a legitimate general operand. diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md index 35b0e589cb5..a2b6296912f 100644 --- a/gcc/config/mn10300/mn10300.md +++ b/gcc/config/mn10300/mn10300.md @@ -826,34 +826,34 @@ ;; TEST INSTRUCTIONS ;; ---------------------------------------------------------------------- -;; Go ahead and define tstsi so we can eliminate redundant tst insns -;; when we start trying to optimize this port. -(define_insn "tstsi" - [(set (cc0) (match_operand:SI 0 "register_operand" "dax"))] - "" - "* return output_tst (operands[0], insn);" - [(set_attr "cc" "set_znv")]) - -(define_insn "" - [(set (cc0) (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx,!a")))] +(define_insn "*tst_extqisi_am33" + [(set (cc0) (compare + (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx,!a")) + (const_int 0)))] "TARGET_AM33" "* return output_tst (operands[0], insn);" [(set_attr "cc" "set_znv")]) -(define_insn "" - [(set (cc0) (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx")))] +(define_insn "*tst_extqisi" + [(set (cc0) (compare + (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx")) + (const_int 0)))] "" "* return output_tst (operands[0], insn);" [(set_attr "cc" "set_znv")]) -(define_insn "" - [(set (cc0) (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx,!a")))] +(define_insn "*tst_exthisi_am33" + [(set (cc0) (compare + (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx,!a")) + (const_int 0)))] "TARGET_AM33" "* return output_tst (operands[0], insn);" [(set_attr "cc" "set_znv")]) -(define_insn "" - [(set (cc0) (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx")))] +(define_insn "*tst_exthisi" + [(set (cc0) (compare + (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx")) + (const_int 0)))] "" "* return output_tst (operands[0], insn);" [(set_attr "cc" "set_znv")]) @@ -874,17 +874,22 @@ ;; possibly satisfied, so just mark the alternative with a `!', so ;; that it is not considered by reload. -(define_insn "cmpsi" +(define_insn "*cmpsi" [(set (cc0) - (compare (match_operand:SI 0 "register_operand" "!*d*a*x,dax") - (match_operand:SI 1 "nonmemory_operand" "*0,daxi")))] + (compare (match_operand:SI 0 "register_operand" "!*d*a*x,dax,dax") + (match_operand:SI 1 "nonmemory_operand" "*0,I,daxi")))] "" - "@ - btst 0,d0 - cmp %1,%0" - [(set_attr "cc" "compare,compare")]) + "* +{ + if (which_alternative == 0) + return \"btst 0,d0\"; + if (which_alternative == 1) + return output_tst (operands[0], insn); + return \"cmp %1,%0\"; +}" + [(set_attr "cc" "compare,set_znv,compare")]) -(define_insn "cmpsf" +(define_insn "*cmpsf" [(set (cc0) (compare (match_operand:SF 0 "register_operand" "f,f") (match_operand:SF 1 "nonmemory_operand" "f,F")))] @@ -1510,9 +1515,10 @@ (define_insn "" [(set (cc0) - (zero_extract:SI (match_operand:SI 0 "register_operand" "dx") - (match_operand 1 "const_int_operand" "") - (match_operand 2 "const_int_operand" "")))] + (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "dx") + (match_operand 1 "const_int_operand" "") + (match_operand 2 "const_int_operand" "")) + (const_int 0)))] "" "* { @@ -1537,9 +1543,10 @@ (define_insn "" [(set (cc0) - (zero_extract:SI (match_operand:QI 0 "general_operand" "R,dx") - (match_operand 1 "const_int_operand" "") - (match_operand 2 "const_int_operand" "")))] + (compare (zero_extract:SI (match_operand:QI 0 "general_operand" "R,dx") + (match_operand 1 "const_int_operand" "") + (match_operand 2 "const_int_operand" "")) + (const_int 0)))] "mask_ok_for_mem_btst (INTVAL (operands[1]), INTVAL (operands[2]))" "* { @@ -1581,17 +1588,19 @@ [(set_attr "cc" "clobber")]) (define_insn "" - [(set (cc0) (and:SI (match_operand:SI 0 "register_operand" "dx") - (match_operand:SI 1 "const_int_operand" "")))] + [(set (cc0) (compare (and:SI (match_operand:SI 0 "register_operand" "dx") + (match_operand:SI 1 "const_int_operand" "")) + (const_int 0)))] "" "btst %1,%0" [(set_attr "cc" "clobber")]) (define_insn "" [(set (cc0) - (and:SI - (subreg:SI (match_operand:QI 0 "general_operand" "R,dx") 0) - (match_operand:SI 1 "const_8bit_operand" "")))] + (compare (and:SI + (subreg:SI (match_operand:QI 0 "general_operand" "R,dx") 0) + (match_operand:SI 1 "const_8bit_operand" "")) + (const_int 0)))] "" "@ btst %U1,%A0 @@ -1603,97 +1612,34 @@ ;; JUMP INSTRUCTIONS ;; ---------------------------------------------------------------------- -;; Conditional jump instructions - -(define_expand "ble" - [(set (pc) - (if_then_else (le (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] +(define_expand "cbranchsi4" + [(set (cc0) + (compare (match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" ""))) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] "" "") -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" +(define_expand "cbranchsf4" + [(set (cc0) + (compare (match_operand:SF 1 "register_operand" "") + (match_operand:SF 2 "nonmemory_operand" ""))) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_AM33_2" "") -(define_expand "beq" - [(set (pc) - (if_then_else (eq (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") -(define_expand "bne" - [(set (pc) - (if_then_else (ne (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") +;; Conditional jump instructions (define_insn "" [(set (pc) @@ -1774,11 +1720,13 @@ rtx table = gen_reg_rtx (SImode); rtx index = gen_reg_rtx (SImode); rtx addr = gen_reg_rtx (Pmode); + rtx test; emit_move_insn (table, gen_rtx_LABEL_REF (VOIDmode, operands[3])); emit_move_insn (index, plus_constant (operands[0], - INTVAL (operands[1]))); - emit_insn (gen_cmpsi (index, operands[2])); - emit_jump_insn (gen_bgtu (operands[4])); + test = gen_rtx_fmt_ee (GTU, VOIDmode, index, operands[2]); + emit_jump_insn (gen_cbranchsi4 (test, index, operands[2], operands[4])); + emit_move_insn (index, gen_rtx_ASHIFT (SImode, index, const2_rtx)); emit_move_insn (addr, gen_rtx_MEM (SImode, gen_rtx_PLUS (SImode, table, index))); @@ -2518,7 +2466,8 @@ ;; This will work on the mn10200 because we can check the ZX flag ;; if the comparison is in HImode. (define_peephole - [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) + [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx") + (const_int 0))) (set (pc) (if_then_else (ge (cc0) (const_int 0)) (match_operand 1 "" "") (pc)))] @@ -2527,7 +2476,8 @@ [(set_attr "cc" "clobber")]) (define_peephole - [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) + [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx") + (const_int 0))) (set (pc) (if_then_else (lt (cc0) (const_int 0)) (match_operand 1 "" "") (pc)))] @@ -2536,7 +2486,8 @@ [(set_attr "cc" "clobber")]) (define_peephole - [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) + [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx") + (const_int 0))) (set (pc) (if_then_else (ge (cc0) (const_int 0)) (pc) (match_operand 1 "" "")))] @@ -2545,7 +2496,8 @@ [(set_attr "cc" "clobber")]) (define_peephole - [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) + [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx") + (const_int 0))) (set (pc) (if_then_else (lt (cc0) (const_int 0)) (pc) (match_operand 1 "" "")))] diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h index 3cd1f8580bc..526081acd52 100644 --- a/gcc/config/pa/pa-protos.h +++ b/gcc/config/pa/pa-protos.h @@ -56,7 +56,6 @@ extern void output_arg_descriptor (rtx); extern void output_global_address (FILE *, rtx, int); extern void print_operand (FILE *, rtx, int); extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); -extern struct rtx_def *gen_cmp_fp (enum rtx_code, rtx, rtx); extern void hppa_encode_label (rtx); extern int arith11_operand (rtx, enum machine_mode); extern int adddi3_operand (rtx, enum machine_mode); @@ -96,7 +95,7 @@ extern int fmpyaddoperands (rtx *); extern int fmpysuboperands (rtx *); extern int call_operand_address (rtx, enum machine_mode); extern int ior_operand (rtx, enum machine_mode); -extern void emit_bcond_fp (enum rtx_code, rtx); +extern void emit_bcond_fp (rtx[]); extern int emit_move_sequence (rtx *, enum machine_mode, rtx); extern int emit_hpdiv_const (rtx *, int); extern int is_function_label_plus_const (rtx); diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 80f5fe90bc2..882fac1aad4 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -165,11 +165,6 @@ static GTY(()) section *som_readonly_data_section; static GTY(()) section *som_one_only_readonly_data_section; static GTY(()) section *som_one_only_data_section; -/* Save the operands last given to a compare for use when we - generate a scc or bcc insn. */ -rtx hppa_compare_op0, hppa_compare_op1; -enum cmp_type hppa_branch_type; - /* Which cpu we are scheduling for. */ enum processor_type pa_cpu = TARGET_SCHED_DEFAULT; @@ -4383,6 +4378,19 @@ return_addr_rtx (int count, rtx frameaddr) rtx saved_rp; rtx ins; + /* Instruction stream at the normal return address for the export stub: + + 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp + 0x004010a1 | stub+12: ldsid (sr0,rp),r1 + 0x00011820 | stub+16: mtsp r1,sr0 + 0xe0400002 | stub+20: be,n 0(sr0,rp) + + 0xe0400002 must be specified as -532676606 so that it won't be + rejected as an invalid immediate operand on 64-bit hosts. */ + + HOST_WIDE_INT insns[4] = {0x4bc23fd1, 0x004010a1, 0x00011820, -532676606}; + int i; + if (count != 0) return NULL_RTX; @@ -4391,6 +4399,9 @@ return_addr_rtx (int count, rtx frameaddr) if (TARGET_64BIT || TARGET_NO_SPACE_REGS) return rp; + /* If there is no export stub then just use the value saved from + the return pointer register. */ + saved_rp = gen_reg_rtx (Pmode); emit_move_insn (saved_rp, rp); @@ -4402,37 +4413,15 @@ return_addr_rtx (int count, rtx frameaddr) label = gen_label_rtx (); /* Check the instruction stream at the normal return address for the - export stub: - - 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp - 0x004010a1 | stub+12: ldsid (sr0,rp),r1 - 0x00011820 | stub+16: mtsp r1,sr0 - 0xe0400002 | stub+20: be,n 0(sr0,rp) + export stub. If it is an export stub, than our return address is + really in -24[frameaddr]. */ - If it is an export stub, than our return address is really in - -24[frameaddr]. */ - - emit_cmp_insn (gen_rtx_MEM (SImode, ins), GEN_INT (0x4bc23fd1), NE, - NULL_RTX, SImode, 1); - emit_jump_insn (gen_bne (label)); - - emit_cmp_insn (gen_rtx_MEM (SImode, plus_constant (ins, 4)), - GEN_INT (0x004010a1), NE, NULL_RTX, SImode, 1); - emit_jump_insn (gen_bne (label)); - - emit_cmp_insn (gen_rtx_MEM (SImode, plus_constant (ins, 8)), - GEN_INT (0x00011820), NE, NULL_RTX, SImode, 1); - emit_jump_insn (gen_bne (label)); - - /* 0xe0400002 must be specified as -532676606 so that it won't be - rejected as an invalid immediate operand on 64-bit hosts. */ - emit_cmp_insn (gen_rtx_MEM (SImode, plus_constant (ins, 12)), - GEN_INT (-532676606), NE, NULL_RTX, SImode, 1); - - /* If there is no export stub then just use the value saved from - the return pointer register. */ - - emit_jump_insn (gen_bne (label)); + for (i = 0; i < 3; i++) + { + rtx op0 = gen_rtx_MEM (SImode, plus_constant (ins, i * 4)); + rtx op1 = GEN_INT (insns[i]); + emit_cmp_and_jump_insns (op0, op1, NE, NULL, SImode, 0, label); + } /* Here we know that our return address points to an export stub. We don't want to return the address of the export stub, @@ -4446,30 +4435,32 @@ return_addr_rtx (int count, rtx frameaddr) -24)))); emit_label (label); + return saved_rp; } void -emit_bcond_fp (enum rtx_code code, rtx operand0) +emit_bcond_fp (rtx operands[]) { + enum rtx_code code = GET_CODE (operands[0]); + rtx operand0 = operands[1]; + rtx operand1 = operands[2]; + rtx label = operands[3]; + + emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (CCFPmode, 0), + gen_rtx_fmt_ee (code, CCFPmode, operand0, operand1))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, - gen_rtx_fmt_ee (code, + gen_rtx_fmt_ee (NE, VOIDmode, gen_rtx_REG (CCFPmode, 0), const0_rtx), - gen_rtx_LABEL_REF (VOIDmode, operand0), + gen_rtx_LABEL_REF (VOIDmode, label), pc_rtx))); } -rtx -gen_cmp_fp (enum rtx_code code, rtx operand0, rtx operand1) -{ - return gen_rtx_SET (VOIDmode, gen_rtx_REG (CCFPmode, 0), - gen_rtx_fmt_ee (code, CCFPmode, operand0, operand1)); -} - /* Adjust the cost of a scheduling dependency. Return the new cost of a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 303bdd341df..576916f5b7b 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -21,14 +21,6 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ -enum cmp_type /* comparison type */ -{ - CMP_SI, /* compare integers */ - CMP_SF, /* compare single precision floats */ - CMP_DF, /* compare double precision floats */ - CMP_MAX /* max comparison type */ -}; - /* For long call handling. */ extern unsigned long total_code_bytes; @@ -755,10 +747,6 @@ struct hppa_args {int words, nargs_prototype, incoming, indirect; }; ? PARM_BOUNDARY : MAX_PARM_BOUNDARY) -extern GTY(()) rtx hppa_compare_op0; -extern GTY(()) rtx hppa_compare_op1; -extern enum cmp_type hppa_branch_type; - /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than as assembly via FUNCTION_PROFILER. Just output a local label. We can't use the function label because the GAS SOM target can't diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index b845182d592..1f5a69b9352 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -653,64 +653,6 @@ ;; Compare instructions. ;; This controls RTL generation and register allocation. -;; We generate RTL for comparisons and branches by having the cmpxx -;; patterns store away the operands. Then, the scc and bcc patterns -;; emit RTL for both the compare and the branch. -;; - -(define_expand "cmpdi" - [(set (reg:CC 0) - (compare:CC (match_operand:DI 0 "reg_or_0_operand" "") - (match_operand:DI 1 "register_operand" "")))] - "TARGET_64BIT" - - " -{ - hppa_compare_op0 = operands[0]; - hppa_compare_op1 = operands[1]; - hppa_branch_type = CMP_SI; - DONE; -}") - -(define_expand "cmpsi" - [(set (reg:CC 0) - (compare:CC (match_operand:SI 0 "reg_or_0_operand" "") - (match_operand:SI 1 "arith5_operand" "")))] - "" - " -{ - hppa_compare_op0 = operands[0]; - hppa_compare_op1 = operands[1]; - hppa_branch_type = CMP_SI; - DONE; -}") - -(define_expand "cmpsf" - [(set (reg:CCFP 0) - (compare:CCFP (match_operand:SF 0 "reg_or_0_operand" "") - (match_operand:SF 1 "reg_or_0_operand" "")))] - "! TARGET_SOFT_FLOAT" - " -{ - hppa_compare_op0 = operands[0]; - hppa_compare_op1 = operands[1]; - hppa_branch_type = CMP_SF; - DONE; -}") - -(define_expand "cmpdf" - [(set (reg:CCFP 0) - (compare:CCFP (match_operand:DF 0 "reg_or_0_operand" "") - (match_operand:DF 1 "reg_or_0_operand" "")))] - "! TARGET_SOFT_FLOAT" - " -{ - hppa_compare_op0 = operands[0]; - hppa_compare_op1 = operands[1]; - hppa_branch_type = CMP_DF; - DONE; -}") - (define_insn "" [(set (reg:CCFP 0) (match_operator:CCFP 2 "comparison_operator" @@ -767,143 +709,13 @@ ;; scc insns. -(define_expand "seq" - [(set (match_operand:SI 0 "register_operand" "") - (eq:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - /* fp scc patterns rarely match, and are not a win on the PA. */ - if (hppa_branch_type != CMP_SI) - FAIL; - /* set up operands from compare. */ - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; - /* fall through and generate default code */ -}") - -(define_expand "sne" - [(set (match_operand:SI 0 "register_operand" "") - (ne:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - /* fp scc patterns rarely match, and are not a win on the PA. */ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "slt" - [(set (match_operand:SI 0 "register_operand" "") - (lt:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - /* fp scc patterns rarely match, and are not a win on the PA. */ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "sgt" - [(set (match_operand:SI 0 "register_operand" "") - (gt:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - /* fp scc patterns rarely match, and are not a win on the PA. */ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "sle" - [(set (match_operand:SI 0 "register_operand" "") - (le:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - /* fp scc patterns rarely match, and are not a win on the PA. */ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "sge" - [(set (match_operand:SI 0 "register_operand" "") - (ge:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - /* fp scc patterns rarely match, and are not a win on the PA. */ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "sltu" - [(set (match_operand:SI 0 "register_operand" "") - (ltu:SI (match_dup 1) - (match_dup 2)))] +(define_expand "cstoresi4" + [(set (match_operand:SI 0 "register_operand") + (match_operator:SI 1 "ordered_comparison_operator" + [(match_operand:SI 2 "reg_or_0_operand" "") + (match_operand:SI 3 "arith5_operand" "")]))] "!TARGET_64BIT" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "sgtu" - [(set (match_operand:SI 0 "register_operand" "") - (gtu:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "sleu" - [(set (match_operand:SI 0 "register_operand" "") - (leu:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "sgeu" - [(set (match_operand:SI 0 "register_operand" "") - (geu:SI (match_dup 1) - (match_dup 2)))] - "!TARGET_64BIT" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") + "") ;; Instruction canonicalization puts immediate operands second, which ;; is the reverse of what we want. @@ -1346,28 +1158,15 @@ (define_expand "movsicc" [(set (match_operand:SI 0 "register_operand" "") (if_then_else:SI - (match_operator 1 "comparison_operator" - [(match_dup 4) - (match_dup 5)]) + (match_operand 1 "comparison_operator" "") (match_operand:SI 2 "reg_or_cint_move_operand" "") (match_operand:SI 3 "reg_or_cint_move_operand" "")))] "" " { - enum rtx_code code = GET_CODE (operands[1]); - - if (hppa_branch_type != CMP_SI) + if (GET_MODE (XEXP (operands[1], 0)) != SImode + || GET_MODE (XEXP (operands[1], 0)) != GET_MODE (XEXP (operands[1], 1))) FAIL; - - if (GET_MODE (hppa_compare_op0) != GET_MODE (hppa_compare_op1) - || GET_MODE (hppa_compare_op0) != GET_MODE (operands[0])) - FAIL; - - /* operands[1] is currently the result of compare_from_rtx. We want to - emit a compare of the original operands. */ - operands[1] = gen_rtx_fmt_ee (code, SImode, hppa_compare_op0, hppa_compare_op1); - operands[4] = hppa_compare_op0; - operands[5] = hppa_compare_op1; }") ;; We used to accept any register for op1. @@ -1419,28 +1218,15 @@ (define_expand "movdicc" [(set (match_operand:DI 0 "register_operand" "") (if_then_else:DI - (match_operator 1 "comparison_operator" - [(match_dup 4) - (match_dup 5)]) + (match_operand 1 "comparison_operator" "") (match_operand:DI 2 "reg_or_cint_move_operand" "") (match_operand:DI 3 "reg_or_cint_move_operand" "")))] "TARGET_64BIT" " { - enum rtx_code code = GET_CODE (operands[1]); - - if (hppa_branch_type != CMP_SI) + if (GET_MODE (XEXP (operands[1], 0)) != DImode + || GET_MODE (XEXP (operands[1], 0)) != GET_MODE (XEXP (operands[1], 1))) FAIL; - - if (GET_MODE (hppa_compare_op0) != GET_MODE (hppa_compare_op1) - || GET_MODE (hppa_compare_op0) != GET_MODE (operands[0])) - FAIL; - - /* operands[1] is currently the result of compare_from_rtx. We want to - emit a compare of the original operands. */ - operands[1] = gen_rtx_fmt_ee (code, DImode, hppa_compare_op0, hppa_compare_op1); - operands[4] = hppa_compare_op0; - operands[5] = hppa_compare_op1; }") ; We need the first constraint alternative in order to avoid @@ -1486,289 +1272,52 @@ ;; Conditional Branches -(define_expand "beq" - [(set (pc) - (if_then_else (eq (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - { - emit_insn (gen_cmp_fp (EQ, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; - } - /* set up operands from compare. */ - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; - /* fall through and generate default code */ -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - { - emit_insn (gen_cmp_fp (NE, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; - } - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "bgt" +(define_expand "cbranchdi4" [(set (pc) - (if_then_else (gt (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:DI 1 "reg_or_0_operand" "") + (match_operand:DI 2 "register_operand" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - { - emit_insn (gen_cmp_fp (GT, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; - } - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - { - emit_insn (gen_cmp_fp (LT, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; - } - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - { - emit_insn (gen_cmp_fp (GE, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; - } - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "ble" - [(set (pc) - (if_then_else (le (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - { - emit_insn (gen_cmp_fp (LE, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; - } - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type != CMP_SI) - FAIL; - operands[1] = hppa_compare_op0; - operands[2] = hppa_compare_op1; -}") - -(define_expand "bltgt" - [(set (pc) - (if_then_else (ltgt (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (LTGT, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; -}") - -(define_expand "bunle" - [(set (pc) - (if_then_else (unle (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (UNLE, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; -}") - -(define_expand "bunlt" - [(set (pc) - (if_then_else (unlt (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (UNLT, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; -}") - -(define_expand "bunge" - [(set (pc) - (if_then_else (unge (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (UNGE, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; -}") + "TARGET_64BIT" + "") -(define_expand "bungt" +(define_expand "cbranchsi4" [(set (pc) - (if_then_else (ungt (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(match_operand:SI 1 "reg_or_0_operand" "") + (match_operand:SI 2 "arith5_operand" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] "" - " -{ - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (UNGT, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; -}") + "") -(define_expand "buneq" +(define_expand "cbranchsf4" [(set (pc) - (if_then_else (uneq (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:SF 1 "reg_or_0_operand" "") + (match_operand:SF 2 "reg_or_0_operand" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (UNEQ, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); + emit_bcond_fp (operands); DONE; }") -(define_expand "bunordered" - [(set (pc) - (if_then_else (unordered (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (UNORDERED, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); - DONE; -}") -(define_expand "bordered" +(define_expand "cbranchdf4" [(set (pc) - (if_then_else (ordered (match_dup 1) (match_dup 2)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:DF 1 "reg_or_0_operand" "") + (match_operand:DF 2 "reg_or_0_operand" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] "" " { - if (hppa_branch_type == CMP_SI) - FAIL; - emit_insn (gen_cmp_fp (ORDERED, hppa_compare_op0, hppa_compare_op1)); - emit_bcond_fp (NE, operands[0]); + emit_bcond_fp (operands); DONE; }") @@ -7527,8 +7076,10 @@ then be worthwhile to split the casesi patterns to improve scheduling. However, it's not clear that all this extra complexity is worth the effort. */ - emit_insn (gen_cmpsi (operands[0], operands[2])); - emit_jump_insn (gen_bgtu (operands[4])); + { + rtx test = gen_rtx_GTU (VOIDmode, operands[0], operands[2]); + emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2], operands[4])); + } if (TARGET_BIG_SWITCH) { diff --git a/gcc/config/pdp11/pdp11-protos.h b/gcc/config/pdp11/pdp11-protos.h index f493fbc8ab1..1ed272e5081 100644 --- a/gcc/config/pdp11/pdp11-protos.h +++ b/gcc/config/pdp11/pdp11-protos.h @@ -33,9 +33,9 @@ extern void output_addr_const_pdp11 (FILE *, rtx); extern const char *output_move_double (rtx *); extern const char *output_move_quad (rtx *); extern const char *output_block_move (rtx *); +extern const char *output_jump (enum rtx_code, int, int); extern void print_operand_address (FILE *, rtx); extern int register_move_cost (enum reg_class, enum reg_class); #endif /* RTX_CODE */ extern void output_ascii (FILE *, const char *, int); -extern const char *output_jump (const char *, const char *, int); diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index 6e8941d75e9..8f2d78fe555 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -1170,11 +1170,27 @@ pdp11_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, int *total, } const char * -output_jump (const char *pos, const char *neg, int length) +output_jump (enum rtx_code code, int inv, int length) { static int x = 0; static char buf[1000]; + const char *pos, *neg; + + switch (code) + { + case EQ: pos = "beq", neg = "bne"; break; + case NE: pos = "bne", neg = "beq"; break; + case GT: pos = "bgt", neg = "ble"; break; + case GTU: pos = "bhi", neg = "blos"; break; + case LT: pos = "blt", neg = "bge"; break; + case LTU: pos = "blo", neg = "bhis"; break; + case GE: pos = "bge", neg = "blt"; break; + case GEU: pos = "bhis", neg = "blo"; break; + case LE: pos = "ble", neg = "bgt"; break; + case LEU: pos = "blos", neg = "bhi"; break; + default: gcc_unreachable (); + } #if 0 /* currently we don't need this, because the tstdf and cmpdf @@ -1190,14 +1206,13 @@ output_jump (const char *pos, const char *neg, int length) { case 1: - strcpy(buf, pos); - strcat(buf, " %l0"); + sprintf(buf, "%s %%l1", inv ? neg : pos); return buf; case 3: - sprintf(buf, "%s JMP_%d\n\tjmp %%l0\nJMP_%d:", neg, x, x); + sprintf(buf, "%s JMP_%d\n\tjmp %%l1\nJMP_%d:", inv ? pos : neg, x, x); x++; diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index 9dbb41eb7c1..437e2b81e2e 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -1031,6 +1031,9 @@ JMP FUNCTION 0x0058 0x0000 <- FUNCTION #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \ { \ + flag_finite_math_only = 0; \ + flag_trapping_math = 0; \ + flag_signaling_nans = 0; \ if (LEVEL >= 3) \ { \ flag_omit_frame_pointer = 1; \ diff --git a/gcc/config/pdp11/pdp11.md b/gcc/config/pdp11/pdp11.md index d5d4396b1c6..64d57e056b3 100644 --- a/gcc/config/pdp11/pdp11.md +++ b/gcc/config/pdp11/pdp11.md @@ -19,6 +19,11 @@ ;; along with GCC; see the file COPYING3. If not see ;; <http://www.gnu.org/licenses/>. +;; Match CONST_DOUBLE zero for tstd/tstf. +(define_predicate "register_or_const0_operand" + (ior (match_operand 0 "register_operand") + (match_test "op == CONST0_RTX (GET_MODE (op))"))) + ;; HI is 16 bit ;; QI is 8 bit @@ -81,141 +86,50 @@ ;(define_function_unit "fpu" 1 1 (eq_attr "type" "fp") 0 0) ;; compare -(define_insn "cmpdf" +(define_insn "*cmpdf" [(set (cc0) - (compare (match_operand:DF 0 "general_operand" "fR,Q,F") - (match_operand:DF 1 "register_operand" "a,a,a")))] + (compare (match_operand:DF 0 "general_operand" "fR,fR,Q,Q,F") + (match_operand:DF 1 "register_or_const0_operand" "G,a,G,a,a")))] "TARGET_FPU" "* { cc_status.flags = CC_IN_FPU; - return \"{cmpd|cmpf} %0, %1\;cfcc\"; -}" - [(set_attr "length" "2,3,6")]) - -;; a bit of brain damage, maybe inline later - -;; problem is - gcc seems to NEED SImode because -;; of the cmp weirdness - maybe change gcc to handle this? - -(define_expand "cmpsi" - [(set (reg:SI 0) - (match_operand:SI 0 "general_operand" "g")) - (set (reg:SI 2) - (match_operand:SI 1 "general_operand" "g")) - (parallel [(set (cc0) - (compare (reg:SI 0) - (reg:SI 2))) - (clobber (reg:SI 0))])] - "0" ;; disable for test - "") - -;; check for next insn for branch code - does this still -;; work in gcc 2.* ? - -(define_insn "" - [(set (cc0) - (compare (reg:SI 0) - (reg:SI 2))) - (clobber (reg:SI 0))] - "" - "* -{ - rtx br_insn = NEXT_INSN (insn); - RTX_CODE br_code; - - gcc_assert (GET_CODE (br_insn) == JUMP_INSN); - br_code = GET_CODE (XEXP (XEXP (PATTERN (br_insn), 1), 0)); - - switch(br_code) - { - case GEU: - case LTU: - case GTU: - case LEU: - - return \"jsr pc, ___ucmpsi\;cmp $1,r0\"; - - case GE: - case LT: - case GT: - case LE: - case EQ: - case NE: - - return \"jsr pc, ___cmpsi\;tst r0\"; - - default: - - gcc_unreachable (); - } + if (which_alternative == 0 || which_alternative == 2) + return \"{tstd|tstf} %0, %1\;cfcc\"; + else + return \"{cmpd|cmpf} %0, %1\;cfcc\"; }" - [(set_attr "length" "4")]) + [(set_attr "length" "2,2,3,3,6")]) - -(define_insn "cmphi" +(define_insn "*cmphi" [(set (cc0) - (compare (match_operand:HI 0 "general_operand" "rR,rR,Qi,Qi") - (match_operand:HI 1 "general_operand" "rR,Qi,rR,Qi")))] + (compare (match_operand:HI 0 "general_operand" "rR,rR,rR,Q,Qi,Qi") + (match_operand:HI 1 "general_operand" "N,rR,Qi,N,rR,Qi")))] "" - "cmp %0,%1" - [(set_attr "length" "1,2,2,3")]) - -(define_insn "cmpqi" + "@ + tst %0 + cmp %0,%1 + cmp %0,%1 + tst %0 + cmp %0,%1 + cmp %0,%1" + [(set_attr "length" "1,1,2,2,2,3")]) + +(define_insn "*cmpqi" [(set (cc0) - (compare (match_operand:QI 0 "general_operand" "rR,rR,Qi,Qi") - (match_operand:QI 1 "general_operand" "rR,Qi,rR,Qi")))] + (compare (match_operand:QI 0 "general_operand" "rR,rR,rR,Q,Qi,Qi") + (match_operand:QI 1 "general_operand" "N,rR,Qi,N,rR,Qi")))] "" - "cmpb %0,%1" - [(set_attr "length" "1,2,2,3")]) + "@ + tstb %0 + cmpb %0,%1 + cmpb %0,%1 + tstb %0 + cmpb %0,%1 + cmpb %0,%1" + [(set_attr "length" "1,1,2,2,2,3")]) -;; We have to have this because cse can optimize the previous pattern -;; into this one. - -(define_insn "tstdf" - [(set (cc0) - (match_operand:DF 0 "general_operand" "fR,Q"))] - "TARGET_FPU" - "* -{ - cc_status.flags = CC_IN_FPU; - return \"{tstd|tstf} %0\;cfcc\"; -}" - [(set_attr "length" "2,3")]) - - -(define_expand "tstsi" - [(set (reg:SI 0) - (match_operand:SI 0 "general_operand" "g")) - (parallel [(set (cc0) - (reg:SI 0)) - (clobber (reg:SI 0))])] - "0" ;; disable for test - "") - -(define_insn "" - [(set (cc0) - (reg:SI 0)) - (clobber (reg:SI 0))] - "" - "jsr pc, ___tstsi\;tst r0" - [(set_attr "length" "3")]) - - -(define_insn "tsthi" - [(set (cc0) - (match_operand:HI 0 "general_operand" "rR,Q"))] - "" - "tst %0" - [(set_attr "length" "1,2")]) - -(define_insn "tstqi" - [(set (cc0) - (match_operand:QI 0 "general_operand" "rR,Q"))] - "" - "tstb %0" - [(set_attr "length" "1,2")]) - ;; sob instruction - we need an assembler which can make this instruction ;; valid under _all_ circumstances! @@ -264,353 +178,81 @@ ;; These control RTL generation for conditional jump insns ;; and match them for register allocation. -;; problem with too short jump distance! we need an assembler which can -;; make this valid for all jump distances! -;; e.g. gas! - -;; these must be changed to check for CC_IN_FCCR if float is to be -;; enabled - -(define_insn "beq" - [(set (pc) - (if_then_else (eq (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "* return output_jump(\"beq\", \"bne\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - - -(define_insn "bne" - [(set (pc) - (if_then_else (ne (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "* return output_jump(\"bne\", \"beq\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "bgt" - [(set (pc) - (if_then_else (gt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "* return output_jump(\"bgt\", \"ble\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "bgtu" - [(set (pc) - (if_then_else (gtu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchdf4" + [(set (cc0) + (compare (match_operand:DF 1 "general_operand") + (match_operand:DF 2 "general_operand"))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" - "* return output_jump(\"bhi\", \"blos\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) + "") -(define_insn "blt" - [(set (pc) - (if_then_else (lt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchhi4" + [(set (cc0) + (compare (match_operand:HI 1 "general_operand") + (match_operand:HI 2 "general_operand"))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" - "* return output_jump(\"blt\", \"bge\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - + "") -(define_insn "bltu" - [(set (pc) - (if_then_else (ltu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) +(define_expand "cbranchqi4" + [(set (cc0) + (compare (match_operand:QI 1 "general_operand") + (match_operand:QI 2 "general_operand"))) + (set (pc) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 3 "" "")) (pc)))] "" - "* return output_jump(\"blo\", \"bhis\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) + "") -(define_insn "bge" - [(set (pc) - (if_then_else (ge (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "* return output_jump(\"bge\", \"blt\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) +;; problem with too short jump distance! we need an assembler which can +;; make this valid for all jump distances! +;; e.g. gas! -(define_insn "bgeu" - [(set (pc) - (if_then_else (geu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "* return output_jump(\"bhis\", \"blo\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) +;; these must be changed to check for CC_IN_FCCR if float is to be +;; enabled -(define_insn "ble" +(define_insn "*branch" [(set (pc) - (if_then_else (le (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) + (label_ref (match_operand 1 "" "")) (pc)))] "" - "* return output_jump(\"ble\", \"bgt\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) + "* return output_jump(GET_CODE (operands[0]), 0, get_attr_length(insn));" + [(set (attr "length") (if_then_else (ior (le (minus (match_dup 1) (pc)) (const_int -128)) - (ge (minus (match_dup 0) + (ge (minus (match_dup 1) (pc)) (const_int 128))) (const_int 3) (const_int 1)))]) -(define_insn "bleu" - [(set (pc) - (if_then_else (leu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "* return output_jump(\"blos\", \"bhi\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - ;; These match inverted jump insns for register allocation. -(define_insn "" +(define_insn "*branch_inverted" [(set (pc) - (if_then_else (eq (cc0) - (const_int 0)) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) (const_int 0)]) (pc) - (label_ref (match_operand 0 "" ""))))] + (label_ref (match_operand 1 "" ""))))] "" - "* return output_jump(\"bne\", \"beq\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) + "* return output_jump(GET_CODE (operands[0]), 1, get_attr_length(insn));" + [(set (attr "length") (if_then_else (ior (le (minus (match_dup 1) (pc)) (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (ne (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"beq\", \"bne\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (gt (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"ble\", \"bgt\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (gtu (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"blos\", \"bhi\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (lt (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"bge\", \"blt\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (ltu (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"bhis\", \"blo\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (ge (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"blt\", \"bge\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (geu (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"blo\", \"bhis\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (le (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"bgt\", \"ble\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) - (pc)) - (const_int 128))) - (const_int 3) - (const_int 1)))]) - -(define_insn "" - [(set (pc) - (if_then_else (leu (cc0) - (const_int 0)) - (pc) - (label_ref (match_operand 0 "" ""))))] - "" - "* return output_jump(\"bhi\", \"blos\", get_attr_length(insn));" - [(set (attr "length") (if_then_else (ior (le (minus (match_dup 0) - (pc)) - (const_int -128)) - (ge (minus (match_dup 0) + (ge (minus (match_dup 1) (pc)) (const_int 128))) (const_int 3) diff --git a/gcc/config/picochip/picochip-protos.h b/gcc/config/picochip/picochip-protos.h index 9b2c824ee26..7a2a07b98fa 100644 --- a/gcc/config/picochip/picochip-protos.h +++ b/gcc/config/picochip/picochip-protos.h @@ -26,7 +26,6 @@ extern void picochip_function_prologue (FILE *, HOST_WIDE_INT); extern void picochip_function_epilogue (FILE *, HOST_WIDE_INT); extern enum reg_class picochip_reg_class_from_letter (unsigned); -extern int picochip_legitimate_address_p (int, struct rtx_def *, unsigned); extern int picochip_const_ok_for_letter_p (unsigned HOST_WIDE_INT value, unsigned c); #ifdef RTX_CODE /* inside TREE_CODE */ diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c index e9b61563153..56c58a83056 100644 --- a/gcc/config/picochip/picochip.c +++ b/gcc/config/picochip/picochip.c @@ -95,6 +95,7 @@ rtx picochip_expand_builtin (tree, rtx, rtx, enum machine_mode, int); bool picochip_rtx_costs (rtx x, int code, int outer_code, int* total); bool picochip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED); +bool picochip_legitimate_address_p (enum machine_mode, rtx, bool); rtx picochip_struct_value_rtx(tree fntype ATTRIBUTE_UNUSED, int incoming ATTRIBUTE_UNUSED); rtx picochip_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, @@ -275,6 +276,9 @@ static char picochip_get_vliw_alu_id (void); #define TARGET_LIBGCC_CMP_RETURN_MODE picochip_libgcc_cmp_return_mode */ +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P picochip_legitimate_address_p + /* Loading and storing QImode values to and from memory usually requires a scratch register. */ #undef TARGET_SECONDARY_RELOAD @@ -1249,8 +1253,8 @@ picochip_const_ok_for_base (enum machine_mode mode, int regno, int offset) /* Determine whether a given rtx is a legitimate address for machine_mode MODE. STRICT is non-zero if we're being strict - any pseudo that is not a hard register must be a memory reference. */ -int -picochip_legitimate_address_p (int mode, rtx x, unsigned strict) +bool +picochip_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { int valid = 0; diff --git a/gcc/config/picochip/picochip.h b/gcc/config/picochip/picochip.h index a3263d02e02..04400016da2 100644 --- a/gcc/config/picochip/picochip.h +++ b/gcc/config/picochip/picochip.h @@ -492,18 +492,6 @@ extern const enum reg_class picochip_regno_reg_class[FIRST_PSEUDO_REGISTER]; #define MAX_REGS_PER_ADDRESS 1 -#ifdef REG_OK_STRICT - -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ - if (picochip_legitimate_address_p (MODE, X, 1)) goto LABEL; - -#else /* REG_OK_STRICT */ - -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ - if (picochip_legitimate_address_p (MODE, X, 0)) goto LABEL; - -#endif /* !REG_OK_STRICT */ - /* Legitimize reload address tries machine dependent means of reloading addresses. There seems to be a strange error in gcc, which necessitates this macro. Consider: diff --git a/gcc/config/picochip/picochip.md b/gcc/config/picochip/picochip.md index 657629c96fa..02f0f14850d 100644 --- a/gcc/config/picochip/picochip.md +++ b/gcc/config/picochip/picochip.md @@ -551,7 +551,7 @@ (define_insn_and_split "cbranchhi4" [(set (pc) (if_then_else - (match_operator:CC 0 "comparison_operator" + (match_operator:CC 0 "ordered_comparison_operator" [(match_operand:HI 1 "register_operand" "r") (match_operand:HI 2 "picochip_comparison_operand" "ri")]) (label_ref (match_operand 3 "" "")) @@ -2524,117 +2524,6 @@ (set_attr "type" "picoAlu,picoAlu") (set_attr "longConstant" "false,true")]) -;; cmphi - This needs to be defined, to ensure that the conditional -;; move works properly (because the if-cvt code uses this pattern to -;; build the conditional move, even though normally we use cbranch to -;; directly generate the instructions). - -(define_expand "cmphi" - [(match_operand:HI 0 "general_operand" "g") - (match_operand:HI 1 "general_operand" "g")] - "" - "DONE;") - -;;============================================================================ -;; Branch patterns - needed for conditional moves. This is because -;; they result in the bcc_gen_fctn array being initialised with the -;; code to define_expand the following, and this in turn means that -;; when noce_emit_cmove is called, the correct pattern can be -;; generated, based upon the assumed presence of the following. The -;; following are never actually used, because the earlier cbranch -;; patterns take precendence. -;;============================================================================ - -(define_expand "bne" - [(set (pc) - (if_then_else - (ne (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "beq" - [(set (pc) - (if_then_else - (eq (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "blt" - [(set (pc) - (if_then_else - (lt (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "bge" - [(set (pc) - (if_then_else - (ge (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "bgeu" - [(set (pc) - (if_then_else - (geu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "bltu" - [(set (pc) - (if_then_else - (ltu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "ble" - [(set (pc) - (if_then_else - (le (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "bgt" - [(set (pc) - (if_then_else - (gt (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "bleu" - [(set (pc) - (if_then_else - (leu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - -(define_expand "bgtu" - [(set (pc) - (if_then_else - (gtu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "gcc_unreachable();") - ;;============================================================================ ;; Scheduling, including delay slot scheduling. ;;============================================================================ diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index af80ef46b6f..dbf78734b17 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -830,6 +830,11 @@ GET_MODE (XEXP (op, 0))), 1")))) +(define_predicate "rs6000_cbranch_operator" + (if_then_else (match_test "TARGET_HARD_FLOAT && !TARGET_FPRS") + (match_operand 0 "ordered_comparison_operator") + (match_operand 0 "comparison_operator"))) + ;; Return 1 if OP is a comparison operation that is valid for an SCC insn -- ;; it must be a positive comparison. (define_predicate "scc_comparison_operator" @@ -842,11 +847,6 @@ (and (match_operand 0 "branch_comparison_operator") (match_code "eq,lt,gt,ltu,gtu,unordered"))) -;; Return 1 is OP is a comparison operation that is valid for a trap insn. -(define_predicate "trap_comparison_operator" - (and (match_operand 0 "comparison_operator") - (match_code "eq,ne,le,lt,ge,gt,leu,ltu,geu,gtu"))) - ;; Return 1 if OP is a load multiple operation, known to be a PARALLEL. (define_predicate "load_multiple_operation" (match_code "parallel") diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 4b8f5220a51..c080e60c845 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -81,8 +81,8 @@ extern void print_operand_address (FILE *, rtx); extern bool rs6000_output_addr_const_extra (FILE *, rtx); extern enum rtx_code rs6000_reverse_condition (enum machine_mode, enum rtx_code); -extern void rs6000_emit_sCOND (enum rtx_code, rtx); -extern void rs6000_emit_cbranch (enum rtx_code, rtx); +extern void rs6000_emit_sCOND (enum machine_mode, rtx[]); +extern void rs6000_emit_cbranch (enum machine_mode, rtx[]); extern char * output_cbranch (rtx, const char *, int, rtx); extern char * output_e500_flip_gt_bit (rtx, rtx); extern rtx rs6000_emit_set_const (rtx, enum machine_mode, rtx, int); @@ -109,7 +109,6 @@ extern void rs6000_emit_move (rtx, rtx, enum machine_mode); extern rtx rs6000_secondary_memory_needed_rtx (enum machine_mode); extern rtx rs6000_legitimize_reload_address (rtx, enum machine_mode, int, int, int, int *); -extern int rs6000_legitimate_address (enum machine_mode, rtx, int); extern bool rs6000_legitimate_offset_address_p (enum machine_mode, rtx, int); extern bool rs6000_mode_dependent_address (rtx); extern rtx rs6000_find_base_term (rtx); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 8e24769816d..a308731b291 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -190,11 +190,6 @@ int rs6000_darwin64_abi; /* Set to nonzero once AIX common-mode calls have been defined. */ static GTY(()) int common_mode_defined; -/* Save information from a "cmpxx" operation until the branch or scc is - emitted. */ -rtx rs6000_compare_op0, rs6000_compare_op1; -int rs6000_compare_fp_p; - /* Label number of label created for -mrelocatable, to call to so we can get the address of the GOT section */ int rs6000_pic_labelno; @@ -752,7 +747,8 @@ struct processor_costs power6_cost = { static bool rs6000_function_ok_for_sibcall (tree, tree); static const char *rs6000_invalid_within_doloop (const_rtx); -static rtx rs6000_generate_compare (enum rtx_code); +static bool rs6000_legitimate_address_p (enum machine_mode, rtx, bool); +static rtx rs6000_generate_compare (rtx, enum machine_mode); static void rs6000_emit_stack_tie (void); static void rs6000_frame_related (rtx, rtx, HOST_WIDE_INT, rtx, rtx); static bool spe_func_has_64bit_regs_p (void); @@ -1296,6 +1292,9 @@ static const char alt_reg_names[][8] = #undef TARGET_INSTANTIATE_DECLS #define TARGET_INSTANTIATE_DECLS rs6000_instantiate_decls +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P rs6000_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; @@ -3561,7 +3560,7 @@ gpr_or_gpr_p (rtx op0, rtx op1) } -/* Subroutines of rs6000_legitimize_address and rs6000_legitimate_address. */ +/* Subroutines of rs6000_legitimize_address and rs6000_legitimate_address_p. */ static bool constant_pool_expr_p (rtx op) @@ -4213,13 +4212,6 @@ rs6000_tls_symbol_ref_1 (rtx *x, void *data ATTRIBUTE_UNUSED) return RS6000_SYMBOL_REF_TLS_P (*x); } -/* The convention appears to be to define this wherever it is used. - With legitimize_reload_address now defined here, REG_MODE_OK_FOR_BASE_P - is now used here. */ -#ifndef REG_MODE_OK_FOR_BASE_P -#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) -#endif - /* Our implementation of LEGITIMIZE_RELOAD_ADDRESS. Returns a value to replace the input X, or the original X if no replacement is called for. The output parameter *WIN is 1 if the calling macro should goto WIN, @@ -4276,7 +4268,7 @@ rs6000_legitimize_reload_address (rtx x, enum machine_mode mode, if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == REG && REGNO (XEXP (x, 0)) < 32 - && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode) + && INT_REG_OK_FOR_BASE_P (XEXP (x, 0), 1) && GET_CODE (XEXP (x, 1)) == CONST_INT && (INTVAL (XEXP (x, 1)) & 3) != 0 && !ALTIVEC_VECTOR_MODE (mode) @@ -4294,7 +4286,7 @@ rs6000_legitimize_reload_address (rtx x, enum machine_mode mode, if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == REG && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER - && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode) + && INT_REG_OK_FOR_BASE_P (XEXP (x, 0), 1) && GET_CODE (XEXP (x, 1)) == CONST_INT && !SPE_VECTOR_MODE (mode) && !(TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode @@ -4415,8 +4407,8 @@ rs6000_legitimize_reload_address (rtx x, enum machine_mode mode, 32-bit DImode, TImode, TFmode, TDmode), indexed addressing cannot be used because adjacent memory cells are accessed by adding word-sized offsets during assembly output. */ -int -rs6000_legitimate_address (enum machine_mode mode, rtx x, int reg_ok_strict) +bool +rs6000_legitimate_address_p (enum machine_mode mode, rtx x, bool reg_ok_strict) { /* If this is an unaligned stvx/ldvx type address, discard the outer AND. */ if (TARGET_ALTIVEC @@ -12788,21 +12780,24 @@ rs6000_reverse_condition (enum machine_mode mode, enum rtx_code code) represents the result of the compare. */ static rtx -rs6000_generate_compare (enum rtx_code code) +rs6000_generate_compare (rtx cmp, enum machine_mode mode) { enum machine_mode comp_mode; rtx compare_result; + enum rtx_code code = GET_CODE (cmp); + rtx op0 = XEXP (cmp, 0); + rtx op1 = XEXP (cmp, 1); - if (rs6000_compare_fp_p) + if (FLOAT_MODE_P (mode)) comp_mode = CCFPmode; else if (code == GTU || code == LTU || code == GEU || code == LEU) comp_mode = CCUNSmode; else if ((code == EQ || code == NE) - && GET_CODE (rs6000_compare_op0) == SUBREG - && GET_CODE (rs6000_compare_op1) == SUBREG - && SUBREG_PROMOTED_UNSIGNED_P (rs6000_compare_op0) - && SUBREG_PROMOTED_UNSIGNED_P (rs6000_compare_op1)) + && GET_CODE (op0) == SUBREG + && GET_CODE (op1) == SUBREG + && SUBREG_PROMOTED_UNSIGNED_P (op0) + && SUBREG_PROMOTED_UNSIGNED_P (op1)) /* These are unsigned values, perhaps there will be a later ordering compare that can be shared with this one. Unfortunately we cannot detect the signedness of the operands @@ -12816,13 +12811,13 @@ rs6000_generate_compare (enum rtx_code code) /* E500 FP compare instructions on the GPRs. Yuck! */ if ((!TARGET_FPRS && TARGET_HARD_FLOAT) - && rs6000_compare_fp_p) + && FLOAT_MODE_P (mode)) { rtx cmp, or_result, compare_result2; - enum machine_mode op_mode = GET_MODE (rs6000_compare_op0); + enum machine_mode op_mode = GET_MODE (op0); if (op_mode == VOIDmode) - op_mode = GET_MODE (rs6000_compare_op1); + op_mode = GET_MODE (op1); /* The E500 FP compare instructions toggle the GT bit (CR bit 1) only. This explains the following mess. */ @@ -12834,26 +12829,20 @@ rs6000_generate_compare (enum rtx_code code) { case SFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstsfeq_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpsfeq_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstsfeq_gpr (compare_result, op0, op1) + : gen_cmpsfeq_gpr (compare_result, op0, op1); break; case DFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstdfeq_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpdfeq_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstdfeq_gpr (compare_result, op0, op1) + : gen_cmpdfeq_gpr (compare_result, op0, op1); break; case TFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tsttfeq_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmptfeq_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tsttfeq_gpr (compare_result, op0, op1) + : gen_cmptfeq_gpr (compare_result, op0, op1); break; default: @@ -12866,26 +12855,20 @@ rs6000_generate_compare (enum rtx_code code) { case SFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstsfgt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpsfgt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstsfgt_gpr (compare_result, op0, op1) + : gen_cmpsfgt_gpr (compare_result, op0, op1); break; case DFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstdfgt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpdfgt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstdfgt_gpr (compare_result, op0, op1) + : gen_cmpdfgt_gpr (compare_result, op0, op1); break; case TFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tsttfgt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmptfgt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tsttfgt_gpr (compare_result, op0, op1) + : gen_cmptfgt_gpr (compare_result, op0, op1); break; default: @@ -12898,26 +12881,20 @@ rs6000_generate_compare (enum rtx_code code) { case SFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstsflt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpsflt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstsflt_gpr (compare_result, op0, op1) + : gen_cmpsflt_gpr (compare_result, op0, op1); break; case DFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstdflt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpdflt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstdflt_gpr (compare_result, op0, op1) + : gen_cmpdflt_gpr (compare_result, op0, op1); break; case TFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tsttflt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmptflt_gpr (compare_result, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tsttflt_gpr (compare_result, op0, op1) + : gen_cmptflt_gpr (compare_result, op0, op1); break; default: @@ -12949,26 +12926,20 @@ rs6000_generate_compare (enum rtx_code code) { case SFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstsfeq_gpr (compare_result2, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpsfeq_gpr (compare_result2, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstsfeq_gpr (compare_result2, op0, op1) + : gen_cmpsfeq_gpr (compare_result2, op0, op1); break; case DFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tstdfeq_gpr (compare_result2, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmpdfeq_gpr (compare_result2, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tstdfeq_gpr (compare_result2, op0, op1) + : gen_cmpdfeq_gpr (compare_result2, op0, op1); break; case TFmode: cmp = (flag_finite_math_only && !flag_trapping_math) - ? gen_tsttfeq_gpr (compare_result2, rs6000_compare_op0, - rs6000_compare_op1) - : gen_cmptfeq_gpr (compare_result2, rs6000_compare_op0, - rs6000_compare_op1); + ? gen_tsttfeq_gpr (compare_result2, op0, op1) + : gen_cmptfeq_gpr (compare_result2, op0, op1); break; default: @@ -12998,16 +12969,14 @@ rs6000_generate_compare (enum rtx_code code) /* Generate XLC-compatible TFmode compare as PARALLEL with extra CLOBBERs to match cmptf_internal2 pattern. */ if (comp_mode == CCFPmode && TARGET_XL_COMPAT - && GET_MODE (rs6000_compare_op0) == TFmode + && GET_MODE (op0) == TFmode && !TARGET_IEEEQUAD && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128) emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (9, gen_rtx_SET (VOIDmode, compare_result, - gen_rtx_COMPARE (comp_mode, - rs6000_compare_op0, - rs6000_compare_op1)), + gen_rtx_COMPARE (comp_mode, op0, op1)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)), @@ -13016,29 +12985,25 @@ rs6000_generate_compare (enum rtx_code code) gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DFmode))))); - else if (GET_CODE (rs6000_compare_op1) == UNSPEC - && XINT (rs6000_compare_op1, 1) == UNSPEC_SP_TEST) + else if (GET_CODE (op1) == UNSPEC + && XINT (op1, 1) == UNSPEC_SP_TEST) { - rtx op1 = XVECEXP (rs6000_compare_op1, 0, 0); + rtx op1b = XVECEXP (op1, 0, 0); comp_mode = CCEQmode; compare_result = gen_reg_rtx (CCEQmode); if (TARGET_64BIT) - emit_insn (gen_stack_protect_testdi (compare_result, - rs6000_compare_op0, op1)); + emit_insn (gen_stack_protect_testdi (compare_result, op0, op1b)); else - emit_insn (gen_stack_protect_testsi (compare_result, - rs6000_compare_op0, op1)); + emit_insn (gen_stack_protect_testsi (compare_result, op0, op1b)); } else emit_insn (gen_rtx_SET (VOIDmode, compare_result, - gen_rtx_COMPARE (comp_mode, - rs6000_compare_op0, - rs6000_compare_op1))); + gen_rtx_COMPARE (comp_mode, op0, op1))); } /* Some kinds of FP comparisons need an OR operation; under flag_finite_math_only we don't bother. */ - if (rs6000_compare_fp_p + if (FLOAT_MODE_P (mode) && !flag_finite_math_only && !(TARGET_HARD_FLOAT && !TARGET_FPRS) && (code == LE || code == GE @@ -13081,16 +13046,17 @@ rs6000_generate_compare (enum rtx_code code) /* Emit the RTL for an sCOND pattern. */ void -rs6000_emit_sCOND (enum rtx_code code, rtx result) +rs6000_emit_sCOND (enum machine_mode mode, rtx operands[]) { rtx condition_rtx; enum machine_mode op_mode; enum rtx_code cond_code; + rtx result = operands[0]; - condition_rtx = rs6000_generate_compare (code); + condition_rtx = rs6000_generate_compare (operands[1], mode); cond_code = GET_CODE (condition_rtx); - if (rs6000_compare_fp_p + if (FLOAT_MODE_P (mode) && !TARGET_FPRS && TARGET_HARD_FLOAT) { rtx t; @@ -13125,11 +13091,11 @@ rs6000_emit_sCOND (enum rtx_code code, rtx result) condition_rtx = gen_rtx_EQ (VOIDmode, not_result, const0_rtx); } - op_mode = GET_MODE (rs6000_compare_op0); + op_mode = GET_MODE (XEXP (operands[1], 0)); if (op_mode == VOIDmode) - op_mode = GET_MODE (rs6000_compare_op1); + op_mode = GET_MODE (XEXP (operands[1], 1)); - if (TARGET_POWERPC64 && (op_mode == DImode || rs6000_compare_fp_p)) + if (TARGET_POWERPC64 && (op_mode == DImode || FLOAT_MODE_P (mode))) { PUT_MODE (condition_rtx, DImode); convert_move (result, condition_rtx, 0); @@ -13144,12 +13110,12 @@ rs6000_emit_sCOND (enum rtx_code code, rtx result) /* Emit a branch of kind CODE to location LOC. */ void -rs6000_emit_cbranch (enum rtx_code code, rtx loc) +rs6000_emit_cbranch (enum machine_mode mode, rtx operands[]) { rtx condition_rtx, loc_ref; - condition_rtx = rs6000_generate_compare (code); - loc_ref = gen_rtx_LABEL_REF (VOIDmode, loc); + condition_rtx = rs6000_generate_compare (operands[0], mode); + loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands[3]); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, condition_rtx, loc_ref, pc_rtx))); @@ -13595,8 +13561,8 @@ int rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) { enum rtx_code code = GET_CODE (op); - rtx op0 = rs6000_compare_op0; - rtx op1 = rs6000_compare_op1; + rtx op0 = XEXP (op, 0); + rtx op1 = XEXP (op, 1); REAL_VALUE_TYPE c1; enum machine_mode compare_mode = GET_MODE (op0); enum machine_mode result_mode = GET_MODE (dest); @@ -13616,7 +13582,7 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) /* First, work out if the hardware can do this at all, or if it's too slow.... */ - if (! rs6000_compare_fp_p) + if (!FLOAT_MODE_P (compare_mode)) { if (TARGET_ISEL) return rs6000_emit_int_cmove (dest, op, true_cond, false_cond); @@ -13781,13 +13747,13 @@ rs6000_emit_int_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) rtx condition_rtx, cr; /* All isel implementations thus far are 32-bits. */ - if (GET_MODE (rs6000_compare_op0) != SImode) + if (GET_MODE (XEXP (op, 0)) != SImode) return 0; /* We still have to do the compare, because isel doesn't do a compare, it just looks at the CRx bits set by a previous compare instruction. */ - condition_rtx = rs6000_generate_compare (GET_CODE (op)); + condition_rtx = rs6000_generate_compare (op, SImode); cr = XEXP (condition_rtx, 0); if (GET_MODE (cr) == CCmode) diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index f11ea1fe249..c50060026c5 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1722,6 +1722,19 @@ typedef struct rs6000_args : (reg_renumber[REGNO] > 0 \ && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67 \ || reg_renumber[REGNO] == FRAME_POINTER_REGNUM))) + +/* Nonzero if X is a hard reg that can be used as an index + or if it is a pseudo reg in the non-strict case. */ +#define INT_REG_OK_FOR_INDEX_P(X, STRICT) \ + ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ + || REGNO_OK_FOR_INDEX_P (REGNO (X))) + +/* Nonzero if X is a hard reg that can be used as a base reg + or if it is a pseudo reg in the non-strict case. */ +#define INT_REG_OK_FOR_BASE_P(X, STRICT) \ + ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ + || REGNO_OK_FOR_BASE_P (REGNO (X))) + /* Maximum number of registers that can appear in a valid memory address. */ @@ -1755,62 +1768,6 @@ typedef struct rs6000_args && EASY_VECTOR_15((n) >> 1) \ && ((n) & 1) == 0) -/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx - and check its validity for a certain class. - We have two alternate definitions for each of them. - The usual definition accepts all pseudo regs; the other rejects - them unless they have been allocated suitable hard regs. - The symbol REG_OK_STRICT causes the latter definition to be used. - - Most source files want to accept pseudo regs in the hope that - they will get allocated to the class that the insn wants them to be in. - Source files for reload pass need to be strict. - After reload, it makes no difference, since pseudo regs have - been eliminated by then. */ - -#ifdef REG_OK_STRICT -# define REG_OK_STRICT_FLAG 1 -#else -# define REG_OK_STRICT_FLAG 0 -#endif - -/* Nonzero if X is a hard reg that can be used as an index - or if it is a pseudo reg in the non-strict case. */ -#define INT_REG_OK_FOR_INDEX_P(X, STRICT) \ - ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ - || REGNO_OK_FOR_INDEX_P (REGNO (X))) - -/* Nonzero if X is a hard reg that can be used as a base reg - or if it is a pseudo reg in the non-strict case. */ -#define INT_REG_OK_FOR_BASE_P(X, STRICT) \ - ((!(STRICT) && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ - || REGNO_OK_FOR_BASE_P (REGNO (X))) - -#define REG_OK_FOR_INDEX_P(X) INT_REG_OK_FOR_INDEX_P (X, REG_OK_STRICT_FLAG) -#define REG_OK_FOR_BASE_P(X) INT_REG_OK_FOR_BASE_P (X, REG_OK_STRICT_FLAG) - -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression - that is a valid memory address for an instruction. - The MODE argument is the machine mode for the MEM expression - that wants to use this address. - - On the RS/6000, there are four valid addresses: a SYMBOL_REF that - refers to a constant pool entry of an address (or the sum of it - plus a constant), a short (16-bit signed) constant plus a register, - the sum of two registers, or a register indirect, possibly with an - auto-increment. For DFmode, DDmode and DImode with a constant plus - register, we must ensure that both words are addressable or PowerPC64 - with offset word aligned. - - For modes spanning multiple registers (DFmode and DDmode in 32-bit GPRs, - 32-bit DImode, TImode), indexed addressing cannot be used because - adjacent memory cells are accessed by adding word-sized offsets - during assembly output. */ - -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ if (rs6000_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \ - goto ADDR; \ -} /* Try a machine-dependent way of reloading an illegitimate address operand. If we find one, push the reload and jump to WIN. This @@ -1986,12 +1943,6 @@ do { \ /* Given a condition code and a mode, return the inverse condition. */ #define REVERSE_CONDITION(CODE, MODE) rs6000_reverse_condition (MODE, CODE) -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. */ - -extern GTY(()) rtx rs6000_compare_op0; -extern GTY(()) rtx rs6000_compare_op1; -extern int rs6000_compare_fp_p; /* Control the assembler format that we output. */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index cc37d911dbb..9d4a96051b7 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -11897,262 +11897,90 @@ ;; signed & unsigned, and one type of branch. ;; ;; Start with the DEFINE_EXPANDs to generate the rtl for compares, scc -;; insns, and branches. We store the operands of compares until we see -;; how it is used. -(define_expand "cmp<mode>" - [(set (cc0) - (compare (match_operand:GPR 0 "gpc_reg_operand" "") - (match_operand:GPR 1 "reg_or_short_operand" "")))] +;; insns, and branches. + +(define_expand "cbranch<mode>4" + [(use (match_operator 0 "rs6000_cbranch_operator" + [(match_operand:GPR 1 "gpc_reg_operand" "") + (match_operand:GPR 2 "reg_or_short_operand" "")])) + (use (match_operand 3 ""))] "" " { - /* Take care of the possibility that operands[1] might be negative but + /* Take care of the possibility that operands[2] might be negative but this might be a logical operation. That insn doesn't exist. */ - if (GET_CODE (operands[1]) == CONST_INT - && INTVAL (operands[1]) < 0) - operands[1] = force_reg (<MODE>mode, operands[1]); - - rs6000_compare_op0 = operands[0]; - rs6000_compare_op1 = operands[1]; - rs6000_compare_fp_p = 0; - DONE; -}") + if (GET_CODE (operands[2]) == CONST_INT + && INTVAL (operands[2]) < 0) + { + operands[2] = force_reg (<MODE>mode, operands[2]); + operands[0] = gen_rtx_fmt_ee (GET_CODE (operands[0]), + GET_MODE (operands[0]), + operands[1], operands[2]); + } -(define_expand "cmp<mode>" - [(set (cc0) (compare (match_operand:FP 0 "gpc_reg_operand" "") - (match_operand:FP 1 "gpc_reg_operand" "")))] - "" - " -{ - rs6000_compare_op0 = operands[0]; - rs6000_compare_op1 = operands[1]; - rs6000_compare_fp_p = 1; + rs6000_emit_cbranch (<MODE>mode, operands); DONE; }") -(define_expand "beq" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (EQ, operands[0]); DONE; }") - -(define_expand "bne" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (NE, operands[0]); DONE; }") - -(define_expand "bge" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (GE, operands[0]); DONE; }") - -(define_expand "bgt" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (GT, operands[0]); DONE; }") - -(define_expand "ble" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (LE, operands[0]); DONE; }") - -(define_expand "blt" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (LT, operands[0]); DONE; }") - -(define_expand "bgeu" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (GEU, operands[0]); DONE; }") - -(define_expand "bgtu" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (GTU, operands[0]); DONE; }") - -(define_expand "bleu" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (LEU, operands[0]); DONE; }") - -(define_expand "bltu" - [(use (match_operand 0 "" ""))] - "" - "{ rs6000_emit_cbranch (LTU, operands[0]); DONE; }") - -(define_expand "bunordered" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (UNORDERED, operands[0]); DONE; }") - -(define_expand "bordered" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (ORDERED, operands[0]); DONE; }") - -(define_expand "buneq" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (UNEQ, operands[0]); DONE; }") - -(define_expand "bunge" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (UNGE, operands[0]); DONE; }") - -(define_expand "bungt" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (UNGT, operands[0]); DONE; }") - -(define_expand "bunle" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (UNLE, operands[0]); DONE; }") - -(define_expand "bunlt" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (UNLT, operands[0]); DONE; }") - -(define_expand "bltgt" - [(use (match_operand 0 "" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_cbranch (LTGT, operands[0]); DONE; }") - -;; For SNE, we would prefer that the xor/abs sequence be used for integers. -;; For SEQ, likewise, except that comparisons with zero should be done -;; with an scc insns. However, due to the order that combine see the -;; resulting insns, we must, in fact, allow SEQ for integers. Fail in -;; the cases we don't want to handle. -(define_expand "seq" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" - "{ rs6000_emit_sCOND (EQ, operands[0]); DONE; }") - -(define_expand "sne" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] +(define_expand "cbranch<mode>4" + [(use (match_operator 0 "rs6000_cbranch_operator" + [(match_operand:FP 1 "gpc_reg_operand" "") + (match_operand:FP 2 "gpc_reg_operand" "")])) + (use (match_operand 3 ""))] "" " { - if (! rs6000_compare_fp_p) - FAIL; - - rs6000_emit_sCOND (NE, operands[0]); + rs6000_emit_cbranch (<MODE>mode, operands); DONE; }") -;; A >= 0 is best done the portable way for A an integer. -(define_expand "sge" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] +(define_expand "cstore<mode>4" + [(use (match_operator 1 "rs6000_cbranch_operator" + [(match_operand:GPR 2 "gpc_reg_operand" "") + (match_operand:GPR 3 "reg_or_short_operand" "")])) + (clobber (match_operand:SI 0 "register_operand"))] "" " { - if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) - FAIL; - - rs6000_emit_sCOND (GE, operands[0]); - DONE; -}") + /* Take care of the possibility that operands[3] might be negative but + this might be a logical operation. That insn doesn't exist. */ + if (GET_CODE (operands[3]) == CONST_INT + && INTVAL (operands[3]) < 0) + { + operands[3] = force_reg (<MODE>mode, operands[3]); + operands[1] = gen_rtx_fmt_ee (GET_CODE (operands[1]), + GET_MODE (operands[1]), + operands[2], operands[3]); + } -;; A > 0 is best done using the portable sequence, so fail in that case. -(define_expand "sgt" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" - " -{ - if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) + /* For SNE, we would prefer that the xor/abs sequence be used for integers. + For SEQ, likewise, except that comparisons with zero should be done + with an scc insns. However, due to the order that combine see the + resulting insns, we must, in fact, allow SEQ for integers. Fail in + the cases we don't want to handle or are best handled by portable + code. */ + if (GET_CODE (operands[1]) == NE) FAIL; - - rs6000_emit_sCOND (GT, operands[0]); - DONE; -}") - -;; A <= 0 is best done the portable way for A an integer. -(define_expand "sle" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" - " -{ - if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) + if ((GET_CODE (operands[1]) == LT || GET_CODE (operands[1]) == LE + || GET_CODE (operands[1]) == GT || GET_CODE (operands[1]) == GE) + && operands[3] == const0_rtx) FAIL; - - rs6000_emit_sCOND (LE, operands[0]); + rs6000_emit_sCOND (<MODE>mode, operands); DONE; }") -;; A < 0 is best done in the portable way for A an integer. -(define_expand "slt" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] +(define_expand "cstore<mode>4" + [(use (match_operator 1 "rs6000_cbranch_operator" + [(match_operand:FP 2 "gpc_reg_operand" "") + (match_operand:FP 3 "gpc_reg_operand" "")])) + (clobber (match_operand:SI 0 "register_operand"))] "" " { - if (! rs6000_compare_fp_p && rs6000_compare_op1 == const0_rtx) - FAIL; - - rs6000_emit_sCOND (LT, operands[0]); + rs6000_emit_sCOND (<MODE>mode, operands); DONE; }") -(define_expand "sgeu" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" - "{ rs6000_emit_sCOND (GEU, operands[0]); DONE; }") - -(define_expand "sgtu" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" - "{ rs6000_emit_sCOND (GTU, operands[0]); DONE; }") - -(define_expand "sleu" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" - "{ rs6000_emit_sCOND (LEU, operands[0]); DONE; }") - -(define_expand "sltu" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "" - "{ rs6000_emit_sCOND (LTU, operands[0]); DONE; }") - -(define_expand "sunordered" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (UNORDERED, operands[0]); DONE; }") - -(define_expand "sordered" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (ORDERED, operands[0]); DONE; }") - -(define_expand "suneq" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (UNEQ, operands[0]); DONE; }") - -(define_expand "sunge" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (UNGE, operands[0]); DONE; }") - -(define_expand "sungt" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (UNGT, operands[0]); DONE; }") - -(define_expand "sunle" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (UNLE, operands[0]); DONE; }") - -(define_expand "sunlt" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (UNLT, operands[0]); DONE; }") - -(define_expand "sltgt" - [(clobber (match_operand:SI 0 "gpc_reg_operand" ""))] - "! (TARGET_HARD_FLOAT && !TARGET_FPRS)" - "{ rs6000_emit_sCOND (LTGT, operands[0]); DONE; }") (define_expand "stack_protect_set" [(match_operand 0 "memory_operand" "") @@ -12195,16 +12023,16 @@ (match_operand 2 "" "")] "" { + rtx test, op0, op1; #ifdef TARGET_THREAD_SSP_OFFSET rtx tlsreg = gen_rtx_REG (Pmode, TARGET_64BIT ? 13 : 2); rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET)); operands[1] = gen_rtx_MEM (Pmode, addr); #endif - rs6000_compare_op0 = operands[0]; - rs6000_compare_op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, operands[1]), - UNSPEC_SP_TEST); - rs6000_compare_fp_p = 0; - emit_jump_insn (gen_beq (operands[2])); + op0 = operands[0]; + op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, operands[1]), UNSPEC_SP_TEST); + test = gen_rtx_EQ (VOIDmode, op0, op1); + emit_jump_insn (gen_cbranchsi4 (test, op0, op1, operands[2])); DONE; }) @@ -14775,17 +14603,16 @@ "{t 31,0,0|trap}" [(set_attr "type" "trap")]) -(define_expand "conditional_trap" - [(trap_if (match_operator 0 "trap_comparison_operator" - [(match_dup 2) (match_dup 3)]) - (match_operand 1 "const_int_operand" ""))] +(define_expand "ctrap<mode>4" + [(trap_if (match_operator 0 "ordered_comparison_operator" + [(match_operand:GPR 1 "register_operand") + (match_operand:GPR 2 "reg_or_short_operand")]) + (match_operand 3 "zero_constant" ""))] "" - "if (rs6000_compare_fp_p || operands[1] != const0_rtx) FAIL; - operands[2] = rs6000_compare_op0; - operands[3] = rs6000_compare_op1;") + "") (define_insn "" - [(trap_if (match_operator 0 "trap_comparison_operator" + [(trap_if (match_operator 0 "ordered_comparison_operator" [(match_operand:GPR 1 "register_operand" "r") (match_operand:GPR 2 "reg_or_short_operand" "rI")]) (const_int 0))] diff --git a/gcc/config/s390/constraints.md b/gcc/config/s390/constraints.md index 4d37094e2cf..6cc33d1cf8a 100644 --- a/gcc/config/s390/constraints.md +++ b/gcc/config/s390/constraints.md @@ -398,7 +398,7 @@ level. This constraint will never be used and using it in an inline assembly is *always* a bug since there is no instruction accepting all those addresses. It just serves as a placeholder for a generic memory constraint." - (match_test "legitimate_address_p (GET_MODE (op), op, 1)")) + (match_test "strict_memory_address_p (GET_MODE (op), op)")) ; This defines 'm' as normal memory constraint. This is only possible ; since the standard memory constraint is re-defined in s390.h using diff --git a/gcc/config/s390/predicates.md b/gcc/config/s390/predicates.md index bb8fdf261d5..d09c9b3e161 100644 --- a/gcc/config/s390/predicates.md +++ b/gcc/config/s390/predicates.md @@ -189,6 +189,14 @@ return (s390_compare_and_branch_condition_mask (op) >= 0); }) +;; Return nonzero if OP is a valid comparison operator for the +;; cstore expanders -- respectively cstorecc4 and integer cstore. +(define_predicate "s390_eqne_operator" + (match_code "eq, ne")) + +(define_predicate "s390_scond_operator" + (match_code "ltu, gtu, leu, geu")) + ;; Return nonzero if OP is a valid comparison operator ;; for an ALC condition. diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h index 3bde1c14b48..b410de538d0 100644 --- a/gcc/config/s390/s390-protos.h +++ b/gcc/config/s390/s390-protos.h @@ -72,7 +72,6 @@ extern bool preferred_la_operand_p (rtx, rtx); extern int legitimate_pic_operand_p (rtx); extern int legitimate_constant_p (rtx); extern bool legitimate_reload_constant_p (rtx); -extern bool legitimate_address_p (enum machine_mode, rtx, int); extern rtx legitimize_pic_address (rtx, rtx); extern rtx legitimize_reload_address (rtx, enum machine_mode, int, int); extern enum reg_class s390_preferred_reload_class (rtx, enum reg_class); diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index e2ed4a0d407..7f9dd132fe2 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -223,11 +223,6 @@ struct processor_costs z10_cost = extern int reload_completed; -/* Save information from a "cmpxx" operation until the branch or scc is - emitted. A pair of a MODE_CC register and a const0_rtx if a compare - has been emitted already. */ -rtx s390_compare_op0, s390_compare_op1; - /* Structure used to hold the components of a S/390 memory address. A legitimate address on S/390 is of the general form @@ -3085,8 +3080,8 @@ s390_expand_plus_operand (rtx target, rtx src, /* Return true if ADDR is a valid memory address. STRICT specifies whether strict register checking applies. */ -bool -legitimate_address_p (enum machine_mode mode, rtx addr, int strict) +static bool +s390_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict) { struct s390_address ad; @@ -3744,7 +3739,7 @@ s390_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, { x = legitimize_tls_address (x, 0); - if (legitimate_address_p (mode, x, FALSE)) + if (s390_legitimate_address_p (mode, x, FALSE)) return x; } else if (GET_CODE (x) == PLUS @@ -3761,7 +3756,7 @@ s390_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, || SYMBOLIC_CONST (XEXP (x, 1))))) x = legitimize_pic_address (x, 0); - if (legitimate_address_p (mode, x, FALSE)) + if (s390_legitimate_address_p (mode, x, FALSE)) return x; } @@ -7747,15 +7742,11 @@ s390_emit_prologue (void) rtx t = gen_rtx_AND (Pmode, stack_pointer_rtx, GEN_INT (stack_check_mask)); if (TARGET_64BIT) - gen_cmpdi (t, const0_rtx); + emit_insn (gen_ctrapdi4 (gen_rtx_EQ (VOIDmode, t, const0_rtx), + t, const0_rtx, const0_rtx)); else - gen_cmpsi (t, const0_rtx); - - emit_insn (gen_conditional_trap (gen_rtx_EQ (CCmode, - gen_rtx_REG (CCmode, - CC_REGNUM), - const0_rtx), - const0_rtx)); + emit_insn (gen_ctrapsi4 (gen_rtx_EQ (VOIDmode, t, const0_rtx), + t, const0_rtx, const0_rtx)); } } @@ -9993,6 +9984,9 @@ s390_reorg (void) #undef TARGET_LIBGCC_SHIFT_COUNT_MODE #define TARGET_LIBGCC_SHIFT_COUNT_MODE s390_libgcc_shift_count_mode +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P s390_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-s390.h" diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index 2b4d7ce72ca..26bdd9e7493 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -740,30 +740,12 @@ CUMULATIVE_ARGS; #define MAX_REGS_PER_ADDRESS 2 /* This definition replaces the formerly used 'm' constraint with a -different constraint letter in order to avoid changing semantics of -the 'm' constraint when accepting new address formats in -legitimate_address_p. The constraint letter defined here must not be -used in insn definitions or inline assemblies. */ + different constraint letter in order to avoid changing semantics of + the 'm' constraint when accepting new address formats in + TARGET_LEGITIMATE_ADDRESS_P. The constraint letter defined here + must not be used in insn definitions or inline assemblies. */ #define TARGET_MEM_CONSTRAINT 'e' -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a - valid memory address for an instruction. - The MODE argument is the machine mode for the MEM expression - that wants to use this address. */ -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (legitimate_address_p (MODE, X, 1)) \ - goto ADDR; \ -} -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (legitimate_address_p (MODE, X, 0)) \ - goto ADDR; \ -} -#endif - /* Try a machine-dependent way of reloading an illegitimate address operand. If we find one, push the reload and jump to WIN. This macro is used in only one place: `find_reloads_address' in reload.c. */ @@ -803,12 +785,6 @@ do { \ #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \ s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1)) -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. Note that we can't use "rtx" here - since it hasn't been defined! */ -extern struct rtx_def *s390_compare_op0, *s390_compare_op1; - - /* Relative costs of operations. */ /* On s390, copy between fprs and gprs is expensive. */ diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index c3d181f0aac..7c9a2b28100 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -354,13 +354,6 @@ (define_mode_iterator INT [(DI "TARGET_64BIT") SI HI QI]) (define_mode_iterator INTALL [TI DI SI HI QI]) -;; This iterator allows to unify all 'bCOND' expander patterns. -(define_code_iterator COMPARE [eq ne gt gtu lt ltu ge geu le leu unordered - ordered uneq unlt ungt unle unge ltgt]) - -;; This iterator allows to unify all 'sCOND' patterns. -(define_code_iterator SCOND [ltu gtu leu geu]) - ;; This iterator allows some 'ashift' and 'lshiftrt' pattern to be defined from ;; the same template. (define_code_iterator SHIFT [ashift lshiftrt]) @@ -493,39 +486,6 @@ ;;- Compare instructions. ;; -(define_expand "cmp<mode>" - [(set (reg:CC CC_REGNUM) - (compare:CC (match_operand:GPR 0 "register_operand" "") - (match_operand:GPR 1 "general_operand" "")))] - "" -{ - s390_compare_op0 = operands[0]; - s390_compare_op1 = operands[1]; - DONE; -}) - -(define_expand "cmp<mode>" - [(set (reg:CC CC_REGNUM) - (compare:CC (match_operand:FP 0 "register_operand" "") - (match_operand:FP 1 "general_operand" "")))] - "TARGET_HARD_FLOAT" -{ - s390_compare_op0 = operands[0]; - s390_compare_op1 = operands[1]; - DONE; -}) - -(define_expand "cmpcc" - [(set (reg:CC CC_REGNUM) - (compare:CC (match_operand 0 "cc_reg_operand" "") - (match_operand 1 "general_operand" "")))] - "" -{ - s390_compare_op0 = operands[0]; - s390_compare_op1 = operands[1]; - DONE; -}) - ; Test-under-Mask instructions (define_insn "*tmqi_mem" @@ -3812,9 +3772,9 @@ TD -> DI convert afterwards. */ emit_insn (gen_extendddtd2 (temp, operands[1])); temp = force_reg (TDmode, temp); - emit_insn (gen_cmptd (temp, - CONST_DOUBLE_FROM_REAL_VALUE (cmp, TDmode))); - emit_jump_insn (gen_blt (label1)); + emit_cmp_and_jump_insns (temp, + CONST_DOUBLE_FROM_REAL_VALUE (cmp, TDmode), + LT, NULL_RTX, VOIDmode, 0, label1); emit_insn (gen_subtd3 (temp, temp, CONST_DOUBLE_FROM_REAL_VALUE (sub, TDmode))); emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp, GEN_INT (11))); @@ -3840,9 +3800,9 @@ decimal_real_from_string (&cmp, "9223372036854775808.0"); /* 2^63 */ decimal_real_from_string (&sub, "18446744073709551616.0"); /* 2^64 */ - emit_insn (gen_cmptd (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE (cmp, TDmode))); - emit_jump_insn (gen_blt (label1)); + emit_cmp_and_jump_insns (operands[1], + CONST_DOUBLE_FROM_REAL_VALUE (cmp, TDmode), + LT, NULL_RTX, VOIDmode, 0, label1); emit_insn (gen_subtd3 (temp, operands[1], CONST_DOUBLE_FROM_REAL_VALUE (sub, TDmode))); emit_insn (gen_fix_trunctddi2_dfp (operands[0], temp, GEN_INT (11))); @@ -3873,9 +3833,9 @@ real_2expN (&cmp, GET_MODE_BITSIZE(<GPR:MODE>mode) - 1, <BFP:MODE>mode); real_2expN (&sub, GET_MODE_BITSIZE(<GPR:MODE>mode), <BFP:MODE>mode); - emit_insn (gen_cmp<BFP:mode> (operands[1], - CONST_DOUBLE_FROM_REAL_VALUE (cmp, <BFP:MODE>mode))); - emit_jump_insn (gen_blt (label1)); + emit_cmp_and_jump_insns (operands[1], + CONST_DOUBLE_FROM_REAL_VALUE (cmp, <BFP:MODE>mode), + LT, NULL_RTX, VOIDmode, 0, label1); emit_insn (gen_sub<BFP:mode>3 (temp, operands[1], CONST_DOUBLE_FROM_REAL_VALUE (sub, <BFP:MODE>mode))); emit_insn (gen_fix_trunc<BFP:mode><GPR:mode>2_bfp (operands[0], temp, @@ -5074,7 +5034,7 @@ (match_operand:GPR 3 "const_int_operand" "")] "TARGET_CPU_ZARCH" "if (!s390_expand_addcc (GET_CODE (operands[1]), - s390_compare_op0, s390_compare_op1, + XEXP (operands[1], 0), XEXP (operands[1], 1), operands[0], operands[2], operands[3])) FAIL; DONE;") @@ -5114,31 +5074,29 @@ "") -(define_expand "s<code>" +(define_expand "cstore<mode>4" [(set (match_operand:SI 0 "register_operand" "") - (SCOND (match_dup 0) - (match_dup 0)))] + (match_operator:SI 1 "s390_scond_operator" + [(match_operand:GPR 2 "register_operand" "") + (match_operand:GPR 3 "general_operand" "")]))] "TARGET_CPU_ZARCH" - "if (!s390_expand_addcc (<CODE>, s390_compare_op0, s390_compare_op1, + "if (!s390_expand_addcc (GET_CODE (operands[1]), operands[2], operands[3], operands[0], const0_rtx, const1_rtx)) FAIL; DONE;") -(define_expand "seq" +(define_expand "cstorecc4" [(parallel - [(set (match_operand:SI 0 "register_operand" "=d") - (match_dup 1)) - (clobber (reg:CC CC_REGNUM))]) - (parallel - [(set (match_dup 0) (xor:SI (match_dup 0) (const_int 1))) + [(set (match_operand:SI 0 "register_operand" "") + (match_operator:SI 1 "s390_eqne_operator" + [(match_operand:CCZ1 2 "register_operand") + (match_operand 3 "const0_operand")])) (clobber (reg:CC CC_REGNUM))])] "" -{ - if (GET_MODE (s390_compare_op0) != CCZ1mode) - FAIL; - operands[1] = s390_emit_compare (NE, s390_compare_op0, s390_compare_op1); - PUT_MODE (operands[1], SImode); -}) + "emit_insn (gen_sne (operands[0], operands[2])); + if (GET_CODE (operands[1]) == EQ) + emit_insn (gen_xorsi3 (operands[0], operands[0], const1_rtx)); + DONE;") -(define_insn_and_split "*sne" +(define_insn_and_split "sne" [(set (match_operand:SI 0 "register_operand" "=d") (ne:SI (match_operand:CCZ1 1 "register_operand" "0") (const_int 0))) @@ -5566,8 +5524,8 @@ operands[1] = make_safe_from (operands[1], operands[0]); emit_move_insn (operands[0], const0_rtx); - emit_insn (gen_cmpsi (operands[1], operands[2])); - emit_jump_insn (gen_bltu (label1)); + emit_cmp_and_jump_insns (operands[1], operands[2], LT, NULL_RTX, + SImode, 1, label1); emit_move_insn (operands[0], const1_rtx); emit_label (label1); } @@ -5598,12 +5556,12 @@ operands[2] = make_safe_from (operands[2], operands[0]); emit_move_insn (operands[0], const0_rtx); - emit_insn (gen_cmpsi (operands[2], operands[1])); - emit_jump_insn (gen_bgtu (label3)); - emit_insn (gen_cmpsi (operands[2], const0_rtx)); - emit_jump_insn (gen_blt (label2)); - emit_insn (gen_cmpsi (operands[2], const1_rtx)); - emit_jump_insn (gen_beq (label1)); + emit_cmp_and_jump_insns (operands[2], operands[1], GT, NULL_RTX, + SImode, 1, label3); + emit_cmp_and_jump_insns (operands[2], const0_rtx, LT, NULL_RTX, + SImode, 0, label2); + emit_cmp_and_jump_insns (operands[2], const1_rtx, EQ, NULL_RTX, + SImode, 0, label1); emit_insn (gen_zero_extendsidi2 (operands[3], operands[1])); insn = emit_insn (gen_divmoddisi3 (operands[3], operands[3], operands[2])); @@ -5652,8 +5610,8 @@ operands[1] = make_safe_from (operands[1], operands[0]); emit_move_insn (operands[0], operands[1]); - emit_insn (gen_cmpsi (operands[0], operands[2])); - emit_jump_insn (gen_bltu (label1)); + emit_cmp_and_jump_insns (operands[0], operands[2], LT, NULL_RTX, + SImode, 1, label1); emit_insn (gen_abssi2 (operands[0], operands[2])); emit_insn (gen_addsi3 (operands[0], operands[0], operands[1])); emit_label (label1); @@ -5685,12 +5643,12 @@ operands[2] = make_safe_from (operands[2], operands[0]); emit_move_insn(operands[0], operands[1]); - emit_insn (gen_cmpsi (operands[2], operands[1])); - emit_jump_insn (gen_bgtu (label3)); - emit_insn (gen_cmpsi (operands[2], const0_rtx)); - emit_jump_insn (gen_blt (label2)); - emit_insn (gen_cmpsi (operands[2], const1_rtx)); - emit_jump_insn (gen_beq (label1)); + emit_cmp_and_jump_insns (operands[2], operands[1], GT, NULL_RTX, + SImode, 1, label3); + emit_cmp_and_jump_insns (operands[2], const0_rtx, LT, NULL_RTX, + SImode, 0, label2); + emit_cmp_and_jump_insns (operands[2], const1_rtx, EQ, NULL_RTX, + SImode, 0, label1); emit_insn (gen_zero_extendsidi2 (operands[3], operands[1])); insn = emit_insn (gen_divmoddisi3 (operands[3], operands[3], operands[2])); @@ -7359,15 +7317,42 @@ ;; Branch instruction patterns. ;; -(define_expand "b<code>" +(define_expand "cbranch<mode>4" [(set (pc) - (if_then_else (COMPARE (match_operand 0 "" "") - (const_int 0)) - (match_dup 0) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:GPR 1 "register_operand" "") + (match_operand:GPR 2 "general_operand" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] "" - "s390_emit_jump (operands[0], - s390_emit_compare (<CODE>, s390_compare_op0, s390_compare_op1)); DONE;") + "s390_emit_jump (operands[3], + s390_emit_compare (GET_CODE (operands[0]), operands[1], operands[2])); + DONE;") + +(define_expand "cbranch<mode>4" + [(set (pc) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:FP 1 "register_operand" "") + (match_operand:FP 2 "general_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_HARD_FLOAT" + "s390_emit_jump (operands[3], + s390_emit_compare (GET_CODE (operands[0]), operands[1], operands[2])); + DONE;") + +(define_expand "cbranchcc4" + [(set (pc) + (if_then_else (match_operator 0 "s390_eqne_operator" + [(match_operand 1 "cc_reg_operand" "") + (match_operand 2 "const0_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "TARGET_HARD_FLOAT" + "s390_emit_jump (operands[3], + s390_emit_compare (GET_CODE (operands[0]), operands[1], operands[2])); + DONE;") + ;; @@ -7506,18 +7491,36 @@ [(set_attr "op_type" "RI") (set_attr "type" "branch")]) -(define_expand "conditional_trap" - [(trap_if (match_operand 0 "comparison_operator" "") - (match_operand 1 "general_operand" ""))] +(define_expand "ctrap<mode>4" + [(trap_if (match_operator 0 "comparison_operator" + [(match_operand:GPR 1 "register_operand" "") + (match_operand:GPR 2 "general_operand" "")]) + (match_operand 3 "const0_operand" ""))] "" -{ - if (operands[1] != const0_rtx) FAIL; - operands[0] = s390_emit_compare (GET_CODE (operands[0]), - s390_compare_op0, s390_compare_op1); -}) + { + rtx cond = s390_emit_compare (GET_CODE (operands[0]), + operands[1], operands[2]); + emit_insn (gen_condtrap (cond, XEXP (cond, 0))); + DONE; + }) + +(define_expand "ctrap<mode>4" + [(trap_if (match_operator 0 "comparison_operator" + [(match_operand:FP 1 "register_operand" "") + (match_operand:FP 2 "general_operand" "")]) + (match_operand 3 "const0_operand" ""))] + "" + { + rtx cond = s390_emit_compare (GET_CODE (operands[0]), + operands[1], operands[2]); + emit_insn (gen_condtrap (cond, XEXP (cond, 0))); + DONE; + }) -(define_insn "*trap" - [(trap_if (match_operator 0 "s390_comparison" [(reg CC_REGNUM) (const_int 0)]) +(define_insn "condtrap" + [(trap_if (match_operator 0 "s390_comparison" + [(match_operand 1 "cc_reg_operand" "c") + (const_int 0)]) (const_int 0))] "" "j%C0\t.+2"; @@ -8665,6 +8668,7 @@ (match_operand 2 "" "")] "" { + rtx cc_reg, test; #ifdef TARGET_THREAD_SSP_OFFSET operands[1] = gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, s390_get_thread_pointer (), @@ -8675,9 +8679,9 @@ else emit_insn (gen_stack_protect_testsi (operands[0], operands[1])); - s390_compare_op0 = gen_rtx_REG (CCZmode, CC_REGNUM); - s390_compare_op1 = const0_rtx; - emit_jump_insn (gen_beq (operands[2])); + cc_reg = gen_rtx_REG (CCZmode, CC_REGNUM); + test = gen_rtx_EQ (VOIDmode, cc_reg, const0_rtx); + emit_jump_insn (gen_cbranchcc4 (test, cc_reg, const0_rtx, operands[2])); DONE; }) diff --git a/gcc/config/score/score-conv.h b/gcc/config/score/score-conv.h index 67855da895e..e042dc1b7d3 100644 --- a/gcc/config/score/score-conv.h +++ b/gcc/config/score/score-conv.h @@ -22,11 +22,6 @@ extern int target_flags; -/* Define the information needed to generate branch insns. This is - stored from the compare operation. */ -extern GTY(()) rtx cmp_op0; -extern GTY(()) rtx cmp_op1; - #define GP_REG_FIRST 0U #define GP_REG_LAST 31U #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1U) diff --git a/gcc/config/score/score-protos.h b/gcc/config/score/score-protos.h index d6739b8cf4c..204dc1876a4 100644 --- a/gcc/config/score/score-protos.h +++ b/gcc/config/score/score-protos.h @@ -25,7 +25,6 @@ enum score_mem_unit {SCORE_BYTE = 0, SCORE_HWORD = 1, SCORE_WORD = 2}; #define SCORE_ALIGN_UNIT(V, UNIT) !(V & ((1 << UNIT) - 1)) -extern void score_gen_cmp (enum machine_mode mode); extern void score_prologue (void); extern void score_epilogue (int sibcall_p); extern void score_call (rtx *ops, bool sib); diff --git a/gcc/config/score/score.c b/gcc/config/score/score.c index 2ac3021bf5e..0b737459765 100644 --- a/gcc/config/score/score.c +++ b/gcc/config/score/score.c @@ -116,8 +116,10 @@ #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST score_address_cost +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P score_legitimate_address_p + struct extern_list *extern_head = 0; -rtx cmp_op0, cmp_op1; /* default 0 = NO_REGS */ enum reg_class score_char_to_class[256]; @@ -532,13 +534,13 @@ score_regno_mode_ok_for_base_p (int regno, int strict) } /* Implement GO_IF_LEGITIMATE_ADDRESS macro. */ -int -score_address_p (enum machine_mode mode, rtx x, int strict) +bool +score_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { if (TARGET_SCORE5 || TARGET_SCORE5U || TARGET_SCORE7 || TARGET_SCORE7D) - return score7_address_p (mode, x, strict); + return score7_legitimate_address_p (mode, x, strict); else if (TARGET_SCORE3) - return score3_address_p (mode, x, strict); + return score3_legitimate_address_p (mode, x, strict); gcc_unreachable (); } @@ -698,17 +700,6 @@ score_epilogue (int sibcall_p) gcc_unreachable (); } -void -score_gen_cmp (enum machine_mode mode) -{ - if (TARGET_SCORE5 || TARGET_SCORE5U || TARGET_SCORE7 || TARGET_SCORE7D) - return score7_gen_cmp (mode); - else if (TARGET_SCORE3) - return score3_gen_cmp (mode); - - gcc_unreachable (); -} - /* Call and sibcall pattern all need call this function. */ void score_call (rtx *ops, bool sib) @@ -1118,7 +1109,7 @@ score_block_move_loop (rtx dst, rtx src, HOST_WIDE_INT length) HOST_WIDE_INT loop_mov_bytes; HOST_WIDE_INT iteration = 0; HOST_WIDE_INT head_length = 0, leftover; - rtx label, src_reg, dst_reg, final_dst; + rtx label, src_reg, dst_reg, final_dst, test; bool gen_loop_head = (src_align < BITS_PER_WORD || dst_align < BITS_PER_WORD); @@ -1158,8 +1149,8 @@ score_block_move_loop (rtx dst, rtx src, HOST_WIDE_INT length) score_block_move_loop_body (dst_reg, dst_align, src_reg, src_align, loop_mov_bytes); - emit_insn (gen_cmpsi (dst_reg, final_dst)); - emit_jump_insn (gen_bne (label)); + test = gen_rtx_NE (VOIDmode, dst_reg, final_dst); + emit_jump_insn (gen_cbranchsi4 (test, dst_reg, final_dst, label)); score_block_move_loop_foot (dst_reg, dst_align, src_reg, src_align, leftover); diff --git a/gcc/config/score/score.h b/gcc/config/score/score.h index d9fe8e65625..e6c8b7504ba 100644 --- a/gcc/config/score/score.h +++ b/gcc/config/score/score.h @@ -748,16 +748,6 @@ typedef struct score_args /* Maximum number of registers that can appear in a valid memory address. */ #define MAX_REGS_PER_ADDRESS 1 -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ - if (score_address_p (MODE, X, 1)) \ - goto LABEL; -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ - if (score_address_p (MODE, X, 0)) \ - goto LABEL; -#endif - /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. diff --git a/gcc/config/score/score.md b/gcc/config/score/score.md index e616c57aa7e..b426e14e0ac 100644 --- a/gcc/config/score/score.md +++ b/gcc/config/score/score.md @@ -2175,6 +2175,20 @@ (set_attr "length" "4,4") (set_attr "mode" "SI")]) +(define_expand "cbranchsi4" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_operand:SI 1 "score_register_operand" "") + (match_operand:SI 2 "arith_operand" ""))) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" + [(reg:CC CC_REGNUM) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "" + "") + (define_insn "cbrancheqz" [(set (pc) (if_then_else (eq (match_operand:SI 0 "score_register_operand" "d") @@ -2259,16 +2273,6 @@ (const_int 4) (const_int 6)))]) -(define_expand "cmpsi" - [(match_operand:SI 0 "score_register_operand") - (match_operand:SI 1 "arith_operand")] - "" -{ - cmp_op0 = operands[0]; - cmp_op1 = operands[1]; - DONE; -}) - (define_insn "cmpsi_nz_score7" [(set (reg:CC_NZ CC_REGNUM) (compare:CC_NZ (match_operand:SI 0 "register_operand" "d,e,d") @@ -2375,106 +2379,6 @@ (set_attr "up_c" "yes") (set_attr "mode" "SI")]) -(define_expand "beq" - [(set (pc) - (if_then_else (eq (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "ble" - [(set (pc) - (if_then_else (le (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (reg:CC CC_REGNUM) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - score_gen_cmp (CCmode); -}) - (define_insn "*branch_n_score7" [(set (pc) (if_then_else diff --git a/gcc/config/score/score3.c b/gcc/config/score/score3.c index 9e41452c03d..4ac7e60d88c 100644 --- a/gcc/config/score/score3.c +++ b/gcc/config/score/score3.c @@ -54,9 +54,6 @@ #define BITSET_P(VALUE, BIT) (((VALUE) & (1L << (BIT))) != 0) #define INS_BUF_SZ 128 -/* Define the information needed to generate branch insns. This is - stored from the compare operation. */ -extern rtx cmp_op0, cmp_op1; extern enum reg_class score_char_to_class[256]; static int score3_sdata_max; @@ -914,8 +911,8 @@ score3_regno_mode_ok_for_base_p (int regno, int strict) } /* Implement GO_IF_LEGITIMATE_ADDRESS macro. */ -int -score3_address_p (enum machine_mode mode, rtx x, int strict) +bool +score3_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { struct score3_address_info addr; @@ -1647,13 +1644,6 @@ score3_epilogue (int sibcall_p) emit_jump_insn (gen_return_internal_score3 (gen_rtx_REG (Pmode, RA_REGNUM))); } -void -score3_gen_cmp (enum machine_mode mode) -{ - emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, CC_REGNUM), - gen_rtx_COMPARE (mode, cmp_op0, cmp_op1))); -} - /* Return true if X is a symbolic constant that can be calculated in the same way as a bare symbol. If it is, store the type of the symbol in *SYMBOL_TYPE. */ @@ -1692,7 +1682,8 @@ score3_movsicc (rtx *ops) mode = score3_select_cc_mode (GET_CODE (ops[1]), ops[2], ops[3]); emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, CC_REGNUM), - gen_rtx_COMPARE (mode, cmp_op0, cmp_op1))); + gen_rtx_COMPARE (mode, XEXP (ops[1], 0), + XEXP (ops[1], 1)))); } /* Call and sibcall pattern all need call this function. */ diff --git a/gcc/config/score/score3.h b/gcc/config/score/score3.h index c46a8e694d9..001b2f0c2ee 100644 --- a/gcc/config/score/score3.h +++ b/gcc/config/score/score3.h @@ -122,7 +122,8 @@ extern rtx score3_function_value (tree valtype, enum machine_mode mode); extern void score3_initialize_trampoline (rtx ADDR, rtx FUNC, rtx CHAIN); extern int score3_regno_mode_ok_for_base_p (int regno, int strict); -extern int score3_address_p (enum machine_mode mode, rtx x, int strict); +extern bool score3_legitimate_address_p (enum machine_mode mode, rtx x, + bool strict); extern int score3_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, enum reg_class from, enum reg_class to); @@ -138,7 +139,6 @@ extern enum machine_mode score3_select_cc_mode (enum rtx_code op, rtx x, rtx y); extern void score3_prologue (void); extern void score3_epilogue (int sibcall_p); -extern void score3_gen_cmp (enum machine_mode mode); extern void score3_call (rtx *ops, bool sib); extern void score3_call_value (rtx *ops, bool sib); extern void score3_movsicc (rtx *ops); diff --git a/gcc/config/score/score7.c b/gcc/config/score/score7.c index dc532764edd..c18d03b2675 100644 --- a/gcc/config/score/score7.c +++ b/gcc/config/score/score7.c @@ -54,9 +54,6 @@ #define BITSET_P(VALUE, BIT) (((VALUE) & (1L << (BIT))) != 0) #define INS_BUF_SZ 128 -/* Define the information needed to generate branch insns. This is - stored from the compare operation. */ -extern rtx cmp_op0, cmp_op1; extern enum reg_class score_char_to_class[256]; static int score7_sdata_max; @@ -905,8 +902,8 @@ score7_regno_mode_ok_for_base_p (int regno, int strict) } /* Implement GO_IF_LEGITIMATE_ADDRESS macro. */ -int -score7_address_p (enum machine_mode mode, rtx x, int strict) +bool +score7_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { struct score7_address_info addr; @@ -1531,13 +1528,6 @@ score7_epilogue (int sibcall_p) emit_jump_insn (gen_return_internal_score7 (gen_rtx_REG (Pmode, RA_REGNUM))); } -void -score7_gen_cmp (enum machine_mode mode) -{ - emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, CC_REGNUM), - gen_rtx_COMPARE (mode, cmp_op0, cmp_op1))); -} - /* Return true if X is a symbolic constant that can be calculated in the same way as a bare symbol. If it is, store the type of the symbol in *SYMBOL_TYPE. */ @@ -1576,7 +1566,8 @@ score7_movsicc (rtx *ops) mode = score7_select_cc_mode (GET_CODE (ops[1]), ops[2], ops[3]); emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, CC_REGNUM), - gen_rtx_COMPARE (mode, cmp_op0, cmp_op1))); + gen_rtx_COMPARE (mode, XEXP (ops[1], 0), + XEXP (ops[1], 1)))); } /* Call and sibcall pattern all need call this function. */ diff --git a/gcc/config/score/score7.h b/gcc/config/score/score7.h index e2033c74498..ae3f4e837cb 100644 --- a/gcc/config/score/score7.h +++ b/gcc/config/score/score7.h @@ -122,7 +122,8 @@ extern rtx score7_function_value (tree valtype, enum machine_mode mode); extern void score7_initialize_trampoline (rtx ADDR, rtx FUNC, rtx CHAIN); extern int score7_regno_mode_ok_for_base_p (int regno, int strict); -extern int score7_address_p (enum machine_mode mode, rtx x, int strict); +extern bool score7_legitimate_address_p (enum machine_mode mode, rtx x, + bool strict); extern int score7_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, enum reg_class from, enum reg_class to); @@ -139,7 +140,6 @@ extern enum machine_mode score7_select_cc_mode (enum rtx_code op, rtx y); extern void score7_prologue (void); extern void score7_epilogue (int sibcall_p); -extern void score7_gen_cmp (enum machine_mode mode); extern void score7_call (rtx *ops, bool sib); extern void score7_call_value (rtx *ops, bool sib); extern void score7_movsicc (rtx *ops); diff --git a/gcc/config/sh/predicates.md b/gcc/config/sh/predicates.md index da9962c9984..ea924d830f5 100644 --- a/gcc/config/sh/predicates.md +++ b/gcc/config/sh/predicates.md @@ -552,6 +552,17 @@ (and (match_code "minus,div") (match_test "GET_MODE (op) == mode"))) +;; UNORDERED is only supported on SHMEDIA. + +(define_predicate "sh_float_comparison_operator" + (ior (match_operand 0 "ordered_comparison_operator") + (and (match_test "TARGET_SHMEDIA") + (match_code "unordered")))) + +(define_predicate "shmedia_cbranch_comparison_operator" + (ior (match_operand 0 "equality_comparison_operator") + (match_operand 0 "greater_comparison_operator"))) + ;; TODO: Add a comment here. (define_predicate "sh_const_vec" diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h index a484b9c5d05..fb896819b34 100644 --- a/gcc/config/sh/sh-protos.h +++ b/gcc/config/sh/sh-protos.h @@ -41,7 +41,6 @@ enum sh_function_kind { extern rtx sh_fsca_sf2int (void); extern rtx sh_fsca_df2int (void); extern rtx sh_fsca_int2sf (void); -extern struct rtx_def *prepare_scc_operands (enum rtx_code); /* Declare functions defined in sh.c and used in templates. */ @@ -59,6 +58,8 @@ extern int fp_zero_operand (rtx); extern int fp_one_operand (rtx); extern int fp_int_operand (rtx); extern rtx get_fpscr_rtx (void); +extern bool sh_legitimate_index_p (enum machine_mode, rtx); +extern bool sh_legitimate_address_p (enum machine_mode, rtx, bool); extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); extern int nonpic_symbol_mentioned_p (rtx); extern void emit_sf_insn (rtx); @@ -72,7 +73,10 @@ extern enum rtx_code prepare_cbranch_operands (rtx *, enum machine_mode mode, enum rtx_code comparison); extern void expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int); extern bool expand_cbranchdi4 (rtx *operands, enum rtx_code comparison); -extern void from_compare (rtx *, int); +extern void sh_emit_scc_to_t (enum rtx_code, rtx, rtx); +extern rtx sh_emit_cheap_store_flag (enum machine_mode, enum rtx_code, rtx, rtx); +extern void sh_emit_compare_and_branch (rtx *, enum machine_mode); +extern void sh_emit_compare_and_set (rtx *, enum machine_mode); extern int shift_insns_rtx (rtx); extern void gen_ashift (int, int, rtx); extern void gen_ashift_hi (int, int, rtx); @@ -117,7 +121,7 @@ extern int sh_insn_length_adjustment (rtx); extern int sh_can_redirect_branch (rtx, rtx); extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx); extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx); -extern int sh_expand_t_scc (enum rtx_code code, rtx target); +extern int sh_expand_t_scc (rtx *); extern rtx sh_gen_truncate (enum machine_mode, rtx, int); extern bool sh_vector_mode_supported_p (enum machine_mode); #endif /* RTX_CODE */ diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index d23a45a2289..79343bfdfd2 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -105,12 +105,6 @@ static int skip_cycles = 0; and returned from sh_reorder2. */ static short cached_can_issue_more; -/* Saved operands from the last compare to use when we generate an scc - or bcc insn. */ - -rtx sh_compare_op0; -rtx sh_compare_op1; - /* Provides the class number of the smallest class containing reg number. */ @@ -1677,10 +1671,26 @@ expand_cbranchdi4 (rtx *operands, enum rtx_code comparison) return true; } +/* Emit INSN, possibly in a PARALLEL with an USE of fpscr for SH4. */ + +static void +sh_emit_set_t_insn (rtx insn, enum machine_mode mode) +{ + if ((TARGET_SH4 || TARGET_SH2A) && GET_MODE_CLASS (mode) == MODE_FLOAT) + { + insn = gen_rtx_PARALLEL (VOIDmode, + gen_rtvec (2, insn, + gen_rtx_USE (VOIDmode, get_fpscr_rtx ()))); + (mode == SFmode ? emit_sf_insn : emit_df_insn) (insn); + } + else + emit_insn (insn); +} + /* Prepare the operands for an scc instruction; make sure that the - compare has been done. */ -rtx -prepare_scc_operands (enum rtx_code code) + compare has been done and the result is in T_REG. */ +void +sh_emit_scc_to_t (enum rtx_code code, rtx op0, rtx op1) { rtx t_reg = gen_rtx_REG (SImode, T_REG); enum rtx_code oldcode = code; @@ -1709,77 +1719,222 @@ prepare_scc_operands (enum rtx_code code) } if (code != oldcode) { - rtx tmp = sh_compare_op0; - sh_compare_op0 = sh_compare_op1; - sh_compare_op1 = tmp; + rtx tmp = op0; + op0 = op1; + op1 = tmp; } - mode = GET_MODE (sh_compare_op0); + mode = GET_MODE (op0); if (mode == VOIDmode) - mode = GET_MODE (sh_compare_op1); + mode = GET_MODE (op1); - sh_compare_op0 = force_reg (mode, sh_compare_op0); + op0 = force_reg (mode, op0); if ((code != EQ && code != NE - && (sh_compare_op1 != const0_rtx + && (op1 != const0_rtx || code == GTU || code == GEU || code == LTU || code == LEU)) - || (mode == DImode && sh_compare_op1 != const0_rtx) + || (mode == DImode && op1 != const0_rtx) || (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT)) - sh_compare_op1 = force_reg (mode, sh_compare_op1); + op1 = force_reg (mode, op1); - if ((TARGET_SH4 || TARGET_SH2A) && GET_MODE_CLASS (mode) == MODE_FLOAT) - (mode == SFmode ? emit_sf_insn : emit_df_insn) - (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, - gen_rtx_SET (VOIDmode, t_reg, - gen_rtx_fmt_ee (code, SImode, - sh_compare_op0, sh_compare_op1)), - gen_rtx_USE (VOIDmode, get_fpscr_rtx ())))); - else - emit_insn (gen_rtx_SET (VOIDmode, t_reg, - gen_rtx_fmt_ee (code, SImode, - sh_compare_op0, sh_compare_op1))); + sh_emit_set_t_insn (gen_rtx_SET (VOIDmode, t_reg, + gen_rtx_fmt_ee (code, SImode, op0, op1)), + mode); +} + +rtx +sh_emit_cheap_store_flag (enum machine_mode mode, enum rtx_code code, + rtx op0, rtx op1) +{ + rtx target = gen_reg_rtx (SImode); + rtx tmp; + + gcc_assert (TARGET_SHMEDIA); + switch (code) + { + case EQ: + case GT: + case LT: + case UNORDERED: + case GTU: + case LTU: + tmp = gen_rtx_fmt_ee (code, SImode, op0, op1); + emit_insn (gen_cstore4_media (target, tmp, op0, op1)); + code = NE; + break; + + case NE: + case GE: + case LE: + case ORDERED: + case GEU: + case LEU: + tmp = gen_rtx_fmt_ee (reverse_condition (code), mode, op0, op1); + emit_insn (gen_cstore4_media (target, tmp, op0, op1)); + code = EQ; + break; + + case UNEQ: + case UNGE: + case UNGT: + case UNLE: + case UNLT: + case LTGT: + return NULL_RTX; + + default: + gcc_unreachable (); + } - return t_reg; + if (mode == DImode) + { + rtx t2 = gen_reg_rtx (DImode); + emit_insn (gen_extendsidi2 (t2, target)); + target = t2; + } + + return gen_rtx_fmt_ee (code, VOIDmode, target, const0_rtx); } /* Called from the md file, set up the operands of a compare instruction. */ void -from_compare (rtx *operands, int code) +sh_emit_compare_and_branch (rtx *operands, enum machine_mode mode) { - enum machine_mode mode = GET_MODE (sh_compare_op0); - rtx insn; - if (mode == VOIDmode) - mode = GET_MODE (sh_compare_op1); - if (code != EQ - || mode == DImode - || (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT)) + enum rtx_code code = GET_CODE (operands[0]); + enum rtx_code branch_code; + rtx op0 = operands[1]; + rtx op1 = operands[2]; + rtx insn, tem; + bool need_ccmpeq = false; + + if (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT) + { + op0 = force_reg (mode, op0); + op1 = force_reg (mode, op1); + } + else + { + if (code != EQ || mode == DImode) + { + /* Force args into regs, since we can't use constants here. */ + op0 = force_reg (mode, op0); + if (op1 != const0_rtx || code == GTU || code == GEU) + op1 = force_reg (mode, op1); + } + } + + if (GET_MODE_CLASS (mode) == MODE_FLOAT) { - /* Force args into regs, since we can't use constants here. */ - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx - || code == GTU || code == GEU - || (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT)) - sh_compare_op1 = force_reg (mode, sh_compare_op1); + if (code == LT + || (code == LE && TARGET_IEEE && TARGET_SH2E) + || (code == GE && !(TARGET_IEEE && TARGET_SH2E))) + { + tem = op0, op0 = op1, op1 = tem; + code = swap_condition (code); + } + + /* GE becomes fcmp/gt+fcmp/eq, for SH2E and TARGET_IEEE only. */ + if (code == GE) + { + gcc_assert (TARGET_IEEE && TARGET_SH2E); + need_ccmpeq = true; + code = GT; + } + + /* Now we can have EQ, NE, GT, LE. NE and LE are then transformed + to EQ/GT respectively. */ + gcc_assert (code == EQ || code == GT || code == NE || code == LE); } - if (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT && code == GE) + + switch (code) { - from_compare (operands, GT); - insn = gen_ieee_ccmpeqsf_t (sh_compare_op0, sh_compare_op1); + case EQ: + case GT: + case GE: + case GTU: + case GEU: + branch_code = code; + break; + case NE: + case LT: + case LE: + case LTU: + case LEU: + branch_code = reverse_condition (code); + break; + default: + gcc_unreachable (); } + + insn = gen_rtx_SET (VOIDmode, + gen_rtx_REG (SImode, T_REG), + gen_rtx_fmt_ee (branch_code, SImode, op0, op1)); + + sh_emit_set_t_insn (insn, mode); + if (need_ccmpeq) + sh_emit_set_t_insn (gen_ieee_ccmpeqsf_t (op0, op1), mode); + + if (branch_code == code) + emit_jump_insn (gen_branch_true (operands[3])); else - insn = gen_rtx_SET (VOIDmode, - gen_rtx_REG (SImode, T_REG), - gen_rtx_fmt_ee ((enum rtx_code) code, SImode, - sh_compare_op0, sh_compare_op1)); - if ((TARGET_SH4 || TARGET_SH2A) && GET_MODE_CLASS (mode) == MODE_FLOAT) + emit_jump_insn (gen_branch_false (operands[3])); +} + +void +sh_emit_compare_and_set (rtx *operands, enum machine_mode mode) +{ + enum rtx_code code = GET_CODE (operands[1]); + rtx op0 = operands[2]; + rtx op1 = operands[3]; + rtx lab = NULL_RTX; + bool invert = false; + rtx tem; + + op0 = force_reg (mode, op0); + if ((code != EQ && code != NE + && (op1 != const0_rtx + || code == GTU || code == GEU || code == LTU || code == LEU)) + || (mode == DImode && op1 != const0_rtx) + || (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT)) + op1 = force_reg (mode, op1); + + if (GET_MODE_CLASS (mode) == MODE_FLOAT) { - insn = gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (2, insn, - gen_rtx_USE (VOIDmode, get_fpscr_rtx ()))); - (mode == SFmode ? emit_sf_insn : emit_df_insn) (insn); + if (code == LT || code == LE) + { + code = swap_condition (code); + tem = op0, op0 = op1, op1 = tem; + } + if (code == GE) + { + if (TARGET_IEEE) + { + lab = gen_label_rtx (); + sh_emit_scc_to_t (EQ, op0, op1); + emit_jump_insn (gen_branch_true (lab)); + code = GT; + } + else + { + code = LT; + invert = true; + } + } } + + if (code == NE) + { + code = EQ; + invert = true; + } + + sh_emit_scc_to_t (code, op0, op1); + if (lab) + emit_label (lab); + if (invert) + emit_insn (gen_movnegt (operands[0])); else - emit_insn (insn); + emit_move_insn (operands[0], gen_rtx_REG (SImode, T_REG)); } /* Functions to output assembly code. */ @@ -8795,6 +8950,124 @@ sh_insn_length_adjustment (rtx insn) return 0; } +/* Return TRUE for a valid displacement for the REG+disp addressing + with MODE. */ + +/* ??? The SH2e does not have the REG+disp addressing mode when loading values + into the FRx registers. We implement this by setting the maximum offset + to zero when the value is SFmode. This also restricts loading of SFmode + values into the integer registers, but that can't be helped. */ + +/* The SH allows a displacement in a QI or HI amode, but only when the + other operand is R0. GCC doesn't handle this very well, so we forgot + all of that. + + A legitimate index for a QI or HI is 0, SI can be any number 0..63, + DI can be any number 0..60. */ + +bool +sh_legitimate_index_p (enum machine_mode mode, rtx op) +{ + if (GET_CODE (op) == CONST_INT) + { + if (TARGET_SHMEDIA) + { + int size; + + /* Check if this the address of an unaligned load / store. */ + if (mode == VOIDmode) + return CONST_OK_FOR_I06 (INTVAL (op)); + + size = GET_MODE_SIZE (mode); + return (!(INTVAL (op) & (size - 1)) + && INTVAL (op) >= -512 * size + && INTVAL (op) < 512 * size); + } + + if (TARGET_SH2A) + { + if (GET_MODE_SIZE (mode) == 1 + && (unsigned) INTVAL (op) < 4096) + return true; + } + + if ((GET_MODE_SIZE (mode) == 4 + && (unsigned) INTVAL (op) < 64 + && !(INTVAL (op) & 3) + && !(TARGET_SH2E && mode == SFmode)) + || (GET_MODE_SIZE (mode) == 4 + && (unsigned) INTVAL (op) < 16383 + && !(INTVAL (op) & 3) && TARGET_SH2A)) + return true; + + if ((GET_MODE_SIZE (mode) == 8 + && (unsigned) INTVAL (op) < 60 + && !(INTVAL (op) & 3) + && !((TARGET_SH4 || TARGET_SH2A) && mode == DFmode)) + || ((GET_MODE_SIZE (mode)==8) + && (unsigned) INTVAL (op) < 8192 + && !(INTVAL (op) & (TARGET_SH2A_DOUBLE ? 7 : 3)) + && (TARGET_SH2A && mode == DFmode))) + return true; + } + + return false; +} + +/* Recognize an RTL expression that is a valid memory address for + an instruction. + The MODE argument is the machine mode for the MEM expression + that wants to use this address. + Allow REG + REG+disp + REG+r0 + REG++ + --REG */ + +bool +sh_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +{ + if (MAYBE_BASE_REGISTER_RTX_P (x, strict)) + return true; + else if ((GET_CODE (x) == POST_INC || GET_CODE (x) == PRE_DEC) + && ! TARGET_SHMEDIA + && MAYBE_BASE_REGISTER_RTX_P (XEXP (x, 0), strict)) + return true; + else if (GET_CODE (x) == PLUS + && (mode != PSImode || reload_completed)) + { + rtx xop0 = XEXP (x, 0); + rtx xop1 = XEXP (x, 1); + + if (GET_MODE_SIZE (mode) <= 8 + && MAYBE_BASE_REGISTER_RTX_P (xop0, strict) + && sh_legitimate_index_p (mode, xop1)) + return true; + + if ((ALLOW_INDEXED_ADDRESS || GET_MODE (x) == DImode + || ((xop0 == stack_pointer_rtx + || xop0 == hard_frame_pointer_rtx) + && REG_P (xop1) && REGNO (xop1) == R0_REG) + || ((xop1 == stack_pointer_rtx + || xop1 == hard_frame_pointer_rtx) + && REG_P (xop0) && REGNO (xop0) == R0_REG)) + && ((!TARGET_SHMEDIA && GET_MODE_SIZE (mode) <= 4) + || (TARGET_SHMEDIA && GET_MODE_SIZE (mode) <= 8) + || ((TARGET_SH4 || TARGET_SH2A_DOUBLE) + && TARGET_FMOVD && mode == DFmode))) + { + if (MAYBE_BASE_REGISTER_RTX_P (xop1, strict) + && MAYBE_INDEX_REGISTER_RTX_P (xop0, strict)) + return true; + if (MAYBE_INDEX_REGISTER_RTX_P (xop1, strict) + && MAYBE_BASE_REGISTER_RTX_P (xop0, strict)) + return true; + } + } + + return false; +} + /* Return TRUE if X references a SYMBOL_REF or LABEL_REF whose symbol isn't protected by a PIC unspec. */ int @@ -10782,17 +11055,21 @@ sh_get_pr_initial_val (void) } int -sh_expand_t_scc (enum rtx_code code, rtx target) +sh_expand_t_scc (rtx operands[]) { + enum rtx_code code = GET_CODE (operands[1]); + rtx target = operands[0]; + rtx op0 = operands[2]; + rtx op1 = operands[3]; rtx result = target; HOST_WIDE_INT val; - if (GET_CODE (sh_compare_op0) != REG || REGNO (sh_compare_op0) != T_REG - || GET_CODE (sh_compare_op1) != CONST_INT) + if (GET_CODE (op0) != REG || REGNO (op0) != T_REG + || GET_CODE (op1) != CONST_INT) return 0; if (GET_CODE (result) != REG) result = gen_reg_rtx (SImode); - val = INTVAL (sh_compare_op1); + val = INTVAL (op1); if ((code == EQ && val == 1) || (code == NE && val == 0)) emit_insn (gen_movt (result)); else if (TARGET_SH2A && ((code == EQ && val == 0) diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 71e202a87dd..d63a7d6c3bc 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -473,10 +473,7 @@ do { \ sh_div_str = SH_DIV_STR_FOR_SIZE ; \ } \ else \ - { \ - TARGET_CBRANCHDI4 = 1; \ - TARGET_EXPAND_CBRANCHDI4 = 1; \ - } \ + TARGET_CBRANCHDI4 = 1; \ /* We can't meaningfully test TARGET_SHMEDIA here, because -m options \ haven't been parsed yet, hence we'd read only the default. \ sh_target_reg_class will return NO_REGS if this is not SHMEDIA, so \ @@ -712,8 +709,9 @@ do { \ /* Never run scheduling before reload, since that can \ break global alloc, and generates slower code anyway due \ to the pressure on R0. */ \ - /* Enable sched1 for SH4; ready queue will be reordered by \ - the target hooks when pressure is high. We can not do this for \ + /* Enable sched1 for SH4 if the user explicitly requests. \ + When sched1 is enabled, the ready queue will be reordered by \ + the target hooks if pressure is high. We can not do this for \ PIC, SH3 and lower as they give spill failures for R0. */ \ if (!TARGET_HARD_SH4 || flag_pic) \ flag_schedule_insns = 0; \ @@ -728,6 +726,8 @@ do { \ warning (0, "ignoring -fschedule-insns because of exception handling bug"); \ flag_schedule_insns = 0; \ } \ + else if (flag_schedule_insns == 2) \ + flag_schedule_insns = 0; \ } \ \ if (align_loops == 0) \ @@ -2191,45 +2191,25 @@ struct sh_args { /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. - We have two alternate definitions for each of them. - The usual definition accepts all pseudo regs; the other rejects - them unless they have been allocated suitable hard regs. - The symbol REG_OK_STRICT causes the latter definition to be used. */ - -#ifndef REG_OK_STRICT - -/* Nonzero if X is a hard reg that can be used as a base reg - or if it is a pseudo reg. */ -#define REG_OK_FOR_BASE_P(X) \ - (GENERAL_OR_AP_REGISTER_P (REGNO (X)) || REGNO (X) >= FIRST_PSEUDO_REGISTER) - -/* Nonzero if X is a hard reg that can be used as an index - or if it is a pseudo reg. */ -#define REG_OK_FOR_INDEX_P(X) \ - ((TARGET_SHMEDIA ? GENERAL_REGISTER_P (REGNO (X)) \ - : REGNO (X) == R0_REG) || REGNO (X) >= FIRST_PSEUDO_REGISTER) - -/* Nonzero if X/OFFSET is a hard reg that can be used as an index - or if X is a pseudo reg. */ -#define SUBREG_OK_FOR_INDEX_P(X, OFFSET) \ - ((TARGET_SHMEDIA ? GENERAL_REGISTER_P (REGNO (X)) \ - : REGNO (X) == R0_REG && OFFSET == 0) || REGNO (X) >= FIRST_PSEUDO_REGISTER) - -#else - -/* Nonzero if X is a hard reg that can be used as a base reg. */ -#define REG_OK_FOR_BASE_P(X) \ - REGNO_OK_FOR_BASE_P (REGNO (X)) - -/* Nonzero if X is a hard reg that can be used as an index. */ -#define REG_OK_FOR_INDEX_P(X) \ - REGNO_OK_FOR_INDEX_P (REGNO (X)) - -/* Nonzero if X/OFFSET is a hard reg that can be used as an index. */ -#define SUBREG_OK_FOR_INDEX_P(X, OFFSET) \ - (REGNO_OK_FOR_INDEX_P (REGNO (X)) && (OFFSET) == 0) - -#endif + The suitable hard regs are always accepted and all pseudo regs + are also accepted if STRICT is not set. */ + +/* Nonzero if X is a reg that can be used as a base reg. */ +#define REG_OK_FOR_BASE_P(X, STRICT) \ + (GENERAL_OR_AP_REGISTER_P (REGNO (X)) \ + || (!STRICT && REGNO (X) >= FIRST_PSEUDO_REGISTER)) + +/* Nonzero if X is a reg that can be used as an index. */ +#define REG_OK_FOR_INDEX_P(X, STRICT) \ + ((TARGET_SHMEDIA ? GENERAL_REGISTER_P (REGNO (X)) \ + : REGNO (X) == R0_REG) \ + || (!STRICT && REGNO (X) >= FIRST_PSEUDO_REGISTER)) + +/* Nonzero if X/OFFSET is a reg that can be used as an index. */ +#define SUBREG_OK_FOR_INDEX_P(X, OFFSET, STRICT) \ + ((TARGET_SHMEDIA ? GENERAL_REGISTER_P (REGNO (X)) \ + : REGNO (X) == R0_REG && OFFSET == 0) \ + || (!STRICT && REGNO (X) >= FIRST_PSEUDO_REGISTER)) /* Macros for extra constraints. */ @@ -2305,144 +2285,55 @@ struct sh_args { || PCREL_SYMOFF_P (OP)) \ : NON_PIC_REFERENCE_P (OP)) -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression - that is a valid memory address for an instruction. - The MODE argument is the machine mode for the MEM expression - that wants to use this address. */ - -#define MODE_DISP_OK_4(X,MODE) \ -(GET_MODE_SIZE (MODE) == 4 && (unsigned) INTVAL (X) < 64 \ - && ! (INTVAL (X) & 3) && ! (TARGET_SH2E && (MODE) == SFmode)) - -#define MODE_DISP_OK_8(X,MODE) \ -((GET_MODE_SIZE(MODE)==8) && ((unsigned)INTVAL(X)<60) \ - && ! (INTVAL(X) & 3) && ! (TARGET_SH4 && (MODE) == DFmode)) - -#undef MODE_DISP_OK_4 -#define MODE_DISP_OK_4(X,MODE) \ -((GET_MODE_SIZE (MODE) == 4 && (unsigned) INTVAL (X) < 64 \ - && ! (INTVAL (X) & 3) && ! (TARGET_SH2E && (MODE) == SFmode)) \ - || ((GET_MODE_SIZE(MODE)==4) && ((unsigned)INTVAL(X)<16383) \ - && ! (INTVAL(X) & 3) && TARGET_SH2A)) - -#undef MODE_DISP_OK_8 -#define MODE_DISP_OK_8(X,MODE) \ -(((GET_MODE_SIZE(MODE)==8) && ((unsigned)INTVAL(X)<60) \ - && ! (INTVAL(X) & 3) && ! ((TARGET_SH4 || TARGET_SH2A) && (MODE) == DFmode)) \ - || ((GET_MODE_SIZE(MODE)==8) && ((unsigned)INTVAL(X)<8192) \ - && ! (INTVAL(X) & (TARGET_SH2A_DOUBLE ? 7 : 3)) && (TARGET_SH2A && (MODE) == DFmode))) - -#define BASE_REGISTER_RTX_P(X) \ - ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \ - || (GET_CODE (X) == SUBREG \ - && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE ((X))), \ +#define MAYBE_BASE_REGISTER_RTX_P(X, STRICT) \ + ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X, STRICT)) \ + || (GET_CODE (X) == SUBREG \ + && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE ((X))), \ GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (X)))) \ - && GET_CODE (SUBREG_REG (X)) == REG \ - && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) + && GET_CODE (SUBREG_REG (X)) == REG \ + && REG_OK_FOR_BASE_P (SUBREG_REG (X), STRICT))) /* Since this must be r0, which is a single register class, we must check SUBREGs more carefully, to be sure that we don't accept one that extends outside the class. */ -#define INDEX_REGISTER_RTX_P(X) \ - ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \ - || (GET_CODE (X) == SUBREG \ +#define MAYBE_INDEX_REGISTER_RTX_P(X, STRICT) \ + ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X, STRICT)) \ + || (GET_CODE (X) == SUBREG \ && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE ((X))), \ GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (X)))) \ && GET_CODE (SUBREG_REG (X)) == REG \ - && SUBREG_OK_FOR_INDEX_P (SUBREG_REG (X), SUBREG_BYTE (X)))) + && SUBREG_OK_FOR_INDEX_P (SUBREG_REG (X), SUBREG_BYTE (X), STRICT))) -/* Jump to LABEL if X is a valid address RTX. This must also take - REG_OK_STRICT into account when deciding about valid registers, but it uses - the above macros so we are in luck. - - Allow REG - REG+disp - REG+r0 - REG++ - --REG */ - -/* ??? The SH2e does not have the REG+disp addressing mode when loading values - into the FRx registers. We implement this by setting the maximum offset - to zero when the value is SFmode. This also restricts loading of SFmode - values into the integer registers, but that can't be helped. */ - -/* The SH allows a displacement in a QI or HI amode, but only when the - other operand is R0. GCC doesn't handle this very well, so we forgo - all of that. - - A legitimate index for a QI or HI is 0, SI can be any number 0..63, - DI can be any number 0..60. */ - -#define GO_IF_LEGITIMATE_INDEX(MODE, OP, LABEL) \ - do { \ - if (GET_CODE (OP) == CONST_INT) \ - { \ - if (TARGET_SHMEDIA) \ - { \ - int MODE_SIZE; \ - /* Check if this the address of an unaligned load / store. */\ - if ((MODE) == VOIDmode) \ - { \ - if (CONST_OK_FOR_I06 (INTVAL (OP))) \ - goto LABEL; \ - break; \ - } \ - MODE_SIZE = GET_MODE_SIZE (MODE); \ - if (! (INTVAL (OP) & (MODE_SIZE - 1)) \ - && INTVAL (OP) >= -512 * MODE_SIZE \ - && INTVAL (OP) < 512 * MODE_SIZE) \ - goto LABEL; \ - else \ - break; \ - } \ - if (TARGET_SH2A) \ - { \ - if (GET_MODE_SIZE (MODE) == 1 \ - && (unsigned) INTVAL (OP) < 4096) \ - goto LABEL; \ - } \ - if (MODE_DISP_OK_4 ((OP), (MODE))) goto LABEL; \ - if (MODE_DISP_OK_8 ((OP), (MODE))) goto LABEL; \ - } \ - } while(0) +#ifdef REG_OK_STRICT +#define BASE_REGISTER_RTX_P(X) MAYBE_BASE_REGISTER_RTX_P(X, true) +#define INDEX_REGISTER_RTX_P(X) MAYBE_INDEX_REGISTER_RTX_P(X, true) +#else +#define BASE_REGISTER_RTX_P(X) MAYBE_BASE_REGISTER_RTX_P(X, false) +#define INDEX_REGISTER_RTX_P(X) MAYBE_INDEX_REGISTER_RTX_P(X, false) +#endif #define ALLOW_INDEXED_ADDRESS \ ((!TARGET_SHMEDIA32 && !TARGET_SHCOMPACT) || TARGET_ALLOW_INDEXED_ADDRESS) -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ -{ \ - if (BASE_REGISTER_RTX_P (X)) \ - goto LABEL; \ - else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC) \ - && ! TARGET_SHMEDIA \ - && BASE_REGISTER_RTX_P (XEXP ((X), 0))) \ - goto LABEL; \ - else if (GET_CODE (X) == PLUS \ - && ((MODE) != PSImode || reload_completed)) \ - { \ - rtx xop0 = XEXP ((X), 0); \ - rtx xop1 = XEXP ((X), 1); \ - if (GET_MODE_SIZE (MODE) <= 8 && BASE_REGISTER_RTX_P (xop0)) \ - GO_IF_LEGITIMATE_INDEX ((MODE), xop1, LABEL); \ - if ((ALLOW_INDEXED_ADDRESS || GET_MODE (X) == DImode \ - || ((xop0 == stack_pointer_rtx \ - || xop0 == hard_frame_pointer_rtx) \ - && REG_P (xop1) && REGNO (xop1) == R0_REG) \ - || ((xop1 == stack_pointer_rtx \ - || xop1 == hard_frame_pointer_rtx) \ - && REG_P (xop0) && REGNO (xop0) == R0_REG)) \ - && ((!TARGET_SHMEDIA && GET_MODE_SIZE (MODE) <= 4) \ - || (TARGET_SHMEDIA && GET_MODE_SIZE (MODE) <= 8) \ - || ((TARGET_SH4 || TARGET_SH2A_DOUBLE) \ - && TARGET_FMOVD && MODE == DFmode))) \ - { \ - if (BASE_REGISTER_RTX_P (xop1) && INDEX_REGISTER_RTX_P (xop0))\ - goto LABEL; \ - if (INDEX_REGISTER_RTX_P (xop1) && BASE_REGISTER_RTX_P (xop0))\ - goto LABEL; \ - } \ - } \ -} +#define GO_IF_LEGITIMATE_INDEX(MODE, OP, WIN) \ + do { \ + if (sh_legitimate_index_p ((MODE), (OP))) \ + goto WIN; \ + } while (0) + +#ifdef REG_OK_STRICT +#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ + do { \ + if (sh_legitimate_address_p ((MODE), (X), true)) \ + goto LABEL; \ + } while (0) +#else +#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ + do { \ + if (sh_legitimate_address_p ((MODE), (X), false)) \ + goto LABEL; \ + } while (0) +#endif /* A C compound statement that attempts to replace X, which is an address that needs reloading, with a valid memory address for an operand of diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index dc6a7ab6b82..ca69108836f 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -1,6 +1,6 @@ ;;- Machine description for Renesas / SuperH SH. ;; Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -;; 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +;; 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. ;; Contributed by Steve Chamberlain (sac@cygnus.com). ;; Improved by Jim Wilson (wilson@cygnus.com). @@ -646,8 +646,15 @@ (label_ref (match_operand 3 "" "")) (pc))) (clobber (reg:SI T_REG))] - "TARGET_CBRANCHDI4" - "expand_cbranchsi4 (operands, LAST_AND_UNUSED_RTX_CODE, -1); DONE;") + "" + "if (TARGET_SHMEDIA) + emit_jump_insn (gen_cbranchint4_media (operands[0], operands[1], + operands[2], operands[3])); + else if (TARGET_CBRANCHDI4) + expand_cbranchsi4 (operands, LAST_AND_UNUSED_RTX_CODE, -1); + else + sh_emit_compare_and_branch (operands, SImode); + DONE;") ;; ------------------------------------------------------------------------- ;; SImode unsigned integer comparisons @@ -676,23 +683,6 @@ "cmp/hi %1,%0" [(set_attr "type" "mt_group")]) -;; We save the compare operands in the cmpxx patterns and use them when -;; we generate the branch. - -(define_expand "cmpsi" - [(set (reg:SI T_REG) - (compare (match_operand:SI 0 "cmpsi_operand" "") - (match_operand:SI 1 "arith_operand" "")))] - "TARGET_SH1 || TARGET_SHMEDIA" - " -{ - if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == T_REG - && GET_CODE (operands[1]) != CONST_INT) - operands[0] = copy_to_mode_reg (SImode, operands[0]); - sh_compare_op0 = operands[0]; - sh_compare_op1 = operands[1]; - DONE; -}") ;; ------------------------------------------------------------------------- ;; DImode compare and branch @@ -713,29 +703,43 @@ (pc))) (clobber (match_dup 4)) (clobber (reg:SI T_REG))] - "TARGET_CBRANCHDI4" + "TARGET_CBRANCHDI4 || TARGET_SH2 || TARGET_SHMEDIA" " { enum rtx_code comparison; - if (TARGET_EXPAND_CBRANCHDI4) + if (TARGET_SHMEDIA) + { + emit_jump_insn (gen_cbranchint4_media (operands[0], operands[1], + operands[2], operands[3])); + DONE; + } + + else if (!TARGET_CBRANCHDI4) + { + sh_emit_compare_and_branch (operands, DImode); + DONE; + } + + else { if (expand_cbranchdi4 (operands, LAST_AND_UNUSED_RTX_CODE)) DONE; + + comparison = prepare_cbranch_operands (operands, DImode, + LAST_AND_UNUSED_RTX_CODE); + if (comparison != GET_CODE (operands[0])) + operands[0] + = gen_rtx_fmt_ee (comparison, VOIDmode, operands[1], operands[2]); + operands[4] = gen_rtx_SCRATCH (SImode); } - comparison = prepare_cbranch_operands (operands, DImode, - LAST_AND_UNUSED_RTX_CODE); - if (comparison != GET_CODE (operands[0])) - operands[0] - = gen_rtx_fmt_ee (comparison, VOIDmode, operands[1], operands[2]); - operands[4] = gen_rtx_SCRATCH (SImode); }") (define_insn_and_split "cbranchdi4_i" [(set (pc) (if_then_else (match_operator 0 "comparison_operator" [(match_operand:DI 1 "arith_operand" "r,r") - (match_operand:DI 2 "arith_operand" "rN,i")]) + (match_operand:DI 2 "arith_operand" "rN,I08")]) (label_ref (match_operand 3 "" "")) (pc))) (clobber (match_scratch:SI 4 "=X,&r")) @@ -907,20 +911,6 @@ "cmpgtu %1,r63,%0" [(set_attr "type" "cmp_media")]) -;; We save the compare operands in the cmpxx patterns and use them when -;; we generate the branch. - -(define_expand "cmpdi" - [(set (reg:SI T_REG) - (compare (match_operand:DI 0 "arith_operand" "") - (match_operand:DI 1 "arith_operand" "")))] - "TARGET_SH2 || TARGET_SHMEDIA" - " -{ - sh_compare_op0 = operands[0]; - sh_compare_op1 = operands[1]; - DONE; -}") ;; ------------------------------------------------------------------------- ;; Conditional move instructions ;; ------------------------------------------------------------------------- @@ -988,92 +978,20 @@ " { if ((GET_CODE (operands[1]) == EQ || GET_CODE (operands[1]) == NE) - && GET_MODE (sh_compare_op0) == DImode - && sh_compare_op1 == const0_rtx) - operands[1] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode, - sh_compare_op0, sh_compare_op1); + && GET_MODE (XEXP (operands[1], 0)) == DImode + && XEXP (operands[1], 1) == const0_rtx) + ; else { - rtx tmp; - if (!can_create_pseudo_p ()) FAIL; - tmp = gen_reg_rtx (DImode); - - switch (GET_CODE (operands[1])) - { - case EQ: - emit_insn (gen_seq (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case NE: - emit_insn (gen_seq (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case GT: - emit_insn (gen_sgt (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case LT: - emit_insn (gen_slt (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case GE: - emit_insn (gen_slt (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case LE: - emit_insn (gen_sgt (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case GTU: - emit_insn (gen_sgtu (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case LTU: - emit_insn (gen_sltu (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case GEU: - emit_insn (gen_sltu (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case LEU: - emit_insn (gen_sgtu (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case UNORDERED: - emit_insn (gen_sunordered (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case ORDERED: - emit_insn (gen_sunordered (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case UNEQ: - case UNGE: - case UNGT: - case UNLE: - case UNLT: - case LTGT: - FAIL; - - default: - gcc_unreachable (); - } + operands[1] = sh_emit_cheap_store_flag (GET_MODE (operands[0]), + GET_CODE (operands[1]), + XEXP (operands[1], 0), + XEXP (operands[1], 1)); + if (!operands[1]) + FAIL; } }") @@ -1268,24 +1186,26 @@ " { if ((GET_CODE (operands[1]) == EQ || GET_CODE (operands[1]) == NE) - && GET_MODE (sh_compare_op0) == SImode + && GET_MODE (XEXP (operands[1], 0)) == SImode && (TARGET_SHMEDIA - || (REG_P (sh_compare_op0) && REGNO (sh_compare_op0) == T_REG)) - && sh_compare_op1 == const0_rtx) - operands[1] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode, - sh_compare_op0, sh_compare_op1); + || (REG_P (XEXP (operands[1], 0)) + && REGNO (XEXP (operands[1], 0)) == T_REG)) + && XEXP (operands[1], 1) == const0_rtx) + ; + else if (TARGET_PRETEND_CMOVE) { enum rtx_code code = GET_CODE (operands[1]); enum rtx_code new_code = code; - rtx tmp; + rtx op0 = XEXP (operands[1], 0); + rtx op1 = XEXP (operands[1], 1); if (! currently_expanding_to_rtl) FAIL; switch (code) { case LT: case LE: case LEU: case LTU: - if (GET_MODE_CLASS (GET_MODE (sh_compare_op0)) != MODE_INT) + if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_INT) break; case NE: new_code = reverse_condition (code); @@ -1295,92 +1215,21 @@ default: FAIL; } - tmp = prepare_scc_operands (new_code); + sh_emit_scc_to_t (new_code, op0, op1); operands[1] = gen_rtx_fmt_ee (new_code == code ? NE : EQ, VOIDmode, - tmp, const0_rtx); + gen_rtx_REG (SImode, T_REG), const0_rtx); } else { - rtx tmp; - if (!can_create_pseudo_p ()) FAIL; - tmp = gen_reg_rtx (SImode); - - switch (GET_CODE (operands[1])) - { - case EQ: - emit_insn (gen_seq (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case NE: - emit_insn (gen_seq (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case GT: - emit_insn (gen_sgt (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case LT: - emit_insn (gen_slt (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case GE: - emit_insn (gen_slt (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case LE: - emit_insn (gen_sgt (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case GTU: - emit_insn (gen_sgtu (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case LTU: - emit_insn (gen_sltu (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case GEU: - emit_insn (gen_sltu (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case LEU: - emit_insn (gen_sgtu (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case UNORDERED: - emit_insn (gen_sunordered (tmp)); - operands[1] = gen_rtx_NE (VOIDmode, tmp, const0_rtx); - break; - - case ORDERED: - emit_insn (gen_sunordered (tmp)); - operands[1] = gen_rtx_EQ (VOIDmode, tmp, const0_rtx); - break; - - case UNEQ: - case UNGE: - case UNGT: - case UNLE: - case UNLT: - case LTGT: - FAIL; - - default: - abort (); - } + operands[1] = sh_emit_cheap_store_flag (GET_MODE (operands[0]), + GET_CODE (operands[1]), + XEXP (operands[1], 0), + XEXP (operands[1], 1)); + if (!operands[1]) + FAIL; } }") @@ -1887,8 +1736,9 @@ implemented by comparing with the divisor. */ if (operands[1] == const1_rtx && currently_expanding_to_rtl) { - emit_insn (gen_cmpsi (operands[1], operands[2])); - emit_insn (gen_sgeu (operands[0])); + rtx test = gen_rtx_GEU (VOIDmode, operands[1], operands[2]); + emit_insn (gen_cstoresi4 (operands[0], test, + operands[1], operands[2])); DONE; } else if (operands[2] == const0_rtx) @@ -6877,14 +6727,83 @@ label: ;; Conditional branch insns -(define_expand "beq_media" +(define_expand "cbranchint4_media" + [(set (pc) + (if_then_else (match_operator 0 "shmedia_cbranch_comparison_operator" + [(match_operand 1 "" "") + (match_operand 2 "" "")]) + (match_operand 3 "" "") + (pc)))] + "TARGET_SHMEDIA" + " +{ + enum machine_mode mode = GET_MODE (operands[1]); + if (mode == VOIDmode) + mode = GET_MODE (operands[2]); + if (GET_CODE (operands[0]) == EQ || GET_CODE (operands[0]) == NE) + { + operands[1] = force_reg (mode, operands[1]); + if (CONSTANT_P (operands[2]) + && (! satisfies_constraint_I06 (operands[2]))) + operands[2] = force_reg (mode, operands[2]); + } + else + { + if (operands[1] != const0_rtx) + operands[1] = force_reg (mode, operands[1]); + if (operands[2] != const0_rtx) + operands[2] = force_reg (mode, operands[2]); + } + switch (GET_CODE (operands[0])) + { + case LEU: + case LE: + case LTU: + case LT: + operands[0] = gen_rtx_fmt_ee (swap_condition (GET_CODE (operands[0])), + VOIDmode, operands[2], operands[1]); + operands[1] = XEXP (operands[0], 0); + operands[2] = XEXP (operands[0], 1); + break; + default: + operands[0] = gen_rtx_fmt_ee (GET_CODE (operands[0]), + VOIDmode, operands[1], operands[2]); + break; + } + operands[3] = gen_rtx_LABEL_REF (Pmode, operands[3]); +}") + +(define_expand "cbranchfp4_media" [(set (pc) - (if_then_else (eq (match_operand:DI 1 "arith_reg_operand" "r,r") - (match_operand:DI 2 "arith_operand" "r,I06")) - (match_operand 0 "" "") + (if_then_else (match_operator 0 "sh_float_comparison_operator" + [(match_operand 1 "" "") + (match_operand 2 "" "")]) + (match_operand 3 "" "") (pc)))] "TARGET_SHMEDIA" - "operands[0] = gen_rtx_LABEL_REF (Pmode, operands[0]);") + " +{ + /* hack to generate same code. */ + rtx tmp_di = GET_CODE (operands[0]) == UNORDERED ? NULL : gen_reg_rtx (DImode); + rtx tmp = gen_reg_rtx (SImode); + rtx cmp; + if (GET_CODE (operands[0]) == NE) + cmp = gen_rtx_EQ (SImode, operands[1], operands[2]); + else + cmp = gen_rtx_fmt_ee (GET_CODE (operands[0]), SImode, + operands[1], operands[2]); + + emit_insn (gen_cstore4_media (tmp, cmp, operands[1], operands[2])); + if (tmp_di) emit_insn (gen_extendsidi2 (tmp_di, tmp)); else tmp_di = tmp; + + if (GET_CODE (cmp) == GET_CODE (operands[0])) + operands[0] = gen_rtx_NE (VOIDmode, tmp_di, const0_rtx); + else + operands[0] = gen_rtx_EQ (VOIDmode, tmp_di, const0_rtx); + operands[1] = tmp_di; + operands[2] = const0_rtx; + operands[3] = gen_rtx_LABEL_REF (Pmode, operands[3]); +}") (define_insn "*beq_media_i" [(set (pc) @@ -6912,51 +6831,6 @@ label: b%o3i%' %1, %2, %0%>" [(set_attr "type" "cbranch_media")]) -(define_expand "bne_media" - [(set (pc) - (if_then_else (ne (match_operand:DI 1 "arith_reg_operand" "r,r") - (match_operand:DI 2 "arith_operand" "r,I06")) - (match_operand 0 "" "") - (pc)))] - "TARGET_SHMEDIA" - "operands[0] = gen_rtx_LABEL_REF (Pmode, operands[0]);") - -(define_expand "bgt_media" - [(set (pc) - (if_then_else (gt (match_operand:DI 1 "arith_reg_or_0_operand" "") - (match_operand:DI 2 "arith_reg_or_0_operand" "")) - (match_operand 0 "" "") - (pc)))] - "TARGET_SHMEDIA" - "operands[0] = gen_rtx_LABEL_REF (Pmode, operands[0]);") - -(define_expand "bge_media" - [(set (pc) - (if_then_else (ge (match_operand:DI 1 "arith_reg_or_0_operand" "") - (match_operand:DI 2 "arith_reg_or_0_operand" "")) - (match_operand 0 "" "") - (pc)))] - "TARGET_SHMEDIA" - "operands[0] = gen_rtx_LABEL_REF (Pmode, operands[0]);") - -(define_expand "bgtu_media" - [(set (pc) - (if_then_else (gtu (match_operand:DI 1 "arith_reg_or_0_operand" "") - (match_operand:DI 2 "arith_reg_or_0_operand" "")) - (match_operand 0 "" "") - (pc)))] - "TARGET_SHMEDIA" - "operands[0] = gen_rtx_LABEL_REF (Pmode, operands[0]);") - -(define_expand "bgeu_media" - [(set (pc) - (if_then_else (geu (match_operand:DI 1 "arith_reg_or_0_operand" "") - (match_operand:DI 2 "arith_reg_or_0_operand" "")) - (match_operand 0 "" "") - (pc)))] - "TARGET_SHMEDIA" - "operands[0] = gen_rtx_LABEL_REF (Pmode, operands[0]);") - (define_insn "*bgt_media_i" [(set (pc) (if_then_else (match_operator 3 "greater_comparison_operator" @@ -7003,343 +6877,6 @@ label: "b%o3%' %N2, %N1, %0%>" [(set_attr "type" "cbranch_media")]) -(define_expand "beq" - [(set (pc) - (if_then_else (ne (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (mode != DImode && mode != SImode) - { - rtx tmp = gen_reg_rtx (DImode); - - emit_insn (gen_seq (tmp)); - emit_jump_insn (gen_bne_media (operands[0], tmp, const0_rtx)); - DONE; - } - - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (CONSTANT_P (sh_compare_op1) - && (! satisfies_constraint_I06 (sh_compare_op1))) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_beq_media (operands[0], - sh_compare_op0, sh_compare_op1)); - DONE; - } - - from_compare (operands, EQ); -}") - -(define_expand "bne" - [(set (pc) - (if_then_else (eq (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (mode != DImode && mode != SImode) - { - rtx tmp = gen_reg_rtx (DImode); - - emit_insn (gen_seq (tmp)); - emit_jump_insn (gen_beq_media (operands[0], tmp, const0_rtx)); - DONE; - } - - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (CONSTANT_P (sh_compare_op1) - && (! satisfies_constraint_I06 (sh_compare_op1))) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bne_media (operands[0], - sh_compare_op0, sh_compare_op1)); - DONE; - } - - from_compare (operands, EQ); -}") - -(define_expand "bgt" - [(set (pc) - (if_then_else (ne (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (mode != DImode && mode != SImode) - { - rtx tmp = gen_reg_rtx (DImode); - - emit_insn (gen_sgt (tmp)); - emit_jump_insn (gen_bne_media (operands[0], tmp, const0_rtx)); - DONE; - } - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bgt_media (operands[0], - sh_compare_op0, sh_compare_op1)); - DONE; - } - - from_compare (operands, GT); -}") - -(define_expand "blt" - [(set (pc) - (if_then_else (eq (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (mode != DImode && mode != SImode) - { - rtx tmp = gen_reg_rtx (DImode); - - emit_insn (gen_slt (tmp)); - emit_jump_insn (gen_bne_media (operands[0], tmp, const0_rtx)); - DONE; - } - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bgt_media (operands[0], - sh_compare_op1, sh_compare_op0)); - DONE; - } - - if (GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT) - { - rtx tmp = sh_compare_op0; - sh_compare_op0 = sh_compare_op1; - sh_compare_op1 = tmp; - emit_insn (gen_bgt (operands[0])); - DONE; - } - from_compare (operands, GE); -}") - -(define_expand "ble" - [(set (pc) - (if_then_else (eq (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (mode != DImode && mode != SImode) - { - rtx tmp = gen_reg_rtx (DImode); - - emit_insn (gen_sle (tmp)); - emit_jump_insn (gen_bne_media (operands[0], tmp, const0_rtx)); - DONE; - } - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bge_media (operands[0], - sh_compare_op1, sh_compare_op0)); - DONE; - } - - if (TARGET_SH2E - && TARGET_IEEE - && GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT) - { - rtx tmp = sh_compare_op0; - sh_compare_op0 = sh_compare_op1; - sh_compare_op1 = tmp; - emit_insn (gen_bge (operands[0])); - DONE; - } - from_compare (operands, GT); -}") - -(define_expand "bge" - [(set (pc) - (if_then_else (ne (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (mode != DImode && mode != SImode) - { - rtx tmp = gen_reg_rtx (DImode); - - emit_insn (gen_sge (tmp)); - emit_jump_insn (gen_bne_media (operands[0], tmp, const0_rtx)); - DONE; - } - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bge_media (operands[0], - sh_compare_op0, sh_compare_op1)); - DONE; - } - - if (TARGET_SH2E - && ! TARGET_IEEE - && GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT) - { - rtx tmp = sh_compare_op0; - sh_compare_op0 = sh_compare_op1; - sh_compare_op1 = tmp; - emit_insn (gen_ble (operands[0])); - DONE; - } - from_compare (operands, GE); -}") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (ne (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bgtu_media (operands[0], - sh_compare_op0, sh_compare_op1)); - DONE; - } - - from_compare (operands, GTU); -}") - -(define_expand "bltu" - [(set (pc) - (if_then_else (eq (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bgtu_media (operands[0], - sh_compare_op1, sh_compare_op0)); - DONE; - } - - from_compare (operands, GEU); -}") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (ne (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bgeu_media (operands[0], - sh_compare_op0, sh_compare_op1)); - DONE; - } - - from_compare (operands, GEU); -}") - -(define_expand "bleu" - [(set (pc) - (if_then_else (eq (reg:SI T_REG) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - " -{ - if (TARGET_SHMEDIA) - { - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if (sh_compare_op0 != const0_rtx) - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - emit_jump_insn (gen_bgeu_media (operands[0], - sh_compare_op1, sh_compare_op0)); - DONE; - } - - from_compare (operands, GTU); -}") - -(define_expand "bunordered" - [(set (match_dup 1) (unordered:SI (match_dup 2) (match_dup 3))) - (set (pc) - (if_then_else (ne (match_dup 1) (const_int 0)) - (match_operand 0 "" "") - (pc)))] - "TARGET_SHMEDIA" - " -{ - operands[0] = gen_rtx_LABEL_REF (Pmode, operands[0]); - operands[1] = gen_reg_rtx (SImode); - operands[2] = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - operands[3] = force_reg (GET_MODE (sh_compare_op1), sh_compare_op1); -}") - ;; combiner splitter for test-and-branch on single bit in register. This ;; is endian dependent because the non-paradoxical subreg looks different ;; on big endian. @@ -9120,15 +8657,17 @@ mov.l\\t1f,r0\\n\\ rtx reg3 = gen_reg_rtx (Pmode); rtx reg4 = gen_reg_rtx (Pmode); rtx reg5 = gen_reg_rtx (Pmode); - rtx load; + rtx load, test; operands[0] = convert_modes (DImode, SImode, operands[0], 0); operands[1] = convert_modes (DImode, SImode, operands[1], 0); operands[2] = convert_modes (DImode, SImode, operands[2], 1); - emit_jump_insn (gen_bgt_media (operands[4], operands[1], operands[0])); + test = gen_rtx_GT (VOIDmode, operands[1], operands[0]); + emit_jump_insn (gen_cbranchdi4 (test, operands[1], operands[0], operands[4])); emit_move_insn (reg, gen_rtx_MINUS (DImode, operands[0], operands[1])); - emit_jump_insn (gen_bgtu_media (operands[4], reg, operands[2])); + test = gen_rtx_GTU (VOIDmode, reg, operands[2]); + emit_jump_insn (gen_cbranchdi4 (test, reg, operands[2], operands[4])); emit_insn (gen_casesi_shift_media (reg2, reg, operands[3])); emit_move_insn (reg3, gen_datalabel_ref (gen_rtx_LABEL_REF (Pmode, operands[3]))); @@ -9580,536 +9119,133 @@ mov.l\\t1f,r0\\n\\ "movrt\\t%0" [(set_attr "type" "arith")]) -(define_expand "seq" - [(set (match_operand:SI 0 "arith_reg_dest" "") - (match_dup 1))] - "" - " -{ - if (TARGET_SHMEDIA) - { - rtx reg; - - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - if (GET_MODE_SIZE (GET_MODE (operands[0])) <= 4) - { - if (GET_MODE (operands[0]) != SImode) - operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0); - - switch (GET_MODE (sh_compare_op0)) - { - case SImode: - emit_insn (gen_cmpeqsi_media (operands[0], - sh_compare_op0, sh_compare_op1)); - break; - - case DImode: - emit_insn (gen_cmpeqdi_media (operands[0], - sh_compare_op0, sh_compare_op1)); - break; - - case SFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpeqsf_media (operands[0], - sh_compare_op0, sh_compare_op1)); - break; - - case DFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpeqdf_media (operands[0], - sh_compare_op0, sh_compare_op1)); - break; - - default: - FAIL; - } - DONE; - } - - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - - switch (GET_MODE (sh_compare_op0)) - { - case SImode: - emit_insn (gen_cmpeqsi_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - case DImode: - emit_insn (gen_cmpeqdi_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - case SFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpeqsf_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - case DFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpeqdf_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - default: - FAIL; - } - - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - - DONE; - } - if (sh_expand_t_scc (EQ, operands[0])) - DONE; - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (EQ); -}") - -(define_expand "slt" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (match_dup 1))] - "" +(define_expand "cstore4_media" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 1 "sh_float_comparison_operator" + [(match_operand 2 "logical_operand" "") + (match_operand 3 "cmp_operand" "")]))] + "TARGET_SHMEDIA" " { - if (TARGET_SHMEDIA) + enum machine_mode mode = GET_MODE (operands[2]); + enum rtx_code code = GET_CODE (operands[1]); + bool invert, swap; + if (mode == VOIDmode) + mode = GET_MODE (operands[3]); + if (operands[2] == const0_rtx) { - rtx reg; - - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - - switch (GET_MODE (sh_compare_op0)) - { - case SImode: - emit_insn (gen_cmpgtsi_media (reg, - sh_compare_op1, sh_compare_op0)); - break; - - case DImode: - emit_insn (gen_cmpgtdi_media (reg, - sh_compare_op1, sh_compare_op0)); - break; - - case SFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgtsf_media (reg, - sh_compare_op1, sh_compare_op0)); - break; - - case DFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgtdf_media (reg, - sh_compare_op1, sh_compare_op0)); - break; - - default: - FAIL; - } - - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - - DONE; + if (code == EQ || code == NE) + operands[2] = operands[3], operands[3] = const0_rtx; } - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (LT); -}") - -(define_expand "sle" - [(match_operand:SI 0 "arith_reg_operand" "")] - "" - " -{ - rtx tmp = sh_compare_op0; + else + operands[2] = force_reg (mode, operands[2]); + if (operands[3] != const0_rtx) + operands[3] = force_reg (mode, operands[3]); - if (TARGET_SHMEDIA) + switch (code) { - rtx reg; - - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - - switch (GET_MODE (sh_compare_op0)) - { - case SImode: - { - tmp = !can_create_pseudo_p () ? reg : gen_reg_rtx (SImode); - - emit_insn (gen_cmpgtsi_media (tmp, - sh_compare_op0, sh_compare_op1)); - emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx)); - break; - } - - case DImode: - { - tmp = !can_create_pseudo_p () ? reg : gen_reg_rtx (SImode); - - emit_insn (gen_cmpgtdi_media (tmp, - sh_compare_op0, sh_compare_op1)); - emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx)); - break; - } - - case SFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgesf_media (reg, - sh_compare_op1, sh_compare_op0)); - break; + case GEU: + case GE: + swap = invert = !FLOAT_MODE_P (mode); + break; - case DFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgedf_media (reg, - sh_compare_op1, sh_compare_op0)); - break; + case LEU: + case LE: + swap = FLOAT_MODE_P (mode), invert = !swap; + break; - default: - FAIL; - } + case LTU: + case LT: + swap = true, invert = false; + break; - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); + case GTU: + case GT: + case EQ: + case UNORDERED: + swap = invert = false; + break; - DONE; - } + case NE: + swap = invert = true; + break; - sh_compare_op0 = sh_compare_op1; - sh_compare_op1 = tmp; - emit_insn (gen_sge (operands[0])); - DONE; -}") + default: + gcc_unreachable (); + } -(define_expand "sgt" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (match_dup 1))] - "" - " -{ - if (TARGET_SHMEDIA) + if (swap) { - rtx reg; - - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () ? - gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - - switch (GET_MODE (sh_compare_op0)) - { - case SImode: - emit_insn (gen_cmpgtsi_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - case DImode: - emit_insn (gen_cmpgtdi_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - case SFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgtsf_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - case DFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgtdf_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - default: - FAIL; - } - - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - - DONE; + rtx tem = operands[2]; + operands[2] = operands[3]; + operands[3] = tem; + code = swap_condition (code); } - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (GT); -}") -(define_expand "sge" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (match_dup 1))] - "" - " -{ - if (TARGET_SHMEDIA) + if (invert) { - rtx reg; - enum machine_mode mode = GET_MODE (sh_compare_op0); - - if ((mode) == VOIDmode) - mode = GET_MODE (sh_compare_op1); - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - sh_compare_op0 = force_reg (mode, sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (mode, sh_compare_op1); - - switch (mode) - { - case SImode: - { - rtx tmp = !can_create_pseudo_p () ? reg : gen_reg_rtx (SImode); - - emit_insn (gen_cmpgtsi_media (tmp, - sh_compare_op1, sh_compare_op0)); - emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx)); - break; - } - - case DImode: - { - rtx tmp = !can_create_pseudo_p () ? reg : gen_reg_rtx (SImode); - - emit_insn (gen_cmpgtdi_media (tmp, - sh_compare_op1, sh_compare_op0)); - emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx)); - break; - } - - case SFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgesf_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - case DFmode: - if (! TARGET_SHMEDIA_FPU) - FAIL; - emit_insn (gen_cmpgedf_media (reg, - sh_compare_op0, sh_compare_op1)); - break; - - default: - FAIL; - } - - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - - DONE; + rtx tem = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0]; + code = reverse_condition (code); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, operands[2], operands[3]); + emit_insn (gen_cstore4_media (tem, operands[1], + operands[2], operands[3])); + code = EQ; + operands[2] = tem; + operands[3] = const0_rtx; } - if (! currently_expanding_to_rtl) - FAIL; - if (GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT) - { - if (TARGET_IEEE) - { - rtx lab = gen_label_rtx (); - prepare_scc_operands (EQ); - emit_jump_insn (gen_branch_true (lab)); - prepare_scc_operands (GT); - emit_label (lab); - emit_insn (gen_movt (operands[0])); - } - else - emit_insn (gen_movnegt (operands[0], prepare_scc_operands (LT))); - DONE; - } - operands[1] = prepare_scc_operands (GE); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, operands[2], operands[3]); }") -(define_expand "sgtu" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (match_dup 1))] - "" - " -{ - if (TARGET_SHMEDIA) +(define_expand "cstoresi4" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 1 "comparison_operator" + [(match_operand:SI 2 "cmpsi_operand" "") + (match_operand:SI 3 "arith_operand" "")]))] + "TARGET_SH1 || TARGET_SHMEDIA" + "if (TARGET_SHMEDIA) { - rtx reg; - - reg = operands[0]; - if (GET_MODE (operands[0]) == DImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - - emit_insn (gen_cmpgtudi_media (reg, - sh_compare_op0, sh_compare_op1)); - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - + emit_insn (gen_cstore4_media (operands[0], operands[1], + operands[2], operands[3])); DONE; } - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (GTU); -}") -(define_expand "sltu" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (match_dup 1))] - "" - " -{ - if (TARGET_SHMEDIA) - { - rtx reg; - - reg = operands[0]; - if (GET_MODE (operands[0]) == DImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - - emit_insn (gen_cmpgtudi_media (reg, - sh_compare_op1, sh_compare_op0)); - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); + if ((GET_CODE (operands[1]) == EQ || GET_CODE (operands[1]) == NE) + && sh_expand_t_scc (operands)) + DONE; - DONE; - } - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (LTU); -}") + if (! currently_expanding_to_rtl) + FAIL; + + sh_emit_compare_and_set (operands, SImode); + DONE; +") -(define_expand "sleu" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (match_dup 1))] - "" - " -{ - if (TARGET_SHMEDIA) +(define_expand "cstoredi4" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 1 "comparison_operator" + [(match_operand:DI 2 "arith_operand" "") + (match_operand:DI 3 "arith_operand" "")]))] + "TARGET_SH2 || TARGET_SHMEDIA" + "if (TARGET_SHMEDIA) { - rtx tmp, reg; - - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - - tmp = !can_create_pseudo_p () ? reg : gen_reg_rtx (SImode); - - emit_insn (gen_cmpgtudi_media (tmp, sh_compare_op0, sh_compare_op1)); - emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx)); - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - + emit_insn (gen_cstore4_media (operands[0], operands[1], + operands[2], operands[3])); DONE; } - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (LEU); -}") -(define_expand "sgeu" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (match_dup 1))] - "" - " -{ - if (TARGET_SHMEDIA) - { - rtx tmp, reg; - - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); + if ((GET_CODE (operands[1]) == EQ || GET_CODE (operands[1]) == NE) + && sh_expand_t_scc (operands)) + DONE; - tmp = !can_create_pseudo_p () ? operands[0] : gen_reg_rtx (SImode); + if (! currently_expanding_to_rtl) + FAIL; + + sh_emit_compare_and_set (operands, DImode); + DONE; +") - emit_insn (gen_cmpgtudi_media (tmp, sh_compare_op1, sh_compare_op0)); - emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx)); - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - DONE; - } - - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (GEU); -}") ;; sne moves the complement of the T reg to DEST like this: ;; cmp/eq ... @@ -10119,81 +9255,20 @@ mov.l\\t1f,r0\\n\\ ;; not require r0 and further, the -1 may be CSE-ed or lifted out of a ;; loop. -(define_expand "sne" - [(set (match_dup 2) (const_int -1)) - (parallel [(set (match_operand:SI 0 "arith_reg_operand" "") - (neg:SI (plus:SI (match_dup 1) - (match_dup 2)))) +(define_expand "movnegt" + [(set (match_dup 1) (const_int -1)) + (parallel [(set (match_operand:SI 0 "" "") + (neg:SI (plus:SI (reg:SI T_REG) + (match_dup 1)))) (set (reg:SI T_REG) - (ne:SI (ior:SI (match_dup 1) (match_dup 2)) + (ne:SI (ior:SI (reg:SI T_REG) (match_dup 1)) (const_int 0)))])] "" " { - if (TARGET_SHMEDIA) - { - rtx tmp, reg; - - reg = operands[0]; - if (GET_MODE (operands[0]) != SImode) - reg = (!can_create_pseudo_p () - ? gen_rtx_SUBREG (SImode, operands[0], 0) - : gen_reg_rtx (SImode)); - if (! TARGET_SHMEDIA_FPU - && GET_MODE (sh_compare_op0) != DImode - && GET_MODE (sh_compare_op0) != SImode) - FAIL; - - sh_compare_op0 = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - if (sh_compare_op1 != const0_rtx) - sh_compare_op1 = force_reg (GET_MODE (sh_compare_op1) == VOIDmode - ? GET_MODE (sh_compare_op0) - : GET_MODE (sh_compare_op1), - sh_compare_op1); - - tmp = !can_create_pseudo_p () ? reg : gen_reg_rtx (SImode); - - emit_insn (gen_seq (tmp)); - emit_insn (gen_cmpeqdi_media (reg, tmp, const0_rtx)); - if (GET_MODE (operands[0]) == DImode) - emit_insn (gen_extendsidi2 (operands[0], reg)); - - DONE; - } - - if (sh_expand_t_scc (NE, operands[0])) - DONE; - if (! currently_expanding_to_rtl) - FAIL; - operands[1] = prepare_scc_operands (EQ); - operands[2] = gen_reg_rtx (SImode); -}") - -(define_expand "sunordered" - [(set (match_operand:SI 0 "arith_reg_operand" "") - (unordered:SI (match_dup 1) (match_dup 2)))] - "TARGET_SHMEDIA_FPU" - " -{ - operands[1] = force_reg (GET_MODE (sh_compare_op0), sh_compare_op0); - operands[2] = force_reg (GET_MODE (sh_compare_op1), sh_compare_op1); + operands[1] = gen_reg_rtx (SImode); }") -;; Use the same trick for FP sle / sge - -;; Apart from the constant use and the T setting, this is like movt, -;; except that it uses the logically negated value of T, i.e. -;; operand[0] := T ? 0 : 1. -(define_expand "movnegt" - [(set (match_dup 2) (const_int -1)) - (parallel [(set (match_operand 0 "" "") - (neg:SI (plus:SI (match_dup 1) - (match_dup 2)))) - (set (reg:SI T_REG) - (ne:SI (ior:SI (match_operand 1 "" "") (match_dup 2)) - (const_int 0)))])] - "TARGET_SH1" - "operands[2] = gen_reg_rtx (SImode);") ;; Recognize mov #-1/negc/neg sequence, and change it to movt/add #-1. ;; This prevents a regression that occurred when we switched from xor to @@ -10208,6 +9283,47 @@ mov.l\\t1f,r0\\n\\ (set (match_dup 0) (plus:SI (match_dup 0) (const_int -1)))] "") +(define_expand "cstoresf4" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 1 "sh_float_comparison_operator" + [(match_operand:SF 2 "arith_operand" "") + (match_operand:SF 3 "arith_operand" "")]))] + "TARGET_SH2E || TARGET_SHMEDIA_FPU" + "if (TARGET_SHMEDIA) + { + emit_insn (gen_cstore4_media (operands[0], operands[1], + operands[2], operands[3])); + DONE; + } + + if (! currently_expanding_to_rtl) + FAIL; + + sh_emit_compare_and_set (operands, SFmode); + DONE; +") + +(define_expand "cstoredf4" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 1 "sh_float_comparison_operator" + [(match_operand:DF 2 "arith_operand" "") + (match_operand:DF 3 "arith_operand" "")]))] + "(TARGET_SH4 || TARGET_SH2A_DOUBLE) || TARGET_SHMEDIA_FPU" + "if (TARGET_SHMEDIA) + { + emit_insn (gen_cstore4_media (operands[0], operands[1], + operands[2], operands[3])); + DONE; + } + + if (! currently_expanding_to_rtl) + FAIL; + + sh_emit_compare_and_set (operands, DFmode); + DONE; +") + + ;; ------------------------------------------------------------------------- ;; Instructions to cope with inline literal tables ;; ------------------------------------------------------------------------- @@ -10986,15 +10102,21 @@ mov.l\\t1f,r0\\n\\ "fcmpun.s %1, %2, %0" [(set_attr "type" "fcmp_media")]) -(define_expand "cmpsf" - [(set (reg:SI T_REG) - (compare (match_operand:SF 0 "arith_operand" "") - (match_operand:SF 1 "arith_operand" "")))] +(define_expand "cbranchsf4" + [(set (pc) + (if_then_else (match_operator 0 "sh_float_comparison_operator" + [(match_operand:SF 1 "arith_operand" "") + (match_operand:SF 2 "arith_operand" "")]) + (match_operand 3 "" "") + (pc)))] "TARGET_SH2E || TARGET_SHMEDIA_FPU" " { - sh_compare_op0 = operands[0]; - sh_compare_op1 = operands[1]; + if (TARGET_SHMEDIA) + emit_jump_insn (gen_cbranchfp4_media (operands[0], operands[1], operands[2], + operands[3])); + else + sh_emit_compare_and_branch (operands, SFmode); DONE; }") @@ -11484,18 +10606,25 @@ mov.l\\t1f,r0\\n\\ "fcmpun.d %1,%2,%0" [(set_attr "type" "fcmp_media")]) -(define_expand "cmpdf" - [(set (reg:SI T_REG) - (compare (match_operand:DF 0 "arith_operand" "") - (match_operand:DF 1 "arith_operand" "")))] +(define_expand "cbranchdf4" + [(set (pc) + (if_then_else (match_operator 0 "sh_float_comparison_operator" + [(match_operand:DF 1 "arith_operand" "") + (match_operand:DF 2 "arith_operand" "")]) + (match_operand 3 "" "") + (pc)))] "(TARGET_SH4 || TARGET_SH2A_DOUBLE) || TARGET_SHMEDIA_FPU" " { - sh_compare_op0 = operands[0]; - sh_compare_op1 = operands[1]; + if (TARGET_SHMEDIA) + emit_jump_insn (gen_cbranchfp4_media (operands[0], operands[1], operands[2], + operands[3])); + else + sh_emit_compare_and_branch (operands, DFmode); DONE; }") + (define_expand "negdf2" [(set (match_operand:DF 0 "arith_reg_operand" "") (neg:DF (match_operand:DF 1 "arith_reg_operand" "")))] @@ -14144,15 +13273,21 @@ mov.l\\t1f,r0\\n\\ if (TARGET_SHMEDIA) { rtx tmp = gen_reg_rtx (GET_MODE (operands[0])); + rtx test; + test = gen_rtx_NE (VOIDmode, tmp, const0_rtx); if (TARGET_SHMEDIA64) - emit_insn (gen_stack_protect_test_di_media (tmp, operands[0], - operands[1])); + { + emit_insn (gen_stack_protect_test_di_media (tmp, operands[0], + operands[1])); + emit_jump_insn (gen_cbranchdi4 (test, tmp, const0_rtx, operands[2])); + } else - emit_insn (gen_stack_protect_test_si_media (tmp, operands[0], - operands[1])); - - emit_jump_insn (gen_bne_media (operands[2], tmp, const0_rtx)); + { + emit_insn (gen_stack_protect_test_si_media (tmp, operands[0], + operands[1])); + emit_jump_insn (gen_cbranchsi4 (test, tmp, const0_rtx, operands[2])); + } } else { diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt index 9aaba6c151e..8aa0c9f1b7c 100644 --- a/gcc/config/sh/sh.opt +++ b/gcc/config/sh/sh.opt @@ -1,6 +1,6 @@ ; Options for the SH port of the compiler. -; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. ; ; This file is part of GCC. ; @@ -224,13 +224,9 @@ mcbranchdi Target Var(TARGET_CBRANCHDI4) Enable cbranchdi4 pattern -mexpand-cbranchdi -Target Var(TARGET_EXPAND_CBRANCHDI4) -Expand cbranchdi4 pattern early into separate comparisons and branches. - mcmpeqdi Target Var(TARGET_CMPEQDI_T) -Emit cmpeqdi_t pattern even when -mcbranchdi and -mexpand-cbranchdi are in effect. +Emit cmpeqdi_t pattern even when -mcbranchdi is in effect. mcut2-workaround Target RejectNegative Var(TARGET_SH5_CUT2_WORKAROUND) diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index 40ac75e130c..8b3547ad907 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -54,22 +54,19 @@ extern void sparc_output_scratch_registers (FILE *); #ifdef RTX_CODE extern enum machine_mode select_cc_mode (enum rtx_code, rtx, rtx); /* Define the function that build the compare insn for scc and bcc. */ -extern rtx gen_compare_reg (enum rtx_code code); -extern rtx gen_compare_operator (enum rtx_code code); -extern enum rtx_code sparc_emit_float_lib_cmp (rtx, rtx, enum rtx_code); +extern rtx gen_compare_reg (rtx cmp); +extern rtx sparc_emit_float_lib_cmp (rtx, rtx, enum rtx_code); extern void sparc_emit_floatunsdi (rtx [2], enum machine_mode); extern void sparc_emit_fixunsdi (rtx [2], enum machine_mode); extern void emit_tfmode_binop (enum rtx_code, rtx *); extern void emit_tfmode_unop (enum rtx_code, rtx *); extern void emit_tfmode_cvt (enum rtx_code, rtx *); /* This function handles all v9 scc insns */ -extern int gen_v9_scc (enum rtx_code, rtx *); extern void sparc_initialize_trampoline (rtx, rtx, rtx); extern void sparc64_initialize_trampoline (rtx, rtx, rtx); extern bool legitimate_constant_p (rtx); extern bool constant_address_p (rtx); extern bool legitimate_pic_operand_p (rtx); -extern int legitimate_address_p (enum machine_mode, rtx, int); extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); extern rtx legitimize_tls_address (rtx); extern void sparc_emit_call_insn (rtx, rtx); @@ -86,7 +83,8 @@ extern const char *output_return (rtx); extern const char *output_sibcall (rtx, rtx); extern const char *output_v8plus_shift (rtx *, rtx, const char *); extern const char *output_v9branch (rtx, rtx, int, int, int, int, rtx); -extern void emit_v9_brxx_insn (enum rtx_code, rtx, rtx); +extern bool emit_scc_insn (rtx []); +extern void emit_conditional_branch_insn (rtx []); extern void print_operand (FILE *, rtx, int); extern int mems_ok_for_ldd_peep (rtx, rtx, rtx); extern int arith_double_4096_operand (rtx, enum machine_mode); diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index ab2b57bbcd9..d6467bdc2dd 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -280,10 +280,6 @@ static GTY(()) alias_set_type sparc_sr_alias_set; /* The alias set for the structure return value. */ static GTY(()) alias_set_type struct_value_alias_set; -/* Save the operands last given to a compare for use when we - generate a scc or bcc insn. */ -rtx sparc_compare_op0, sparc_compare_op1; - /* Vector to say how input registers are mapped to output registers. HARD_FRAME_POINTER_REGNUM cannot be remapped by this function to eliminate it. You must use -fomit-frame-pointer to get that. */ @@ -361,6 +357,7 @@ static int hypersparc_adjust_cost (rtx, rtx, rtx, int); static void sparc_output_addr_vec (rtx); static void sparc_output_addr_diff_vec (rtx); static void sparc_output_deferred_case_vectors (void); +static bool sparc_legitimate_address_p (enum machine_mode, rtx, bool); static rtx sparc_builtin_saveregs (void); static int epilogue_renumber (rtx *, int); static bool sparc_assemble_integer (rtx, unsigned int, int); @@ -592,6 +589,9 @@ static bool fpu_option_set = false; #define TARGET_MANGLE_TYPE sparc_mangle_type #endif +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P sparc_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; /* Implement TARGET_HANDLE_OPTION. */ @@ -2005,19 +2005,18 @@ select_cc_mode (enum rtx_code op, rtx x, rtx y ATTRIBUTE_UNUSED) } } -/* Emit the compare insn and return the CC reg for a CODE comparison. */ +/* Emit the compare insn and return the CC reg for a CODE comparison + with operands X and Y. */ -rtx -gen_compare_reg (enum rtx_code code) +static rtx +gen_compare_reg_1 (enum rtx_code code, rtx x, rtx y) { enum machine_mode mode; - rtx x, y, cc_reg; + rtx cc_reg; - if (GET_MODE_CLASS (GET_MODE (sparc_compare_op0)) == MODE_CC) - return sparc_compare_op0; + if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) + return x; - x = sparc_compare_op0; - y = sparc_compare_op1; mode = SELECT_CC_MODE (code, x, y); /* ??? We don't have movcc patterns so we cannot generate pseudo regs for the @@ -2073,26 +2072,19 @@ gen_compare_reg (enum rtx_code code) return cc_reg; } -/* Same as above but return the whole compare operator. */ + +/* Emit the compare insn and return the CC reg for the comparison in CMP. */ rtx -gen_compare_operator (enum rtx_code code) +gen_compare_reg (rtx cmp) { - rtx cc_reg; - - if (GET_MODE (sparc_compare_op0) == TFmode && !TARGET_HARD_QUAD) - code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, code); - - cc_reg = gen_compare_reg (code); - return gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx); + return gen_compare_reg_1 (GET_CODE (cmp), XEXP (cmp, 0), XEXP (cmp, 1)); } /* This function is used for v9 only. + DEST is the target of the Scc insn. CODE is the code for an Scc's comparison. - OPERANDS[0] is the target of the Scc insn. - OPERANDS[1] is the value we compare against const0_rtx (which hasn't - been generated yet). + X and Y are the values we compare. This function is needed to turn @@ -2106,53 +2098,50 @@ gen_compare_operator (enum rtx_code code) IE: The instruction recognizer needs to see the mode of the comparison to find the right instruction. We could use "gt:DI" right in the - define_expand, but leaving it out allows us to handle DI, SI, etc. - - We refer to the global sparc compare operands sparc_compare_op0 and - sparc_compare_op1. */ + define_expand, but leaving it out allows us to handle DI, SI, etc. */ -int -gen_v9_scc (enum rtx_code compare_code, register rtx *operands) +static int +gen_v9_scc (rtx dest, enum rtx_code compare_code, rtx x, rtx y) { if (! TARGET_ARCH64 - && (GET_MODE (sparc_compare_op0) == DImode - || GET_MODE (operands[0]) == DImode)) + && (GET_MODE (x) == DImode + || GET_MODE (dest) == DImode)) return 0; /* Try to use the movrCC insns. */ if (TARGET_ARCH64 - && GET_MODE_CLASS (GET_MODE (sparc_compare_op0)) == MODE_INT - && sparc_compare_op1 == const0_rtx + && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT + && y == const0_rtx && v9_regcmp_p (compare_code)) { - rtx op0 = sparc_compare_op0; + rtx op0 = x; rtx temp; /* Special case for op0 != 0. This can be done with one instruction if - operands[0] == sparc_compare_op0. */ + dest == x. */ if (compare_code == NE - && GET_MODE (operands[0]) == DImode - && rtx_equal_p (op0, operands[0])) + && GET_MODE (dest) == DImode + && rtx_equal_p (op0, dest)) { - emit_insn (gen_rtx_SET (VOIDmode, operands[0], + emit_insn (gen_rtx_SET (VOIDmode, dest, gen_rtx_IF_THEN_ELSE (DImode, gen_rtx_fmt_ee (compare_code, DImode, op0, const0_rtx), const1_rtx, - operands[0]))); + dest))); return 1; } - if (reg_overlap_mentioned_p (operands[0], op0)) + if (reg_overlap_mentioned_p (dest, op0)) { - /* Handle the case where operands[0] == sparc_compare_op0. + /* Handle the case where dest == x. We "early clobber" the result. */ - op0 = gen_reg_rtx (GET_MODE (sparc_compare_op0)); - emit_move_insn (op0, sparc_compare_op0); + op0 = gen_reg_rtx (GET_MODE (x)); + emit_move_insn (op0, x); } - emit_insn (gen_rtx_SET (VOIDmode, operands[0], const0_rtx)); + emit_insn (gen_rtx_SET (VOIDmode, dest, const0_rtx)); if (GET_MODE (op0) != DImode) { temp = gen_reg_rtx (DImode); @@ -2160,47 +2149,137 @@ gen_v9_scc (enum rtx_code compare_code, register rtx *operands) } else temp = op0; - emit_insn (gen_rtx_SET (VOIDmode, operands[0], - gen_rtx_IF_THEN_ELSE (GET_MODE (operands[0]), + emit_insn (gen_rtx_SET (VOIDmode, dest, + gen_rtx_IF_THEN_ELSE (GET_MODE (dest), gen_rtx_fmt_ee (compare_code, DImode, temp, const0_rtx), const1_rtx, - operands[0]))); + dest))); return 1; } else { - operands[1] = gen_compare_reg (compare_code); + x = gen_compare_reg_1 (compare_code, x, y); + y = const0_rtx; - switch (GET_MODE (operands[1])) - { - case CCmode : - case CCXmode : - case CCFPEmode : - case CCFPmode : - break; - default : - gcc_unreachable (); - } - emit_insn (gen_rtx_SET (VOIDmode, operands[0], const0_rtx)); - emit_insn (gen_rtx_SET (VOIDmode, operands[0], - gen_rtx_IF_THEN_ELSE (GET_MODE (operands[0]), + gcc_assert (GET_MODE (x) != CC_NOOVmode + && GET_MODE (x) != CCX_NOOVmode); + + emit_insn (gen_rtx_SET (VOIDmode, dest, const0_rtx)); + emit_insn (gen_rtx_SET (VOIDmode, dest, + gen_rtx_IF_THEN_ELSE (GET_MODE (dest), gen_rtx_fmt_ee (compare_code, - GET_MODE (operands[1]), - operands[1], const0_rtx), - const1_rtx, operands[0]))); + GET_MODE (x), x, y), + const1_rtx, dest))); return 1; } } + +/* Emit an scc insn. For seq, sne, sgeu, and sltu, we can do this + without jumps using the addx/subx instructions. */ + +bool +emit_scc_insn (rtx operands[]) +{ + rtx tem; + rtx x; + rtx y; + enum rtx_code code; + + /* The quad-word fp compare library routines all return nonzero to indicate + true, which is different from the equivalent libgcc routines, so we must + handle them specially here. */ + if (GET_MODE (operands[2]) == TFmode && ! TARGET_HARD_QUAD) + { + operands[1] = sparc_emit_float_lib_cmp (operands[2], operands[3], + GET_CODE (operands[1])); + operands[2] = XEXP (operands[1], 0); + operands[3] = XEXP (operands[1], 1); + } + + code = GET_CODE (operands[1]); + x = operands[2]; + y = operands[3]; + + /* For seq/sne on v9 we use the same code as v8 (the addx/subx method has + more applications). The exception to this is "reg != 0" which can + be done in one instruction on v9 (so we do it). */ + if (code == EQ) + { + if (GET_MODE (x) == SImode) + { + rtx pat = gen_seqsi_special (operands[0], x, y); + emit_insn (pat); + return true; + } + else if (GET_MODE (x) == DImode) + { + rtx pat = gen_seqdi_special (operands[0], x, y); + emit_insn (pat); + return true; + } + } + + if (code == NE) + { + if (GET_MODE (x) == SImode) + { + rtx pat = gen_snesi_special (operands[0], x, y); + emit_insn (pat); + return true; + } + else if (GET_MODE (x) == DImode) + { + rtx pat = gen_snedi_special (operands[0], x, y); + emit_insn (pat); + return true; + } + } + + /* For the rest, on v9 we can use conditional moves. */ + + if (TARGET_V9) + { + if (gen_v9_scc (operands[0], code, x, y)) + return true; + } + + /* We can do LTU and GEU using the addx/subx instructions too. And + for GTU/LEU, if both operands are registers swap them and fall + back to the easy case. */ + if (code == GTU || code == LEU) + { + if ((GET_CODE (x) == REG || GET_CODE (x) == SUBREG) + && (GET_CODE (y) == REG || GET_CODE (y) == SUBREG)) + { + tem = x; + x = y; + y = tem; + code = swap_condition (code); + } + } + + if (code == LTU || code == GEU) + { + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_fmt_ee (code, SImode, + gen_compare_reg_1 (code, x, y), + const0_rtx))); + return true; + } + + /* Nope, do branches. */ + return false; +} + /* Emit a conditional jump insn for the v9 architecture using comparison code CODE and jump target LABEL. This function exists to take advantage of the v9 brxx insns. */ -void +static void emit_v9_brxx_insn (enum rtx_code code, rtx op0, rtx label) { - gcc_assert (GET_MODE_CLASS (GET_MODE (sparc_compare_op0)) != MODE_CC); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, @@ -2210,6 +2289,37 @@ emit_v9_brxx_insn (enum rtx_code code, rtx op0, rtx label) pc_rtx))); } +void +emit_conditional_branch_insn (rtx operands[]) +{ + /* The quad-word fp compare library routines all return nonzero to indicate + true, which is different from the equivalent libgcc routines, so we must + handle them specially here. */ + if (GET_MODE (operands[1]) == TFmode && ! TARGET_HARD_QUAD) + { + operands[0] = sparc_emit_float_lib_cmp (operands[1], operands[2], + GET_CODE (operands[0])); + operands[1] = XEXP (operands[0], 0); + operands[2] = XEXP (operands[0], 1); + } + + if (TARGET_ARCH64 && operands[2] == const0_rtx + && GET_CODE (operands[1]) == REG + && GET_MODE (operands[1]) == DImode) + { + emit_v9_brxx_insn (GET_CODE (operands[0]), operands[1], operands[3]); + return; + } + + operands[1] = gen_compare_reg (operands[0]); + operands[2] = const0_rtx; + operands[0] = gen_rtx_fmt_ee (GET_CODE (operands[0]), VOIDmode, + operands[1], operands[2]); + emit_jump_insn (gen_cbranchcc4 (operands[0], operands[1], operands[2], + operands[3])); +} + + /* Generate a DFmode part of a hard TFmode register. REG is the TFmode hard register, LOW is 1 for the low 64bit of the register and 0 otherwise. @@ -2961,8 +3071,8 @@ legitimate_pic_operand_p (rtx x) /* Return nonzero if ADDR is a valid memory address. STRICT specifies whether strict register checking applies. */ -int -legitimate_address_p (enum machine_mode mode, rtx addr, int strict) +static bool +sparc_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict) { rtx rs1 = NULL, rs2 = NULL, imm1 = NULL; @@ -3397,7 +3507,7 @@ sparc_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, x = gen_rtx_PLUS (Pmode, XEXP (x, 0), force_operand (XEXP (x, 1), NULL_RTX)); - if (x != orig_x && legitimate_address_p (mode, x, FALSE)) + if (x != orig_x && sparc_legitimate_address_p (mode, x, FALSE)) return x; if (SPARC_SYMBOL_REF_TLS_P (x)) @@ -6116,7 +6226,7 @@ output_cbranch (rtx op, rtx dest, int label, int reversed, int annul, values as arguments instead of the TFmode registers themselves, that's why we cannot call emit_float_lib_cmp. */ -enum rtx_code +rtx sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison) { const char *qpfunc; @@ -6207,32 +6317,24 @@ sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison) switch (comparison) { default: - new_comparison = NE; - emit_cmp_insn (result, const0_rtx, new_comparison, NULL_RTX, mode, 0); - break; + return gen_rtx_NE (VOIDmode, result, const0_rtx); case ORDERED: case UNORDERED: new_comparison = (comparison == UNORDERED ? EQ : NE); - emit_cmp_insn (result, GEN_INT(3), new_comparison, NULL_RTX, mode, 0); - break; + return gen_rtx_fmt_ee (new_comparison, VOIDmode, result, GEN_INT(3)); case UNGT: case UNGE: new_comparison = (comparison == UNGT ? GT : NE); - emit_cmp_insn (result, const1_rtx, new_comparison, NULL_RTX, mode, 0); - break; + return gen_rtx_fmt_ee (new_comparison, VOIDmode, result, const1_rtx); case UNLE: - new_comparison = NE; - emit_cmp_insn (result, const2_rtx, new_comparison, NULL_RTX, mode, 0); - break; + return gen_rtx_NE (VOIDmode, result, const2_rtx); case UNLT: tem = gen_reg_rtx (mode); if (TARGET_ARCH32) emit_insn (gen_andsi3 (tem, result, const1_rtx)); else emit_insn (gen_anddi3 (tem, result, const1_rtx)); - new_comparison = NE; - emit_cmp_insn (tem, const0_rtx, new_comparison, NULL_RTX, mode, 0); - break; + return gen_rtx_NE (VOIDmode, tem, const0_rtx); case UNEQ: case LTGT: tem = gen_reg_rtx (mode); @@ -6246,11 +6348,10 @@ sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison) else emit_insn (gen_anddi3 (tem2, tem, const2_rtx)); new_comparison = (comparison == UNEQ ? EQ : NE); - emit_cmp_insn (tem2, const0_rtx, new_comparison, NULL_RTX, mode, 0); - break; + return gen_rtx_fmt_ee (new_comparison, VOIDmode, tem2, const0_rtx); } - return new_comparison; + gcc_unreachable (); } /* Generate an unsigned DImode to FP conversion. This is the same code @@ -9021,15 +9122,12 @@ sparc_expand_compare_and_swap_12 (rtx result, rtx mem, rtx oldval, rtx newval) gen_rtx_AND (SImode, gen_rtx_NOT (SImode, mask), res))); - sparc_compare_op0 = resv; - sparc_compare_op1 = val; - cc = gen_compare_reg (NE); - + cc = gen_compare_reg_1 (NE, resv, val); emit_insn (gen_rtx_SET (VOIDmode, val, resv)); - sparc_compare_op0 = cc; - sparc_compare_op1 = const0_rtx; - emit_jump_insn (gen_bne (loop_label)); + /* Use cbranchcc4 to separate the compare and branch! */ + emit_jump_insn (gen_cbranchcc4 (gen_rtx_NE (VOIDmode, cc, const0_rtx), + cc, const0_rtx, loop_label)); emit_label (end_label); diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index d21900135e2..1aef109b113 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1558,12 +1558,6 @@ function_arg_padding ((MODE), (TYPE)) && (GET_MODE_ALIGNMENT (MODE) == 128 \ || ((TYPE) && TYPE_ALIGN (TYPE) == 128))) \ ? 128 : PARM_BOUNDARY) - -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. */ - -extern GTY(()) rtx sparc_compare_op0; -extern GTY(()) rtx sparc_compare_op1; /* Generate the special assembly code needed to tell the assembler whatever @@ -1881,20 +1875,6 @@ do { \ #define RTX_OK_FOR_OLO10_P(X) \ (GET_CODE (X) == CONST_INT && INTVAL (X) >= -0x1000 && INTVAL (X) < 0xc00 - 8) -#ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (legitimate_address_p (MODE, X, 1)) \ - goto ADDR; \ -} -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ \ - if (legitimate_address_p (MODE, X, 0)) \ - goto ADDR; \ -} -#endif - /* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 4fae329cd9a..9e35910f4db 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -76,6 +76,18 @@ (UNSPECV_LDSTUB 10) ]) + +(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) +(define_mode_iterator I [QI HI SI DI]) +(define_mode_iterator F [SF DF TF]) + +;; We don't define V1SI because SI should work just fine. +(define_mode_iterator V32 [SF V2HI V4QI]) +(define_mode_iterator V32I [SI V2HI V4QI]) + +(define_mode_iterator V64 [DF V2SI V4HI V8QI]) +(define_mode_iterator V64I [DI V2SI V4HI V8QI]) + ;; The upper 32 fp regs on the v9 can't hold SFmode values. To deal with this ;; a second register class, EXTRA_FP_REGS, exists for the v9 chip. The name ;; is a bit of a misnomer as it covers all 64 fp regs. The corresponding @@ -340,84 +352,11 @@ ;; Compare instructions. -;; We generate RTL for comparisons and branches by having the cmpxx -;; patterns store away the operands. Then, the scc and bcc patterns -;; emit RTL for both the compare and the branch. -;; -;; We do this because we want to generate different code for an sne and -;; seq insn. In those cases, if the second operand of the compare is not -;; const0_rtx, we want to compute the xor of the two operands and test -;; it against zero. -;; -;; We start with the DEFINE_EXPANDs, then the DEFINE_INSNs to match -;; the patterns. Finally, we have the DEFINE_SPLITs for some of the scc -;; insns that actually require more than one machine instruction. - -(define_expand "cmpsi" - [(set (reg:CC 100) - (compare:CC (match_operand:SI 0 "compare_operand" "") - (match_operand:SI 1 "arith_operand" "")))] - "" -{ - if (GET_CODE (operands[0]) == ZERO_EXTRACT && operands[1] != const0_rtx) - operands[0] = force_reg (SImode, operands[0]); - - sparc_compare_op0 = operands[0]; - sparc_compare_op1 = operands[1]; - DONE; -}) - -(define_expand "cmpdi" - [(set (reg:CCX 100) - (compare:CCX (match_operand:DI 0 "compare_operand" "") - (match_operand:DI 1 "arith_operand" "")))] - "TARGET_ARCH64" -{ - if (GET_CODE (operands[0]) == ZERO_EXTRACT && operands[1] != const0_rtx) - operands[0] = force_reg (DImode, operands[0]); - - sparc_compare_op0 = operands[0]; - sparc_compare_op1 = operands[1]; - DONE; -}) - -(define_expand "cmpsf" - ;; The 96 here isn't ever used by anyone. - [(set (reg:CCFP 96) - (compare:CCFP (match_operand:SF 0 "register_operand" "") - (match_operand:SF 1 "register_operand" "")))] - "TARGET_FPU" -{ - sparc_compare_op0 = operands[0]; - sparc_compare_op1 = operands[1]; - DONE; -}) - -(define_expand "cmpdf" - ;; The 96 here isn't ever used by anyone. - [(set (reg:CCFP 96) - (compare:CCFP (match_operand:DF 0 "register_operand" "") - (match_operand:DF 1 "register_operand" "")))] - "TARGET_FPU" -{ - sparc_compare_op0 = operands[0]; - sparc_compare_op1 = operands[1]; - DONE; -}) - -(define_expand "cmptf" - ;; The 96 here isn't ever used by anyone. - [(set (reg:CCFP 96) - (compare:CCFP (match_operand:TF 0 "register_operand" "") - (match_operand:TF 1 "register_operand" "")))] - "TARGET_FPU" -{ - sparc_compare_op0 = operands[0]; - sparc_compare_op1 = operands[1]; - DONE; -}) +;; These are just the DEFINE_INSNs to match the patterns and the +;; DEFINE_SPLITs for some of the scc insns that actually require +;; more than one machine instruction. DEFINE_EXPANDs are further down. -;; Now the compare DEFINE_INSNs. +;; The compare DEFINE_INSNs. (define_insn "*cmpsi_insn" [(set (reg:CC 100) @@ -509,12 +448,41 @@ } [(set_attr "type" "fpcmp")]) -;; Next come the scc insns. For seq, sne, sgeu, and sltu, we can do this -;; without jumps using the addx/subx instructions. For seq/sne on v9 we use -;; the same code as v8 (the addx/subx method has more applications). The -;; exception to this is "reg != 0" which can be done in one instruction on v9 -;; (so we do it). For the rest, on v9 we use conditional moves; on v8, we do -;; branches. +;; Next come the scc insns. + +(define_expand "cstoresi4" + [(use (match_operator 1 "comparison_operator" + [(match_operand:SI 2 "compare_operand" "") + (match_operand:SI 3 "arith_operand" "")])) + (clobber (match_operand:SI 0 "register_operand"))] + "" +{ + if (GET_CODE (operands[2]) == ZERO_EXTRACT && operands[3] != const0_rtx) + operands[2] = force_reg (SImode, operands[2]); + if (emit_scc_insn (operands)) DONE; else FAIL; +}) + +(define_expand "cstoredi4" + [(use (match_operator 1 "comparison_operator" + [(match_operand:DI 2 "compare_operand" "") + (match_operand:DI 3 "arith_operand" "")])) + (clobber (match_operand:SI 0 "register_operand"))] + "TARGET_ARCH64" +{ + if (GET_CODE (operands[2]) == ZERO_EXTRACT && operands[3] != const0_rtx) + operands[2] = force_reg (DImode, operands[2]); + if (emit_scc_insn (operands)) DONE; else FAIL; +}) + +(define_expand "cstore<F:mode>4" + [(use (match_operator 1 "comparison_operator" + [(match_operand:F 2 "register_operand" "") + (match_operand:F 3 "register_operand" "")])) + (clobber (match_operand:SI 0 "register_operand"))] + "TARGET_FPU" + { if (emit_scc_insn (operands)) DONE; else FAIL; }) + + ;; Seq_special[_xxx] and sne_special[_xxx] clobber the CC reg, because they ;; generate addcc/subcc instructions. @@ -533,8 +501,8 @@ [(set (match_dup 3) (xor:DI (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "register_operand" ""))) - (set (match_operand:DI 0 "register_operand" "") - (eq:DI (match_dup 3) (const_int 0)))] + (set (match_operand:SI 0 "register_operand" "") + (eq:SI (match_dup 3) (const_int 0)))] "TARGET_ARCH64" { operands[3] = gen_reg_rtx (DImode); }) @@ -552,338 +520,11 @@ [(set (match_dup 3) (xor:DI (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "register_operand" ""))) - (set (match_operand:DI 0 "register_operand" "") - (ne:DI (match_dup 3) (const_int 0)))] - "TARGET_ARCH64" - { operands[3] = gen_reg_rtx (DImode); }) - -(define_expand "seqdi_special_trunc" - [(set (match_dup 3) - (xor:DI (match_operand:DI 1 "register_operand" "") - (match_operand:DI 2 "register_operand" ""))) - (set (match_operand:SI 0 "register_operand" "") - (eq:SI (match_dup 3) (const_int 0)))] - "TARGET_ARCH64" - { operands[3] = gen_reg_rtx (DImode); }) - -(define_expand "snedi_special_trunc" - [(set (match_dup 3) - (xor:DI (match_operand:DI 1 "register_operand" "") - (match_operand:DI 2 "register_operand" ""))) (set (match_operand:SI 0 "register_operand" "") (ne:SI (match_dup 3) (const_int 0)))] "TARGET_ARCH64" { operands[3] = gen_reg_rtx (DImode); }) -(define_expand "seqsi_special_extend" - [(set (match_dup 3) - (xor:SI (match_operand:SI 1 "register_operand" "") - (match_operand:SI 2 "register_operand" ""))) - (parallel [(set (match_operand:DI 0 "register_operand" "") - (eq:DI (match_dup 3) (const_int 0))) - (clobber (reg:CC 100))])] - "TARGET_ARCH64" - { operands[3] = gen_reg_rtx (SImode); }) - -(define_expand "snesi_special_extend" - [(set (match_dup 3) - (xor:SI (match_operand:SI 1 "register_operand" "") - (match_operand:SI 2 "register_operand" ""))) - (parallel [(set (match_operand:DI 0 "register_operand" "") - (ne:DI (match_dup 3) (const_int 0))) - (clobber (reg:CC 100))])] - "TARGET_ARCH64" - { operands[3] = gen_reg_rtx (SImode); }) - -;; ??? v9: Operand 0 needs a mode, so SImode was chosen. -;; However, the code handles both SImode and DImode. -(define_expand "seq" - [(set (match_operand:SI 0 "int_register_operand" "") - (eq:SI (match_dup 1) (const_int 0)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == SImode) - { - rtx pat; - - if (GET_MODE (operands[0]) == SImode) - pat = gen_seqsi_special (operands[0], sparc_compare_op0, - sparc_compare_op1); - else if (! TARGET_ARCH64) - FAIL; - else - pat = gen_seqsi_special_extend (operands[0], sparc_compare_op0, - sparc_compare_op1); - emit_insn (pat); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == DImode) - { - rtx pat; - - if (! TARGET_ARCH64) - FAIL; - else if (GET_MODE (operands[0]) == SImode) - pat = gen_seqdi_special_trunc (operands[0], sparc_compare_op0, - sparc_compare_op1); - else - pat = gen_seqdi_special (operands[0], sparc_compare_op0, - sparc_compare_op1); - emit_insn (pat); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, EQ); - gcc_assert (code == NE); - emit_insn (gen_sne (operands[0])); - DONE; - } - else if (TARGET_V9) - { - if (gen_v9_scc (EQ, operands)) - DONE; - /* fall through */ - } - FAIL; -}) - -;; ??? v9: Operand 0 needs a mode, so SImode was chosen. -;; However, the code handles both SImode and DImode. -(define_expand "sne" - [(set (match_operand:SI 0 "int_register_operand" "") - (ne:SI (match_dup 1) (const_int 0)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == SImode) - { - rtx pat; - - if (GET_MODE (operands[0]) == SImode) - pat = gen_snesi_special (operands[0], sparc_compare_op0, - sparc_compare_op1); - else if (! TARGET_ARCH64) - FAIL; - else - pat = gen_snesi_special_extend (operands[0], sparc_compare_op0, - sparc_compare_op1); - emit_insn (pat); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == DImode) - { - rtx pat; - - if (! TARGET_ARCH64) - FAIL; - else if (GET_MODE (operands[0]) == SImode) - pat = gen_snedi_special_trunc (operands[0], sparc_compare_op0, - sparc_compare_op1); - else - pat = gen_snedi_special (operands[0], sparc_compare_op0, - sparc_compare_op1); - emit_insn (pat); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, NE); - gcc_assert (code == NE); - emit_insn (gen_sne (operands[0])); - DONE; - } - else if (TARGET_V9) - { - if (gen_v9_scc (NE, operands)) - DONE; - /* fall through */ - } - FAIL; -}) - -(define_expand "sgt" - [(set (match_operand:SI 0 "int_register_operand" "") - (gt:SI (match_dup 1) (const_int 0)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, GT); - gcc_assert (code == NE); - emit_insn (gen_sne (operands[0])); - DONE; - } - else if (TARGET_V9) - { - if (gen_v9_scc (GT, operands)) - DONE; - /* fall through */ - } - FAIL; -}) - -(define_expand "slt" - [(set (match_operand:SI 0 "int_register_operand" "") - (lt:SI (match_dup 1) (const_int 0)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, LT); - gcc_assert (code == NE); - emit_insn (gen_sne (operands[0])); - DONE; - } - else if (TARGET_V9) - { - if (gen_v9_scc (LT, operands)) - DONE; - /* fall through */ - } - FAIL; -}) - -(define_expand "sge" - [(set (match_operand:SI 0 "int_register_operand" "") - (ge:SI (match_dup 1) (const_int 0)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, GE); - gcc_assert (code == NE); - emit_insn (gen_sne (operands[0])); - DONE; - } - else if (TARGET_V9) - { - if (gen_v9_scc (GE, operands)) - DONE; - /* fall through */ - } - FAIL; -}) - -(define_expand "sle" - [(set (match_operand:SI 0 "int_register_operand" "") - (le:SI (match_dup 1) (const_int 0)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, LE); - gcc_assert (code == NE); - emit_insn (gen_sne (operands[0])); - DONE; - } - else if (TARGET_V9) - { - if (gen_v9_scc (LE, operands)) - DONE; - /* fall through */ - } - FAIL; -}) - -(define_expand "sgtu" - [(set (match_operand:SI 0 "int_register_operand" "") - (gtu:SI (match_dup 1) (const_int 0)))] - "" -{ - if (! TARGET_V9) - { - rtx tem, pat; - - /* We can do ltu easily, so if both operands are registers, swap them and - do a LTU. */ - if ((GET_CODE (sparc_compare_op0) == REG - || GET_CODE (sparc_compare_op0) == SUBREG) - && (GET_CODE (sparc_compare_op1) == REG - || GET_CODE (sparc_compare_op1) == SUBREG)) - { - tem = sparc_compare_op0; - sparc_compare_op0 = sparc_compare_op1; - sparc_compare_op1 = tem; - pat = gen_sltu (operands[0]); - if (pat == NULL_RTX) - FAIL; - emit_insn (pat); - DONE; - } - } - else - { - if (gen_v9_scc (GTU, operands)) - DONE; - } - FAIL; -}) - -(define_expand "sltu" - [(set (match_operand:SI 0 "int_register_operand" "") - (ltu:SI (match_dup 1) (const_int 0)))] - "" -{ - if (TARGET_V9) - { - if (gen_v9_scc (LTU, operands)) - DONE; - } - operands[1] = gen_compare_reg (LTU); -}) - -(define_expand "sgeu" - [(set (match_operand:SI 0 "int_register_operand" "") - (geu:SI (match_dup 1) (const_int 0)))] - "" -{ - if (TARGET_V9) - { - if (gen_v9_scc (GEU, operands)) - DONE; - } - operands[1] = gen_compare_reg (GEU); -}) - -(define_expand "sleu" - [(set (match_operand:SI 0 "int_register_operand" "") - (leu:SI (match_dup 1) (const_int 0)))] - "" -{ - if (! TARGET_V9) - { - rtx tem, pat; - - /* We can do geu easily, so if both operands are registers, swap them and - do a GEU. */ - if ((GET_CODE (sparc_compare_op0) == REG - || GET_CODE (sparc_compare_op0) == SUBREG) - && (GET_CODE (sparc_compare_op1) == REG - || GET_CODE (sparc_compare_op1) == SUBREG)) - { - tem = sparc_compare_op0; - sparc_compare_op0 = sparc_compare_op1; - sparc_compare_op1 = tem; - pat = gen_sgeu (operands[0]); - if (pat == NULL_RTX) - FAIL; - emit_insn (pat); - DONE; - } - } - else - { - if (gen_v9_scc (LEU, operands)) - DONE; - } - FAIL; -}) ;; Now the DEFINE_INSNs for the scc cases. @@ -1275,344 +916,51 @@ ;; These control RTL generation for conditional jump insns -;; The quad-word fp compare library routines all return nonzero to indicate -;; true, which is different from the equivalent libgcc routines, so we must -;; handle them specially here. - -(define_expand "beq" - [(set (pc) - (if_then_else (eq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (TARGET_ARCH64 && sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode) - { - emit_v9_brxx_insn (EQ, sparc_compare_op0, operands[0]); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, EQ); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (EQ); -}) - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (TARGET_ARCH64 && sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode) - { - emit_v9_brxx_insn (NE, sparc_compare_op0, operands[0]); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, NE); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (NE); -}) - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (TARGET_ARCH64 && sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode) - { - emit_v9_brxx_insn (GT, sparc_compare_op0, operands[0]); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, GT); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (GT); -}) - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = gen_compare_reg (GTU); -}) - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (TARGET_ARCH64 && sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode) - { - emit_v9_brxx_insn (LT, sparc_compare_op0, operands[0]); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, LT); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (LT); -}) - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = gen_compare_reg (LTU); -}) - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (TARGET_ARCH64 && sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode) - { - emit_v9_brxx_insn (GE, sparc_compare_op0, operands[0]); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, GE); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (GE); -}) - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = gen_compare_reg (GEU); -}) - -(define_expand "ble" +(define_expand "cbranchcc4" [(set (pc) - (if_then_else (le (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand 1 "compare_operand" "") + (match_operand 2 "const_zero_operand" "")]) + (label_ref (match_operand 3 "" "")) (pc)))] "" -{ - if (TARGET_ARCH64 && sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode) - { - emit_v9_brxx_insn (LE, sparc_compare_op0, operands[0]); - DONE; - } - else if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, LE); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (LE); -}) - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - operands[1] = gen_compare_reg (LEU); -}) - -(define_expand "bunordered" - [(set (pc) - (if_then_else (unordered (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, UNORDERED); - gcc_assert (code == EQ); - emit_jump_insn (gen_beq (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (UNORDERED); -}) - -(define_expand "bordered" - [(set (pc) - (if_then_else (ordered (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, ORDERED); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (ORDERED); -}) - -(define_expand "bungt" - [(set (pc) - (if_then_else (ungt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, UNGT); - gcc_assert (code == GT); - emit_jump_insn (gen_bgt (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (UNGT); -}) + "") -(define_expand "bunlt" - [(set (pc) - (if_then_else (unlt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] +(define_expand "cbranchsi4" + [(use (match_operator 0 "comparison_operator" + [(match_operand:SI 1 "compare_operand" "") + (match_operand:SI 2 "arith_operand" "")])) + (use (match_operand 3 ""))] "" { - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, UNLT); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (UNLT); + if (GET_CODE (operands[1]) == ZERO_EXTRACT && operands[2] != const0_rtx) + operands[1] = force_reg (SImode, operands[1]); + emit_conditional_branch_insn (operands); + DONE; }) -(define_expand "buneq" - [(set (pc) - (if_then_else (uneq (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" +(define_expand "cbranchdi4" + [(use (match_operator 0 "comparison_operator" + [(match_operand:DI 1 "compare_operand" "") + (match_operand:DI 2 "arith_operand" "")])) + (use (match_operand 3 ""))] + "TARGET_ARCH64" { - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, UNEQ); - gcc_assert (code == EQ); - emit_jump_insn (gen_beq (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (UNEQ); + if (GET_CODE (operands[1]) == ZERO_EXTRACT && operands[2] != const0_rtx) + operands[1] = force_reg (DImode, operands[1]); + emit_conditional_branch_insn (operands); + DONE; }) -(define_expand "bunge" - [(set (pc) - (if_then_else (unge (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, UNGE); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (UNGE); -}) +(define_expand "cbranch<F:mode>4" + [(use (match_operator 0 "comparison_operator" + [(match_operand:F 1 "register_operand" "") + (match_operand:F 2 "register_operand" "")])) + (use (match_operand 3 ""))] + "TARGET_FPU" + { emit_conditional_branch_insn (operands); DONE; }) -(define_expand "bunle" - [(set (pc) - (if_then_else (unle (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, UNLE); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (UNLE); -}) -(define_expand "bltgt" - [(set (pc) - (if_then_else (ltgt (match_dup 1) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - if (GET_MODE (sparc_compare_op0) == TFmode && ! TARGET_HARD_QUAD) - { - enum rtx_code code - = sparc_emit_float_lib_cmp (sparc_compare_op0, sparc_compare_op1, LTGT); - gcc_assert (code == NE); - emit_jump_insn (gen_bne (operands[0])); - DONE; - } - operands[1] = gen_compare_reg (LTGT); -}) - ;; Now match both normal and inverted jump. ;; XXX fpcmp nop braindamage @@ -1755,8 +1103,6 @@ (set_attr "branch_type" "reg")]) -(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) - ;; Load in operand 0 the (absolute) address of operand 1, which is a symbolic ;; value subject to a PC-relative relocation. Operand 2 is a helper function ;; that adds the PC value at the call point to operand 0. @@ -2393,9 +1739,6 @@ ;; Floating point and vector move instructions -;; We don't define V1SI because SI should work just fine. -(define_mode_iterator V32 [SF V2HI V4QI]) - ;; Yes, you guessed it right, the former movsf expander. (define_expand "mov<V32:mode>" [(set (match_operand:V32 0 "nonimmediate_operand" "") @@ -2530,8 +1873,6 @@ [(set (match_dup 0) (high:SF (match_dup 1))) (set (match_dup 0) (lo_sum:SF (match_dup 0) (match_dup 1)))]) -(define_mode_iterator V64 [DF V2SI V4HI V8QI]) - ;; Yes, you again guessed it right, the former movdf expander. (define_expand "mov<V64:mode>" [(set (match_operand:V64 0 "nonimmediate_operand" "") @@ -3073,8 +2414,6 @@ ;; 3 contains the constant if one is present, but we handle either for ;; generality (sparc.c puts a constant in operand 2). -(define_mode_iterator I [QI HI SI DI]) - (define_expand "mov<I:mode>cc" [(set (match_operand:I 0 "register_operand" "") (if_then_else:I (match_operand 1 "comparison_operator" "") @@ -3083,21 +2422,27 @@ "TARGET_V9 && !(<I:MODE>mode == DImode && TARGET_ARCH32)" { enum rtx_code code = GET_CODE (operands[1]); + rtx cc_reg; - if (GET_MODE (sparc_compare_op0) == DImode + if (GET_MODE (XEXP (operands[1], 0)) == DImode && ! TARGET_ARCH64) FAIL; - if (sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode + if (GET_MODE (XEXP (operands[1], 0)) == TFmode && !TARGET_HARD_QUAD) + operands[1] + = sparc_emit_float_lib_cmp (XEXP (operands[1], 0), XEXP (operands[1], 1), + GET_CODE (operands[1])); + + if (XEXP (operands[1], 1) == const0_rtx + && GET_CODE (XEXP (operands[1], 0)) == REG + && GET_MODE (XEXP (operands[1], 0)) == DImode && v9_regcmp_p (code)) - operands[1] = gen_rtx_fmt_ee (code, DImode, sparc_compare_op0, const0_rtx); + cc_reg = XEXP (operands[1], 0); else - operands[1] = gen_compare_operator (code); -}) + cc_reg = gen_compare_reg (operands[1]); -(define_mode_iterator F [SF DF TF]) + operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx); +}) (define_expand "mov<F:mode>cc" [(set (match_operand:F 0 "register_operand" "") @@ -3107,18 +2452,26 @@ "TARGET_V9 && TARGET_FPU" { enum rtx_code code = GET_CODE (operands[1]); + rtx cc_reg; - if (GET_MODE (sparc_compare_op0) == DImode + if (GET_MODE (XEXP (operands[1], 0)) == DImode && ! TARGET_ARCH64) FAIL; - if (sparc_compare_op1 == const0_rtx - && GET_CODE (sparc_compare_op0) == REG - && GET_MODE (sparc_compare_op0) == DImode + if (GET_MODE (XEXP (operands[1], 0)) == TFmode && !TARGET_HARD_QUAD) + operands[1] + = sparc_emit_float_lib_cmp (XEXP (operands[1], 0), XEXP (operands[1], 1), + GET_CODE (operands[1])); + + if (XEXP (operands[1], 1) == const0_rtx + && GET_CODE (XEXP (operands[1], 0)) == REG + && GET_MODE (XEXP (operands[1], 0)) == DImode && v9_regcmp_p (code)) - operands[1] = gen_rtx_fmt_ee (code, DImode, sparc_compare_op0, const0_rtx); + cc_reg = XEXP (operands[1], 0); else - operands[1] = gen_compare_operator (code); + cc_reg = gen_compare_reg (operands[1]); + + operands[1] = gen_rtx_fmt_ee (code, GET_MODE (cc_reg), cc_reg, const0_rtx); }) ;; Conditional move define_insns @@ -5133,9 +4486,6 @@ ;; We define DImode `and' so with DImode `not' we can get ;; DImode `andn'. Other combinations are possible. -(define_mode_iterator V64I [DI V2SI V4HI V8QI]) -(define_mode_iterator V32I [SI V2HI V4QI]) - (define_expand "and<V64I:mode>3" [(set (match_operand:V64I 0 "register_operand" "") (and:V64I (match_operand:V64I 1 "arith_double_operand" "") @@ -7434,14 +6784,28 @@ "ta\t5" [(set_attr "type" "trap")]) -(define_expand "conditional_trap" - [(trap_if (match_operator 0 "noov_compare_operator" [(match_dup 2) (match_dup 3)]) - (match_operand:SI 1 "arith_operand" ""))] +(define_expand "ctrapsi4" + [(trap_if (match_operator 0 "noov_compare_operator" + [(match_operand:SI 1 "compare_operand" "") + (match_operand:SI 2 "arith_operand" "")]) + (match_operand 3 ""))] "" - "operands[2] = gen_compare_reg (GET_CODE (operands[0])); - if (GET_MODE (operands[2]) != CCmode && GET_MODE (operands[2]) != CCXmode) + "operands[1] = gen_compare_reg (operands[0]); + if (GET_MODE (operands[1]) != CCmode && GET_MODE (operands[1]) != CCXmode) FAIL; - operands[3] = const0_rtx;") + operands[2] = const0_rtx;") + +(define_expand "ctrapdi4" + [(trap_if (match_operator 0 "noov_compare_operator" + [(match_operand:DI 1 "compare_operand" "") + (match_operand:DI 2 "arith_operand" "")]) + (match_operand 3 ""))] + "TARGET_ARCH64" + "operands[1] = gen_compare_reg (operands[0]); + if (GET_MODE (operands[1]) != CCmode && GET_MODE (operands[1]) != CCXmode) + FAIL; + operands[2] = const0_rtx;") + (define_insn "" [(trap_if (match_operator 0 "noov_compare_operator" [(reg:CC 100) (const_int 0)]) @@ -8071,6 +7435,7 @@ (match_operand 2 "" "")] "" { + rtx result, test; #ifdef TARGET_THREAD_SSP_OFFSET rtx tlsreg = gen_rtx_REG (Pmode, 7); rtx addr = gen_rtx_PLUS (Pmode, tlsreg, GEN_INT (TARGET_THREAD_SSP_OFFSET)); @@ -8078,18 +7443,18 @@ #endif if (TARGET_ARCH64) { - rtx temp = gen_reg_rtx (Pmode); - emit_insn (gen_stack_protect_testdi (temp, operands[0], operands[1])); - sparc_compare_op0 = temp; - sparc_compare_op1 = const0_rtx; + result = gen_reg_rtx (Pmode); + emit_insn (gen_stack_protect_testdi (result, operands[0], operands[1])); + test = gen_rtx_EQ (VOIDmode, result, const0_rtx); + emit_jump_insn (gen_cbranchdi4 (test, result, const0_rtx, operands[2])); } else { emit_insn (gen_stack_protect_testsi (operands[0], operands[1])); - sparc_compare_op0 = gen_rtx_REG (CCmode, SPARC_ICC_REG); - sparc_compare_op1 = const0_rtx; + result = gen_rtx_REG (CCmode, SPARC_ICC_REG); + test = gen_rtx_EQ (VOIDmode, result, const0_rtx); + emit_jump_insn (gen_cbranchcc4 (test, result, const0_rtx, operands[2])); } - emit_jump_insn (gen_beq (operands[2])); DONE; }) diff --git a/gcc/config/spu/spu-c.c b/gcc/config/spu/spu-c.c index e1352b14a8a..a946b037cb7 100644 --- a/gcc/config/spu/spu-c.c +++ b/gcc/config/spu/spu-c.c @@ -42,7 +42,7 @@ spu_categorize_keyword (const cpp_token *tok) { if (tok->type == CPP_NAME) { - cpp_hashnode *ident = tok->val.node; + cpp_hashnode *ident = tok->val.node.node; if (ident == C_CPP_HASHNODE (vector_keyword) || ident == C_CPP_HASHNODE (__vector_keyword)) @@ -60,7 +60,7 @@ spu_categorize_keyword (const cpp_token *tok) static cpp_hashnode * spu_macro_to_expand (cpp_reader *pfile, const cpp_token *tok) { - cpp_hashnode *expand_this = tok->val.node; + cpp_hashnode *expand_this = tok->val.node.node; cpp_hashnode *ident; ident = spu_categorize_keyword (tok); diff --git a/gcc/config/spu/spu-protos.h b/gcc/config/spu/spu-protos.h index 06e02ba0b48..33951d77ea9 100644 --- a/gcc/config/spu/spu-protos.h +++ b/gcc/config/spu/spu-protos.h @@ -28,8 +28,7 @@ extern int valid_subreg (rtx op); extern void spu_expand_extv (rtx * ops, int unsignedp); extern void spu_expand_insv (rtx * ops); extern int spu_expand_block_move (rtx * ops); -extern void spu_emit_branch_or_set (int is_set, enum rtx_code code, - rtx * operands); +extern void spu_emit_branch_or_set (int is_set, rtx cmp, rtx * operands); extern int spu_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx); extern HOST_WIDE_INT const_double_to_hwint (rtx x); extern rtx hwint_to_const_double (enum machine_mode mode, HOST_WIDE_INT v); @@ -55,8 +54,6 @@ extern bool exp2_immediate_p (rtx op, enum machine_mode mode, int low, int high); extern int spu_constant_address_p (rtx x); extern int spu_legitimate_constant_p (rtx x); -extern int spu_legitimate_address (enum machine_mode mode, rtx x, - int reg_ok_strict); extern int spu_initial_elimination_offset (int from, int to); extern rtx spu_function_value (const_tree type, const_tree func); extern rtx spu_function_arg (int cum, enum machine_mode mode, tree type, diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index bb73622f9d5..b8e08c83ea6 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -152,6 +152,7 @@ char regs_ever_allocated[FIRST_PSEUDO_REGISTER]; static void spu_init_builtins (void); static unsigned char spu_scalar_mode_supported_p (enum machine_mode mode); static unsigned char spu_vector_mode_supported_p (enum machine_mode mode); +static bool spu_legitimate_address_p (enum machine_mode, rtx, bool); static rtx adjust_operand (rtx op, HOST_WIDE_INT * start); static rtx get_pic_reg (void); static int need_to_save_reg (int regno, int saving); @@ -212,7 +213,6 @@ static void asm_file_start (void); static unsigned int spu_section_type_flags (tree, const char *, int); extern const char *reg_names[]; -rtx spu_compare_op0, spu_compare_op1; /* Which instruction set architecture to use. */ int spu_arch; @@ -400,6 +400,9 @@ const struct attribute_spec spu_attribute_table[]; #undef TARGET_SECTION_TYPE_FLAGS #define TARGET_SECTION_TYPE_FLAGS spu_section_type_flags +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P spu_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; void @@ -844,42 +847,44 @@ int spu_comp_icode[12][3] = { WORD_MODE, we can generate better code in most cases if we do it ourselves. */ void -spu_emit_branch_or_set (int is_set, enum rtx_code code, rtx operands[]) +spu_emit_branch_or_set (int is_set, rtx cmp, rtx operands[]) { int reverse_compare = 0; int reverse_test = 0; rtx compare_result, eq_result; rtx comp_rtx, eq_rtx; - rtx target = operands[0]; enum machine_mode comp_mode; enum machine_mode op_mode; enum spu_comp_code scode, eq_code; enum insn_code ior_code; + enum rtx_code code = GET_CODE (cmp); + rtx op0 = XEXP (cmp, 0); + rtx op1 = XEXP (cmp, 1); int index; int eq_test = 0; - /* When spu_compare_op1 is a CONST_INT change (X >= C) to (X > C-1), + /* When op1 is a CONST_INT change (X >= C) to (X > C-1), and so on, to keep the constant in operand 1. */ - if (GET_CODE (spu_compare_op1) == CONST_INT) + if (GET_CODE (op1) == CONST_INT) { - HOST_WIDE_INT val = INTVAL (spu_compare_op1) - 1; - if (trunc_int_for_mode (val, GET_MODE (spu_compare_op0)) == val) + HOST_WIDE_INT val = INTVAL (op1) - 1; + if (trunc_int_for_mode (val, GET_MODE (op0)) == val) switch (code) { case GE: - spu_compare_op1 = GEN_INT (val); + op1 = GEN_INT (val); code = GT; break; case LT: - spu_compare_op1 = GEN_INT (val); + op1 = GEN_INT (val); code = LE; break; case GEU: - spu_compare_op1 = GEN_INT (val); + op1 = GEN_INT (val); code = GTU; break; case LTU: - spu_compare_op1 = GEN_INT (val); + op1 = GEN_INT (val); code = LEU; break; default: @@ -888,7 +893,7 @@ spu_emit_branch_or_set (int is_set, enum rtx_code code, rtx operands[]) } comp_mode = SImode; - op_mode = GET_MODE (spu_compare_op0); + op_mode = GET_MODE (op0); switch (code) { @@ -1012,18 +1017,18 @@ spu_emit_branch_or_set (int is_set, enum rtx_code code, rtx operands[]) abort (); } - if (GET_MODE (spu_compare_op1) == DFmode + if (GET_MODE (op1) == DFmode && (scode != SPU_GT && scode != SPU_EQ)) abort (); - if (is_set == 0 && spu_compare_op1 == const0_rtx - && (GET_MODE (spu_compare_op0) == SImode - || GET_MODE (spu_compare_op0) == HImode) && scode == SPU_EQ) + if (is_set == 0 && op1 == const0_rtx + && (GET_MODE (op0) == SImode + || GET_MODE (op0) == HImode) && scode == SPU_EQ) { /* Don't need to set a register with the result when we are comparing against zero and branching. */ reverse_test = !reverse_test; - compare_result = spu_compare_op0; + compare_result = op0; } else { @@ -1031,23 +1036,22 @@ spu_emit_branch_or_set (int is_set, enum rtx_code code, rtx operands[]) if (reverse_compare) { - rtx t = spu_compare_op1; - spu_compare_op1 = spu_compare_op0; - spu_compare_op0 = t; + rtx t = op1; + op1 = op0; + op0 = t; } if (spu_comp_icode[index][scode] == 0) abort (); if (!(*insn_data[spu_comp_icode[index][scode]].operand[1].predicate) - (spu_compare_op0, op_mode)) - spu_compare_op0 = force_reg (op_mode, spu_compare_op0); + (op0, op_mode)) + op0 = force_reg (op_mode, op0); if (!(*insn_data[spu_comp_icode[index][scode]].operand[2].predicate) - (spu_compare_op1, op_mode)) - spu_compare_op1 = force_reg (op_mode, spu_compare_op1); + (op1, op_mode)) + op1 = force_reg (op_mode, op1); comp_rtx = GEN_FCN (spu_comp_icode[index][scode]) (compare_result, - spu_compare_op0, - spu_compare_op1); + op0, op1); if (comp_rtx == 0) abort (); emit_insn (comp_rtx); @@ -1056,8 +1060,7 @@ spu_emit_branch_or_set (int is_set, enum rtx_code code, rtx operands[]) { eq_result = gen_reg_rtx (comp_mode); eq_rtx = GEN_FCN (spu_comp_icode[index][eq_code]) (eq_result, - spu_compare_op0, - spu_compare_op1); + op0, op1); if (eq_rtx == 0) abort (); emit_insn (eq_rtx); @@ -1088,13 +1091,14 @@ spu_emit_branch_or_set (int is_set, enum rtx_code code, rtx operands[]) else bcomp = gen_rtx_NE (comp_mode, compare_result, const0_rtx); - loc_ref = gen_rtx_LABEL_REF (VOIDmode, target); + loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands[3]); emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp, loc_ref, pc_rtx))); } else if (is_set == 2) { + rtx target = operands[0]; int compare_size = GET_MODE_BITSIZE (comp_mode); int target_size = GET_MODE_BITSIZE (GET_MODE (target)); enum machine_mode mode = mode_for_size (target_size, MODE_INT, 0); @@ -1129,6 +1133,7 @@ spu_emit_branch_or_set (int is_set, enum rtx_code code, rtx operands[]) } else { + rtx target = operands[0]; if (reverse_test) emit_insn (gen_rtx_SET (VOIDmode, compare_result, gen_rtx_NOT (comp_mode, compare_result))); @@ -3611,9 +3616,9 @@ spu_legitimate_constant_p (rtx x) The alignment matters in the reg+const case because lqd and stqd ignore the 4 least significant bits of the const. (TODO: It might be preferable to allow any alignment and fix it up when splitting.) */ -int -spu_legitimate_address (enum machine_mode mode ATTRIBUTE_UNUSED, - rtx x, int reg_ok_strict) +bool +spu_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, + rtx x, bool reg_ok_strict) { if (mode == TImode && GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT diff --git a/gcc/config/spu/spu.h b/gcc/config/spu/spu.h index ed92715cd01..f994f3709c1 100644 --- a/gcc/config/spu/spu.h +++ b/gcc/config/spu/spu.h @@ -416,17 +416,6 @@ targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \ #define MAX_REGS_PER_ADDRESS 2 -#ifdef REG_OK_STRICT -# define REG_OK_STRICT_FLAG 1 -#else -# define REG_OK_STRICT_FLAG 0 -#endif - -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - { if (spu_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \ - goto ADDR; \ - } - #define LEGITIMATE_CONSTANT_P(X) spu_legitimate_constant_p(X) @@ -606,11 +595,6 @@ targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \ } \ } while (0) -/* These are set by the cmp patterns and used while expanding - conditional branches. */ -extern GTY(()) rtx spu_compare_op0; -extern GTY(()) rtx spu_compare_op1; - /* Builtins. */ diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md index bd6936fd9e3..db42db16111 100644 --- a/gcc/config/spu/spu.md +++ b/gcc/config/spu/spu.md @@ -3657,57 +3657,6 @@ selb\t%0,%4,%0,%3" [(set_attr "type" "br")]) -;; Compare insns are next. Note that the spu has two types of compares, -;; signed & unsigned, and one type of branch. -;; -;; Start with the DEFINE_EXPANDs to generate the rtl for compares, scc -;; insns, and branches. We store the operands of compares until we see -;; how it is used. - -(define_expand "cmp<mode>" - [(set (cc0) - (compare (match_operand:VQHSI 0 "spu_reg_operand" "") - (match_operand:VQHSI 1 "spu_nonmem_operand" "")))] - "" - { - spu_compare_op0 = operands[0]; - spu_compare_op1 = operands[1]; - DONE; - }) - -(define_expand "cmp<mode>" - [(set (cc0) - (compare (match_operand:DTI 0 "spu_reg_operand" "") - (match_operand:DTI 1 "spu_reg_operand" "")))] - "" - { - spu_compare_op0 = operands[0]; - spu_compare_op1 = operands[1]; - DONE; - }) - -(define_expand "cmp<mode>" - [(set (cc0) - (compare (match_operand:VSF 0 "spu_reg_operand" "") - (match_operand:VSF 1 "spu_reg_operand" "")))] - "" - { - spu_compare_op0 = operands[0]; - spu_compare_op1 = operands[1]; - DONE; - }) - -(define_expand "cmpdf" - [(set (cc0) - (compare (match_operand:DF 0 "register_operand" "") - (match_operand:DF 1 "register_operand" "")))] - "" - "{ - spu_compare_op0 = operands[0]; - spu_compare_op1 = operands[1]; - DONE; -}") - ;; vector conditional compare patterns (define_expand "vcond<mode>" [(set (match_operand:VCMP 0 "spu_reg_operand" "=r") @@ -3746,108 +3695,72 @@ selb\t%0,%4,%0,%3" ;; branch on condition -(define_expand "beq" - [(use (match_operand 0 "" ""))] - "" - { spu_emit_branch_or_set (0, EQ, operands); DONE; }) - -(define_expand "bne" - [(use (match_operand 0 "" ""))] - "" - { spu_emit_branch_or_set (0, NE, operands); DONE; }) - -(define_expand "bge" - [(use (match_operand 0 "" ""))] - "" - { spu_emit_branch_or_set (0, GE, operands); DONE; }) - -(define_expand "bgt" - [(use (match_operand 0 "" ""))] - "" - { spu_emit_branch_or_set (0, GT, operands); DONE; }) - -(define_expand "ble" - [(use (match_operand 0 "" ""))] - "" - { spu_emit_branch_or_set (0, LE, operands); DONE; }) - -(define_expand "blt" - [(use (match_operand 0 "" ""))] +(define_expand "cbranch<mode>4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:VQHSI 1 "spu_reg_operand" "") + (match_operand:VQHSI 2 "spu_nonmem_operand" "")])) + (use (match_operand 3 ""))] "" - { spu_emit_branch_or_set (0, LT, operands); DONE; }) + { spu_emit_branch_or_set (0, operands[0], operands); DONE; }) -(define_expand "bgeu" - [(use (match_operand 0 "" ""))] +(define_expand "cbranch<mode>4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:DTI 1 "spu_reg_operand" "") + (match_operand:DTI 2 "spu_reg_operand" "")])) + (use (match_operand 3 ""))] "" - { spu_emit_branch_or_set (0, GEU, operands); DONE; }) + { spu_emit_branch_or_set (0, operands[0], operands); DONE; }) -(define_expand "bgtu" - [(use (match_operand 0 "" ""))] +(define_expand "cbranch<mode>4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:VSF 1 "spu_reg_operand" "") + (match_operand:VSF 2 "spu_reg_operand" "")])) + (use (match_operand 3 ""))] "" - { spu_emit_branch_or_set (0, GTU, operands); DONE; }) + { spu_emit_branch_or_set (0, operands[0], operands); DONE; }) -(define_expand "bleu" - [(use (match_operand 0 "" ""))] +(define_expand "cbranchdf4" + [(use (match_operator 0 "ordered_comparison_operator" + [(match_operand:DF 1 "spu_reg_operand" "") + (match_operand:DF 2 "spu_reg_operand" "")])) + (use (match_operand 3 ""))] "" - { spu_emit_branch_or_set (0, LEU, operands); DONE; }) - -(define_expand "bltu" - [(use (match_operand 0 "" ""))] - "" - { spu_emit_branch_or_set (0, LTU, operands); DONE; }) + { spu_emit_branch_or_set (0, operands[0], operands); DONE; }) ;; set on condition -(define_expand "seq" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] - "" - { spu_emit_branch_or_set (1, EQ, operands); DONE; }) - -(define_expand "sne" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] - "" - { spu_emit_branch_or_set (1, NE, operands); DONE; }) - -(define_expand "sgt" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] - "" - { spu_emit_branch_or_set (1, GT, operands); DONE; }) - -(define_expand "slt" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] - "" - { spu_emit_branch_or_set (1, LT, operands); DONE; }) - -(define_expand "sge" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] - "" - { spu_emit_branch_or_set (1, GE, operands); DONE; }) - -(define_expand "sle" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] - "" - { spu_emit_branch_or_set (1, LE, operands); DONE; }) - -(define_expand "sgtu" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] +(define_expand "cstore<mode>4" + [(use (match_operator 1 "ordered_comparison_operator" + [(match_operand:VQHSI 2 "spu_reg_operand" "") + (match_operand:VQHSI 3 "spu_nonmem_operand" "")])) + (clobber (match_operand:SI 0 "spu_reg_operand"))] "" - { spu_emit_branch_or_set (1, GTU, operands); DONE; }) + { spu_emit_branch_or_set (1, operands[1], operands); DONE; }) -(define_expand "sltu" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] +(define_expand "cstore<mode>4" + [(use (match_operator 1 "ordered_comparison_operator" + [(match_operand:DTI 2 "spu_reg_operand" "") + (match_operand:DTI 3 "spu_reg_operand" "")])) + (clobber (match_operand:SI 0 "spu_reg_operand"))] "" - { spu_emit_branch_or_set (1, LTU, operands); DONE; }) + { spu_emit_branch_or_set (1, operands[1], operands); DONE; }) -(define_expand "sgeu" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] +(define_expand "cstore<mode>4" + [(use (match_operator 1 "ordered_comparison_operator" + [(match_operand:VSF 2 "spu_reg_operand" "") + (match_operand:VSF 3 "spu_reg_operand" "")])) + (clobber (match_operand:SI 0 "spu_reg_operand"))] "" - { spu_emit_branch_or_set (1, GEU, operands); DONE; }) + { spu_emit_branch_or_set (1, operands[1], operands); DONE; }) -(define_expand "sleu" - [(clobber (match_operand:SI 0 "spu_reg_operand" ""))] +(define_expand "cstoredf4" + [(use (match_operator 1 "ordered_comparison_operator" + [(match_operand:DF 2 "spu_reg_operand" "") + (match_operand:DF 3 "spu_reg_operand" "")])) + (clobber (match_operand:SI 0 "spu_reg_operand"))] "" - { spu_emit_branch_or_set (1, LEU, operands); DONE; }) + { spu_emit_branch_or_set (1, operands[1], operands); DONE; }) ;; conditional move @@ -3863,12 +3776,12 @@ selb\t%0,%4,%0,%3" (define_expand "mov<mode>cc" [(set (match_operand:ALL 0 "spu_reg_operand" "") - (if_then_else:ALL (match_operand 1 "comparison_operator" "") + (if_then_else:ALL (match_operand 1 "ordered_comparison_operator" "") (match_operand:ALL 2 "spu_reg_operand" "") (match_operand:ALL 3 "spu_reg_operand" "")))] "" { - spu_emit_branch_or_set(2, GET_CODE(operands[1]), operands); + spu_emit_branch_or_set(2, operands[1], operands); DONE; }) diff --git a/gcc/config/stormy16/stormy16-protos.h b/gcc/config/stormy16/stormy16-protos.h index 58cff8a26e9..e6fe4c0c969 100644 --- a/gcc/config/stormy16/stormy16-protos.h +++ b/gcc/config/stormy16/stormy16-protos.h @@ -48,7 +48,7 @@ extern rtx xstormy16_function_value (const_tree, const_tree); #endif #ifdef RTX_CODE -extern void xstormy16_emit_cbranch (enum rtx_code, rtx); +extern void xstormy16_emit_cbranch (enum rtx_code, rtx, rtx, rtx); extern char *xstormy16_output_cbranch_hi (rtx, const char *, int, rtx); extern char *xstormy16_output_cbranch_si (rtx, const char *, int, rtx); extern int xstormy16_mode_dependent_address_p (rtx); @@ -71,7 +71,6 @@ extern int nonimmediate_nonstack_operand (rtx, enum machine_mode); extern enum reg_class xstormy16_secondary_reload_class (enum reg_class, enum machine_mode, rtx); extern enum reg_class xstormy16_preferred_reload_class (rtx, enum reg_class); -extern int xstormy16_legitimate_address_p (enum machine_mode, rtx, int); extern void xstormy16_split_move (enum machine_mode, rtx, rtx); extern void xstormy16_expand_move (enum machine_mode, rtx, rtx); extern void xstormy16_expand_arith (enum machine_mode, enum rtx_code, diff --git a/gcc/config/stormy16/stormy16.c b/gcc/config/stormy16/stormy16.c index eefc58f0847..16814ab4e7d 100644 --- a/gcc/config/stormy16/stormy16.c +++ b/gcc/config/stormy16/stormy16.c @@ -61,11 +61,6 @@ static bool xstormy16_rtx_costs (rtx, int, int, int *, bool); static int xstormy16_address_cost (rtx, bool); static bool xstormy16_return_in_memory (const_tree, const_tree); -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. */ -struct rtx_def * xstormy16_compare_op0; -struct rtx_def * xstormy16_compare_op1; - static GTY(()) section *bss100_section; /* Compute a (partial) cost for rtx X. Return true if the complete @@ -139,10 +134,8 @@ xstormy16_address_cost (rtx x, bool speed ATTRIBUTE_UNUSED) /* Emit a branch of kind CODE to location LOC. */ void -xstormy16_emit_cbranch (enum rtx_code code, rtx loc) +xstormy16_emit_cbranch (enum rtx_code code, rtx op0, rtx op1, rtx loc) { - rtx op0 = xstormy16_compare_op0; - rtx op1 = xstormy16_compare_op1; rtx condition_rtx, loc_ref, branch, cy_clobber; rtvec vec; enum machine_mode mode; @@ -159,10 +152,10 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc) if (gt_p) lab = gen_label_rtx (); - xstormy16_emit_cbranch (unsigned_p ? LTU : LT, gt_p ? lab : loc); + xstormy16_emit_cbranch (unsigned_p ? LTU : LT, op0, op1, gt_p ? lab : loc); /* This should be generated as a comparison against the temporary created by the previous insn, but reload can't handle that. */ - xstormy16_emit_cbranch (gt_p ? NE : EQ, loc); + xstormy16_emit_cbranch (gt_p ? NE : EQ, op0, op1, loc); if (gt_p) emit_label (lab); return; @@ -171,6 +164,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc) && (code == NE || code == EQ) && op1 != const0_rtx) { + rtx op0_word, op1_word; rtx lab = NULL_RTX; int num_words = GET_MODE_BITSIZE (mode) / BITS_PER_WORD; int i; @@ -180,17 +174,17 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc) for (i = 0; i < num_words - 1; i++) { - xstormy16_compare_op0 = simplify_gen_subreg (word_mode, op0, mode, - i * UNITS_PER_WORD); - xstormy16_compare_op1 = simplify_gen_subreg (word_mode, op1, mode, - i * UNITS_PER_WORD); - xstormy16_emit_cbranch (NE, code == EQ ? lab : loc); + op0_word = simplify_gen_subreg (word_mode, op0, mode, + i * UNITS_PER_WORD); + op1_word = simplify_gen_subreg (word_mode, op1, mode, + i * UNITS_PER_WORD); + xstormy16_emit_cbranch (NE, op0_word, op1_word, code == EQ ? lab : loc); } - xstormy16_compare_op0 = simplify_gen_subreg (word_mode, op0, mode, - i * UNITS_PER_WORD); - xstormy16_compare_op1 = simplify_gen_subreg (word_mode, op1, mode, - i * UNITS_PER_WORD); - xstormy16_emit_cbranch (code, loc); + op0_word = simplify_gen_subreg (word_mode, op0, mode, + i * UNITS_PER_WORD); + op1_word = simplify_gen_subreg (word_mode, op1, mode, + i * UNITS_PER_WORD); + xstormy16_emit_cbranch (code, op0_word, op1_word, loc); if (code == EQ) emit_label (lab); @@ -619,9 +613,9 @@ xstormy16_expand_andqi3 (rtx *operands) && INTVAL (X) + (OFFSET) < 0x8000 \ && (INTVAL (X) + (OFFSET) < 0x100 || INTVAL (X) + (OFFSET) >= 0x7F00)) -int +static bool xstormy16_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, - rtx x, int strict) + rtx x, bool strict) { if (LEGITIMATE_ADDRESS_CONST_INT_P (x, 0)) return 1; @@ -2656,6 +2650,9 @@ xstormy16_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) #undef TARGET_MACHINE_DEPENDENT_REORG #define TARGET_MACHINE_DEPENDENT_REORG xstormy16_reorg +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P xstormy16_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-stormy16.h" diff --git a/gcc/config/stormy16/stormy16.h b/gcc/config/stormy16/stormy16.h index 675b94d9949..cb35a13ab6a 100644 --- a/gcc/config/stormy16/stormy16.h +++ b/gcc/config/stormy16/stormy16.h @@ -537,20 +537,6 @@ enum reg_class #define MAX_REGS_PER_ADDRESS 1 #ifdef REG_OK_STRICT -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ -do { \ - if (xstormy16_legitimate_address_p (MODE, X, 1)) \ - goto LABEL; \ -} while (0) -#else -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ -do { \ - if (xstormy16_legitimate_address_p (MODE, X, 0)) \ - goto LABEL; \ -} while (0) -#endif - -#ifdef REG_OK_STRICT #define REG_OK_FOR_BASE_P(X) \ (REGNO_OK_FOR_BASE_P (REGNO (X)) && (REGNO (X) < FIRST_PSEUDO_REGISTER)) #else @@ -801,11 +787,4 @@ do { \ is responsible for updating the value of MORE (typically by (MORE)--). */ /* #define MD_SCHED_VARIABLE_ISSUE (FILE, VERBOSE, INSN, MORE) */ - -/* Define the information needed to generate branch and scc insns. This is - stored from the compare operation. Note that we can't use "rtx" here - since it hasn't been defined! */ - -extern struct rtx_def *xstormy16_compare_op0, *xstormy16_compare_op1; - /* End of xstormy16.h */ diff --git a/gcc/config/stormy16/stormy16.md b/gcc/config/stormy16/stormy16.md index 43e454804a1..9c86d43e627 100644 --- a/gcc/config/stormy16/stormy16.md +++ b/gcc/config/stormy16/stormy16.md @@ -736,40 +736,7 @@ operands[0], operands[2], operands[3]);" [(set_attr "length" "6,10") (set_attr "psw_operand" "clobber,clobber")]) - -;; :::::::::::::::::::: -;; :: -;; :: Comparisons -;; :: -;; :::::::::::::::::::: - -;; Note, we store the operands in the comparison insns, and use them later -;; when generating the branch or scc operation. - -;; First the routines called by the machine independent part of the compiler -(define_expand "cmphi" - [(set (cc0) - (compare (match_operand:HI 0 "register_operand" "") - (match_operand:HI 1 "nonmemory_operand" "")))] - "" - { - xstormy16_compare_op0 = operands[0]; - xstormy16_compare_op1 = operands[1]; - DONE; - }) -; There are no real SImode comparisons, but some can be emulated -; by performing a SImode subtract and looking at the condition flags. -(define_expand "cmpsi" - [(set (cc0) - (compare (match_operand:SI 0 "register_operand" "") - (match_operand:SI 1 "nonmemory_operand" "")))] - "" - { - xstormy16_compare_op0 = operands[0]; - xstormy16_compare_op1 = operands[1]; - DONE; - }) ;; :::::::::::::::::::: ;; :: @@ -777,55 +744,35 @@ ;; :: ;; :::::::::::::::::::: -(define_expand "beq" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (EQ, operands[0]); DONE; }) - -(define_expand "bne" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (NE, operands[0]); DONE; }) - -(define_expand "bge" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (GE, operands[0]); DONE; }) - -(define_expand "bgt" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (GT, operands[0]); DONE; }) - -(define_expand "ble" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (LE, operands[0]); DONE; }) - -(define_expand "blt" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (LT, operands[0]); DONE; }) - -(define_expand "bgeu" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (GEU, operands[0]); DONE; }) - -(define_expand "bgtu" - [(use (match_operand 0 "" ""))] - "" - { xstormy16_emit_cbranch (GTU, operands[0]); DONE; }) - -(define_expand "bleu" - [(use (match_operand 0 "" ""))] +(define_expand "cbranchhi4" + [(set (pc) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:HI 1 "register_operand" "") + (match_operand:HI 2 "nonmemory_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc))) + (clobber (reg:BI CARRY_REG))] "" - { xstormy16_emit_cbranch (LEU, operands[0]); DONE; }) + { + xstormy16_emit_cbranch (GET_CODE (operands[0]), operands[1], operands[2], + operands[3]); + DONE; +}) -(define_expand "bltu" - [(use (match_operand 0 "" ""))] +(define_expand "cbranchsi4" + [(set (pc) + (if_then_else (match_operator 0 "comparison_operator" + [(match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" "")]) + (label_ref (match_operand 3 "" "")) + (pc))) + (clobber (reg:BI CARRY_REG))] "" - { xstormy16_emit_cbranch (LTU, operands[0]); DONE; }) + { + xstormy16_emit_cbranch (GET_CODE (operands[0]), operands[1], operands[2], + operands[3]); + DONE; +}) (define_insn "cbranchhi" [(set (pc) diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c index a562202538b..f9e8a7dd8b0 100644 --- a/gcc/config/v850/v850.c +++ b/gcc/config/v850/v850.c @@ -464,6 +464,11 @@ v850_rtx_costs (rtx x, *total = 20; return true; + case ZERO_EXTRACT: + if (outer_code == COMPARE) + *total = 0; + return false; + default: return false; } diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md index dad3cdd885b..69c8d881f89 100644 --- a/gcc/config/v850/v850.md +++ b/gcc/config/v850/v850.md @@ -227,9 +227,11 @@ ;; ---------------------------------------------------------------------- (define_insn "*v850_tst1" - [(set (cc0) (zero_extract:SI (match_operand:QI 0 "memory_operand" "m") - (const_int 1) - (match_operand:QI 1 "const_int_operand" "n")))] + [(set (cc0) + (compare (zero_extract:SI (match_operand:QI 0 "memory_operand" "m") + (const_int 1) + (match_operand:QI 1 "const_int_operand" "n")) + (const_int 0)))] "" "tst1 %1,%0" [(set_attr "length" "4") @@ -237,37 +239,52 @@ ;; This replaces ld.b;sar;andi with tst1;setf nz. -;; ??? The zero_extract sets the Z bit to the opposite of what one would -;; expect. This perhaps should be wrapped in a (eq: X (const_int 0)). - (define_split [(set (match_operand:SI 0 "register_operand" "") - (zero_extract:SI (match_operand:QI 1 "memory_operand" "") - (const_int 1) - (match_operand 2 "const_int_operand" "")))] - "" - [(set (cc0) (zero_extract:SI (match_dup 1) - (const_int 1) - (match_dup 2))) + (compare (zero_extract:SI (match_operand:QI 1 "memory_operand" "") + (const_int 1) + (match_operand 2 "const_int_operand" "")) + (const_int 0)))] + "" + [(set (cc0) (compare (zero_extract:SI (match_dup 1) + (const_int 1) + (match_dup 2)) + (const_int 0))) (set (match_dup 0) (ne:SI (cc0) (const_int 0)))]) -(define_insn "tstsi" - [(set (cc0) (match_operand:SI 0 "register_operand" "r"))] - "" - "cmp %.,%0" - [(set_attr "length" "2") - (set_attr "cc" "set_znv")]) +(define_expand "cbranchsi4" + [(set (cc0) + (compare (match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "reg_or_int5_operand" ""))) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "") + +(define_expand "cstoresi4" + [(set (cc0) + (compare (match_operand:SI 2 "register_operand" "") + (match_operand:SI 3 "reg_or_int5_operand" ""))) + (set (match_operand:SI 0 "register_operand") + (match_operator:SI 1 "ordered_comparison_operator" [(cc0) + (const_int 0)]))] + "") -(define_insn "cmpsi" +(define_insn "*cmpsi" [(set (cc0) - (compare (match_operand:SI 0 "register_operand" "r,r") - (match_operand:SI 1 "reg_or_int5_operand" "r,J")))] + (compare (match_operand:SI 0 "register_operand" "r,r,r") + (match_operand:SI 1 "reg_or_int5_operand" "r,I,J")))] "" "@ cmp %1,%0 + cmp %.,%0 cmp %1,%0" - [(set_attr "length" "2,2") - (set_attr "cc" "compare")]) + [(set_attr "length" "2,2,2") + (set_attr "cc" "compare,set_znv,compare")]) + ;; ---------------------------------------------------------------------- ;; ADD INSTRUCTIONS @@ -688,110 +705,25 @@ ;; Scc INSTRUCTIONS ;; ----------------------------------------------------------------- -(define_insn "sle" - [(set (match_operand:SI 0 "register_operand" "=r") - (le:SI (cc0) (const_int 0)))] - "" - "* -{ - if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0) - return 0; - - return \"setf le,%0\"; -}" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "sleu" - [(set (match_operand:SI 0 "register_operand" "=r") - (leu:SI (cc0) (const_int 0)))] - "" - "setf nh,%0" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "sge" - [(set (match_operand:SI 0 "register_operand" "=r") - (ge:SI (cc0) (const_int 0)))] - "" - "* -{ - if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0) - return 0; - - return \"setf ge,%0\"; -}" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "sgeu" +(define_insn "*setcc" [(set (match_operand:SI 0 "register_operand" "=r") - (geu:SI (cc0) (const_int 0)))] - "" - "setf nl,%0" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "slt" - [(set (match_operand:SI 0 "register_operand" "=r") - (lt:SI (cc0) (const_int 0)))] - "" - "* -{ - if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0) - return 0; - - return \"setf lt,%0\"; -}" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "sltu" - [(set (match_operand:SI 0 "register_operand" "=r") - (ltu:SI (cc0) (const_int 0)))] - "" - "setf l,%0" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "sgt" - [(set (match_operand:SI 0 "register_operand" "=r") - (gt:SI (cc0) (const_int 0)))] + (match_operator:SI 1 "comparison_operator" + [(cc0) (const_int 0)]))] "" "* { - if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0) + if ((cc_status.flags & CC_OVERFLOW_UNUSABLE) != 0 + && (GET_CODE (operands[1]) == GT + || GET_CODE (operands[1]) == GE + || GET_CODE (operands[1]) == LE + || GET_CODE (operands[1]) == LT)) return 0; - return \"setf gt,%0\"; + return \"setf %c1,%0\"; }" [(set_attr "length" "4") (set_attr "cc" "none_0hit")]) -(define_insn "sgtu" - [(set (match_operand:SI 0 "register_operand" "=r") - (gtu:SI (cc0) (const_int 0)))] - "" - "setf h,%0" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "seq" - [(set (match_operand:SI 0 "register_operand" "=r") - (eq:SI (cc0) (const_int 0)))] - "" - "setf z,%0" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - -(define_insn "sne" - [(set (match_operand:SI 0 "register_operand" "=r") - (ne:SI (cc0) (const_int 0)))] - "" - "setf nz,%0" - [(set_attr "length" "4") - (set_attr "cc" "none_0hit")]) - ;; ---------------------------------------------------------------------- ;; CONDITIONAL MOVE INSTRUCTIONS ;; ---------------------------------------------------------------------- @@ -800,25 +732,15 @@ ;; hide the fact that this instruction uses cc0. We do so by including the ;; compare instruction inside it. -;; ??? This is very ugly. The right way to do this is to modify cmpsi so -;; that it doesn't emit RTL, and then modify the bcc/scc patterns so that -;; they emit RTL for the compare instruction. Unfortunately, this requires -;; lots of changes that will be hard to sanitize. So for now, cmpsi still -;; emits RTL, and I get the compare operands here from the previous insn. - (define_expand "movsicc" [(set (match_operand:SI 0 "register_operand" "=r") (if_then_else:SI - (match_operator 1 "comparison_operator" - [(match_dup 4) (match_dup 5)]) + (match_operand 1 "comparison_operator") (match_operand:SI 2 "reg_or_const_operand" "rJ") (match_operand:SI 3 "reg_or_const_operand" "rI")))] "TARGET_V850E" " { - rtx insn = get_last_insn_anywhere (); - rtx src; - if ( (GET_CODE (operands[2]) == CONST_INT && GET_CODE (operands[3]) == CONST_INT)) { @@ -845,28 +767,6 @@ if (GET_CODE (operands[3]) != REG) operands[3] = copy_to_mode_reg (SImode, operands[3]); } - gcc_assert (GET_CODE (insn) == INSN - && GET_CODE (PATTERN (insn)) == SET - && SET_DEST (PATTERN (insn)) == cc0_rtx); - - src = SET_SRC (PATTERN (insn)); - - switch (GET_CODE (src)) - { - case COMPARE: - operands[4] = XEXP (src, 0); - operands[5] = XEXP (src, 1); - break; - - case REG: - case SUBREG: - operands[4] = src; - operands[5] = const0_rtx; - break; - - default: - gcc_unreachable (); - } }") ;; ??? Clobbering the condition codes is overkill. @@ -1037,96 +937,6 @@ ;; Conditional jump instructions -(define_expand "ble" - [(set (pc) - (if_then_else (le (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bleu" - [(set (pc) - (if_then_else (leu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bge" - [(set (pc) - (if_then_else (ge (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bgeu" - [(set (pc) - (if_then_else (geu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "blt" - [(set (pc) - (if_then_else (lt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bltu" - [(set (pc) - (if_then_else (ltu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bgt" - [(set (pc) - (if_then_else (gt (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bgtu" - [(set (pc) - (if_then_else (gtu (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "beq" - [(set (pc) - (if_then_else (eq (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - -(define_expand "bne" - [(set (pc) - (if_then_else (ne (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" - "") - (define_insn "*branch_normal" [(set (pc) (if_then_else (match_operator 1 "comparison_operator" @@ -1241,14 +1051,16 @@ { rtx reg = gen_reg_rtx (SImode); rtx tableaddress = gen_reg_rtx (SImode); + rtx test; rtx mem; /* Subtract the lower bound from the index. */ emit_insn (gen_subsi3 (reg, operands[0], operands[1])); - /* Compare the result against the number of table entries. */ - emit_insn (gen_cmpsi (reg, operands[2])); - /* Branch to the default label if out of range of the table. */ - emit_jump_insn (gen_bgtu (operands[4])); + + /* Compare the result against the number of table entries; + branch to the default label if out of range of the table. */ + test = gen_rtx_fmt_ee (GTU, VOIDmode, reg, operands[2]); + emit_jump_insn (gen_cbranchsi4 (test, reg, operands[2], operands[4])); /* Shift index for the table array access. */ emit_insn (gen_ashlsi3 (reg, reg, GEN_INT (TARGET_BIG_SWITCH ? 2 : 1))); diff --git a/gcc/config/vax/vax-protos.h b/gcc/config/vax/vax-protos.h index 9b43d4f86e9..86feccda732 100644 --- a/gcc/config/vax/vax-protos.h +++ b/gcc/config/vax/vax-protos.h @@ -19,13 +19,12 @@ along with GCC; see the file COPYING3. If not see extern void override_options (void); -extern bool legitimate_constant_address_p (rtx); -extern bool legitimate_constant_p (rtx); -extern bool legitimate_pic_operand_p (rtx); -extern bool legitimate_address_p (enum machine_mode, rtx, bool); -extern bool vax_mode_dependent_address_p (rtx); +extern int legitimate_constant_address_p (rtx); +extern int legitimate_constant_p (rtx); +extern int vax_mode_dependent_address_p (rtx); #ifdef RTX_CODE +extern const char *cond_name (rtx); extern bool adjacent_operands_p (rtx, rtx, enum machine_mode); extern const char *rev_cond_name (rtx); extern void print_operand_address (FILE *, rtx); @@ -35,7 +34,6 @@ extern void vax_expand_addsub_di_operands (rtx *, enum rtx_code); extern const char * vax_output_int_move (rtx, rtx *, enum machine_mode); extern const char * vax_output_int_add (rtx, rtx *, enum machine_mode); extern const char * vax_output_int_subtract (rtx, rtx *, enum machine_mode); -extern const char * vax_output_conditional_branch (enum rtx_code); extern const char * vax_output_movmemsi (rtx, rtx *); #endif /* RTX_CODE */ diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index e91696947e6..f0f6a936407 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -46,6 +46,7 @@ along with GCC; see the file COPYING3. If not see #include "target.h" #include "target-def.h" +static bool vax_legitimate_address_p (enum machine_mode, rtx, bool); static void vax_output_function_prologue (FILE *, HOST_WIDE_INT); static void vax_file_start (void); static void vax_init_libfuncs (void); @@ -94,6 +95,9 @@ static rtx vax_builtin_setjmp_frame_value (void); #undef TARGET_BUILTIN_SETJMP_FRAME_VALUE #define TARGET_BUILTIN_SETJMP_FRAME_VALUE vax_builtin_setjmp_frame_value +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P vax_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; /* Set global variables as needed for the options enabled. */ @@ -428,6 +432,8 @@ print_operand (FILE *file, rtx x, int code) fputc (ASM_DOUBLE_CHAR, file); else if (code == '|') fputs (REGISTER_PREFIX, file); + else if (code == 'c') + fputs (cond_name (x), file); else if (code == 'C') fputs (rev_cond_name (x), file); else if (code == 'D' && CONST_INT_P (x) && INTVAL (x) < 0) @@ -480,6 +486,37 @@ print_operand (FILE *file, rtx x, int code) } const char * +cond_name (rtx op) +{ + switch (GET_CODE (op)) + { + case NE: + return "neq"; + case EQ: + return "eql"; + case GE: + return "geq"; + case GT: + return "gtr"; + case LE: + return "leq"; + case LT: + return "lss"; + case GEU: + return "gequ"; + case GTU: + return "gtru"; + case LEU: + return "lequ"; + case LTU: + return "lssu"; + + default: + gcc_unreachable (); + } +} + +const char * rev_cond_name (rtx op) { switch (GET_CODE (op)) @@ -1516,27 +1553,6 @@ vax_output_int_subtract (rtx insn, rtx *operands, enum machine_mode mode) } } -/* Output a conditional branch. */ -const char * -vax_output_conditional_branch (enum rtx_code code) -{ - switch (code) - { - case EQ: return "jeql %l0"; - case NE: return "jneq %l0"; - case GT: return "jgtr %l0"; - case LT: return "jlss %l0"; - case GTU: return "jgtru %l0"; - case LTU: return "jlssu %l0"; - case GE: return "jgeq %l0"; - case LE: return "jleq %l0"; - case GEU: return "jgequ %l0"; - case LEU: return "jlequ %l0"; - default: - gcc_unreachable (); - } -} - /* True if X is an rtx for a constant that is a valid address. */ bool @@ -1719,7 +1735,7 @@ indexable_address_p (rtx xfoo0, rtx xfoo1, enum machine_mode mode, bool strict) The MODE argument is the machine mode for the MEM expression that wants to use this address. */ bool -legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +vax_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) { rtx xfoo0, xfoo1; diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h index 997029e0f62..e22fbd74386 100644 --- a/gcc/config/vax/vax.h +++ b/gcc/config/vax/vax.h @@ -540,11 +540,6 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; or if it is a pseudo reg. */ #define REG_OK_FOR_BASE_P(X) 1 -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression - that is a valid memory address for an instruction. */ -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - { if (legitimate_address_p ((MODE), (X), 0)) goto ADDR; } - #else /* Nonzero if X is a hard reg that can be used as an index. */ @@ -553,11 +548,6 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; /* Nonzero if X is a hard reg that can be used as a base reg. */ #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) -/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression - that is a valid memory address for an instruction. */ -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ - { if (legitimate_address_p ((MODE), (X), 1)) goto ADDR; } - #endif /* Go to LABEL if ADDR (a legitimate address expression) @@ -802,6 +792,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; VAX operand formatting codes: letter print + c direct branch condition C reverse branch condition D 64-bit immediate operand B the low 8 bits of the complement of a constant operand diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md index da3ca48e90b..649f17e36ba 100644 --- a/gcc/config/vax/vax.md +++ b/gcc/config/vax/vax.md @@ -58,30 +58,16 @@ (include "constraints.md") (include "predicates.md") -;; We don't want to allow a constant operand for test insns because -;; (set (cc0) (const_int foo)) has no mode information. Such insns will -;; be folded while optimizing anyway. - -(define_insn "tst<mode>" - [(set (cc0) - (match_operand:VAXint 0 "nonimmediate_operand" "nrmT"))] - "" - "tst<VAXint:isfx> %0") - -(define_insn "tst<mode>" +(define_insn "*cmp<mode>" [(set (cc0) - (match_operand:VAXfp 0 "general_operand" "gF"))] + (compare (match_operand:VAXint 0 "nonimmediate_operand" "nrmT,nrmT") + (match_operand:VAXint 1 "general_operand" "I,nrmT")))] "" - "tst<VAXfp:fsfx> %0") - -(define_insn "cmp<mode>" - [(set (cc0) - (compare (match_operand:VAXint 0 "nonimmediate_operand" "nrmT") - (match_operand:VAXint 1 "general_operand" "nrmT")))] - "" - "cmp<VAXint:isfx> %0,%1") + "@ + tst<VAXint:isfx> %0 + cmp<VAXint:isfx> %0,%1") -(define_insn "cmp<mode>" +(define_insn "*cmp<mode>" [(set (cc0) (compare (match_operand:VAXfp 0 "general_operand" "gF,gF") (match_operand:VAXfp 1 "general_operand" "G,gF")))] @@ -92,8 +78,9 @@ (define_insn "*bit<mode>" [(set (cc0) - (and:VAXint (match_operand:VAXint 0 "general_operand" "nrmT") - (match_operand:VAXint 1 "general_operand" "nrmT")))] + (compare (and:VAXint (match_operand:VAXint 0 "general_operand" "nrmT") + (match_operand:VAXint 1 "general_operand" "nrmT")) + (const_int 0)))] "" "bit<VAXint:isfx> %0,%1") @@ -1078,21 +1065,45 @@ "jbr %l0") ;; Conditional jumps -(define_code_iterator any_cond [eq ne gt lt gtu ltu ge le geu leu]) -(define_insn "b<code>" +(define_expand "cbranch<mode>4" + [(set (cc0) + (compare (match_operand:VAXint 1 "nonimmediate_operand" "") + (match_operand:VAXint 2 "general_operand" ""))) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "") + +(define_expand "cbranch<mode>4" + [(set (cc0) + (compare (match_operand:VAXfp 1 "general_operand" "") + (match_operand:VAXfp 2 "general_operand" ""))) + (set (pc) + (if_then_else + (match_operator 0 "ordered_comparison_operator" [(cc0) + (const_int 0)]) + (label_ref (match_operand 3 "" "")) + (pc)))] + "") + +(define_insn "*branch" [(set (pc) - (if_then_else (any_cond (cc0) - (const_int 0)) - (label_ref (match_operand 0 "" "")) + (if_then_else (match_operator 0 "ordered_comparison_operator" + [(cc0) + (const_int 0)]) + (label_ref (match_operand 1 "" "")) (pc)))] "" - "* return vax_output_conditional_branch (<CODE>);") + "j%c0 %l1") ;; Recognize reversed jumps. -(define_insn "" +(define_insn "*branch_reversed" [(set (pc) - (if_then_else (match_operator 0 "comparison_operator" + (if_then_else (match_operator 0 "ordered_comparison_operator" [(cc0) (const_int 0)]) (pc) @@ -1452,6 +1463,8 @@ (match_operand 4 "" "")] "" { + rtx test; + /* i = index - minimum_bound; But only if the lower bound is not already zero. */ if (operands[1] != const0_rtx) @@ -1463,9 +1476,9 @@ operands[0] = index; } - /* if (i > (maximum_bound - minimum_bound + 1) goto default; */ - emit_insn (gen_cmpsi (operands[0], operands[2])); - emit_jump_insn (gen_bgtu (operands[4])); + /* if (i > (maximum_bound - minimum_bound + 1)) goto default; */ + test = gen_rtx_fmt_ee (GTU, VOIDmode, operands[0], operands[2]); + emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2], operands[4])); /* casesi (i, 0, table); */ emit_jump_insn (gen_casesi1 (operands[0], operands[2], operands[3])); diff --git a/gcc/config/xtensa/predicates.md b/gcc/config/xtensa/predicates.md index 2cb2a7d1757..27f058de796 100644 --- a/gcc/config/xtensa/predicates.md +++ b/gcc/config/xtensa/predicates.md @@ -167,6 +167,9 @@ (define_predicate "boolean_operator" (match_code "eq,ne")) +(define_predicate "xtensa_cstoresi_operator" + (match_code "eq,ne,gt,ge,lt,le")) + (define_predicate "tls_symbol_operand" (and (match_code "symbol_ref") (match_test "SYMBOL_REF_TLS_MODEL (op) != 0"))) diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index 5f8cd74fe36..c60917f07ed 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -39,9 +39,9 @@ extern int smalloffset_mem_p (rtx); extern int constantpool_address_p (rtx); extern int constantpool_mem_p (rtx); extern void xtensa_extend_reg (rtx, rtx); -extern void xtensa_expand_conditional_branch (rtx *, enum rtx_code); +extern void xtensa_expand_conditional_branch (rtx *, enum machine_mode); extern int xtensa_expand_conditional_move (rtx *, int); -extern int xtensa_expand_scc (rtx *); +extern int xtensa_expand_scc (rtx *, enum machine_mode); extern int xtensa_expand_block_move (rtx *); extern void xtensa_split_operand_pair (rtx *, enum machine_mode); extern int xtensa_emit_move_sequence (rtx *, enum machine_mode); @@ -54,7 +54,6 @@ extern char *xtensa_emit_branch (bool, bool, rtx *); extern char *xtensa_emit_bit_branch (bool, bool, rtx *); extern char *xtensa_emit_movcc (bool, bool, bool, rtx *); extern char *xtensa_emit_call (int, rtx *); -extern bool xtensa_legitimate_address_p (enum machine_mode, rtx, bool); extern bool xtensa_tls_referenced_p (rtx); #ifdef TREE_CODE diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index 50467b4602c..9bdedc1814d 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -71,13 +71,6 @@ enum internal_test ITEST_MAX }; -/* Cached operands, and operator to compare for use in set/branch on - condition codes. */ -rtx branch_cmp[2]; - -/* what type of branch to use */ -enum cmp_type branch_type; - /* Array giving truth value on whether or not a given hard register can support a given mode. */ char xtensa_hard_regno_mode_ok[(int) MAX_MACHINE_MODE][FIRST_PSEUDO_REGISTER]; @@ -128,7 +121,7 @@ const enum reg_class xtensa_regno_to_class[FIRST_PSEUDO_REGISTER] = static enum internal_test map_test_to_internal_test (enum rtx_code); static rtx gen_int_relational (enum rtx_code, rtx, rtx, int *); static rtx gen_float_relational (enum rtx_code, rtx, rtx); -static rtx gen_conditional_move (rtx); +static rtx gen_conditional_move (enum rtx_code, enum machine_mode, rtx, rtx); static rtx fixup_subreg_mem (rtx); static struct machine_function * xtensa_init_machine_status (void); static rtx xtensa_legitimize_tls_address (rtx); @@ -137,6 +130,7 @@ static bool xtensa_return_in_msb (const_tree); static void printx (FILE *, signed int); static void xtensa_function_epilogue (FILE *, HOST_WIDE_INT); static rtx xtensa_builtin_saveregs (void); +static bool xtensa_legitimate_address_p (enum machine_mode, rtx, bool); static unsigned int xtensa_multibss_section_type_flags (tree, const char *, int) ATTRIBUTE_UNUSED; static section *xtensa_select_rtx_section (enum machine_mode, rtx, @@ -230,6 +224,9 @@ static const int reg_nonleaf_alloc_order[FIRST_PSEUDO_REGISTER] = #undef TARGET_CANNOT_FORCE_CONST_MEM #define TARGET_CANNOT_FORCE_CONST_MEM xtensa_tls_referenced_p +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P xtensa_legitimate_address_p + struct gcc_target targetm = TARGET_INITIALIZER; @@ -712,27 +709,27 @@ gen_float_relational (enum rtx_code test_code, /* relational test (EQ, etc) */ void -xtensa_expand_conditional_branch (rtx *operands, enum rtx_code test_code) +xtensa_expand_conditional_branch (rtx *operands, enum machine_mode mode) { - enum cmp_type type = branch_type; - rtx cmp0 = branch_cmp[0]; - rtx cmp1 = branch_cmp[1]; + enum rtx_code test_code = GET_CODE (operands[0]); + rtx cmp0 = operands[1]; + rtx cmp1 = operands[2]; rtx cmp; int invert; rtx label1, label2; - switch (type) + switch (mode) { - case CMP_DF: + case DFmode: default: fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1)); - case CMP_SI: + case SImode: invert = FALSE; cmp = gen_int_relational (test_code, cmp0, cmp1, &invert); break; - case CMP_SF: + case SFmode: if (!TARGET_HARD_FLOAT) fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1)); @@ -743,7 +740,7 @@ xtensa_expand_conditional_branch (rtx *operands, enum rtx_code test_code) /* Generate the branch. */ - label1 = gen_rtx_LABEL_REF (VOIDmode, operands[0]); + label1 = gen_rtx_LABEL_REF (VOIDmode, operands[3]); label2 = pc_rtx; if (invert) @@ -760,14 +757,13 @@ xtensa_expand_conditional_branch (rtx *operands, enum rtx_code test_code) static rtx -gen_conditional_move (rtx cmp) +gen_conditional_move (enum rtx_code code, enum machine_mode mode, + rtx op0, rtx op1) { - enum rtx_code code = GET_CODE (cmp); - rtx op0 = branch_cmp[0]; - rtx op1 = branch_cmp[1]; - - if (branch_type == CMP_SI) + if (mode == SImode) { + rtx cmp; + /* Jump optimization calls get_condition() which canonicalizes comparisons like (GE x <const>) to (GT x <const-1>). Transform those comparisons back to GE, since that is the @@ -825,7 +821,7 @@ gen_conditional_move (rtx cmp) return gen_rtx_fmt_ee (code, VOIDmode, op0, op1); } - if (TARGET_HARD_FLOAT && (branch_type == CMP_SF)) + if (TARGET_HARD_FLOAT && mode == SFmode) return gen_float_relational (code, op0, op1); return 0; @@ -835,36 +831,39 @@ gen_conditional_move (rtx cmp) int xtensa_expand_conditional_move (rtx *operands, int isflt) { - rtx cmp; + rtx dest = operands[0]; + rtx cmp = operands[1]; + enum machine_mode cmp_mode = GET_MODE (XEXP (cmp, 0)); rtx (*gen_fn) (rtx, rtx, rtx, rtx, rtx); - if (!(cmp = gen_conditional_move (operands[1]))) + if (!(cmp = gen_conditional_move (GET_CODE (cmp), cmp_mode, + XEXP (cmp, 0), XEXP (cmp, 1)))) return 0; if (isflt) - gen_fn = (branch_type == CMP_SI + gen_fn = (cmp_mode == SImode ? gen_movsfcc_internal0 : gen_movsfcc_internal1); else - gen_fn = (branch_type == CMP_SI + gen_fn = (cmp_mode == SImode ? gen_movsicc_internal0 : gen_movsicc_internal1); - emit_insn (gen_fn (operands[0], XEXP (cmp, 0), - operands[2], operands[3], cmp)); + emit_insn (gen_fn (dest, XEXP (cmp, 0), operands[2], operands[3], cmp)); return 1; } int -xtensa_expand_scc (rtx *operands) +xtensa_expand_scc (rtx operands[4], enum machine_mode cmp_mode) { rtx dest = operands[0]; - rtx cmp = operands[1]; + rtx cmp; rtx one_tmp, zero_tmp; rtx (*gen_fn) (rtx, rtx, rtx, rtx, rtx); - if (!(cmp = gen_conditional_move (cmp))) + if (!(cmp = gen_conditional_move (GET_CODE (operands[1]), cmp_mode, + operands[2], operands[3]))) return 0; one_tmp = gen_reg_rtx (SImode); @@ -872,7 +871,7 @@ xtensa_expand_scc (rtx *operands) emit_insn (gen_movsi (one_tmp, const_true_rtx)); emit_insn (gen_movsi (zero_tmp, const0_rtx)); - gen_fn = (branch_type == CMP_SI + gen_fn = (cmp_mode == SImode ? gen_movsicc_internal0 : gen_movsicc_internal1); emit_insn (gen_fn (dest, XEXP (cmp, 0), one_tmp, zero_tmp, cmp)); diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index 73f68ef315f..ec5dde1726c 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -27,17 +27,6 @@ extern int optimize; /* External variables defined in xtensa.c. */ -/* comparison type */ -enum cmp_type { - CMP_SI, /* four byte integers */ - CMP_DI, /* eight byte integers */ - CMP_SF, /* single precision floats */ - CMP_DF, /* double precision floats */ - CMP_MAX /* max comparison type */ -}; - -extern struct rtx_def * branch_cmp[2]; /* operands for compare */ -extern enum cmp_type branch_type; /* what type of branch to use */ extern unsigned xtensa_current_frame_size; /* Macros used in the machine description to select various Xtensa @@ -782,13 +771,6 @@ typedef struct xtensa_args /* Maximum number of registers that can appear in a valid memory address. */ #define MAX_REGS_PER_ADDRESS 1 -/* Identify valid Xtensa addresses. */ -#define GO_IF_LEGITIMATE_ADDRESS(MODE, ADDR, LABEL) \ - do { \ - if (xtensa_legitimate_address_p (MODE, ADDR, REG_OK_STRICT_FLAG)) \ - goto LABEL; \ - } while (0) - /* A C expression that is 1 if the RTX X is a constant which is a valid address. This is defined to be the same as 'CONSTANT_P (X)', but rejecting CONST_DOUBLE. */ diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 63c5db5b476..13883f1d5ca 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -64,15 +64,6 @@ (define_code_attr minmax [(smin "min") (umin "minu") (smax "max") (umax "maxu")]) -;; This code iterator allows all branch instructions to be generated from -;; a single define_expand template. -(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu - uneq ltgt ungt unge unlt unle - unordered ordered]) - -;; This code iterator is for setting a register from a comparison. -(define_code_iterator any_scc [eq ne gt ge lt le]) - ;; This code iterator is for floating-point comparisons. (define_code_iterator any_scc_sf [eq lt le uneq unlt unle unordered]) (define_code_attr scc_sf [(eq "oeq") (lt "olt") (le "ole") @@ -1131,44 +1122,27 @@ ;; Comparisons. -;; Handle comparisons by stashing away the operands and then using that -;; information in the subsequent conditional branch. +;; Conditional branches. -(define_expand "cmpsi" - [(set (cc0) - (compare:CC (match_operand:SI 0 "register_operand" "") - (match_operand:SI 1 "nonmemory_operand" "")))] +(define_expand "cbranchsi4" + [(match_operator 0 "comparison_operator" + [(match_operand:SI 1 "register_operand") + (match_operand:SI 2 "nonmemory_operand")]) + (match_operand 3 "")] "" { - branch_cmp[0] = operands[0]; - branch_cmp[1] = operands[1]; - branch_type = CMP_SI; + xtensa_expand_conditional_branch (operands, SImode); DONE; }) -(define_expand "cmpsf" - [(set (cc0) - (compare:CC (match_operand:SF 0 "register_operand" "") - (match_operand:SF 1 "register_operand" "")))] +(define_expand "cbranchsf4" + [(match_operator 0 "comparison_operator" + [(match_operand:SF 1 "register_operand") + (match_operand:SF 2 "register_operand")]) + (match_operand 3 "")] "TARGET_HARD_FLOAT" { - branch_cmp[0] = operands[0]; - branch_cmp[1] = operands[1]; - branch_type = CMP_SF; - DONE; -}) - - -;; Conditional branches. - -(define_expand "b<code>" - [(set (pc) - (if_then_else (any_cond (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc)))] - "" -{ - xtensa_expand_conditional_branch (operands, <CODE>); + xtensa_expand_conditional_branch (operands, SFmode); DONE; }) @@ -1353,18 +1327,31 @@ ;; Setting a register from a comparison. -(define_expand "s<code>" - [(set (match_operand:SI 0 "register_operand" "") - (any_scc:SI (match_dup 1) - (match_dup 2)))] +(define_expand "cstoresi4" + [(match_operand:SI 0 "register_operand") + (match_operator 1 "xtensa_cstoresi_operator" + [(match_operand:SI 2 "register_operand") + (match_operand:SI 3 "nonmemory_operand")])] "" { - operands[1] = gen_rtx_<CODE> (SImode, branch_cmp[0], branch_cmp[1]); - if (!xtensa_expand_scc (operands)) + if (!xtensa_expand_scc (operands, SImode)) FAIL; DONE; }) +(define_expand "cstoresf4" + [(match_operand:SI 0 "register_operand") + (match_operator:SI 1 "comparison_operator" + [(match_operand:SF 2 "register_operand") + (match_operand:SF 3 "register_operand")])] + "TARGET_HARD_FLOAT" +{ + if (!xtensa_expand_scc (operands, SFmode)) + FAIL; + DONE; +}) + + ;; Conditional moves. diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 602b152f3c6..1c6d5831759 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,14 @@ +2009-05-14 Ian Lance Taylor <iant@google.com> + + * class.c (layout_class_type): Change itk to unsigned int. + * decl.c (finish_enum): Change itk to unsigned int. + * parser.c (cp_parser_check_decl_spec): Change ds to int. Remove + casts. + +2009-05-13 David Mandelin <dmandelin@mozilla.com>: + + * decl.c (duplicate_decls): Preserve parameter attributes. + 2009-05-10 Jan Hubicka <jh@suse.cz> * decl2.c (cxx_callgraph_analyze_expr): Use diff --git a/gcc/cp/class.c b/gcc/cp/class.c index dc75b3b646e..ad50a4eb47d 100644 --- a/gcc/cp/class.c +++ b/gcc/cp/class.c @@ -4864,7 +4864,7 @@ layout_class_type (tree t, tree *virtuals_p) if (DECL_C_BIT_FIELD (field) && INT_CST_LT (TYPE_SIZE (type), DECL_SIZE (field))) { - int itk; + unsigned int itk; tree integer_type; bool was_unnamed_p = false; /* We must allocate the bits as if suitably aligned for the diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c index 97c9652a25b..ed76dc397e4 100644 --- a/gcc/cp/decl.c +++ b/gcc/cp/decl.c @@ -1913,6 +1913,17 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) { tree parm; + /* Merge parameter attributes. */ + tree oldarg, newarg; + for (oldarg = DECL_ARGUMENTS(olddecl), + newarg = DECL_ARGUMENTS(newdecl); + oldarg && newarg; + oldarg = TREE_CHAIN(oldarg), newarg = TREE_CHAIN(newarg)) { + DECL_ATTRIBUTES (newarg) + = (*targetm.merge_decl_attributes) (oldarg, newarg); + DECL_ATTRIBUTES (oldarg) = DECL_ATTRIBUTES (newarg); + } + if (DECL_TEMPLATE_INSTANTIATION (olddecl) && !DECL_TEMPLATE_INSTANTIATION (newdecl)) { @@ -11022,7 +11033,7 @@ finish_enum (tree enumtype) int lowprec; int highprec; int precision; - int itk; + unsigned int itk; tree underlying_type = NULL_TREE; bool fixed_underlying_type_p = ENUM_UNDERLYING_TYPE (enumtype) != NULL_TREE; diff --git a/gcc/df-core.c b/gcc/df-core.c index a94dc48d95e..c42b20f2ce7 100644 --- a/gcc/df-core.c +++ b/gcc/df-core.c @@ -170,11 +170,6 @@ There are four ways of doing the incremental scanning: d) If the pass modifies all of the insns, as does register allocation, it is simply better to rescan the entire function. - e) If the pass uses either non-standard or ancient techniques to - modify insns, automatic detection of the insns that need to be - rescanned may be impractical. Cse and regrename fall into this - category. - 2) Deferred rescanning - Calls to df_insn_rescan, df_notes_rescan, and df_insn_delete do not immediately change the insn but instead make a note that the insn needs to be rescanned. The next call to @@ -182,27 +177,25 @@ There are four ways of doing the incremental scanning: cause all of the pending rescans to be processed. This is the technique of choice if either 1a, 1b, or 1c are issues - in the pass. In the case of 1a or 1b, a call to df_remove_problem - (df_chain) should be made before the next call to df_analyze or - df_process_deferred_rescans. + in the pass. In the case of 1a or 1b, a call to df_finish_pass + (either manually or via TODO_df_finish) should be made before the + next call to df_analyze or df_process_deferred_rescans. + + This mode is also used by a few passes that still rely on note_uses, + note_stores and for_each_rtx instead of using the DF data. This + can be said to fall under case 1c. To enable this mode, call df_set_flags (DF_DEFER_INSN_RESCAN). (This mode can be cleared by calling df_clear_flags (DF_DEFER_INSN_RESCAN) but this does not cause the deferred insns to be rescanned. - 3) Total rescanning - In this mode the rescanning is disabled. - However, the df information associated with deleted insn is delete - at the time the insn is deleted. At the end of the pass, a call - must be made to df_insn_rescan_all. This method is used by the - register allocator since it generally changes each insn multiple - times (once for each ref) and does not need to make use of the - updated scanning information. - - It is also currently used by two older passes (cse, and regrename) - which change insns in hard to track ways. It is hoped that this - will be fixed soon since this it is expensive to rescan all of the - insns when only a small number of them have really changed. +3) Total rescanning - In this mode the rescanning is disabled. + Only when insns are deleted is the df information associated with + it also deleted. At the end of the pass, a call must be made to + df_insn_rescan_all. This method is used by the register allocator + since it generally changes each insn multiple times (once for each ref) + and does not need to make use of the updated scanning information. 4) Do it yourself - In this mechanism, the pass updates the insns itself using the low level df primitives. Currently no pass does diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 5788e68fac5..920d569664c 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -1982,7 +1982,7 @@ bootstrapped, you can use @code{CFLAGS_FOR_TARGET} to modify their compilation flags, as for non-bootstrapped target libraries. Again, if the native compiler miscompiles the stage1 compiler, you may need to work around this by avoiding non-working parts of the stage1 -compiler. Use @code{STAGE1_LIBCFLAGS} to this end. +compiler. Use @code{STAGE1_TFLAGS} to this end. If you used the flag @option{--enable-languages=@dots{}} to restrict the compilers to be built, only those you've actually enabled will be @@ -2006,6 +2006,26 @@ the one you are building on: for example, you could build a @code{powerpc64-unknown-linux-gnu} host. In this case, pass @option{--enable-bootstrap} to the configure script. +@code{BUILD_CONFIG} can be used to bring in additional customization to +the build. It can be set to a whitespace-separated list of names. For +each such @code{NAME}, top-level @file{config/@code{NAME}.mk} will be +included by the top-level @file{Makefile}, bringing in any settings it +contains. Some examples are: + +@table @asis +@item @samp{bootstrap-O1} +Removes any @option{-O}-started option from @code{BOOT_CFLAGS}, and adds +@option{-O1} to it. @samp{BUILD_CONFIG=bootstrap-O1} is equivalent to +@samp{BOOT_CFLAGS='-g -O1'}. + +@item @samp{bootstrap-O3} +Analogous to @code{bootstrap-O1}. + +@item @samp{bootstrap-debug} +Builds stage2 without debug information, and uses +@file{contrib/compare-debug} to compare object files. + +@end table @section Building a cross compiler diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 763654685bf..da5ea9076c6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -6803,7 +6803,7 @@ programs consisting of a single file, in combination with option programs since the functions and variables become local for the whole combined compilation unit, not for the single source file itself. -This option is not supported for Fortran programs. +This option implies @option{-fwhole-file} for Fortran programs. @item -fcprop-registers @opindex fcprop-registers @@ -12073,7 +12073,7 @@ below, which also classifies the CPUs into families: @multitable @columnfractions 0.20 0.80 @item @strong{Family} @tab @strong{@samp{-mcpu} arguments} -@item @samp{51qe} @tab @samp{51qe} +@item @samp{51} @tab @samp{51} @samp{51ac} @samp{51cn} @samp{51em} @samp{51qe} @item @samp{5206} @tab @samp{5202} @samp{5204} @samp{5206} @item @samp{5206e} @tab @samp{5206e} @item @samp{5208} @tab @samp{5207} @samp{5208} @@ -12082,6 +12082,7 @@ below, which also classifies the CPUs into families: @item @samp{5216} @tab @samp{5214} @samp{5216} @item @samp{52235} @tab @samp{52230} @samp{52231} @samp{52232} @samp{52233} @samp{52234} @samp{52235} @item @samp{5225} @tab @samp{5224} @samp{5225} +@item @samp{52259} @tab @samp{52252} @samp{52254} @samp{52255} @samp{52256} @samp{52258} @samp{52259} @item @samp{5235} @tab @samp{5232} @samp{5233} @samp{5234} @samp{5235} @samp{523x} @item @samp{5249} @tab @samp{5249} @item @samp{5250} @tab @samp{5250} @@ -12089,6 +12090,7 @@ below, which also classifies the CPUs into families: @item @samp{5272} @tab @samp{5272} @item @samp{5275} @tab @samp{5274} @samp{5275} @item @samp{5282} @tab @samp{5280} @samp{5281} @samp{5282} @samp{528x} +@item @samp{53017} @tab @samp{53011} @samp{53012} @samp{53013} @samp{53014} @samp{53015} @samp{53016} @samp{53017} @item @samp{5307} @tab @samp{5307} @item @samp{5329} @tab @samp{5327} @samp{5328} @samp{5329} @samp{532x} @item @samp{5373} @tab @samp{5372} @samp{5373} @samp{537x} diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index b966c27a880..f91d6e12480 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -4236,30 +4236,6 @@ the operand to that mode before generating the instruction. @item @samp{one_cmpl@var{m}2} Store the bitwise-complement of operand 1 into operand 0. -@cindex @code{cmp@var{m}} instruction pattern -@item @samp{cmp@var{m}} -Compare operand 0 and operand 1, and set the condition codes. -The RTL pattern should look like this: - -@smallexample -(set (cc0) (compare (match_operand:@var{m} 0 @dots{}) - (match_operand:@var{m} 1 @dots{}))) -@end smallexample - -@cindex @code{tst@var{m}} instruction pattern -@item @samp{tst@var{m}} -Compare operand 0 against zero, and set the condition codes. -The RTL pattern should look like this: - -@smallexample -(set (cc0) (match_operand:@var{m} 0 @dots{})) -@end smallexample - -@samp{tst@var{m}} patterns should not be defined for machines that do -not use @code{(cc0)}. Doing so would confuse the optimizer since it -would no longer be clear which @code{set} operations were comparisons. -The @samp{cmp@var{m}} patterns should be used instead. - @cindex @code{movmem@var{m}} instruction pattern @item @samp{movmem@var{m}} Block move instruction. The destination and source blocks of memory @@ -4522,16 +4498,14 @@ move operand 2 or (operands 2 + operand 3) into operand 0 according to the comparison in operand 1. If the comparison is true, operand 2 is moved into operand 0, otherwise (operand 2 + operand 3) is moved. -@cindex @code{s@var{cond}} instruction pattern -@item @samp{s@var{cond}} -Store zero or nonzero in the operand according to the condition codes. -Value stored is nonzero iff the condition @var{cond} is true. -@var{cond} is the name of a comparison operation expression code, such -as @code{eq}, @code{lt} or @code{leu}. - -You specify the mode that the operand must have when you write the -@code{match_operand} expression. The compiler automatically sees -which mode you have used and supplies an operand of that mode. +@cindex @code{cstore@var{mode}4} instruction pattern +@item @samp{cstore@var{mode}4} +Store zero or nonzero in operand 0 according to whether a comparison +is true. Operand 1 is a comparison operator. Operand 2 and operand 3 +are the first and second operand of the comparison, respectively. +You specify the mode that operand 0 must have when you write the +@code{match_operand} expression. The compiler automatically sees which +mode you have used and supplies an operand of that mode. The value stored for a true condition must have 1 as its low bit, or else must be negative. Otherwise the instruction is not suitable and @@ -4548,33 +4522,11 @@ integer comparisons, it is best to omit these patterns. If these operations are omitted, the compiler will usually generate code that copies the constant one to the target and branches around an assignment of zero to the target. If this code is more efficient than -the potential instructions used for the @samp{s@var{cond}} pattern +the potential instructions used for the @samp{cstore@var{mode}4} pattern followed by those required to convert the result into a 1 or a zero in -@code{SImode}, you should omit the @samp{s@var{cond}} operations from +@code{SImode}, you should omit the @samp{cstore@var{mode}4} operations from the machine description. -@cindex @code{b@var{cond}} instruction pattern -@item @samp{b@var{cond}} -Conditional branch instruction. Operand 0 is a @code{label_ref} that -refers to the label to jump to. Jump if the condition codes meet -condition @var{cond}. - -Some machines do not follow the model assumed here where a comparison -instruction is followed by a conditional branch instruction. In that -case, the @samp{cmp@var{m}} (and @samp{tst@var{m}}) patterns should -simply store the operands away and generate all the required insns in a -@code{define_expand} (@pxref{Expander Definitions}) for the conditional -branch operations. All calls to expand @samp{b@var{cond}} patterns are -immediately preceded by calls to expand either a @samp{cmp@var{m}} -pattern or a @samp{tst@var{m}} pattern. - -Machines that use a pseudo register for the condition code value, or -where the mode used for the comparison depends on the condition being -tested, should also use the above mechanism. @xref{Jump Patterns}. - -The above discussion also applies to the @samp{mov@var{mode}cc} and -@samp{s@var{cond}} patterns. - @cindex @code{cbranch@var{mode}4} instruction pattern @item @samp{cbranch@var{mode}4} Conditional branch instruction combined with a compare instruction. @@ -5025,18 +4977,20 @@ This pattern, if defined, signals an error, typically by causing some kind of signal to be raised. Among other places, it is used by the Java front end to signal `invalid array index' exceptions. -@cindex @code{conditional_trap} instruction pattern -@item @samp{conditional_trap} +@cindex @code{ctrap@var{MM}4} instruction pattern +@item @samp{ctrap@var{MM}4} Conditional trap instruction. Operand 0 is a piece of RTL which -performs a comparison. Operand 1 is the trap code, an integer. +performs a comparison, and operands 1 and 2 are the arms of the +comparison. Operand 3 is the trap code, an integer. -A typical @code{conditional_trap} pattern looks like +A typical @code{ctrap} pattern looks like @smallexample -(define_insn "conditional_trap" +(define_insn "ctrapsi4" [(trap_if (match_operator 0 "trap_operator" - [(cc0) (const_int 0)]) - (match_operand 1 "const_int_operand" "i"))] + [(match_operand 1 "register_operand") + (match_operand 2 "immediate_operand")]) + (match_operand 3 "const_int_operand" "i"))] "" "@dots{}") @end smallexample @@ -5092,14 +5046,16 @@ operation and all memory operations after the atomic operation occur after the atomic operation. For targets where the success or failure of the compare-and-swap -operation is available via the status flags, it is possible -to avoid a separate compare operation and issue the subsequent -setcc or branch immediately after the compare-and-swap. To this -end, GCC will look for a @code{MODE_CC} set in the output of -@code{sync_compare_and_swap@var{mode}}; if the machine description -includes such a set, the target should also define a special @code{cmpcc} -instruction. GCC will then be able to take the destination of the -@code{MODE_CC} set and use it as the first operand of @code{cmpcc}. +operation is available via the status flags, it is possible to +avoid a separate compare operation and issue the subsequent +branch or store-flag operation immediately after the compare-and-swap. +To this end, GCC will look for a @code{MODE_CC} set in the +output of @code{sync_compare_and_swap@var{mode}}; if the machine +description includes such a set, the target should also define special +@code{cbranchcc4} and/or @code{cstorecc4} instructions. GCC will then +be able to take the destination of the @code{MODE_CC} set and pass it +to the @code{cbranchcc4} or @code{cstorecc4} pattern as the first +operand of the comparison (the second will be @code{(const_int 0)}). @cindex @code{sync_add@var{mode}} instruction pattern @cindex @code{sync_sub@var{mode}} instruction pattern @@ -5275,48 +5231,6 @@ constant value. @cindex Dependent Patterns @cindex Interdependence of Patterns -Every machine description must have a named pattern for each of the -conditional branch names @samp{b@var{cond}}. The recognition template -must always have the form - -@smallexample -(set (pc) - (if_then_else (@var{cond} (cc0) (const_int 0)) - (label_ref (match_operand 0 "" "")) - (pc))) -@end smallexample - -@noindent -In addition, every machine description must have an anonymous pattern -for each of the possible reverse-conditional branches. Their templates -look like - -@smallexample -(set (pc) - (if_then_else (@var{cond} (cc0) (const_int 0)) - (pc) - (label_ref (match_operand 0 "" "")))) -@end smallexample - -@noindent -They are necessary because jump optimization can turn direct-conditional -branches into reverse-conditional branches. - -It is often convenient to use the @code{match_operator} construct to -reduce the number of patterns that must be specified for branches. For -example, - -@smallexample -(define_insn "" - [(set (pc) - (if_then_else (match_operator 0 "comparison_operator" - [(cc0) (const_int 0)]) - (pc) - (label_ref (match_operand 1 "" ""))))] - "@var{condition}" - "@dots{}") -@end smallexample - In some cases machines support instructions identical except for the machine mode of one or more operands. For example, there may be ``sign-extend halfword'' and ``sign-extend byte'' instructions whose @@ -5357,113 +5271,38 @@ generating the appropriate machine instruction. @cindex jump instruction patterns @cindex defining jump instruction patterns -For most machines, GCC assumes that the machine has a condition code. -A comparison insn sets the condition code, recording the results of both -signed and unsigned comparison of the given operands. A separate branch -insn tests the condition code and branches or not according its value. -The branch insns come in distinct signed and unsigned flavors. Many -common machines, such as the VAX, the 68000 and the 32000, work this -way. - -Some machines have distinct signed and unsigned compare instructions, and -only one set of conditional branch instructions. The easiest way to handle -these machines is to treat them just like the others until the final stage -where assembly code is written. At this time, when outputting code for the -compare instruction, peek ahead at the following branch using -@code{next_cc0_user (insn)}. (The variable @code{insn} refers to the insn -being output, in the output-writing code in an instruction pattern.) If -the RTL says that is an unsigned branch, output an unsigned compare; -otherwise output a signed compare. When the branch itself is output, you -can treat signed and unsigned branches identically. - -The reason you can do this is that GCC always generates a pair of -consecutive RTL insns, possibly separated by @code{note} insns, one to -set the condition code and one to test it, and keeps the pair inviolate -until the end. - -To go with this technique, you must define the machine-description macro -@code{NOTICE_UPDATE_CC} to do @code{CC_STATUS_INIT}; in other words, no -compare instruction is superfluous. - -Some machines have compare-and-branch instructions and no condition code. -A similar technique works for them. When it is time to ``output'' a -compare instruction, record its operands in two static variables. When -outputting the branch-on-condition-code instruction that follows, actually -output a compare-and-branch instruction that uses the remembered operands. - -It also works to define patterns for compare-and-branch instructions. -In optimizing compilation, the pair of compare and branch instructions -will be combined according to these patterns. But this does not happen -if optimization is not requested. So you must use one of the solutions -above in addition to any special patterns you define. - -In many RISC machines, most instructions do not affect the condition -code and there may not even be a separate condition code register. On -these machines, the restriction that the definition and use of the -condition code be adjacent insns is not necessary and can prevent -important optimizations. For example, on the IBM RS/6000, there is a -delay for taken branches unless the condition code register is set three -instructions earlier than the conditional branch. The instruction -scheduler cannot perform this optimization if it is not permitted to -separate the definition and use of the condition code register. - -On these machines, do not use @code{(cc0)}, but instead use a register -to represent the condition code. If there is a specific condition code -register in the machine, use a hard register. If the condition code or -comparison result can be placed in any general register, or if there are -multiple condition registers, use a pseudo register. - -@findex prev_cc0_setter -@findex next_cc0_user -On some machines, the type of branch instruction generated may depend on -the way the condition code was produced; for example, on the 68k and -SPARC, setting the condition code directly from an add or subtract -instruction does not clear the overflow bit the way that a test -instruction does, so a different branch instruction must be used for -some conditional branches. For machines that use @code{(cc0)}, the set -and use of the condition code must be adjacent (separated only by -@code{note} insns) allowing flags in @code{cc_status} to be used. -(@xref{Condition Code}.) Also, the comparison and branch insns can be -located from each other by using the functions @code{prev_cc0_setter} -and @code{next_cc0_user}. - -However, this is not true on machines that do not use @code{(cc0)}. On -those machines, no assumptions can be made about the adjacency of the -compare and branch insns and the above methods cannot be used. Instead, -we use the machine mode of the condition code register to record -different formats of the condition code register. - -Registers used to store the condition code value should have a mode that -is in class @code{MODE_CC}. Normally, it will be @code{CCmode}. If -additional modes are required (as for the add example mentioned above in -the SPARC), define them in @file{@var{machine}-modes.def} -(@pxref{Condition Code}). Also define @code{SELECT_CC_MODE} to choose -a mode given an operand of a compare. - -If it is known during RTL generation that a different mode will be -required (for example, if the machine has separate compare instructions -for signed and unsigned quantities, like most IBM processors), they can -be specified at that time. - -If the cases that require different modes would be made by instruction -combination, the macro @code{SELECT_CC_MODE} determines which machine -mode should be used for the comparison result. The patterns should be -written using that mode. To support the case of the add on the SPARC -discussed above, we have the pattern - -@smallexample -(define_insn "" - [(set (reg:CC_NOOV 0) - (compare:CC_NOOV - (plus:SI (match_operand:SI 0 "register_operand" "%r") - (match_operand:SI 1 "arith_operand" "rI")) - (const_int 0)))] - "" - "@dots{}") -@end smallexample - -The @code{SELECT_CC_MODE} macro on the SPARC returns @code{CC_NOOVmode} -for comparisons whose argument is a @code{plus}. +GCC does not assume anything about how the machine realizes jumps. +The machine description should define a single pattern, usually +a @code{define_expand}, which expands to all the required insns. + +Usually, this would be a comparison insn to set the condition code +and a separate branch insn testing the condition code and branching +or not according to its value. For many machines, however, +separating compares and branches is limiting, which is why the +more flexible approach with one @code{define_expand} is used in GCC. +The machine description becomes clearer for architectures that +have compare-and-branch instructions but no condition code. It also +works better when different sets of comparison operators are supported +by different kinds of conditional branches (e.g. integer vs. floating-point), +or by conditional branches with respect to conditional stores. + +Two separate insns are always used if the machine description represents +a condition code register using the legacy RTL expression @code{(cc0)}, +and on most machines that use a separate condition code register +(@pxref{Condition Code}). For machines that use @code{(cc0)}, in +fact, the set and use of the condition code must be separate and +adjacent@footnote{@code{note} insns can separate them, though.}, thus +allowing flags in @code{cc_status} to be used (@pxref{Condition Code}) and +so that the comparison and branch insns could be located from each other +by using the functions @code{prev_cc0_setter} and @code{next_cc0_user}. + +Even in this case having a single entry point for conditional branches +is advantageous, because it handles equally well the case where a single +comparison instruction records the results of both signed and unsigned +comparison of the given operands (with the branch insns coming in distinct +signed and unsigned flavors) as in the x86 or SPARC, and the case where +there are distinct signed and unsigned compare instructions and only +one set of conditional branch instructions as in the PowerPC. @end ifset @ifset INTERNALS @@ -5625,13 +5464,9 @@ the operations as far as possible. For instance, @cindex @code{compare}, canonicalization of @item For the @code{compare} operator, a constant is always the second operand -on machines where @code{cc0} is used (@pxref{Jump Patterns}). On other -machines, there are rare cases where the compiler might want to construct -a @code{compare} with a constant as the first operand. However, these -cases are not common enough for it to be worthwhile to provide a pattern -matching a constant as the first operand unless the machine actually has -such an instruction. +if the first argument is a condition code register or @code{(cc0)}. +@item An operand of @code{neg}, @code{not}, @code{mult}, @code{plus}, or @code{minus} is made the first operand under the same conditions as above. @@ -5699,11 +5534,6 @@ the form (plus:@var{m} (plus:@var{m} @var{x} @var{y}) @var{constant}) @end smallexample -@item -On machines that do not use @code{cc0}, -@code{(compare @var{x} (const_int 0))} will be converted to -@var{x}. - @cindex @code{zero_extract}, canonicalization of @cindex @code{sign_extract}, canonicalization of @item diff --git a/gcc/doc/plugins.texi b/gcc/doc/plugins.texi index 7c3fbed354e..1710395b50d 100644 --- a/gcc/doc/plugins.texi +++ b/gcc/doc/plugins.texi @@ -71,6 +71,7 @@ enum plugin_event PLUGIN_FINISH_UNIT, /* Useful for summary processing. */ PLUGIN_CXX_CP_PRE_GENERICIZE, /* Allows to see low level AST in C++ FE. */ PLUGIN_FINISH, /* Called before GCC exits. */ + PLUGIN_ATTRIBUTES, /* Called during attribute registration */ PLUGIN_EVENT_LAST /* Dummy event used for indexing callback array. */ @}; @@ -135,3 +136,35 @@ plugin_init (const char *plugin_name, int argc, struct plugin_argument *argv) ... @} @end smallexample +@section Registering custom attributes + +For analysis purposes it is useful to be able to add custom attributes. + +The @code{PLUGIN_ATTRIBUTES} callback is called during attribute +registration. Use the @code{register_attribute} function to register +custom attributes. + +@smallexample +/* Attribute handler callback */ +static tree +handle_user_attribute (tree *node, tree name, tree args, + int flags, bool *no_add_attrs) +@{ + return NULL_TREE; +@} + +/* Attribute definition */ +static struct attribute_spec user_attr = + @{ "user", 1, 1, false, false, false, handle_user_attribute @}; + +/* Plugin callback called during attribute registration. +Registered with register_callback (plugin_name, PLUGIN_ATTRIBUTES, register_attributes, NULL) +*/ +static void +register_attributes (void *event_data, void *data) +@{ + warning (0, G_("Callback to register attributes")); + register_attribute (&user_attr); +@} + +@end smallexample diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 4c9b16279b5..7f8a5d6b4c6 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -2504,8 +2504,8 @@ added to another register (as well as added to a displacement). @defmac REGNO_OK_FOR_BASE_P (@var{num}) A C expression which is nonzero if register number @var{num} is suitable for use as a base register in operand addresses. -Like @code{GO_IF_LEGITIMATE_ADDRESS}, this macro should also -exist in strict or non-strict variants. Both variants behave +Like @code{TARGET_LEGITIMATE_ADDRESS_P}, this macro should also +define a strict and a non-strict variant. Both variants behave the same for hard register; for pseudos, the strict variant will pass only those that have been allocated to a valid hard registers, while the non-strict variant will pass all pseudos. @@ -5361,42 +5361,31 @@ expressions and @code{const} arithmetic expressions, in addition to @defmac MAX_REGS_PER_ADDRESS A number, the maximum number of registers that can appear in a valid memory address. Note that it is up to you to specify a value equal to -the maximum number that @code{GO_IF_LEGITIMATE_ADDRESS} would ever +the maximum number that @code{TARGET_LEGITIMATE_ADDRESS_P} would ever accept. @end defmac -@defmac GO_IF_LEGITIMATE_ADDRESS (@var{mode}, @var{x}, @var{label}) -A C compound statement with a conditional @code{goto @var{label};} -executed if @var{x} (an RTX) is a legitimate memory address on the -target machine for a memory operand of mode @var{mode}. +@deftypefn {Target Hook} TARGET_LEGITIMATE_ADDRESS_P (enum machine_mode @var{mode}, rtx @var{x}, bool @var{strict}) +A function that returns whether @var{x} (an RTX) is a legitimate memory +address on the target machine for a memory operand of mode @var{mode}. -It usually pays to define several simpler macros to serve as -subroutines for this one. Otherwise it may be too complicated to -understand. +Legitimate addresses are defined in two variants: a strict variant and a +non-strict one. The @code{strict} parameter chooses which variant is +desired by the caller. -This macro must exist in two variants: a strict variant and a -non-strict one. The strict variant is used in the reload pass. It -must be defined so that any pseudo-register that has not been -allocated a hard register is considered a memory reference. In -contexts where some kind of register is required, a pseudo-register -with no hard register must be rejected. +The strict variant is used in the reload pass. It must be defined so +that any pseudo-register that has not been allocated a hard register is +considered a memory reference. This is because in contexts where some +kind of register is required, a pseudo-register with no hard register +must be rejected. For non-hard registers, the strict variant should look +up the @code{reg_renumber} array; it should then proceed using the hard +register number in the array, or treat the pseudo as a memory reference +if the array holds @code{-1}. The non-strict variant is used in other passes. It must be defined to accept all pseudo-registers in every context where some kind of register is required. -@findex REG_OK_STRICT -Compiler source files that want to use the strict variant of this -macro define the macro @code{REG_OK_STRICT}. You should use an -@code{#ifdef REG_OK_STRICT} conditional to define the strict variant -in that case and the non-strict variant otherwise. - -Subroutines to check for acceptable registers for various purposes (one -for base registers, one for index registers, and so on) are typically -among the subroutines used to define @code{GO_IF_LEGITIMATE_ADDRESS}. -Then only these subroutine macros need have two variants; the higher -levels of macros may be the same whether strict or not. - Normally, constant addresses which are the sum of a @code{symbol_ref} and an integer are stored inside a @code{const} RTX to mark them as constant. Therefore, there is no need to recognize such sums @@ -5417,13 +5406,30 @@ into the @code{symbol_ref}, and then check for it here. When you see a @code{const}, you will have to look inside it to find the @code{symbol_ref} in order to determine the section. @xref{Assembler Format}. -@end defmac + +@cindex @code{GO_IF_LEGITIMATE_ADDRESS} +Some ports are still using a deprecated legacy substitute for +this hook, the @code{GO_IF_LEGITIMATE_ADDRESS} macro. This macro +has this syntax: + +@example +#define GO_IF_LEGITIMATE_ADDRESS (@var{mode}, @var{x}, @var{label}) +@end example + +@noindent +and should @code{goto @var{label}} if the address @var{x} is a valid +address on the target machine for a memory operand of mode @var{mode}. +Whether the strict or non-strict variants are desired is defined by +the @code{REG_OK_STRICT} macro introduced earlier in this section. +Using the hook is usually simpler because it limits the number of +files that are recompiled when changes are made. +@end deftypefn @defmac TARGET_MEM_CONSTRAINT A single character to be used instead of the default @code{'m'} character for general memory addresses. This defines the constraint letter which matches the memory addresses accepted by -@code{GO_IF_LEGITIMATE_ADDRESS_P}. Define this macro if you want to +@code{TARGET_LEGITIMATE_ADDRESS_P}. Define this macro if you want to support new address formats in your back end without changing the semantics of the @code{'m'} constraint. This is necessary in order to preserve functionality of inline assembly constructs using the @@ -5724,8 +5730,47 @@ or target-specific sections. @section Condition Code Status @cindex condition code status -@c prevent bad page break with this line -This describes the condition code status. +The macros in this section can be split in two families, according to the +two ways of representing condition codes in GCC. + +The first representation is the so called @code{(cc0)} representation +(@pxref{Jump Patterns}), where all instructions can have an implicit +clobber of the condition codes. The second is the condition code +register representation, which provides better schedulability for +architectures that do have a condition code register, but on which +most instructions do not affect it. The latter category includes +most RISC machines. + +The implicit clobbering poses a strong restriction on the placement of +the definition and use of the condition code, which need to be in adjacent +insns for machines using @code{(cc0)}. This can prevent important +optimizations on some machines. For example, on the IBM RS/6000, there +is a delay for taken branches unless the condition code register is set +three instructions earlier than the conditional branch. The instruction +scheduler cannot perform this optimization if it is not permitted to +separate the definition and use of the condition code register. + +For this reason, it is possible and suggested to use a register to +represent the condition code for new ports. If there is a specific +condition code register in the machine, use a hard register. If the +condition code or comparison result can be placed in any general register, +or if there are multiple condition registers, use a pseudo register. +Registers used to store the condition code value will usually have a mode +that is in class @code{MODE_CC}. + +Alternatively, you can use @code{BImode} if the comparison operator is +specified already in the compare instruction. In this case, you are not +interested in most macros in this section. + +@menu +* CC0 Condition Codes:: Old style representation of condition codes. +* MODE_CC Condition Codes:: Modern representation of condition codes. +* Cond. Exec. Macros:: Macros to control conditional execution. +@end menu + +@node CC0 Condition Codes +@subsection Representation of condition codes using @code{(cc0)} +@findex cc0 @findex cc_status The file @file{conditions.h} defines a variable @code{cc_status} to @@ -5791,12 +5836,45 @@ that looks at an attribute (@pxref{Insn Attributes}) named, for example, two places, the @file{md} file and in @code{NOTICE_UPDATE_CC}. @end defmac +@node MODE_CC Condition Codes +@subsection Representation of condition codes using registers +@findex CCmode +@findex MODE_CC + @defmac SELECT_CC_MODE (@var{op}, @var{x}, @var{y}) -Returns a mode from class @code{MODE_CC} to be used when comparison -operation code @var{op} is applied to rtx @var{x} and @var{y}. For -example, on the SPARC, @code{SELECT_CC_MODE} is defined as (see -@pxref{Jump Patterns} for a description of the reason for this -definition) +On many machines, the condition code may be produced by other instructions +than compares, for example the branch can use directly the condition +code set by a subtract instruction. However, on some machines +when the condition code is set this way some bits (such as the overflow +bit) are not set in the same way as a test instruction, so that a different +branch instruction must be used for some conditional branches. When +this happens, use the machine mode of the condition code register to +record different formats of the condition code register. Modes can +also be used to record which compare instruction (e.g. a signed or an +unsigned comparison) produced the condition codes. + +If other modes than @code{CCmode} are required, add them to +@file{@var{machine}-modes.def} and define @code{SELECT_CC_MODE} to choose +a mode given an operand of a compare. This is needed because the modes +have to be chosen not only during RTL generation but also, for example, +by instruction combination. The result of @code{SELECT_CC_MODE} should +be consistent with the mode used in the patterns; for example to support +the case of the add on the SPARC discussed above, we have the pattern + +@smallexample +(define_insn "" + [(set (reg:CC_NOOV 0) + (compare:CC_NOOV + (plus:SI (match_operand:SI 0 "register_operand" "%r") + (match_operand:SI 1 "arith_operand" "rI")) + (const_int 0)))] + "" + "@dots{}") +@end smallexample + +@noindent +together with a @code{SELECT_CC_MODE} that returns @code{CC_NOOVmode} +for comparisons whose argument is a @code{plus}: @smallexample #define SELECT_CC_MODE(OP,X,Y) \ @@ -5807,6 +5885,10 @@ definition) ? CC_NOOVmode : CCmode)) @end smallexample +Another reason to use modes is to retain information on which operands +were used by the comparison; see @code{REVERSIBLE_CC_MODE} later in +this section. + You should define this macro if and only if you define extra CC modes in @file{@var{machine}-modes.def}. @end defmac @@ -5863,20 +5945,6 @@ like: @end smallexample @end defmac -@defmac REVERSE_CONDEXEC_PREDICATES_P (@var{op1}, @var{op2}) -A C expression that returns true if the conditional execution predicate -@var{op1}, a comparison operation, is the inverse of @var{op2} and vice -versa. Define this to return 0 if the target has conditional execution -predicates that cannot be reversed safely. There is no need to validate -that the arguments of op1 and op2 are the same, this is done separately. -If no expansion is specified, this macro is defined as follows: - -@smallexample -#define REVERSE_CONDEXEC_PREDICATES_P (x, y) \ - (GET_CODE ((x)) == reversed_comparison_code ((y), NULL)) -@end smallexample -@end defmac - @deftypefn {Target Hook} bool TARGET_FIXED_CONDITION_CODE_REGS (unsigned int *, unsigned int *) On targets which do not use @code{(cc0)}, and which use a hard register rather than a pseudo-register to hold condition codes, the @@ -5905,6 +5973,29 @@ same. If they are, it returns that mode. If they are different, it returns @code{VOIDmode}. @end deftypefn +@node Cond. Exec. Macros +@subsection Macros to control conditional execution +@findex conditional execution +@findex predication + +There is one macro that may need to be defined for targets +supporting conditional execution, independent of how they +represent conditional branches. + +@defmac REVERSE_CONDEXEC_PREDICATES_P (@var{op1}, @var{op2}) +A C expression that returns true if the conditional execution predicate +@var{op1}, a comparison operation, is the inverse of @var{op2} and vice +versa. Define this to return 0 if the target has conditional execution +predicates that cannot be reversed safely. There is no need to validate +that the arguments of op1 and op2 are the same, this is done separately. +If no expansion is specified, this macro is defined as follows: + +@smallexample +#define REVERSE_CONDEXEC_PREDICATES_P (x, y) \ + (GET_CODE ((x)) == reversed_comparison_code ((y), NULL)) +@end smallexample +@end defmac + @node Costs @section Describing Relative Costs of Operations @cindex costs of instructions @@ -6872,13 +6963,14 @@ The default value is false. This section describes macros that help implement generation of position independent code. Simply defining these macros is not enough to -generate valid PIC; you must also add support to the macros -@code{GO_IF_LEGITIMATE_ADDRESS} and @code{PRINT_OPERAND_ADDRESS}, as -well as @code{LEGITIMIZE_ADDRESS}. You must modify the definition of -@samp{movsi} to do something appropriate when the source operand -contains a symbolic address. You may also need to alter the handling of -switch statements so that they use relative addresses. -@c i rearranged the order of the macros above to try to force one of +generate valid PIC; you must also add support to the hook +@code{TARGET_LEGITIMATE_ADDRESS_P} and to the macro +@code{PRINT_OPERAND_ADDRESS}, as well as @code{LEGITIMIZE_ADDRESS}. You +must modify the definition of @samp{movsi} to do something appropriate +when the source operand contains a symbolic address. You may also +need to alter the handling of switch statements so that they use +relative addresses. +@c i rearranged the order of the macros above to try to force one of @c them to the next line, to eliminate an overfull hbox. --mew 10feb93 @defmac PIC_OFFSET_TABLE_REGNUM diff --git a/gcc/dojump.c b/gcc/dojump.c index 36430851393..76f62c62eba 100644 --- a/gcc/dojump.c +++ b/gcc/dojump.c @@ -756,64 +756,6 @@ do_jump_by_parts_equality (tree exp, rtx if_false_label, rtx if_true_label) if_true_label); } -/* Generate code for a comparison of OP0 and OP1 with rtx code CODE. - MODE is the machine mode of the comparison, not of the result. - (including code to compute the values to be compared) and set CC0 - according to the result. The decision as to signed or unsigned - comparison must be made by the caller. - - We force a stack adjustment unless there are currently - things pushed on the stack that aren't yet used. - - If MODE is BLKmode, SIZE is an RTX giving the size of the objects being - compared. */ - -rtx -compare_from_rtx (rtx op0, rtx op1, enum rtx_code code, int unsignedp, - enum machine_mode mode, rtx size) -{ - rtx tem; - - /* If one operand is constant, make it the second one. Only do this - if the other operand is not constant as well. */ - - if (swap_commutative_operands_p (op0, op1)) - { - tem = op0; - op0 = op1; - op1 = tem; - code = swap_condition (code); - } - - do_pending_stack_adjust (); - - code = unsignedp ? unsigned_condition (code) : code; - tem = simplify_relational_operation (code, VOIDmode, mode, op0, op1); - if (tem) - { - if (CONSTANT_P (tem)) - return tem; - - if (COMPARISON_P (tem)) - { - code = GET_CODE (tem); - op0 = XEXP (tem, 0); - op1 = XEXP (tem, 1); - mode = GET_MODE (op0); - unsignedp = (code == GTU || code == LTU - || code == GEU || code == LEU); - } - } - - emit_cmp_insn (op0, op1, code, size, mode, unsignedp); - -#if HAVE_cc0 - return gen_rtx_fmt_ee (code, VOIDmode, cc0_rtx, const0_rtx); -#else - return gen_rtx_fmt_ee (code, VOIDmode, op0, op1); -#endif -} - /* Like do_compare_and_jump but expects the values to compare as two rtx's. The decision as to signed or unsigned comparison must be made by the caller. diff --git a/gcc/dse.c b/gcc/dse.c index fbc523658f9..ca227ea15dd 100644 --- a/gcc/dse.c +++ b/gcc/dse.c @@ -2245,6 +2245,7 @@ check_mem_read_rtx (rtx *loc, void *data) if (store_info->rhs && store_info->group_id == -1 && store_info->cse_base == base + && width != -1 && offset >= store_info->begin && offset + width <= store_info->end && all_positions_needed_p (store_info, diff --git a/gcc/expmed.c b/gcc/expmed.c index d0c1621cc5e..16f7415b549 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -5207,8 +5207,9 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, enum insn_code icode; enum machine_mode compare_mode; enum machine_mode target_mode = GET_MODE (target); + enum mode_class mclass; rtx tem; - rtx last = get_last_insn (); + rtx last; rtx pattern, comparison; if (unsignedp) @@ -5342,117 +5343,41 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, return op0; } - icode = setcc_gen_code[(int) code]; - - if (icode != CODE_FOR_nothing) - { - insn_operand_predicate_fn pred; - - /* We think we may be able to do this with a scc insn. Emit the - comparison and then the scc insn. */ - - do_pending_stack_adjust (); - last = get_last_insn (); - - comparison - = compare_from_rtx (op0, op1, code, unsignedp, mode, NULL_RTX); - if (CONSTANT_P (comparison)) - { - switch (GET_CODE (comparison)) - { - case CONST_INT: - if (comparison == const0_rtx) - return const0_rtx; - break; - -#ifdef FLOAT_STORE_FLAG_VALUE - case CONST_DOUBLE: - if (comparison == CONST0_RTX (GET_MODE (comparison))) - return const0_rtx; - break; -#endif - default: - gcc_unreachable (); - } - - if (normalizep == 1) - return const1_rtx; - if (normalizep == -1) - return constm1_rtx; - return const_true_rtx; - } - - /* The code of COMPARISON may not match CODE if compare_from_rtx - decided to swap its operands and reverse the original code. - - We know that compare_from_rtx returns either a CONST_INT or - a new comparison code, so it is safe to just extract the - code from COMPARISON. */ - code = GET_CODE (comparison); - - /* Get a reference to the target in the proper mode for this insn. */ - compare_mode = insn_data[(int) icode].operand[0].mode; - subtarget = target; - pred = insn_data[(int) icode].operand[0].predicate; - if (optimize || ! (*pred) (subtarget, compare_mode)) - subtarget = gen_reg_rtx (compare_mode); - - pattern = GEN_FCN (icode) (subtarget); - if (pattern) - { - emit_insn (pattern); - return emit_store_flag_1 (target, subtarget, compare_mode, - normalizep); - } - } - else + mclass = GET_MODE_CLASS (mode); + for (compare_mode = mode; compare_mode != VOIDmode; + compare_mode = GET_MODE_WIDER_MODE (compare_mode)) { - /* We don't have an scc insn, so try a cstore insn. */ - - for (compare_mode = mode; compare_mode != VOIDmode; - compare_mode = GET_MODE_WIDER_MODE (compare_mode)) - { - icode = optab_handler (cstore_optab, compare_mode)->insn_code; - if (icode != CODE_FOR_nothing) - break; - } - - if (icode != CODE_FOR_nothing) + enum machine_mode optab_mode = mclass == MODE_CC ? CCmode : compare_mode; + icode = optab_handler (cstore_optab, optab_mode)->insn_code; + if (icode != CODE_FOR_nothing) { + rtx x, y; enum machine_mode result_mode = insn_data[(int) icode].operand[0].mode; - rtx cstore_op0 = op0; - rtx cstore_op1 = op1; do_pending_stack_adjust (); last = get_last_insn (); - if (compare_mode != mode) + x = prepare_operand (icode, op0, 2, mode, compare_mode, unsignedp); + y = prepare_operand (icode, op1, 3, mode, compare_mode, unsignedp); + comparison = gen_rtx_fmt_ee (code, result_mode, x, y); + if (!x || !y + || !insn_data[icode].operand[2].predicate + (x, insn_data[icode].operand[2].mode) + || !insn_data[icode].operand[3].predicate + (y, insn_data[icode].operand[3].mode) + || !insn_data[icode].operand[1].predicate (comparison, VOIDmode)) { - cstore_op0 = convert_modes (compare_mode, mode, cstore_op0, - unsignedp); - cstore_op1 = convert_modes (compare_mode, mode, cstore_op1, - unsignedp); + delete_insns_since (last); + continue; } - - if (!insn_data[(int) icode].operand[2].predicate (cstore_op0, - compare_mode)) - cstore_op0 = copy_to_mode_reg (compare_mode, cstore_op0); - if (!insn_data[(int) icode].operand[3].predicate (cstore_op1, - compare_mode)) - cstore_op1 = copy_to_mode_reg (compare_mode, cstore_op1); - - comparison = gen_rtx_fmt_ee (code, result_mode, cstore_op0, - cstore_op1); subtarget = target; - if (optimize || !(insn_data[(int) icode].operand[0].predicate (subtarget, result_mode))) subtarget = gen_reg_rtx (result_mode); - pattern = GEN_FCN (icode) (subtarget, comparison, cstore_op0, - cstore_op1); + pattern = GEN_FCN (icode) (subtarget, comparison, x, y); if (pattern) { @@ -5460,10 +5385,13 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, return emit_store_flag_1 (target, subtarget, result_mode, normalizep); } + + delete_insns_since (last); + break; } } - delete_insns_since (last); + last = get_last_insn (); /* If optimizing, use different pseudo registers for each insn, instead of reusing the same pseudo. This leads to better CSE, but slows diff --git a/gcc/expr.h b/gcc/expr.h index e3c38370bf2..64794834771 100644 --- a/gcc/expr.h +++ b/gcc/expr.h @@ -298,6 +298,9 @@ extern rtx expand_simple_unop (enum machine_mode, enum rtx_code, rtx, rtx, perform the operation described by CODE and MODE. */ extern int have_insn_for (enum rtx_code, enum machine_mode); +extern rtx prepare_operand (int, rtx, int, enum machine_mode, enum machine_mode, + int); + /* Emit code to make a call to a constant function or a library call. */ extern void emit_libcall_block (rtx, rtx, rtx, rtx); @@ -573,9 +576,6 @@ extern void jumpif (tree, rtx); the result is zero, or IF_TRUE_LABEL if the result is one. */ extern void do_jump (tree, rtx, rtx); -/* Generate rtl to compare two rtx's, will call emit_cmp_insn. */ -extern rtx compare_from_rtx (rtx, rtx, enum rtx_code, int, enum machine_mode, - rtx); extern void do_compare_rtx_and_jump (rtx, rtx, enum rtx_code, int, enum machine_mode, rtx, rtx, rtx); diff --git a/gcc/final.c b/gcc/final.c index 551b3a0e8b0..30ccc852991 100644 --- a/gcc/final.c +++ b/gcc/final.c @@ -2320,9 +2320,13 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, && GET_CODE (SET_DEST (set)) == CC0 && insn != last_ignored_compare) { + rtx src1, src2; if (GET_CODE (SET_SRC (set)) == SUBREG) SET_SRC (set) = alter_subreg (&SET_SRC (set)); - else if (GET_CODE (SET_SRC (set)) == COMPARE) + + src1 = SET_SRC (set); + src2 = NULL_RTX; + if (GET_CODE (SET_SRC (set)) == COMPARE) { if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) XEXP (SET_SRC (set), 0) @@ -2330,11 +2334,18 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) XEXP (SET_SRC (set), 1) = alter_subreg (&XEXP (SET_SRC (set), 1)); + if (XEXP (SET_SRC (set), 1) + == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) + src2 = XEXP (SET_SRC (set), 0); } if ((cc_status.value1 != 0 - && rtx_equal_p (SET_SRC (set), cc_status.value1)) + && rtx_equal_p (src1, cc_status.value1)) || (cc_status.value2 != 0 - && rtx_equal_p (SET_SRC (set), cc_status.value2))) + && rtx_equal_p (src1, cc_status.value2)) + || (src2 != 0 && cc_status.value1 != 0 + && rtx_equal_p (src2, cc_status.value1)) + || (src2 != 0 && cc_status.value2 != 0 + && rtx_equal_p (src2, cc_status.value2))) { /* Don't delete insn if it has an addressing side-effect. */ if (! FIND_REG_INC_NOTE (insn, NULL_RTX) @@ -2348,9 +2359,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, } } } -#endif -#ifdef HAVE_cc0 /* If this is a conditional branch, maybe modify it if the cc's are in a nonstandard state so that it accomplishes the same thing that it would diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 97f56b20141..587123937b7 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,113 @@ +2009-05-14 Ian Lance Taylor <iant@google.com> + + * decl.c (match_attr_spec): Change d to unsigned int. + * dump-parse-tree.c (show_namespace): Change op to int. Add cast. + * interface.c (gfc_check_interfaces): Change i to int. Add casts. + * module.c (read_module): Change i to int. Add cast. + (write_module): Change i to int. + * symbol.c (gfc_get_namespace): Change in to int. + (gfc_free_namespace): Change i to int. + * trans-io.c (gfc_build_io_library_fndecls): Change ptype to + unsigned int. Add cast. + * trans-types.c (gfc_init_kinds): Change mode to unsigned int. + Add casts. + +2009-05-14 Daniel Kraft <d@domob.eu> + + PR fortran/40045 + * dump-parse-tree.c (show_typebound): Fix missing adaption to new + type-bound procedure storage structure. + +2009-05-14 Janus Weil <janus@gcc.gnu.org> + + PR fortran/39996 + * decl.c (gfc_match_function_decl): Use gfc_add_type. + * symbol.c (gfc_add_type): Better checking for duplicate types in + function declarations. And: Always give an error for duplicte types, + not just a warning with -std=gnu. + +2009-05-14 Jakub Jelinek <jakub@redhat.com> + + PR fortran/39865 + * io.c (resolve_tag_format): CHARACTER array in FMT= argument + isn't an extension. Reject non-CHARACTER array element of + assumed shape or pointer or assumed size array. + * trans-array.c (array_parameter_size): New function. + (gfc_conv_array_parameter): Add size argument. Call + array_parameter_size if it is non-NULL. + * trans-array.h (gfc_conv_array_parameter): Adjust prototype. + * trans-expr.c (gfc_conv_function_call, gfc_trans_arrayfunc_assign): + Adjust callers. + * trans-intrinsic.c (gfc_conv_intrinsic_loc): Likewise. + * trans-io.c (gfc_convert_array_to_string): Rewritten. + +2009-05-13 Steven G. Kargl <kargl@gcc.gnu.org> + + * gfortran.h (gfc_code): Rename struct member expr to expr1. + * openmp.c (resolve_omp_atomic): Update expr to expr1. + * interface.c (gfc_extend_assign): Ditto. + * trans-expr.c (gfc_conv_expr_reference, gfc_trans_assignment, + gfc_trans_init_assign): Ditto. + * dump-parse-tree.c (show_code_node): Ditto. + * trans-openmp.c (gfc_trans_omp_atomic): Ditto. + * trans-stmt.c ( gfc_trans_label_assign, gfc_trans_goto, gfc_trans_call, + gfc_trans_return, gfc_trans_pause, gfc_trans_stop, gfc_trans_if_1, + gfc_trans_arithmetic_if, gfc_trans_do_while, gfc_trans_integer_select, + gfc_trans_logical_select, gfc_trans_character_select + forall_make_variable_temp, check_forall_dependencies + gfc_trans_forall_1, gfc_trans_where_2, gfc_trans_where_3 + gfc_trans_where, gfc_trans_allocate, gfc_trans_deallocate): Ditto. + * io.c (match_io_element, gfc_match_inquire): Ditto. + * resolve.c (resolve_typebound_call, resolve_ppc_call, + resolve_allocate_expr, resolve_allocate_deallocate, resolve_select, + resolve_transfer, resolve_where, gfc_resolve_assign_in_forall, + gfc_resolve_blocks, resolve_code, build_init_assign): Ditto. + * st.c (gfc_free_statement): Ditto. + * match.c (gfc_match_assignment, gfc_match_pointer_assignment, + match_arithmetic_if, gfc_match_if, gfc_match_elseif + gfc_match_stopcode, gfc_match_assign, gfc_match_goto, + gfc_match_nullify, match_typebound_call, gfc_match_call + gfc_match_select, match_simple_where, gfc_match_where + gfc_match_elsewhere, match_simple_forall, gfc_match_forall): Ditto. + * trans-io.c (gfc_trans_transfer): Ditto. + * parse.c (parse_where_block, parse_if_block): Ditto. + +2009-05-13 Steven G. Kargl <kargl@gcc.gnu.org> + + * gfortran.h (gfc_code): Rename struct member label to label1. + * dump-parse-tree.c (show_code_node): Update symbol. + * trans-stmt.c (gfc_trans_label_assign, gfc_trans_goto, + gfc_trans_arithmetic_if)": Ditto. + * resolve.c (gfc_resolve_blocks, resolve_code): Ditto. + * match.c (match_arithmetic_if, gfc_match_if, gfc_reference_st_label, + gfc_match_assign, gfc_match_goto): Ditto. + * parse.c (parse_do_block): Ditto. + +2009-05-13 Tobias Burnus <burnus@net-b.de> + + PR fortran/34153 + * gfortran.h (gfc_exec_op): Add EXEC_END_PROCEDURE. + * dump-parse-tree.c (show_code_node): Use EXEC_END_PROCEDURE. + * trans.c (gfc_trans_code): Ditto. + * resolve.c (resolve_code): Ditto. + * st.c (gfc_free_statement): Ditto. + * parse.c (accept_statement): Ditto. + +2009-05-12 Tobias Burnus <burnus@net-b.de> + + PR fortran/40110 + * decl.c (gfc_match_kind_spec): Turn C kind error into a warning. + +2009-05-11 Steve Ellcey <sje@cup.hp.com> + + * resolve.c (check_host_association): Initialize tail. + +2009-05-11 Janus Weil <janus@gcc.gnu.org> + + PR fortran/40089 + * resolve.c (resolve_fl_derived): Only return FAILURE if + gfc_notify_std fails. + 2009-05-10 Ian Lance Taylor <iant@google.com> * gfortran.h (enum gfc_omp_sched_kind): New enum, broken out of diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c index 85f66fb7461..ae80be11a82 100644 --- a/gcc/fortran/decl.c +++ b/gcc/fortran/decl.c @@ -2000,9 +2000,9 @@ kind_expr: if (ts->f90_type != BT_UNKNOWN && ts->f90_type != ts->type && !((ts->f90_type == BT_REAL && ts->type == BT_COMPLEX) || (ts->f90_type == BT_COMPLEX && ts->type == BT_REAL))) - gfc_error_now ("C kind type parameter is for type %s but type at %L " - "is %s", gfc_basic_typename (ts->f90_type), &where, - gfc_basic_typename (ts->type)); + gfc_warning_now ("C kind type parameter is for type %s but type at %L " + "is %s", gfc_basic_typename (ts->f90_type), &where, + gfc_basic_typename (ts->type)); gfc_gobble_whitespace (); if ((c = gfc_next_ascii_char ()) != ')' @@ -2815,7 +2815,7 @@ match_attr_spec (void) locus start, seen_at[NUM_DECL]; int seen[NUM_DECL]; - int d; + unsigned int d; const char *attr; match m; gfc_try t; @@ -4708,14 +4708,6 @@ gfc_match_function_decl (void) || copy_prefix (&sym->attr, &sym->declared_at) == FAILURE) goto cleanup; - if (current_ts.type != BT_UNKNOWN && sym->ts.type != BT_UNKNOWN - && !sym->attr.implicit_type) - { - gfc_error ("Function '%s' at %C already has a type of %s", name, - gfc_basic_typename (sym->ts.type)); - goto cleanup; - } - /* Delay matching the function characteristics until after the specification block by signalling kind=-1. */ sym->declared_at = old_loc; @@ -4726,12 +4718,17 @@ gfc_match_function_decl (void) if (result == NULL) { - sym->ts = current_ts; + if (current_ts.type != BT_UNKNOWN + && gfc_add_type (sym, ¤t_ts, &gfc_current_locus) == FAILURE) + goto cleanup; sym->result = sym; } else { - result->ts = current_ts; + if (current_ts.type != BT_UNKNOWN + && gfc_add_type (result, ¤t_ts, &gfc_current_locus) + == FAILURE) + goto cleanup; sym->result = result; } diff --git a/gcc/fortran/dump-parse-tree.c b/gcc/fortran/dump-parse-tree.c index 193ab8b432d..26a8e08a649 100644 --- a/gcc/fortran/dump-parse-tree.c +++ b/gcc/fortran/dump-parse-tree.c @@ -1,5 +1,5 @@ /* Parse tree dumper - Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008 + Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Steven Bosscher @@ -680,9 +680,7 @@ show_components (gfc_symbol *sym) static void show_typebound (gfc_symtree* st) { - if (!st->n.tb) - return; - + gcc_assert (st->n.tb); show_indent (); if (st->n.tb->is_generic) @@ -708,7 +706,7 @@ show_typebound (gfc_symtree* st) else fputs (", PRIVATE", dumpfile); - fprintf (dumpfile, " :: %s => ", st->n.sym->name); + fprintf (dumpfile, " :: %s => ", st->name); if (st->n.tb->is_generic) { @@ -739,7 +737,7 @@ show_f2k_derived (gfc_namespace* f2k) } /* Type-bound procedures. */ - gfc_traverse_symtree (f2k->sym_root, &show_typebound); + gfc_traverse_symtree (f2k->tb_sym_root, &show_typebound); --show_level; } @@ -1148,6 +1146,9 @@ show_code_node (int level, gfc_code *c) switch (c->op) { + case EXEC_END_PROCEDURE: + break; + case EXEC_NOP: fputs ("NOP", dumpfile); break; @@ -1163,38 +1164,38 @@ show_code_node (int level, gfc_code *c) case EXEC_INIT_ASSIGN: case EXEC_ASSIGN: fputs ("ASSIGN ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); fputc (' ', dumpfile); show_expr (c->expr2); break; case EXEC_LABEL_ASSIGN: fputs ("LABEL ASSIGN ", dumpfile); - show_expr (c->expr); - fprintf (dumpfile, " %d", c->label->value); + show_expr (c->expr1); + fprintf (dumpfile, " %d", c->label1->value); break; case EXEC_POINTER_ASSIGN: fputs ("POINTER ASSIGN ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); fputc (' ', dumpfile); show_expr (c->expr2); break; case EXEC_GOTO: fputs ("GOTO ", dumpfile); - if (c->label) - fprintf (dumpfile, "%d", c->label->value); + if (c->label1) + fprintf (dumpfile, "%d", c->label1->value); else { - show_expr (c->expr); + show_expr (c->expr1); d = c->block; if (d != NULL) { fputs (", (", dumpfile); for (; d; d = d ->block) { - code_indent (level, d->label); + code_indent (level, d->label1); if (d->block != NULL) fputc (',', dumpfile); else @@ -1218,26 +1219,26 @@ show_code_node (int level, gfc_code *c) case EXEC_COMPCALL: fputs ("CALL ", dumpfile); - show_compcall (c->expr); + show_compcall (c->expr1); break; case EXEC_CALL_PPC: fputs ("CALL ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); show_actual_arglist (c->ext.actual); break; case EXEC_RETURN: fputs ("RETURN ", dumpfile); - if (c->expr) - show_expr (c->expr); + if (c->expr1) + show_expr (c->expr1); break; case EXEC_PAUSE: fputs ("PAUSE ", dumpfile); - if (c->expr != NULL) - show_expr (c->expr); + if (c->expr1 != NULL) + show_expr (c->expr1); else fprintf (dumpfile, "%d", c->ext.stop_code); @@ -1246,8 +1247,8 @@ show_code_node (int level, gfc_code *c) case EXEC_STOP: fputs ("STOP ", dumpfile); - if (c->expr != NULL) - show_expr (c->expr); + if (c->expr1 != NULL) + show_expr (c->expr1); else fprintf (dumpfile, "%d", c->ext.stop_code); @@ -1255,15 +1256,15 @@ show_code_node (int level, gfc_code *c) case EXEC_ARITHMETIC_IF: fputs ("IF ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); fprintf (dumpfile, " %d, %d, %d", - c->label->value, c->label2->value, c->label3->value); + c->label1->value, c->label2->value, c->label3->value); break; case EXEC_IF: d = c->block; fputs ("IF ", dumpfile); - show_expr (d->expr); + show_expr (d->expr1); fputc ('\n', dumpfile); show_code (level + 1, d->next); @@ -1272,19 +1273,19 @@ show_code_node (int level, gfc_code *c) { code_indent (level, 0); - if (d->expr == NULL) + if (d->expr1 == NULL) fputs ("ELSE\n", dumpfile); else { fputs ("ELSE IF ", dumpfile); - show_expr (d->expr); + show_expr (d->expr1); fputc ('\n', dumpfile); } show_code (level + 1, d->next); } - code_indent (level, c->label); + code_indent (level, c->label1); fputs ("ENDIF", dumpfile); break; @@ -1292,7 +1293,7 @@ show_code_node (int level, gfc_code *c) case EXEC_SELECT: d = c->block; fputs ("SELECT CASE ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); fputc ('\n', dumpfile); for (; d; d = d->block) @@ -1314,7 +1315,7 @@ show_code_node (int level, gfc_code *c) show_code (level + 1, d->next); } - code_indent (level, c->label); + code_indent (level, c->label1); fputs ("END SELECT", dumpfile); break; @@ -1322,7 +1323,7 @@ show_code_node (int level, gfc_code *c) fputs ("WHERE ", dumpfile); d = c->block; - show_expr (d->expr); + show_expr (d->expr1); fputc ('\n', dumpfile); show_code (level + 1, d->next); @@ -1331,7 +1332,7 @@ show_code_node (int level, gfc_code *c) { code_indent (level, 0); fputs ("ELSE WHERE ", dumpfile); - show_expr (d->expr); + show_expr (d->expr1); fputc ('\n', dumpfile); show_code (level + 1, d->next); } @@ -1357,10 +1358,10 @@ show_code_node (int level, gfc_code *c) fputc (',', dumpfile); } - if (c->expr != NULL) + if (c->expr1 != NULL) { fputc (',', dumpfile); - show_expr (c->expr); + show_expr (c->expr1); } fputc ('\n', dumpfile); @@ -1390,12 +1391,12 @@ show_code_node (int level, gfc_code *c) case EXEC_DO_WHILE: fputs ("DO WHILE ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); fputc ('\n', dumpfile); show_code (level + 1, c->block->next); - code_indent (level, c->label); + code_indent (level, c->label1); fputs ("END DO", dumpfile); break; @@ -1413,10 +1414,10 @@ show_code_node (int level, gfc_code *c) case EXEC_ALLOCATE: fputs ("ALLOCATE ", dumpfile); - if (c->expr) + if (c->expr1) { fputs (" STAT=", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); } for (a = c->ext.alloc_list; a; a = a->next) @@ -1429,10 +1430,10 @@ show_code_node (int level, gfc_code *c) case EXEC_DEALLOCATE: fputs ("DEALLOCATE ", dumpfile); - if (c->expr) + if (c->expr1) { fputs (" STAT=", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); } for (a = c->ext.alloc_list; a; a = a->next) @@ -1795,7 +1796,7 @@ show_code_node (int level, gfc_code *c) case EXEC_IOLENGTH: fputs ("IOLENGTH ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); goto show_dt_code; break; @@ -1904,7 +1905,7 @@ show_code_node (int level, gfc_code *c) case EXEC_TRANSFER: fputs ("TRANSFER ", dumpfile); - show_expr (c->expr); + show_expr (c->expr1); break; case EXEC_DT_END: diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h index fad49c4e7cd..86f2c5bf252 100644 --- a/gcc/fortran/gfortran.h +++ b/gcc/fortran/gfortran.h @@ -1893,7 +1893,7 @@ typedef enum EXEC_ENTRY, EXEC_PAUSE, EXEC_STOP, EXEC_CONTINUE, EXEC_INIT_ASSIGN, EXEC_IF, EXEC_ARITHMETIC_IF, EXEC_DO, EXEC_DO_WHILE, EXEC_SELECT, EXEC_FORALL, EXEC_WHERE, EXEC_CYCLE, EXEC_EXIT, EXEC_CALL_PPC, - EXEC_ALLOCATE, EXEC_DEALLOCATE, + EXEC_ALLOCATE, EXEC_DEALLOCATE, EXEC_END_PROCEDURE, EXEC_OPEN, EXEC_CLOSE, EXEC_WAIT, EXEC_READ, EXEC_WRITE, EXEC_IOLENGTH, EXEC_TRANSFER, EXEC_DT_END, EXEC_BACKSPACE, EXEC_ENDFILE, EXEC_INQUIRE, EXEC_REWIND, EXEC_FLUSH, @@ -1913,9 +1913,9 @@ typedef struct gfc_code struct gfc_code *block, *next; locus loc; - gfc_st_label *here, *label, *label2, *label3; + gfc_st_label *here, *label1, *label2, *label3; gfc_symtree *symtree; - gfc_expr *expr, *expr2; + gfc_expr *expr1, *expr2; /* A name isn't sufficient to identify a subroutine, we need the actual symbol for the interface definition. const char *sub_name; */ diff --git a/gcc/fortran/interface.c b/gcc/fortran/interface.c index 756d5d0adfe..f2d14657f06 100644 --- a/gcc/fortran/interface.c +++ b/gcc/fortran/interface.c @@ -1175,7 +1175,7 @@ gfc_check_interfaces (gfc_namespace *ns) { gfc_namespace *old_ns, *ns2; char interface_name[100]; - int iloop; + int i; old_ns = gfc_current_ns; gfc_current_ns = ns; @@ -1184,10 +1184,8 @@ gfc_check_interfaces (gfc_namespace *ns) gfc_traverse_user_op (ns, check_uop_interfaces); - for (iloop = GFC_INTRINSIC_BEGIN; iloop != GFC_INTRINSIC_END; iloop++) + for (i = GFC_INTRINSIC_BEGIN; i != GFC_INTRINSIC_END; i++) { - gfc_intrinsic_op i = (gfc_intrinsic_op) iloop; - if (i == INTRINSIC_USER) continue; @@ -1195,12 +1193,12 @@ gfc_check_interfaces (gfc_namespace *ns) strcpy (interface_name, "intrinsic assignment operator"); else sprintf (interface_name, "intrinsic '%s' operator", - gfc_op2string (i)); + gfc_op2string ((gfc_intrinsic_op) i)); if (check_interface0 (ns->op[i], interface_name)) continue; - check_operator_interface (ns->op[i], i); + check_operator_interface (ns->op[i], (gfc_intrinsic_op) i); for (ns2 = ns; ns2; ns2 = ns2->parent) { @@ -2593,7 +2591,7 @@ gfc_extend_assign (gfc_code *c, gfc_namespace *ns) gfc_expr *lhs, *rhs; gfc_symbol *sym; - lhs = c->expr; + lhs = c->expr1; rhs = c->expr2; /* Don't allow an intrinsic assignment to be replaced. */ @@ -2628,7 +2626,7 @@ gfc_extend_assign (gfc_code *c, gfc_namespace *ns) /* Replace the assignment with the call. */ c->op = EXEC_ASSIGN_CALL; c->symtree = gfc_find_sym_in_symtree (sym); - c->expr = NULL; + c->expr1 = NULL; c->expr2 = NULL; c->ext.actual = actual; diff --git a/gcc/fortran/io.c b/gcc/fortran/io.c index 57e65f85422..c902257f095 100644 --- a/gcc/fortran/io.c +++ b/gcc/fortran/io.c @@ -1,5 +1,5 @@ /* Deal with I/O statements & related stuff. - Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 + Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. Contributed by Andy Vaught @@ -1234,8 +1234,11 @@ resolve_tag_format (const gfc_expr *e) /* If e's rank is zero and e is not an element of an array, it should be of integer or character type. The integer variable should be ASSIGNED. */ - if (e->symtree == NULL || e->symtree->n.sym->as == NULL - || e->symtree->n.sym->as->rank == 0) + if (e->rank == 0 + && (e->expr_type != EXPR_VARIABLE + || e->symtree == NULL + || e->symtree->n.sym->as == NULL + || e->symtree->n.sym->as->rank == 0)) { if (e->ts.type != BT_CHARACTER && e->ts.type != BT_INTEGER) { @@ -1266,20 +1269,34 @@ resolve_tag_format (const gfc_expr *e) return SUCCESS; } - /* If rank is nonzero, we allow the type to be character under GFC_STD_GNU - and other type under GFC_STD_LEGACY. It may be assigned an Hollerith - constant. */ - if (e->ts.type == BT_CHARACTER) - { - if (gfc_notify_std (GFC_STD_GNU, "Extension: Character array " - "in FORMAT tag at %L", &e->where) == FAILURE) - return FAILURE; - } - else + /* If rank is nonzero and type is not character, we allow it under GFC_STD_LEGACY. + It may be assigned an Hollerith constant. */ + if (e->ts.type != BT_CHARACTER) { if (gfc_notify_std (GFC_STD_LEGACY, "Extension: Non-character " "in FORMAT tag at %L", &e->where) == FAILURE) return FAILURE; + + if (e->rank == 0 && e->symtree->n.sym->as->type == AS_ASSUMED_SHAPE) + { + gfc_error ("Non-character assumed shape array element in FORMAT" + " tag at %L", &e->where); + return FAILURE; + } + + if (e->rank == 0 && e->symtree->n.sym->as->type == AS_ASSUMED_SIZE) + { + gfc_error ("Non-character assumed size array element in FORMAT" + " tag at %L", &e->where); + return FAILURE; + } + + if (e->rank == 0 && e->symtree->n.sym->attr.pointer) + { + gfc_error ("Non-character pointer array element in FORMAT tag at %L", + &e->where); + return FAILURE; + } } return SUCCESS; @@ -2830,7 +2847,7 @@ match_io_element (io_kind k, gfc_code **cpp) cp = gfc_get_code (); cp->op = EXEC_TRANSFER; - cp->expr = expr; + cp->expr1 = expr; *cpp = cp; return MATCH_YES; @@ -3662,7 +3679,7 @@ gfc_match_inquire (void) goto syntax; new_st.op = EXEC_IOLENGTH; - new_st.expr = inquire->iolength; + new_st.expr1 = inquire->iolength; new_st.ext.inquire = inquire; if (gfc_pure (NULL)) diff --git a/gcc/fortran/match.c b/gcc/fortran/match.c index 6faedec1ce8..ed7bf58bb86 100644 --- a/gcc/fortran/match.c +++ b/gcc/fortran/match.c @@ -1306,7 +1306,7 @@ gfc_match_assignment (void) gfc_set_sym_referenced (lvalue->symtree->n.sym); new_st.op = EXEC_ASSIGN; - new_st.expr = lvalue; + new_st.expr1 = lvalue; new_st.expr2 = rvalue; gfc_check_do_variable (lvalue->symtree); @@ -1346,7 +1346,7 @@ gfc_match_pointer_assignment (void) goto cleanup; new_st.op = EXEC_POINTER_ASSIGN; - new_st.expr = lvalue; + new_st.expr1 = lvalue; new_st.expr2 = rvalue; return MATCH_YES; @@ -1388,8 +1388,8 @@ match_arithmetic_if (void) return MATCH_ERROR; new_st.op = EXEC_ARITHMETIC_IF; - new_st.expr = expr; - new_st.label = l1; + new_st.expr1 = expr; + new_st.label1 = l1; new_st.label2 = l2; new_st.label3 = l3; @@ -1469,8 +1469,8 @@ gfc_match_if (gfc_statement *if_type) return MATCH_ERROR; new_st.op = EXEC_ARITHMETIC_IF; - new_st.expr = expr; - new_st.label = l1; + new_st.expr1 = expr; + new_st.label1 = l1; new_st.label2 = l2; new_st.label3 = l3; @@ -1481,7 +1481,7 @@ gfc_match_if (gfc_statement *if_type) if (gfc_match (" then%t") == MATCH_YES) { new_st.op = EXEC_IF; - new_st.expr = expr; + new_st.expr1 = expr; *if_type = ST_IF_BLOCK; return MATCH_YES; } @@ -1601,7 +1601,7 @@ got_match: *p->next = new_st; p->next->loc = gfc_current_locus; - p->expr = expr; + p->expr1 = expr; p->op = EXEC_IF; gfc_clear_new_st (); @@ -1677,7 +1677,7 @@ gfc_match_elseif (void) done: new_st.op = EXEC_IF; - new_st.expr = expr; + new_st.expr1 = expr; return MATCH_YES; cleanup: @@ -1789,10 +1789,10 @@ done: && gfc_reference_st_label (label, ST_LABEL_TARGET) == FAILURE) goto cleanup; - new_st.label = label; + new_st.label1 = label; if (new_st.op == EXEC_DO_WHILE) - new_st.expr = iter.end; + new_st.expr1 = iter.end; else { new_st.ext.iterator = ip = gfc_get_iterator (); @@ -1952,7 +1952,7 @@ gfc_match_stopcode (gfc_statement st) } new_st.op = st == ST_STOP ? EXEC_STOP : EXEC_PAUSE; - new_st.expr = e; + new_st.expr1 = e; new_st.ext.stop_code = stop_code; return MATCH_YES; @@ -2033,8 +2033,8 @@ gfc_match_assign (void) expr->symtree->n.sym->attr.assign = 1; new_st.op = EXEC_LABEL_ASSIGN; - new_st.label = label; - new_st.expr = expr; + new_st.label1 = label; + new_st.expr1 = expr; return MATCH_YES; } } @@ -2063,7 +2063,7 @@ gfc_match_goto (void) return MATCH_ERROR; new_st.op = EXEC_GOTO; - new_st.label = label; + new_st.label1 = label; return MATCH_YES; } @@ -2077,7 +2077,7 @@ gfc_match_goto (void) return MATCH_ERROR; new_st.op = EXEC_GOTO; - new_st.expr = expr; + new_st.expr1 = expr; if (gfc_match_eos () == MATCH_YES) return MATCH_YES; @@ -2108,7 +2108,7 @@ gfc_match_goto (void) tail = tail->block; } - tail->label = label; + tail->label1 = label; tail->op = EXEC_GOTO; } while (gfc_match_char (',') == MATCH_YES); @@ -2161,7 +2161,7 @@ gfc_match_goto (void) tail->next = gfc_get_code (); tail->next->op = EXEC_GOTO; - tail->next->label = label; + tail->next->label1 = label; } while (gfc_match_char (',') == MATCH_YES); @@ -2184,7 +2184,7 @@ gfc_match_goto (void) equivalent SELECT statement constructed. */ new_st.op = EXEC_SELECT; - new_st.expr = NULL; + new_st.expr1 = NULL; /* Hack: For a "real" SELECT, the expression is in expr. We put it in expr2 so we can distinguish then and produce the correct @@ -2337,7 +2337,7 @@ alloc_opt_list: goto syntax; new_st.op = EXEC_ALLOCATE; - new_st.expr = stat; + new_st.expr1 = stat; new_st.expr2 = errmsg; new_st.ext.alloc_list = head; @@ -2402,7 +2402,7 @@ gfc_match_nullify (void) } tail->op = EXEC_POINTER_ASSIGN; - tail->expr = p; + tail->expr1 = p; tail->expr2 = e; if (gfc_match (" )%t") == MATCH_YES) @@ -2538,7 +2538,7 @@ dealloc_opt_list: goto syntax; new_st.op = EXEC_DEALLOCATE; - new_st.expr = stat; + new_st.expr1 = stat; new_st.expr2 = errmsg; new_st.ext.alloc_list = head; @@ -2606,7 +2606,7 @@ done: return MATCH_ERROR; new_st.op = EXEC_RETURN; - new_st.expr = e; + new_st.expr1 = e; return MATCH_YES; } @@ -2652,7 +2652,7 @@ match_typebound_call (gfc_symtree* varst) "at %C"); return MATCH_ERROR; } - new_st.expr = base; + new_st.expr1 = base; return MATCH_YES; } @@ -2755,11 +2755,11 @@ gfc_match_call (void) select_sym->ts.type = BT_INTEGER; select_sym->ts.kind = gfc_default_integer_kind; gfc_set_sym_referenced (select_sym); - c->expr = gfc_get_expr (); - c->expr->expr_type = EXPR_VARIABLE; - c->expr->symtree = select_st; - c->expr->ts = select_sym->ts; - c->expr->where = gfc_current_locus; + c->expr1 = gfc_get_expr (); + c->expr1->expr_type = EXPR_VARIABLE; + c->expr1->symtree = select_st; + c->expr1->ts = select_sym->ts; + c->expr1->where = gfc_current_locus; i = 0; for (a = arglist; a; a = a->next) @@ -2782,7 +2782,7 @@ gfc_match_call (void) c->next = gfc_get_code (); c->next->op = EXEC_GOTO; - c->next->label = a->label; + c->next->label1 = a->label; } } @@ -3655,7 +3655,7 @@ gfc_match_select (void) return m; new_st.op = EXEC_SELECT; - new_st.expr = expr; + new_st.expr1 = expr; return MATCH_YES; } @@ -3760,7 +3760,7 @@ match_simple_where (void) c = gfc_get_code (); c->op = EXEC_WHERE; - c->expr = expr; + c->expr1 = expr; c->next = gfc_get_code (); *c->next = new_st; @@ -3801,7 +3801,7 @@ gfc_match_where (gfc_statement *st) { *st = ST_WHERE_BLOCK; new_st.op = EXEC_WHERE; - new_st.expr = expr; + new_st.expr1 = expr; return MATCH_YES; } @@ -3820,7 +3820,7 @@ gfc_match_where (gfc_statement *st) c = gfc_get_code (); c->op = EXEC_WHERE; - c->expr = expr; + c->expr1 = expr; c->next = gfc_get_code (); *c->next = new_st; @@ -3890,7 +3890,7 @@ gfc_match_elsewhere (void) } new_st.op = EXEC_WHERE; - new_st.expr = expr; + new_st.expr1 = expr; return MATCH_YES; syntax: @@ -4107,7 +4107,7 @@ match_simple_forall (void) gfc_clear_new_st (); new_st.op = EXEC_FORALL; - new_st.expr = mask; + new_st.expr1 = mask; new_st.ext.forall_iterator = head; new_st.block = gfc_get_code (); @@ -4159,7 +4159,7 @@ gfc_match_forall (gfc_statement *st) { *st = ST_FORALL_BLOCK; new_st.op = EXEC_FORALL; - new_st.expr = mask; + new_st.expr1 = mask; new_st.ext.forall_iterator = head; return MATCH_YES; } @@ -4182,7 +4182,7 @@ gfc_match_forall (gfc_statement *st) gfc_clear_new_st (); new_st.op = EXEC_FORALL; - new_st.expr = mask; + new_st.expr1 = mask; new_st.ext.forall_iterator = head; new_st.block = gfc_get_code (); new_st.block->op = EXEC_FORALL; diff --git a/gcc/fortran/openmp.c b/gcc/fortran/openmp.c index 9ac9a4aec91..0e9dda80ce6 100644 --- a/gcc/fortran/openmp.c +++ b/gcc/fortran/openmp.c @@ -1072,20 +1072,20 @@ resolve_omp_atomic (gfc_code *code) gcc_assert (code->op == EXEC_ASSIGN); gcc_assert (code->next == NULL); - if (code->expr->expr_type != EXPR_VARIABLE - || code->expr->symtree == NULL - || code->expr->rank != 0 - || (code->expr->ts.type != BT_INTEGER - && code->expr->ts.type != BT_REAL - && code->expr->ts.type != BT_COMPLEX - && code->expr->ts.type != BT_LOGICAL)) + if (code->expr1->expr_type != EXPR_VARIABLE + || code->expr1->symtree == NULL + || code->expr1->rank != 0 + || (code->expr1->ts.type != BT_INTEGER + && code->expr1->ts.type != BT_REAL + && code->expr1->ts.type != BT_COMPLEX + && code->expr1->ts.type != BT_LOGICAL)) { gfc_error ("!$OMP ATOMIC statement must set a scalar variable of " "intrinsic type at %L", &code->loc); return; } - var = code->expr->symtree->n.sym; + var = code->expr1->symtree->n.sym; expr2 = is_conversion (code->expr2, false); if (expr2 == NULL) expr2 = code->expr2; diff --git a/gcc/fortran/options.c b/gcc/fortran/options.c index b45696ddf35..65841f6a629 100644 --- a/gcc/fortran/options.c +++ b/gcc/fortran/options.c @@ -238,9 +238,9 @@ gfc_post_options (const char **pfilename) sorry ("-fexcess-precision=standard for Fortran"); flag_excess_precision_cmdline = EXCESS_PRECISION_FAST; - /* Issue an error if -fwhole-program was used. */ + /* Whole program needs whole file mode. */ if (flag_whole_program) - gfc_fatal_error ("Option -fwhole-program is not supported for Fortran"); + gfc_option.flag_whole_file = 1; /* -fbounds-check is equivalent to -fcheck=bounds */ if (flag_bounds_check) diff --git a/gcc/fortran/parse.c b/gcc/fortran/parse.c index d387f543c94..0b2cbf3cb0e 100644 --- a/gcc/fortran/parse.c +++ b/gcc/fortran/parse.c @@ -1496,6 +1496,11 @@ accept_statement (gfc_statement st) new_st.op = EXEC_RETURN; add_statement (); } + else + { + new_st.op = EXEC_END_PROCEDURE; + add_statement (); + } break; @@ -2503,10 +2508,10 @@ parse_where_block (void) push_state (&s, COMP_WHERE, gfc_new_block); d = add_statement (); - d->expr = top->expr; + d->expr1 = top->expr1; d->op = EXEC_WHERE; - top->expr = NULL; + top->expr1 = NULL; top->block = d; seen_empty_else = 0; @@ -2536,12 +2541,12 @@ parse_where_block (void) break; } - if (new_st.expr == NULL) + if (new_st.expr1 == NULL) seen_empty_else = 1; d = new_level (gfc_state_stack->head); d->op = EXEC_WHERE; - d->expr = new_st.expr; + d->expr1 = new_st.expr1; accept_statement (st); @@ -2646,8 +2651,8 @@ parse_if_block (void) new_st.op = EXEC_IF; d = add_statement (); - d->expr = top->expr; - top->expr = NULL; + d->expr1 = top->expr1; + top->expr1 = NULL; top->block = d; do @@ -2671,7 +2676,7 @@ parse_if_block (void) d = new_level (gfc_state_stack->head); d->op = EXEC_IF; - d->expr = new_st.expr; + d->expr1 = new_st.expr1; accept_statement (st); @@ -2862,7 +2867,7 @@ parse_do_block (void) gfc_state_data s; gfc_symtree *stree; - s.ext.end_do_label = new_st.label; + s.ext.end_do_label = new_st.label1; if (new_st.ext.iterator != NULL) stree = new_st.ext.iterator->var->symtree; diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c index 288410fbb22..dbca1752b55 100644 --- a/gcc/fortran/resolve.c +++ b/gcc/fortran/resolve.c @@ -4353,8 +4353,7 @@ check_host_association (gfc_expr *e) gfc_symtree *st; int n; gfc_ref *ref; - gfc_actual_arglist *arg; - gfc_actual_arglist *tail = NULL; + gfc_actual_arglist *arg, *tail = NULL; bool retval = e->expr_type == EXPR_FUNCTION; /* If the expression is the result of substitution in @@ -4739,31 +4738,31 @@ resolve_typebound_call (gfc_code* c) gfc_symtree* target; /* Check that's really a SUBROUTINE. */ - if (!c->expr->value.compcall.tbp->subroutine) + if (!c->expr1->value.compcall.tbp->subroutine) { gfc_error ("'%s' at %L should be a SUBROUTINE", - c->expr->value.compcall.name, &c->loc); + c->expr1->value.compcall.name, &c->loc); return FAILURE; } - if (check_typebound_baseobject (c->expr) == FAILURE) + if (check_typebound_baseobject (c->expr1) == FAILURE) return FAILURE; - if (resolve_typebound_generic_call (c->expr) == FAILURE) + if (resolve_typebound_generic_call (c->expr1) == FAILURE) return FAILURE; /* Transform into an ordinary EXEC_CALL for now. */ - if (resolve_typebound_static (c->expr, &target, &newactual) == FAILURE) + if (resolve_typebound_static (c->expr1, &target, &newactual) == FAILURE) return FAILURE; c->ext.actual = newactual; c->symtree = target; c->op = EXEC_CALL; - gcc_assert (!c->expr->ref && !c->expr->value.compcall.actual); - gfc_free_expr (c->expr); - c->expr = NULL; + gcc_assert (!c->expr1->ref && !c->expr1->value.compcall.actual); + gfc_free_expr (c->expr1); + c->expr1 = NULL; return resolve_call (c); } @@ -4820,22 +4819,22 @@ static gfc_try resolve_ppc_call (gfc_code* c) { gfc_component *comp; - gcc_assert (is_proc_ptr_comp (c->expr, &comp)); + gcc_assert (is_proc_ptr_comp (c->expr1, &comp)); - c->resolved_sym = c->expr->symtree->n.sym; - c->expr->expr_type = EXPR_VARIABLE; - c->ext.actual = c->expr->value.compcall.actual; + c->resolved_sym = c->expr1->symtree->n.sym; + c->expr1->expr_type = EXPR_VARIABLE; + c->ext.actual = c->expr1->value.compcall.actual; if (!comp->attr.subroutine) - gfc_add_subroutine (&comp->attr, comp->name, &c->expr->where); + gfc_add_subroutine (&comp->attr, comp->name, &c->expr1->where); if (resolve_actual_arglist (c->ext.actual, comp->attr.proc, comp->formal == NULL) == FAILURE) return FAILURE; /* TODO: Check actual arguments. - gfc_procedure_use (stree->n.sym, &c->expr->value.compcall.actual, - &c->expr->where);*/ + gfc_procedure_use (stree->n.sym, &c->expr1->value.compcall.actual, + &c->expr1->where);*/ return SUCCESS; } @@ -5413,7 +5412,7 @@ resolve_allocate_expr (gfc_expr *e, gfc_code *code) init_st = gfc_get_code (); init_st->loc = code->loc; init_st->op = EXEC_INIT_ASSIGN; - init_st->expr = expr_to_initialize (e); + init_st->expr1 = expr_to_initialize (e); init_st->expr2 = init_e; init_st->next = code->next; code->next = init_st; @@ -5493,7 +5492,7 @@ resolve_allocate_deallocate (gfc_code *code, const char *fcn) gfc_expr *stat, *errmsg, *pe, *qe; gfc_alloc *a, *p, *q; - stat = code->expr ? code->expr : NULL; + stat = code->expr1 ? code->expr1 : NULL; errmsg = code->expr2 ? code->expr2 : NULL; @@ -5844,7 +5843,7 @@ resolve_select (gfc_code *code) bt type; gfc_try t; - if (code->expr == NULL) + if (code->expr1 == NULL) { /* This was actually a computed GOTO statement. */ case_expr = code->expr2; @@ -5857,12 +5856,12 @@ resolve_select (gfc_code *code) by the compiler, so it should always be OK. Just move the case_expr from expr2 to expr so that we can handle computed GOTOs as normal SELECTs from here on. */ - code->expr = code->expr2; + code->expr1 = code->expr2; code->expr2 = NULL; return; } - case_expr = code->expr; + case_expr = code->expr1; type = case_expr->ts.type; if (type != BT_LOGICAL && type != BT_INTEGER && type != BT_CHARACTER) @@ -6115,7 +6114,7 @@ resolve_transfer (gfc_code *code) gfc_ref *ref; gfc_expr *exp; - exp = code->expr; + exp = code->expr1; if (exp->expr_type != EXPR_VARIABLE && exp->expr_type != EXPR_FUNCTION) return; @@ -6124,7 +6123,7 @@ resolve_transfer (gfc_code *code) ts = &sym->ts; /* Go to actual component transferred. */ - for (ref = code->expr->ref; ref; ref = ref->next) + for (ref = code->expr1->ref; ref; ref = ref->next) if (ref->type == REF_COMPONENT) ts = &ref->u.c.component->ts; @@ -6320,19 +6319,19 @@ resolve_where (gfc_code *code, gfc_expr *mask) /* Store the first WHERE mask-expr of the WHERE statement or construct. In case of nested WHERE, only the outmost one is stored. */ if (mask == NULL) /* outmost WHERE */ - e = cblock->expr; + e = cblock->expr1; else /* inner WHERE */ e = mask; while (cblock) { - if (cblock->expr) + if (cblock->expr1) { /* Check if the mask-expr has a consistent shape with the outmost WHERE mask-expr. */ - if (resolve_where_shape (cblock->expr, e) == FAILURE) + if (resolve_where_shape (cblock->expr1, e) == FAILURE) gfc_error ("WHERE mask at %L has inconsistent shape", - &cblock->expr->where); + &cblock->expr1->where); } /* the assignment statement of a WHERE statement, or the first @@ -6346,9 +6345,9 @@ resolve_where (gfc_code *code, gfc_expr *mask) case EXEC_ASSIGN: /* Check shape consistent for WHERE assignment target. */ - if (e && resolve_where_shape (cnext->expr, e) == FAILURE) + if (e && resolve_where_shape (cnext->expr1, e) == FAILURE) gfc_error ("WHERE assignment target at %L has " - "inconsistent shape", &cnext->expr->where); + "inconsistent shape", &cnext->expr1->where); break; @@ -6394,21 +6393,21 @@ gfc_resolve_assign_in_forall (gfc_code *code, int nvar, gfc_expr **var_expr) /* Check whether the assignment target is one of the FORALL index variable. */ - if ((code->expr->expr_type == EXPR_VARIABLE) - && (code->expr->symtree->n.sym == forall_index)) + if ((code->expr1->expr_type == EXPR_VARIABLE) + && (code->expr1->symtree->n.sym == forall_index)) gfc_error ("Assignment to a FORALL index variable at %L", - &code->expr->where); + &code->expr1->where); else { /* If one of the FORALL index variables doesn't appear in the assignment variable, then there could be a many-to-one assignment. Emit a warning rather than an error because the mask could be resolving this problem. */ - if (find_forall_index (code->expr, forall_index, 0) == FAILURE) + if (find_forall_index (code->expr1, forall_index, 0) == FAILURE) gfc_warning ("The FORALL with index '%s' is not used on the " "left side of the assignment at %L and so might " "cause multiple assignment to this object", - var_expr[n]->symtree->name, &code->expr->where); + var_expr[n]->symtree->name, &code->expr1->where); } } } @@ -6624,29 +6623,29 @@ gfc_resolve_blocks (gfc_code *b, gfc_namespace *ns) for (; b; b = b->block) { - t = gfc_resolve_expr (b->expr); + t = gfc_resolve_expr (b->expr1); if (gfc_resolve_expr (b->expr2) == FAILURE) t = FAILURE; switch (b->op) { case EXEC_IF: - if (t == SUCCESS && b->expr != NULL - && (b->expr->ts.type != BT_LOGICAL || b->expr->rank != 0)) + if (t == SUCCESS && b->expr1 != NULL + && (b->expr1->ts.type != BT_LOGICAL || b->expr1->rank != 0)) gfc_error ("IF clause at %L requires a scalar LOGICAL expression", - &b->expr->where); + &b->expr1->where); break; case EXEC_WHERE: if (t == SUCCESS - && b->expr != NULL - && (b->expr->ts.type != BT_LOGICAL || b->expr->rank == 0)) + && b->expr1 != NULL + && (b->expr1->ts.type != BT_LOGICAL || b->expr1->rank == 0)) gfc_error ("WHERE/ELSEWHERE clause at %L requires a LOGICAL array", - &b->expr->where); + &b->expr1->where); break; case EXEC_GOTO: - resolve_branch (b->label, b); + resolve_branch (b->label1, b); break; case EXEC_SELECT: @@ -6720,7 +6719,7 @@ resolve_ordinary_assign (gfc_code *code, gfc_namespace *ns) return true; } - lhs = code->expr; + lhs = code->expr1; rhs = code->expr2; if (rhs->is_boz @@ -6889,7 +6888,7 @@ resolve_code (gfc_code *code, gfc_namespace *ns) t = SUCCESS; if (code->op != EXEC_COMPCALL && code->op != EXEC_CALL_PPC) - t = gfc_resolve_expr (code->expr); + t = gfc_resolve_expr (code->expr1); forall_flag = forall_save; if (gfc_resolve_expr (code->expr2) == FAILURE) @@ -6917,28 +6916,29 @@ resolve_code (gfc_code *code, gfc_namespace *ns) break; case EXEC_GOTO: - if (code->expr != NULL) + if (code->expr1 != NULL) { - if (code->expr->ts.type != BT_INTEGER) + if (code->expr1->ts.type != BT_INTEGER) gfc_error ("ASSIGNED GOTO statement at %L requires an " - "INTEGER variable", &code->expr->where); - else if (code->expr->symtree->n.sym->attr.assign != 1) + "INTEGER variable", &code->expr1->where); + else if (code->expr1->symtree->n.sym->attr.assign != 1) gfc_error ("Variable '%s' has not been assigned a target " - "label at %L", code->expr->symtree->n.sym->name, - &code->expr->where); + "label at %L", code->expr1->symtree->n.sym->name, + &code->expr1->where); } else - resolve_branch (code->label, code); + resolve_branch (code->label1, code); break; case EXEC_RETURN: - if (code->expr != NULL - && (code->expr->ts.type != BT_INTEGER || code->expr->rank)) + if (code->expr1 != NULL + && (code->expr1->ts.type != BT_INTEGER || code->expr1->rank)) gfc_error ("Alternate RETURN statement at %L requires a SCALAR-" - "INTEGER return specifier", &code->expr->where); + "INTEGER return specifier", &code->expr1->where); break; case EXEC_INIT_ASSIGN: + case EXEC_END_PROCEDURE: break; case EXEC_ASSIGN: @@ -6951,44 +6951,44 @@ resolve_code (gfc_code *code, gfc_namespace *ns) break; case EXEC_LABEL_ASSIGN: - if (code->label->defined == ST_LABEL_UNKNOWN) + if (code->label1->defined == ST_LABEL_UNKNOWN) gfc_error ("Label %d referenced at %L is never defined", - code->label->value, &code->label->where); + code->label1->value, &code->label1->where); if (t == SUCCESS - && (code->expr->expr_type != EXPR_VARIABLE - || code->expr->symtree->n.sym->ts.type != BT_INTEGER - || code->expr->symtree->n.sym->ts.kind + && (code->expr1->expr_type != EXPR_VARIABLE + || code->expr1->symtree->n.sym->ts.type != BT_INTEGER + || code->expr1->symtree->n.sym->ts.kind != gfc_default_integer_kind - || code->expr->symtree->n.sym->as != NULL)) + || code->expr1->symtree->n.sym->as != NULL)) gfc_error ("ASSIGN statement at %L requires a scalar " - "default INTEGER variable", &code->expr->where); + "default INTEGER variable", &code->expr1->where); break; case EXEC_POINTER_ASSIGN: if (t == FAILURE) break; - gfc_check_pointer_assign (code->expr, code->expr2); + gfc_check_pointer_assign (code->expr1, code->expr2); break; case EXEC_ARITHMETIC_IF: if (t == SUCCESS - && code->expr->ts.type != BT_INTEGER - && code->expr->ts.type != BT_REAL) + && code->expr1->ts.type != BT_INTEGER + && code->expr1->ts.type != BT_REAL) gfc_error ("Arithmetic IF statement at %L requires a numeric " - "expression", &code->expr->where); + "expression", &code->expr1->where); - resolve_branch (code->label, code); + resolve_branch (code->label1, code); resolve_branch (code->label2, code); resolve_branch (code->label3, code); break; case EXEC_IF: - if (t == SUCCESS && code->expr != NULL - && (code->expr->ts.type != BT_LOGICAL - || code->expr->rank != 0)) + if (t == SUCCESS && code->expr1 != NULL + && (code->expr1->ts.type != BT_LOGICAL + || code->expr1->rank != 0)) gfc_error ("IF clause at %L requires a scalar LOGICAL expression", - &code->expr->where); + &code->expr1->where); break; case EXEC_CALL: @@ -7020,13 +7020,13 @@ resolve_code (gfc_code *code, gfc_namespace *ns) break; case EXEC_DO_WHILE: - if (code->expr == NULL) + if (code->expr1 == NULL) gfc_internal_error ("resolve_code(): No expression on DO WHILE"); if (t == SUCCESS - && (code->expr->rank != 0 - || code->expr->ts.type != BT_LOGICAL)) + && (code->expr1->rank != 0 + || code->expr1->ts.type != BT_LOGICAL)) gfc_error ("Exit condition of DO WHILE loop at %L must be " - "a scalar LOGICAL expression", &code->expr->where); + "a scalar LOGICAL expression", &code->expr1->where); break; case EXEC_ALLOCATE: @@ -7106,9 +7106,9 @@ resolve_code (gfc_code *code, gfc_namespace *ns) case EXEC_FORALL: resolve_forall_iterators (code->ext.forall_iterator); - if (code->expr != NULL && code->expr->ts.type != BT_LOGICAL) + if (code->expr1 != NULL && code->expr1->ts.type != BT_LOGICAL) gfc_error ("FORALL mask clause at %L requires a LOGICAL " - "expression", &code->expr->where); + "expression", &code->expr1->where); break; case EXEC_OMP_ATOMIC: @@ -7479,7 +7479,7 @@ build_init_assign (gfc_symbol *sym, gfc_expr *init) /* Assign the default initializer to the l-value. */ init_st->loc = sym->declared_at; init_st->op = EXEC_INIT_ASSIGN; - init_st->expr = lval; + init_st->expr1 = lval; init_st->expr2 = init; } @@ -9087,14 +9087,12 @@ resolve_fl_derived (gfc_symbol *sym) && !is_sym_host_assoc (c->ts.derived, sym->ns) && !c->ts.derived->attr.use_assoc && !gfc_check_access (c->ts.derived->attr.access, - c->ts.derived->ns->default_access)) - { - gfc_notify_std (GFC_STD_F2003, "Fortran 2003: the component '%s' " - "is a PRIVATE type and cannot be a component of " - "'%s', which is PUBLIC at %L", c->name, - sym->name, &sym->declared_at); - return FAILURE; - } + c->ts.derived->ns->default_access) + && gfc_notify_std (GFC_STD_F2003, "Fortran 2003: the component '%s' " + "is a PRIVATE type and cannot be a component of " + "'%s', which is PUBLIC at %L", c->name, + sym->name, &sym->declared_at) == FAILURE) + return FAILURE; if (sym->attr.sequence) { diff --git a/gcc/fortran/st.c b/gcc/fortran/st.c index d0cdb0e868c..d77ef81822c 100644 --- a/gcc/fortran/st.c +++ b/gcc/fortran/st.c @@ -80,8 +80,8 @@ gfc_append_code (gfc_code *tail, gfc_code *new_code) void gfc_free_statement (gfc_code *p) { - if (p->expr) - gfc_free_expr (p->expr); + if (p->expr1) + gfc_free_expr (p->expr1); if (p->expr2) gfc_free_expr (p->expr2); @@ -94,6 +94,7 @@ gfc_free_statement (gfc_code *p) case EXEC_GOTO: case EXEC_CYCLE: case EXEC_RETURN: + case EXEC_END_PROCEDURE: case EXEC_IF: case EXEC_PAUSE: case EXEC_STOP: diff --git a/gcc/fortran/symbol.c b/gcc/fortran/symbol.c index 689bd475450..81473a420bf 100644 --- a/gcc/fortran/symbol.c +++ b/gcc/fortran/symbol.c @@ -1559,31 +1559,30 @@ gfc_try gfc_add_type (gfc_symbol *sym, gfc_typespec *ts, locus *where) { sym_flavor flavor; + bt type; if (where == NULL) where = &gfc_current_locus; - if (sym->ts.type != BT_UNKNOWN) + if (sym->result) + type = sym->result->ts.type; + else + type = sym->ts.type; + + if (sym->attr.result && type == BT_UNKNOWN && sym->ns->proc_name) + type = sym->ns->proc_name->ts.type; + + if (type != BT_UNKNOWN && !(sym->attr.function && sym->attr.implicit_type)) { - const char *msg = "Symbol '%s' at %L already has basic type of %s"; - if (!(sym->ts.type == ts->type && sym->attr.result) - || gfc_notification_std (GFC_STD_GNU) == ERROR - || pedantic) - { - gfc_error (msg, sym->name, where, gfc_basic_typename (sym->ts.type)); - return FAILURE; - } - if (gfc_notify_std (GFC_STD_GNU, msg, sym->name, where, - gfc_basic_typename (sym->ts.type)) == FAILURE) - return FAILURE; - if (gfc_option.warn_surprising) - gfc_warning (msg, sym->name, where, gfc_basic_typename (sym->ts.type)); + gfc_error ("Symbol '%s' at %L already has basic type of %s", sym->name, + where, gfc_basic_typename (type)); + return FAILURE; } if (sym->attr.procedure && sym->ts.interface) { - gfc_error ("Procedure '%s' at %L may not have basic type of %s", sym->name, where, - gfc_basic_typename (ts->type)); + gfc_error ("Procedure '%s' at %L may not have basic type of %s", + sym->name, where, gfc_basic_typename (ts->type)); return FAILURE; } @@ -4495,4 +4494,3 @@ gfc_get_tbp_symtree (gfc_symtree **root, const char *name) return result; } - diff --git a/gcc/fortran/trans-array.c b/gcc/fortran/trans-array.c index 71db46d18b2..f4276ca133c 100644 --- a/gcc/fortran/trans-array.c +++ b/gcc/fortran/trans-array.c @@ -5339,13 +5339,41 @@ gfc_conv_expr_descriptor (gfc_se * se, gfc_expr * expr, gfc_ss * ss) gfc_cleanup_loop (&loop); } +/* Helper function for gfc_conv_array_parameter if array size needs to be + computed. */ + +static void +array_parameter_size (tree desc, gfc_expr *expr, tree *size) +{ + tree elem; + if (GFC_ARRAY_TYPE_P (TREE_TYPE (desc))) + *size = GFC_TYPE_ARRAY_SIZE (TREE_TYPE (desc)); + else if (expr->rank > 1) + *size = build_call_expr (gfor_fndecl_size0, 1, + gfc_build_addr_expr (NULL, desc)); + else + { + tree ubound = gfc_conv_descriptor_ubound (desc, gfc_index_zero_node); + tree lbound = gfc_conv_descriptor_lbound (desc, gfc_index_zero_node); + + *size = fold_build2 (MINUS_EXPR, gfc_array_index_type, ubound, lbound); + *size = fold_build2 (PLUS_EXPR, gfc_array_index_type, *size, + gfc_index_one_node); + *size = fold_build2 (MAX_EXPR, gfc_array_index_type, *size, + gfc_index_zero_node); + } + elem = TYPE_SIZE_UNIT (gfc_get_element_type (TREE_TYPE (desc))); + *size = fold_build2 (MULT_EXPR, gfc_array_index_type, *size, + fold_convert (gfc_array_index_type, elem)); +} /* Convert an array for passing as an actual parameter. */ /* TODO: Optimize passing g77 arrays. */ void gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, gfc_ss * ss, int g77, - const gfc_symbol *fsym, const char *proc_name) + const gfc_symbol *fsym, const char *proc_name, + tree *size) { tree ptr; tree desc; @@ -5394,6 +5422,8 @@ gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, gfc_ss * ss, int g77, se->expr = tmp; else se->expr = gfc_build_addr_expr (NULL_TREE, tmp); + if (size) + array_parameter_size (tmp, expr, size); return; } if (sym->attr.allocatable) @@ -5401,10 +5431,11 @@ gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, gfc_ss * ss, int g77, if (sym->attr.dummy || sym->attr.result) { gfc_conv_expr_descriptor (se, expr, ss); - se->expr = gfc_conv_array_data (se->expr); + tmp = se->expr; } - else - se->expr = gfc_conv_array_data (tmp); + if (size) + array_parameter_size (tmp, expr, size); + se->expr = gfc_conv_array_data (tmp); return; } } @@ -5413,6 +5444,8 @@ gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, gfc_ss * ss, int g77, { /* Result of the enclosing function. */ gfc_conv_expr_descriptor (se, expr, ss); + if (size) + array_parameter_size (se->expr, expr, size); se->expr = gfc_build_addr_expr (NULL_TREE, se->expr); if (g77 && TREE_TYPE (TREE_TYPE (se->expr)) != NULL_TREE @@ -5426,6 +5459,9 @@ gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, gfc_ss * ss, int g77, /* Every other type of array. */ se->want_pointer = 1; gfc_conv_expr_descriptor (se, expr, ss); + if (size) + array_parameter_size (build_fold_indirect_ref (se->expr), + expr, size); } /* Deallocate the allocatable components of structures that are diff --git a/gcc/fortran/trans-array.h b/gcc/fortran/trans-array.h index 49818d4fe6d..3f8809d84c6 100644 --- a/gcc/fortran/trans-array.h +++ b/gcc/fortran/trans-array.h @@ -106,7 +106,7 @@ void gfc_conv_tmp_ref (gfc_se *); void gfc_conv_expr_descriptor (gfc_se *, gfc_expr *, gfc_ss *); /* Convert an array for passing as an actual function parameter. */ void gfc_conv_array_parameter (gfc_se *, gfc_expr *, gfc_ss *, int, - const gfc_symbol *, const char *); + const gfc_symbol *, const char *, tree *); /* Evaluate and transpose a matrix expression. */ void gfc_conv_array_transpose (gfc_se *, gfc_expr *); diff --git a/gcc/fortran/trans-expr.c b/gcc/fortran/trans-expr.c index 14f64c96ab8..cf17598c9f6 100644 --- a/gcc/fortran/trans-expr.c +++ b/gcc/fortran/trans-expr.c @@ -2424,7 +2424,8 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, f = f || !sym->attr.always_explicit; argss = gfc_walk_expr (arg->expr); - gfc_conv_array_parameter (se, arg->expr, argss, f, NULL, NULL); + gfc_conv_array_parameter (se, arg->expr, argss, f, + NULL, NULL, NULL); } /* TODO -- the following two lines shouldn't be necessary, but @@ -2676,7 +2677,7 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, fsym ? fsym->attr.intent : INTENT_INOUT); else gfc_conv_array_parameter (&parmse, e, argss, f, fsym, - sym->name); + sym->name, NULL); /* If an ALLOCATABLE dummy argument has INTENT(OUT) and is allocated on entry, it must be deallocated. */ @@ -4014,7 +4015,7 @@ gfc_conv_expr_reference (gfc_se * se, gfc_expr * expr) tree gfc_trans_pointer_assign (gfc_code * code) { - return gfc_trans_pointer_assignment (code->expr, code->expr2); + return gfc_trans_pointer_assignment (code->expr1, code->expr2); } @@ -4352,7 +4353,7 @@ gfc_trans_arrayfunc_assign (gfc_expr * expr1, gfc_expr * expr2) gfc_start_block (&se.pre); se.want_pointer = 1; - gfc_conv_array_parameter (&se, expr1, ss, 0, NULL, NULL); + gfc_conv_array_parameter (&se, expr1, ss, 0, NULL, NULL, NULL); se.direct_byref = 1; se.ss = gfc_walk_expr (expr2); @@ -4839,11 +4840,11 @@ gfc_trans_assignment (gfc_expr * expr1, gfc_expr * expr2, bool init_flag) tree gfc_trans_init_assign (gfc_code * code) { - return gfc_trans_assignment (code->expr, code->expr2, true); + return gfc_trans_assignment (code->expr1, code->expr2, true); } tree gfc_trans_assign (gfc_code * code) { - return gfc_trans_assignment (code->expr, code->expr2, false); + return gfc_trans_assignment (code->expr1, code->expr2, false); } diff --git a/gcc/fortran/trans-intrinsic.c b/gcc/fortran/trans-intrinsic.c index d00a35b5eb8..33cc7f569a3 100644 --- a/gcc/fortran/trans-intrinsic.c +++ b/gcc/fortran/trans-intrinsic.c @@ -4394,7 +4394,7 @@ gfc_conv_intrinsic_loc (gfc_se * se, gfc_expr * expr) if (ss == gfc_ss_terminator) gfc_conv_expr_reference (se, arg_expr); else - gfc_conv_array_parameter (se, arg_expr, ss, 1, NULL, NULL); + gfc_conv_array_parameter (se, arg_expr, ss, 1, NULL, NULL, NULL); se->expr= convert (gfc_get_int_type (gfc_index_integer_kind), se->expr); /* Create a temporary variable for loc return value. Without this, diff --git a/gcc/fortran/trans-io.c b/gcc/fortran/trans-io.c index c40cbf0586b..0acf632fc06 100644 --- a/gcc/fortran/trans-io.c +++ b/gcc/fortran/trans-io.c @@ -279,7 +279,7 @@ gfc_build_io_library_fndecls (void) tree gfc_intio_type_node; tree parm_type, dt_parm_type; HOST_WIDE_INT pad_size; - int ptype; + unsigned int ptype; types[IOPARM_type_int4] = gfc_int4_type_node = gfc_get_int_type (4); types[IOPARM_type_intio] = gfc_intio_type_node @@ -567,65 +567,57 @@ set_parameter_ref (stmtblock_t *block, stmtblock_t *postblock, /* Given an array expr, find its address and length to get a string. If the array is full, the string's address is the address of array's first element - and the length is the size of the whole array. If it is an element, the + and the length is the size of the whole array. If it is an element, the string's address is the element's address and the length is the rest size of - the array. -*/ + the array. */ static void gfc_convert_array_to_string (gfc_se * se, gfc_expr * e) { - tree tmp; - tree array; - tree type; tree size; - int rank; - gfc_symbol *sym; - - sym = e->symtree->n.sym; - rank = sym->as->rank - 1; - if (e->ref->u.ar.type == AR_FULL) - { - se->expr = gfc_get_symbol_decl (sym); - se->expr = gfc_conv_array_data (se->expr); - } - else + if (e->rank == 0) { + tree type, array, tmp; + gfc_symbol *sym; + int rank; + + /* If it is an element, we need its address and size of the rest. */ + gcc_assert (e->expr_type == EXPR_VARIABLE); + gcc_assert (e->ref->u.ar.type == AR_ELEMENT); + sym = e->symtree->n.sym; + rank = sym->as->rank - 1; gfc_conv_expr (se, e); - } - - array = sym->backend_decl; - type = TREE_TYPE (array); - if (GFC_ARRAY_TYPE_P (type)) - size = GFC_TYPE_ARRAY_SIZE (type); - else - { - gcc_assert (GFC_DESCRIPTOR_TYPE_P (type)); - size = gfc_conv_array_stride (array, rank); - tmp = fold_build2 (MINUS_EXPR, gfc_array_index_type, - gfc_conv_array_ubound (array, rank), - gfc_conv_array_lbound (array, rank)); - tmp = fold_build2 (PLUS_EXPR, gfc_array_index_type, tmp, - gfc_index_one_node); - size = fold_build2 (MULT_EXPR, gfc_array_index_type, tmp, size); - } + array = sym->backend_decl; + type = TREE_TYPE (array); - gcc_assert (size); + if (GFC_ARRAY_TYPE_P (type)) + size = GFC_TYPE_ARRAY_SIZE (type); + else + { + gcc_assert (GFC_DESCRIPTOR_TYPE_P (type)); + size = gfc_conv_array_stride (array, rank); + tmp = fold_build2 (MINUS_EXPR, gfc_array_index_type, + gfc_conv_array_ubound (array, rank), + gfc_conv_array_lbound (array, rank)); + tmp = fold_build2 (PLUS_EXPR, gfc_array_index_type, tmp, + gfc_index_one_node); + size = fold_build2 (MULT_EXPR, gfc_array_index_type, tmp, size); + } + gcc_assert (size); - /* If it is an element, we need the its address and size of the rest. */ - if (e->ref->u.ar.type == AR_ELEMENT) - { size = fold_build2 (MINUS_EXPR, gfc_array_index_type, size, - TREE_OPERAND (se->expr, 1)); + TREE_OPERAND (se->expr, 1)); se->expr = gfc_build_addr_expr (NULL_TREE, se->expr); + tmp = TYPE_SIZE_UNIT (gfc_get_element_type (type)); + size = fold_build2 (MULT_EXPR, gfc_array_index_type, size, + fold_convert (gfc_array_index_type, tmp)); + se->string_length = fold_convert (gfc_charlen_type_node, size); + return; } - tmp = TYPE_SIZE_UNIT (gfc_get_element_type (type)); - size = fold_build2 (MULT_EXPR, gfc_array_index_type, size, - fold_convert (gfc_array_index_type, tmp)); - + gfc_conv_array_parameter (se, e, gfc_walk_expr (e), 1, NULL, NULL, &size); se->string_length = fold_convert (gfc_charlen_type_node, size); } @@ -654,7 +646,9 @@ set_string (stmtblock_t * block, stmtblock_t * postblock, tree var, var, p->field_len, NULL_TREE); /* Integer variable assigned a format label. */ - if (e->ts.type == BT_INTEGER && e->symtree->n.sym->attr.assign == 1) + if (e->ts.type == BT_INTEGER + && e->rank == 0 + && e->symtree->n.sym->attr.assign == 1) { char * msg; tree cond; @@ -680,7 +674,7 @@ set_string (stmtblock_t * block, stmtblock_t * postblock, tree var, if (e->ts.type == BT_CHARACTER && e->rank == 0) gfc_conv_expr (&se, e); /* Array assigned Hollerith constant or character array. */ - else if (e->symtree && (e->symtree->n.sym->as->rank > 0)) + else if (e->rank > 0 || (e->symtree && e->symtree->n.sym->as->rank > 0)) gfc_convert_array_to_string (&se, e); else gcc_unreachable (); @@ -2149,7 +2143,7 @@ gfc_trans_transfer (gfc_code * code) gfc_start_block (&block); gfc_init_block (&body); - expr = code->expr; + expr = code->expr1; ss = gfc_walk_expr (expr); ref = NULL; @@ -2209,7 +2203,7 @@ gfc_trans_transfer (gfc_code * code) /* Initialize the loop. */ gfc_conv_ss_startstride (&loop); - gfc_conv_loop_setup (&loop, &code->expr->where); + gfc_conv_loop_setup (&loop, &code->expr1->where); /* The main loop body. */ gfc_mark_ss_chain_used (ss, 1); diff --git a/gcc/fortran/trans-openmp.c b/gcc/fortran/trans-openmp.c index 5ad2f9cc669..88bfe3c4bf2 100644 --- a/gcc/fortran/trans-openmp.c +++ b/gcc/fortran/trans-openmp.c @@ -952,13 +952,13 @@ gfc_trans_omp_atomic (gfc_code *code) code = code->block->next; gcc_assert (code->op == EXEC_ASSIGN); gcc_assert (code->next == NULL); - var = code->expr->symtree->n.sym; + var = code->expr1->symtree->n.sym; gfc_init_se (&lse, NULL); gfc_init_se (&rse, NULL); gfc_start_block (&block); - gfc_conv_expr (&lse, code->expr); + gfc_conv_expr (&lse, code->expr1); gfc_add_block_to_block (&block, &lse.pre); type = TREE_TYPE (lse.expr); lhsaddr = gfc_build_addr_expr (NULL, lse.expr); diff --git a/gcc/fortran/trans-stmt.c b/gcc/fortran/trans-stmt.c index 9bad071cd37..1a1352de8dd 100644 --- a/gcc/fortran/trans-stmt.c +++ b/gcc/fortran/trans-stmt.c @@ -104,21 +104,21 @@ gfc_trans_label_assign (gfc_code * code) /* Start a new block. */ gfc_init_se (&se, NULL); gfc_start_block (&se.pre); - gfc_conv_label_variable (&se, code->expr); + gfc_conv_label_variable (&se, code->expr1); len = GFC_DECL_STRING_LEN (se.expr); addr = GFC_DECL_ASSIGN_ADDR (se.expr); - label_tree = gfc_get_label_decl (code->label); + label_tree = gfc_get_label_decl (code->label1); - if (code->label->defined == ST_LABEL_TARGET) + if (code->label1->defined == ST_LABEL_TARGET) { label_tree = gfc_build_addr_expr (pvoid_type_node, label_tree); len_tree = integer_minus_one_node; } else { - gfc_expr *format = code->label->format; + gfc_expr *format = code->label1->format; label_len = format->value.character.length; len_tree = build_int_cst (NULL_TREE, label_len); @@ -144,13 +144,13 @@ gfc_trans_goto (gfc_code * code) tree tmp; gfc_se se; - if (code->label != NULL) - return build1_v (GOTO_EXPR, gfc_get_label_decl (code->label)); + if (code->label1 != NULL) + return build1_v (GOTO_EXPR, gfc_get_label_decl (code->label1)); /* ASSIGNED GOTO. */ gfc_init_se (&se, NULL); gfc_start_block (&se.pre); - gfc_conv_label_variable (&se, code->expr); + gfc_conv_label_variable (&se, code->expr1); tmp = GFC_DECL_STRING_LEN (se.expr); tmp = fold_build2 (NE_EXPR, boolean_type_node, tmp, build_int_cst (TREE_TYPE (tmp), -1)); @@ -170,7 +170,7 @@ gfc_trans_goto (gfc_code * code) /* Check the label list. */ do { - target = gfc_get_label_decl (code->label); + target = gfc_get_label_decl (code->label1); tmp = gfc_build_addr_expr (pvoid_type_node, target); tmp = fold_build2 (EQ_EXPR, boolean_type_node, tmp, assigned_goto); tmp = build3_v (COND_EXPR, tmp, @@ -363,7 +363,7 @@ gfc_trans_call (gfc_code * code, bool dependency_check, /* Translate the call. */ has_alternate_specifier = gfc_conv_procedure_call (&se, code->resolved_sym, code->ext.actual, - code->expr, NULL_TREE); + code->expr1, NULL_TREE); /* A subroutine without side-effect, by definition, does nothing! */ TREE_SIDE_EFFECTS (se.expr) = 1; @@ -375,7 +375,7 @@ gfc_trans_call (gfc_code * code, bool dependency_check, gfc_symbol *sym; select_code = code->next; gcc_assert(select_code->op == EXEC_SELECT); - sym = select_code->expr->symtree->n.sym; + sym = select_code->expr1->symtree->n.sym; se.expr = convert (gfc_typenode_for_spec (&sym->ts), se.expr); if (sym->backend_decl == NULL) sym->backend_decl = gfc_get_symbol_decl (sym); @@ -411,7 +411,7 @@ gfc_trans_call (gfc_code * code, bool dependency_check, subscripts. This could be prevented in the elemental case as temporaries are handled separatedly (below in gfc_conv_elemental_dependencies). */ - gfc_conv_loop_setup (&loop, &code->expr->where); + gfc_conv_loop_setup (&loop, &code->expr1->where); gfc_mark_ss_chain_used (ss, 1); /* Convert the arguments, checking for dependencies. */ @@ -447,7 +447,7 @@ gfc_trans_call (gfc_code * code, bool dependency_check, /* Add the subroutine call to the block. */ gfc_conv_procedure_call (&loopse, code->resolved_sym, - code->ext.actual, code->expr, + code->ext.actual, code->expr1, NULL_TREE); if (mask && count1) @@ -483,7 +483,7 @@ gfc_trans_call (gfc_code * code, bool dependency_check, tree gfc_trans_return (gfc_code * code ATTRIBUTE_UNUSED) { - if (code->expr) + if (code->expr1) { gfc_se se; tree tmp; @@ -497,7 +497,7 @@ gfc_trans_return (gfc_code * code ATTRIBUTE_UNUSED) if (!result) { gfc_warning ("An alternate return at %L without a * dummy argument", - &code->expr->where); + &code->expr1->where); return build1_v (GOTO_EXPR, gfc_get_return_label ()); } @@ -505,7 +505,7 @@ gfc_trans_return (gfc_code * code ATTRIBUTE_UNUSED) gfc_init_se (&se, NULL); gfc_start_block (&se.pre); - gfc_conv_expr (&se, code->expr); + gfc_conv_expr (&se, code->expr1); tmp = fold_build2 (MODIFY_EXPR, TREE_TYPE (result), result, fold_convert (TREE_TYPE (result), se.expr)); @@ -536,14 +536,14 @@ gfc_trans_pause (gfc_code * code) gfc_start_block (&se.pre); - if (code->expr == NULL) + if (code->expr1 == NULL) { tmp = build_int_cst (gfc_int4_type_node, code->ext.stop_code); tmp = build_call_expr (gfor_fndecl_pause_numeric, 1, tmp); } else { - gfc_conv_expr_reference (&se, code->expr); + gfc_conv_expr_reference (&se, code->expr1); tmp = build_call_expr (gfor_fndecl_pause_string, 2, se.expr, se.string_length); } @@ -571,14 +571,14 @@ gfc_trans_stop (gfc_code * code) gfc_start_block (&se.pre); - if (code->expr == NULL) + if (code->expr1 == NULL) { tmp = build_int_cst (gfc_int4_type_node, code->ext.stop_code); tmp = build_call_expr (gfor_fndecl_stop_numeric, 1, tmp); } else { - gfc_conv_expr_reference (&se, code->expr); + gfc_conv_expr_reference (&se, code->expr1); tmp = build_call_expr (gfor_fndecl_stop_string, 2, se.expr, se.string_length); } @@ -638,7 +638,7 @@ gfc_trans_if_1 (gfc_code * code) tree stmt, elsestmt; /* Check for an unconditional ELSE clause. */ - if (!code->expr) + if (!code->expr1) return gfc_trans_code (code->next); /* Initialize a statement builder for each block. Puts in NULL_TREEs. */ @@ -646,7 +646,7 @@ gfc_trans_if_1 (gfc_code * code) gfc_start_block (&if_se.pre); /* Calculate the IF condition expression. */ - gfc_conv_expr_val (&if_se, code->expr); + gfc_conv_expr_val (&if_se, code->expr1); /* Translate the THEN clause. */ stmt = gfc_trans_code (code->next); @@ -713,20 +713,20 @@ gfc_trans_arithmetic_if (gfc_code * code) gfc_start_block (&se.pre); /* Pre-evaluate COND. */ - gfc_conv_expr_val (&se, code->expr); + gfc_conv_expr_val (&se, code->expr1); se.expr = gfc_evaluate_now (se.expr, &se.pre); /* Build something to compare with. */ zero = gfc_build_const (TREE_TYPE (se.expr), integer_zero_node); - if (code->label->value != code->label2->value) + if (code->label1->value != code->label2->value) { /* If (cond < 0) take branch1 else take branch2. First build jumps to the COND .LT. 0 and the COND .EQ. 0 cases. */ - branch1 = build1_v (GOTO_EXPR, gfc_get_label_decl (code->label)); + branch1 = build1_v (GOTO_EXPR, gfc_get_label_decl (code->label1)); branch2 = build1_v (GOTO_EXPR, gfc_get_label_decl (code->label2)); - if (code->label->value != code->label3->value) + if (code->label1->value != code->label3->value) tmp = fold_build2 (LT_EXPR, boolean_type_node, se.expr, zero); else tmp = fold_build2 (NE_EXPR, boolean_type_node, se.expr, zero); @@ -734,9 +734,9 @@ gfc_trans_arithmetic_if (gfc_code * code) branch1 = fold_build3 (COND_EXPR, void_type_node, tmp, branch1, branch2); } else - branch1 = build1_v (GOTO_EXPR, gfc_get_label_decl (code->label)); + branch1 = build1_v (GOTO_EXPR, gfc_get_label_decl (code->label1)); - if (code->label->value != code->label3->value + if (code->label1->value != code->label3->value && code->label2->value != code->label3->value) { /* if (cond <= 0) take branch1 else take branch2. */ @@ -1160,7 +1160,7 @@ gfc_trans_do_while (gfc_code * code) /* Create a GIMPLE version of the exit condition. */ gfc_init_se (&cond, NULL); - gfc_conv_expr_val (&cond, code->expr); + gfc_conv_expr_val (&cond, code->expr1); gfc_add_block_to_block (&block, &cond.pre); cond.expr = fold_build1 (TRUTH_NOT_EXPR, boolean_type_node, cond.expr); @@ -1258,7 +1258,7 @@ gfc_trans_integer_select (gfc_code * code) /* Calculate the switch expression. */ gfc_init_se (&se, NULL); - gfc_conv_expr_val (&se, code->expr); + gfc_conv_expr_val (&se, code->expr1); gfc_add_block_to_block (&block, &se.pre); end_label = gfc_build_label_decl (NULL_TREE); @@ -1399,7 +1399,7 @@ gfc_trans_logical_select (gfc_code * code) /* Calculate the switch expression. We always need to do this because it may have side effects. */ gfc_init_se (&se, NULL); - gfc_conv_expr_val (&se, code->expr); + gfc_conv_expr_val (&se, code->expr1); gfc_add_block_to_block (&block, &se.pre); if (t == f && t != NULL) @@ -1472,11 +1472,11 @@ gfc_trans_character_select (gfc_code *code) static tree ss_string2[2], ss_string2_len[2]; static tree ss_target[2]; - tree pchartype = gfc_get_pchar_type (code->expr->ts.kind); + tree pchartype = gfc_get_pchar_type (code->expr1->ts.kind); - if (code->expr->ts.kind == 1) + if (code->expr1->ts.kind == 1) k = 0; - else if (code->expr->ts.kind == 4) + else if (code->expr1->ts.kind == 4) k = 1; else gcc_unreachable (); @@ -1485,9 +1485,9 @@ gfc_trans_character_select (gfc_code *code) { select_struct[k] = make_node (RECORD_TYPE); - if (code->expr->ts.kind == 1) + if (code->expr1->ts.kind == 1) TYPE_NAME (select_struct[k]) = get_identifier ("_jump_struct_char1"); - else if (code->expr->ts.kind == 4) + else if (code->expr1->ts.kind == 4) TYPE_NAME (select_struct[k]) = get_identifier ("_jump_struct_char4"); else gcc_unreachable (); @@ -1603,13 +1603,13 @@ gfc_trans_character_select (gfc_code *code) init = gfc_build_addr_expr (pvoid_type_node, init); gfc_init_se (&se, NULL); - gfc_conv_expr_reference (&se, code->expr); + gfc_conv_expr_reference (&se, code->expr1); gfc_add_block_to_block (&block, &se.pre); - if (code->expr->ts.kind == 1) + if (code->expr1->ts.kind == 1) fndecl = gfor_fndecl_select_string; - else if (code->expr->ts.kind == 4) + else if (code->expr1->ts.kind == 4) fndecl = gfor_fndecl_select_string_char4; else gcc_unreachable (); @@ -1649,14 +1649,14 @@ gfc_trans_character_select (gfc_code *code) tree gfc_trans_select (gfc_code * code) { - gcc_assert (code && code->expr); + gcc_assert (code && code->expr1); /* Empty SELECT constructs are legal. */ if (code->block == NULL) return build_empty_stmt (); /* Select the correct translation function. */ - switch (code->expr->ts.type) + switch (code->expr1->ts.type) { case BT_LOGICAL: return gfc_trans_logical_select (code); case BT_INTEGER: return gfc_trans_integer_select (code); @@ -1732,7 +1732,7 @@ forall_make_variable_temp (gfc_code *c, stmtblock_t *pre, stmtblock_t *post) tree tmp; /* Build a copy of the lvalue. */ - old_symtree = c->expr->symtree; + old_symtree = c->expr1->symtree; old_sym = old_symtree->n.sym; e = gfc_lval_expr_from_sym (old_sym); if (old_sym->attr.dimension) @@ -1797,7 +1797,7 @@ forall_make_variable_temp (gfc_code *c, stmtblock_t *pre, stmtblock_t *post) /* Go through the expression reference replacing the old_symtree with the new. */ - forall_replace_symtree (c->expr, old_sym, 2); + forall_replace_symtree (c->expr1, old_sym, 2); /* Now we have made this temporary, we might as well use it for the right hand side. */ @@ -1814,8 +1814,8 @@ check_forall_dependencies (gfc_code *c, stmtblock_t *pre, stmtblock_t *post) int need_temp; gfc_symbol *lsym; - lsym = c->expr->symtree->n.sym; - need_temp = gfc_check_dependency (c->expr, c->expr2, 0); + lsym = c->expr1->symtree->n.sym; + need_temp = gfc_check_dependency (c->expr1, c->expr2, 0); /* Now check for dependencies within the 'variable' expression itself. These are treated by making a complete @@ -1829,7 +1829,7 @@ check_forall_dependencies (gfc_code *c, stmtblock_t *pre, stmtblock_t *post) return need_temp; new_symtree = NULL; - if (find_forall_index (c->expr, lsym, 2) == SUCCESS) + if (find_forall_index (c->expr1, lsym, 2) == SUCCESS) { forall_make_variable_temp (c, pre, post); need_temp = 0; @@ -1837,12 +1837,12 @@ check_forall_dependencies (gfc_code *c, stmtblock_t *pre, stmtblock_t *post) /* Substrings with dependencies are treated in the same way. */ - if (c->expr->ts.type == BT_CHARACTER - && c->expr->ref + if (c->expr1->ts.type == BT_CHARACTER + && c->expr1->ref && c->expr2->expr_type == EXPR_VARIABLE && lsym == c->expr2->symtree->n.sym) { - for (lref = c->expr->ref; lref; lref = lref->next) + for (lref = c->expr1->ref; lref; lref = lref->next) if (lref->type == REF_SUBSTRING) break; for (rref = c->expr2->ref; rref; rref = rref->next) @@ -1863,7 +1863,7 @@ check_forall_dependencies (gfc_code *c, stmtblock_t *pre, stmtblock_t *post) static void cleanup_forall_symtrees (gfc_code *c) { - forall_restore_symtree (c->expr); + forall_restore_symtree (c->expr1); forall_restore_symtree (c->expr2); gfc_free (new_symtree->n.sym); gfc_free (new_symtree); @@ -2813,9 +2813,9 @@ gfc_trans_forall_1 (gfc_code * code, forall_info * nested_forall_info) bool need_mask; /* Do nothing if the mask is false. */ - if (code->expr - && code->expr->expr_type == EXPR_CONSTANT - && !code->expr->value.logical) + if (code->expr1 + && code->expr1->expr_type == EXPR_CONSTANT + && !code->expr1->value.logical) return build_empty_stmt (); n = 0; @@ -2918,11 +2918,11 @@ gfc_trans_forall_1 (gfc_code * code, forall_info * nested_forall_info) info->nvar = nvar; info->size = size; - if (code->expr) + if (code->expr1) { /* If the mask is .true., consider the FORALL unconditional. */ - if (code->expr->expr_type == EXPR_CONSTANT - && code->expr->value.logical) + if (code->expr1->expr_type == EXPR_CONSTANT + && code->expr1->value.logical) need_mask = false; else need_mask = true; @@ -2968,7 +2968,7 @@ gfc_trans_forall_1 (gfc_code * code, forall_info * nested_forall_info) /* Evaluate the mask expression. */ gfc_init_se (&se, NULL); - gfc_conv_expr_val (&se, code->expr); + gfc_conv_expr_val (&se, code->expr1); gfc_add_block_to_block (&body, &se.pre); /* Store the mask. */ @@ -3005,12 +3005,12 @@ gfc_trans_forall_1 (gfc_code * code, forall_info * nested_forall_info) /* Temporaries due to array assignment data dependencies introduce no end of problems. */ if (need_temp) - gfc_trans_assign_need_temp (c->expr, c->expr2, NULL, false, + gfc_trans_assign_need_temp (c->expr1, c->expr2, NULL, false, nested_forall_info, &block); else { /* Use the normal assignment copying routines. */ - assign = gfc_trans_assignment (c->expr, c->expr2, false); + assign = gfc_trans_assignment (c->expr1, c->expr2, false); /* Generate body and loops. */ tmp = gfc_trans_nested_forall_loop (nested_forall_info, @@ -3032,14 +3032,14 @@ gfc_trans_forall_1 (gfc_code * code, forall_info * nested_forall_info) /* Pointer assignment inside FORALL. */ case EXEC_POINTER_ASSIGN: - need_temp = gfc_check_dependency (c->expr, c->expr2, 0); + need_temp = gfc_check_dependency (c->expr1, c->expr2, 0); if (need_temp) - gfc_trans_pointer_assign_need_temp (c->expr, c->expr2, + gfc_trans_pointer_assign_need_temp (c->expr1, c->expr2, nested_forall_info, &block); else { /* Use the normal assignment copying routines. */ - assign = gfc_trans_pointer_assignment (c->expr, c->expr2); + assign = gfc_trans_pointer_assignment (c->expr1, c->expr2); /* Generate body and loops. */ tmp = gfc_trans_nested_forall_loop (nested_forall_info, @@ -3519,7 +3519,7 @@ gfc_trans_where_2 (gfc_code * code, tree mask, bool invert, /* Two clauses, the first empty, the second non-empty. */ else if (mask) { - need_cmask = (cblock->block->expr != 0); + need_cmask = (cblock->block->expr1 != 0); need_pmask = true; } else @@ -3532,7 +3532,7 @@ gfc_trans_where_2 (gfc_code * code, tree mask, bool invert, { /* Calculate the size of temporary needed by the mask-expr. */ gfc_init_block (&inner_size_body); - inner_size = compute_inner_temp_size (cblock->expr, cblock->expr, + inner_size = compute_inner_temp_size (cblock->expr1, cblock->expr1, &inner_size_body, &lss, &rss); /* Calculate the total size of temporary needed. */ @@ -3564,7 +3564,7 @@ gfc_trans_where_2 (gfc_code * code, tree mask, bool invert, bottom of the loop. */ /* Has mask-expr. */ - if (cblock->expr) + if (cblock->expr1) { /* Ensure that the WHERE mask will be evaluated exactly once. If there are no statements in this WHERE/ELSEWHERE clause, @@ -3572,13 +3572,13 @@ gfc_trans_where_2 (gfc_code * code, tree mask, bool invert, If this is the last clause of the WHERE construct, then we don't need to update the pending control mask (pmask). */ if (mask) - gfc_evaluate_where_mask (cblock->expr, nested_forall_info, + gfc_evaluate_where_mask (cblock->expr1, nested_forall_info, mask, invert, cblock->next ? cmask : NULL_TREE, cblock->block ? pmask : NULL_TREE, mask_type, block); else - gfc_evaluate_where_mask (cblock->expr, nested_forall_info, + gfc_evaluate_where_mask (cblock->expr1, nested_forall_info, NULL_TREE, false, (cblock->next || cblock->block) ? cmask : NULL_TREE, @@ -3617,7 +3617,7 @@ gfc_trans_where_2 (gfc_code * code, tree mask, bool invert, goto evaluate; case EXEC_ASSIGN: - expr1 = cnext->expr; + expr1 = cnext->expr1; expr2 = cnext->expr2; evaluate: if (nested_forall_info != NULL) @@ -3729,10 +3729,10 @@ gfc_trans_where_3 (gfc_code * cblock, gfc_code * eblock) if (ompws_flags & OMPWS_WORKSHARE_FLAG) ompws_flags |= OMPWS_SCALARIZER_WS; - cond = cblock->expr; - tdst = cblock->next->expr; + cond = cblock->expr1; + tdst = cblock->next->expr1; tsrc = cblock->next->expr2; - edst = eblock ? eblock->next->expr : NULL; + edst = eblock ? eblock->next->expr1 : NULL; esrc = eblock ? eblock->next->expr2 : NULL; gfc_start_block (&block); @@ -3868,13 +3868,13 @@ gfc_trans_where (gfc_code * code) /* A simple "WHERE (cond) x = y" statement or block is dependence free if cond is not dependent upon writing x, and the source y is unaffected by the destination x. */ - if (!gfc_check_dependency (cblock->next->expr, - cblock->expr, 0) - && !gfc_check_dependency (cblock->next->expr, + if (!gfc_check_dependency (cblock->next->expr1, + cblock->expr1, 0) + && !gfc_check_dependency (cblock->next->expr1, cblock->next->expr2, 0)) return gfc_trans_where_3 (cblock, NULL); } - else if (!eblock->expr + else if (!eblock->expr1 && !eblock->block && eblock->next && eblock->next->op == EXEC_ASSIGN @@ -3890,22 +3890,22 @@ gfc_trans_where (gfc_code * code) are the same. In short, this is VERY conservative and this is needed because the two loops, required by the standard are coalesced in gfc_trans_where_3. */ - if (!gfc_check_dependency(cblock->next->expr, - cblock->expr, 0) - && !gfc_check_dependency(eblock->next->expr, - cblock->expr, 0) - && !gfc_check_dependency(cblock->next->expr, + if (!gfc_check_dependency(cblock->next->expr1, + cblock->expr1, 0) + && !gfc_check_dependency(eblock->next->expr1, + cblock->expr1, 0) + && !gfc_check_dependency(cblock->next->expr1, eblock->next->expr2, 1) - && !gfc_check_dependency(eblock->next->expr, + && !gfc_check_dependency(eblock->next->expr1, cblock->next->expr2, 1) - && !gfc_check_dependency(cblock->next->expr, + && !gfc_check_dependency(cblock->next->expr1, cblock->next->expr2, 1) - && !gfc_check_dependency(eblock->next->expr, + && !gfc_check_dependency(eblock->next->expr1, eblock->next->expr2, 1) - && !gfc_check_dependency(cblock->next->expr, - eblock->next->expr, 0) - && !gfc_check_dependency(eblock->next->expr, - cblock->next->expr, 0)) + && !gfc_check_dependency(cblock->next->expr1, + eblock->next->expr1, 0) + && !gfc_check_dependency(eblock->next->expr1, + cblock->next->expr1, 0)) return gfc_trans_where_3 (cblock, eblock); } } @@ -3971,7 +3971,7 @@ gfc_trans_allocate (gfc_code * code) gfc_start_block (&block); /* Either STAT= and/or ERRMSG is present. */ - if (code->expr || code->expr2) + if (code->expr1 || code->expr2) { tree gfc_int4_type_node = gfc_get_int_type (4); @@ -4006,7 +4006,7 @@ gfc_trans_allocate (gfc_code * code) fold_convert (TREE_TYPE (se.expr), tmp)); gfc_add_expr_to_block (&se.pre, tmp); - if (code->expr || code->expr2) + if (code->expr1 || code->expr2) { tmp = build1_v (GOTO_EXPR, error_label); parm = fold_build2 (NE_EXPR, boolean_type_node, @@ -4030,13 +4030,13 @@ gfc_trans_allocate (gfc_code * code) } /* STAT block. */ - if (code->expr) + if (code->expr1) { tmp = build1_v (LABEL_EXPR, error_label); gfc_add_expr_to_block (&block, tmp); gfc_init_se (&se, NULL); - gfc_conv_expr_lhs (&se, code->expr); + gfc_conv_expr_lhs (&se, code->expr1); tmp = convert (TREE_TYPE (se.expr), stat); gfc_add_modify (&block, se.expr, tmp); } @@ -4094,7 +4094,7 @@ gfc_trans_deallocate (gfc_code *code) /* Count the number of failed deallocations. If deallocate() was called with STAT= , then set STAT to the count. If deallocate was called with ERRMSG, then set ERRMG to a string. */ - if (code->expr || code->expr2) + if (code->expr1 || code->expr2) { tree gfc_int4_type_node = gfc_get_int_type (4); @@ -4155,7 +4155,7 @@ gfc_trans_deallocate (gfc_code *code) /* Keep track of the number of failed deallocations by adding stat of the last deallocation to the running total. */ - if (code->expr || code->expr2) + if (code->expr1 || code->expr2) { apstat = fold_build2 (PLUS_EXPR, TREE_TYPE (stat), astat, stat); gfc_add_modify (&se.pre, astat, apstat); @@ -4167,10 +4167,10 @@ gfc_trans_deallocate (gfc_code *code) } /* Set STAT. */ - if (code->expr) + if (code->expr1) { gfc_init_se (&se, NULL); - gfc_conv_expr_lhs (&se, code->expr); + gfc_conv_expr_lhs (&se, code->expr1); tmp = convert (TREE_TYPE (se.expr), astat); gfc_add_modify (&block, se.expr, tmp); } diff --git a/gcc/fortran/trans-types.c b/gcc/fortran/trans-types.c index 773550cf3d9..2cf59d38632 100644 --- a/gcc/fortran/trans-types.c +++ b/gcc/fortran/trans-types.c @@ -252,7 +252,7 @@ void init_c_interop_kinds (void) void gfc_init_kinds (void) { - int mode_loop; + unsigned int mode; int i_index, r_index, kind; bool saw_i4 = false, saw_i8 = false; bool saw_r4 = false, saw_r8 = false, saw_r16 = false; @@ -264,7 +264,7 @@ gfc_init_kinds (void) enum machine_mode mode = (enum machine_mode) mode_loop; int kind, bitsize; - if (!targetm.scalar_mode_supported_p (mode)) + if (!targetm.scalar_mode_supported_p ((enum machine_mode) mode)) continue; /* The middle end doesn't support constants larger than 2*HWI. @@ -310,17 +310,15 @@ gfc_init_kinds (void) /* Set the maximum integer kind. Used with at least BOZ constants. */ gfc_max_integer_kind = gfc_integer_kinds[i_index - 1].kind; - for (r_index = 0, mode_loop = MIN_MODE_FLOAT; - mode_loop <= MAX_MODE_FLOAT; - mode_loop++) + for (r_index = 0, mode = MIN_MODE_FLOAT; mode <= MAX_MODE_FLOAT; mode++) { - enum machine_mode mode = (enum machine_mode) mode_loop; - const struct real_format *fmt = REAL_MODE_FORMAT (mode); + const struct real_format *fmt = + REAL_MODE_FORMAT ((enum machine_mode) mode); int kind; if (fmt == NULL) continue; - if (!targetm.scalar_mode_supported_p (mode)) + if (!targetm.scalar_mode_supported_p ((enum machine_mode) mode)) continue; /* Only let float/double/long double go through because the fortran diff --git a/gcc/fortran/trans.c b/gcc/fortran/trans.c index 28cb60ab2ef..c842ea8dcb0 100644 --- a/gcc/fortran/trans.c +++ b/gcc/fortran/trans.c @@ -1056,6 +1056,7 @@ gfc_trans_code (gfc_code * code) { case EXEC_NOP: case EXEC_END_BLOCK: + case EXEC_END_PROCEDURE: res = NULL_TREE; break; diff --git a/gcc/gcc-plugin.h b/gcc/gcc-plugin.h index 96c867d4bc6..ba20b42475c 100644 --- a/gcc/gcc-plugin.h +++ b/gcc/gcc-plugin.h @@ -29,6 +29,7 @@ enum plugin_event PLUGIN_CXX_CP_PRE_GENERICIZE, /* Allows to see low level AST in C++ FE. */ PLUGIN_FINISH, /* Called before GCC exits. */ PLUGIN_INFO, /* Information about the plugin */ + PLUGIN_ATTRIBUTES, /* Called during attribute registration. */ PLUGIN_EVENT_LAST /* Dummy event used for indexing callback array. */ }; diff --git a/gcc/genopinit.c b/gcc/genopinit.c index 8e13d1ccdf4..f8cbf9549f8 100644 --- a/gcc/genopinit.c +++ b/gcc/genopinit.c @@ -198,15 +198,12 @@ static const char * const optabs[] = "optab_handler (movstrict_optab, $A)->insn_code = CODE_FOR_$(movstrict$a$)", "optab_handler (movmisalign_optab, $A)->insn_code = CODE_FOR_$(movmisalign$a$)", "optab_handler (storent_optab, $A)->insn_code = CODE_FOR_$(storent$a$)", - "optab_handler (cmp_optab, $A)->insn_code = CODE_FOR_$(cmp$a$)", - "optab_handler (tst_optab, $A)->insn_code = CODE_FOR_$(tst$a$)", "optab_handler (addcc_optab, $A)->insn_code = CODE_FOR_$(add$acc$)", - "bcc_gen_fctn[$C] = gen_$(b$c$)", - "setcc_gen_code[$C] = CODE_FOR_$(s$c$)", "movcc_gen_code[$A] = CODE_FOR_$(mov$acc$)", "optab_handler (cbranch_optab, $A)->insn_code = CODE_FOR_$(cbranch$a4$)", "optab_handler (cmov_optab, $A)->insn_code = CODE_FOR_$(cmov$a6$)", "optab_handler (cstore_optab, $A)->insn_code = CODE_FOR_$(cstore$a4$)", + "optab_handler (ctrap_optab, $A)->insn_code = CODE_FOR_$(ctrap$a4$)", "optab_handler (push_optab, $A)->insn_code = CODE_FOR_$(push$a1$)", "reload_in_optab[$A] = CODE_FOR_$(reload_in$a$)", "reload_out_optab[$A] = CODE_FOR_$(reload_out$a$)", diff --git a/gcc/gimplify.c b/gcc/gimplify.c index eb68fdf12c6..f67535e9859 100644 --- a/gcc/gimplify.c +++ b/gcc/gimplify.c @@ -3643,14 +3643,11 @@ static enum gimplify_status gimplify_init_constructor (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p, bool want_value, bool notify_temp_creation) { - tree object, new_ctor; - tree ctor = TREE_OPERAND (*expr_p, 1); - tree type = TREE_TYPE (ctor); + tree object, ctor, type; enum gimplify_status ret; VEC(constructor_elt,gc) *elts; - if (TREE_CODE (ctor) != CONSTRUCTOR) - return GS_UNHANDLED; + gcc_assert (TREE_CODE (TREE_OPERAND (*expr_p, 1)) == CONSTRUCTOR); if (!notify_temp_creation) { @@ -3661,8 +3658,10 @@ gimplify_init_constructor (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p, } object = TREE_OPERAND (*expr_p, 0); - new_ctor = optimize_compound_literals_in_ctor (ctor); - elts = CONSTRUCTOR_ELTS (new_ctor); + ctor = TREE_OPERAND (*expr_p, 1) = + optimize_compound_literals_in_ctor (TREE_OPERAND (*expr_p, 1)); + type = TREE_TYPE (ctor); + elts = CONSTRUCTOR_ELTS (ctor); ret = GS_ALL_DONE; switch (TREE_CODE (type)) diff --git a/gcc/graphite.c b/gcc/graphite.c index e106f480cbc..6b497a808f7 100644 --- a/gcc/graphite.c +++ b/gcc/graphite.c @@ -56,6 +56,13 @@ along with GCC; see the file COPYING3. If not see #include "gimple.h" #ifdef HAVE_cloog + +/* The CLooG header file is not -Wc++-compat ready as of 2009-05-11. + This #pragma should be removed when it is ready. */ +#if GCC_VERSION >= 4003 +#pragma GCC diagnostic warning "-Wc++-compat" +#endif + #include "cloog/cloog.h" #include "graphite.h" diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index fc3cbd65f61..a4324a59b9f 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -62,9 +62,6 @@ #ifndef HAVE_trap #define HAVE_trap 0 #endif -#ifndef HAVE_conditional_trap -#define HAVE_conditional_trap 0 -#endif #ifndef MAX_CONDITIONAL_EXECUTE #define MAX_CONDITIONAL_EXECUTE \ @@ -3043,7 +3040,8 @@ find_if_header (basic_block test_bb, int pass) && cond_exec_find_if_block (&ce_info)) goto success; - if (HAVE_trap && HAVE_conditional_trap + if (HAVE_trap + && optab_handler (ctrap_optab, word_mode)->insn_code != CODE_FOR_nothing && find_cond_trap (test_bb, then_edge, else_edge)) goto success; diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c index 91b082586b6..07b6f24c944 100644 --- a/gcc/ipa-cp.c +++ b/gcc/ipa-cp.c @@ -438,6 +438,7 @@ ipcp_cloning_candidate_p (struct cgraph_node *node) if (dump_file) fprintf (dump_file, "Not considering %s for cloning; no hot calls.\n", cgraph_node_name (node)); + return false; } if (dump_file) fprintf (dump_file, "Considering %s for cloning.\n", diff --git a/gcc/ipa-utils.h b/gcc/ipa-utils.h index 31d78374ff6..e70a01688e2 100644 --- a/gcc/ipa-utils.h +++ b/gcc/ipa-utils.h @@ -23,9 +23,6 @@ along with GCC; see the file COPYING3. If not see #include "tree.h" #include "cgraph.h" -/* Used for parsing attributes of asm code. */ -extern tree memory_identifier_string; - struct ipa_dfs_info { int dfn_number; int low_link; diff --git a/gcc/ira-conflicts.c b/gcc/ira-conflicts.c index 29c77c9be9f..56be23b21f3 100644 --- a/gcc/ira-conflicts.c +++ b/gcc/ira-conflicts.c @@ -248,12 +248,10 @@ get_dup_num (int op_num, bool use_commut_op_p) break; case 'p': - GO_IF_LEGITIMATE_ADDRESS (VOIDmode, op, win_p); + if (address_operand (op, VOIDmode)) + return -1; break; - - win_p: - return -1; - + case 'g': return -1; diff --git a/gcc/java/ChangeLog b/gcc/java/ChangeLog index f10c219b0d8..960e1144f91 100644 --- a/gcc/java/ChangeLog +++ b/gcc/java/ChangeLog @@ -1,3 +1,8 @@ +2009-05-12 Alexandre Oliva <aoliva@redhat.com> + + * Make-lang.in (GCJ): Renamed to... + (XGCJ): ... this. + 2009-04-27 Ian Lance Taylor <iant@google.com> * builtins.c (java_builtins): Add casts to enum type. diff --git a/gcc/java/Make-lang.in b/gcc/java/Make-lang.in index ab7d8b7a793..9f78c73eef2 100644 --- a/gcc/java/Make-lang.in +++ b/gcc/java/Make-lang.in @@ -44,10 +44,10 @@ JAVA_INSTALL_NAME := $(shell echo gcj|sed '$(program_transform_name)') JAVA_TARGET_INSTALL_NAME := $(target_noncanonical)-$(shell echo gcj|sed '$(program_transform_name)') -GCJ = gcj +XGCJ = gcj # Define the names for selecting java in LANGUAGES. -java: jc1$(exeext) $(GCJ)$(exeext) jvgenmain$(exeext) jcf-dump$(exeext) +java: jc1$(exeext) $(XGCJ)$(exeext) jvgenmain$(exeext) jcf-dump$(exeext) # Define the name of target independent tools to be installed in $(bindir) # Names are subject to changes @@ -62,17 +62,17 @@ jvspec.o: $(srcdir)/java/jvspec.c $(SYSTEM_H) coretypes.h $(TM_H) \ $(CXX) -x c++ -c $(ALL_CXXFLAGS) $(ALL_CPPFLAGS) $(DRIVER_DEFINES) \ $(INCLUDES) $(srcdir)/java/jvspec.c $(OUTPUT_OPTION)) -# Create the compiler driver for $(GCJ). -$(GCJ)$(exeext): $(GCC_OBJS) jvspec.o java/jcf-path.o version.o \ +# Create the compiler driver for $(XGCJ). +$(XGCJ)$(exeext): $(GCC_OBJS) jvspec.o java/jcf-path.o version.o \ prefix.o intl.o $(LIBDEPS) $(EXTRA_GCC_OBJS) $(CXX) $(ALL_CXXFLAGS) $(LDFLAGS) -o $@ $(GCC_OBJS) jvspec.o \ java/jcf-path.o prefix.o intl.o \ version.o $(EXTRA_GCC_OBJS) $(LIBS) -# Create a version of the $(GCJ) driver which calls the cross-compiler. -$(GCJ)-cross$(exeext): $(GCJ)$(exeext) - -rm -f $(GCJ)-cross$(exeext) - cp $(GCJ)$(exeext) $(GCJ)-cross$(exeext) +# Create a version of the $(XGCJ) driver which calls the cross-compiler. +$(XGCJ)-cross$(exeext): $(XGCJ)$(exeext) + -rm -f $(XGCJ)-cross$(exeext) + cp $(XGCJ)$(exeext) $(XGCJ)-cross$(exeext) java.srcextra: @@ -115,8 +115,8 @@ jvgenmain$(exeext): $(JVGENMAIN_OBJS) $(LIBDEPS) # # Build hooks: -java.all.cross: $(GCJ)-cross$(exeext) -java.start.encap: $(GCJ)$(exeext) +java.all.cross: $(XGCJ)-cross$(exeext) +java.start.encap: $(XGCJ)$(exeext) java.rest.encap: @@ -158,11 +158,11 @@ check-java-subtargets : # Install gcj as well as the target-independent tools. java.install-common: installdirs - -if [ -f $(GCJ)$(exeext) ]; then \ + -if [ -f $(XGCJ)$(exeext) ]; then \ rm -f $(DESTDIR)$(bindir)/$(JAVA_INSTALL_NAME)$(exeext); \ - $(INSTALL_PROGRAM) $(GCJ)$(exeext) $(DESTDIR)$(bindir)/$(JAVA_INSTALL_NAME)$(exeext); \ + $(INSTALL_PROGRAM) $(XGCJ)$(exeext) $(DESTDIR)$(bindir)/$(JAVA_INSTALL_NAME)$(exeext); \ chmod a+x $(DESTDIR)$(bindir)/$(JAVA_INSTALL_NAME)$(exeext); \ - if [ -f $(GCJ)-cross$(exeext) ]; then \ + if [ -f $(XGCJ)-cross$(exeext) ]; then \ true; \ else \ rm -f $(DESTDIR)$(bindir)/$(JAVA_TARGET_INSTALL_NAME)$(exeext); \ @@ -211,7 +211,7 @@ java.install-pdf: $(JAVA_PDFFILES) java.mostlyclean: -rm -f java/*$(objext) $(DEMANGLER_PROG) -rm -f java/*$(coverageexts) - -rm -f jc1$(exeext) $(GCJ)$(exeext) jvgenmain$(exeext) \ + -rm -f jc1$(exeext) $(XGCJ)$(exeext) jvgenmain$(exeext) \ jcf-dump$(exeext) s-java java.clean: java.distclean: diff --git a/gcc/mips-tdump.c b/gcc/mips-tdump.c index df902a6deb4..240e9e8b887 100644 --- a/gcc/mips-tdump.c +++ b/gcc/mips-tdump.c @@ -1116,7 +1116,7 @@ print_file_desc (FDR *fdp, int number) (fdp->fBigendian) ? "BIG" : "LITTLE"); printf (" Debug level = %-10s Language = %s\n", - glevel_to_string (fdp->glevel), + glevel_to_string ((glevel_t) fdp->glevel), lang_to_string((lang_t) fdp->lang)); printf (" Adr = 0x%08lx\n\n", (long) fdp->adr); diff --git a/gcc/mips-tfile.c b/gcc/mips-tfile.c index f8bb492b381..4bd716eb4b9 100644 --- a/gcc/mips-tfile.c +++ b/gcc/mips-tfile.c @@ -1939,8 +1939,8 @@ add_ext_symbol (EXTR *esym, int ifd) if (debug > 1) { long value = esym->asym.value; - const char *sc_str = sc_to_string (esym->asym.sc); - const char *st_str = st_to_string (esym->asym.st); + const char *sc_str = sc_to_string ((sc_t) esym->asym.sc); + const char *st_str = st_to_string ((st_t) esym->asym.st); fprintf (stderr, "\tesym\tv= %10ld, ifd= %2d, sc= %-12s", @@ -3475,7 +3475,8 @@ mark_stabs (const char *start ATTRIBUTE_UNUSED) stabs_seen = 1; (void) add_local_symbol (stabs_symbol, stabs_symbol + sizeof (stabs_symbol), - stNil, scInfo, -1, MIPS_MARK_STAB (0)); + (st_t) stNil, (sc_t) scInfo, -1, + MIPS_MARK_STAB (0)); } } @@ -3668,8 +3669,8 @@ parse_stabs_common (const char *string_start, /* start of string or NULL */ /* Traditionally, N_LBRAC and N_RBRAC are *not* relocated. */ if (code == (int) N_LBRAC || code == (int) N_RBRAC) { - sc = scNil; - st = stNil; + sc = (sc_t) scNil; + st = (st_t) stNil; } else { diff --git a/gcc/optabs.c b/gcc/optabs.c index e8f175505c8..d1c8e3a9d40 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -79,17 +79,6 @@ struct convert_optab_d convert_optab_table[COI_MAX]; /* Contains the optab used for each rtx code. */ optab code_to_optab[NUM_RTX_CODE + 1]; -/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...) - gives the gen_function to make a branch to test that condition. */ - -rtxfun bcc_gen_fctn[NUM_RTX_CODE]; - -/* Indexed by the rtx-code for a conditional (eg. EQ, LT,...) - gives the insn code to make a store-condition insn - to test that condition. */ - -enum insn_code setcc_gen_code[NUM_RTX_CODE]; - #ifdef HAVE_conditional_move /* Indexed by the machine mode, gives the insn code to make a conditional move insn. This is not indexed by the rtx-code like bcc_gen_fctn and @@ -105,23 +94,13 @@ enum insn_code movcc_gen_code[NUM_MACHINE_MODES]; enum insn_code vcond_gen_code[NUM_MACHINE_MODES]; enum insn_code vcondu_gen_code[NUM_MACHINE_MODES]; -/* The insn generating function can not take an rtx_code argument. - TRAP_RTX is used as an rtx argument. Its code is replaced with - the code to be used in the trap insn and all other fields are ignored. */ -static GTY(()) rtx trap_rtx; - -static void prepare_float_lib_cmp (rtx *, rtx *, enum rtx_code *, - enum machine_mode *, int *); +static void prepare_float_lib_cmp (rtx, rtx, enum rtx_code, rtx *, + enum machine_mode *); static rtx expand_unop_direct (enum machine_mode, optab, rtx, rtx, int); /* Debug facility for use in GDB. */ void debug_optab_libfuncs (void); -#ifndef HAVE_conditional_trap -#define HAVE_conditional_trap 0 -#define gen_conditional_trap(a,b) (gcc_unreachable (), NULL_RTX) -#endif - /* Prefixes for the current version of decimal floating point (BID vs. DPD) */ #if ENABLE_DECIMAL_BID_FORMAT #define DECIMAL_PREFIX "bid_" @@ -2295,12 +2274,12 @@ sign_expand_binop (enum machine_mode mode, optab uoptab, optab soptab, if (temp || methods == OPTAB_WIDEN) return temp; - /* Use the right width lib call if that exists. */ + /* Use the right width libcall if that exists. */ temp = expand_binop (mode, direct_optab, op0, op1, target, unsignedp, OPTAB_LIB); if (temp || methods == OPTAB_LIB) return temp; - /* Must widen and use a lib call, use either signed or unsigned. */ + /* Must widen and use a libcall, use either signed or unsigned. */ temp = expand_binop (mode, &wide_soptab, op0, op1, target, unsignedp, methods); if (temp != 0) @@ -3985,16 +3964,6 @@ can_compare_p (enum rtx_code code, enum machine_mode mode, { int icode; - if (optab_handler (cmp_optab, mode)->insn_code != CODE_FOR_nothing) - { - if (purpose == ccp_jump) - return bcc_gen_fctn[(int) code] != NULL; - else if (purpose == ccp_store_flag) - return setcc_gen_code[(int) code] != CODE_FOR_nothing; - else - /* There's only one cmov entry point, and it's allowed to fail. */ - return 1; - } if (purpose == ccp_jump && (icode = optab_handler (cbranch_optab, mode)->insn_code) != CODE_FOR_nothing && insn_data[icode].operand[0].predicate (test, mode)) @@ -4020,7 +3989,7 @@ can_compare_p (enum rtx_code code, enum machine_mode mode, *PMODE is the mode of the inputs (in case they are const_int). *PUNSIGNEDP nonzero says that the operands are unsigned; - this matters if they need to be widened. + this matters if they need to be widened (as given by METHODS). If they have mode BLKmode, then SIZE specifies the size of both operands. @@ -4033,17 +4002,20 @@ can_compare_p (enum rtx_code code, enum machine_mode mode, comparisons must have already been folded. */ static void -prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size, - enum machine_mode *pmode, int *punsignedp, - enum can_compare_purpose purpose) +prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size, + int unsignedp, enum optab_methods methods, + rtx *ptest, enum machine_mode *pmode) { enum machine_mode mode = *pmode; - rtx x = *px, y = *py; - int unsignedp = *punsignedp; - rtx libfunc; + rtx libfunc, test; + enum machine_mode cmp_mode; + enum mode_class mclass; - /* If we are inside an appropriately-short loop and we are optimizing, - force expensive constants into a register. */ + /* The other methods are not needed. */ + gcc_assert (methods == OPTAB_DIRECT || methods == OPTAB_WIDEN + || methods == OPTAB_LIB_WIDEN); + + /* If we are optimizing, force expensive constants into a register. */ if (CONSTANT_P (x) && optimize && (rtx_cost (x, COMPARE, optimize_insn_for_speed_p ()) > COSTS_N_INSNS (1))) @@ -4064,12 +4036,14 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size, /* Don't let both operands fail to indicate the mode. */ if (GET_MODE (x) == VOIDmode && GET_MODE (y) == VOIDmode) x = force_reg (mode, x); + if (mode == VOIDmode) + mode = GET_MODE (x) != VOIDmode ? GET_MODE (x) : GET_MODE (y); /* Handle all BLKmode compares. */ if (mode == BLKmode) { - enum machine_mode cmp_mode, result_mode; + enum machine_mode result_mode; enum insn_code cmp_code; tree length_type; rtx libfunc; @@ -4105,12 +4079,14 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size, size = convert_to_mode (cmp_mode, size, 1); emit_insn (GEN_FCN (cmp_code) (result, x, y, size, opalign)); - *px = result; - *py = const0_rtx; - *pmode = result_mode; + *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx); + *pmode = result_mode; return; } + if (methods != OPTAB_LIB && methods != OPTAB_LIB_WIDEN) + goto fail; + /* Otherwise call a library function, memcmp. */ libfunc = memcmp_libfunc; length_type = sizetype; @@ -4124,8 +4100,8 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size, XEXP (x, 0), Pmode, XEXP (y, 0), Pmode, size, cmp_mode); - *px = result; - *py = const0_rtx; + + *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, result, const0_rtx); *pmode = result_mode; return; } @@ -4140,22 +4116,58 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size, y = force_reg (mode, y); } - *px = x; - *py = y; if (GET_MODE_CLASS (mode) == MODE_CC) { - gcc_assert (can_compare_p (*pcomparison, CCmode, purpose)); + gcc_assert (can_compare_p (comparison, CCmode, ccp_jump)); + *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, x, y); return; } - else if (can_compare_p (*pcomparison, mode, purpose)) - return; - /* Handle a lib call just for the mode we are using. */ - libfunc = optab_libfunc (cmp_optab, mode); - if (libfunc && !SCALAR_FLOAT_MODE_P (mode)) + mclass = GET_MODE_CLASS (mode); + test = gen_rtx_fmt_ee (comparison, VOIDmode, x, y); + cmp_mode = mode; + do + { + enum insn_code icode; + icode = optab_handler (cbranch_optab, cmp_mode)->insn_code; + if (icode != CODE_FOR_nothing + && insn_data[icode].operand[0].predicate (test, VOIDmode)) + { + rtx last = get_last_insn (); + rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp); + rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp); + if (op0 && op1 + && insn_data[icode].operand[1].predicate + (op0, insn_data[icode].operand[1].mode) + && insn_data[icode].operand[2].predicate + (op1, insn_data[icode].operand[2].mode)) + { + XEXP (test, 0) = op0; + XEXP (test, 1) = op1; + *ptest = test; + *pmode = cmp_mode; + return; + } + delete_insns_since (last); + } + + if (methods == OPTAB_DIRECT || !CLASS_HAS_WIDER_MODES_P (mclass)) + break; + cmp_mode = GET_MODE_WIDER_MODE (cmp_mode); + } + while (cmp_mode != VOIDmode); + + if (methods != OPTAB_LIB_WIDEN) + goto fail; + + if (!SCALAR_FLOAT_MODE_P (mode)) { rtx result; + /* Handle a libcall just for the mode we are using. */ + libfunc = optab_libfunc (cmp_optab, mode); + gcc_assert (libfunc); + /* If we want unsigned, and this mode has a distinct unsigned comparison routine, use that. */ if (unsignedp) @@ -4177,22 +4189,28 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size, case. For unsigned comparisons always compare against 1 after biasing the unbiased result by adding 1. This gives us a way to represent LTU. */ - *px = result; - *pmode = word_mode; - *py = const1_rtx; + x = result; + y = const1_rtx; if (!TARGET_LIB_INT_CMP_BIASED) { - if (*punsignedp) - *px = plus_constant (result, 1); + if (unsignedp) + x = plus_constant (result, 1); else - *py = const0_rtx; + y = const0_rtx; } - return; + + *pmode = word_mode; + prepare_cmp_insn (x, y, comparison, NULL_RTX, unsignedp, methods, + ptest, pmode); } + else + prepare_float_lib_cmp (x, y, comparison, ptest, pmode); - gcc_assert (SCALAR_FLOAT_MODE_P (mode)); - prepare_float_lib_cmp (px, py, pcomparison, pmode, punsignedp); + return; + + fail: + *ptest = NULL_RTX; } /* Before emitting an insn with code ICODE, make sure that X, which is going @@ -4200,7 +4218,7 @@ prepare_cmp_insn (rtx *px, rtx *py, enum rtx_code *pcomparison, rtx size, WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and that it is accepted by the operand predicate. Return the new value. */ -static rtx +rtx prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode, enum machine_mode wider_mode, int unsignedp) { @@ -4219,71 +4237,22 @@ prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode, } /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know - we can do the comparison. - The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may - be NULL_RTX which indicates that only a comparison is to be generated. */ + we can do the branch. */ static void -emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode, - enum rtx_code comparison, int unsignedp, rtx label) +emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label) { - rtx test = gen_rtx_fmt_ee (comparison, mode, x, y); - enum mode_class mclass = GET_MODE_CLASS (mode); - enum machine_mode wider_mode = mode; - - /* Try combined insns first. */ - do - { - enum machine_mode optab_mode = mclass == MODE_CC ? CCmode : wider_mode; - enum insn_code icode; - PUT_MODE (test, wider_mode); - - if (label) - { - icode = optab_handler (cbranch_optab, optab_mode)->insn_code; - - if (icode != CODE_FOR_nothing - && insn_data[icode].operand[0].predicate (test, wider_mode)) - { - x = prepare_operand (icode, x, 1, mode, wider_mode, unsignedp); - y = prepare_operand (icode, y, 2, mode, wider_mode, unsignedp); - emit_jump_insn (GEN_FCN (icode) (test, x, y, label)); - return; - } - } - - /* Handle some compares against zero. */ - icode = optab_handler (tst_optab, optab_mode)->insn_code; - if (y == CONST0_RTX (mode) && icode != CODE_FOR_nothing) - { - x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp); - emit_insn (GEN_FCN (icode) (x)); - if (label) - emit_jump_insn (bcc_gen_fctn[(int) comparison] (label)); - return; - } - - /* Handle compares for which there is a directly suitable insn. */ - - icode = optab_handler (cmp_optab, optab_mode)->insn_code; - if (icode != CODE_FOR_nothing) - { - x = prepare_operand (icode, x, 0, mode, wider_mode, unsignedp); - y = prepare_operand (icode, y, 1, mode, wider_mode, unsignedp); - emit_insn (GEN_FCN (icode) (x, y)); - if (label) - emit_jump_insn (bcc_gen_fctn[(int) comparison] (label)); - return; - } - - if (!CLASS_HAS_WIDER_MODES_P (mclass)) - break; + enum machine_mode optab_mode; + enum mode_class mclass; + enum insn_code icode; - wider_mode = GET_MODE_WIDER_MODE (wider_mode); - } - while (wider_mode != VOIDmode); + mclass = GET_MODE_CLASS (mode); + optab_mode = (mclass == MODE_CC) ? CCmode : mode; + icode = optab_handler (cbranch_optab, optab_mode)->insn_code; - gcc_unreachable (); + gcc_assert (icode != CODE_FOR_nothing); + gcc_assert (insn_data[icode].operand[0].predicate (test, VOIDmode)); + emit_jump_insn (GEN_FCN (icode) (test, XEXP (test, 0), XEXP (test, 1), label)); } /* Generate code to compare X with Y so that the condition codes are @@ -4292,32 +4261,27 @@ emit_cmp_and_jump_insn_1 (rtx x, rtx y, enum machine_mode mode, ensure that the comparison RTL has the canonical form. UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they - need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select - the proper branch condition code. + need to be widened. UNSIGNEDP is also used to select the proper + branch condition code. If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y. MODE is the mode of the inputs (in case they are const_int). - COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will - be passed unchanged to emit_cmp_insn, then potentially converted into an - unsigned variant based on UNSIGNEDP to select a proper jump instruction. */ + COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). + It will be potentially converted into an unsigned variant based on + UNSIGNEDP to select a proper jump instruction. */ void emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size, enum machine_mode mode, int unsignedp, rtx label) { rtx op0 = x, op1 = y; + rtx test; /* Swap operands and condition to ensure canonical RTL. */ if (swap_commutative_operands_p (x, y)) { - /* If we're not emitting a branch, callers are required to pass - operands in an order conforming to canonical RTL. We relax this - for commutative comparisons so callers using EQ don't need to do - swapping by hand. */ - gcc_assert (label || (comparison == swap_condition (comparison))); - op0 = y, op1 = x; comparison = swap_condition (comparison); } @@ -4332,32 +4296,21 @@ emit_cmp_and_jump_insns (rtx x, rtx y, enum rtx_code comparison, rtx size, if (unsignedp) comparison = unsigned_condition (comparison); - prepare_cmp_insn (&op0, &op1, &comparison, size, &mode, &unsignedp, - ccp_jump); - emit_cmp_and_jump_insn_1 (op0, op1, mode, comparison, unsignedp, label); + prepare_cmp_insn (op0, op1, comparison, size, unsignedp, OPTAB_LIB_WIDEN, + &test, &mode); + emit_cmp_and_jump_insn_1 (test, mode, label); } -/* Like emit_cmp_and_jump_insns, but generate only the comparison. */ - -void -emit_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size, - enum machine_mode mode, int unsignedp) -{ - emit_cmp_and_jump_insns (x, y, comparison, size, mode, unsignedp, 0); -} /* Emit a library call comparison between floating point X and Y. COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */ static void -prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison, - enum machine_mode *pmode, int *punsignedp) +prepare_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison, + rtx *ptest, enum machine_mode *pmode) { - enum rtx_code comparison = *pcomparison; enum rtx_code swapped = swap_condition (comparison); enum rtx_code reversed = reverse_condition_maybe_unordered (comparison); - rtx x = *px; - rtx y = *py; enum machine_mode orig_mode = GET_MODE (x); enum machine_mode mode, cmp_mode; rtx value, target, insns, equiv; @@ -4467,11 +4420,8 @@ prepare_float_lib_cmp (rtx *px, rtx *py, enum rtx_code *pcomparison, || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode, comparison)) comparison = reversed_p ? EQ : NE; - *px = target; - *py = const0_rtx; + *ptest = gen_rtx_fmt_ee (comparison, VOIDmode, target, const0_rtx); *pmode = cmp_mode; - *pcomparison = comparison; - *punsignedp = 0; } /* Generate code to indirectly jump to a location given in the rtx LOC. */ @@ -4571,27 +4521,38 @@ emit_conditional_move (rtx target, enum rtx_code code, rtx op0, rtx op1, (op3, insn_data[icode].operand[3].mode)) op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3); - /* Everything should now be in the suitable form, so emit the compare insn - and then the conditional move. */ + /* Everything should now be in the suitable form. */ - comparison - = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX); + code = unsignedp ? unsigned_condition (code) : code; + comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1); - /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */ /* We can get const0_rtx or const_true_rtx in some circumstances. Just return NULL and let the caller figure out how best to deal with this situation. */ - if (GET_CODE (comparison) != code) + if (!COMPARISON_P (comparison)) return NULL_RTX; - insn = GEN_FCN (icode) (subtarget, comparison, op2, op3); + do_pending_stack_adjust (); + start_sequence (); + prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1), + GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN, + &comparison, &cmode); + if (!comparison) + insn = NULL_RTX; + else + insn = GEN_FCN (icode) (subtarget, comparison, op2, op3); /* If that failed, then give up. */ if (insn == 0) - return 0; + { + end_sequence (); + return 0; + } emit_insn (insn); - + insn = get_insns (); + end_sequence (); + emit_insn (insn); if (subtarget != target) convert_move (target, subtarget, 0); @@ -4699,27 +4660,38 @@ emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1, (op3, insn_data[icode].operand[3].mode)) op3 = copy_to_mode_reg (insn_data[icode].operand[3].mode, op3); - /* Everything should now be in the suitable form, so emit the compare insn - and then the conditional move. */ + /* Everything should now be in the suitable form. */ - comparison - = compare_from_rtx (op0, op1, code, unsignedp, cmode, NULL_RTX); + code = unsignedp ? unsigned_condition (code) : code; + comparison = simplify_gen_relational (code, VOIDmode, cmode, op0, op1); - /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */ /* We can get const0_rtx or const_true_rtx in some circumstances. Just return NULL and let the caller figure out how best to deal with this situation. */ - if (GET_CODE (comparison) != code) + if (!COMPARISON_P (comparison)) return NULL_RTX; - insn = GEN_FCN (icode) (subtarget, comparison, op2, op3); + do_pending_stack_adjust (); + start_sequence (); + prepare_cmp_insn (XEXP (comparison, 0), XEXP (comparison, 1), + GET_CODE (comparison), NULL_RTX, unsignedp, OPTAB_WIDEN, + &comparison, &cmode); + if (!comparison) + insn = NULL_RTX; + else + insn = GEN_FCN (icode) (subtarget, comparison, op2, op3); /* If that failed, then give up. */ if (insn == 0) - return 0; + { + end_sequence (); + return 0; + } emit_insn (insn); - + insn = get_insns (); + end_sequence (); + emit_insn (insn); if (subtarget != target) convert_move (target, subtarget, 0); @@ -6167,9 +6139,6 @@ init_optabs (void) libfunc_hash = htab_create_ggc (10, hash_libfunc, eq_libfunc, NULL); /* Start by initializing all tables to contain CODE_FOR_nothing. */ - for (i = 0; i < NUM_RTX_CODE; i++) - setcc_gen_code[i] = CODE_FOR_nothing; - #ifdef HAVE_conditional_move for (i = 0; i < NUM_MACHINE_MODES; i++) movcc_gen_code[i] = CODE_FOR_nothing; @@ -6247,12 +6216,16 @@ init_optabs (void) have_insn_for. */ init_optab (mov_optab, SET); init_optab (movstrict_optab, STRICT_LOW_PART); - init_optab (cmp_optab, COMPARE); + init_optab (cbranch_optab, COMPARE); + + init_optab (cmov_optab, UNKNOWN); + init_optab (cstore_optab, UNKNOWN); + init_optab (ctrap_optab, UNKNOWN); init_optab (storent_optab, UNKNOWN); + init_optab (cmp_optab, UNKNOWN); init_optab (ucmp_optab, UNKNOWN); - init_optab (tst_optab, UNKNOWN); init_optab (eq_optab, EQ); init_optab (ne_optab, NE); @@ -6308,9 +6281,6 @@ init_optabs (void) init_optab (isinf_optab, UNKNOWN); init_optab (strlen_optab, UNKNOWN); - init_optab (cbranch_optab, UNKNOWN); - init_optab (cmov_optab, UNKNOWN); - init_optab (cstore_optab, UNKNOWN); init_optab (push_optab, UNKNOWN); init_optab (reduc_smax_optab, UNKNOWN); @@ -6660,9 +6630,6 @@ init_optabs (void) gcov_flush_libfunc = init_one_libfunc ("__gcov_flush"); - if (HAVE_conditional_trap) - trap_rtx = gen_rtx_fmt_ee (EQ, VOIDmode, NULL_RTX, NULL_RTX); - /* Allow the target to add more libcalls or rename some, etc. */ targetm.init_libfuncs (); @@ -6726,43 +6693,45 @@ debug_optab_libfuncs (void) CODE. Return 0 on failure. */ rtx -gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED, rtx op1, - rtx op2 ATTRIBUTE_UNUSED, rtx tcode ATTRIBUTE_UNUSED) +gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode) { enum machine_mode mode = GET_MODE (op1); enum insn_code icode; rtx insn; - - if (!HAVE_conditional_trap) - return 0; + rtx trap_rtx; if (mode == VOIDmode) return 0; - icode = optab_handler (cmp_optab, mode)->insn_code; + icode = optab_handler (ctrap_optab, mode)->insn_code; if (icode == CODE_FOR_nothing) return 0; + /* Some targets only accept a zero trap code. */ + if (insn_data[icode].operand[3].predicate + && !insn_data[icode].operand[3].predicate (tcode, VOIDmode)) + return 0; + + do_pending_stack_adjust (); start_sequence (); - op1 = prepare_operand (icode, op1, 0, mode, mode, 0); - op2 = prepare_operand (icode, op2, 1, mode, mode, 0); - if (!op1 || !op2) + prepare_cmp_insn (op1, op2, code, NULL_RTX, false, OPTAB_DIRECT, + &trap_rtx, &mode); + if (!trap_rtx) + insn = NULL_RTX; + else + insn = GEN_FCN (icode) (trap_rtx, XEXP (trap_rtx, 0), XEXP (trap_rtx, 1), + tcode); + + /* If that failed, then give up. */ + if (insn == 0) { end_sequence (); return 0; } - emit_insn (GEN_FCN (icode) (op1, op2)); - PUT_CODE (trap_rtx, code); - gcc_assert (HAVE_conditional_trap); - insn = gen_conditional_trap (trap_rtx, tcode); - if (insn) - { - emit_insn (insn); - insn = get_insns (); - } + emit_insn (insn); + insn = get_insns (); end_sequence (); - return insn; } @@ -7035,9 +7004,9 @@ expand_bool_compare_and_swap (rtx mem, rtx old_val, rtx new_val, rtx target) emit_insn (seq); if (cc_reg) - return emit_store_flag (target, EQ, cc_reg, const0_rtx, VOIDmode, 0, 1); + return emit_store_flag_force (target, EQ, cc_reg, const0_rtx, VOIDmode, 0, 1); else - return emit_store_flag (target, EQ, subtarget, old_val, VOIDmode, 1, 1); + return emit_store_flag_force (target, EQ, subtarget, old_val, VOIDmode, 1, 1); } /* This is a helper function for the other atomic operations. This function diff --git a/gcc/optabs.h b/gcc/optabs.h index 1a449c62812..88eab0749c9 100644 --- a/gcc/optabs.h +++ b/gcc/optabs.h @@ -36,8 +36,7 @@ along with GCC; see the file COPYING3. If not see The `lib_call' slot is the name of the library function that can be used to perform the operation. - A few optabs, such as move_optab and cmp_optab, are used - by special code. */ + A few optabs, such as move_optab, are used by special code. */ struct optab_handlers { @@ -271,12 +270,9 @@ enum optab_index /* Test for infinite value */ OTI_isinf, - /* Compare insn; two operands. */ + /* Compare insn; two operands. Used only for libcalls. */ OTI_cmp, - /* Used only for libcalls for unsigned comparisons. */ OTI_ucmp, - /* tst insn; compare one operand against 0 */ - OTI_tst, /* Floating point comparison optabs - used primarily for libfuncs */ OTI_eq, @@ -290,10 +286,11 @@ enum optab_index /* String length */ OTI_strlen, - /* Combined compare & jump/store flags/move operations. */ + /* Combined compare & jump/move/store flags/trap operations. */ OTI_cbranch, OTI_cmov, OTI_cstore, + OTI_ctrap, /* Push instruction. */ OTI_push, @@ -484,7 +481,6 @@ extern struct optab_d optab_table[OTI_MAX]; #define cmp_optab (&optab_table[OTI_cmp]) #define ucmp_optab (&optab_table[OTI_ucmp]) -#define tst_optab (&optab_table[OTI_tst]) #define eq_optab (&optab_table[OTI_eq]) #define ne_optab (&optab_table[OTI_ne]) @@ -499,6 +495,8 @@ extern struct optab_d optab_table[OTI_MAX]; #define cbranch_optab (&optab_table[OTI_cbranch]) #define cmov_optab (&optab_table[OTI_cmov]) #define cstore_optab (&optab_table[OTI_cstore]) +#define ctrap_optab (&optab_table[OTI_ctrap]) + #define push_optab (&optab_table[OTI_push]) #define addcc_optab (&optab_table[OTI_addcc]) @@ -605,17 +603,6 @@ extern optab code_to_optab[NUM_RTX_CODE + 1]; typedef rtx (*rtxfun) (rtx); -/* Indexed by the rtx-code for a conditional (e.g. EQ, LT,...) - gives the gen_function to make a branch to test that condition. */ - -extern rtxfun bcc_gen_fctn[NUM_RTX_CODE]; - -/* Indexed by the rtx-code for a conditional (e.g. EQ, LT,...) - gives the insn code to make a store-condition insn - to test that condition. */ - -extern enum insn_code setcc_gen_code[NUM_RTX_CODE]; - #ifdef HAVE_conditional_move /* Indexed by the machine mode, gives the insn code to make a conditional move insn. */ @@ -723,10 +710,6 @@ extern rtx expand_copysign (rtx, rtx, rtx); extern void emit_unop_insn (int, rtx, rtx, enum rtx_code); extern bool maybe_emit_unop_insn (int, rtx, rtx, enum rtx_code); -/* Emit one rtl insn to compare two rtx's. */ -extern void emit_cmp_insn (rtx, rtx, enum rtx_code, rtx, enum machine_mode, - int); - /* An extra flag to control optab_for_tree_code's behavior. This is needed to distinguish between machines with a vector shift that takes a scalar for the shift amount vs. machines that take a vector for the shift amount. */ diff --git a/gcc/opts.c b/gcc/opts.c index 818acdf8f65..424250e4a6e 100644 --- a/gcc/opts.c +++ b/gcc/opts.c @@ -2063,6 +2063,7 @@ common_handle_option (size_t scode, const char *arg, int value, flag_pedantic_errors = pedantic = 1; break; + case OPT_fcse_skip_blocks: case OPT_floop_optimize: case OPT_frerun_loop_opt: case OPT_fstrength_reduce: diff --git a/gcc/passes.c b/gcc/passes.c index c1e537dc8fd..a050df3516e 100644 --- a/gcc/passes.c +++ b/gcc/passes.c @@ -595,13 +595,6 @@ init_optimization_passes (void) NEXT_PASS (pass_complete_unrolli); NEXT_PASS (pass_ccp); NEXT_PASS (pass_forwprop); - /* Ideally the function call conditional - dead code elimination phase can be delayed - till later where potentially more opportunities - can be found. Due to lack of good ways to - update VDEFs associated with the shrink-wrapped - calls, it is better to do the transformation - here where memory SSA is not built yet. */ NEXT_PASS (pass_call_cdce); /* pass_build_alias is a dummy pass that ensures that we execute TODO_rebuild_alias at this point. Re-building @@ -956,7 +949,6 @@ execute_function_todo (void *data) if (!(flags & TODO_update_address_taken)) execute_update_addresses_taken (true); compute_may_aliases (); - cfun->curr_properties |= PROP_alias; } if (flags & TODO_remove_unused_locals) diff --git a/gcc/plugin.c b/gcc/plugin.c index b62b1b89a07..9362e6a23e5 100644 --- a/gcc/plugin.c +++ b/gcc/plugin.c @@ -493,6 +493,7 @@ register_callback (const char *plugin_name, case PLUGIN_FINISH_TYPE: case PLUGIN_FINISH_UNIT: case PLUGIN_CXX_CP_PRE_GENERICIZE: + case PLUGIN_ATTRIBUTES: case PLUGIN_FINISH: { struct callback_info *new_callback; @@ -534,6 +535,7 @@ invoke_plugin_callbacks (enum plugin_event event, void *gcc_data) case PLUGIN_FINISH_TYPE: case PLUGIN_FINISH_UNIT: case PLUGIN_CXX_CP_PRE_GENERICIZE: + case PLUGIN_ATTRIBUTES: case PLUGIN_FINISH: { /* Iterate over every callback registered with this event and diff --git a/gcc/plugin.h b/gcc/plugin.h index c1f566ba80f..b610b23ed93 100644 --- a/gcc/plugin.h +++ b/gcc/plugin.h @@ -22,6 +22,8 @@ along with GCC; see the file COPYING3. If not see #include "gcc-plugin.h" +struct attribute_spec; + extern void add_new_plugin (const char *); extern void parse_plugin_arg_opt (const char *); extern void invoke_plugin_callbacks (enum plugin_event, void *); @@ -33,4 +35,8 @@ extern void print_plugins_versions (FILE *file, const char *indent); extern void print_plugins_help (FILE *file, const char *indent); extern void finalize_plugins (void); +/* In attribs.c. */ + +extern void register_attribute (const struct attribute_spec *attr); + #endif /* PLUGIN_H */ diff --git a/gcc/recog.c b/gcc/recog.c index baad154c448..70b0967f709 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -1253,11 +1253,15 @@ pop_operand (rtx op, enum machine_mode mode) int memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr) { +#ifdef GO_IF_LEGITIMATE_ADDRESS GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); return 0; win: return 1; +#else + return targetm.legitimate_address_p (mode, addr, 0); +#endif } /* Return 1 if OP is a valid memory reference with mode MODE, diff --git a/gcc/reload.c b/gcc/reload.c index 769de85d660..d0941209e93 100644 --- a/gcc/reload.c +++ b/gcc/reload.c @@ -2135,11 +2135,15 @@ hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x) int strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr) { +#ifdef GO_IF_LEGITIMATE_ADDRESS GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); return 0; win: return 1; +#else + return targetm.legitimate_address_p (mode, addr, 1); +#endif } /* Like rtx_equal_p except that it allows a REG and a SUBREG to match diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index e2b1673a8dd..667b5b5c898 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -1739,18 +1739,6 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, break; case COMPARE: -#ifdef HAVE_cc0 - /* Convert (compare FOO (const_int 0)) to FOO unless we aren't - using cc0, in which case we want to leave it as a COMPARE - so we can distinguish it from a register-register-copy. - - In IEEE floating point, x-0 is not the same as x. */ - if (!(HONOR_SIGNED_ZEROS (mode) - && HONOR_SIGN_DEPENDENT_ROUNDING (mode)) - && trueop1 == CONST0_RTX (mode)) - return op0; -#endif - /* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */ if (((GET_CODE (op0) == GT && GET_CODE (op1) == LT) || (GET_CODE (op0) == GTU && GET_CODE (op1) == LTU)) @@ -3815,8 +3803,8 @@ simplify_relational_operation (enum rtx_code code, enum machine_mode mode, /* If op0 is a compare, extract the comparison arguments from it. */ if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) - return simplify_relational_operation (code, mode, VOIDmode, - XEXP (op0, 0), XEXP (op0, 1)); + return simplify_gen_relational (code, mode, VOIDmode, + XEXP (op0, 0), XEXP (op0, 1)); if (GET_MODE_CLASS (cmp_mode) == MODE_CC || CC0_P (op0)) diff --git a/gcc/store-motion.c b/gcc/store-motion.c index 5dabd1a8f20..64260ac165f 100644 --- a/gcc/store-motion.c +++ b/gcc/store-motion.c @@ -39,7 +39,6 @@ along with GCC; see the file COPYING3. If not see #include "expr.h" #include "except.h" #include "ggc.h" -#include "params.h" #include "intl.h" #include "timevar.h" #include "tree-pass.h" diff --git a/gcc/target-def.h b/gcc/target-def.h index 0039f9a438f..99c74e406f8 100644 --- a/gcc/target-def.h +++ b/gcc/target-def.h @@ -488,6 +488,7 @@ #define TARGET_COMMUTATIVE_P hook_bool_const_rtx_commutative_p #define TARGET_LEGITIMIZE_ADDRESS default_legitimize_address #define TARGET_DELEGITIMIZE_ADDRESS hook_rtx_rtx_identity +#define TARGET_LEGITIMATE_ADDRESS_P default_legitimate_address_p #define TARGET_USE_BLOCKS_FOR_CONSTANT_P hook_bool_mode_const_rtx_false #define TARGET_MIN_ANCHOR_OFFSET 0 #define TARGET_MAX_ANCHOR_OFFSET 0 @@ -872,6 +873,7 @@ TARGET_COMMUTATIVE_P, \ TARGET_LEGITIMIZE_ADDRESS, \ TARGET_DELEGITIMIZE_ADDRESS, \ + TARGET_LEGITIMATE_ADDRESS_P, \ TARGET_USE_BLOCKS_FOR_CONSTANT_P, \ TARGET_MIN_ANCHOR_OFFSET, \ TARGET_MAX_ANCHOR_OFFSET, \ diff --git a/gcc/target.h b/gcc/target.h index b6935264e91..43bdfc41ada 100644 --- a/gcc/target.h +++ b/gcc/target.h @@ -616,6 +616,9 @@ struct gcc_target /* Given an address RTX, undo the effects of LEGITIMIZE_ADDRESS. */ rtx (* delegitimize_address) (rtx); + /* Given an address RTX, say whether it is valid. */ + bool (* legitimate_address_p) (enum machine_mode, rtx, bool); + /* True if the given constant can be put into an object_block. */ bool (* use_blocks_for_constant_p) (enum machine_mode, const_rtx); diff --git a/gcc/targhooks.c b/gcc/targhooks.c index 1dd6c7c6de8..d5c80c29aad 100644 --- a/gcc/targhooks.c +++ b/gcc/targhooks.c @@ -68,6 +68,22 @@ along with GCC; see the file COPYING3. If not see #include "recog.h" +bool +default_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, + rtx addr ATTRIBUTE_UNUSED, + bool strict ATTRIBUTE_UNUSED) +{ +#ifdef GO_IF_LEGITIMATE_ADDRESS + /* Defer to the old implementation using a goto. */ + if (strict) + return strict_memory_address_p (mode, addr); + else + return memory_address_p (mode, addr); +#else + gcc_unreachable (); +#endif +} + void default_external_libcall (rtx fun ATTRIBUTE_UNUSED) { diff --git a/gcc/targhooks.h b/gcc/targhooks.h index cfd18dc48fa..42dff8263ec 100644 --- a/gcc/targhooks.h +++ b/gcc/targhooks.h @@ -18,6 +18,8 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ +extern bool default_legitimate_address_p (enum machine_mode, rtx, bool); + extern void default_external_libcall (rtx); extern rtx default_legitimize_address (rtx, rtx, enum machine_mode); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ca5cf9f7cc9..2733cb52dfd 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,112 @@ +2009-05-14 Ian Lance Taylor <iant@google.com> + + * gcc.dg/Wcxx-compat-9.c: New testcase. + +2009-05-14 Janus Weil <janus@gcc.gnu.org> + + PR fortran/39996 + * gfortran.dg/func_decl_2.f90: Modified (replacing warnings by errors). + * gfortran.dg/duplicate_type_2.f90: Ditto. + * gfortran.dg/duplicate_type_3.f90: New. + +2009-05-14 Laurent GUERBY <laurent@guerby.net> + + * ada/acats/tests/c3/c38202a.ada: Use Impdef. + * ada/acats/tests/c5/c59002c.ada: Likewise. + +2009-05-13 Taras Glek <tglek@mozilla.com> + + * g++.dg/plugin/attribute_plugin-test-1.C Testcase input for custom attributes and decl smashing + * g++.dg/plugin/attribute_plugin.c Testcase plugin to test user attributes + * g++.dg/plugin/dumb_plugin.c Fixed typo + * g++.dg/plugin/plugin.exp Added attribute_plugin test + +2009-05-14 Jakub Jelinek <jakub@redhat.com> + + PR fortran/39865 + * gfortran.dg/pr39865.f90: New test. + * gfortran.dg/hollerith.f90: Don't expect errors for CHARACTER + arrays in FMT=. + * gfortran.dg/hollerith_f95.f90: Likewise. + * gfortran.dg/hollerith6.f90: New test. + * gfortran.dg/hollerith7.f90: New test. + +2009-05-14 Manuel Lopez-Ibanez <manu@gcc.gnu.org> + + PR cpp/36674 + * gcc.dg/cpp/pr36674.i: New. + +2009-05-14 Ben Elliston <bje@au.ibm.com> + + PR middle-end/40035 + * gcc.c-torture/compile/pr40035.c: New test. + +2009-05-13 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> + + * gcc.target/i386/pr39543-2.c: Skip if ilp32 && pic. + +2009-05-12 Tobias Burnus <burnus@net-b.de> + + PR fortran/40110 + * gfortran.dg/bind_c_usage_18.f90: Change dg-error into dg-warning. + * gfortran.dg/c_kind_tests_2.f03: Ditto. + * gfortran.dg/interop_params.f03: Ditto. + +2009-05-12 Jan Hubicka <jh@suse.cz> + + * gcc.dg/tree-ssa/loop-36.c: Reduce amount of iterations to 2 so unrolling + still happens. + * gcc.dg/ipa/ipacost-1.c: Prevent inlining + * gcc.dg/ipa/ipacost-2.c: Likewise. + * gcc.dg/vect/slp-3.c: Loop is no longer unrolled. + +2009-05-12 David Billinghurst <billingd@gcc.gnu.org> + + * gfortran.dg/default_format_1.f90: XFAIL on cygwin. + +2009-05-12 David Billinghurst <billingd@gcc.gnu.org> + + * lib/target-supports.exp (check_profiling_available): Return + false for -p on *-*-cygwin* targets. + +2009-05-11 H.J. Lu <hongjiu.lu@intel.com> + + PR tree-optimization/38632 + * g++.dg/tree-ssa/pr38632.C: New. + +2009-05-11 Jan Hubicka <jh@suse.cz> + + * gcc.dg/tree-ssa/pr21829.c: Simplify matching since + we now optimize better. + * gcc.dg/Wunreachable-8.c: Bogus warnings now come + out at different places. + * gcc.dg/vect/vect-92.c: Increase loop iteration count to prevent + unroling. + * gcc.dg/vect/vect-76.c: Likewise. + * gcc.dg/vect/vect-70.c: Likewise. + * gcc.dg/vect/vect-66.c: Likewise. + * gcc.dg/vect/no-section-anchors-vect-66.c: Likewise. + * gcc.dg/vect/slp-3.c: One of loops gets now fully unrolled. + +2009-05-11 H.J. Lu <hongjiu.lu@intel.com> + + PR middle-end/40080 + * gcc.c-torture/compile/pr40080.c: New. + +2009-05-11 Paolo Bonzini <bonzini@gnu.org> + + * gcc.c-torture/compile/pr40026.c: New testcase. + +2009-05-11 Janus Weil <janus@gcc.gnu.org> + + PR fortran/40089 + * gfortran.dg/proc_ptr_comp_7.f90: New. + +2009-05-11 Ira Rosen <irar@il.ibm.com> + + PR tree-optimization/40074 + * gcc.dg/vect/pr40074.c: New test. + 2009-05-10 Ian Lance Taylor <iant@google.com> * gcc.dg/Wcxx-compat-7.c: New testcase. diff --git a/gcc/testsuite/ada/acats/tests/c3/c38202a.ada b/gcc/testsuite/ada/acats/tests/c3/c38202a.ada index e0b3b856476..d0350fc1fc9 100644 --- a/gcc/testsuite/ada/acats/tests/c3/c38202a.ada +++ b/gcc/testsuite/ada/acats/tests/c3/c38202a.ada @@ -30,6 +30,7 @@ -- AH 9/12/86 -- EDS 7/14/98 AVOID OPTIMIZATION +with Impdef; WITH REPORT; USE REPORT; PROCEDURE C38202A IS BEGIN @@ -84,7 +85,7 @@ BEGIN P.GO_ON; ACCEPT TSK_DONE; WHILE (NOT P'TERMINATED AND COUNTER <= 3) LOOP - DELAY 10.0; + DELAY 10.0 * Impdef.One_Second; COUNTER := COUNTER + 1; END LOOP; @@ -166,7 +167,7 @@ BEGIN F1.ALL.GO_ON; ACCEPT TSK_DONE; WHILE (NOT F1'TERMINATED AND COUNTER <= 3) LOOP - DELAY 10.0; + DELAY 10.0 * Impdef.One_Second; COUNTER := COUNTER + 1; END LOOP; diff --git a/gcc/testsuite/ada/acats/tests/c5/c59002c.ada b/gcc/testsuite/ada/acats/tests/c5/c59002c.ada index a81c1c1e9ce..cc01a7e6c3a 100644 --- a/gcc/testsuite/ada/acats/tests/c5/c59002c.ada +++ b/gcc/testsuite/ada/acats/tests/c5/c59002c.ada @@ -33,6 +33,7 @@ -- SPS 12/13/82 -- PWN 11/30/94 REMOVED PRAGMA PRIORITY INSTANCES FOR ADA 9X. +with Impdef; WITH REPORT; WITH SYSTEM; USE SYSTEM; @@ -64,7 +65,7 @@ BEGIN BEGIN WHILE E2'COUNT <= 0 LOOP - DELAY 1.0 ; + DELAY 1.0 * Impdef.One_Second; END LOOP; SELECT @@ -76,7 +77,7 @@ BEGIN GOTO L123 ; FAILED( "'GOTO' NOT OBEYED (1)" ); OR - DELAY 10.0 ; + DELAY 10.0 * Impdef.One_Second; FAILED( "DELAY ALTERNATIVE SELECTED (1)" ); END SELECT; @@ -116,7 +117,7 @@ BEGIN FAILED( " E2 ACCEPTED; NO ENTRY CALL (2)" ); END ; OR - DELAY 10.0 ; + DELAY 10.0 * Impdef.One_Second; GOTO L321 ; FAILED( "'GOTO' NOT OBEYED (2)" ); END SELECT; diff --git a/gcc/testsuite/g++.dg/plugin/attribute_plugin-test-1.C b/gcc/testsuite/g++.dg/plugin/attribute_plugin-test-1.C new file mode 100644 index 00000000000..abb1328670a --- /dev/null +++ b/gcc/testsuite/g++.dg/plugin/attribute_plugin-test-1.C @@ -0,0 +1,16 @@ +// { dg-warning "Callback to register attributes" } + +void normal_func (char c, char c2); +void normal_func (char __attribute__((user("param"))) c, char); +void normal_func (char c, char __attribute__((user("param"))) c2) +{ +} // { dg-warning "attribute 'user' on param 'c' of function normal_func" } +// { dg-warning "attribute 'user' on param 'c2' of function normal_func" "" { target *-*-* } 7 } + +class Foo { + void method (char __attribute__((user("param"))) c); +}; + +void Foo::method(char c) +{ +} // { dg-warning "attribute 'user' on param 'c' of function method" } diff --git a/gcc/testsuite/g++.dg/plugin/attribute_plugin.c b/gcc/testsuite/g++.dg/plugin/attribute_plugin.c new file mode 100644 index 00000000000..d071762102b --- /dev/null +++ b/gcc/testsuite/g++.dg/plugin/attribute_plugin.c @@ -0,0 +1,66 @@ +/* Demonstrates how to add custom attributes */ + +#include <stdlib.h> +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tree.h" +#include "tree-pass.h" +#include "intl.h" +#include "gcc-plugin.h" + +/* Attribute handler callback */ + +static tree +handle_user_attribute (tree *node, tree name, tree args, + int flags, bool *no_add_attrs) +{ + return NULL_TREE; +} + +/* Attribute definition */ + +static struct attribute_spec user_attr = + { "user", 1, 1, false, false, false, handle_user_attribute }; + +/* Plugin callback called during attribute registration */ + +static void +register_attributes (void *event_data, void *data) +{ + warning (0, G_("Callback to register attributes")); + register_attribute (&user_attr); +} + +/* Callback function to invoke before the function body is genericized. */ + +void +handle_pre_generic (void *event_data, void *data) +{ + tree fndecl = (tree) event_data; + tree arg; + for (arg = DECL_ARGUMENTS(fndecl); arg; arg = TREE_CHAIN (arg)) { + tree attr; + for (attr = DECL_ATTRIBUTES (arg); attr; attr = TREE_CHAIN (attr)) { + tree attrname = TREE_PURPOSE (attr); + tree attrargs = TREE_VALUE (attr); + warning (0, G_("attribute '%s' on param '%s' of function %s"), + IDENTIFIER_POINTER (attrname), + IDENTIFIER_POINTER (DECL_NAME (arg)), + IDENTIFIER_POINTER (DECL_NAME (fndecl)) + ); + } + } +} + +int +plugin_init (const char *plugin_name, + struct plugin_gcc_version *version, + int argc, struct plugin_argument *argv) +{ + register_callback (plugin_name, PLUGIN_CXX_CP_PRE_GENERICIZE, + handle_pre_generic, NULL); + + register_callback (plugin_name, PLUGIN_ATTRIBUTES, register_attributes, NULL); + return 0; +} diff --git a/gcc/testsuite/g++.dg/plugin/dumb_plugin.c b/gcc/testsuite/g++.dg/plugin/dumb_plugin.c index 0c62f89e109..839dc2b1c8a 100644 --- a/gcc/testsuite/g++.dg/plugin/dumb_plugin.c +++ b/gcc/testsuite/g++.dg/plugin/dumb_plugin.c @@ -21,7 +21,7 @@ handle_struct (void *event_data, void *data) IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type)))); } -/* Callback function to invoke before the program is genericized. */ +/* Callback function to invoke before the function body is genericized. */ void handle_pre_generic (void *event_data, void *data) diff --git a/gcc/testsuite/g++.dg/plugin/plugin.exp b/gcc/testsuite/g++.dg/plugin/plugin.exp index e1f6d89ae28..eb019986ffe 100644 --- a/gcc/testsuite/g++.dg/plugin/plugin.exp +++ b/gcc/testsuite/g++.dg/plugin/plugin.exp @@ -47,6 +47,7 @@ load_lib plugin-support.exp # Specify the plugin source file and the associated test files in a list. # plugin_test_list={ {plugin1 test1 test2 ...} {plugin2 test1 ...} ... } set plugin_test_list [list \ + { attribute_plugin.c attribute_plugin-test-1.C } \ { selfassign.c self-assign-test-1.C self-assign-test-2.C self-assign-test-3.C } \ { dumb_plugin.c dumb-plugin-test-1.C } ] diff --git a/gcc/testsuite/g++.dg/tree-ssa/pr38632.C b/gcc/testsuite/g++.dg/tree-ssa/pr38632.C new file mode 100644 index 00000000000..04fca228021 --- /dev/null +++ b/gcc/testsuite/g++.dg/tree-ssa/pr38632.C @@ -0,0 +1,22 @@ +// { dg-do compile } +// { dg-require-effective-target pthread } +// { dg-options "-O -ftree-parallelize-loops=2" } + +void foo(); + +void bar(int n, char *p) +{ + try + { + foo(); + ++n; + foo(); + for (int i = 0; i < n-1; ++i) + p[i] = 0; + } + catch (...) + { + for (int i = 0; i < n; ++i) + p[i] = 0; + } +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr40026.c b/gcc/testsuite/gcc.c-torture/compile/pr40026.c new file mode 100644 index 00000000000..0d08f0dc8ac --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr40026.c @@ -0,0 +1,15 @@ +typedef struct { + unsigned long bits; +} S; +struct T { + S span; + int flags; +}; + +struct T f(int x) +{ + return (struct T) { + .span = (S) { 0UL }, + .flags = (x ? 256 : 0), + }; +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr40035.c b/gcc/testsuite/gcc.c-torture/compile/pr40035.c new file mode 100644 index 00000000000..1bf1a7c4c41 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr40035.c @@ -0,0 +1,20 @@ +typedef __SIZE_TYPE__ size_t; +void *memmove (void *dest, const void *src, size_t count); +size_t strlen (const char *s); + +int +foo (char *param, char *val) +{ + if (val) + { + if (val == param + strlen (param) + 1) + val[-1] = '='; + else if (val == param + strlen (param) + 2) + { + val[-2] = '='; + memmove (val - 1, val, strlen (val) + 1); + val--; + } + } + return 0; +} diff --git a/gcc/testsuite/gcc.c-torture/compile/pr40080.c b/gcc/testsuite/gcc.c-torture/compile/pr40080.c new file mode 100644 index 00000000000..e36f14273e8 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr40080.c @@ -0,0 +1,44 @@ +extern void *ff(void*,int); + +struct lpgl { struct lpgl *next; }; +struct lpgd { struct lpgl *first; }; + +typedef int (*xfn)( ); +static void xDP_IF_EnumGroupsInGroup ( void *a, int b, xfn fn) +{ + struct lpgd *lpGData; + struct lpgl *lpGList; + + if( ( lpGData = ff( a, b ) ) == ((void *)0) ) + return; + + if( lpGData->first == ((void *)0) ) + return; + lpGList = lpGData->first; + + for( ;; ) { + if( !(*fn)( ) ) + return; + if( lpGList->next == ((void *)0) ) + break; + lpGList = lpGList->next; + } + return; +} + + +static int +xcbDeletePlayerFromAllGroups() { + xDP_IF_EnumGroupsInGroup(0, 0, 0); + return 1; +} + +void xDP_IF_EnumGroups( xfn fn) { + xDP_IF_EnumGroupsInGroup( 0, 0, fn); +} + +static void xDP_IF_DestroyPlayer () { + xDP_IF_EnumGroups( xcbDeletePlayerFromAllGroups); +} + +void* foo=xDP_IF_DestroyPlayer; diff --git a/gcc/testsuite/gcc.dg/Wcxx-compat-9.c b/gcc/testsuite/gcc.dg/Wcxx-compat-9.c new file mode 100644 index 00000000000..8a3867c11c9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/Wcxx-compat-9.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-Wc++-compat" } */ + +enum e { FIRST, LAST }; + +extern void f2 (enum e); + +void +f1 () +{ + enum e v; + + for (v = FIRST; v < LAST; ++v) /* { dg-warning "invalid in C\[+\]\[+\]" } */ + f2 (v); + for (v = FIRST; v < LAST; v++) /* { dg-warning "invalid in C\[+\]\[+\]" } */ + f2 (v); + for (v = LAST; v > FIRST; --v) /* { dg-warning "invalid in C\[+\]\[+\]" } */ + f2 (v); + for (v = LAST; v > FIRST; v--) /* { dg-warning "invalid in C\[+\]\[+\]" } */ + f2 (v); +} diff --git a/gcc/testsuite/gcc.dg/Wunreachable-2.c b/gcc/testsuite/gcc.dg/Wunreachable-2.c index 8242441b0be..55a8f9cca01 100644 --- a/gcc/testsuite/gcc.dg/Wunreachable-2.c +++ b/gcc/testsuite/gcc.dg/Wunreachable-2.c @@ -9,8 +9,8 @@ void bar (void) { int i; - for (i = 0; i < 2; i++) - if (! foo (a[i])) + for (i = 0; i < 2; i++) /* { dg-bogus "will never be executed" "" { xfail *-*-* } } */ + if (! foo (a[i])) /* { dg-bogus "will never be executed" "" { xfail *-*-* } } */ return; baz (); /* { dg-bogus "will never be executed" } */ diff --git a/gcc/testsuite/gcc.dg/Wunreachable-8.c b/gcc/testsuite/gcc.dg/Wunreachable-8.c index 81254ba3b2a..1a13d64243e 100644 --- a/gcc/testsuite/gcc.dg/Wunreachable-8.c +++ b/gcc/testsuite/gcc.dg/Wunreachable-8.c @@ -4,7 +4,7 @@ float Factorial(float X) { float val = 1.0; int k,j; - for (k=1; k < 5; k++) + for (k=1; k < 5; k++) /* { dg-bogus "will never be executed" "" { xfail *-*-* } } */ { val += 1.0; /* { dg-bogus "will never be executed" "" { xfail *-*-* } } */ } diff --git a/gcc/testsuite/gcc.dg/cpp/pr36674.i b/gcc/testsuite/gcc.dg/cpp/pr36674.i new file mode 100644 index 00000000000..9362d5a4080 --- /dev/null +++ b/gcc/testsuite/gcc.dg/cpp/pr36674.i @@ -0,0 +1,12 @@ +/* PR cpp/36674 #include location is offset by one row in errors from preprocessed files */ +/* { dg-do compile } */ +/* { dg-options "-fshow-column" } */ +# 1 "gcc/testsuite/gcc.dg/pr36674.c" +# 1 "<built-in>" +# 1 "<command-line>" +# 1 "gcc/testsuite/gcc.dg/pr36674.c" +# 1 "gcc/testsuite/gcc.dg/pr36674.h" 1 +not_declared_yet(); +# 1 "gcc/testsuite/gcc.dg/pr36674.c" 2 +/* { dg-message "file included from \[^\n\]*pr36674.c:1:" "correct include line" { target *-*-* } 0 } */ +/* { dg-message "pr36674.h:1:1: warning: data definition has no type or storage class" "correct warning" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.dg/ipa/ipacost-1.c b/gcc/testsuite/gcc.dg/ipa/ipacost-1.c index 1c75c6cfde5..d91546899ea 100644 --- a/gcc/testsuite/gcc.dg/ipa/ipacost-1.c +++ b/gcc/testsuite/gcc.dg/ipa/ipacost-1.c @@ -46,6 +46,8 @@ i_can_not_be_propagated_fully2 (int *a) main() { i_can_be_propagated_fully2 (array); + i_can_be_propagated_fully2 (array); + i_can_not_be_propagated_fully2 (array); i_can_not_be_propagated_fully2 (array); } diff --git a/gcc/testsuite/gcc.dg/ipa/ipacost-2.c b/gcc/testsuite/gcc.dg/ipa/ipacost-2.c index 46db85fde3e..958059c73e6 100644 --- a/gcc/testsuite/gcc.dg/ipa/ipacost-2.c +++ b/gcc/testsuite/gcc.dg/ipa/ipacost-2.c @@ -47,6 +47,8 @@ i_can_not_be_propagated_fully2 (int *a) main() { i_can_be_propagated_fully2 (array); + i_can_be_propagated_fully2 (array); + i_can_not_be_propagated_fully2 (array); i_can_not_be_propagated_fully2 (array); } @@ -54,7 +56,7 @@ main() /* { dg-final { scan-ipa-dump-times "versioned function i_can_be_propagated_fully " 1 "cp" } } */ /* { dg-final { scan-ipa-dump-times "versioned function i_can_not_be_propagated_fully2" 1 "cp" } } */ /* { dg-final { scan-ipa-dump-times "versioned function i_can_not_be_propagated_fully " 1 "cp" } } */ -/* { dg-final { scan-tree-dump-not "i_can_be_propagated" "optimized" } } */ -/* { dg-final { scan-tree-dump-not "i_can_be_propagated" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "i_can_be_propagated_fully \\(" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "i_can_be_propagated_fully2 \\(" "optimized" } } */ /* { dg-final { cleanup-ipa-dump "cp" } } */ /* { dg-final { cleanup-tree-dump "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/loop-36.c b/gcc/testsuite/gcc.dg/tree-ssa/loop-36.c index 0af4d534a7f..9e917376581 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/loop-36.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/loop-36.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fdump-tree-dce2" } */ -struct X { float array[4]; }; +struct X { float array[2]; }; struct X a,b; @@ -9,9 +9,9 @@ float foobar () { float s = 0; unsigned int d; struct X c; - for (d=0; d<4; ++d) + for (d=0; d<2; ++d) c.array[d] = a.array[d] * b.array[d]; - for (d=0; d<4; ++d) + for (d=0; d<2; ++d) s+=c.array[d]; return s; } diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr21829.c b/gcc/testsuite/gcc.dg/tree-ssa/pr21829.c index 6b5c4bbf1ce..c95714ab9fb 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr21829.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr21829.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-optimized -fdump-tree-cddce2" } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ int test(int v) { @@ -16,33 +16,7 @@ int test(int v) return x; } -/* This should be optimized to +/* This should be unrolled and optimized into conditional set of return value "v < 0". */ - if (v <= 0) goto <L1>; else goto <L3>; - - <L1>:; - - # x_1 = PHI <0(3), 1(1)>; - <L3>:; - return x_1; - - retaining only a single conditional. This doesn't work as nobody - combines the two tests - - if (v < 0) goto <bb 4>; else goto <bb 3>; - - <bb 3>: - - if (v <= 0) goto <bb 4>; else goto <bb 5>; - - this late in the game. tree-ssa-ifcombine.c would do it if we would - unroll the loop during early loop unrolling though. - - For now vrp2 does all the needed folding and threading and cddce2 - provides a nice IL to scan. */ - -/* { dg-final { scan-tree-dump-times "if " 1 "optimized" { xfail *-*-* } } } */ -/* { dg-final { scan-tree-dump-times "if " 2 "cddce2" } } */ -/* { dg-final { scan-tree-dump "x_. = PHI <0\\\(.\\\), 1\\\(.\\\)>" "cddce2" } } */ -/* { dg-final { cleanup-tree-dump "cddce2" } } */ +/* { dg-final { scan-tree-dump-not "if \\(" "optimized" } } */ /* { dg-final { cleanup-tree-dump "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c index d590975e57f..49a9098f79f 100644 --- a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c +++ b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c @@ -3,7 +3,7 @@ #include <stdarg.h> #include "tree-vect.h" -#define N 8 +#define N 16 int ia[8][5][N+2]; int ic[16][16][5][N+2]; diff --git a/gcc/testsuite/gcc.dg/vect/pr40074.c b/gcc/testsuite/gcc.dg/vect/pr40074.c new file mode 100644 index 00000000000..6459f1b552e --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr40074.c @@ -0,0 +1,54 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +#define N 16 + +typedef struct { + int a; + int b; + int c; + int d; +} s; + + +s arr[N] = {{7,0,1,5}, {7,2,3,5}, {7,4,5,5}, {7,6,7,5}, {7,8,9,5}, {7,10,11,5}, {7,12,13,5}, {7,14,15,5}, {7,16,17,5}, {7,18,19,5}, {7,20,21,5}, {7,22,23,5}, {7,24,25,5}, {7,26,27,5}, {7,28,29,5}, {7,30,31,5}}; + +__attribute__ ((noinline)) int +main1 () +{ + s *p = arr, *q = arr + 1; + int res[N]; + int i; + + for (i = 0; i < N-1; i++) + { + res[i] = p->b + p->d + q->b; + p++; + q++; + } + + /* check results: */ + for (i = 0; i < N-1; i++) + { + if (res[i] != arr[i].b + arr[i].d + arr[i+1].b) + abort (); + } + + return 0; +} + +int main (void) +{ + int i; + + check_vect (); + + main1 (); + + return 0; +} + +/* { dg-final { cleanup-tree-dump "vect" } } */ + diff --git a/gcc/testsuite/gcc.dg/vect/vect-66.c b/gcc/testsuite/gcc.dg/vect/vect-66.c index a332fa024b9..e0b23cd6550 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-66.c +++ b/gcc/testsuite/gcc.dg/vect/vect-66.c @@ -3,7 +3,7 @@ #include <stdarg.h> #include "tree-vect.h" -#define N 8 +#define N 16 __attribute__ ((noinline)) void main1 () diff --git a/gcc/testsuite/gcc.dg/vect/vect-70.c b/gcc/testsuite/gcc.dg/vect/vect-70.c index df7de31f34e..23b1902e54f 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-70.c +++ b/gcc/testsuite/gcc.dg/vect/vect-70.c @@ -3,7 +3,7 @@ #include <stdarg.h> #include "tree-vect.h" -#define N 12 +#define N 24 struct s{ int m; diff --git a/gcc/testsuite/gcc.dg/vect/vect-76.c b/gcc/testsuite/gcc.dg/vect/vect-76.c index 847b5e5259d..7097e7a821e 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-76.c +++ b/gcc/testsuite/gcc.dg/vect/vect-76.c @@ -3,7 +3,7 @@ #include <stdarg.h> #include "tree-vect.h" -#define N 12 +#define N 24 #define OFF 4 /* Check handling of accesses for which the "initial condition" - diff --git a/gcc/testsuite/gcc.dg/vect/vect-92.c b/gcc/testsuite/gcc.dg/vect/vect-92.c index 01c751fbfa3..3a64e251cb2 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-92.c +++ b/gcc/testsuite/gcc.dg/vect/vect-92.c @@ -22,13 +22,13 @@ main1 () { int i; - for (i = 0; i < 5; i++) + for (i = 0; i < 10; i++) { pa[i+1] = pb[i+1] * pc[i+1]; } /* check results: */ - for (i = 0; i < 5; i++) + for (i = 0; i < 10; i++) { if (pa[i+1] != (pb[i+1] * pc[i+1])) abort (); @@ -42,13 +42,13 @@ main2 () { int i; - for (i = 0; i < 6; i++) + for (i = 0; i < 12; i++) { pa[i+1] = pb[i+1] * pc[i+1]; } /* check results: */ - for (i = 0; i < 6; i++) + for (i = 0; i < 12; i++) { if (pa[i+1] != (pb[i+1] * pc[i+1])) abort (); diff --git a/gcc/testsuite/gcc.target/i386/pr39543-2.c b/gcc/testsuite/gcc.target/i386/pr39543-2.c index c292041a700..04e980efa7a 100644 --- a/gcc/testsuite/gcc.target/i386/pr39543-2.c +++ b/gcc/testsuite/gcc.target/i386/pr39543-2.c @@ -1,6 +1,7 @@ /* PR inline-asm/39543 */ /* { dg-do compile } */ /* { dg-options "-O3" } */ +/* { dg-skip-if "" { ilp32 && { ! nonpic } } { "*" } { "" } } */ float __attribute__ ((aligned (16))) s0[128]; const float s1 = 0.707; diff --git a/gcc/testsuite/gfortran.dg/bind_c_usage_18.f90 b/gcc/testsuite/gfortran.dg/bind_c_usage_18.f90 index 30534cca9a9..2bce215af19 100644 --- a/gcc/testsuite/gfortran.dg/bind_c_usage_18.f90 +++ b/gcc/testsuite/gfortran.dg/bind_c_usage_18.f90 @@ -7,7 +7,7 @@ subroutine foo(x,y,z,a) bind(c) ! { dg-warning "but may not be C interoperable" use iso_c_binding implicit none integer(4) :: x - integer(c_float) :: y ! { dg-error "C kind type parameter is for type REAL" } + integer(c_float) :: y ! { dg-warning "C kind type parameter is for type REAL" } complex(c_float) :: z ! OK, c_float == c_float_complex real(c_float_complex) :: a ! OK, c_float == c_float_complex end subroutine foo @@ -16,8 +16,8 @@ use iso_c_binding implicit none integer, parameter :: it = c_int integer, parameter :: dt = c_double -complex(c_int), target :: z1 ! { dg-error "C kind type parameter is for type INTEGER" } -complex(it), target :: z2 ! { dg-error "C kind type parameter is for type INTEGER" } +complex(c_int), target :: z1 ! { dg-warning "C kind type parameter is for type INTEGER" } +complex(it), target :: z2 ! { dg-warning "C kind type parameter is for type INTEGER" } complex(c_double), target :: z3 ! OK complex(dt), target :: z4 ! OK type(c_ptr) :: ptr diff --git a/gcc/testsuite/gfortran.dg/c_kind_tests_2.f03 b/gcc/testsuite/gfortran.dg/c_kind_tests_2.f03 index ced31a554ba..aaaee978adc 100644 --- a/gcc/testsuite/gfortran.dg/c_kind_tests_2.f03 +++ b/gcc/testsuite/gfortran.dg/c_kind_tests_2.f03 @@ -4,11 +4,11 @@ module c_kind_tests_2 integer, parameter :: myF = c_float real(myF), bind(c) :: myCFloat - integer(myF), bind(c) :: myCInt ! { dg-error "is for type REAL" } - integer(c_double), bind(c) :: myCInt2 ! { dg-error "is for type REAL" } + integer(myF), bind(c) :: myCInt ! { dg-warning "is for type REAL" } + integer(c_double), bind(c) :: myCInt2 ! { dg-warning "is for type REAL" } integer, parameter :: myI = c_int - real(myI) :: myReal ! { dg-error "is for type INTEGER" } - real(myI), bind(c) :: myCFloat2 ! { dg-error "is for type INTEGER" } + real(myI) :: myReal ! { dg-warning "is for type INTEGER" } + real(myI), bind(c) :: myCFloat2 ! { dg-warning "is for type INTEGER" } real(4), bind(c) :: myFloat ! { dg-warning "may not be a C interoperable" } end module c_kind_tests_2 diff --git a/gcc/testsuite/gfortran.dg/default_format_1.f90 b/gcc/testsuite/gfortran.dg/default_format_1.f90 index 1c6e71ebc71..75f08af0f8d 100644 --- a/gcc/testsuite/gfortran.dg/default_format_1.f90 +++ b/gcc/testsuite/gfortran.dg/default_format_1.f90 @@ -1,6 +1,7 @@ -! { dg-do run { xfail spu-*-* } } +! { dg-do run { xfail spu-*-* *-*-cygwin* } } ! Test XFAILed on Darwin because the system's printf() lacks -! proper support for denormals. +! proper support for denormals. XFAILed on cygwin as the result +! is off by one bit in some cases. ! ! This tests that the default formats for formatted I/O of reals are ! wide enough and have enough precision, by checking that values can diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_2.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_2.f90 index 5b86dc6e775..0fd9258fe80 100644 --- a/gcc/testsuite/gfortran.dg/duplicate_type_2.f90 +++ b/gcc/testsuite/gfortran.dg/duplicate_type_2.f90 @@ -7,14 +7,14 @@ INTEGER FUNCTION foo () IMPLICIT NONE - INTEGER :: foo ! { dg-warning "basic type of" } - INTEGER :: foo ! { dg-warning "basic type of" } + INTEGER :: foo ! { dg-error "basic type of" } + INTEGER :: foo ! { dg-error "basic type of" } foo = 42 END FUNCTION foo INTEGER FUNCTION bar () RESULT (x) IMPLICIT NONE - INTEGER :: x ! { dg-warning "basic type of" } + INTEGER :: x ! { dg-error "basic type of" } INTEGER :: y INTEGER :: y ! { dg-error "basic type of" } diff --git a/gcc/testsuite/gfortran.dg/duplicate_type_3.f90 b/gcc/testsuite/gfortran.dg/duplicate_type_3.f90 new file mode 100644 index 00000000000..802029db0ca --- /dev/null +++ b/gcc/testsuite/gfortran.dg/duplicate_type_3.f90 @@ -0,0 +1,48 @@ +! { dg-do compile } +! +! PR 39996: Double typing of function results not detected +! +! Contributed by Janus Weil <janus@gcc.gnu.org> + + interface + real function A () + end function + end interface + real :: A ! { dg-error "already has basic type of" } + + real :: B + interface + real function B () ! { dg-error "already has basic type of" } + end function ! { dg-error "Expecting END INTERFACE statement" } + end interface + + interface + function C () + real :: C + end function + end interface + real :: C ! { dg-error "already has basic type of" } + + real :: D + interface + function D () + real :: D ! { dg-error "already has basic type of" } + end function + end interface + + interface + function E () result (s) + real ::s + end function + end interface + real :: E ! { dg-error "already has basic type of" } + + real :: F + interface + function F () result (s) + real ::s ! { dg-error "already has basic type of" } + end function F + end interface + +end + diff --git a/gcc/testsuite/gfortran.dg/func_decl_2.f90 b/gcc/testsuite/gfortran.dg/func_decl_2.f90 index c2cc4403cd6..658883e65e2 100644 --- a/gcc/testsuite/gfortran.dg/func_decl_2.f90 +++ b/gcc/testsuite/gfortran.dg/func_decl_2.f90 @@ -1,8 +1,6 @@ ! { dg-do compile } ! Test fix for PR16943 in which the double typing of -! N caused an error. This is a common extension to the -! F95 standard, so the error is only thrown for -std=f95 -! or -pedantic. +! N caused an error. ! ! Contributed by Paul Thomas <pault@gcc.gnu.org> ! @@ -14,7 +12,7 @@ integer function bugf(M) result (N) integer, intent (in) :: M - integer :: N ! { dg-warning "already has basic type of INTEGER" } + integer :: N ! { dg-error "already has basic type of INTEGER" } N = M return end function bugf diff --git a/gcc/testsuite/gfortran.dg/hollerith.f90 b/gcc/testsuite/gfortran.dg/hollerith.f90 index f9836155b57..21cbf66bdf6 100644 --- a/gcc/testsuite/gfortran.dg/hollerith.f90 +++ b/gcc/testsuite/gfortran.dg/hollerith.f90 @@ -99,10 +99,4 @@ end subroutine ! { dg-warning "Non-character in FORMAT tag" "" { target *-*-* } 39 } -! { dg-warning "Character array in FORMAT tag" "" { target *-*-* } 43 } - -! { dg-warning "Character array in FORMAT tag" "" { target *-*-* } 45 } - -! { dg-warning "Character array in FORMAT tag" "" { target *-*-* } 47 } - ! { dg-warning "Hollerith constant" "" { target *-*-* } 51 } diff --git a/gcc/testsuite/gfortran.dg/hollerith6.f90 b/gcc/testsuite/gfortran.dg/hollerith6.f90 new file mode 100644 index 00000000000..93e857dd511 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/hollerith6.f90 @@ -0,0 +1,35 @@ +! PR fortran/39865 +! { dg-do run } + +subroutine foo (a) + integer(kind=4) :: a(1, 3) + character(len=40) :: t + write (t, fmt=a(1,2)) 1, 2, 3, 4, 5, 6, 7, 8 + if (t .ne. ' 1 2 3 4 5 6 7 8') call abort +end subroutine foo + interface + subroutine foo (a) + integer(kind=4) :: a(1, 3) + end subroutine foo + end interface + integer(kind=4) :: b(1,3) + character(len=40) :: t + b(1,1) = 4HXXXX + b(1,2) = 4H (8I + b(1,3) = 2H4) + write (t, fmt=b(1,2)) 1, 2, 3, 4, 5, 6, 7, 8 + if (t .ne. ' 1 2 3 4 5 6 7 8') call abort + call foo (b) +end + +! { dg-warning "Non-character in FORMAT tag" "FMT" { target *-*-* } 7 } +! { dg-warning "Non-character in FORMAT tag" "FMT" { target *-*-* } 20 } + +! { dg-warning "Hollerith constant" "const" { target *-*-* } 17 } +! { dg-warning "Conversion" "conversion" { target *-*-* } 17 } + +! { dg-warning "Hollerith constant" "const" { target *-*-* } 18 } +! { dg-warning "Conversion" "conversion" { target *-*-* } 18 } + +! { dg-warning "Hollerith constant" "const" { target *-*-* } 19 } +! { dg-warning "Conversion" "conversion" { target *-*-* } 19 } diff --git a/gcc/testsuite/gfortran.dg/hollerith7.f90 b/gcc/testsuite/gfortran.dg/hollerith7.f90 new file mode 100644 index 00000000000..8e2fb4fec12 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/hollerith7.f90 @@ -0,0 +1,52 @@ +! PR fortran/39865 +! { dg-do compile } + +subroutine foo (a) + integer(kind=4), target :: a(1:, 1:) + integer(kind=4), pointer :: b(:, :) + b => a + write (*, fmt=a(1,2)) 1, 2, 3, 4, 5, 6, 7, 8 + write (*, fmt=b(1,2)) 1, 2, 3, 4, 5, 6, 7, 8 +end subroutine foo +subroutine bar (a, b) + character :: b(2,*) + integer :: a(*) + write (*, fmt=b) 1, 2, 3 + write (*, fmt=a) 1, 2, 3 + write (*, fmt=a(2)) 1, 2, 3 +end subroutine + interface + subroutine foo (a) + integer(kind=4), target :: a(:, :) + end subroutine foo + end interface + integer(kind=4) :: a(2, 3) + a = 4HXXXX + a(2,2) = 4H (8I + a(1,3) = 2H4) + a(2,3) = 1H + call foo (a(2:2,:)) +end + +! { dg-warning "Non-character in FORMAT tag" "FMT" { target *-*-* } 8 } +! { dg-error "Non-character assumed shape array element in FORMAT tag" "element" { target *-*-* } 8 } + +! { dg-warning "Non-character in FORMAT tag" "FMT" { target *-*-* } 9 } +! { dg-error "Non-character pointer array element in FORMAT tag" "element" { target *-*-* } 9 } + +! { dg-error "reference to the assumed size array" "assumed-size" { target *-*-* } 14 } +! { dg-error "reference to the assumed size array" "assumed-size" { target *-*-* } 15 } +! { dg-warning "Non-character in FORMAT tag" "FMT" { target *-*-* } 16 } +! { dg-error "Non-character assumed size array element in FORMAT tag" "element" { target *-*-* } 16 } + +! { dg-warning "Hollerith constant" "const" { target *-*-* } 24 } +! { dg-warning "Conversion" "conversion" { target *-*-* } 24 } + +! { dg-warning "Hollerith constant" "const" { target *-*-* } 25 } +! { dg-warning "Conversion" "conversion" { target *-*-* } 25 } + +! { dg-warning "Hollerith constant" "const" { target *-*-* } 26 } +! { dg-warning "Conversion" "conversion" { target *-*-* } 26 } + +! { dg-warning "Hollerith constant" "const" { target *-*-* } 27 } +! { dg-warning "Conversion" "conversion" { target *-*-* } 27 } diff --git a/gcc/testsuite/gfortran.dg/hollerith_f95.f90 b/gcc/testsuite/gfortran.dg/hollerith_f95.f90 index 1ba74036c26..4d7fda8c72e 100644 --- a/gcc/testsuite/gfortran.dg/hollerith_f95.f90 +++ b/gcc/testsuite/gfortran.dg/hollerith_f95.f90 @@ -91,10 +91,3 @@ end subroutine ! { dg-error "Non-character in FORMAT tag" "" { target *-*-* } 38 } ! { dg-error "Non-character in FORMAT tag" "" { target *-*-* } 40 } - -! { dg-error "Character array in FORMAT tag" "" { target *-*-* } 44 } - -! { dg-error "Character array in FORMAT tag" "" { target *-*-* } 46 } - -! { dg-error "Character array in FORMAT tag" "" { target *-*-* } 48 } - diff --git a/gcc/testsuite/gfortran.dg/interop_params.f03 b/gcc/testsuite/gfortran.dg/interop_params.f03 index 96c7d5cef16..ea3dadac040 100644 --- a/gcc/testsuite/gfortran.dg/interop_params.f03 +++ b/gcc/testsuite/gfortran.dg/interop_params.f03 @@ -14,7 +14,7 @@ contains end subroutine test_0 subroutine test_1(my_f90_real) bind(c) - real(c_int), value :: my_f90_real ! { dg-error "is for type INTEGER" } + real(c_int), value :: my_f90_real ! { dg-warning "is for type INTEGER" } end subroutine test_1 subroutine test_2(my_type) bind(c) ! { dg-error "is not C interoperable" } diff --git a/gcc/testsuite/gfortran.dg/pr39865.f90 b/gcc/testsuite/gfortran.dg/pr39865.f90 new file mode 100644 index 00000000000..fac34367422 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pr39865.f90 @@ -0,0 +1,84 @@ +! PR fortran/39865 +! { dg-do run } + +subroutine f1 (a) + character(len=1) :: a(7:) + character(len=12) :: b + character(len=1) :: c(2:10) + write (b, a) 'Hell', 'o wo', 'rld!' + if (b .ne. 'Hello world!') call abort + write (b, a(:)) 'hell', 'o Wo', 'rld!' + if (b .ne. 'hello World!') call abort + write (b, a(8:)) 'Hell', 'o wo', 'rld!' + if (b .ne. 'Hello world!') call abort + c(2) = ' ' + c(3) = '(' + c(4) = '3' + c(5) = 'A' + c(6) = '4' + c(7) = ')' + write (b, c) 'hell', 'o Wo', 'rld!' + if (b .ne. 'hello World!') call abort + write (b, c(:)) 'Hell', 'o wo', 'rld!' + if (b .ne. 'Hello world!') call abort + write (b, c(3:)) 'hell', 'o Wo', 'rld!' + if (b .ne. 'hello World!') call abort +end subroutine f1 + +subroutine f2 (a) + character(len=1) :: a(10:,20:) + character(len=12) :: b + write (b, a) 'Hell', 'o wo', 'rld!' + if (b .ne. 'Hello world!') call abort + write (b, a) 'hell', 'o Wo', 'rld!' + if (b .ne. 'hello World!') call abort +end subroutine f2 + +function f3 () + character(len=1) :: f3(5) + f3(1) = '(' + f3(2) = '3' + f3(3) = 'A' + f3(4) = '4' + f3(5) = ')' +end function f3 + + interface + subroutine f1 (a) + character(len=1) :: a(:) + end + end interface + interface + subroutine f2 (a) + character(len=1) :: a(:,:) + end + end interface + interface + function f3 () + character(len=1) :: f3(5) + end + end interface + integer :: i, j + character(len=1) :: e (6, 7:9), f (3,2), g (10) + character(len=12) :: b + e = 'X' + e(2,8) = ' ' + e(3,8) = '(' + e(4,8) = '3' + e(2,9) = 'A' + e(3,9) = '4' + e(4,9) = ')' + f = e(2:4,8:9) + g = 'X' + g(2) = ' ' + g(3) = '(' + g(4) = '3' + g(5) = 'A' + g(6) = '4' + g(7) = ')' + call f1 (g(2:7)) + call f2 (f) + call f2 (e(2:4,8:9)) + write (b, f3 ()) 'Hell', 'o wo', 'rld!' + if (b .ne. 'Hello world!') call abort +end diff --git a/gcc/testsuite/gfortran.dg/proc_ptr_comp_7.f90 b/gcc/testsuite/gfortran.dg/proc_ptr_comp_7.f90 new file mode 100644 index 00000000000..860c2dd9b81 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/proc_ptr_comp_7.f90 @@ -0,0 +1,40 @@ +! { dg-do compile } +! +! PR 40089: Public type with public component which has a private type +! +! Original test case by Juergen Reuter <reuter@physik.uni-freiburg.de> +! Adapted by Janus Weil <janus@gcc.gnu.org> + +module m + + implicit none + private + + public :: public_t + + type :: private_t + integer :: i + end type + + type :: public_t + type(private_t), pointer :: public_comp_with_private_type + procedure(ifc) , nopass, pointer :: ppc + end type + + abstract interface + integer function ifc () + end function + end interface + +end module m + +program test +use m +implicit none +type(public_t) :: x +integer :: j +j = x%ppc() +end + +! { dg-final { cleanup-modules "m" } } + diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 92bde7886a9..56f7877dd18 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -466,6 +466,11 @@ proc check_profiling_available { test_what } { return 0 } + # cygwin does not support -p. + if { [istarget *-*-cygwin*] && [lindex $test_what 1] == "-p" } { + return 0 + } + # uClibc does not have gcrt1.o. if { [check_effective_target_uclibc] && ([lindex $test_what 1] == "-p" diff --git a/gcc/tree-if-conv.c b/gcc/tree-if-conv.c index 70c6149a494..c1b05328fa6 100644 --- a/gcc/tree-if-conv.c +++ b/gcc/tree-if-conv.c @@ -1163,7 +1163,7 @@ struct gimple_opt_pass pass_if_conversion = NULL, /* next */ 0, /* static_pass_number */ TV_NONE, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-inline.c b/gcc/tree-inline.c index 752766b6c7b..78cb716d7ad 100644 --- a/gcc/tree-inline.c +++ b/gcc/tree-inline.c @@ -2783,7 +2783,8 @@ estimate_move_cost (tree type) /* Returns cost of operation CODE, according to WEIGHTS */ static int -estimate_operator_cost (enum tree_code code, eni_weights *weights) +estimate_operator_cost (enum tree_code code, eni_weights *weights, + tree op1 ATTRIBUTE_UNUSED, tree op2) { switch (code) { @@ -2893,7 +2894,9 @@ estimate_operator_cost (enum tree_code code, eni_weights *weights) case FLOOR_MOD_EXPR: case ROUND_MOD_EXPR: case RDIV_EXPR: - return weights->div_mod_cost; + if (TREE_CODE (op2) != INTEGER_CST) + return weights->div_mod_cost; + return 1; default: /* We expect a copy assignment with no operator. */ @@ -2930,6 +2933,7 @@ estimate_num_insns (gimple stmt, eni_weights *weights) unsigned cost, i; enum gimple_code code = gimple_code (stmt); tree lhs; + tree rhs; switch (code) { @@ -2953,16 +2957,35 @@ estimate_num_insns (gimple stmt, eni_weights *weights) of moving something into "a", which we compute using the function estimate_move_cost. */ lhs = gimple_assign_lhs (stmt); + rhs = gimple_assign_rhs1 (stmt); + + /* EH magic stuff is most probably going to be optimized out. + We rarely really need to save EH info for unwinding + nested exceptions. */ + if (TREE_CODE (lhs) == FILTER_EXPR + || TREE_CODE (lhs) == EXC_PTR_EXPR + || TREE_CODE (rhs) == FILTER_EXPR + || TREE_CODE (rhs) == EXC_PTR_EXPR) + return 0; if (is_gimple_reg (lhs)) cost = 0; else cost = estimate_move_cost (TREE_TYPE (lhs)); - cost += estimate_operator_cost (gimple_assign_rhs_code (stmt), weights); + if (!is_gimple_reg (rhs) && !is_gimple_min_invariant (rhs)) + cost += estimate_move_cost (TREE_TYPE (rhs)); + + cost += estimate_operator_cost (gimple_assign_rhs_code (stmt), weights, + gimple_assign_rhs1 (stmt), + get_gimple_rhs_class (gimple_assign_rhs_code (stmt)) + == GIMPLE_BINARY_RHS + ? gimple_assign_rhs2 (stmt) : NULL); break; case GIMPLE_COND: - cost = 1 + estimate_operator_cost (gimple_cond_code (stmt), weights); + cost = 1 + estimate_operator_cost (gimple_cond_code (stmt), weights, + gimple_op (stmt, 0), + gimple_op (stmt, 1)); break; case GIMPLE_SWITCH: @@ -2971,7 +2994,10 @@ estimate_num_insns (gimple stmt, eni_weights *weights) TODO: once the switch expansion logic is sufficiently separated, we can do better job on estimating cost of the switch. */ - cost = gimple_switch_num_labels (stmt) * 2; + if (weights->time_based) + cost = floor_log2 (gimple_switch_num_labels (stmt)) * 2; + else + cost = gimple_switch_num_labels (stmt) * 2; break; case GIMPLE_CALL: @@ -2994,8 +3020,7 @@ estimate_num_insns (gimple stmt, eni_weights *weights) case BUILT_IN_CONSTANT_P: return 0; case BUILT_IN_EXPECT: - cost = 0; - break; + return 0; /* Prefetch instruction is not expensive. */ case BUILT_IN_PREFETCH: @@ -3009,6 +3034,8 @@ estimate_num_insns (gimple stmt, eni_weights *weights) if (decl) funtype = TREE_TYPE (decl); + if (!VOID_TYPE_P (TREE_TYPE (funtype))) + cost += estimate_move_cost (TREE_TYPE (funtype)); /* Our cost must be kept in sync with cgraph_estimate_size_after_inlining that does use function declaration to figure out the arguments. */ @@ -3133,11 +3160,13 @@ init_inline_once (void) eni_inlining_weights.target_builtin_call_cost = 1; eni_inlining_weights.div_mod_cost = 10; eni_inlining_weights.omp_cost = 40; + eni_inlining_weights.time_based = true; eni_size_weights.call_cost = 1; eni_size_weights.target_builtin_call_cost = 1; eni_size_weights.div_mod_cost = 1; eni_size_weights.omp_cost = 40; + eni_size_weights.time_based = false; /* Estimating time for call is difficult, since we have no idea what the called function does. In the current uses of eni_time_weights, @@ -3147,6 +3176,7 @@ init_inline_once (void) eni_time_weights.target_builtin_call_cost = 10; eni_time_weights.div_mod_cost = 10; eni_time_weights.omp_cost = 40; + eni_time_weights.time_based = true; } /* Estimate the number of instructions in a gimple_seq. */ diff --git a/gcc/tree-inline.h b/gcc/tree-inline.h index 1214c95dd0b..37e60bfd360 100644 --- a/gcc/tree-inline.h +++ b/gcc/tree-inline.h @@ -130,6 +130,11 @@ typedef struct eni_weights_d /* Cost for omp construct. */ unsigned omp_cost; + + /* True when time of statemnt should be estimated. Thus i.e + cost of switch statement is logarithmic rather than linear in number + of cases. */ + bool time_based; } eni_weights; /* Weights that estimate_num_insns uses for heuristics in inlining. */ diff --git a/gcc/tree-nrv.c b/gcc/tree-nrv.c index 07245cd6d7b..c1e9d605679 100644 --- a/gcc/tree-nrv.c +++ b/gcc/tree-nrv.c @@ -360,7 +360,7 @@ struct gimple_opt_pass pass_return_slot = NULL, /* next */ 0, /* static_pass_number */ TV_NONE, /* tv_id */ - PROP_ssa | PROP_alias, /* properties_required */ + PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-object-size.c b/gcc/tree-object-size.c index d99bc238576..18e62e860fd 100644 --- a/gcc/tree-object-size.c +++ b/gcc/tree-object-size.c @@ -1113,7 +1113,7 @@ struct gimple_opt_pass pass_object_sizes = NULL, /* next */ 0, /* static_pass_number */ TV_NONE, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-outof-ssa.c b/gcc/tree-outof-ssa.c index 50d3089340a..4ed8e9fbdf0 100644 --- a/gcc/tree-outof-ssa.c +++ b/gcc/tree-outof-ssa.c @@ -853,6 +853,67 @@ remove_ssa_form (bool perform_ter, struct ssaexpand *sa) } +/* If not already done so for basic block BB, assign increasing uids + to each of its instructions. */ + +static void +maybe_renumber_stmts_bb (basic_block bb) +{ + unsigned i = 0; + gimple_stmt_iterator gsi; + + if (!bb->aux) + return; + bb->aux = NULL; + for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) + { + gimple stmt = gsi_stmt (gsi); + gimple_set_uid (stmt, i); + i++; + } +} + + +/* Return true if we can determine that the SSA_NAMEs RESULT (a result + of a PHI node) and ARG (one of its arguments) conflict. Return false + otherwise, also when we simply aren't sure. */ + +static bool +trivially_conflicts_p (basic_block bb, tree result, tree arg) +{ + use_operand_p use; + imm_use_iterator imm_iter; + gimple defa = SSA_NAME_DEF_STMT (arg); + + /* If ARG isn't defined in the same block it's too complicated for + our little mind. */ + if (gimple_bb (defa) != bb) + return false; + + FOR_EACH_IMM_USE_FAST (use, imm_iter, result) + { + gimple use_stmt = USE_STMT (use); + /* Now, if there's a use of RESULT that lies outside this basic block, + then there surely is a conflict with ARG. */ + if (gimple_bb (use_stmt) != bb) + return true; + if (gimple_code (use_stmt) == GIMPLE_PHI) + continue; + /* The use now is in a real stmt of BB, so if ARG was defined + in a PHI node (like RESULT) both conflict. */ + if (gimple_code (defa) == GIMPLE_PHI) + return true; + maybe_renumber_stmts_bb (bb); + /* If the use of RESULT occurs after the definition of ARG, + the two conflict too. */ + if (gimple_uid (defa) < gimple_uid (use_stmt)) + return true; + } + + return false; +} + + /* Search every PHI node for arguments associated with backedges which we can trivially determine will need a copy (the argument is either not an SSA_NAME or the argument has a different underlying variable @@ -870,6 +931,9 @@ insert_backedge_copies (void) FOR_EACH_BB (bb) { + /* Mark block as possibly needing calculation of UIDs. */ + bb->aux = &bb->aux; + for (gsi = gsi_start_phis (bb); !gsi_end_p (gsi); gsi_next (&gsi)) { gimple phi = gsi_stmt (gsi); @@ -892,7 +956,8 @@ insert_backedge_copies (void) needed. */ if ((e->flags & EDGE_DFS_BACK) && (TREE_CODE (arg) != SSA_NAME - || SSA_NAME_VAR (arg) != result_var)) + || SSA_NAME_VAR (arg) != result_var + || trivially_conflicts_p (bb, result, arg))) { tree name; gimple stmt, last = NULL; @@ -936,6 +1001,9 @@ insert_backedge_copies (void) } } } + + /* Unmark this block again. */ + bb->aux = NULL; } } diff --git a/gcc/tree-pass.h b/gcc/tree-pass.h index 9df5de18bcc..a123341920e 100644 --- a/gcc/tree-pass.h +++ b/gcc/tree-pass.h @@ -215,9 +215,8 @@ struct dump_file_info #define PROP_ssa (1 << 5) #define PROP_no_crit_edges (1 << 6) #define PROP_rtl (1 << 7) -#define PROP_alias (1 << 8) -#define PROP_gimple_lomp (1 << 9) /* lowered OpenMP directives */ -#define PROP_cfglayout (1 << 10) /* cfglayout mode on RTL */ +#define PROP_gimple_lomp (1 << 8) /* lowered OpenMP directives */ +#define PROP_cfglayout (1 << 9) /* cfglayout mode on RTL */ #define PROP_trees \ (PROP_gimple_any | PROP_gimple_lcf | PROP_gimple_leh | PROP_gimple_lomp) diff --git a/gcc/tree-ssa-dom.c b/gcc/tree-ssa-dom.c index a134244bd9f..a041f0e2e27 100644 --- a/gcc/tree-ssa-dom.c +++ b/gcc/tree-ssa-dom.c @@ -768,7 +768,7 @@ struct gimple_opt_pass pass_dominator = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_SSA_DOMINATOR_OPTS, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ @@ -2923,7 +2923,7 @@ struct gimple_opt_pass pass_phi_only_cprop = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_PHI_CPROP, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-ssa-dse.c b/gcc/tree-ssa-dse.c index 6a3469bb7b0..69a8a49c97a 100644 --- a/gcc/tree-ssa-dse.c +++ b/gcc/tree-ssa-dse.c @@ -460,9 +460,7 @@ struct gimple_opt_pass pass_dse = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_DSE, /* tv_id */ - PROP_cfg - | PROP_ssa - | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-ssa-loop-ivcanon.c b/gcc/tree-ssa-loop-ivcanon.c index 21010734be6..8e45bbb97e6 100644 --- a/gcc/tree-ssa-loop-ivcanon.c +++ b/gcc/tree-ssa-loop-ivcanon.c @@ -53,6 +53,7 @@ along with GCC; see the file COPYING3. If not see #include "params.h" #include "flags.h" #include "tree-inline.h" +#include "target.h" /* Specifies types of loops that may be unrolled. */ @@ -118,7 +119,7 @@ tree_num_loop_insns (struct loop *loop, eni_weights *weights) { basic_block *body = get_loop_body (loop); gimple_stmt_iterator gsi; - unsigned size = 1, i; + unsigned size = 0, i; for (i = 0; i < loop->num_nodes; i++) for (gsi = gsi_start_bb (body[i]); !gsi_end_p (gsi); gsi_next (&gsi)) @@ -128,28 +129,195 @@ tree_num_loop_insns (struct loop *loop, eni_weights *weights) return size; } -/* Estimate number of insns of completely unrolled loop. We assume - that the size of the unrolled loop is decreased in the - following way (the numbers of insns are based on what - estimate_num_insns returns for appropriate statements): +/* Describe size of loop as detected by tree_estimate_loop_size. */ +struct loop_size +{ + /* Number of instructions in the loop. */ + int overall; + + /* Number of instructions that will be likely optimized out in + peeled iterations of loop (i.e. computation based on induction + variable where induction variable starts at known constant.) */ + int eliminated_by_peeling; + + /* Same statistics for last iteration of loop: it is smaller because + instructions after exit are not executed. */ + int last_iteration; + int last_iteration_eliminated_by_peeling; +}; + +/* Return true if OP in STMT will be constant after peeling LOOP. */ + +static bool +constant_after_peeling (tree op, gimple stmt, struct loop *loop) +{ + affine_iv iv; + + if (is_gimple_min_invariant (op)) + return true; + + /* We can still fold accesses to constant arrays when index is known. */ + if (TREE_CODE (op) != SSA_NAME) + { + tree base = op; + + /* First make fast look if we see constant array inside. */ + while (handled_component_p (base)) + base = TREE_OPERAND (base, 0); + if ((DECL_P (base) + && TREE_STATIC (base) + && TREE_READONLY (base) + && (DECL_INITIAL (base) + || (!DECL_EXTERNAL (base) + && targetm.binds_local_p (base)))) + || CONSTANT_CLASS_P (base)) + { + /* If so, see if we understand all the indices. */ + base = op; + while (handled_component_p (base)) + { + if (TREE_CODE (base) == ARRAY_REF + && !constant_after_peeling (TREE_OPERAND (base, 1), stmt, loop)) + return false; + base = TREE_OPERAND (base, 0); + } + return true; + } + return false; + } + + /* Induction variables are constants. */ + if (!simple_iv (loop, loop_containing_stmt (stmt), op, &iv, false)) + return false; + if (!is_gimple_min_invariant (iv.base)) + return false; + if (!is_gimple_min_invariant (iv.step)) + return false; + return true; +} + +/* Computes an estimated number of insns in LOOP, weighted by WEIGHTS. + Return results in SIZE, estimate benefits for complete unrolling exiting by EXIT. */ + +static void +tree_estimate_loop_size (struct loop *loop, edge exit, struct loop_size *size) +{ + basic_block *body = get_loop_body (loop); + gimple_stmt_iterator gsi; + unsigned int i; + bool after_exit; + + size->overall = 0; + size->eliminated_by_peeling = 0; + size->last_iteration = 0; + size->last_iteration_eliminated_by_peeling = 0; + + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "Estimating sizes for loop %i\n", loop->num); + for (i = 0; i < loop->num_nodes; i++) + { + if (exit && body[i] != exit->src + && dominated_by_p (CDI_DOMINATORS, body[i], exit->src)) + after_exit = true; + else + after_exit = false; + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, " BB: %i, after_exit: %i\n", body[i]->index, after_exit); + + for (gsi = gsi_start_bb (body[i]); !gsi_end_p (gsi); gsi_next (&gsi)) + { + gimple stmt = gsi_stmt (gsi); + int num = estimate_num_insns (stmt, &eni_size_weights); + bool likely_eliminated = false; + + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fprintf (dump_file, " size: %3i ", num); + print_gimple_stmt (dump_file, gsi_stmt (gsi), 0, 0); + } + + /* Look for reasons why we might optimize this stmt away. */ + + /* Exit conditional. */ + if (body[i] == exit->src && stmt == last_stmt (exit->src)) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, " Exit condition will be eliminated.\n"); + likely_eliminated = true; + } + /* Sets of IV variables */ + else if (gimple_code (stmt) == GIMPLE_ASSIGN + && constant_after_peeling (gimple_assign_lhs (stmt), stmt, loop)) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, " Induction variable computation will" + " be folded away.\n"); + likely_eliminated = true; + } + /* Assignments of IV variables. */ + else if (gimple_code (stmt) == GIMPLE_ASSIGN + && TREE_CODE (gimple_assign_lhs (stmt)) == SSA_NAME + && constant_after_peeling (gimple_assign_rhs1 (stmt), stmt,loop) + && (gimple_assign_rhs_class (stmt) != GIMPLE_BINARY_RHS + || constant_after_peeling (gimple_assign_rhs2 (stmt), + stmt, loop))) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, " Constant expression will be folded away.\n"); + likely_eliminated = true; + } + /* Conditionals. */ + else if (gimple_code (stmt) == GIMPLE_COND + && constant_after_peeling (gimple_cond_lhs (stmt), stmt, loop) + && constant_after_peeling (gimple_cond_rhs (stmt), stmt, loop)) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, " Constant conditional.\n"); + likely_eliminated = true; + } + + size->overall += num; + if (likely_eliminated) + size->eliminated_by_peeling += num; + if (!after_exit) + { + size->last_iteration += num; + if (likely_eliminated) + size->last_iteration_eliminated_by_peeling += num; + } + } + } + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "size: %i-%i, last_iteration: %i-%i\n", size->overall, + size->eliminated_by_peeling, size->last_iteration, + size->last_iteration_eliminated_by_peeling); + + free (body); +} - 1) exit condition gets removed (2 insns) - 2) increment of the control variable gets removed (2 insns) - 3) All remaining statements are likely to get simplified - due to constant propagation. Hard to estimate; just - as a heuristics we decrease the rest by 1/3. +/* Estimate number of insns of completely unrolled loop. + It is (NUNROLL + 1) * size of loop body with taking into account + the fact that in last copy everything after exit conditional + is dead and that some instructions will be eliminated after + peeling. - NINSNS is the number of insns in the loop before unrolling. - NUNROLL is the number of times the loop is unrolled. */ + Loop body is likely going to simplify futher, this is difficult + to guess, we just decrease the result by 1/3. */ static unsigned HOST_WIDE_INT -estimated_unrolled_size (unsigned HOST_WIDE_INT ninsns, +estimated_unrolled_size (struct loop_size *size, unsigned HOST_WIDE_INT nunroll) { - HOST_WIDE_INT unr_insns = 2 * ((HOST_WIDE_INT) ninsns - 4) / 3; + HOST_WIDE_INT unr_insns = ((nunroll) + * (HOST_WIDE_INT) (size->overall + - size->eliminated_by_peeling)); + if (!nunroll) + unr_insns = 0; + unr_insns += size->last_iteration - size->last_iteration_eliminated_by_peeling; + + unr_insns = unr_insns * 2 / 3; if (unr_insns <= 0) unr_insns = 1; - unr_insns *= (nunroll + 1); return unr_insns; } @@ -165,6 +333,7 @@ try_unroll_loop_completely (struct loop *loop, { unsigned HOST_WIDE_INT n_unroll, ninsns, max_unroll, unr_insns; gimple cond; + struct loop_size size; if (loop->inner) return false; @@ -182,9 +351,10 @@ try_unroll_loop_completely (struct loop *loop, if (ul == UL_SINGLE_ITER) return false; - ninsns = tree_num_loop_insns (loop, &eni_size_weights); + tree_estimate_loop_size (loop, exit, &size); + ninsns = size.overall; - unr_insns = estimated_unrolled_size (ninsns, n_unroll); + unr_insns = estimated_unrolled_size (&size, n_unroll); if (dump_file && (dump_flags & TDF_DETAILS)) { fprintf (dump_file, " Loop size: %d\n", (int) ninsns); diff --git a/gcc/tree-ssa-phiopt.c b/gcc/tree-ssa-phiopt.c index 72ba04a09b8..3cdb9b35335 100644 --- a/gcc/tree-ssa-phiopt.c +++ b/gcc/tree-ssa-phiopt.c @@ -1276,7 +1276,7 @@ struct gimple_opt_pass pass_phiopt = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_PHIOPT, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ @@ -1305,7 +1305,7 @@ struct gimple_opt_pass pass_cselim = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_PHIOPT, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-ssa-pre.c b/gcc/tree-ssa-pre.c index 3273c194981..592261420c1 100644 --- a/gcc/tree-ssa-pre.c +++ b/gcc/tree-ssa-pre.c @@ -4558,7 +4558,7 @@ struct gimple_opt_pass pass_pre = 0, /* static_pass_number */ TV_TREE_PRE, /* tv_id */ PROP_no_crit_edges | PROP_cfg - | PROP_ssa | PROP_alias, /* properties_required */ + | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ TODO_rebuild_alias, /* todo_flags_start */ @@ -4593,7 +4593,7 @@ struct gimple_opt_pass pass_fre = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_FRE, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-ssa-reassoc.c b/gcc/tree-ssa-reassoc.c index a3e84680972..416409f1305 100644 --- a/gcc/tree-ssa-reassoc.c +++ b/gcc/tree-ssa-reassoc.c @@ -2070,7 +2070,7 @@ struct gimple_opt_pass pass_reassoc = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_REASSOC, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-ssa-sccvn.c b/gcc/tree-ssa-sccvn.c index b0c114a0377..ac292dda9f1 100644 --- a/gcc/tree-ssa-sccvn.c +++ b/gcc/tree-ssa-sccvn.c @@ -2421,7 +2421,7 @@ compare_ops (const void *pa, const void *pb) basic_block bbb; if (gimple_nop_p (opstmta) && gimple_nop_p (opstmtb)) - return 0; + return SSA_NAME_VERSION (opa) - SSA_NAME_VERSION (opb); else if (gimple_nop_p (opstmta)) return -1; else if (gimple_nop_p (opstmtb)) @@ -2431,7 +2431,7 @@ compare_ops (const void *pa, const void *pb) bbb = gimple_bb (opstmtb); if (!bba && !bbb) - return 0; + return SSA_NAME_VERSION (opa) - SSA_NAME_VERSION (opb); else if (!bba) return -1; else if (!bbb) @@ -2441,12 +2441,15 @@ compare_ops (const void *pa, const void *pb) { if (gimple_code (opstmta) == GIMPLE_PHI && gimple_code (opstmtb) == GIMPLE_PHI) - return 0; + return SSA_NAME_VERSION (opa) - SSA_NAME_VERSION (opb); else if (gimple_code (opstmta) == GIMPLE_PHI) return -1; else if (gimple_code (opstmtb) == GIMPLE_PHI) return 1; - return gimple_uid (opstmta) - gimple_uid (opstmtb); + else if (gimple_uid (opstmta) != gimple_uid (opstmtb)) + return gimple_uid (opstmta) - gimple_uid (opstmtb); + else + return SSA_NAME_VERSION (opa) - SSA_NAME_VERSION (opb); } return rpo_numbers[bba->index] - rpo_numbers[bbb->index]; } diff --git a/gcc/tree-ssa-sink.c b/gcc/tree-ssa-sink.c index d0c550d8abb..227ad11253c 100644 --- a/gcc/tree-ssa-sink.c +++ b/gcc/tree-ssa-sink.c @@ -570,7 +570,7 @@ struct gimple_opt_pass pass_sink_code = 0, /* static_pass_number */ TV_TREE_SINK, /* tv_id */ PROP_no_crit_edges | PROP_cfg - | PROP_ssa | PROP_alias, /* properties_required */ + | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-ssa-structalias.c b/gcc/tree-ssa-structalias.c index 3bcaeb1e011..eda053f2430 100644 --- a/gcc/tree-ssa-structalias.c +++ b/gcc/tree-ssa-structalias.c @@ -5753,7 +5753,7 @@ struct gimple_opt_pass pass_build_alias = 0, /* static_pass_number */ TV_NONE, /* tv_id */ PROP_cfg | PROP_ssa, /* properties_required */ - PROP_alias, /* properties_provided */ + 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ TODO_rebuild_alias | TODO_dump_func /* todo_flags_finish */ diff --git a/gcc/tree-stdarg.c b/gcc/tree-stdarg.c index f9a2110095c..4e030b12fa9 100644 --- a/gcc/tree-stdarg.c +++ b/gcc/tree-stdarg.c @@ -906,7 +906,7 @@ struct gimple_opt_pass pass_stdarg = NULL, /* next */ 0, /* static_pass_number */ TV_NONE, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-tailcall.c b/gcc/tree-tailcall.c index 6b03eaaac89..23d849f268e 100644 --- a/gcc/tree-tailcall.c +++ b/gcc/tree-tailcall.c @@ -1019,7 +1019,7 @@ struct gimple_opt_pass pass_tail_calls = NULL, /* next */ 0, /* static_pass_number */ TV_NONE, /* tv_id */ - PROP_cfg | PROP_ssa | PROP_alias, /* properties_required */ + PROP_cfg | PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c index a117898e146..443ecd04088 100644 --- a/gcc/tree-vect-data-refs.c +++ b/gcc/tree-vect-data-refs.c @@ -1428,7 +1428,7 @@ vect_analyze_group_access (struct data_reference *dr) tree next_step; tree prev_init = DR_INIT (data_ref); gimple prev = stmt; - HOST_WIDE_INT diff, count_in_bytes; + HOST_WIDE_INT diff, count_in_bytes, gaps = 0; while (next) { @@ -1490,6 +1490,8 @@ vect_analyze_group_access (struct data_reference *dr) fprintf (vect_dump, "interleaved store with gaps"); return false; } + + gaps += diff - 1; } /* Store the gap from the previous member of the group. If there is no @@ -1506,8 +1508,9 @@ vect_analyze_group_access (struct data_reference *dr) the type to get COUNT_IN_BYTES. */ count_in_bytes = type_size * count; - /* Check that the size of the interleaving is not greater than STEP. */ - if (dr_step < count_in_bytes) + /* Check that the size of the interleaving (including gaps) is not greater + than STEP. */ + if (dr_step && dr_step < count_in_bytes + gaps * type_size) { if (vect_print_dump_info (REPORT_DETAILS)) { diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c index 09c634246ec..3a86b826e50 100644 --- a/gcc/tree-vrp.c +++ b/gcc/tree-vrp.c @@ -7347,7 +7347,7 @@ struct gimple_opt_pass pass_vrp = NULL, /* next */ 0, /* static_pass_number */ TV_TREE_VRP, /* tv_id */ - PROP_ssa | PROP_alias, /* properties_required */ + PROP_ssa, /* properties_required */ 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ diff --git a/gcc/tree.c b/gcc/tree.c index 45de7a93e08..5ed55c1d372 100644 --- a/gcc/tree.c +++ b/gcc/tree.c @@ -3626,24 +3626,6 @@ iterative_hash_hashval_t (hashval_t val, hashval_t val2) return val2; } -/* Produce good hash value combining PTR and VAL2. */ -static inline hashval_t -iterative_hash_pointer (const void *ptr, hashval_t val2) -{ - if (sizeof (ptr) == sizeof (hashval_t)) - return iterative_hash_hashval_t ((size_t) ptr, val2); - else - { - hashval_t a = (hashval_t) (size_t) ptr; - /* Avoid warnings about shifting of more than the width of the type on - hosts that won't execute this path. */ - int zero = 0; - hashval_t b = (hashval_t) ((size_t) ptr >> (sizeof (hashval_t) * 8 + zero)); - mix (a, b, val2); - return val2; - } -} - /* Produce good hash value combining VAL and VAL2. */ static inline hashval_t iterative_hash_host_wide_int (HOST_WIDE_INT val, hashval_t val2) @@ -5330,7 +5312,7 @@ iterative_hash_expr (const_tree t, hashval_t val) char tclass; if (t == NULL_TREE) - return iterative_hash_pointer (t, val); + return iterative_hash_hashval_t (0, val); code = TREE_CODE (t); @@ -5364,7 +5346,7 @@ iterative_hash_expr (const_tree t, hashval_t val) case SSA_NAME: /* we can just compare by pointer. */ - return iterative_hash_pointer (t, val); + return iterative_hash_host_wide_int (SSA_NAME_VERSION (t), val); case TREE_LIST: /* A list of expressions, for a CALL_EXPR or as the elements of a @@ -5388,13 +5370,12 @@ iterative_hash_expr (const_tree t, hashval_t val) __builtin__ form. Otherwise nodes that compare equal according to operand_equal_p might get different hash codes. */ - if (DECL_BUILT_IN (t)) + if (DECL_BUILT_IN (t) && built_in_decls[DECL_FUNCTION_CODE (t)]) { - val = iterative_hash_pointer (built_in_decls[DECL_FUNCTION_CODE (t)], - val); - return val; + t = built_in_decls[DECL_FUNCTION_CODE (t)]; + code = TREE_CODE (t); } - /* else FALL THROUGH */ + /* FALL THROUGH */ default: tclass = TREE_CODE_CLASS (code); @@ -7166,7 +7147,7 @@ tree_range_check_failed (const_tree node, const char *file, int line, { char *buffer; unsigned length = 0; - int c; + unsigned int c; for (c = c1; c <= c2; ++c) length += 4 + strlen (tree_code_name[c]); @@ -7227,7 +7208,7 @@ omp_clause_range_check_failed (const_tree node, const char *file, int line, { char *buffer; unsigned length = 0; - int c; + unsigned int c; for (c = c1; c <= c2; ++c) length += 4 + strlen (omp_clause_code_name[c]); diff --git a/gcc/tree.h b/gcc/tree.h index cb4b369cd63..eaa8e2ed8ff 100644 --- a/gcc/tree.h +++ b/gcc/tree.h @@ -5190,6 +5190,9 @@ extern unsigned HOST_WIDE_INT highest_pow2_factor (const_tree); void init_inline_once (void); +/* In ipa-reference.c. Used for parsing attributes of asm code. */ +extern GTY(()) tree memory_identifier_string; + /* Compute the number of operands in an expression node NODE. For tcc_vl_exp nodes like CALL_EXPRs, this is stored in the node itself, otherwise it is looked up from the node's code. */ diff --git a/libcpp/ChangeLog b/libcpp/ChangeLog index 4e21b581121..36a2fbc1c56 100644 --- a/libcpp/ChangeLog +++ b/libcpp/ChangeLog @@ -1,3 +1,11 @@ +2009-05-14 Manuel Lopez-Ibanez <manu@gcc.gnu.org> + + PR cpp/36674 + * directives (do_linemarker): Compensate for the increment in + location that occurs when we reach the end of line. + * files (_cpp_stack_include): Mention _cpp_find_file in the + comment. + 2009-05-10 Joseph Myers <joseph@codesourcery.com> * include/cpplib.h (enum cpp_token_fld_kind): Add diff --git a/libcpp/directives.c b/libcpp/directives.c index e71efb2bd94..74644ff6c77 100644 --- a/libcpp/directives.c +++ b/libcpp/directives.c @@ -1004,6 +1004,14 @@ do_linemarker (cpp_reader *pfile) } skip_rest_of_line (pfile); + + /* Compensate for the increment in linemap_add that occurs in + _cpp_do_file_change. We're currently at the start of the line + *following* the #line directive. A separate source_location for this + location makes no sense (until we do the LC_LEAVE), and + complicates LAST_SOURCE_LINE_LOCATION. */ + pfile->line_table->highest_location--; + _cpp_do_file_change (pfile, reason, new_file, new_lineno, new_sysp); } diff --git a/libcpp/files.c b/libcpp/files.c index 06ccd0fd695..c8c19021f56 100644 --- a/libcpp/files.c +++ b/libcpp/files.c @@ -912,13 +912,14 @@ _cpp_stack_include (cpp_reader *pfile, const char *fname, int angle_brackets, file = _cpp_find_file (pfile, fname, dir, false, angle_brackets); - /* Compensate for the increment in linemap_add. In the case of a - normal #include, we're currently at the start of the line - *following* the #include. A separate source_location for this - location makes no sense (until we do the LC_LEAVE), and - complicates LAST_SOURCE_LINE_LOCATION. This does not apply if we - found a PCH file (in which case linemap_add is not called) or we - were included from the command-line. */ + /* Compensate for the increment in linemap_add that occurs in + _cpp_stack_file. In the case of a normal #include, we're + currently at the start of the line *following* the #include. A + separate source_location for this location makes no sense (until + we do the LC_LEAVE), and complicates LAST_SOURCE_LINE_LOCATION. + This does not apply if we found a PCH file (in which case + linemap_add is not called) or we were included from the + command-line. */ if (file->pchname == NULL && file->err_no == 0 && type != IT_CMDLINE) pfile->line_table->highest_location--; diff --git a/libjava/ChangeLog b/libjava/ChangeLog index cb57e6f71eb..024e0181923 100644 --- a/libjava/ChangeLog +++ b/libjava/ChangeLog @@ -1,3 +1,9 @@ +2009-05-12 Alexandre Oliva <aoliva@redhat.com> + + * configure.ac: Insert libgcjdir in the GCJ passed in the + environment, rather than overriding completely. + * configure: Rebuilt. + 2009-04-28 Dave Korn <dave.korn.cygwin@gmail.com> * testsuite/libjava.jvmti/jvmti-interp.exp diff --git a/libjava/configure b/libjava/configure index b2c24670474..8fa8ed3616d 100755 --- a/libjava/configure +++ b/libjava/configure @@ -5469,23 +5469,33 @@ else which_gcj=path fi fi +libgcjdir=`${PWDCMD-pwd}` +case $GCJ in +*" -B"*) + # Just in case there is a comma in the build dir, quote it for the + # sed command below. + case $libgcjdir in + *[,\\]*) qlibgcjdir=`echo "$libgcjdir" | sed 's:[,\\]:\\&:g'`;; + *) qlibgcjdir=$libgcjdir;; + esac + GCJ=`echo "$GCJ" | sed "s, -B, -B$qlibgcjdir/&,"` + ;; +*) + GCJ=$GCJ" -B$libgcjdir/" + ;; +esac case "${which_gcj}" in built) - GCJ="$built_gcc_dir/gcj -B`${PWDCMD-pwd}`/ -B$built_gcc_dir/" GCJH='$(top_builddir)/$(MULTIBUILDTOP)../../$(host_subdir)/gcc/gcjh' ;; cross) if test "x${with_newlib}" = "xyes"; then # FIXME (comment): Why is this needed? GCC_UNWIND_INCLUDE= - GCJ="${target_noncanonical}-gcj" - else - GCJ="${target_noncanonical}-gcj -B`${PWDCMD-pwd}`/" fi GCJH='$(target_noncanonical)-gcjh' ;; path) - GCJ="gcj -B`${PWDCMD-pwd}`/" GCJH=gcjh ;; esac @@ -6003,13 +6013,13 @@ if test "${lt_cv_nm_interface+set}" = set; then else lt_cv_nm_interface="BSD nm" echo "int some_variable = 0;" > conftest.$ac_ext - (eval echo "\"\$as_me:6006: $ac_compile\"" >&5) + (eval echo "\"\$as_me:6016: $ac_compile\"" >&5) (eval "$ac_compile" 2>conftest.err) cat conftest.err >&5 - (eval echo "\"\$as_me:6009: $NM \\\"conftest.$ac_objext\\\"\"" >&5) + (eval echo "\"\$as_me:6019: $NM \\\"conftest.$ac_objext\\\"\"" >&5) (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out) cat conftest.err >&5 - (eval echo "\"\$as_me:6012: output\"" >&5) + (eval echo "\"\$as_me:6022: output\"" >&5) cat conftest.out >&5 if $GREP 'External.*some_variable' conftest.out > /dev/null; then lt_cv_nm_interface="MS dumpbin" @@ -7156,7 +7166,7 @@ ia64-*-hpux*) ;; *-*-irix6*) # Find out which ABI we are using. - echo '#line 7159 "configure"' > conftest.$ac_ext + echo '#line 7169 "configure"' > conftest.$ac_ext if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5 (eval $ac_compile) 2>&5 ac_status=$? @@ -9539,11 +9549,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:9542: $lt_compile\"" >&5) + (eval echo "\"\$as_me:9552: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:9546: \$? = $ac_status" >&5 + echo "$as_me:9556: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -9878,11 +9888,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:9881: $lt_compile\"" >&5) + (eval echo "\"\$as_me:9891: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:9885: \$? = $ac_status" >&5 + echo "$as_me:9895: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -9983,11 +9993,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:9986: $lt_compile\"" >&5) + (eval echo "\"\$as_me:9996: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:9990: \$? = $ac_status" >&5 + echo "$as_me:10000: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -10038,11 +10048,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:10041: $lt_compile\"" >&5) + (eval echo "\"\$as_me:10051: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:10045: \$? = $ac_status" >&5 + echo "$as_me:10055: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -12905,7 +12915,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 12908 "configure" +#line 12918 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -13001,7 +13011,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 13004 "configure" +#line 13014 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -15027,11 +15037,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:15030: $lt_compile\"" >&5) + (eval echo "\"\$as_me:15040: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:15034: \$? = $ac_status" >&5 + echo "$as_me:15044: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -15126,11 +15136,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:15129: $lt_compile\"" >&5) + (eval echo "\"\$as_me:15139: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:15133: \$? = $ac_status" >&5 + echo "$as_me:15143: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -15178,11 +15188,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:15181: $lt_compile\"" >&5) + (eval echo "\"\$as_me:15191: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:15185: \$? = $ac_status" >&5 + echo "$as_me:15195: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -16595,11 +16605,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:16598: $lt_compile\"" >&5) + (eval echo "\"\$as_me:16608: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:16602: \$? = $ac_status" >&5 + echo "$as_me:16612: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -16928,11 +16938,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:16931: $lt_compile\"" >&5) + (eval echo "\"\$as_me:16941: $lt_compile\"" >&5) (eval "$lt_compile" 2>conftest.err) ac_status=$? cat conftest.err >&5 - echo "$as_me:16935: \$? = $ac_status" >&5 + echo "$as_me:16945: \$? = $ac_status" >&5 if (exit $ac_status) && test -s "$ac_outfile"; then # The compiler can only warn and ignore the option if not recognized # So say no if there are warnings other than the usual output. @@ -17027,11 +17037,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:17030: $lt_compile\"" >&5) + (eval echo "\"\$as_me:17040: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:17034: \$? = $ac_status" >&5 + echo "$as_me:17044: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -17079,11 +17089,11 @@ else -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ -e 's:$: $lt_compiler_flag:'` - (eval echo "\"\$as_me:17082: $lt_compile\"" >&5) + (eval echo "\"\$as_me:17092: $lt_compile\"" >&5) (eval "$lt_compile" 2>out/conftest.err) ac_status=$? cat out/conftest.err >&5 - echo "$as_me:17086: \$? = $ac_status" >&5 + echo "$as_me:17096: \$? = $ac_status" >&5 if (exit $ac_status) && test -s out/conftest2.$ac_objext then # The compiler can only warn and ignore the option if not recognized @@ -18775,7 +18785,7 @@ if test "${enable_sjlj_exceptions+set}" = set; then : else cat > conftest.$ac_ext << EOF -#line 18778 "configure" +#line 18788 "configure" struct S { ~S(); }; void bar(); void foo() @@ -29106,6 +29116,9 @@ ac_configure_args="${multilib_arg} ${ac_configure_args}" multi_basedir="$multi_basedir" CONFIG_SHELL=${CONFIG_SHELL-/bin/sh} CC="$CC" +CXX="$CXX" +GFORTRAN="$GFORTRAN" +GCJ="$GCJ" AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac_aux_dir" diff --git a/libjava/configure.ac b/libjava/configure.ac index c57356a8cde..3074a0c0fd4 100644 --- a/libjava/configure.ac +++ b/libjava/configure.ac @@ -409,23 +409,33 @@ else which_gcj=path fi fi +libgcjdir=`${PWDCMD-pwd}` +case $GCJ in +*" -B"*) + # Just in case there is a comma in the build dir, quote it for the + # sed command below. + case $libgcjdir in + *[[,\\]]*) qlibgcjdir=`echo "$libgcjdir" | sed 's:[[,\\]]:\\&:g'`;; + *) qlibgcjdir=$libgcjdir;; + esac + GCJ=`echo "$GCJ" | sed "s, -B, -B$qlibgcjdir/&,"` + ;; +*) + GCJ=$GCJ" -B$libgcjdir/" + ;; +esac case "${which_gcj}" in built) - GCJ="$built_gcc_dir/gcj -B`${PWDCMD-pwd}`/ -B$built_gcc_dir/" GCJH='$(top_builddir)/$(MULTIBUILDTOP)../../$(host_subdir)/gcc/gcjh' ;; cross) if test "x${with_newlib}" = "xyes"; then # FIXME (comment): Why is this needed? GCC_UNWIND_INCLUDE= - GCJ="${target_noncanonical}-gcj" - else - GCJ="${target_noncanonical}-gcj -B`${PWDCMD-pwd}`/" fi GCJH='$(target_noncanonical)-gcjh' ;; path) - GCJ="gcj -B`${PWDCMD-pwd}`/" GCJH=gcjh ;; esac diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 45e0f2b6b39..651b53e7164 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,6 +1,54 @@ +2009-05-14 Paolo Carlini <paolo.carlini@oracle.com> + + PR libstdc++/40123 + * random.tcc (independent_bits_engine<>::operator()()): Use + result_type(1), not 1UL. + + * random.tcc (independent_bits_engine<>::operator()()): Use _M_b.max() + and _M_b.min(), instead of this->max() and this->min(). + + * random.h (_ShiftMin1): Remove, adjust everywhere. + + * random.tcc: Minor cosmetic changes. + +2009-05-14 Paolo Carlini <paolo.carlini@oracle.com> + + * include/bits/random.tcc (cauchy_distribution<>:: + operator()(_UniformRandomNumberGenerator&, const param_type&)): + Avoid M_PI, a glibc extension. + +2009-05-13 Ben Elliston <bje@au.ibm.com> + + * include/Makefile.am (PCHFLAGS): Remove -Winvalid-pch. + * include/Makefile.in: Likewise. + +2009-05-13 Ben Elliston <bje@au.ibm.com> + + * src/compatibility.cc (_ZTIe, _ZTIPe, _ZTIPKe): Change type to + const void * const. + +2009-05-12 Edward Smith-Rowland <3dw4rd@verizon.net> + + * doc/xml/manual/status_cxx200x.xml: Note missing constexpr for + random number engines, complex, bitset, array, time utilities, and + char_traits. + +2009-05-12 Jonathan Wakely <jwakely.gcc@gmail.com> + + * libsupc++/exception: Include nested_exception.h in C++0x mode. + * libsupc++/nested_exception.h: New. + * libsupc++/Makefile.am: Add new header. + * libsupc++/Makefile.in: Regenerate. + * testsuite/18_support/nested_exception/rethrow_nested.cc: New. + * testsuite/18_support/nested_exception/throw_with_nested.cc: New. + * testsuite/18_support/nested_exception/cons.cc: New. + * testsuite/18_support/nested_exception/nested_ptr.cc: New. + * testsuite/18_support/nested_exception/rethrow_if_nested.cc: New. + * doc/xml/manual/status_cxx200x.xml: Adjust. + 2009-05-07 Paolo Carlini <paolo.carlini@oracle.com> - * include/ext/throw_allocator.h: Remove redundante include. + * include/ext/throw_allocator.h: Remove redundant include. 2009-05-07 Paolo Carlini <paolo.carlini@oracle.com> @@ -26,10 +74,10 @@ 2009-05-06 Johannes Singler <singler@ira.uka.de> - PR libstdc++/39546 - * include/parallel/algo.h (find_switch): - Parametrize binder2nd with const T& instead of T. - * testsuite/25_algorithms/find/39546.cc: new test case + PR libstdc++/39546 + * include/parallel/algo.h (find_switch): + Parametrize binder2nd with const T& instead of T. + * testsuite/25_algorithms/find/39546.cc: new test case 2009-05-06 Paolo Carlini <paolo.carlini@oracle.com> diff --git a/libstdc++-v3/doc/xml/manual/status_cxx200x.xml b/libstdc++-v3/doc/xml/manual/status_cxx200x.xml index 159bc9fec39..61b2ec2c2ab 100644 --- a/libstdc++-v3/doc/xml/manual/status_cxx200x.xml +++ b/libstdc++-v3/doc/xml/manual/status_cxx200x.xml @@ -235,10 +235,9 @@ particular release. <entry></entry> </row> <row> - <?dbhtml bgcolor="#C8B0B0" ?> <entry>18.8.6</entry> <entry>Class <code>nested_exception</code></entry> - <entry>N</entry> + <entry>Y</entry> <entry></entry> </row> <row> @@ -404,8 +403,8 @@ particular release. <row> <entry>20.3.6</entry> <entry>Class template <code>bitset</code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>20.4</entry> @@ -942,8 +941,8 @@ particular release. <row> <entry>20.9.2.2</entry> <entry><code>duration_values</code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>20.9.2.3</entry> @@ -954,14 +953,14 @@ particular release. <row> <entry>20.9.3</entry> <entry>Class template <code>duration</code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>20.9.4</entry> <entry>Class template <code>time_point</code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>20.9.5</entry> @@ -1034,26 +1033,26 @@ particular release. <row> <entry>21.2.3.1</entry> <entry>struct <code>char_traits<char></code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>21.2.3.2</entry> <entry>struct <code>char_traits<char16_t></code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>21.2.3.3</entry> <entry>struct <code>char_traits<char32_t></code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>21.2.3.4</entry> <entry>struct <code>char_traits<wchar_t></code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>21.3</entry> @@ -1325,8 +1324,8 @@ particular release. <row> <entry>23.3.1</entry> <entry>Class template <code>array</code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>23.3.2</entry> @@ -1629,8 +1628,8 @@ particular release. <row> <entry>26.4</entry> <entry>Complex numbers</entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5</entry> @@ -1662,19 +1661,19 @@ particular release. <entry>26.5.3.1</entry> <entry>Class template <code>linear_congruential_engine</code></entry> <entry>Y</entry> - <entry></entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5.3.2</entry> <entry>Class template <code>mersenne_twister_engine</code></entry> <entry>Y</entry> - <entry></entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5.3.3</entry> <entry>Class template <code>subtract_with_carry_engine</code></entry> <entry>Y</entry> - <entry></entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5.4</entry> @@ -1686,19 +1685,19 @@ particular release. <entry>26.5.4.1</entry> <entry>Class template <code>discard_block_engine</code></entry> <entry>Y</entry> - <entry></entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5.4.2</entry> <entry>Class template <code>independent_bits_engine</code></entry> <entry>Y</entry> - <entry></entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5.4.3</entry> <entry>Class template <code>shuffle_order_engine</code></entry> <entry>Y</entry> - <entry></entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5.5</entry> @@ -1710,7 +1709,7 @@ particular release. <entry>26.5.6</entry> <entry>Class <code>random_device</code></entry> <entry>Y</entry> - <entry></entry> + <entry>Missing constexpr</entry> </row> <row> <entry>26.5.7</entry> @@ -2375,8 +2374,8 @@ particular release. <row> <entry>30.4.5.1</entry> <entry><code>once_flag</code></entry> - <entry>Y</entry> - <entry></entry> + <entry>Partial</entry> + <entry>Missing constexpr</entry> </row> <row> <entry>30.4.5.2</entry> diff --git a/libstdc++-v3/include/Makefile.am b/libstdc++-v3/include/Makefile.am index 6e7b28303e1..6a9c4f09ed4 100644 --- a/libstdc++-v3/include/Makefile.am +++ b/libstdc++-v3/include/Makefile.am @@ -852,7 +852,7 @@ pch_output_dirs = \ ${pch1_output_builddir} ${pch2_output_builddir} ${pch3_output_builddir} pch_output_anchors = \ ${pch1_output_anchor} ${pch2_output_anchor} ${pch3_output_anchor} -PCHFLAGS=-Winvalid-pch -x c++-header $(CXXFLAGS) +PCHFLAGS=-x c++-header $(CXXFLAGS) if GLIBCXX_BUILD_PCH pch_build = ${pch_output} else diff --git a/libstdc++-v3/include/Makefile.in b/libstdc++-v3/include/Makefile.in index 9f8782c5ea8..4ac2739cb43 100644 --- a/libstdc++-v3/include/Makefile.in +++ b/libstdc++-v3/include/Makefile.in @@ -1098,7 +1098,7 @@ pch_output_dirs = \ pch_output_anchors = \ ${pch1_output_anchor} ${pch2_output_anchor} ${pch3_output_anchor} -PCHFLAGS = -Winvalid-pch -x c++-header $(CXXFLAGS) +PCHFLAGS = -x c++-header $(CXXFLAGS) @GLIBCXX_BUILD_PCH_FALSE@pch_build = @GLIBCXX_BUILD_PCH_TRUE@pch_build = ${pch_output} diff --git a/libstdc++-v3/include/bits/random.h b/libstdc++-v3/include/bits/random.h index 425420607ce..b5ccf8a1680 100644 --- a/libstdc++-v3/include/bits/random.h +++ b/libstdc++-v3/include/bits/random.h @@ -68,23 +68,6 @@ namespace std struct _Shift<_UIntType, __w, true> { static const _UIntType __value = _UIntType(1) << __w; }; - // XXX need constexpr - template<typename _UIntType, size_t __w, - bool = __w < static_cast<size_t> - (std::numeric_limits<_UIntType>::digits)> - struct _ShiftMin1 - { - static const _UIntType __value = - __gnu_cxx::__numeric_traits<_UIntType>::__max; - }; - - template<typename _UIntType, size_t __w> - struct _ShiftMin1<_UIntType, __w, true> - { - static const _UIntType __value = - (_UIntType(1) << __w) - _UIntType(1); - }; - template<typename _Tp, _Tp __a, _Tp __c, _Tp __m, bool> struct _Mod; @@ -395,11 +378,11 @@ namespace std static_assert(__w <= static_cast<size_t>(numeric_limits<_UIntType>::digits), "mersenne_twister_engine template arguments out of bounds"); - static_assert(__a <= __detail::_ShiftMin1<_UIntType, __w>::__value, + static_assert(__a <= (__detail::_Shift<_UIntType, __w>::__value - 1), "mersenne_twister_engine template arguments out of bounds"); - static_assert(__b <= __detail::_ShiftMin1<_UIntType, __w>::__value, + static_assert(__b <= (__detail::_Shift<_UIntType, __w>::__value - 1), "mersenne_twister_engine template arguments out of bounds"); - static_assert(__c <= __detail::_ShiftMin1<_UIntType, __w>::__value, + static_assert(__c <= (__detail::_Shift<_UIntType, __w>::__value - 1), "mersenne_twister_engine template arguments out of bounds"); public: @@ -459,7 +442,7 @@ namespace std */ result_type max() const - { return __detail::_ShiftMin1<_UIntType, __w>::__value; } + { return __detail::_Shift<_UIntType, __w>::__value - 1; } /** * @brief Discard a sequence of random numbers. @@ -644,7 +627,7 @@ namespace std */ result_type max() const - { return __detail::_ShiftMin1<_UIntType, __w>::__value; } + { return __detail::_Shift<_UIntType, __w>::__value - 1; } /** * @brief Discard a sequence of random numbers. @@ -1040,7 +1023,7 @@ namespace std */ result_type max() const - { return __detail::_ShiftMin1<_UIntType, __w>::__value; } + { return __detail::_Shift<_UIntType, __w>::__value - 1; } /** * @brief Discard a sequence of random numbers. diff --git a/libstdc++-v3/include/bits/random.tcc b/libstdc++-v3/include/bits/random.tcc index 8944c116b7e..b110f99740c 100644 --- a/libstdc++-v3/include/bits/random.tcc +++ b/libstdc++-v3/include/bits/random.tcc @@ -554,8 +554,8 @@ namespace std independent_bits_engine<_RandomNumberEngine, __w, _UIntType>:: operator()() { - const long double __r = static_cast<long double>(this->max()) - - static_cast<long double>(this->min()) + 1.0L; + const long double __r = static_cast<long double>(_M_b.max()) + - static_cast<long double>(_M_b.min()) + 1.0L; const result_type __m = std::log10(__r) / std::log10(2.0L); result_type __n, __n0, __y0, __y1, __s0, __s1; for (size_t __i = 0; __i < 2; ++__i) @@ -564,8 +564,8 @@ namespace std __n0 = __n - __w % __n; const result_type __w0 = __w / __n; const result_type __w1 = __w0 + 1; - __s0 = 1UL << __w0; - __s1 = 1UL << __w1; + __s0 = result_type(1) << __w0; + __s1 = result_type(1) << __w1; __y0 = __s0 * (__r / __s0); __y1 = __s1 * (__r / __s1); if (__r - __y0 <= __y0 / __n) @@ -577,19 +577,17 @@ namespace std { result_type __u; do - __u = _M_b() - this->min(); + __u = _M_b() - _M_b.min(); while (__u >= __y0); - __sum = __s0 * __sum - + __u % __s0; + __sum = __s0 * __sum + __u % __s0; } for (size_t __k = __n0; __k < __n; ++__k) { result_type __u; do - __u = _M_b() - this->min(); + __u = _M_b() - _M_b.min(); while (__u >= __y1); - __sum = __s1 * __sum - + __u % __s1; + __sum = __s1 * __sum + __u % __s1; } return __sum; } @@ -1653,12 +1651,11 @@ namespace std __aurng(__urng); _RealType __u; do - { - __u = __aurng(); - } + __u = __aurng(); while (__u == 0.5); - return __p.a() + __p.b() * std::tan(M_PI * __u); + const _RealType __pi = 3.1415926535897932384626433832795029L; + return __p.a() + __p.b() * std::tan(__pi * __u); } template<typename _RealType, typename _CharT, typename _Traits> @@ -2649,12 +2646,12 @@ namespace std _RandomAccessIterator __end) { typedef typename iterator_traits<_RandomAccessIterator>::value_type - __Type; + _Type; if (__begin == __end) return; - std::fill(__begin, __end, __Type(0x8b8b8b8bU)); + std::fill(__begin, __end, _Type(0x8b8b8b8bU)); const size_t __n = __end - __begin; const size_t __s = _M_v.size(); @@ -2669,21 +2666,21 @@ namespace std for (size_t __k = 0; __k < __m; ++__k) { - __Type __arg = __begin[__k % __n] - ^ __begin[(__k + __p) % __n] - ^ __begin[(__k - 1) % __n]; - __Type __r1 = __arg ^ (__arg << 27); - __r1 = __detail::__mod<__Type, 1664525U, 0U, - __detail::_Shift<__Type, 32>::__value>(__r1); - __Type __r2 = __r1; + _Type __arg = (__begin[__k % __n] + ^ __begin[(__k + __p) % __n] + ^ __begin[(__k - 1) % __n]); + _Type __r1 = __arg ^ (__arg << 27); + __r1 = __detail::__mod<_Type, 1664525U, 0U, + __detail::_Shift<_Type, 32>::__value>(__r1); + _Type __r2 = __r1; if (__k == 0) __r2 += __s; else if (__k <= __s) __r2 += __k % __n + _M_v[__k - 1]; else __r2 += __k % __n; - __r2 = __detail::__mod<__Type, 1U, 0U, - __detail::_Shift<__Type, 32>::__value>(__r2); + __r2 = __detail::__mod<_Type, 1U, 0U, + __detail::_Shift<_Type, 32>::__value>(__r2); __begin[(__k + __p) % __n] += __r1; __begin[(__k + __q) % __n] += __r2; __begin[__k % __n] = __r2; @@ -2691,15 +2688,15 @@ namespace std for (size_t __k = __m; __k < __m + __n; ++__k) { - __Type __arg = __begin[__k % __n] - + __begin[(__k + __p) % __n] - + __begin[(__k - 1) % __n]; - __Type __r3 = __arg ^ (__arg << 27); - __r3 = __detail::__mod<__Type, 1566083941U, 0U, - __detail::_Shift<__Type, 32>::__value>(__r3); - __Type __r4 = __r3 - __k % __n; - __r4 = __detail::__mod<__Type, 1U, 0U, - __detail::_Shift<__Type, 32>::__value>(__r4); + _Type __arg = (__begin[__k % __n] + + __begin[(__k + __p) % __n] + + __begin[(__k - 1) % __n]); + _Type __r3 = __arg ^ (__arg << 27); + __r3 = __detail::__mod<_Type, 1566083941U, 0U, + __detail::_Shift<_Type, 32>::__value>(__r3); + _Type __r4 = __r3 - __k % __n; + __r4 = __detail::__mod<_Type, 1U, 0U, + __detail::_Shift<_Type, 32>::__value>(__r4); __begin[(__k + __p) % __n] ^= __r4; __begin[(__k + __q) % __n] ^= __r3; __begin[__k % __n] = __r4; diff --git a/libstdc++-v3/libsupc++/Makefile.am b/libstdc++-v3/libsupc++/Makefile.am index 5c86a1efd7e..b84b5e46728 100644 --- a/libstdc++-v3/libsupc++/Makefile.am +++ b/libstdc++-v3/libsupc++/Makefile.am @@ -33,7 +33,7 @@ noinst_LTLIBRARIES = libsupc++convenience.la headers = \ exception new typeinfo cxxabi.h cxxabi-forced.h exception_defines.h \ - initializer_list exception_ptr.h + initializer_list exception_ptr.h nested_exception.h if GLIBCXX_HOSTED c_sources = \ diff --git a/libstdc++-v3/libsupc++/Makefile.in b/libstdc++-v3/libsupc++/Makefile.in index 26fbd541f59..50ede6abf64 100644 --- a/libstdc++-v3/libsupc++/Makefile.in +++ b/libstdc++-v3/libsupc++/Makefile.in @@ -367,7 +367,7 @@ toolexeclib_LTLIBRARIES = libsupc++.la noinst_LTLIBRARIES = libsupc++convenience.la headers = \ exception new typeinfo cxxabi.h cxxabi-forced.h exception_defines.h \ - initializer_list exception_ptr.h + initializer_list exception_ptr.h nested_exception.h @GLIBCXX_HOSTED_TRUE@c_sources = \ @GLIBCXX_HOSTED_TRUE@ cp-demangle.c diff --git a/libstdc++-v3/libsupc++/exception b/libstdc++-v3/libsupc++/exception index c8b334fe945..be7dec69ab7 100644 --- a/libstdc++-v3/libsupc++/exception +++ b/libstdc++-v3/libsupc++/exception @@ -146,6 +146,7 @@ _GLIBCXX_END_NAMESPACE #if (defined(__GXX_EXPERIMENTAL_CXX0X__) \ && defined(_GLIBCXX_ATOMIC_BUILTINS_4)) #include <exception_ptr.h> +#include <nested_exception.h> #endif #endif diff --git a/libstdc++-v3/libsupc++/nested_exception.h b/libstdc++-v3/libsupc++/nested_exception.h new file mode 100644 index 00000000000..752c595b49b --- /dev/null +++ b/libstdc++-v3/libsupc++/nested_exception.h @@ -0,0 +1,177 @@ +// Nested Exception support header (nested_exception class) for -*- C++ -*- + +// Copyright (C) 2009 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// Under Section 7 of GPL version 3, you are granted additional +// permissions described in the GCC Runtime Library Exception, version +// 3.1, as published by the Free Software Foundation. + +// You should have received a copy of the GNU General Public License and +// a copy of the GCC Runtime Library Exception along with this program; +// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +// <http://www.gnu.org/licenses/>. + +/** @file nested_exception.h + * This is an internal header file, included by other headers and the + * implementation. You should not attempt to use it directly. + */ + +#ifndef _GLIBCXX_NESTED_EXCEPTION_H +#define _GLIBCXX_NESTED_EXCEPTION_H 1 + +#pragma GCC visibility push(default) + +#ifndef __GXX_EXPERIMENTAL_CXX0X__ +# include <c++0x_warning.h> +#else + +#include <bits/c++config.h> + +#if !defined(_GLIBCXX_ATOMIC_BUILTINS_4) +# error This platform does not support exception propagation. +#endif + +extern "C++" { + +namespace std +{ + /** + * @addtogroup exceptions + * @{ + */ + + /// nested_exception + class nested_exception + { + public: + nested_exception() throw() : _M_ptr(current_exception()) { } + + nested_exception(const nested_exception&) throw() = default; + + nested_exception& operator=(const nested_exception&) throw() = default; + + virtual ~nested_exception() = default; + + void + rethrow_nested() const __attribute__ ((__noreturn__)) + { rethrow_exception(_M_ptr); } + + exception_ptr + nested_ptr() const + { return _M_ptr; } + + private: + exception_ptr _M_ptr; + }; + + template<typename _Except> + struct _Nested_exception : public _Except, public nested_exception + { + explicit + _Nested_exception(_Except&& __ex) + : _Except(static_cast<_Except&&>(__ex)) + { } + }; + + template<typename _Ex> + struct __get_nested_helper + { + static const nested_exception* + _S_get(const _Ex& __ex) + { + return dynamic_cast<const nested_exception*>(&__ex); + } + }; + + template<typename _Ex> + struct __get_nested_helper<_Ex*> + { + static const nested_exception* + _S_get(const _Ex* __ex) + { + return dynamic_cast<const nested_exception*>(__ex); + } + }; + + template<typename _Ex> + inline const nested_exception* + __get_nested_exception(const _Ex& __ex) + { + return __get_nested_helper<_Ex>::_S_get(__ex); + } + + template<typename _Ex> + void + __throw_with_nested(_Ex&&, const nested_exception* = 0) + __attribute__ ((__noreturn__)); + + template<typename _Ex> + void + __throw_with_nested(_Ex&&, ...) __attribute__ ((__noreturn__)); + + // This function should never be called, but is needed to avoid a warning + // about ambiguous base classes when instantiating throw_with_nested<_Ex>() + // with a type that has an accessible nested_exception base. + template<typename _Ex> + inline void + __throw_with_nested(_Ex&& __ex, const nested_exception* = 0) + { + throw __ex; + } + + template<typename _Ex> + inline void + __throw_with_nested(_Ex&& __ex, ...) + { + throw _Nested_exception<_Ex>(static_cast<_Ex&&>(__ex)); + } + + template<typename _Ex> + void + throw_with_nested(_Ex __ex) __attribute__ ((__noreturn__)); + + template<typename _Ex> + inline void + throw_with_nested(_Ex __ex) + { + if (__get_nested_exception(__ex)) + throw __ex; + __throw_with_nested(static_cast<_Ex&&>(__ex), &__ex); + } + + template<typename _Ex> + inline void + rethrow_if_nested(const _Ex& __ex) + { + if (const nested_exception* __nested = __get_nested_exception(__ex)) + __nested->rethrow_nested(); + } + + // see n2619 + inline void + rethrow_if_nested(const nested_exception& __ex) + { + __ex.rethrow_nested(); + } + + // @} group exceptions +} // namespace std + +} // extern "C++" + +#endif // __GXX_EXPERIMENTAL_CXX0X__ + +#pragma GCC visibility pop + +#endif // _GLIBCXX_NESTED_EXCEPTION_H diff --git a/libstdc++-v3/src/compatibility.cc b/libstdc++-v3/src/compatibility.cc index 1e1897cd12f..8889749eed8 100644 --- a/libstdc++-v3/src/compatibility.cc +++ b/libstdc++-v3/src/compatibility.cc @@ -502,13 +502,13 @@ extern void *_ZTVN10__cxxabiv119__pointer_type_infoE[]; extern __attribute__((used, weak)) const char _ZTSe[2] = "e"; extern __attribute__((used, weak)) const char _ZTSPe[3] = "Pe"; extern __attribute__((used, weak)) const char _ZTSPKe[4] = "PKe"; -extern __attribute__((used, weak)) const void *_ZTIe[2] +extern __attribute__((used, weak)) const void * const _ZTIe[2] = { (void *) &_ZTVN10__cxxabiv123__fundamental_type_infoE[2], (void *) _ZTSe }; -extern __attribute__((used, weak)) const void *_ZTIPe[4] +extern __attribute__((used, weak)) const void * const _ZTIPe[4] = { (void *) &_ZTVN10__cxxabiv119__pointer_type_infoE[2], (void *) _ZTSPe, (void *) 0L, (void *) _ZTIe }; -extern __attribute__((used, weak)) const void *_ZTIPKe[4] +extern __attribute__((used, weak)) const void * const _ZTIPKe[4] = { (void *) &_ZTVN10__cxxabiv119__pointer_type_infoE[2], (void *) _ZTSPKe, (void *) 1L, (void *) _ZTIe }; #endif // _GLIBCXX_LONG_DOUBLE_COMPAT diff --git a/libstdc++-v3/testsuite/18_support/nested_exception/cons.cc b/libstdc++-v3/testsuite/18_support/nested_exception/cons.cc new file mode 100644 index 00000000000..dcbd36ec7e2 --- /dev/null +++ b/libstdc++-v3/testsuite/18_support/nested_exception/cons.cc @@ -0,0 +1,53 @@ +// { dg-options "-std=gnu++0x" } +// { dg-require-atomic-builtins "" } + +// Copyright (C) 2009 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// <http://www.gnu.org/licenses/>. + +#include <exception> +#include <testsuite_hooks.h> + +void test01() +{ + bool test __attribute__((unused)) = true; + + std::nested_exception e; + + VERIFY( !e.nested_ptr() ); +} + +void test02() +{ + bool test __attribute__((unused)) = true; + + try + { + throw 42; + } + catch (...) + { + std::nested_exception e; + VERIFY( e.nested_ptr() == std::current_exception() ); + } +} + +int main() +{ + test01(); + test02(); + return 0; +} diff --git a/libstdc++-v3/testsuite/18_support/nested_exception/nested_ptr.cc b/libstdc++-v3/testsuite/18_support/nested_exception/nested_ptr.cc new file mode 100644 index 00000000000..5a3ab62070e --- /dev/null +++ b/libstdc++-v3/testsuite/18_support/nested_exception/nested_ptr.cc @@ -0,0 +1,71 @@ +// { dg-options "-std=gnu++0x" } +// { dg-require-atomic-builtins "" } + +// Copyright (C) 2009 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// <http://www.gnu.org/licenses/>. + +#include <exception> +#include <testsuite_hooks.h> + +void test01() +{ + bool test __attribute__((unused)) = true; + + try + { + throw std::nested_exception(); + } + catch (const std::nested_exception& e) + { + VERIFY( !e.nested_ptr() ); + } +} + +void test02() +{ + bool test __attribute__((unused)) = true; + + try + { + throw 42; + } + catch (...) + { + try + { + throw std::nested_exception(); + } + catch (const std::nested_exception& e) + { + try + { + std::rethrow_exception( e.nested_ptr() ); + } + catch(const int& i) + { + VERIFY( i == 42 ); + } + } + } +} + +int main() +{ + test01(); + test02(); + return 0; +} diff --git a/libstdc++-v3/testsuite/18_support/nested_exception/rethrow_if_nested.cc b/libstdc++-v3/testsuite/18_support/nested_exception/rethrow_if_nested.cc new file mode 100644 index 00000000000..37d1d80f8e8 --- /dev/null +++ b/libstdc++-v3/testsuite/18_support/nested_exception/rethrow_if_nested.cc @@ -0,0 +1,110 @@ +// { dg-options "-std=gnu++0x" } +// { dg-require-atomic-builtins "" } + +// Copyright (C) 2009 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// <http://www.gnu.org/licenses/>. + +#include <exception> +#include <testsuite_hooks.h> + +struct derived : std::nested_exception { }; + +struct base { virtual ~base() = default; }; + +struct derived2 : base, std::nested_exception { }; + +void test01() +{ + bool test __attribute__((unused)) = false; + + try + { + throw 42; + } + catch (...) + { + derived d; + try + { + std::rethrow_if_nested(d); + } + catch (const int& i) + { + test = true; + VERIFY( i == 42 ); + } + } + + VERIFY( test ); +} + +void test02() +{ + bool test __attribute__((unused)) = false; + + try + { + throw base(); + } + catch (const base& b) + { + std::rethrow_if_nested(b); + test = true; + } + + VERIFY( test ); +} + +void test03() +{ + bool test __attribute__((unused)) = false; + + try + { + throw 42; + } + catch (...) + { + try + { + throw derived2(); + } + catch (const base& b) + { + try + { + std::rethrow_if_nested(b); + } + catch (const int& i) + { + VERIFY( i == 42 ); + test = true; + } + } + } + + VERIFY( test ); +} + + +int main() +{ + test01(); + test02(); + test03(); + return 0; +} diff --git a/libstdc++-v3/testsuite/18_support/nested_exception/rethrow_nested.cc b/libstdc++-v3/testsuite/18_support/nested_exception/rethrow_nested.cc new file mode 100644 index 00000000000..fca9c4c8038 --- /dev/null +++ b/libstdc++-v3/testsuite/18_support/nested_exception/rethrow_nested.cc @@ -0,0 +1,53 @@ +// { dg-options "-std=gnu++0x" } +// { dg-require-atomic-builtins "" } + +// Copyright (C) 2009 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// <http://www.gnu.org/licenses/>. + +#include <exception> +#include <testsuite_hooks.h> + +void test01() +{ + bool test __attribute__((unused)) = false; + + try + { + try + { + throw 42; + } + catch (...) + { + std::nested_exception e; + e.rethrow_nested(); + } + } + catch(const int& i) + { + test = true; + VERIFY( i == 42 ); + } + + VERIFY( test ); +} + +int main() +{ + test01(); + return 0; +} diff --git a/libstdc++-v3/testsuite/18_support/nested_exception/throw_with_nested.cc b/libstdc++-v3/testsuite/18_support/nested_exception/throw_with_nested.cc new file mode 100644 index 00000000000..a4f05f09f30 --- /dev/null +++ b/libstdc++-v3/testsuite/18_support/nested_exception/throw_with_nested.cc @@ -0,0 +1,79 @@ +// { dg-options "-std=gnu++0x" } +// { dg-require-atomic-builtins "" } + +// Copyright (C) 2009 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// <http://www.gnu.org/licenses/>. + +#include <exception> +#include <testsuite_hooks.h> + +struct derived : std::nested_exception { }; + +struct not_derived { virtual ~not_derived() = default; }; + +void test01() +{ + bool test __attribute__((unused)) = false; + + try + { + std::throw_with_nested(derived()); + } + catch (const std::nested_exception& e) + { + VERIFY( !e.nested_ptr() ); + try + { + throw; + } + catch (const derived&) + { + test = true; + } + } + VERIFY( test ); +} + +void test02() +{ + bool test __attribute__((unused)) = false; + + try + { + std::throw_with_nested(not_derived()); + } + catch (const std::nested_exception& e) + { + VERIFY( !e.nested_ptr() ); + try + { + throw; + } + catch (const not_derived&) + { + test = true; + } + } + VERIFY( test ); +} + +int main() +{ + test01(); + test02(); + return 0; +} |