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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2015-11-06 12:04:15 +0000
committerKyrylo Tkachov <kyrylo.tkachov@arm.com>2015-11-06 12:04:15 +0000
commitc6f705e38ad079ac07e8228c70c7392ee451374e (patch)
treeabfaa95dcf19408483ccfe4f9c380784daa56057
parentf9c909568edae43febaf82676539c849d8c6025b (diff)
[ARM/AArch64] PR 68088: Fix RTL checking ICE due to subregs inside accumulator forwarding check
PR target/68088 * config/arm/aarch-common.c (aarch_accumulator_forwarding): Strip subregs from accumulator and make sure it's a register. * gcc.dg/pr68088_1.c: New test. git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@229845 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/aarch-common.c6
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.dg/pr68088_1.c15
4 files changed, 32 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9adcd20d145..3966f515860 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-11-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/68088
+ * config/arm/aarch-common.c (aarch_accumulator_forwarding): Strip
+ subregs from accumulator and make sure it's a register.
+
2015-11-06 Simon Dardis <simon.dardis@imgtec.com>
* config/mips/loongson.md (vec_loongson_extract_lo_<mode>): New, extract
diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c
index a940a0232f8..e6668d5742c 100644
--- a/gcc/config/arm/aarch-common.c
+++ b/gcc/config/arm/aarch-common.c
@@ -460,6 +460,12 @@ aarch_accumulator_forwarding (rtx_insn *producer, rtx_insn *consumer)
return 0;
}
+ if (GET_CODE (accumulator) == SUBREG)
+ accumulator = SUBREG_REG (accumulator);
+
+ if (!REG_P (accumulator))
+ return 0;
+
return (REGNO (dest) == REGNO (accumulator));
}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3d1834dfb81..3bf8cf1bca0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-11-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/68088
+ * gcc.dg/pr68088_1.c: New test.
+
2015-11-06 Richard Biener <rguenther@suse.de>
* gcc.dg/vect/bb-slp-38.c: New testcase.
diff --git a/gcc/testsuite/gcc.dg/pr68088_1.c b/gcc/testsuite/gcc.dg/pr68088_1.c
new file mode 100644
index 00000000000..49c6aa14543
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr68088_1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+void bar (unsigned long);
+
+void
+foo (unsigned long aul, unsigned m, unsigned i)
+{
+ while (1)
+ {
+ aul += i;
+ i = aul % m;
+ bar (aul);
+ }
+}