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authorPrakhar Bahuguna <prakhar.bahuguna@arm.com>2017-12-04 15:53:08 +0000
committerThomas Preud'homme <thomas.preudhomme@arm.com>2017-12-04 15:53:08 +0000
commite2a04ed42e24184306d0fce18cfa55a0a5fb070a (patch)
treec3817be2f5b1d16cc2120cd29443d1338ef6f059
parent5dc105ef7257fce695f80a62a30c7ea4eb4233f9 (diff)
Fix ChangeLog.arm entriesARM/embedded-7-branch-2017q4
* Add missing entry for changes to lto-partition.c * Add missing entries for regenerated arm-cpu-cdata.h, arm-cpu-data.h and arm-cpu.h * Move testsuite changes in gcc/ChangeLog.arm intro gcc/testsuite/ChangeLog.arm git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ARM/embedded-7-branch@255385 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog.arm11
-rw-r--r--gcc/lto/ChangeLog.arm2
-rw-r--r--gcc/testsuite/ChangeLog.arm9
3 files changed, 17 insertions, 5 deletions
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 95f3eb80341..a98ecb028f6 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -19,6 +19,9 @@
(armv8-r): Set ARM Cortex-R52 as default CPU.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
+ * config/arm/arm-cpu-cdata.h: Regenerate.
+ * config/arm/arm-cpu-data.h: Regenerate.
+ * config/arm/arm-cpu.h: Regenerate.
* config/arm/driver-arm.c (arm_cpu_table): Add entry for ARM
Cortex-R52.
* doc/invoke.texi: Mention -mtune=cortex-r52 and availability of fp.dp
@@ -32,6 +35,7 @@
* config/arm/arm-isa.h (isa_bit_FP_ARMv8): Delete enumerator.
(ISA_FP_ARMv8): Define as ISA_FPv5 and ISA_FP_D32.
* config/arm/arm-cpus.in (fp-armv8): Define it as FP_ARMv8 only.
+ * config/arm/arm-cpu-data.h: Regenerate.
* config/arm/arm.h (TARGET_FPU_ARMV8): Delete.
(TARGET_VFP_FP16INST): Define using TARGET_VFP5 rather than
TARGET_FPU_ARMV8.
@@ -61,6 +65,8 @@
(armv8-r+crc): Likewise.
* config/arm/arm-isa.h (ISA_ARMv8r): Define macro.
* config/arm/arm-tables.opt: Regenerate.
+ * config/arm/arm-cpu-cdata.h: Regenerate.
+ * config/arm/arm-cpu-data.h: Regenerate.
* config/arm/arm.h (enum base_architecture): Add BASE_ARCH_8R
enumerator.
* doc/invoke.texi: Mention -march=armv8-r and its crc extension.
@@ -106,7 +112,6 @@
2017-05-04 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
- gcc
* config/arm/arm.md (movsi): Add TARGET_32BIT in addition to the
TARGET_HAVE_MOVT conditional.
(movt splitter): Likewise.
@@ -122,10 +127,6 @@
* doc/invoke.texi (-mpure-code): Change "ARMv7-M targets" for
"M-profile targets with the MOVT instruction".
- gcc/testsuite/
- * gcc.target/arm/pure-code/pure-code.exp: Add conditional for
- check_effective_target_arm_thumb1_movt_ok.
-
2017-05-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
Backport from mainline
diff --git a/gcc/lto/ChangeLog.arm b/gcc/lto/ChangeLog.arm
index 021b7d9e88a..92947e4a1ce 100644
--- a/gcc/lto/ChangeLog.arm
+++ b/gcc/lto/ChangeLog.arm
@@ -5,5 +5,7 @@
Thomas Preud'homme <thomas.preudhomme@arm.com>
PR lto/69866
+ * lto-partition.c (add_symbol_to_partition_1): Allow alias of external
+ symbol to be added.
* lto-symtab.c (lto_symtab_merge_symbols): Drop useless definitions
that resolved externally.
diff --git a/gcc/testsuite/ChangeLog.arm b/gcc/testsuite/ChangeLog.arm
index 12fbd977b5e..2ccc7273940 100644
--- a/gcc/testsuite/ChangeLog.arm
+++ b/gcc/testsuite/ChangeLog.arm
@@ -39,3 +39,12 @@
* gcc.target/arm/acle/stc2.c: Likewise.
* gcc.target/arm/acle/stc2l.c: Likewise.
* gcc.target/arm/acle/stcl.c: Likewise.
+
+2017-05-31 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
+
+ Backport from mainline
+ 2017-05-04 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
+ Andre Simoes Dias Vieira <andre.simoesdiasvieira@arm.com>
+
+ * gcc.target/arm/pure-code/pure-code.exp: Add conditional for
+ check_effective_target_arm_thumb1_movt_ok.