diff options
author | Sandra Loosemore <sandra@codesourcery.com> | 2007-07-16 18:12:01 +0000 |
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committer | Sandra Loosemore <sandra@codesourcery.com> | 2007-07-16 18:12:01 +0000 |
commit | 7594b9f921fe11646984ccc4c6636258a1626eee (patch) | |
tree | cf3417c7321ebd6b0afef62d1f1999bb37cb5aff | |
parent | 458bdbe097c2a46b13c48f1b1305e101f03597ec (diff) |
2007-07-16 Sandra Loosemore <sandra@codesourcery.com>
David Ung <davidu@mips.com>
gcc/
* config/mips/mips.h (TUNE_24K): Define.
(TUNE_MACC_CHAINS): Add TUNE_24K.
* config/mips/mips.md: (*mul_acc_si, *mul_sub_si): Change type to
imadd.
* config/mips/74k.md (r74k_int_mult): Split madd/msub to ..
(r74k_int_madd): .. this new reservation.
(define_bypass): Fixed bypasses for r74k_int_madd to use
mips_linked_madd_p.
* config/mips/24k.md (define_bypass): Define new
r24k_int_mul3->r24k_int_madd bypass using mips_linked_madd_p.
gcc/testsuite/
* gcc.target/mips/mips-sched-madd.c: New test case.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@126688 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 14 | ||||
-rw-r--r-- | gcc/config/mips/24k.md | 3 | ||||
-rw-r--r-- | gcc/config/mips/74k.md | 20 | ||||
-rw-r--r-- | gcc/config/mips/mips.h | 6 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 4 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/mips/mips-sched-madd.c | 19 |
7 files changed, 63 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 31ae6a1416a..2d99d1f180b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,18 @@ 2007-07-16 Sandra Loosemore <sandra@codesourcery.com> + David Ung <davidu@mips.com> + + * config/mips/mips.h (TUNE_24K): Define. + (TUNE_MACC_CHAINS): Add TUNE_24K. + * config/mips/mips.md: (*mul_acc_si, *mul_sub_si): Change type to + imadd. + * config/mips/74k.md (r74k_int_mult): Split madd/msub to .. + (r74k_int_madd): .. this new reservation. + (define_bypass): Fixed bypasses for r74k_int_madd to use + mips_linked_madd_p. + * config/mips/24k.md (define_bypass): Define new + r24k_int_mul3->r24k_int_madd bypass using mips_linked_madd_p. + +2007-07-16 Sandra Loosemore <sandra@codesourcery.com> Nigel Stephens <nigel@mips.com> * config/mips/mips.md: Include 20kc.md. diff --git a/gcc/config/mips/24k.md b/gcc/config/mips/24k.md index 7de816f4299..10fd79cb2db 100644 --- a/gcc/config/mips/24k.md +++ b/gcc/config/mips/24k.md @@ -188,6 +188,9 @@ (define_bypass 6 "r24k_int_mul3" "r24k_int_store" "!store_data_bypass_p") (define_bypass 6 "r24k_int_mul3" "r24k_int_prefetch") +;; mul3->madd/msub : 1 cycle +(define_bypass 1 "r24k_int_mul3" "r24k_int_madd" "mips_linked_madd_p") + ;; mfhilo->next use : 5 cycles (default) ;; mfhilo->l/s base : 6 cycles ;; mfhilo->prefetch : 6 cycles diff --git a/gcc/config/mips/74k.md b/gcc/config/mips/74k.md index e4d1e413821..23597cad69c 100644 --- a/gcc/config/mips/74k.md +++ b/gcc/config/mips/74k.md @@ -60,10 +60,16 @@ "r74k_agen*2") ;; MDU: fully pipelined multiplier -;; mult, madd, msub - delivers result to hi/lo in 4 cycle (pipelined) +;; mult - delivers result to hi/lo in 4 cycle (pipelined) (define_insn_reservation "r74k_int_mult" 4 (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2") - (eq_attr "type" "imul,imadd")) + (eq_attr "type" "imul")) + "r74k_alu+r74k_mul") + +;; madd, msub - delivers result to hi/lo in 4 cycle (pipelined) +(define_insn_reservation "r74k_int_madd" 4 + (and (eq_attr "cpu" "74kc,74kf2_1,74kf1_1,74kf3_2") + (eq_attr "type" "imadd")) "r74k_alu+r74k_mul") ;; mul - delivers result to general register in 7 cycles @@ -160,9 +166,13 @@ (define_bypass 5 "r74k_int_cmove" "r74k_int_load") (define_bypass 5 "r74k_int_cmove" "r74k_int_store" "!store_data_bypass_p") -;; mult/madd->int_mfhilo : 4 cycles (default) -;; mult/madd->mult/madd : 1 cycles -(define_bypass 1 "r74k_int_mult" "r74k_int_mult") +;; mult/madd/msub->int_mfhilo : 4 cycles (default) +;; mult->madd/msub : 1 cycles +;; madd/msub->madd/msub : 1 cycles +(define_bypass 1 "r74k_int_mult,r74k_int_mul3" "r74k_int_madd" + "mips_linked_madd_p") +(define_bypass 1 "r74k_int_madd" "r74k_int_madd" + "mips_linked_madd_p") ;; -------------------------------------------------------------- ;; Floating Point Instructions diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 05392218527..3696ce7fe98 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -250,6 +250,9 @@ extern const struct mips_rtx_cost_data *mips_cost; #define TUNE_MIPS9000 (mips_tune == PROCESSOR_R9000) #define TUNE_SB1 (mips_tune == PROCESSOR_SB1 \ || mips_tune == PROCESSOR_SB1A) +#define TUNE_24K (mips_tune == PROCESSOR_24KC \ + || mips_tune == PROCESSOR_24KF2_1 \ + || mips_tune == PROCESSOR_24KF1_1) #define TUNE_74K (mips_tune == PROCESSOR_74KC \ || mips_tune == PROCESSOR_74KF2_1 \ || mips_tune == PROCESSOR_74KF1_1 \ @@ -289,7 +292,8 @@ extern const struct mips_rtx_cost_data *mips_cost; than others, so this macro is defined on an opt-in basis. */ #define TUNE_MACC_CHAINS (TUNE_MIPS5500 \ || TUNE_MIPS4120 \ - || TUNE_MIPS4130) + || TUNE_MIPS4130 \ + || TUNE_24K) #define TARGET_OLDABI (mips_abi == ABI_32 || mips_abi == ABI_O64) #define TARGET_NEWABI (mips_abi == ABI_N32 || mips_abi == ABI_64) diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 5d679083a31..84347d7237c 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1228,7 +1228,7 @@ return "#"; return madd[which_alternative]; } - [(set_attr "type" "imadd,imadd,multi") + [(set_attr "type" "imadd") (set_attr "mode" "SI") (set_attr "length" "4,4,8")]) @@ -1483,7 +1483,7 @@ msub\t%2,%3 # #" - [(set_attr "type" "imadd,multi,multi") + [(set_attr "type" "imadd") (set_attr "mode" "SI") (set_attr "length" "4,8,8")]) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ae67bd00723..70a92963d94 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2007-07-16 Sandra Loosemore <sandra@codesourcery.com> + David Ung <davidu@mips.com> + + * gcc.target/mips/mips-sched-madd.c: New test case. + 2007-07-15 Jerry DeLisle <jvdelisle@gcc.gnu.org> PR libfortran/32611 diff --git a/gcc/testsuite/gcc.target/mips/mips-sched-madd.c b/gcc/testsuite/gcc.target/mips/mips-sched-madd.c new file mode 100644 index 00000000000..40e1fc28a61 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/mips-sched-madd.c @@ -0,0 +1,19 @@ +/* Test for case where another independent multiply insn may interfere + with a macc chain. */ +/* { dg-do compile } */ +/* { dg-mips-options "-Os -march=24kf -mno-mips16" } */ + +int foo (int a, int b, int c, int d, int e, int f, int g) +{ + int temp; + int acc; + + acc = a * b; + temp = a * c; + acc = d * e + acc; + acc = f * g + acc; + return acc > temp ? acc : temp; +} + +/* { dg-final { scan-assembler "\tmult\t" } } */ +/* { dg-final { scan-assembler "\tmadd\t" } } */ |