Reverted r186149.

I will be submitting this change to branches/google/gcc-4_6 first and
backporting from there.



git-svn-id: https://gcc.gnu.org/svn/gcc/branches/google/gcc-4_6_2-mobile@186155 138bc75d-0d04-0410-961f-82ee72b054a4

5 files changed, 1 insertions, 94 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5390d9ca003..3437317c72f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -646,12 +646,6 @@
 	* config/avr/avr-devices.c (avr_mcu_types): Set
 	.data_section_start of atmega164a to 0x100.
 
-2011-10-07  Andrew Stubbs  <ams@codesourcery.com>
-
-	* config/arm/predicates.md (shift_amount_operand): Remove constant
-	range check.
-	(shift_operator): Check range of constants for all shift operators.
-
 2011-10-07  Bernd Schmidt  <bernds@codesourcery.com>
 
 	PR target/49049
diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md
index 7f20106ba71..e34b46da04f 100644
--- a/gcc/config/arm/predicates.md
+++ b/gcc/config/arm/predicates.md
@@ -129,8 +129,6 @@
   (ior (match_operand 0 "arm_rhs_operand")
        (match_operand 0 "memory_operand")))
 
-;; This doesn't have to do much because the constant is already checked
-;; in the shift_operator predicate.
 (define_predicate "shift_amount_operand"
   (ior (and (match_test "TARGET_ARM")
 	    (match_operand 0 "s_register_operand"))
@@ -220,20 +218,13 @@
        (match_test "mode == GET_MODE (op)")))
 
 ;; True for shift operators.
-;; Notes:
-;;  * mult is only permitted with a constant shift amount
-;;  * patterns that permit register shift amounts only in ARM mode use
-;;    shift_amount_operand, patterns that always allow registers do not,
-;;    so we don't have to worry about that sort of thing here.
 (define_special_predicate "shift_operator"
   (and (ior (ior (and (match_code "mult")
 		      (match_test "power_of_two_operand (XEXP (op, 1), mode)"))
 		 (and (match_code "rotate")
 		      (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT
 				   && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32")))
-	    (and (match_code "ashift,ashiftrt,lshiftrt,rotatert")
-		 (match_test "GET_CODE (XEXP (op, 1)) != CONST_INT
-			      || ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) < 32")))
+	    (match_code "ashift,ashiftrt,lshiftrt,rotatert"))
        (match_test "mode == GET_MODE (op)")))
 
 ;; True for MULT, to identify which variant of shift_operator is in use.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4183fe81f1f..d0a8456cd9d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -412,11 +412,6 @@
 	PR fortran/50273
 	* gfortran.dg/common_16.f90: New.
 
-2011-10-07  Andrew Stubbs  <ams@codesourcery.com>
-
-	* gcc.dg/pr50193-1.c: New file.
-	* gcc.target/arm/shiftable.c: New file.
-
 2011-10-07  Janus Weil  <janus@gcc.gnu.org>
 
 	PR fortran/50585
diff --git a/gcc/testsuite/gcc.dg/pr50193-1.c b/gcc/testsuite/gcc.dg/pr50193-1.c
deleted file mode 100644
index 6abc9c40570..00000000000
--- a/gcc/testsuite/gcc.dg/pr50193-1.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* PR 50193: ARM: ICE on a | (b << negative-constant) */
-/* Ensure that the compiler doesn't ICE.  */
-
-/* { dg-options "-O2" } */
-
-int
-foo(int a, int b)
-{
-  return a | (b << -3); /* { dg-warning "left shift count is negative" } */
-}
diff --git a/gcc/testsuite/gcc.target/arm/shiftable.c b/gcc/testsuite/gcc.target/arm/shiftable.c
deleted file mode 100644
index f3080620a9e..00000000000
--- a/gcc/testsuite/gcc.target/arm/shiftable.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O2" } */
-/* { dg-require-effective-target arm32 } */
-
-/* ARM has shift-and-alu insns.  Depending on the ALU op GCC represents some
-   of these as a left shift, others as a multiply.  Check that we match the
-    right one.  */
-
-int
-plus (int a, int b)
-{
-  return (a * 64) + b;
-}
-
-/* { dg-final { scan-assembler "add.*\[al]sl #6" } } */
-
-int
-minus (int a, int b)
-{
-  return a - (b * 64);
-}
-
-/* { dg-final { scan-assembler "sub.*\[al]sl #6" } } */
-
-int
-ior (int a, int b)
-{
-  return (a * 64) | b;
-}
-
-/* { dg-final { scan-assembler "orr.*\[al]sl #6" } } */
-
-int
-xor (int a, int b)
-{
-  return (a * 64) ^ b;
-}
-
-/* { dg-final { scan-assembler "eor.*\[al]sl #6" } } */
-
-int
-and (int a, int b)
-{
-  return (a * 64) & b;
-}
-
-/* { dg-final { scan-assembler "and.*\[al]sl #6" } } */
-
-int
-rsb (int a, int b)
-{
-  return (a * 64) - b;
-}
-
-/* { dg-final { scan-assembler "rsb.*\[al]sl #6" } } */
-
-int
-mvn (int a, int b)
-{
-  return ~(a * 64);
-}
-
-/* { dg-final { scan-assembler "mvn.*\[al]sl #6" } } */