Cherry-pick the following revisions:

r221700    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=221700
r222073    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=222073
r222074    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=222074
r222075    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=222075
r222206    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=222206
r222190    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=222190
r224118    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=224118
r224311    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=224311
r224356    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=224356
r224633    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=224633
r223811    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=223811
r226487    https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=226487

Files changed:

 contrib/testsuite-management/aarch64-grtev4-linux-gnu.xfail
 contrib/testsuite-management/powerpc64le-grtev4-linux-gnu.xfail
 contrib/testsuite-management/x86_64-grtev4-linux-gnu.xfail
 gcc/config/aarch64/aarch64.md
 gcc/config/alpha/alpha.c
 gcc/config/i386/i386.md
 gcc/config/ia64/ia64.c
 gcc/config/rs6000/rs6000.c
 gcc/config/sparc/linux.h
 gcc/config/sparc/linux64.h
 gcc/config/sparc/sparc.c
 gcc/config/sparc/sparc.h
 gcc/cp/cp-tree.h
 gcc/cp/decl.c
 gcc/cp/decl2.c
 gcc/doc/tm.texi
 gcc/doc/tm.texi.in
 gcc/ipa-inline-analysis.c
 gcc/system.h
 gcc/target.def
 gcc/testsuite/g++.dg/abi/aarch64_guard1.C
 gcc/tree-vect-data-refs.c
 gcc/tree-vect-stmts.c
 gcc/tree-vectorizer.h
 libstdc++-v3/include/bits/algorithmfwd.h
 libstdc++-v3/include/bits/atomic_base.h
 libstdc++-v3/include/bits/move.h
 libstdc++-v3/include/bits/stl_tree.h
 libstdc++-v3/include/c_compatibility/complex.h
 libstdc++-v3/include/ext/aligned_buffer.h
 libstdc++-v3/include/std/array
 libstdc++-v3/include/std/atomic
 libstdc++-v3/include/std/complex
 libstdc++-v3/python/libstdcxx/v6/printers.py
 libstdc++-v3/testsuite/20_util/forward/c_neg.cc
 libstdc++-v3/testsuite/20_util/forward/f_neg.cc
 libstdc++-v3/testsuite/25_algorithms/unique/11480.cc




git-svn-id: https://gcc.gnu.org/svn/gcc/branches/google/gcc-4_9-mobile@228020 138bc75d-0d04-0410-961f-82ee72b054a4

37 files changed, 278 insertions, 203 deletions

diff --git a/contrib/testsuite-management/aarch64-grtev4-linux-gnu.xfail b/contrib/testsuite-management/aarch64-grtev4-linux-gnu.xfail
index a2a027e5338..7a88bf20ad2 100644
--- a/contrib/testsuite-management/aarch64-grtev4-linux-gnu.xfail
+++ b/contrib/testsuite-management/aarch64-grtev4-linux-gnu.xfail
@@ -18,10 +18,21 @@ FAIL: gcc.dg/wself-assign-1.c (test for warnings, line 20)
 FAIL: gcc.dg/wself-assign-1.c (test for warnings, line 21)
 FAIL: gcc.dg/wself-assign-1.c (test for warnings, line 22)
 
+# Also xfailed in x86; Google b/20184248
+FAIL: 17_intro/headers/c++1998/complex.cc (test for excess errors)
+FAIL: 26_numerics/complex/c99.cc (test for excess errors)
+
 # AArch64-specific; appear to be missing "loop turned into non-loop; it never loops" output.
 FAIL: gcc.dg/unroll_1.c (test for warnings, line 14)
 FAIL: gcc.dg/unroll_1.c (test for warnings, line 24)
 
+# AArch64-specific; the __cxa_guard_acquire is handled differently after
+# relaxed memory ordering patch from trunk (r224118). This test is broken
+# on trunk as well.
+FAIL: g++.dg/abi/aarch64_guard1.C -std=gnu++98  scan-tree-dump original "_ZGVZ3foovE1x & 1"
+FAIL: g++.dg/abi/aarch64_guard1.C -std=gnu++11  scan-tree-dump original "_ZGVZ3foovE1x & 1"
+FAIL: g++.dg/abi/aarch64_guard1.C -std=gnu++1y  scan-tree-dump original "_ZGVZ3foovE1x & 1"
+
 # AArch64-specific test optimization and execution failures (not yet analyzed)
 XPASS: gcc.dg/tree-ssa/20040204-1.c scan-tree-dump-times optimized "link_error" 0
 FAIL: gcc.dg/di-sync-multithread.c execution test
diff --git a/contrib/testsuite-management/powerpc64le-grtev4-linux-gnu.xfail b/contrib/testsuite-management/powerpc64le-grtev4-linux-gnu.xfail
index 410cdb94311..d8995e0cd1f 100644
--- a/contrib/testsuite-management/powerpc64le-grtev4-linux-gnu.xfail
+++ b/contrib/testsuite-management/powerpc64le-grtev4-linux-gnu.xfail
@@ -18,6 +18,10 @@ FAIL: gcc.dg/wself-assign-1.c (test for warnings, line 20)
 FAIL: gcc.dg/wself-assign-1.c (test for warnings, line 21)
 FAIL: gcc.dg/wself-assign-1.c (test for warnings, line 22)
 
+# Also xfailed in x86; Google b/20184248
+FAIL: 17_intro/headers/c++1998/complex.cc (test for excess errors)
+FAIL: 26_numerics/complex/c99.cc (test for excess errors)
+
 # PPCle-specific.  From PR33512, still failing in truck despite resolved PR.
 FAIL: gcc.dg/and-1.c scan-assembler-not nand
 
diff --git a/contrib/testsuite-management/x86_64-grtev4-linux-gnu.xfail b/contrib/testsuite-management/x86_64-grtev4-linux-gnu.xfail
index a6eb7eca038..b4fa6933791 100644
--- a/contrib/testsuite-management/x86_64-grtev4-linux-gnu.xfail
+++ b/contrib/testsuite-management/x86_64-grtev4-linux-gnu.xfail
@@ -21,6 +21,10 @@ FAIL: gcc.dg/wself-assign-1.c (test for warnings, line 22)
 # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60037
 FAIL: ext/random/hypergeometric_distribution/operators/values.cc execution test
 
+# Google b/20184248
+FAIL: 17_intro/headers/c++1998/complex.cc (test for excess errors)
+FAIL: 26_numerics/complex/c99.cc (test for excess errors)
+
 # Google b/14137212
 FAIL: 29_atomics/atomic/cons/user_pod.cc (test for excess errors)
 
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index f5b6a867bb3..05f5e1b351d 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -2786,7 +2786,7 @@
 
 ;; Logical right shift using SISD or Integer instruction
 (define_insn "*aarch64_lshr_sisd_or_int_<mode>3"
-  [(set (match_operand:GPI 0 "register_operand" "=w,w,r")
+  [(set (match_operand:GPI 0 "register_operand" "=w,&w,r")
         (lshiftrt:GPI
           (match_operand:GPI 1 "register_operand" "w,w,r")
           (match_operand:QI 2 "aarch64_reg_or_shift_imm_<mode>" "Us<cmode>,w,rUs<cmode>")))]
@@ -2805,11 +2805,13 @@
            (match_operand:DI 1 "aarch64_simd_register")
            (match_operand:QI 2 "aarch64_simd_register")))]
   "TARGET_SIMD && reload_completed"
-  [(set (match_dup 2)
+  [(set (match_dup 3)
         (unspec:QI [(match_dup 2)] UNSPEC_SISD_NEG))
    (set (match_dup 0)
-        (unspec:DI [(match_dup 1) (match_dup 2)] UNSPEC_SISD_USHL))]
-  ""
+        (unspec:DI [(match_dup 1) (match_dup 3)] UNSPEC_SISD_USHL))]
+  {
+    operands[3] = gen_lowpart (QImode, operands[0]);
+  }
 )
 
 (define_split
@@ -2818,11 +2820,13 @@
            (match_operand:SI 1 "aarch64_simd_register")
            (match_operand:QI 2 "aarch64_simd_register")))]
   "TARGET_SIMD && reload_completed"
-  [(set (match_dup 2)
+  [(set (match_dup 3)
         (unspec:QI [(match_dup 2)] UNSPEC_SISD_NEG))
    (set (match_dup 0)
-        (unspec:SI [(match_dup 1) (match_dup 2)] UNSPEC_USHL_2S))]
-  ""
+        (unspec:SI [(match_dup 1) (match_dup 3)] UNSPEC_USHL_2S))]
+  {
+    operands[3] = gen_lowpart (QImode, operands[0]);
+  }
 )
 
 ;; Arithmetic right shift using SISD or Integer instruction
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index d5c7908beb0..19ae3665a21 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -9918,12 +9918,6 @@ alpha_canonicalize_comparison (int *code, rtx *op0, rtx *op1,
 #undef TARGET_EXPAND_BUILTIN_VA_START
 #define TARGET_EXPAND_BUILTIN_VA_START alpha_va_start
 
-/* The Alpha architecture does not require sequential consistency.  See
-   http://www.cs.umd.edu/~pugh/java/memoryModel/AlphaReordering.html
-   for an example of how it can be violated in practice.  */
-#undef TARGET_RELAXED_ORDERING
-#define TARGET_RELAXED_ORDERING true
-
 #undef TARGET_OPTION_OVERRIDE
 #define TARGET_OPTION_OVERRIDE alpha_option_override
 
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index de56b9e1dce..e5b9676db71 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12159,18 +12159,52 @@
    (set_attr "mode" "<MODE>")])
 
 ;; BMI2 instructions.
-(define_insn "bmi2_bzhi_<mode>3"
+(define_expand "bmi2_bzhi_<mode>3"
+  [(parallel
+    [(set (match_operand:SWI48 0 "register_operand")
+	     (zero_extract:SWI48
+		   (match_operand:SWI48 1 "nonimmediate_operand")
+		   (umin:SWI48
+			 (and:SWI48 (match_operand:SWI48 2 "register_operand")
+					    (const_int 255))
+		     (match_dup 3))
+		   (const_int 0)))
+	 (clobber (reg:CC FLAGS_REG))])]
+  "TARGET_BMI2"
+  "operands[3] = GEN_INT (<MODE_SIZE> * BITS_PER_UNIT);")
+
+(define_insn "*bmi2_bzhi_<mode>3"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
-	(and:SWI48 (lshiftrt:SWI48 (const_int -1)
-				   (match_operand:SWI48 2 "register_operand" "r"))
-		   (match_operand:SWI48 1 "nonimmediate_operand" "rm")))
+       (zero_extract:SWI48
+	     (match_operand:SWI48 1 "nonimmediate_operand" "rm")
+		 (umin:SWI48
+		   (and:SWI48 (match_operand:SWI48 2 "register_operand" "r")
+		              (const_int 255))
+	       (match_operand:SWI48 3 "const_int_operand" "n"))
+		 (const_int 0)))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_BMI2"
+  "TARGET_BMI2 && INTVAL (operands[3]) == <MODE_SIZE> * BITS_PER_UNIT"
   "bzhi\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "bitmanip")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<MODE>")])
 
+(define_mode_attr k [(SI "k") (DI "q")])
+(define_insn "*bmi2_bzhi_<mode>3_1"
+  [(set (match_operand:SWI48 0 "register_operand" "=r")
+       (zero_extract:SWI48
+         (match_operand:SWI48 1 "nonimmediate_operand" "rm")
+         (umin:SWI48
+	       (zero_extend:SWI48 (match_operand:QI 2 "register_operand" "r"))
+		   (match_operand:SWI48 3 "const_int_operand" "n"))
+		 (const_int 0)))
+   (clobber (reg:CC FLAGS_REG))]
+  "TARGET_BMI2 && INTVAL (operands[3]) == <MODE_SIZE> * BITS_PER_UNIT"
+  "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"
+  [(set_attr "type" "bitmanip")
+   (set_attr "prefix" "vex")
+   (set_attr "mode" "<MODE>")])
+
 (define_insn "bmi2_pdep_<mode>3"
   [(set (match_operand:SWI48 0 "register_operand" "=r")
         (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 41adc4adc96..4ec3e3abe6e 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -602,11 +602,6 @@ static const struct attribute_spec ia64_attribute_table[] =
 #undef TARGET_VECTOR_MODE_SUPPORTED_P
 #define TARGET_VECTOR_MODE_SUPPORTED_P ia64_vector_mode_supported_p
 
-/* ia64 architecture manual 4.4.7: ... reads, writes, and flushes may occur
-   in an order different from the specified program order.  */
-#undef TARGET_RELAXED_ORDERING
-#define TARGET_RELAXED_ORDERING true
-
 #undef TARGET_LEGITIMATE_CONSTANT_P
 #define TARGET_LEGITIMATE_CONSTANT_P ia64_legitimate_constant_p
 #undef TARGET_LEGITIMATE_ADDRESS_P
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 9b3022d60a0..9f5d2f2e6ff 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1542,17 +1542,6 @@ static const struct attribute_spec rs6000_attribute_table[] =
 #define TARGET_STACK_PROTECT_FAIL rs6000_stack_protect_fail
 #endif
 
-/* MPC604EUM 3.5.2 Weak Consistency between Multiple Processors
-   The PowerPC architecture requires only weak consistency among
-   processors--that is, memory accesses between processors need not be
-   sequentially consistent and memory accesses among processors can occur
-   in any order. The ability to order memory accesses weakly provides
-   opportunities for more efficient use of the system bus. Unless a
-   dependency exists, the 604e allows read operations to precede store
-   operations.  */
-#undef TARGET_RELAXED_ORDERING
-#define TARGET_RELAXED_ORDERING true
-
 #ifdef HAVE_AS_TLS
 #undef TARGET_ASM_OUTPUT_DWARF_DTPREL
 #define TARGET_ASM_OUTPUT_DWARF_DTPREL rs6000_output_dwarf_dtprel
diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h
index c54ba2cb51c..c40bb0b78e2 100644
--- a/gcc/config/sparc/linux.h
+++ b/gcc/config/sparc/linux.h
@@ -147,12 +147,6 @@ do {									\
 /* Static stack checking is supported by means of probes.  */
 #define STACK_CHECK_STATIC_BUILTIN 1
 
-/* Linux currently uses RMO in uniprocessor mode, which is equivalent to
-   TMO, and TMO in multiprocessor mode.  But they reserve the right to
-   change their minds.  */
-#undef SPARC_RELAXED_ORDERING
-#define SPARC_RELAXED_ORDERING true
-
 #undef NEED_INDICATE_EXEC_STACK
 #define NEED_INDICATE_EXEC_STACK 1
 
diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h
index f00fb42ffab..12bb3780ba7 100644
--- a/gcc/config/sparc/linux64.h
+++ b/gcc/config/sparc/linux64.h
@@ -261,12 +261,6 @@ do {									\
 /* Static stack checking is supported by means of probes.  */
 #define STACK_CHECK_STATIC_BUILTIN 1
 
-/* Linux currently uses RMO in uniprocessor mode, which is equivalent to
-   TMO, and TMO in multiprocessor mode.  But they reserve the right to
-   change their minds.  */
-#undef SPARC_RELAXED_ORDERING
-#define SPARC_RELAXED_ORDERING true
-
 #undef NEED_INDICATE_EXEC_STACK
 #define NEED_INDICATE_EXEC_STACK 1
 
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index d00c7b6fef5..f7fc957b48c 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -786,9 +786,6 @@ char sparc_hard_reg_printed[8];
 #define TARGET_ATTRIBUTE_TABLE sparc_attribute_table
 #endif
 
-#undef TARGET_RELAXED_ORDERING
-#define TARGET_RELAXED_ORDERING SPARC_RELAXED_ORDERING
-
 #undef TARGET_OPTION_OVERRIDE
 #define TARGET_OPTION_OVERRIDE sparc_option_override
 
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 79dbba22d09..87f1d82d650 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -106,17 +106,6 @@ extern enum cmodel sparc_cmodel;
 
 #define SPARC_DEFAULT_CMODEL CM_32
 
-/* The SPARC-V9 architecture defines a relaxed memory ordering model (RMO)
-   which requires the following macro to be true if enabled.  Prior to V9,
-   there are no instructions to even talk about memory synchronization.
-   Note that the UltraSPARC III processors don't implement RMO, unlike the
-   UltraSPARC II processors.  Niagara, Niagara-2, and Niagara-3 do not
-   implement RMO either.
-
-   Default to false; for example, Solaris never enables RMO, only ever uses
-   total memory ordering (TMO).  */
-#define SPARC_RELAXED_ORDERING false
-
 /* Do not use the .note.GNU-stack convention by default.  */
 #define NEED_INDICATE_EXEC_STACK 0
 
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 725eddc3fe9..ac60ad5b905 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -5365,7 +5365,7 @@ extern bool mark_used			        (tree, tsubst_flags_t);
 extern void finish_static_data_member_decl	(tree, tree, bool, tree, int);
 extern tree cp_build_parm_decl			(tree, tree);
 extern tree get_guard				(tree);
-extern tree get_guard_cond			(tree);
+extern tree get_guard_cond			(tree, bool);
 extern tree set_guard				(tree);
 extern tree get_tls_wrapper_fn			(tree);
 extern void mark_needed				(tree);
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 30e3afe81f4..71db246ecf9 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -7035,7 +7035,7 @@ expand_static_init (tree decl, tree init)
 	 looks like:
 
 	   static <type> guard;
-	   if (!guard.first_byte) {
+	   if (!__atomic_load (guard.first_byte)) {
 	     if (__cxa_guard_acquire (&guard)) {
 	       bool flag = false;
 	       try {
@@ -7065,16 +7065,10 @@ expand_static_init (tree decl, tree init)
       /* Create the guard variable.  */
       guard = get_guard (decl);
 
-      /* This optimization isn't safe on targets with relaxed memory
-	 consistency.  On such targets we force synchronization in
-	 __cxa_guard_acquire.  */
-      if (!targetm.relaxed_ordering || !thread_guard)
-	{
-	  /* Begin the conditional initialization.  */
-	  if_stmt = begin_if_stmt ();
-	  finish_if_stmt_cond (get_guard_cond (guard), if_stmt);
-	  then_clause = begin_compound_stmt (BCS_NO_SCOPE);
-	}
+      /* Begin the conditional initialization.  */
+      if_stmt = begin_if_stmt ();
+      finish_if_stmt_cond (get_guard_cond (guard, thread_guard), if_stmt);
+      then_clause = begin_compound_stmt (BCS_NO_SCOPE);
 
       if (thread_guard)
 	{
@@ -7143,12 +7137,9 @@ expand_static_init (tree decl, tree init)
 	  finish_if_stmt (inner_if_stmt);
 	}
 
-      if (!targetm.relaxed_ordering || !thread_guard)
-	{
-	  finish_compound_stmt (then_clause);
-	  finish_then_clause (if_stmt);
-	  finish_if_stmt (if_stmt);
-	}
+      finish_compound_stmt (then_clause);
+      finish_then_clause (if_stmt);
+      finish_if_stmt (if_stmt);
     }
   else if (DECL_THREAD_LOCAL_P (decl))
     tls_aggregates = tree_cons (init, decl, tls_aggregates);
diff --git a/gcc/cp/decl2.c b/gcc/cp/decl2.c
index 651320affaa..8d214697ab3 100644
--- a/gcc/cp/decl2.c
+++ b/gcc/cp/decl2.c
@@ -2916,6 +2916,27 @@ get_guard (tree decl)
   return guard;
 }
 
+/* Return an atomic load of src with the appropriate memory model.  */
+
+static tree
+build_atomic_load_byte (tree src, HOST_WIDE_INT model)
+{
+  tree ptr_type = build_pointer_type (char_type_node);
+  tree mem_model = build_int_cst (integer_type_node, model);
+  tree t, addr, val;
+  unsigned int size;
+  int fncode;
+
+  size = tree_to_uhwi (TYPE_SIZE_UNIT (char_type_node));
+
+  fncode = BUILT_IN_ATOMIC_LOAD_N + exact_log2 (size) + 1;
+  t = builtin_decl_implicit ((enum built_in_function) fncode);
+
+  addr = build1 (ADDR_EXPR, ptr_type, src);
+  val = build_call_expr (t, 2, addr, mem_model);
+  return val;
+}
+
 /* Return those bits of the GUARD variable that should be set when the
    guarded entity is actually initialized.  */
 
@@ -2942,12 +2963,14 @@ get_guard_bits (tree guard)
    variable has already been initialized.  */
 
 tree
-get_guard_cond (tree guard)
+get_guard_cond (tree guard, bool thread_safe)
 {
   tree guard_value;
 
-  /* Check to see if the GUARD is zero.  */
-  guard = get_guard_bits (guard);
+  if (!thread_safe)
+    guard = get_guard_bits (guard);
+  else
+    guard = build_atomic_load_byte (guard, MEMMODEL_ACQUIRE);
 
   /* Mask off all but the low bit.  */
   if (targetm.cxx.guard_mask_bit ())
@@ -3562,7 +3585,7 @@ one_static_initialization_or_destruction (tree decl, tree init, bool initp)
 	  /* When using __cxa_atexit, we never try to destroy
 	     anything from a static destructor.  */
 	  gcc_assert (initp);
-	  guard_cond = get_guard_cond (guard);
+	  guard_cond = get_guard_cond (guard, false);
 	}
       /* If we don't have __cxa_atexit, then we will be running
 	 destructors from .fini sections, or their equivalents.  So,
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index bde7cb11640..b7c3fd54e78 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -11317,16 +11317,6 @@ routine for target specific customizations of the system printf
 and scanf formatter settings.
 @end defmac
 
-@deftypevr {Target Hook} bool TARGET_RELAXED_ORDERING
-If set to @code{true}, means that the target's memory model does not
-guarantee that loads which do not depend on one another will access
-main memory in the order of the instruction stream; if ordering is
-important, an explicit memory barrier must be used.  This is true of
-many recent processors which implement a policy of ``relaxed,''
-``weak,'' or ``release'' memory consistency, such as Alpha, PowerPC,
-and ia64.  The default is @code{false}.
-@end deftypevr
-
 @deftypefn {Target Hook} {const char *} TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN (const_tree @var{typelist}, const_tree @var{funcdecl}, const_tree @var{val})
 If defined, this macro returns the diagnostic message when it is
 illegal to pass argument @var{val} to function @var{funcdecl}
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index c95c340fc25..65fd71c3d37 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -8408,8 +8408,6 @@ routine for target specific customizations of the system printf
 and scanf formatter settings.
 @end defmac
 
-@hook TARGET_RELAXED_ORDERING
-
 @hook TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN
 
 @hook TARGET_INVALID_CONVERSION
diff --git a/gcc/ipa-inline-analysis.c b/gcc/ipa-inline-analysis.c
index a512ec5b5bb..904a5219273 100644
--- a/gcc/ipa-inline-analysis.c
+++ b/gcc/ipa-inline-analysis.c
@@ -2169,6 +2169,8 @@ param_change_prob (gimple stmt, int i)
 	return 0;
       if (!bb->frequency)
 	return REG_BR_PROB_BASE;
+      if (!optimize)
+	return REG_BR_PROB_BASE;
       ao_ref_init (&refd, op);
       info.stmt = stmt;
       info.bb_set = BITMAP_ALLOC (NULL);
diff --git a/gcc/system.h b/gcc/system.h
index 42bc509f2cd..d5333af318a 100644
--- a/gcc/system.h
+++ b/gcc/system.h
@@ -928,6 +928,7 @@ extern void fancy_abort (const char *, int, const char *) ATTRIBUTE_NORETURN;
 	TARGET_HANDLE_PRAGMA_EXTERN_PREFIX \
 	TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN \
 	TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD \
+        TARGET_RELAXED_ORDERING
 
 /* Arrays that were deleted in favor of a functional interface.  */
  #pragma GCC poison built_in_decls implicit_built_in_decls
diff --git a/gcc/target.def b/gcc/target.def
index 89c2c637621..d27dbea5063 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -5359,19 +5359,6 @@ for the primary source file, immediately after printing\n\
 this to be done.  The default is false.",
  bool, false)
 
-/* True if the target is allowed to reorder memory accesses unless
-   synchronization is explicitly requested.  */
-DEFHOOKPOD
-(relaxed_ordering,
- "If set to @code{true}, means that the target's memory model does not\n\
-guarantee that loads which do not depend on one another will access\n\
-main memory in the order of the instruction stream; if ordering is\n\
-important, an explicit memory barrier must be used.  This is true of\n\
-many recent processors which implement a policy of ``relaxed,''\n\
-``weak,'' or ``release'' memory consistency, such as Alpha, PowerPC,\n\
-and ia64.  The default is @code{false}.",
- bool, false)
-
 /* Returns true if we should generate exception tables for use with the
    ARM EABI.  The effects the encoding of function exception specifications.  */
 DEFHOOKPOD
diff --git a/gcc/testsuite/g++.dg/abi/aarch64_guard1.C b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
index ca1778b8730..e2669a89fbf 100644
--- a/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
+++ b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
@@ -13,5 +13,4 @@ int *foo ()
 }
 
 // { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } }
-// { dg-final { scan-tree-dump "_ZGVZ3foovE1x & 1" "original" } }
-// { dg-final { cleanup-tree-dump "original" } }
+// { dg-final { scan-tree-dump "& 1" "original" } }
diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c
index 49303b1b58a..69e116b484c 100644
--- a/gcc/tree-vect-data-refs.c
+++ b/gcc/tree-vect-data-refs.c
@@ -615,7 +615,6 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
   tree ref = DR_REF (dr);
   tree vectype;
   tree base, base_addr;
-  bool base_aligned;
   tree misalign;
   tree aligned_to, alignment;
 
@@ -688,6 +687,18 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
     }
 
   base = build_fold_indirect_ref (base_addr);
+  /* To look at alignment of the base we have to preserve an inner MEM_REF
+     as that carriese alignment information of the actual access.  */
+  while (handled_component_p (base))
+    base = TREE_OPERAND (base, 0);
+  if (TREE_CODE (base) == MEM_REF)
+    base = build2 (MEM_REF, TREE_TYPE(base), base_addr,
+		   build_int_cst (TREE_TYPE (TREE_OPERAND (base, 1)), 0));
+  unsigned int base_alignment = get_object_alignment (base);
+
+  if (base_alignment >= TYPE_ALIGN (TREE_TYPE (vectype)))
+    DR_VECT_AUX (dr)->base_element_aligned = true;
+
   alignment = ssize_int (TYPE_ALIGN (vectype)/BITS_PER_UNIT);
 
   if ((aligned_to && tree_int_cst_compare (aligned_to, alignment) < 0)
@@ -703,19 +714,7 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
       return true;
     }
 
-  if ((DECL_P (base)
-       && tree_int_cst_compare (ssize_int (DECL_ALIGN_UNIT (base)),
-				alignment) >= 0)
-      || (TREE_CODE (base_addr) == SSA_NAME
-	  && tree_int_cst_compare (ssize_int (TYPE_ALIGN_UNIT (TREE_TYPE (
-						      TREE_TYPE (base_addr)))),
-				   alignment) >= 0)
-      || (get_pointer_alignment (base_addr) >= TYPE_ALIGN (vectype)))
-    base_aligned = true;
-  else
-    base_aligned = false;
-
-  if (!base_aligned)
+  if (base_alignment < TYPE_ALIGN (vectype))
     {
       /* Do not change the alignment of global variables here if
 	 flag_section_anchors is enabled as we already generated
@@ -744,8 +743,9 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
           dump_printf (MSG_NOTE, "\n");
         }
 
-      ((dataref_aux *)dr->aux)->base_decl = base;
-      ((dataref_aux *)dr->aux)->base_misaligned = true;
+      DR_VECT_AUX (dr)->base_decl = base;
+      DR_VECT_AUX (dr)->base_misaligned = true;
+      DR_VECT_AUX (dr)->base_element_aligned = true;
     }
 
   /* If this is a backward running DR then first access in the larger
diff --git a/gcc/tree-vect-stmts.c b/gcc/tree-vect-stmts.c
index 7c4575d391f..2b9ea6a1619 100644
--- a/gcc/tree-vect-stmts.c
+++ b/gcc/tree-vect-stmts.c
@@ -4899,14 +4899,14 @@ ensure_base_align (stmt_vec_info stmt_info, struct data_reference *dr)
   if (!dr->aux)
     return;
 
-  if (((dataref_aux *)dr->aux)->base_misaligned)
+  if (DR_VECT_AUX (dr)->base_misaligned)
     {
       tree vectype = STMT_VINFO_VECTYPE (stmt_info);
-      tree base_decl = ((dataref_aux *)dr->aux)->base_decl;
+      tree base_decl = DR_VECT_AUX (dr)->base_decl;
 
       DECL_ALIGN (base_decl) = TYPE_ALIGN (vectype);
       DECL_USER_ALIGN (base_decl) = 1;
-      ((dataref_aux *)dr->aux)->base_misaligned = false;
+      DR_VECT_AUX (dr)->base_misaligned = false;
     }
 }
 
@@ -5390,11 +5390,15 @@ vectorizable_store (gimple stmt, gimple_stmt_iterator *gsi, gimple *vec_stmt,
 		misalign = 0;
 	      else if (DR_MISALIGNMENT (first_dr) == -1)
 		{
+		  if (DR_VECT_AUX (first_dr)->base_element_aligned)
+		    align = TYPE_ALIGN_UNIT (elem_type);
+		  else
+		    align = get_object_alignment (DR_REF (first_dr))
+		      / BITS_PER_UNIT;
+		  misalign = 0;
 		  TREE_TYPE (data_ref)
 		    = build_aligned_type (TREE_TYPE (data_ref),
-					  TYPE_ALIGN (elem_type));
-		  align = TYPE_ALIGN_UNIT (elem_type);
-		  misalign = 0;
+					  align * BITS_PER_UNIT);
 		}
 	      else
 		{
@@ -6372,11 +6376,15 @@ vectorizable_load (gimple stmt, gimple_stmt_iterator *gsi, gimple *vec_stmt,
 		      }
 		    else if (DR_MISALIGNMENT (first_dr) == -1)
 		      {
+			if (DR_VECT_AUX (first_dr)->base_element_aligned)
+			  align = TYPE_ALIGN_UNIT (elem_type);
+			else
+			  align = (get_object_alignment (DR_REF (first_dr))
+				   / BITS_PER_UNIT);
+			misalign = 0;
 			TREE_TYPE (data_ref)
 			  = build_aligned_type (TREE_TYPE (data_ref),
-						TYPE_ALIGN (elem_type));
-			align = TYPE_ALIGN_UNIT (elem_type);
-			misalign = 0;
+						align * BITS_PER_UNIT);
 		      }
 		    else
 		      {
diff --git a/gcc/tree-vectorizer.h b/gcc/tree-vectorizer.h
index 09ca48e4ca5..c34ed26fb36 100644
--- a/gcc/tree-vectorizer.h
+++ b/gcc/tree-vectorizer.h
@@ -703,11 +703,16 @@ typedef struct _stmt_vec_info {
 #define STMT_SLP_TYPE(S)                   (S)->slp_type
 
 struct dataref_aux {
-  tree base_decl;
-  bool base_misaligned;
   int misalignment;
+  /* If true the alignment of base_decl needs to be increased.  */
+  bool base_misaligned;
+  /* If true we know the base is at least vector element alignment aligned.  */
+  bool base_element_aligned;
+  tree base_decl;
 };
 
+#define DR_VECT_AUX(dr) ((dataref_aux *)(dr)->aux)
+
 #define VECT_MAX_COST 1000
 
 /* The maximum number of intermediate steps required in multi-step type
@@ -906,14 +911,13 @@ destroy_cost_data (void *data)
   targetm.vectorize.destroy_cost_data (data);
 }
 
-
 /*-----------------------------------------------------------------*/
 /* Info on data references alignment.                              */
 /*-----------------------------------------------------------------*/
 inline void
 set_dr_misalignment (struct data_reference *dr, int val)
 {
-  dataref_aux *data_aux = (dataref_aux *) dr->aux;
+  dataref_aux *data_aux = DR_VECT_AUX (dr);
 
   if (!data_aux)
     {
@@ -927,8 +931,7 @@ set_dr_misalignment (struct data_reference *dr, int val)
 inline int
 dr_misalignment (struct data_reference *dr)
 {
-  gcc_assert (dr->aux);
-  return ((dataref_aux *) dr->aux)->misalignment;
+  return DR_VECT_AUX (dr)->misalignment;
 }
 
 /* Reflects actual alignment of first access in the vectorized loop,
diff --git a/libstdc++-v3/include/bits/algorithmfwd.h b/libstdc++-v3/include/bits/algorithmfwd.h
index aee1eec5b6b..e0478424678 100644
--- a/libstdc++-v3/include/bits/algorithmfwd.h
+++ b/libstdc++-v3/include/bits/algorithmfwd.h
@@ -482,11 +482,13 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   template<typename _FIter, typename _Tp>
     _FIter 
-    remove(_FIter, _FIter, const _Tp&);
+    remove(_FIter, _FIter, const _Tp&)
+    __attribute__ ((warn_unused_result));
 
   template<typename _FIter, typename _Predicate>
     _FIter 
-    remove_if(_FIter, _FIter, _Predicate);
+    remove_if(_FIter, _FIter, _Predicate)
+    __attribute__ ((warn_unused_result));
 
   template<typename _IIter, typename _OIter, typename _Tp>
     _OIter 
@@ -574,11 +576,13 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   template<typename _FIter>
     _FIter 
-    unique(_FIter, _FIter);
+    unique(_FIter, _FIter)
+    __attribute__ ((warn_unused_result));
 
   template<typename _FIter, typename _BinaryPredicate>
     _FIter 
-    unique(_FIter, _FIter, _BinaryPredicate);
+    unique(_FIter, _FIter, _BinaryPredicate)
+    __attribute__ ((warn_unused_result));
 
   // unique_copy
 
diff --git a/libstdc++-v3/include/bits/atomic_base.h b/libstdc++-v3/include/bits/atomic_base.h
index 1fc0ebb7e40..433af5626af 100644
--- a/libstdc++-v3/include/bits/atomic_base.h
+++ b/libstdc++-v3/include/bits/atomic_base.h
@@ -355,7 +355,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
     private:
       typedef _ITp 	__int_type;
 
-      __int_type 	_M_i;
+      static constexpr int _S_alignment =
+	sizeof(_ITp) > alignof(_ITp) ? sizeof(_ITp) : alignof(_ITp);
+
+      alignas(_S_alignment) __int_type _M_i;
 
     public:
       __atomic_base() noexcept = default;
diff --git a/libstdc++-v3/include/bits/move.h b/libstdc++-v3/include/bits/move.h
index dc4ac0fea58..512bb792158 100644
--- a/libstdc++-v3/include/bits/move.h
+++ b/libstdc++-v3/include/bits/move.h
@@ -39,10 +39,13 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   // Used, in C++03 mode too, by allocators, etc.
   /**
-   *  @brief Same as C++11 std::addressof
+   *  @brief Same as C++11 std::addressof, except it is constexpr in C++11.
    *  @ingroup utilities
    */
   template<typename _Tp>
+#if __cplusplus >= 201103L
+    constexpr
+#endif
     inline _Tp*
     __addressof(_Tp& __r) _GLIBCXX_NOEXCEPT
     {
diff --git a/libstdc++-v3/include/bits/stl_tree.h b/libstdc++-v3/include/bits/stl_tree.h
index 61156dbf73d..00ff1ac83f0 100644
--- a/libstdc++-v3/include/bits/stl_tree.h
+++ b/libstdc++-v3/include/bits/stl_tree.h
@@ -144,7 +144,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       _M_valptr() const
       { return std::__addressof(_M_value_field); }
 #else
-      __gnu_cxx::__aligned_buffer<_Val> _M_storage;
+      __gnu_cxx::__aligned_membuf<_Val> _M_storage;
 
       _Val*
       _M_valptr()
@@ -186,7 +186,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       : _M_node() { }
 
       explicit
-      _Rb_tree_iterator(_Link_type __x) _GLIBCXX_NOEXCEPT
+      _Rb_tree_iterator(_Base_ptr __x) _GLIBCXX_NOEXCEPT
       : _M_node(__x) { }
 
       reference
@@ -258,7 +258,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       : _M_node() { }
 
       explicit
-      _Rb_tree_const_iterator(_Link_type __x) _GLIBCXX_NOEXCEPT
+      _Rb_tree_const_iterator(_Base_ptr __x) _GLIBCXX_NOEXCEPT
       : _M_node(__x) { }
 
       _Rb_tree_const_iterator(const iterator& __it) _GLIBCXX_NOEXCEPT
@@ -266,8 +266,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
       iterator
       _M_const_cast() const _GLIBCXX_NOEXCEPT
-      { return iterator(static_cast<typename iterator::_Link_type>
-			(const_cast<typename iterator::_Base_ptr>(_M_node))); }
+      { return iterator(const_cast<typename iterator::_Base_ptr>(_M_node)); }
 
       reference
       operator*() const _GLIBCXX_NOEXCEPT
@@ -764,28 +763,19 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
       iterator
       begin() _GLIBCXX_NOEXCEPT
-      { 
-	return iterator(static_cast<_Link_type>
-			(this->_M_impl._M_header._M_left));
-      }
+      { return iterator(this->_M_impl._M_header._M_left); }
 
       const_iterator
       begin() const _GLIBCXX_NOEXCEPT
-      { 
-	return const_iterator(static_cast<_Const_Link_type>
-			      (this->_M_impl._M_header._M_left));
-      }
+      { return const_iterator(this->_M_impl._M_header._M_left); }
 
       iterator
       end() _GLIBCXX_NOEXCEPT
-      { return iterator(static_cast<_Link_type>(&this->_M_impl._M_header)); }
+      { return iterator(&this->_M_impl._M_header); }
 
       const_iterator
       end() const _GLIBCXX_NOEXCEPT
-      { 
-	return const_iterator(static_cast<_Const_Link_type>
-			      (&this->_M_impl._M_header));
-      }
+      { return const_iterator(&this->_M_impl._M_header); }
 
       reverse_iterator
       rbegin() _GLIBCXX_NOEXCEPT
diff --git a/libstdc++-v3/include/c_compatibility/complex.h b/libstdc++-v3/include/c_compatibility/complex.h
index d072b68a835..fb8934958d0 100644
--- a/libstdc++-v3/include/c_compatibility/complex.h
+++ b/libstdc++-v3/include/c_compatibility/complex.h
@@ -26,21 +26,29 @@
  *  This is a Standard C++ Library header.
  */
 
-#include <bits/c++config.h>
+#ifndef _GLIBCXX_COMPLEX_H
+#define _GLIBCXX_COMPLEX_H 1
 
 #if __cplusplus >= 201103L
 # include <ccomplex>
+#else // C++98 and C++03
+
+// The C++ <complex> header is incompatible with the C99 <complex.h> header,
+// they cannot be included into a single translation unit portably. Notably,
+// C++11's <ccomplex> does not include C99's <complex.h> and in C++11's
+// <complex.h> is defined to provide only what C++11's <ccomplex> does in a
+// different namespace.
+#ifdef _GLIBCXX_COMPLEX
+#error "Cannot include both <complex> and C99's <complex.h>."
 #endif
 
-#if _GLIBCXX_HAVE_COMPLEX_H
-# include_next <complex.h>
-# ifdef _GLIBCXX_COMPLEX
-// See PR56111, keep the macro in C++03 if possible.
-#  undef complex
-# endif
-#endif
+// Delegate to a system complex.h if we don't provide it as part of the C++
+// implementation.
+#include_next <complex.h>
 
-#ifndef _GLIBCXX_COMPLEX_H
-#define _GLIBCXX_COMPLEX_H 1
+// Provide a define indicating that a C99-style <complex.h> has been included.
+#define _GLIBCXX_C99_COMPLEX_H
+
+#endif // C++98 and C++03
 
 #endif
diff --git a/libstdc++-v3/include/ext/aligned_buffer.h b/libstdc++-v3/include/ext/aligned_buffer.h
index 861de5be331..f7ab0fa24fc 100644
--- a/libstdc++-v3/include/ext/aligned_buffer.h
+++ b/libstdc++-v3/include/ext/aligned_buffer.h
@@ -39,6 +39,47 @@
 
 namespace __gnu_cxx
 {
+  // A utility type containing a POD object that can hold an object of type
+  // _Tp initialized via placement new or allocator_traits::construct.
+  // Intended for use as a data member subobject, use __aligned_buffer for
+  // complete objects.
+  template<typename _Tp>
+  struct __aligned_membuf
+  {
+    // Target macro ADJUST_FIELD_ALIGN can produce different alignment for
+    // types when used as class members. __aligned_membuf is intended
+    // for use as a class member, so align the buffer as for a class member.
+    struct _Tp2 { _Tp _M_t; };
+
+    alignas(__alignof__(_Tp2::_M_t)) unsigned char _M_storage[sizeof(_Tp)];
+
+    __aligned_membuf() = default;
+
+    // Can be used to avoid value-initialization zeroing _M_storage.
+    __aligned_membuf(std::nullptr_t) { }
+
+    void*
+    _M_addr() noexcept
+    { return static_cast<void*>(&_M_storage); }
+
+    const void*
+    _M_addr() const noexcept
+    { return static_cast<const void*>(&_M_storage); }
+
+    _Tp*
+    _M_ptr() noexcept
+    { return static_cast<_Tp*>(_M_addr()); }
+
+    const _Tp*
+    _M_ptr() const noexcept
+    { return static_cast<const _Tp*>(_M_addr()); }
+  };
+
+  // Similar to __aligned_membuf but aligned for complete objects, not members.
+  // This type is used in <forward_list>, <future>, <bits/shared_ptr_base.h>
+  // and <bits/hashtable_policy.h>, but ideally they would use __aligned_membuf
+  // instead, as it has smaller size for some types on some targets.
+  // This type is still used to avoid an ABI change.
   template<typename _Tp>
     struct __aligned_buffer
     : std::aligned_storage<sizeof(_Tp), std::alignment_of<_Tp>::value>
diff --git a/libstdc++-v3/include/std/array b/libstdc++-v3/include/std/array
index 67680d61e58..f69f5b402c2 100644
--- a/libstdc++-v3/include/std/array
+++ b/libstdc++-v3/include/std/array
@@ -48,9 +48,9 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
     {
       typedef _Tp _Type[_Nm];
 
-      static constexpr _Tp&
-      _S_ref(const _Type& __t, std::size_t __n) noexcept
-      { return const_cast<_Tp&>(__t[__n]); }
+      static constexpr _Tp*
+      _S_ptr(const _Type& __t, std::size_t __n) noexcept
+      { return const_cast<_Tp*>(std::__addressof(__t[__n])); }
     };
 
  template<typename _Tp>
@@ -58,9 +58,9 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
    {
      struct _Type { };
 
-     static constexpr _Tp&
-     _S_ref(const _Type&, std::size_t) noexcept
-     { return *static_cast<_Tp*>(nullptr); }
+     static constexpr _Tp*
+     _S_ptr(const _Type&, std::size_t) noexcept
+     { return static_cast<_Tp*>(nullptr); }
    };
 
   /**
@@ -170,11 +170,11 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
       // Element access.
       reference
       operator[](size_type __n) noexcept
-      { return _AT_Type::_S_ref(_M_elems, __n); }
+      { return *_AT_Type::_S_ptr(_M_elems, __n); }
 
       constexpr const_reference
       operator[](size_type __n) const noexcept
-      { return _AT_Type::_S_ref(_M_elems, __n); }
+      { return *_AT_Type::_S_ptr(_M_elems, __n); }
 
       reference
       at(size_type __n)
@@ -183,7 +183,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 	  std::__throw_out_of_range_fmt(__N("array::at: __n (which is %zu) "
 					    ">= _Nm (which is %zu)"),
 					__n, _Nm);
-	return _AT_Type::_S_ref(_M_elems, __n);
+	return *_AT_Type::_S_ptr(_M_elems, __n);
       }
 
       constexpr const_reference
@@ -191,11 +191,11 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
       {
 	// Result of conditional expression must be an lvalue so use
 	// boolean ? lvalue : (throw-expr, lvalue)
-	return __n < _Nm ? _AT_Type::_S_ref(_M_elems, __n)
+	return __n < _Nm ? *_AT_Type::_S_ptr(_M_elems, __n)
 	  : (std::__throw_out_of_range_fmt(__N("array::at: __n (which is %zu) "
 					       ">= _Nm (which is %zu)"),
 					   __n, _Nm),
-	     _AT_Type::_S_ref(_M_elems, 0));
+	     *_AT_Type::_S_ptr(_M_elems, 0));
       }
 
       reference 
@@ -204,7 +204,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 
       constexpr const_reference 
       front() const noexcept
-      { return _AT_Type::_S_ref(_M_elems, 0); }
+      { return *_AT_Type::_S_ptr(_M_elems, 0); }
 
       reference 
       back() noexcept
@@ -213,17 +213,17 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
       constexpr const_reference 
       back() const noexcept
       { 
-	return _Nm ? _AT_Type::_S_ref(_M_elems, _Nm - 1) 
- 	           : _AT_Type::_S_ref(_M_elems, 0);
+	return _Nm ? *_AT_Type::_S_ptr(_M_elems, _Nm - 1)
+          : *_AT_Type::_S_ptr(_M_elems, 0);
       }
 
       pointer
       data() noexcept
-      { return std::__addressof(_AT_Type::_S_ref(_M_elems, 0)); }
+      { return _AT_Type::_S_ptr(_M_elems, 0); }
 
       const_pointer
       data() const noexcept
-      { return std::__addressof(_AT_Type::_S_ref(_M_elems, 0)); }
+      { return _AT_Type::_S_ptr(_M_elems, 0); }
     };
 
   // Array comparisons.
@@ -272,8 +272,8 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
     get(array<_Tp, _Nm>& __arr) noexcept
     {
       static_assert(_Int < _Nm, "index is out of bounds");
-      return _GLIBCXX_STD_C::__array_traits<_Tp, _Nm>::
-	_S_ref(__arr._M_elems, _Int);
+      return *_GLIBCXX_STD_C::__array_traits<_Tp, _Nm>::
+	_S_ptr(__arr._M_elems, _Int);
     }
 
   template<std::size_t _Int, typename _Tp, std::size_t _Nm>
@@ -289,8 +289,8 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
     get(const array<_Tp, _Nm>& __arr) noexcept
     {
       static_assert(_Int < _Nm, "index is out of bounds");
-      return _GLIBCXX_STD_C::__array_traits<_Tp, _Nm>::
-	_S_ref(__arr._M_elems, _Int);
+      return *_GLIBCXX_STD_C::__array_traits<_Tp, _Nm>::
+	_S_ptr(__arr._M_elems, _Int);
     }
 
 _GLIBCXX_END_NAMESPACE_CONTAINER
diff --git a/libstdc++-v3/include/std/atomic b/libstdc++-v3/include/std/atomic
index ece75a4e4ba..be7408c0669 100644
--- a/libstdc++-v3/include/std/atomic
+++ b/libstdc++-v3/include/std/atomic
@@ -161,7 +161,15 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
     struct atomic
     {
     private:
-      _Tp _M_i;
+      // Align 1/2/4/8/16-byte types to at least their size.
+      static constexpr int _S_min_alignment
+        = (sizeof(_Tp) & (sizeof(_Tp) - 1)) || sizeof(_Tp) > 16
+	? 0 : sizeof(_Tp);
+
+      static constexpr int _S_alignment
+        = _S_min_alignment > alignof(_Tp) ? _S_min_alignment : alignof(_Tp);
+
+      alignas(_S_alignment) _Tp _M_i;
 
     public:
       atomic() noexcept = default;
diff --git a/libstdc++-v3/include/std/complex b/libstdc++-v3/include/std/complex
index 941e6b7d845..dd9611ec518 100644
--- a/libstdc++-v3/include/std/complex
+++ b/libstdc++-v3/include/std/complex
@@ -44,8 +44,14 @@
 #include <cmath>
 #include <sstream>
 
-// Get rid of a macro possibly defined in <complex.h>
-#undef complex
+// The C++ <complex> header is incompatible with the C99 <complex.h> header,
+// they cannot be included into a single translation unit portably. Notably,
+// C++11's <ccomplex> does not include C99's <complex.h> and in C++11's
+// <complex.h> is defined to provide only what C++11's <ccomplex> does in a
+// different namespace.
+#ifdef _GLIBCXX_C99_COMPLEX_H
+#error "Cannot include both <complex> and C99's <complex.h>."
+#endif
 
 namespace std _GLIBCXX_VISIBILITY(default)
 {
diff --git a/libstdc++-v3/python/libstdcxx/v6/printers.py b/libstdc++-v3/python/libstdcxx/v6/printers.py
index 1fa08fbd572..65b8a935823 100644
--- a/libstdc++-v3/python/libstdcxx/v6/printers.py
+++ b/libstdc++-v3/python/libstdcxx/v6/printers.py
@@ -443,11 +443,12 @@ class StdRbtreeIteratorPrinter:
 
     def __init__ (self, typename, val):
         self.val = val
+        valtype = self.val.type.template_argument(0).strip_typedefs()
+        nodetype = gdb.lookup_type('std::_Rb_tree_node<' + str(valtype) + '>')
+        self.link_type = nodetype.strip_typedefs().pointer()
 
     def to_string (self):
-        typename = str(self.val.type.strip_typedefs()) + '::_Link_type'
-        nodetype = gdb.lookup_type(typename).strip_typedefs()
-        node = self.val.cast(nodetype).dereference()
+        node = self.val['_M_node'].cast(self.link_type).dereference()
         return get_value_from_Rb_tree_node(node)
 
 class StdDebugIteratorPrinter:
diff --git a/libstdc++-v3/testsuite/20_util/forward/c_neg.cc b/libstdc++-v3/testsuite/20_util/forward/c_neg.cc
index fb900e01cc2..ce414de01b7 100644
--- a/libstdc++-v3/testsuite/20_util/forward/c_neg.cc
+++ b/libstdc++-v3/testsuite/20_util/forward/c_neg.cc
@@ -18,7 +18,7 @@
 // with this library; see the file COPYING3.  If not see
 // <http://www.gnu.org/licenses/>.
 
-// { dg-error "static assertion failed" "" { target *-*-* } 89 }
+// { dg-error "static assertion failed" "" { target *-*-* } 92 }
 
 #include <list>
 
diff --git a/libstdc++-v3/testsuite/20_util/forward/f_neg.cc b/libstdc++-v3/testsuite/20_util/forward/f_neg.cc
index c4914f0f776..4d50185448e 100644
--- a/libstdc++-v3/testsuite/20_util/forward/f_neg.cc
+++ b/libstdc++-v3/testsuite/20_util/forward/f_neg.cc
@@ -18,7 +18,7 @@
 // with this library; see the file COPYING3.  If not see
 // <http://www.gnu.org/licenses/>.
 
-// { dg-error "static assertion failed" "" { target *-*-* } 89 }
+// { dg-error "static assertion failed" "" { target *-*-* } 92 }
 
 #include <utility>
 
diff --git a/libstdc++-v3/testsuite/25_algorithms/unique/11480.cc b/libstdc++-v3/testsuite/25_algorithms/unique/11480.cc
index b007feb935d..82745856de9 100644
--- a/libstdc++-v3/testsuite/25_algorithms/unique/11480.cc
+++ b/libstdc++-v3/testsuite/25_algorithms/unique/11480.cc
@@ -33,7 +33,7 @@ void test01()
 {
   bool test __attribute__((unused)) = true;
 
-  std::unique(a, a+10, compare);
+  int* dummy __attribute__((unused)) = std::unique(a, a+10, compare);
   VERIFY( compare_count == 9 );
 }