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authorKelvin Nilsen <kelvin@gcc.gnu.org>2016-05-19 17:47:40 +0000
committerKelvin Nilsen <kelvin@gcc.gnu.org>2016-05-19 17:47:40 +0000
commit46f06c57d090c0261a8f58713cfc369c8c80316c (patch)
tree2a33177a5aa3d5a0a648142848d7bfc9c383a1d8
parente0b3c2f05bc2108b1cc48b75172cf3b37741b133 (diff)
gcc/testsuite/ChangeLog:
2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/darn-0.c: New test. * gcc.target/powerpc/darn-1.c: New test. * gcc.target/powerpc/darn-2.c: New test. gcc/ChangeLog: 2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/altivec.md (UNSPEC_DARN): New unspec constant. (UNSPEC_DARN_32): New unspec constant. (UNSPEC_DARN_RAW): New unspec constant. (darn_32): New instruction. (darn_raw): New instruction. (darn): New instruction. * config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_0): Add support and documentation for this macro. (BU_P9_MISC_1): New macro definition. (BU_P9_64BIT_MISC_0): New macro definition. (BU_P9_MISC_0): New macro definition. (darn_32): New builtin definition. (darn_raw): New builtin definition. (darn): New builtin definition. * config/rs6000/rs6000.c: Add #define RS6000_BUILTIN_0 and #undef RS6000_BUILTIN_0 directives to surround each occurrence of #include "rs6000-builtin.def". (rs6000_builtin_mask_calculate): Add in the RS6000_BTM_MODULO and RS6000_BTM_64BIT flags to the returned mask, depending on configuration. (def_builtin): Correct an error in the assignments made to the debugging variable attr_string. (rs6000_expand_builtin): Add support for no-operand built-in functions. (builtin_function_type): Remove fatal_error assertion that is no longer valid. (rs6000_common_init_builtins): Add support for no-operand built-in functions. * config/rs6000/rs6000.h (RS6000_BTM_MODULO): New macro definition. (RS6000_BTM_PURE): Enhance comment to clarify intent of this flag definition. (RS6000_BTM_64BIT): New macro definition. * doc/extend.texi: Document __builtin_darn (void), __builtin_darn_raw (void), and __builtin_darn_32 (void) built-in functions. git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@236480 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog39
-rw-r--r--gcc/config/rs6000/altivec.md24
-rw-r--r--gcc/config/rs6000/rs6000-builtin.def45
-rw-r--r--gcc/config/rs6000/rs6000.c143
-rw-r--r--gcc/config/rs6000/rs6000.h13
-rw-r--r--gcc/doc/extend.texi17
-rw-r--r--gcc/testsuite/ChangeLog6
-rw-r--r--gcc/testsuite/gcc.target/powerpc/darn-0.c12
-rw-r--r--gcc/testsuite/gcc.target/powerpc/darn-1.c12
-rw-r--r--gcc/testsuite/gcc.target/powerpc/darn-2.c12
10 files changed, 313 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3d68ae1c237..d44c793b840 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,42 @@
+2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org>
+
+ * config/rs6000/altivec.md (UNSPEC_DARN): New unspec constant.
+ (UNSPEC_DARN_32): New unspec constant.
+ (UNSPEC_DARN_RAW): New unspec constant.
+ (darn_32): New instruction.
+ (darn_raw): New instruction.
+ (darn): New instruction.
+ * config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_0): Add
+ support and documentation for this macro.
+ (BU_P9_MISC_1): New macro definition.
+ (BU_P9_64BIT_MISC_0): New macro definition.
+ (BU_P9_MISC_0): New macro definition.
+ (darn_32): New builtin definition.
+ (darn_raw): New builtin definition.
+ (darn): New builtin definition.
+ * config/rs6000/rs6000.c: Add #define RS6000_BUILTIN_0 and #undef
+ RS6000_BUILTIN_0 directives to surround each occurrence of
+ #include "rs6000-builtin.def".
+ (rs6000_builtin_mask_calculate): Add in the RS6000_BTM_MODULO and
+ RS6000_BTM_64BIT flags to the returned mask, depending on
+ configuration.
+ (def_builtin): Correct an error in the assignments made to the
+ debugging variable attr_string.
+ (rs6000_expand_builtin): Add support for no-operand built-in
+ functions.
+ (builtin_function_type): Remove fatal_error assertion that is no
+ longer valid.
+ (rs6000_common_init_builtins): Add support for no-operand built-in
+ functions.
+ * config/rs6000/rs6000.h (RS6000_BTM_MODULO): New macro
+ definition.
+ (RS6000_BTM_PURE): Enhance comment to clarify intent of this flag
+ definition.
+ (RS6000_BTM_64BIT): New macro definition.
+ * doc/extend.texi: Document __builtin_darn (void),
+ __builtin_darn_raw (void), and __builtin_darn_32 (void) built-in
+ functions.
+
2016-05-19 Jan Hubicka <hubicka@ucw.cz>
* tree-vect-loop.c (vect_analyze_loop_2): Use also
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 7a8c8ebf3f3..e94aec39d73 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -73,6 +73,9 @@
UNSPEC_VUNPACK_LO_SIGN_DIRECT
UNSPEC_VUPKHPX
UNSPEC_VUPKLPX
+ UNSPEC_DARN
+ UNSPEC_DARN_32
+ UNSPEC_DARN_RAW
UNSPEC_DST
UNSPEC_DSTT
UNSPEC_DSTST
@@ -3590,6 +3593,27 @@
[(set_attr "length" "4")
(set_attr "type" "vecsimple")])
+(define_insn "darn_32"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (unspec:SI [(const_int 0)] UNSPEC_DARN_32))]
+ "TARGET_MODULO"
+ "darn %0,0"
+ [(set_attr "type" "integer")])
+
+(define_insn "darn_raw"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))]
+ "TARGET_MODULO && TARGET_64BIT"
+ "darn %0,2"
+ [(set_attr "type" "integer")])
+
+(define_insn "darn"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (unspec:DI [(const_int 0)] UNSPEC_DARN))]
+ "TARGET_MODULO && TARGET_64BIT"
+ "darn %0,1"
+ [(set_attr "type" "integer")])
+
(define_expand "bcd<bcd_add_sub>_<code>"
[(parallel [(set (reg:CCFP 74)
(compare:CCFP
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index ef9fbadd200..190df93bfdc 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -24,6 +24,7 @@
<http://www.gnu.org/licenses/>. */
/* Before including this file, some macros must be defined:
+ RS6000_BUILTIN_0 -- 0 arg builtins
RS6000_BUILTIN_1 -- 1 arg builtins
RS6000_BUILTIN_2 -- 2 arg builtins
RS6000_BUILTIN_3 -- 3 arg builtins
@@ -43,6 +44,10 @@
ATTR builtin attribute information.
ICODE Insn code of the function that implents the builtin. */
+#ifndef RS6000_BUILTIN_0
+ #error "RS6000_BUILTIN_0 is not defined."
+#endif
+
#ifndef RS6000_BUILTIN_1
#error "RS6000_BUILTIN_1 is not defined."
#endif
@@ -637,6 +642,41 @@
| RS6000_BTC_TERNARY), \
CODE_FOR_ ## ICODE) /* ICODE */
+/* Miscellaneous builtins for instructions added in ISA 3.0. These
+ instructions don't require either the DFP or VSX options, just the basic
+ ISA 3.0 enablement since they operate on general purpose registers. */
+#define BU_P9_MISC_1(ENUM, NAME, ATTR, ICODE) \
+ RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
+ "__builtin_" NAME, /* NAME */ \
+ RS6000_BTM_MODULO, /* MASK */ \
+ (RS6000_BTC_ ## ATTR /* ATTR */ \
+ | RS6000_BTC_UNARY), \
+ CODE_FOR_ ## ICODE) /* ICODE */
+
+/* Miscellaneous builtins for instructions added in ISA 3.0. These
+ instructions don't require either the DFP or VSX options, just the basic
+ ISA 3.0 enablement since they operate on general purpose registers,
+ and they require 64-bit addressing. */
+#define BU_P9_64BIT_MISC_0(ENUM, NAME, ATTR, ICODE) \
+ RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
+ "__builtin_" NAME, /* NAME */ \
+ RS6000_BTM_MODULO \
+ | RS6000_BTM_64BIT, /* MASK */ \
+ (RS6000_BTC_ ## ATTR /* ATTR */ \
+ | RS6000_BTC_SPECIAL), \
+ CODE_FOR_ ## ICODE) /* ICODE */
+
+/* Miscellaneous builtins for instructions added in ISA 3.0. These
+ instructions don't require either the DFP or VSX options, just the basic
+ ISA 3.0 enablement since they operate on general purpose registers. */
+#define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE) \
+ RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
+ "__builtin_" NAME, /* NAME */ \
+ RS6000_BTM_MODULO, /* MASK */ \
+ (RS6000_BTC_ ## ATTR /* ATTR */ \
+ | RS6000_BTC_SPECIAL), \
+ CODE_FOR_ ## ICODE) /* ICODE */
+
/* 128-bit long double floating point builtins. */
#define BU_LDBL128_2(ENUM, NAME, ATTR, ICODE) \
RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \
@@ -1653,6 +1693,11 @@ BU_P8V_MISC_3 (BCDSUB_OV, "bcdsub_ov", CONST, bcdsub_unordered)
BU_DFP_MISC_2 (PACK_TD, "pack_dec128", CONST, packtd)
BU_DFP_MISC_2 (UNPACK_TD, "unpack_dec128", CONST, unpacktd)
+/* 0 argument general-purpose register functions added in ISA 3.0 (power9). */
+BU_P9_MISC_0 (DARN_32, "darn_32", MISC, darn_32)
+BU_P9_64BIT_MISC_0 (DARN_RAW, "darn_raw", MISC, darn_raw)
+BU_P9_64BIT_MISC_0 (DARN, "darn", MISC, darn)
+
BU_LDBL128_2 (PACK_TF, "pack_longdouble", CONST, packtf)
BU_LDBL128_2 (UNPACK_TF, "unpack_longdouble", CONST, unpacktf)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index a1841bce765..092867520d3 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1139,6 +1139,7 @@ struct processor_costs ppca2_cost = {
/* Table that classifies rs6000 builtin functions (pure, const, etc.). */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -1151,6 +1152,9 @@ struct processor_costs ppca2_cost = {
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \
+ { NAME, ICODE, MASK, ATTR },
+
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \
{ NAME, ICODE, MASK, ATTR },
@@ -1196,6 +1200,7 @@ static const struct rs6000_builtin_info_type rs6000_builtin_info[] =
#include "rs6000-builtin.def"
};
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -3663,6 +3668,8 @@ rs6000_builtin_mask_calculate (void)
| ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0)
| ((TARGET_P8_VECTOR) ? RS6000_BTM_P8_VECTOR : 0)
| ((TARGET_P9_VECTOR) ? RS6000_BTM_P9_VECTOR : 0)
+ | ((TARGET_MODULO) ? RS6000_BTM_MODULO : 0)
+ | ((TARGET_64BIT) ? RS6000_BTM_64BIT : 0)
| ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0)
| ((TARGET_HTM) ? RS6000_BTM_HTM : 0)
| ((TARGET_DFP) ? RS6000_BTM_DFP : 0)
@@ -12710,7 +12717,7 @@ def_builtin (const char *name, tree type, enum rs6000_builtins code)
/* const function, function only depends on the inputs. */
TREE_READONLY (t) = 1;
TREE_NOTHROW (t) = 1;
- attr_string = ", pure";
+ attr_string = ", const";
}
else if ((classify & RS6000_BTC_PURE) != 0)
{
@@ -12718,7 +12725,7 @@ def_builtin (const char *name, tree type, enum rs6000_builtins code)
external state. */
DECL_PURE_P (t) = 1;
TREE_NOTHROW (t) = 1;
- attr_string = ", const";
+ attr_string = ", pure";
}
else if ((classify & RS6000_BTC_FP) != 0)
{
@@ -12750,6 +12757,7 @@ def_builtin (const char *name, tree type, enum rs6000_builtins code)
/* Simple ternary operations: VECd = foo (VECa, VECb, VECc). */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12762,6 +12770,7 @@ def_builtin (const char *name, tree type, enum rs6000_builtins code)
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) \
@@ -12783,6 +12792,7 @@ static const struct builtin_description bdesc_3arg[] =
/* DST operations: void foo (void *, const int, const char). */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12795,6 +12805,7 @@ static const struct builtin_description bdesc_3arg[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
@@ -12816,6 +12827,7 @@ static const struct builtin_description bdesc_dst[] =
/* Simple binary operations: VECc = foo (VECa, VECb). */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12828,6 +12840,7 @@ static const struct builtin_description bdesc_dst[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) \
{ MASK, ICODE, NAME, ENUM },
@@ -12847,6 +12860,7 @@ static const struct builtin_description bdesc_2arg[] =
#include "rs6000-builtin.def"
};
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12859,6 +12873,7 @@ static const struct builtin_description bdesc_2arg[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
@@ -12881,6 +12896,7 @@ static const struct builtin_description bdesc_altivec_preds[] =
};
/* SPE predicates. */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12893,6 +12909,7 @@ static const struct builtin_description bdesc_altivec_preds[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
@@ -12913,6 +12930,7 @@ static const struct builtin_description bdesc_spe_predicates[] =
};
/* SPE evsel predicates. */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12925,6 +12943,7 @@ static const struct builtin_description bdesc_spe_predicates[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
@@ -12945,6 +12964,7 @@ static const struct builtin_description bdesc_spe_evsel[] =
};
/* PAIRED predicates. */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12957,6 +12977,7 @@ static const struct builtin_description bdesc_spe_evsel[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
@@ -12978,6 +12999,7 @@ static const struct builtin_description bdesc_paired_preds[] =
/* ABS* operations. */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -12990,6 +13012,7 @@ static const struct builtin_description bdesc_paired_preds[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
@@ -13012,6 +13035,7 @@ static const struct builtin_description bdesc_abs[] =
/* Simple unary operations: VECb = foo (unsigned literal) or VECb =
foo (VECa). */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -13024,6 +13048,7 @@ static const struct builtin_description bdesc_abs[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) \
{ MASK, ICODE, NAME, ENUM },
@@ -13043,7 +13068,43 @@ static const struct builtin_description bdesc_1arg[] =
#include "rs6000-builtin.def"
};
+/* Simple no-argument operations: result = __builtin_darn_32 () */
+
+#undef RS6000_BUILTIN_0
+#undef RS6000_BUILTIN_1
+#undef RS6000_BUILTIN_2
+#undef RS6000_BUILTIN_3
+#undef RS6000_BUILTIN_A
+#undef RS6000_BUILTIN_D
+#undef RS6000_BUILTIN_E
+#undef RS6000_BUILTIN_H
+#undef RS6000_BUILTIN_P
+#undef RS6000_BUILTIN_Q
+#undef RS6000_BUILTIN_S
+#undef RS6000_BUILTIN_X
+
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) \
+ { MASK, ICODE, NAME, ENUM },
+
+#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_A(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_D(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_E(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_H(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_P(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_Q(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_S(ENUM, NAME, MASK, ATTR, ICODE)
+#define RS6000_BUILTIN_X(ENUM, NAME, MASK, ATTR, ICODE)
+
+static const struct builtin_description bdesc_0arg[] =
+{
+#include "rs6000-builtin.def"
+};
+
/* HTM builtins. */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -13056,6 +13117,7 @@ static const struct builtin_description bdesc_1arg[] =
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE)
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE)
@@ -13075,6 +13137,7 @@ static const struct builtin_description bdesc_htm[] =
#include "rs6000-builtin.def"
};
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -13159,7 +13222,6 @@ rs6000_expand_mtfsf_builtin (enum insn_code icode, tree exp)
return NULL_RTX;
}
-
static rtx
rs6000_expand_unop_builtin (enum insn_code icode, tree exp, rtx target)
{
@@ -15599,10 +15661,12 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
}
unsigned attr = rs6000_builtin_info[uns_fcode].attr & RS6000_BTC_TYPE_MASK;
+ /* RS6000_BTC_SPECIAL represents no-operand operators. */
gcc_assert (attr == RS6000_BTC_UNARY
|| attr == RS6000_BTC_BINARY
- || attr == RS6000_BTC_TERNARY);
-
+ || attr == RS6000_BTC_TERNARY
+ || attr == RS6000_BTC_SPECIAL);
+
/* Handle simple unary operations. */
d = bdesc_1arg;
for (i = 0; i < ARRAY_SIZE (bdesc_1arg); i++, d++)
@@ -15621,6 +15685,12 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
if (d->code == fcode)
return rs6000_expand_ternop_builtin (d->icode, exp, target);
+ /* Handle simple no-argument operations. */
+ d = bdesc_0arg;
+ for (i = 0; i < ARRAY_SIZE (bdesc_0arg); i++, d++)
+ if (d->code == fcode)
+ return rs6000_expand_zeroop_builtin (d->icode, target);
+
gcc_unreachable ();
}
@@ -17001,10 +17071,6 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0,
while (num_args > 0 && h.mode[num_args] == VOIDmode)
num_args--;
- if (num_args == 0)
- fatal_error (input_location,
- "internal error: builtin function %s had no type", name);
-
ret_type = builtin_mode_to_type[h.mode[0]][h.uns_p[0]];
if (!ret_type && h.uns_p[0])
ret_type = builtin_mode_to_type[h.mode[0]][0];
@@ -17056,6 +17122,7 @@ rs6000_common_init_builtins (void)
tree opaque_ftype_opaque = NULL_TREE;
tree opaque_ftype_opaque_opaque = NULL_TREE;
tree opaque_ftype_opaque_opaque_opaque = NULL_TREE;
+ tree v2si_ftype = NULL_TREE;
tree v2si_ftype_qi = NULL_TREE;
tree v2si_ftype_v2si_qi = NULL_TREE;
tree v2si_ftype_int_qi = NULL_TREE;
@@ -17272,6 +17339,64 @@ rs6000_common_init_builtins (void)
def_builtin (d->name, type, d->code);
}
+
+ /* Add the simple no-argument operators. */
+ d = bdesc_0arg;
+ for (i = 0; i < ARRAY_SIZE (bdesc_0arg); i++, d++)
+ {
+ machine_mode mode0;
+ tree type;
+ HOST_WIDE_INT mask = d->mask;
+
+ if ((mask & builtin_mask) != mask)
+ {
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "rs6000_builtin, skip no-argument %s\n", d->name);
+ continue;
+ }
+ if (rs6000_overloaded_builtin_p (d->code))
+ {
+ if (!opaque_ftype_opaque)
+ opaque_ftype_opaque
+ = build_function_type_list (opaque_V4SI_type_node, NULL_TREE);
+ type = opaque_ftype_opaque;
+ }
+ else
+ {
+ enum insn_code icode = d->icode;
+ if (d->name == 0)
+ {
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr, "rs6000_builtin, bdesc_0arg[%lu] no name\n",
+ (long unsigned) i);
+ continue;
+ }
+ if (icode == CODE_FOR_nothing)
+ {
+ if (TARGET_DEBUG_BUILTIN)
+ fprintf (stderr,
+ "rs6000_builtin, skip no-argument %s (no code)\n",
+ d->name);
+ continue;
+ }
+ mode0 = insn_data[icode].operand[0].mode;
+ if (mode0 == V2SImode)
+ {
+ /* code for SPE */
+ if (! (type = v2si_ftype))
+ {
+ v2si_ftype
+ = build_function_type_list (opaque_V2SI_type_node,
+ NULL_TREE);
+ type = v2si_ftype;
+ }
+ }
+ else
+ type = builtin_function_type (mode0, VOIDmode, VOIDmode, VOIDmode,
+ d->code, d->name);
+ }
+ def_builtin (d->name, type, d->code);
+ }
}
/* Set up AIX/Darwin/64-bit Linux quad floating point routines. */
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 9647106fbcd..a438bfb1b23 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -648,6 +648,11 @@ extern int rs6000_vector_align[];
#define MASK_PROTOTYPE OPTION_MASK_PROTOTYPE
#endif
+#ifdef TARGET_MODULO
+#define RS6000_BTM_MODULO OPTION_MASK_MODULO
+#endif
+
+
/* For power systems, we want to enable Altivec and VSX builtins even if the
user did not use -maltivec or -mvsx to allow the builtins to be used inside
of #pragma GCC target or the target attribute to change the code level for a
@@ -2636,7 +2641,9 @@ extern int frame_pointer_needed;
#define RS6000_BTC_MISC 0x00000000 /* No special attributes. */
#define RS6000_BTC_CONST 0x00000100 /* uses no global state. */
-#define RS6000_BTC_PURE 0x00000200 /* reads global state/mem. */
+#define RS6000_BTC_PURE 0x00000200 /* reads global
+ state/mem and does
+ not modify global state. */
#define RS6000_BTC_FP 0x00000400 /* depends on rounding mode. */
#define RS6000_BTC_ATTR_MASK 0x00000700 /* Mask of the attributes. */
@@ -2672,6 +2679,7 @@ extern int frame_pointer_needed;
#define RS6000_BTM_DFP MASK_DFP /* Decimal floating point. */
#define RS6000_BTM_HARD_FLOAT MASK_SOFT_FLOAT /* Hardware floating point. */
#define RS6000_BTM_LDBL128 MASK_MULTIPLE /* 128-bit long double. */
+#define RS6000_BTM_64BIT MASK_64BIT /* 64-bit addressing. */
#define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \
| RS6000_BTM_VSX \
@@ -2691,6 +2699,7 @@ extern int frame_pointer_needed;
/* Define builtin enum index. */
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
@@ -2703,6 +2712,7 @@ extern int frame_pointer_needed;
#undef RS6000_BUILTIN_S
#undef RS6000_BUILTIN_X
+#define RS6000_BUILTIN_0(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_1(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_2(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
#define RS6000_BUILTIN_3(ENUM, NAME, MASK, ATTR, ICODE) ENUM,
@@ -2722,6 +2732,7 @@ enum rs6000_builtins
RS6000_BUILTIN_COUNT
};
+#undef RS6000_BUILTIN_0
#undef RS6000_BUILTIN_1
#undef RS6000_BUILTIN_2
#undef RS6000_BUILTIN_3
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index e4d6c1c88be..5199134ca3c 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -14686,6 +14686,23 @@ The @code{__builtin_divde}, @code{__builtin_divdeo},
64-bit environment support ISA 2.06 or later.
The following built-in functions are available for the PowerPC family
+of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}
+or @option{-mmodulo}):
+@smallexample
+long long __builtin_darn (void);
+long long __builtin_darn_raw (void);
+int __builtin_darn_32 (void);
+@end smallexample
+
+The @code{__builtin_darn} and @code{__builtin_darn_raw}
+functions require a
+64-bit environment supporting ISA 3.0 or later.
+The @code{__builtin_darn} function provides a 64-bit conditioned
+random number. The @code{__builtin_darn_raw} function provides a
+64-bit raw random number. The @code{__builtin_darn_32} function
+provides a 32-bit random number.
+
+The following built-in functions are available for the PowerPC family
of processors when hardware decimal floating point
(@option{-mhard-dfp}) is available:
@smallexample
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f9ea24016ca..f543d183219 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-19 Kelvin Nilsen <kelvin@gcc.gnu.org>
+
+ * gcc.target/powerpc/darn-0.c: New test.
+ * gcc.target/powerpc/darn-1.c: New test.
+ * gcc.target/powerpc/darn-2.c: New test.
+
2016-05-19 Marek Polacek <polacek@redhat.com>
PR tree-optimization/71031
diff --git a/gcc/testsuite/gcc.target/powerpc/darn-0.c b/gcc/testsuite/gcc.target/powerpc/darn-0.c
new file mode 100644
index 00000000000..ce2e25e22a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/darn-0.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations. */
+#include <altivec.h>
+
+int get_random ()
+{
+ return __builtin_darn_32 ();
+}
+
+/* { dg-final { scan-assembler "darn" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/darn-1.c b/gcc/testsuite/gcc.target/powerpc/darn-1.c
new file mode 100644
index 00000000000..d79e5c1b4d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/darn-1.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+/* { dg-require-effective-target lp64 } */
+
+#include <altivec.h>
+
+long long get_conditioned_random ()
+{
+ return __builtin_darn ();
+}
+
+/* { dg-final { scan-assembler "darn" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/darn-2.c b/gcc/testsuite/gcc.target/powerpc/darn-2.c
new file mode 100644
index 00000000000..7f47332ec49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/darn-2.c
@@ -0,0 +1,12 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-mcpu=power9" } */
+/* { dg-require-effective-target lp64 } */
+
+#include <altivec.h>
+
+long long get_raw_random ()
+{
+ return __builtin_darn_raw ();
+}
+
+/* { dg-final { scan-assembler "darn" } } */