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authorPeter Bergner <bergner@linux.ibm.com>2019-11-25 16:57:04 +0000
committerPeter Bergner <bergner@linux.ibm.com>2019-11-25 16:57:04 +0000
commit710e6f3966c8738a8666a47cc9e8ff5e3fc1c1c4 (patch)
tree54c81df9c0f76ef350101038a92b2f4774af9207
parentb3875f87fbe002ad43f35ba5cc16efc80f809883 (diff)
parentb370f9fa8c44e8f1e2e0cda6336030c3b06a3f7b (diff)
Merge up to 278620.ibm/gcc-8-branch
* REVISION: Update subversion id. git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ibm/gcc-8-branch@278692 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog499
-rw-r--r--gcc/ChangeLog.ibm5
-rw-r--r--gcc/DATESTAMP2
-rw-r--r--gcc/Makefile.in3
-rw-r--r--gcc/REVISION2
-rw-r--r--gcc/c/ChangeLog10
-rw-r--r--gcc/c/c-parser.c5
-rw-r--r--gcc/calls.c13
-rw-r--r--gcc/cfgcleanup.c9
-rw-r--r--gcc/config/arm/arm.c84
-rw-r--r--gcc/config/darwin-protos.h2
-rw-r--r--gcc/config/darwin.c479
-rw-r--r--gcc/config/darwin.h125
-rw-r--r--gcc/config/darwin.opt4
-rw-r--r--gcc/config/i386/darwin.h36
-rw-r--r--gcc/config/i386/i386.c38
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/config/i386/intelmic-mkoffload.c5
-rw-r--r--gcc/config/mips/mips.md4
-rw-r--r--gcc/config/pa/pa.c227
-rw-r--r--gcc/config/pa/pa.h15
-rw-r--r--gcc/config/pa/pa.md52
-rw-r--r--gcc/config/pa/pa.opt8
-rw-r--r--gcc/config/rs6000/altivec.md4
-rw-r--r--gcc/config/rs6000/darwin.h43
-rw-r--r--gcc/config/rs6000/darwin.md32
-rw-r--r--gcc/config/rs6000/predicates.md3
-rw-r--r--gcc/config/rs6000/rs6000-builtin.def12
-rw-r--r--gcc/config/rs6000/rs6000.c154
-rw-r--r--gcc/config/rs6000/rs6000.md8
-rw-r--r--gcc/config/sparc/sparc-protos.h1
-rw-r--r--gcc/config/sparc/sparc.c121
-rw-r--r--gcc/config/sparc/sparc.md5
-rwxr-xr-xgcc/configure10
-rw-r--r--gcc/configure.ac5
-rw-r--r--gcc/cp/ChangeLog36
-rw-r--r--gcc/cp/cp-gimplify.c21
-rw-r--r--gcc/cp/decl.c4
-rw-r--r--gcc/cp/parser.c15
-rw-r--r--gcc/doc/invoke.texi2
-rw-r--r--gcc/expmed.c21
-rw-r--r--gcc/fortran/ChangeLog20
-rw-r--r--gcc/fortran/resolve.c8
-rw-r--r--gcc/fortran/trans-decl.c48
-rw-r--r--gcc/function.c19
-rw-r--r--gcc/gimplify.c4
-rw-r--r--gcc/internal-fn.c27
-rw-r--r--gcc/lra-constraints.c16
-rw-r--r--gcc/optabs.c19
-rw-r--r--gcc/testsuite/ChangeLog244
-rw-r--r--gcc/testsuite/c-c++-common/cpp/pr92296-1.c32
-rw-r--r--gcc/testsuite/c-c++-common/cpp/pr92296-2.c73
-rw-r--r--gcc/testsuite/c-c++-common/gomp/pr91401-1.c10
-rw-r--r--gcc/testsuite/c-c++-common/gomp/pr91401-2.c15
-rw-r--r--gcc/testsuite/g++.dg/concepts/no-bool1.C4
-rw-r--r--gcc/testsuite/g++.dg/cpp1z/eval-order5.C31
-rw-r--r--gcc/testsuite/g++.dg/other/pr92201.C7
-rw-r--r--gcc/testsuite/g++.dg/tls/pr77285-2.C2
-rw-r--r--gcc/testsuite/g++.dg/torture/pr91355.C28
-rw-r--r--gcc/testsuite/g++.dg/torture/pr92384.C38
-rw-r--r--gcc/testsuite/gcc.c-torture/compile/20191108-1.c14
-rw-r--r--gcc/testsuite/gcc.c-torture/compile/pr72802.c1
-rw-r--r--gcc/testsuite/gcc.c-torture/compile/pr90840.c19
-rw-r--r--gcc/testsuite/gcc.c-torture/compile/pr91001.c31
-rw-r--r--gcc/testsuite/gcc.c-torture/compile/pr92056.c18
-rw-r--r--gcc/testsuite/gcc.c-torture/execute/pr91450-1.c88
-rw-r--r--gcc/testsuite/gcc.c-torture/execute/pr91450-2.c76
-rw-r--r--gcc/testsuite/gcc.dg/Wnonnull.c9
-rw-r--r--gcc/testsuite/gcc.dg/pr90760.c1
-rw-r--r--gcc/testsuite/gcc.dg/pr90898.c16
-rw-r--r--gcc/testsuite/gcc.dg/vect/pr91665.c15
-rw-r--r--gcc/testsuite/gcc.target/arm/pr86487.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/pr88167-1.c15
-rw-r--r--gcc/testsuite/gcc.target/arm/pr88167-2.c18
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-1.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-3.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-4.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/pr32219-2.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/pr32219-3.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/pr32219-4.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/pr32219-7.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/pr32219-8.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/pr90867.c30
-rw-r--r--gcc/testsuite/gcc.target/i386/pr91623.c32
-rw-r--r--gcc/testsuite/gcc.target/i386/ret-thunk-14.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/ret-thunk-15.c2
-rw-r--r--gcc/testsuite/gcc.target/i386/ret-thunk-9.c2
-rw-r--r--gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c19
-rw-r--r--gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c23
-rw-r--r--gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c23
-rw-r--r--gcc/testsuite/gcc.target/powerpc/bfp/bfp.exp6
-rw-r--r--gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp7
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr70010-1.c18
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr70010-3.c17
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr70010-4.c17
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr70010.c20
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr92090-2.c45
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr92090.c43
-rw-r--r--gcc/testsuite/gcc.target/sparc/overflow-1.c2
-rw-r--r--gcc/testsuite/gcc.target/sparc/overflow-2.c2
-rw-r--r--gcc/testsuite/gcc.target/sparc/overflow-3.c2
-rw-r--r--gcc/testsuite/gcc.target/sparc/overflow-4.c2
-rw-r--r--gcc/testsuite/gcc.target/sparc/overflow-5.c2
-rw-r--r--gcc/testsuite/gfortran.dg/char_result_19.f9024
-rw-r--r--gcc/testsuite/gfortran.dg/char_result_mod_19.f9018
-rw-r--r--gcc/testsuite/lib/target-supports.exp29
-rw-r--r--gcc/testsuite/obj-c++.dg/stubify-1.mm12
-rw-r--r--gcc/testsuite/obj-c++.dg/stubify-2.mm9
-rw-r--r--gcc/testsuite/objc.dg/stubify-1.m12
-rw-r--r--gcc/testsuite/objc.dg/stubify-2.m11
-rw-r--r--gcc/tree-object-size.c3
-rw-r--r--gcc/tree-ssa-ccp.c8
-rw-r--r--gcc/tree-ssa-sink.c2
-rw-r--r--gcc/tree-vect-loop.c5
-rw-r--r--libcpp/ChangeLog14
-rw-r--r--libcpp/directives.c7
-rw-r--r--libcpp/init.c20
-rw-r--r--libcpp/internal.h4
-rw-r--r--libgcc/ChangeLog67
-rw-r--r--libgcc/config.host6
-rw-r--r--libgcc/config/pa/fptr.c16
-rw-r--r--libgcc/config/pa/lib2funcs.S12
-rw-r--r--libgcc/config/pa/linux-atomic.c210
-rw-r--r--libgcc/config/pa/milli64.S23
-rw-r--r--libgcc/config/rs6000/t-darwin56
-rw-r--r--libgcc/config/rs6000/t-darwin646
-rw-r--r--libgcc/config/t-darwin14
-rw-r--r--libquadmath/ChangeLog9
-rw-r--r--libquadmath/quadmath.h28
-rw-r--r--libstdc++-v3/ChangeLog78
-rw-r--r--libstdc++-v3/doc/Makefile.am7
-rw-r--r--libstdc++-v3/doc/Makefile.in7
-rw-r--r--libstdc++-v3/doc/html/manual/documentation_hacking.html7
-rw-r--r--libstdc++-v3/doc/html/manual/memory.html10
-rw-r--r--libstdc++-v3/doc/xml/manual/allocator.xml13
-rw-r--r--libstdc++-v3/doc/xml/manual/documentation_hacking.xml9
-rw-r--r--libstdc++-v3/include/bits/memoryfwd.h2
-rw-r--r--libstdc++-v3/include/tr2/dynamic_bitset295
-rw-r--r--libstdc++-v3/include/tr2/dynamic_bitset.tcc2
-rw-r--r--libstdc++-v3/libsupc++/new_opa.cc5
-rw-r--r--libstdc++-v3/testsuite/17_intro/names.cc4
-rw-r--r--libstdc++-v3/testsuite/20_util/is_nothrow_invocable/value.cc4
-rw-r--r--libstdc++-v3/testsuite/experimental/names.cc7
-rw-r--r--libstdc++-v3/testsuite/tr2/dynamic_bitset/cmp.cc50
-rw-r--r--libstdc++-v3/testsuite/tr2/dynamic_bitset/cons.cc105
-rw-r--r--libstdc++-v3/testsuite/tr2/dynamic_bitset/copy.cc55
-rw-r--r--libstdc++-v3/testsuite/tr2/dynamic_bitset/move.cc53
-rw-r--r--libstdc++-v3/testsuite/tr2/dynamic_bitset/pr92059.cc36
163 files changed, 3801 insertions, 1037 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 041f1d123cc..94048e3a741 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,502 @@
+2019-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/91355
+ * tree-ssa-sink.c (select_best_block): Use >= rather than >
+ for early_bb scaled count with best_bb count comparison.
+
+ Backported from mainline
+ 2019-11-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/90840
+ * expmed.c (store_bit_field_1): Handle the case where op0 is not a MEM
+ and has a mode that doesn't have corresponding integral type.
+
+ PR target/90867
+ * config/i386/i386.c (ix86_valid_target_attribute_tree): Don't
+ clear opts->x_ix86_isa_flags{,2} here...
+ (ix86_valid_target_attribute_inner_p): ... but here when seeing
+ arch=. Also clear opts->x_ix86_isa_flags{,2}_explicit.
+
+ PR c/90898
+ * tree-ssa-ccp.c (insert_clobber_before_stack_restore): Remove
+ assertion.
+ (insert_clobbers_for_var): Fix a typo in function comment.
+
+ 2019-11-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/91450
+ * internal-fn.c (expand_mul_overflow): For s1 * s2 -> ur, if one
+ operand is negative and one non-negative, compare the non-negative
+ one against 0 rather than comparing s1 & s2 against 0. Otherwise,
+ don't compare (s1 & s2) == 0, but compare separately both s1 == 0
+ and s2 == 0, unless one of them is known to be negative. Remove
+ tem2 variable, use tem where tem2 has been used before.
+
+ 2019-11-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/92384
+ * function.c (assign_parm_setup_block, assign_parm_setup_stack): Don't
+ copy TYPE_EMPTY_P arguments from data->entry_parm to data->stack_parm
+ slot.
+ (assign_parms): For TREE_ADDRESSABLE parms with TYPE_EMPTY_P type
+ force creation of a unique data.stack_parm slot.
+
+ 2019-10-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/92056
+ * tree-object-size.c (cond_expr_object_size): Return early if then_
+ processing resulted in unknown size.
+
+ 2019-09-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/91665
+ * tree-vect-loop.c (vectorizable_reduction): Punt if base has type
+ incompatible with the type of PHI result.
+
+ 2019-09-06 Jakub Jelinek <jakub@redhat.com>
+
+ * function.c (assign_parm_find_data_types): Use RECORD_OR_UNION_TYPE_P
+ before testing TYPE_TRANSPARENT_AGGR.
+ * calls.c (initialize_argument_information, load_register_parameters):
+ Likewise.
+
+ 2019-09-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/91001
+ PR middle-end/91105
+ PR middle-end/91106
+ * calls.c (load_register_parameters): For TYPE_TRANSPARENT_AGGR
+ types, use type of their first field instead of type of
+ args[i].tree_value.
+
+ 2019-09-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/91623
+ * optabs.c (expand_vec_cond_expr): If op0 is a VECTOR_CST and only
+ EQ_EXPR/NE_EXPR is supported, verify that op0 only contains
+ zeros or negative elements and use NE_EXPR instead of LT_EXPR against
+ zero vector.
+
+2019-11-20 Peter Bergner <bergner@linux.ibm.com>
+
+ Backport from mainline
+ 2019-11-07 Peter Bergner <bergner@linux.ibm.com>
+
+ PR other/92090
+ * config/rs6000/predicates.md (input_operand): Allow MODE_PARTIAL_INT
+ modes for integer constants.
+
+2019-11-19 Eric Botcazou <ebotcazou@adacore.com>
+
+ * doc/invoke.texi (-gno-internal-reset-location-views): Fix typo.
+
+2019-11-14 Martin Liska <mliska@suse.cz>
+
+ Backport from mainline
+ 2019-11-14 Martin Liska <mliska@suse.cz>
+
+ PR target/92389
+ * config/i386/i386.h: Add PTA_AVX512VPOPCNTDQ to
+ PTA_ICELAKE_CLIENT which is later interited by
+ PTA_ICELAKE_SERVER and PTA_TIGERLAKE.
+
+2019-11-13 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
+
+ Backport from mainline
+ * config/mips/mips.md (rotr<mode>3): Sanitize the constant argument
+ instead of asserting its value.
+
+2019-11-11 H.J. Lu <hjl.tools@gmail.com>
+
+ Backport from trunk:
+ PR target/87833
+ * config/i386/intelmic-mkoffload.c (prepare_target_image): Put
+ -fPIC and -shared the last to create offload image.
+
+2019-11-11 Thomas Schwinge <thomas@codesourcery.com>
+
+ Backport from trunk:
+ * gimplify.c (gimplify_scan_omp_clauses): Assert 'offset2' instead
+ of 'offset'.
+
+ Backport from trunk:
+ * Makefile.in (LANG_CONFIGUREFRAGS): Define.
+ (config.status): Use/depend on it.
+ * configure.ac (all_lang_configurefrags): Track, 'AC_SUBST'.
+ * configure: Regenerate.
+
+2019-11-09 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2019-11-07 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.md (memory_barrier): Revise to use ldcw barriers.
+ Enhance comment.
+ (memory_barrier_coherent, memory_barrier_64, memory_barrier_32): New
+ insn patterns using ldcw instruction.
+ (memory_barrier): Remove insn pattern using sync instruction.
+ * config/pa/pa.opt (coherent-ldcw): New option.
+ (ordered): New option.
+
+2019-11-08 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR target/92095
+ * config/sparc/sparc-protos.h (output_load_pcrel_sym): Declare.
+ * config/sparc/sparc.c (sparc_cannot_force_const_mem): Revert latest
+ change.
+ (got_helper_needed): New static variable.
+ (output_load_pcrel_sym): New function.
+ (get_pc_thunk_name): Remove after inlining...
+ (load_got_register): ...here. Rework the initialization of the GOT
+ register and of the GOT helper.
+ (save_local_or_in_reg_p): Test the REGNO of the GOT register.
+ (sparc_file_end): Test got_helper_needed to decide whether the GOT
+ helper must be emitted. Use output_asm_insn instead of fprintf.
+ (sparc_init_pic_reg): In PIC mode, always initialize the PIC register
+ if optimization is enabled.
+ * config/sparc/sparc.md (load_pcrel_sym<P:mode>): Emit the assembly
+ by calling output_load_pcrel_sym.
+
+2019-11-06 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2018-09-19 John David Anglin <danglin@gcc.gnu.org>
+
+ PR rtl-optimization/85458
+ * config/pa/pa.c (pa_adjust_priority): Delete.
+ (TARGET_SCHED_ADJUST_PRIORITY): Delete define.
+
+2019-11-05 Segher Boessenkool <segher@kernel.crashing.org>
+
+ Backport from trunk
+ 2019-10-24 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/altivec.md (altivec_vavgu<VI_char>): Rename to...
+ (uavg<mode>3_ceil): ... This.
+ (altivec_vavgs<VI_char>): Rename to...
+ (avg<mode>3_ceil): ... This.
+ * config/rs6000/rs6000-builtin.def (VAVGUB, VAVGSB, VAVGUH, VAVGSH,
+ VAVGUW, VAVGSW): Adjust.
+
+2019-11-05 Segher Boessenkool <segher@kernel.crashing.org>
+
+ Backport from trunk
+ 2019-10-26 Segher Boessenkool <segher@kernel.crashing.org>
+
+ PR target/91289
+ * config/rs6000/rs6000.c (rs6000_emit_allocate_stack): Don't add an
+ immediate to r0; use r11 instead. Save and restore r11 to r0 around
+ this.
+
+2019-11-04 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2019-10-03 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.h (MAX_PCREL17F_OFFSET): Adjust.
+
+2019-11-04 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2019-10-03 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.c (pa_output_call): Remove 64-bit sibcall sequence.
+ (pa_attr_length_call): Adjust length for 64-bit plabel sequence.
+
+2019-11-04 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2019-10-12 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.c (pa_output_call): Load descriptor address to register
+ %r22. Load function address before global pointer.
+ (pa_attr_length_indirect_call): Adjust length of inline versions of
+ $$dyncall.
+ (pa_output_indirect_call): Remove fast inline version of $$dyncall
+ before normal cases. Update inline $$dyncall sequences to preserve
+ function descriptor address in register %r22.
+ (TRAMPOLINE_CODE_SIZE): Adjust.
+ (pa_asm_trampoline_template): Revise 32-bit trampoline. Don't assume
+ register %r22 contains trampoline address.
+ (pa_trampoline_init): Adjust offsets.
+ (pa_trampoline_adjust_address): Likewise.
+ * config/pa/pa.h (TRAMPOLINE_SIZE): Adjust 32-bit size.
+
+ 2019-10-17 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.c (pa_output_indirect_call): Fix typos in last change.
+
+2019-11-1 Delia Burduv <Delia.Burduv@arm.com>
+
+ Backport from trunk
+ 2019-02-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR target/86487
+ * lra-constraints.c(uses_hard_regs_p): Fix handling of
+ paradoxical SUBREGS.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-10-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_indirection_name): Rework the
+ function to emit linker-visible symbols only for indirections
+ in the data section. Clean up the code and update comments.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-10-09 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_override_options): Make the check for
+ Objective-C ABI version more specific for 64bit code.
+
+ Backport from mainline
+ 2019-10-06 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_override_options): Adjust objective-c
+ ABI version error messages to avoid punctuation and contracted
+ negations.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-07-03 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.h (REAL_LIBGCC_SPEC): Adjust for earlier Darwin.
+ (STARTFILE_SPEC): Split crt3 into a separate spec.
+ (DARWIN_EXTRA_SPECS): Add crt2 and crt3 spec.
+ (DARWIN_CRT2_SPEC): New.
+ (DARWIN_CRT3_SPEC): New.
+ (MIN_LD64_OMIT_STUBS): Revise to 62.1.
+ * config/rs6000/darwin.h (DARWIN_CRT2_SPEC): Revise conditions.
+ (DARWIN_CRT3_SPEC): New.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-06-27 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/rs6000/darwin.h (ENDFILE_SPEC): Correct whitespace in the
+ spec.
+
+ Backport from mainline
+ 2019-06-25 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/rs6000/darwin.h (ENDFILE_SPEC): New.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-06-18 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (darwin_emit_unwind_label): New default to false.
+ (darwin_override_options): Set darwin_emit_unwind_label as needed.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-08-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_indirect_call_target): Rename symbol stub
+ flag.
+ (darwin_override_options): Likewise.
+ * config/darwin.h: Likewise.
+ * config/darwin.opt: Likewise.
+ * config/i386/i386.c (output_pic_addr_const): Likewise.
+ * config/rs6000/darwin.h: Likewise.
+ * config/rs6000/rs6000.c (rs6000_call_darwin_1): Likewise.
+ * config/i386/darwin.h (TARGET_MACHO_PICSYM_STUBS): Rename to ...
+ ... this TARGET_MACHO_SYMBOL_STUBS.
+ (FUNCTION_PROFILER):Likewise.
+ * config/i386/i386.h: Likewise.
+
+ Backport from mainline
+ 2019-06-16 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_indirect_call_target): Use renamed
+ darwin_picsymbol_stubs to decide on output.
+ (darwin_override_options): Handle darwin_picsymbol_stubs.
+ * config/darwin.h (MIN_LD64_OMIT_STUBS): New.
+ (LD64_VERSION): Revise default.
+ * config/darwin.opt: (mpic-symbol-stubs): New option.
+ (darwin_picsymbol_stubs): New variable.
+ * config/i386/darwin.h (TARGET_MACHO_BRANCH_ISLANDS):
+ rename to TARGET_MACHO_PICSYM_STUBS.
+ * config/i386/i386.c (output_pic_addr_const): Likewise.
+ * config/i386/i386.h Likewise.
+ * config/rs6000/darwin.h: Likewise.
+ * config/rs6000/rs6000.c (rs6000_call_darwin_1): Use renamed
+ darwin_picsymbol_stubs.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-06-27 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/rs6000/rs6000.c (darwin_rs6000_override_options): Honour
+ user-specified float mode choice for kernel mode code.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-06-23 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/rs6000/darwin.h: Handle GCC target pragma.
+
+2019-10-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
+
+ Backport from mainline
+ 2019-07-09 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
+
+ * cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal
+ for both call instructions.
+
+2019-10-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-10-17 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR target/65342
+ * config/rs6000/darwin.md (movdi_low, movsi_low_st): Delete.
+ (movdi_low_st): Delete.
+ * config/rs6000/rs6000.c
+ (darwin_rs6000_legitimate_lo_sum_const_p): New.
+ (mem_operand_gpr): Validate Mach-O LO_SUM cases separately.
+ * config/rs6000/rs6000.md (movsi_low): Delete.
+
+2019-10-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-10-12 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR target/67183
+ * config/darwin.c (machopic_indirection): New field to flag
+ non-lazy-symbol-pointers in the data section.
+ (machopic_indirection_name): Compute if an indirection should
+ appear in the data section.
+ (machopic_output_data_section_indirection): New callback split
+ from machopic_output_indirection.
+ (machopic_output_stub_indirection): Likewise.
+ (machopic_output_indirection): Retain the code for non-lazy
+ symbol pointers in their regular section.
+ (machopic_finish): Use the new callbacks to order the indirection
+ output.
+
+2019-10-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-10-12 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin-protos.h (machopic_finish): Delete.
+ * config/darwin.c (machopic_finish): Make static.
+
+ Backport from mainline
+ 2019-10-09 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_indirect_data_reference): Set flag to
+ indicate that the new symbol is an indirection.
+ (machopic_indirect_call_target): Likewise.
+ * config/darwin.h (MACHO_SYMBOL_FLAG_INDIRECTION): New.
+ (MACHO_SYMBOL_INDIRECTION_P): New.
+ (MACHO_SYMBOL_FLAG_STATIC): Adjust bit number.
+
+ Backport from mainline
+ 2019-10-08 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_indirect_data_reference): Check for
+ required indirections before making direct access to defined
+ values.
+ (machopic_output_indirection): Place the indirected pointes for
+ required indirections into the non-lazy symbol pointers section.
+ (darwin_encode_section_info):
+ * config/darwin.h (MACHO_SYMBOL_FLAG_MUST_INDIRECT): New.
+ (MACHO_SYMBOL_MUST_INDIRECT_P): New.
+
+ Backport from mainline
+ 2019-10-07 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_output_indirection): Don't put
+ hidden symbol indirections into the .data section, use the
+ non-lazy symbol pointers section as normal.
+ (darwin_encode_section_info): Record if a symbol is hidden.
+ * config/darwin.h (MACHO_SYMBOL_FLAG_HIDDEN_VIS): New.
+ (MACHO_SYMBOL_HIDDEN_VIS_P): New.
+
+ Backport from mainline
+ 2019-10-07 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_symbol_defined_p): Use symbol flag
+ predicates instead of accessing bits directly.
+ (machopic_indirect_call_target): Likewise.
+ (machopic_output_indirection): Likewise.
+ (darwin_encode_section_info): Improve description. Use renamed
+ symbol flags. Use predicate macros for variables and functions.
+ * config/darwin.h:
+ Rename MACHO_SYMBOL_VARIABLE to MACHO_SYMBOL_FLAG_VARIABLE.
+ Rename MACHO_SYMBOL_DEFINED to MACHO_SYMBOL_FLAG_DEFINED.
+ Rename MACHO_SYMBOL_STATIC to MACHO_SYMBOL_FLAG_STATIC.
+ (MACHO_SYMBOL_VARIABLE_P): New.
+ (MACHO_SYMBOL_DEFINED_P):New.
+ (MACHO_SYMBOL_STATIC_P): New.
+ * config/i386/darwin.h (MACHO_SYMBOL_FLAG_VARIABLE): Delete.
+ (SYMBOL_FLAG_SUBT_DEP): New.
+ * config/rs6000/darwin.h (SYMBOL_FLAG_SUBT_DEP): New.
+
+2019-10-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-10-05 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR target/59888
+ * config/darwin.c (darwin_rodata_section): Add relocation flag,
+ choose const_data section for constants with relocations.
+ (machopic_select_section): Pass relocation flag to
+ darwin_rodata_section ().
+
+2019-10-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-09-21 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/darwin.c (machopic_legitimize_pic_address): Check
+ for lra, rather than reload.
+
+2019-10-28 Peter Bergner <bergner@linux.ibm.com>
+ Jiufu Guo <guojiufu@linux.ibm.com>
+
+ PR target/70010
+ * config/rs6000/rs6000.c (rs6000_can_inline_p): Prohibit inlining if
+ the callee explicitly disables some isa_flags the caller is using.
+
+2019-10-25 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config/rs6000/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN):Guard
+ against out of range max skip or log values.
+
+2019-10-25 Richard Earnshaw <rearnsha@arm.com>
+
+ Backport from mainline
+ 2019-05-08 Mihail Ionescu <mihail.ionescu@arm.com>
+ Richard Earnshaw <rearnsha@arm.com>
+ PR target/88167
+ * config/arm/arm.c (thumb1_prologue_unused_call_clobbered_lo_regs): New
+ function.
+ (thumb1_epilogue_unused_call_clobbered_lo_regs): New function.
+ (thumb1_compute_save_core_reg_mask): Don't force a spare work
+ register if both the epilogue and prologue can use call-clobbered
+ regs.
+ (thumb1_unexpanded_epilogue): Use
+ thumb1_epilogue_unused_call_clobbered_lo_regs. Reverse the logic for
+ picking temporaries for restoring high regs to match that of the
+ prologue where possible.
+ (thumb1_expand_prologue): Add any usable call-clobbered low registers to
+ the list of work registers. Detect if the return address is still live
+ at the end of the prologue and avoid using it for a work register if so.
+ If the return address is not live, add LR to the list of pushable regs
+ after the first pass.
+
2019-10-23 Peter Bergner <bergner@linux.ibm.com>
Backport from mainline
diff --git a/gcc/ChangeLog.ibm b/gcc/ChangeLog.ibm
index 6fa39489073..e1d86d70a0d 100644
--- a/gcc/ChangeLog.ibm
+++ b/gcc/ChangeLog.ibm
@@ -1,3 +1,8 @@
+2019-11-25 Peter Bergner <bergner@linux.ibm.com>
+
+ Merge up to 278620.
+ * REVISION: Update subversion id.
+
2019-08-13 Peter Bergner <bergner@linux.ibm.com>
* REVISION: Change format to "[ibm/gcc-X-branch revision rev#]"
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index c77090f7f81..276df234eb2 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20191023
+20191122
diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 20bee0494b1..ad07f056137 100644
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -1114,6 +1114,7 @@ endif
# Support for additional languages (other than C).
# C can be supported this way too (leave for later).
+LANG_CONFIGUREFRAGS = @all_lang_configurefrags@
LANG_MAKEFRAGS = @all_lang_makefrags@
# Used by gcc/jit/Make-lang.in
@@ -1877,7 +1878,7 @@ cstamp-h: config.in config.status
# Really, really stupid make features, such as SUN's KEEP_STATE, may force
# a target to build even if it is up-to-date. So we must verify that
# config.status does not exist before failing.
-config.status: $(srcdir)/configure $(srcdir)/config.gcc
+config.status: $(srcdir)/configure $(srcdir)/config.gcc $(LANG_CONFIGUREFRAGS)
@if [ ! -f config.status ] ; then \
echo You must configure gcc. Look at http://gcc.gnu.org/install/ for details.; \
false; \
diff --git a/gcc/REVISION b/gcc/REVISION
index 4f17490152a..c764fa1d820 100644
--- a/gcc/REVISION
+++ b/gcc/REVISION
@@ -1 +1 @@
-[ibm/gcc-8-branch revision 277354]
+[ibm/gcc-8-branch revision 278620]
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 5633ddef078..25a5213c8b7 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,13 @@
+2019-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2019-08-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/91401
+ * c-parser.c (c_parser_omp_clause_dist_schedule): Fix up typos in the
+ check_no_duplicate_clause call. Comment it out, instead emit a
+ warning for duplicate dist_schedule clauses.
+
2019-09-03 Iain Sandoe <iain@sandoe.co.uk>
Backport from mainline.
diff --git a/gcc/c/c-parser.c b/gcc/c/c-parser.c
index 097c4bf16da..75ef0a437a7 100644
--- a/gcc/c/c-parser.c
+++ b/gcc/c/c-parser.c
@@ -13849,7 +13849,10 @@ c_parser_omp_clause_dist_schedule (c_parser *parser, tree list)
c_parser_skip_until_found (parser, CPP_CLOSE_PAREN,
"expected %<,%> or %<)%>");
- check_no_duplicate_clause (list, OMP_CLAUSE_SCHEDULE, "schedule");
+ /* check_no_duplicate_clause (list, OMP_CLAUSE_DIST_SCHEDULE,
+ "dist_schedule"); */
+ if (omp_find_clause (list, OMP_CLAUSE_DIST_SCHEDULE))
+ warning_at (loc, 0, "too many %qs clauses", "dist_schedule");
if (t == error_mark_node)
return list;
diff --git a/gcc/calls.c b/gcc/calls.c
index ed612b3f562..7eac750f34b 100644
--- a/gcc/calls.c
+++ b/gcc/calls.c
@@ -2078,8 +2078,7 @@ initialize_argument_information (int num_actuals ATTRIBUTE_UNUSED,
/* If TYPE is a transparent union or record, pass things the way
we would pass the first field of the union or record. We have
already verified that the modes are the same. */
- if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE)
- && TYPE_TRANSPARENT_AGGR (type))
+ if (RECORD_OR_UNION_TYPE_P (type) && TYPE_TRANSPARENT_AGGR (type))
type = TREE_TYPE (first_field (type));
/* Decide where to pass this arg.
@@ -2873,6 +2872,9 @@ load_register_parameters (struct arg_data *args, int num_actuals,
poly_int64 size = 0;
HOST_WIDE_INT const_size = 0;
rtx_insn *before_arg = get_last_insn ();
+ tree type = TREE_TYPE (args[i].tree_value);
+ if (RECORD_OR_UNION_TYPE_P (type) && TYPE_TRANSPARENT_AGGR (type))
+ type = TREE_TYPE (first_field (type));
/* Set non-negative if we must move a word at a time, even if
just one word (e.g, partial == 4 && mode == DFmode). Set
to -1 if we just use a normal move insn. This value can be
@@ -2885,11 +2887,11 @@ load_register_parameters (struct arg_data *args, int num_actuals,
gcc_assert (partial % UNITS_PER_WORD == 0);
nregs = partial / UNITS_PER_WORD;
}
- else if (TYPE_MODE (TREE_TYPE (args[i].tree_value)) == BLKmode)
+ else if (TYPE_MODE (type) == BLKmode)
{
/* Variable-sized parameters should be described by a
PARALLEL instead. */
- const_size = int_size_in_bytes (TREE_TYPE (args[i].tree_value));
+ const_size = int_size_in_bytes (type);
gcc_assert (const_size >= 0);
nregs = (const_size + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
size = const_size;
@@ -3016,8 +3018,7 @@ load_register_parameters (struct arg_data *args, int num_actuals,
if (GET_CODE (reg) == PARALLEL)
use_group_regs (call_fusage, reg);
else if (nregs == -1)
- use_reg_mode (call_fusage, reg,
- TYPE_MODE (TREE_TYPE (args[i].tree_value)));
+ use_reg_mode (call_fusage, reg, TYPE_MODE (type));
else if (nregs > 0)
use_regs (call_fusage, REGNO (reg), nregs);
}
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index 4d7d21b6822..ac1263b7d1a 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -53,6 +53,7 @@ along with GCC; see the file COPYING3. If not see
#include "dce.h"
#include "dbgcnt.h"
#include "rtl-iter.h"
+#include "regs.h"
#define FORWARDER_BLOCK_P(BB) ((BB)->flags & BB_FORWARDER_BLOCK)
@@ -1217,6 +1218,14 @@ old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx_insn *i1, rtx_insn *i2)
}
}
}
+
+ HARD_REG_SET i1_used, i2_used;
+
+ get_call_reg_set_usage (i1, &i1_used, call_used_reg_set);
+ get_call_reg_set_usage (i2, &i2_used, call_used_reg_set);
+
+ if (!hard_reg_set_equal_p (i1_used, i2_used))
+ return dir_none;
}
/* If both i1 and i2 are frame related, verify all the CFA notes
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 9dbfd2e39da..b7e734e897d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -19516,6 +19516,35 @@ arm_compute_save_core_reg_mask (void)
return save_reg_mask;
}
+/* Return a mask for the call-clobbered low registers that are unused
+ at the end of the prologue. */
+static unsigned long
+thumb1_prologue_unused_call_clobbered_lo_regs (void)
+{
+ unsigned long mask = 0;
+
+ for (int reg = 0; reg <= LAST_LO_REGNUM; reg++)
+ if (!callee_saved_reg_p (reg)
+ && !REGNO_REG_SET_P (df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
+ reg))
+ mask |= 1 << reg;
+ return mask;
+}
+
+/* Similarly for the start of the epilogue. */
+static unsigned long
+thumb1_epilogue_unused_call_clobbered_lo_regs (void)
+{
+ unsigned long mask = 0;
+
+ for (int reg = 0; reg <= LAST_LO_REGNUM; reg++)
+ if (!callee_saved_reg_p (reg)
+ && !REGNO_REG_SET_P (df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun)),
+ reg))
+ mask |= 1 << reg;
+ return mask;
+}
+
/* Compute a bit mask of which core registers need to be
saved on the stack for the current function. */
static unsigned long
@@ -19547,10 +19576,19 @@ thumb1_compute_save_core_reg_mask (void)
if (mask & 0xff || thumb_force_lr_save ())
mask |= (1 << LR_REGNUM);
- /* Make sure we have a low work register if we need one.
- We will need one if we are going to push a high register,
- but we are not currently intending to push a low register. */
+ bool call_clobbered_scratch
+ = (thumb1_prologue_unused_call_clobbered_lo_regs ()
+ && thumb1_epilogue_unused_call_clobbered_lo_regs ());
+
+ /* Make sure we have a low work register if we need one. We will
+ need one if we are going to push a high register, but we are not
+ currently intending to push a low register. However if both the
+ prologue and epilogue have a spare call-clobbered low register,
+ then we won't need to find an additional work register. It does
+ not need to be the same register in the prologue and
+ epilogue. */
if ((mask & 0xff) == 0
+ && !call_clobbered_scratch
&& ((mask & 0x0f00) || TARGET_BACKTRACE))
{
/* Use thumb_find_work_register to choose which register
@@ -24776,12 +24814,7 @@ thumb1_unexpanded_epilogue (void)
unsigned long mask = live_regs_mask & 0xff;
int next_hi_reg;
- /* The available low registers depend on the size of the value we are
- returning. */
- if (size <= 12)
- mask |= 1 << 3;
- if (size <= 8)
- mask |= 1 << 2;
+ mask |= thumb1_epilogue_unused_call_clobbered_lo_regs ();
if (mask == 0)
/* Oh dear! We have no low registers into which we can pop
@@ -24789,7 +24822,7 @@ thumb1_unexpanded_epilogue (void)
internal_error
("no low registers available for popping high registers");
- for (next_hi_reg = 8; next_hi_reg < 13; next_hi_reg++)
+ for (next_hi_reg = 12; next_hi_reg > LAST_LO_REGNUM; next_hi_reg--)
if (live_regs_mask & (1 << next_hi_reg))
break;
@@ -24797,7 +24830,7 @@ thumb1_unexpanded_epilogue (void)
{
/* Find lo register(s) into which the high register(s) can
be popped. */
- for (regno = 0; regno <= LAST_LO_REGNUM; regno++)
+ for (regno = LAST_LO_REGNUM; regno >= 0; regno--)
{
if (mask & (1 << regno))
high_regs_pushed--;
@@ -24805,20 +24838,22 @@ thumb1_unexpanded_epilogue (void)
break;
}
- mask &= (2 << regno) - 1; /* A noop if regno == 8 */
+ if (high_regs_pushed == 0 && regno >= 0)
+ mask &= ~((1 << regno) - 1);
/* Pop the values into the low register(s). */
thumb_pop (asm_out_file, mask);
/* Move the value(s) into the high registers. */
- for (regno = 0; regno <= LAST_LO_REGNUM; regno++)
+ for (regno = LAST_LO_REGNUM; regno >= 0; regno--)
{
if (mask & (1 << regno))
{
asm_fprintf (asm_out_file, "\tmov\t%r, %r\n", next_hi_reg,
regno);
- for (next_hi_reg++; next_hi_reg < 13; next_hi_reg++)
+ for (next_hi_reg--; next_hi_reg > LAST_LO_REGNUM;
+ next_hi_reg--)
if (live_regs_mask & (1 << next_hi_reg))
break;
}
@@ -25200,10 +25235,20 @@ thumb1_expand_prologue (void)
break;
/* Here we need to mask out registers used for passing arguments
- even if they can be pushed. This is to avoid using them to stash the high
- registers. Such kind of stash may clobber the use of arguments. */
+ even if they can be pushed. This is to avoid using them to
+ stash the high registers. Such kind of stash may clobber the
+ use of arguments. */
pushable_regs = l_mask & (~arg_regs_mask);
- if (lr_needs_saving)
+ pushable_regs |= thumb1_prologue_unused_call_clobbered_lo_regs ();
+
+ /* Normally, LR can be used as a scratch register once it has been
+ saved; but if the function examines its own return address then
+ the value is still live and we need to avoid using it. */
+ bool return_addr_live
+ = REGNO_REG_SET_P (df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
+ LR_REGNUM);
+
+ if (lr_needs_saving || return_addr_live)
pushable_regs &= ~(1 << LR_REGNUM);
if (pushable_regs == 0)
@@ -25244,6 +25289,11 @@ thumb1_expand_prologue (void)
push_mask |= 1 << LR_REGNUM;
real_regs_mask |= 1 << LR_REGNUM;
lr_needs_saving = false;
+ /* If the return address is not live at this point, we
+ can add LR to the list of registers that we can use
+ for pushes. */
+ if (!return_addr_live)
+ pushable_regs |= 1 << LR_REGNUM;
}
insn = thumb1_emit_multi_reg_push (push_mask, real_regs_mask);
diff --git a/gcc/config/darwin-protos.h b/gcc/config/darwin-protos.h
index 56486919831..2dea40b65c8 100644
--- a/gcc/config/darwin-protos.h
+++ b/gcc/config/darwin-protos.h
@@ -53,8 +53,6 @@ extern void darwin_set_default_type_attributes (tree);
#endif /* TREE_CODE */
-extern void machopic_finish (FILE *);
-
extern int machopic_reloc_rw_mask (void);
extern section *machopic_select_section (tree, int, unsigned HOST_WIDE_INT);
diff --git a/gcc/config/darwin.c b/gcc/config/darwin.c
index de5226523a1..2493a586cb0 100644
--- a/gcc/config/darwin.c
+++ b/gcc/config/darwin.c
@@ -74,15 +74,9 @@ along with GCC; see the file COPYING3. If not see
setting the second word in the .non_lazy_symbol_pointer data
structure to symbol. See indirect_data for the code that handles
the extra indirection, and machopic_output_indirection and its use
- of MACHO_SYMBOL_STATIC for the code that handles @code{static}
+ of MACHO_SYMBOL_FLAG_STATIC for the code that handles @code{static}
symbol indirection. */
-/* For darwin >= 9 (OSX 10.5) the linker is capable of making the necessary
- branch islands and we no longer need to emit darwin stubs.
- However, if we are generating code for earlier systems (or for use in the
- kernel) the stubs might still be required, and this will be set true. */
-int darwin_emit_branch_islands = false;
-
typedef struct GTY(()) cdtor_record {
rtx symbol;
int priority; /* [con/de]structor priority */
@@ -104,6 +98,10 @@ int generating_for_darwin_version ;
for weak or single-definition items. */
static bool ld_uses_coal_sects = false;
+/* Very old (ld_classic) linkers need a symbol to mark the start of
+ each FDE. */
+static bool ld_needs_eh_markers = false;
+
/* Section names. */
section * darwin_sections[NUM_DARWIN_SECTIONS];
@@ -249,7 +247,7 @@ name_needs_quotes (const char *name)
int
machopic_symbol_defined_p (rtx sym_ref)
{
- if (SYMBOL_REF_FLAGS (sym_ref) & MACHO_SYMBOL_FLAG_DEFINED)
+ if (MACHO_SYMBOL_DEFINED_P (sym_ref))
return true;
/* If a symbol references local and is not an extern to this
@@ -258,7 +256,7 @@ machopic_symbol_defined_p (rtx sym_ref)
{
/* If the symbol references a variable and the variable is a
common symbol, then this symbol is not defined. */
- if (SYMBOL_REF_FLAGS (sym_ref) & MACHO_SYMBOL_FLAG_VARIABLE)
+ if (MACHO_SYMBOL_VARIABLE_P (sym_ref))
{
tree decl = SYMBOL_REF_DECL (sym_ref);
if (!decl)
@@ -454,6 +452,13 @@ typedef struct GTY ((for_user)) machopic_indirection
bool stub_p;
/* True iff this stub or pointer has been referenced. */
bool used;
+ /* True iff a non-lazy symbol pointer should be emitted into the .data
+ section, rather than the non-lazy symbol pointers section. The cases
+ for which this occurred seem to have been unintentional, and later
+ toolchains emit all of the indirections to the 'usual' section. We
+ are keeping this in case it is necessary to preserve compatibility with
+ older toolchains. */
+ bool nlsp_in_data_section;
} machopic_indirection;
struct indirection_hasher : ggc_ptr_hash<machopic_indirection>
@@ -488,7 +493,7 @@ indirection_hasher::equal (machopic_indirection *s, const char *k)
/* Return the name of the non-lazy pointer (if STUB_P is false) or
stub (if STUB_B is true) corresponding to the given name.
- If we have a situation like:
+ PR71767 - If we have a situation like:
global_weak_symbol:
....
@@ -497,36 +502,22 @@ Lnon_weak_local:
ld64 will be unable to split this into two atoms (because the "L" makes
the second symbol 'invisible'). This means that legitimate direct accesses
- to the second symbol will appear to be non-allowed direct accesses to an
- atom of type weak, global which are not allowed.
-
- To avoid this, we make the indirections have a leading 'l' (lower-case L)
- which has a special meaning: linker can see this and use it to determine
- atoms, but it is not placed into the final symbol table.
+ to the second symbol will appear to be direct accesses to an atom of type
+ weak, global which are not allowed.
- The implementation here is somewhat heavy-handed in that it will also mark
- indirections to the __IMPORT,__pointers section the same way which is
- really unnecessary, since ld64 _can_ split those into atoms as they are
- fixed size. FIXME: determine if this is a penalty worth extra code to
- fix.
+ To avoid this, we make any data-section indirections have a leading 'l'
+ (lower-case L) which has a special meaning: linker can see this and use
+ it to determine atoms, but it is not placed into the final symbol table.
+ Symbols in the non-lazy symbol pointers section (or stubs) do not have this
+ problem because ld64 already knows the size of each entry.
*/
const char *
machopic_indirection_name (rtx sym_ref, bool stub_p)
{
- char *buffer;
const char *name = XSTR (sym_ref, 0);
- size_t namelen = strlen (name);
- machopic_indirection *p;
- bool needs_quotes;
- const char *suffix;
- char L_or_l = 'L';
- const char *prefix = user_label_prefix;
- const char *quote = "";
- tree id;
-
- id = maybe_get_identifier (name);
+ tree id = maybe_get_identifier (name);
if (id)
{
tree id_orig = id;
@@ -534,43 +525,47 @@ machopic_indirection_name (rtx sym_ref, bool stub_p)
while (IDENTIFIER_TRANSPARENT_ALIAS (id))
id = TREE_CHAIN (id);
if (id != id_orig)
- {
- name = IDENTIFIER_POINTER (id);
- namelen = strlen (name);
- }
+ name = IDENTIFIER_POINTER (id);
}
+ const char *prefix = user_label_prefix;
+ /* If we are emitting the label 'verbatim' then omit the U_L_P and count
+ the name without the leading '*'. */
if (name[0] == '*')
{
prefix = "";
++name;
- --namelen;
- }
-
- needs_quotes = name_needs_quotes (name);
- if (needs_quotes)
- {
- quote = "\"";
}
- if (stub_p)
- suffix = STUB_SUFFIX;
- else
- {
- suffix = NON_LAZY_POINTER_SUFFIX;
- /* Let the linker see this. */
- L_or_l = 'l';
- }
-
- buffer = XALLOCAVEC (char, 2 /* strlen ("&L") or ("&l") */
- + strlen (prefix)
- + namelen
- + strlen (suffix)
- + 2 * strlen (quote)
- + 1 /* '\0' */);
+ /* Here we are undoing a number of causes that placed some indirections
+ (apparently erroneously) into the .data section. Specifically, some
+ symbols that are ABI mandated indirections and some hidden symbols
+ were being placed there - which cause difficulties with later
+ versions of ld64. Iff (after these checks) some symbol still gets an
+ indirection in the data section, we want to adjust the indirection
+ name to be linker visible to deal with PR71767 (notes above). */
+ bool nlsp_in_data_section =
+ ! MACHO_SYMBOL_MUST_INDIRECT_P (sym_ref)
+ && ! MACHO_SYMBOL_HIDDEN_VIS_P (sym_ref)
+ && (machopic_symbol_defined_p (sym_ref) || SYMBOL_REF_LOCAL_P (sym_ref))
+ && ! indirect_data (sym_ref);
+
+ const char *suffix = stub_p ? STUB_SUFFIX : NON_LAZY_POINTER_SUFFIX;
+ /* If the indirection is in the data section, let the linker see it. */
+ char L_or_l = (!stub_p && nlsp_in_data_section) ? 'l' : 'L';
+ /* We have mangled symbols with spaces and punctuation which typically
+ need surrounding in quotes for the assembler to consume them. */
+ const char *quote = name_needs_quotes (name) ? "\"" : "";
+ char *buffer = XALLOCAVEC (char, 2 /* strlen ("&L") or ("&l") */
+ + strlen (prefix)
+ + strlen (name)
+ + strlen (suffix)
+ + 2 * strlen (quote)
+ + 1 /* '\0' */);
/* Construct the name of the non-lazy pointer or stub. */
- sprintf (buffer, "&%s%c%s%s%s%s", quote, L_or_l, prefix, name, suffix, quote);
+ sprintf (buffer, "&%s%c%s%s%s%s", quote, L_or_l, prefix, name,
+ suffix, quote);
if (!machopic_indirections)
machopic_indirections = hash_table<indirection_hasher>::create_ggc (37);
@@ -579,10 +574,9 @@ machopic_indirection_name (rtx sym_ref, bool stub_p)
= machopic_indirections->find_slot_with_hash (buffer,
htab_hash_string (buffer),
INSERT);
+ machopic_indirection *p;
if (*slot)
- {
- p = *slot;
- }
+ p = *slot;
else
{
p = ggc_alloc<machopic_indirection> ();
@@ -590,6 +584,7 @@ machopic_indirection_name (rtx sym_ref, bool stub_p)
p->ptr_name = xstrdup (buffer);
p->stub_p = stub_p;
p->used = false;
+ p->nlsp_in_data_section = nlsp_in_data_section;
*slot = p;
}
@@ -665,7 +660,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
/* some other cpu -- writeme! */
gcc_unreachable ();
}
- else if (defined)
+ else if (defined && ! MACHO_SYMBOL_MUST_INDIRECT_P (orig))
{
rtx offset = NULL;
if (DARWIN_PPC || HAVE_lo_sum)
@@ -707,6 +702,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
machopic_indirection_name (orig, /*stub_p=*/false)));
SYMBOL_REF_DATA (ptr_ref) = SYMBOL_REF_DATA (orig);
+ SYMBOL_REF_FLAGS (ptr_ref) |= MACHO_SYMBOL_FLAG_INDIRECTION;
ptr_ref = gen_const_mem (Pmode, ptr_ref);
machopic_define_symbol (ptr_ref);
@@ -789,7 +785,7 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
rtx
machopic_indirect_call_target (rtx target)
{
- if (! darwin_emit_branch_islands)
+ if (! darwin_symbol_stubs)
return target;
if (GET_CODE (target) != MEM)
@@ -797,8 +793,7 @@ machopic_indirect_call_target (rtx target)
if (MACHOPIC_INDIRECT
&& GET_CODE (XEXP (target, 0)) == SYMBOL_REF
- && !(SYMBOL_REF_FLAGS (XEXP (target, 0))
- & MACHO_SYMBOL_FLAG_DEFINED))
+ && ! MACHO_SYMBOL_DEFINED_P (XEXP (target, 0)))
{
rtx sym_ref = XEXP (target, 0);
const char *stub_name = machopic_indirection_name (sym_ref,
@@ -807,6 +802,7 @@ machopic_indirect_call_target (rtx target)
XEXP (target, 0) = gen_rtx_SYMBOL_REF (mode, stub_name);
SYMBOL_REF_DATA (XEXP (target, 0)) = SYMBOL_REF_DATA (sym_ref);
+ SYMBOL_REF_FLAGS (XEXP (target, 0)) |= MACHO_SYMBOL_FLAG_INDIRECTION;
MEM_READONLY_P (target) = 1;
MEM_NOTRAP_P (target) = 1;
}
@@ -844,7 +840,7 @@ machopic_legitimize_pic_address (rtx orig, machine_mode mode, rtx reg)
{
if (reg == 0)
{
- gcc_assert (!reload_in_progress);
+ gcc_assert (!lra_in_progress);
reg = gen_reg_rtx (Pmode);
}
@@ -928,7 +924,7 @@ machopic_legitimize_pic_address (rtx orig, machine_mode mode, rtx reg)
emit_use (gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
#endif
- if (reload_in_progress)
+ if (lra_in_progress)
df_set_regs_ever_live (REGNO (pic), true);
pic_ref = gen_rtx_PLUS (Pmode, pic,
machopic_gen_offset (XEXP (orig, 0)));
@@ -952,7 +948,7 @@ machopic_legitimize_pic_address (rtx orig, machine_mode mode, rtx reg)
if (reg == 0)
{
- gcc_assert (!reload_in_progress);
+ gcc_assert (!lra_in_progress);
reg = gen_reg_rtx (Pmode);
}
@@ -998,7 +994,7 @@ machopic_legitimize_pic_address (rtx orig, machine_mode mode, rtx reg)
#if 0
emit_use (pic_offset_table_rtx);
#endif
- if (reload_in_progress)
+ if (lra_in_progress)
df_set_regs_ever_live (REGNO (pic), true);
pic_ref = gen_rtx_PLUS (Pmode,
pic,
@@ -1075,129 +1071,160 @@ machopic_legitimize_pic_address (rtx orig, machine_mode mode, rtx reg)
return pic_ref;
}
-/* Output the stub or non-lazy pointer in *SLOT, if it has been used.
- DATA is the FILE* for assembly output. Called from
- htab_traverse. */
+/* Callbacks to output the stub or non-lazy pointers.
+ Each works on the item in *SLOT,if it has been used.
+ DATA is the FILE* for assembly output.
+ Called from htab_traverses, invoked from machopic_finish(). */
int
-machopic_output_indirection (machopic_indirection **slot, FILE *asm_out_file)
+machopic_output_data_section_indirection (machopic_indirection **slot,
+ FILE *asm_out_file)
{
machopic_indirection *p = *slot;
- rtx symbol;
- const char *sym_name;
- const char *ptr_name;
- if (!p->used)
+ if (!p->used || !p->nlsp_in_data_section)
return 1;
- symbol = p->symbol;
- sym_name = XSTR (symbol, 0);
- ptr_name = p->ptr_name;
+ rtx symbol = p->symbol;
+ /* The original symbol name. */
+ const char *sym_name = XSTR (symbol, 0);
+ /* The name of the indirection symbol. */
+ const char *ptr_name = p->ptr_name;
- if (p->stub_p)
- {
- char *sym;
- char *stub;
- tree id;
+ switch_to_section (data_section);
+ assemble_align (GET_MODE_ALIGNMENT (Pmode));
+ assemble_label (asm_out_file, ptr_name);
+ assemble_integer (gen_rtx_SYMBOL_REF (Pmode, sym_name),
+ GET_MODE_SIZE (Pmode),
+ GET_MODE_ALIGNMENT (Pmode), 1);
- id = maybe_get_identifier (sym_name);
- if (id)
- {
- tree id_orig = id;
+ return 1;
+}
- while (IDENTIFIER_TRANSPARENT_ALIAS (id))
- id = TREE_CHAIN (id);
- if (id != id_orig)
- sym_name = IDENTIFIER_POINTER (id);
- }
+int
+machopic_output_stub_indirection (machopic_indirection **slot,
+ FILE *asm_out_file)
+{
+ machopic_indirection *p = *slot;
- sym = XALLOCAVEC (char, strlen (sym_name) + 2);
- if (sym_name[0] == '*' || sym_name[0] == '&')
- strcpy (sym, sym_name + 1);
- else if (sym_name[0] == '-' || sym_name[0] == '+')
- strcpy (sym, sym_name);
- else
- sprintf (sym, "%s%s", user_label_prefix, sym_name);
+ if (!p->used || !p->stub_p)
+ return 1;
- stub = XALLOCAVEC (char, strlen (ptr_name) + 2);
- if (ptr_name[0] == '*' || ptr_name[0] == '&')
- strcpy (stub, ptr_name + 1);
- else
- sprintf (stub, "%s%s", user_label_prefix, ptr_name);
+ rtx symbol = p->symbol;
+ /* The original symbol name. */
+ const char *sym_name = XSTR (symbol, 0);
+ /* The name of the stub symbol. */
+ const char *ptr_name = p->ptr_name;
- machopic_output_stub (asm_out_file, sym, stub);
- }
- else if (! indirect_data (symbol)
- && (machopic_symbol_defined_p (symbol)
- || SYMBOL_REF_LOCAL_P (symbol)))
+ tree id = maybe_get_identifier (sym_name);
+ if (id)
{
- switch_to_section (data_section);
- assemble_align (GET_MODE_ALIGNMENT (Pmode));
- assemble_label (asm_out_file, ptr_name);
- assemble_integer (gen_rtx_SYMBOL_REF (Pmode, sym_name),
- GET_MODE_SIZE (Pmode),
- GET_MODE_ALIGNMENT (Pmode), 1);
+ tree id_orig = id;
+
+ while (IDENTIFIER_TRANSPARENT_ALIAS (id))
+ id = TREE_CHAIN (id);
+ if (id != id_orig)
+ sym_name = IDENTIFIER_POINTER (id);
}
+
+ char *sym = XALLOCAVEC (char, strlen (sym_name) + 2);
+ if (sym_name[0] == '*' || sym_name[0] == '&')
+ strcpy (sym, sym_name + 1);
+ else if (sym_name[0] == '-' || sym_name[0] == '+')
+ strcpy (sym, sym_name);
else
- {
- rtx init = const0_rtx;
+ sprintf (sym, "%s%s", user_label_prefix, sym_name);
+
+ char *stub = XALLOCAVEC (char, strlen (ptr_name) + 2);
+ if (ptr_name[0] == '*' || ptr_name[0] == '&')
+ strcpy (stub, ptr_name + 1);
+ else
+ sprintf (stub, "%s%s", user_label_prefix, ptr_name);
- switch_to_section (darwin_sections[machopic_nl_symbol_ptr_section]);
+ machopic_output_stub (asm_out_file, sym, stub);
- /* Mach-O symbols are passed around in code through indirect
- references and the original symbol_ref hasn't passed through
- the generic handling and reference-catching in
- output_operand, so we need to manually mark weak references
- as such. */
- if (SYMBOL_REF_WEAK (symbol))
+ return 1;
+}
+
+int
+machopic_output_indirection (machopic_indirection **slot, FILE *asm_out_file)
+{
+ machopic_indirection *p = *slot;
+
+ if (!p->used || p->stub_p || p->nlsp_in_data_section)
+ return 1;
+
+ rtx symbol = p->symbol;
+ /* The original symbol name. */
+ const char *sym_name = XSTR (symbol, 0);
+ /* The nonlazy-stub symbol name. */
+ const char *ptr_name = p->ptr_name;
+
+ switch_to_section (darwin_sections[machopic_nl_symbol_ptr_section]);
+
+ /* Mach-O symbols are passed around in code through indirect references and
+ the original symbol_ref hasn't passed through the generic handling and
+ reference-catching in output_operand, so we need to manually mark weak
+ references as such. */
+
+ if (SYMBOL_REF_WEAK (symbol))
+ {
+ tree decl = SYMBOL_REF_DECL (symbol);
+ gcc_checking_assert (DECL_P (decl));
+
+ if (decl != NULL_TREE
+ && DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)
+ /* Handle only actual external-only definitions, not
+ e.g. extern inline code or variables for which
+ storage has been allocated. */
+ && !TREE_STATIC (decl))
{
- tree decl = SYMBOL_REF_DECL (symbol);
- gcc_assert (DECL_P (decl));
-
- if (decl != NULL_TREE
- && DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)
- /* Handle only actual external-only definitions, not
- e.g. extern inline code or variables for which
- storage has been allocated. */
- && !TREE_STATIC (decl))
- {
- fputs ("\t.weak_reference ", asm_out_file);
- assemble_name (asm_out_file, sym_name);
- fputc ('\n', asm_out_file);
- }
+ fputs ("\t.weak_reference ", asm_out_file);
+ assemble_name (asm_out_file, sym_name);
+ fputc ('\n', asm_out_file);
}
+ }
- assemble_name (asm_out_file, ptr_name);
- fprintf (asm_out_file, ":\n");
+ assemble_name (asm_out_file, ptr_name);
+ fprintf (asm_out_file, ":\n");
- fprintf (asm_out_file, "\t.indirect_symbol ");
- assemble_name (asm_out_file, sym_name);
- fprintf (asm_out_file, "\n");
+ fprintf (asm_out_file, "\t.indirect_symbol ");
+ assemble_name (asm_out_file, sym_name);
+ fprintf (asm_out_file, "\n");
- /* Variables that are marked with MACHO_SYMBOL_STATIC need to
- have their symbol name instead of 0 in the second entry of
- the non-lazy symbol pointer data structure when they are
- defined. This allows the runtime to rebind newer instances
- of the translation unit with the original instance of the
- symbol. */
+ /* Variables that are marked with MACHO_SYMBOL_FLAG_STATIC need to
+ have their symbol name instead of 0 in the second entry of
+ the non-lazy symbol pointer data structure when they are
+ defined. This allows the runtime to rebind newer instances
+ of the translation unit with the original instance of the
+ symbol. */
- if ((SYMBOL_REF_FLAGS (symbol) & MACHO_SYMBOL_STATIC)
- && machopic_symbol_defined_p (symbol))
- init = gen_rtx_SYMBOL_REF (Pmode, sym_name);
+ rtx init = const0_rtx;
+ if (MACHO_SYMBOL_STATIC_P (symbol) && machopic_symbol_defined_p (symbol))
+ init = gen_rtx_SYMBOL_REF (Pmode, sym_name);
- assemble_integer (init, GET_MODE_SIZE (Pmode),
- GET_MODE_ALIGNMENT (Pmode), 1);
- }
+ assemble_integer (init, GET_MODE_SIZE (Pmode),
+ GET_MODE_ALIGNMENT (Pmode), 1);
return 1;
}
-void
+static void
machopic_finish (FILE *asm_out_file)
{
- if (machopic_indirections)
- machopic_indirections
- ->traverse_noresize<FILE *, machopic_output_indirection> (asm_out_file);
+ if (!machopic_indirections)
+ return;
+
+ /* First output an symbol indirections that have been placed into .data
+ (we don't expect these now). */
+ machopic_indirections->traverse_noresize
+ <FILE *, machopic_output_data_section_indirection> (asm_out_file);
+
+ machopic_indirections->traverse_noresize
+ <FILE *, machopic_output_stub_indirection> (asm_out_file);
+
+ machopic_indirections->traverse_noresize
+ <FILE *, machopic_output_indirection> (asm_out_file);
}
int
@@ -1212,25 +1239,51 @@ machopic_operand_p (rtx op)
&& XINT (XEXP (op, 0), 1) == UNSPEC_MACHOPIC_OFFSET);
}
-/* This function records whether a given name corresponds to a defined
- or undefined function or variable, for machopic_classify_ident to
- use later. */
+/* This function:
+ computes and caches a series of flags that characterise the symbol's
+ properties that affect Mach-O code gen (including accidental cases
+ from older toolchains).
+
+ TODO:
+ Here we also need to do enough analysis to determine if a symbol's
+ name needs to be made linker-visible. This is more tricky - since
+ it depends on whether we've previously seen a global weak definition
+ in the same section.
+ */
void
-darwin_encode_section_info (tree decl, rtx rtl, int first ATTRIBUTE_UNUSED)
+darwin_encode_section_info (tree decl, rtx rtl, int first)
{
- rtx sym_ref;
+ /* Careful not to prod global register variables. */
+ if (!MEM_P (rtl))
+ return;
- /* Do the standard encoding things first. */
+ /* Do the standard encoding things first; this sets:
+ SYMBOL_FLAG_FUNCTION,
+ SYMBOL_FLAG_LOCAL, (binds_local_p)
+ TLS_MODEL, SYMBOL_FLAG_SMALL
+ SYMBOL_FLAG_EXTERNAL. */
default_encode_section_info (decl, rtl, first);
- if (TREE_CODE (decl) != FUNCTION_DECL && TREE_CODE (decl) != VAR_DECL)
+ if (! VAR_OR_FUNCTION_DECL_P (decl))
return;
- sym_ref = XEXP (rtl, 0);
- if (TREE_CODE (decl) == VAR_DECL)
+ rtx sym_ref = XEXP (rtl, 0);
+ if (VAR_P (decl))
SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_VARIABLE;
+ /* Only really common if there's no initialiser. */
+ bool really_common_p = (DECL_COMMON (decl)
+ && (DECL_INITIAL (decl) == NULL
+ || (!in_lto_p
+ && DECL_INITIAL (decl) == error_mark_node)));
+
+ /* For Darwin, if we have specified visibility and it's not the default
+ that's counted 'hidden'. */
+ if (DECL_VISIBILITY_SPECIFIED (decl)
+ && DECL_VISIBILITY (decl) != VISIBILITY_DEFAULT)
+ SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_HIDDEN_VIS;
+
if (!DECL_EXTERNAL (decl)
&& (!TREE_PUBLIC (decl) || !DECL_WEAK (decl))
&& ! lookup_attribute ("weakref", DECL_ATTRIBUTES (decl))
@@ -1241,7 +1294,13 @@ darwin_encode_section_info (tree decl, rtx rtl, int first ATTRIBUTE_UNUSED)
SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_DEFINED;
if (! TREE_PUBLIC (decl))
- SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_STATIC;
+ SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_STATIC;
+
+ /* Short cut check for Darwin 'must indirect' rules. */
+ if (really_common_p
+ || (DECL_WEAK (decl) && ! MACHO_SYMBOL_HIDDEN_VIS_P (sym_ref))
+ || lookup_attribute ("weakref", DECL_ATTRIBUTES (decl)))
+ SYMBOL_REF_FLAGS (sym_ref) |= MACHO_SYMBOL_FLAG_MUST_INDIRECT;
}
void
@@ -1258,12 +1317,13 @@ darwin_mark_decl_preserved (const char *name)
}
static section *
-darwin_rodata_section (int use_coal, bool zsize)
+darwin_rodata_section (int use_coal, bool zsize, int reloc)
{
return (use_coal
? darwin_sections[const_coal_section]
: (zsize ? darwin_sections[zobj_const_section]
- : darwin_sections[const_section]));
+ : reloc ? darwin_sections[const_data_section]
+ : darwin_sections[const_section]));
}
static section *
@@ -1556,7 +1616,7 @@ machopic_select_section (tree decl,
case SECCAT_RODATA:
case SECCAT_SRODATA:
- base_section = darwin_rodata_section (use_coal, zsize);
+ base_section = darwin_rodata_section (use_coal, zsize, reloc);
break;
case SECCAT_RODATA_MERGE_STR:
@@ -2092,11 +2152,11 @@ darwin_emit_unwind_label (FILE *file, tree decl, int for_eh, int empty)
static int invok_count = 0;
static tree last_fun_decl = NULL_TREE;
- /* We use the linker to emit the .eh labels for Darwin 9 and above. */
- if (! for_eh || generating_for_darwin_version >= 9)
+ /* Modern linkers can produce distinct FDEs without compiler support. */
+ if (! for_eh || ! ld_needs_eh_markers)
return;
- /* FIXME: This only works when the eh for all sections of a function is
+ /* FIXME: This only works when the eh for all sections of a function are
emitted at the same time. If that changes, we would need to use a lookup
table of some form to determine what to do. Also, we should emit the
unadorned label for the partition containing the public label for a
@@ -3154,17 +3214,19 @@ darwin_override_options (void)
: (generating_for_darwin_version >= 9) ? 1
: 0);
- /* Objective-C family ABI 2 is only valid for next/m64 at present. */
if (global_options_set.x_flag_objc_abi && flag_next_runtime)
{
- if (TARGET_64BIT && global_options.x_flag_objc_abi < 2)
- error_at (UNKNOWN_LOCATION, "%<-fobjc-abi-version%> >= 2 must be"
- " used for %<-m64%> targets with"
- " %<-fnext-runtime%>");
- if (!TARGET_64BIT && global_options.x_flag_objc_abi >= 2)
- error_at (UNKNOWN_LOCATION, "%<-fobjc-abi-version%> >= 2 is not"
- " supported on %<-m32%> targets with"
- " %<-fnext-runtime%>");
+ if (TARGET_64BIT && global_options.x_flag_objc_abi != 2)
+ /* The Objective-C family ABI 2 is the only valid version NeXT/m64. */
+ error_at (UNKNOWN_LOCATION,
+ "%<-fobjc-abi-version%> 2 must be used for 64 bit targets"
+ " with %<-fnext-runtime%>");
+ else if (!TARGET_64BIT && global_options.x_flag_objc_abi >= 2)
+ /* ABI versions 0 and 1 are the only valid versions NeXT/m32. */
+ error_at (UNKNOWN_LOCATION,
+ "%<-fobjc-abi-version%> %d is not supported for 32 bit"
+ " targets with %<-fnext-runtime%>",
+ global_options.x_flag_objc_abi);
}
/* Don't emit DWARF3/4 unless specifically selected. This is a
@@ -3267,11 +3329,44 @@ darwin_override_options (void)
flag_pic = 2;
}
- /* It is assumed that branch island stubs are needed for earlier systems. */
- if (generating_for_darwin_version < 9)
- darwin_emit_branch_islands = true;
- else
- emit_aligned_common = true; /* Later systems can support aligned common. */
+ /* Linkers >= ld64-62.1 (at least) are capable of making the necessary PIC
+ indirections and we no longer need to emit pic symbol stubs.
+ However, if we are generating code for earlier ones (or for use in the
+ kernel) the stubs might still be required, and this will be set true.
+ If the user sets it on or off - then that takes precedence.
+
+ Linkers that don't need stubs, don't need the EH symbol markers either.
+ */
+
+ if (!global_options_set.x_darwin_symbol_stubs)
+ {
+ if (darwin_target_linker)
+ {
+ if (strverscmp (darwin_target_linker, MIN_LD64_OMIT_STUBS) < 0)
+ {
+ darwin_symbol_stubs = true;
+ ld_needs_eh_markers = true;
+ }
+ }
+ else if (generating_for_darwin_version < 9)
+ {
+ /* If we don't know the linker version and we're targeting an old
+ system, we know no better than to assume the use of an earlier
+ linker. */
+ darwin_symbol_stubs = true;
+ ld_needs_eh_markers = true;
+ }
+ }
+ else if (DARWIN_X86 && darwin_symbol_stubs && TARGET_64BIT)
+ {
+ inform (input_location,
+ "%<-msymbol-stubs%> is not required for 64b code (ignored)");
+ darwin_symbol_stubs = false;
+ }
+
+ if (generating_for_darwin_version >= 9)
+ /* Later systems can support aligned common. */
+ emit_aligned_common = true;
/* The c_dialect...() macros are not available to us here. */
darwin_running_cxx = (strstr (lang_hooks.name, "C++") != 0);
diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h
index b1f13b6e3a8..8719d78a442 100644
--- a/gcc/config/darwin.h
+++ b/gcc/config/darwin.h
@@ -187,8 +187,15 @@ extern GTY(()) int darwin_ms_struct;
#define DARWIN_NOCOMPACT_UNWIND \
" %:version-compare(>= 10.6 mmacosx-version-min= -no_compact_unwind) "
-/* This is mostly a clone of the standard LINK_COMMAND_SPEC, plus
- precomp, libtool, and fat build additions.
+/* In Darwin linker specs we can put -lcrt0.o and ld will search the library
+ path for crt0.o or -lcrtx.a and it will search for for libcrtx.a. As for
+ other ports, we can also put xxx.{o,a}%s and get the appropriate complete
+ startfile absolute directory. This latter point is important when we want
+ to override ld's rule of .dylib being found ahead of .a and the user wants
+ the convenience library to be linked. */
+
+/* The LINK_COMMAND spec is mostly a clone of the standard LINK_COMMAND_SPEC,
+ plus precomp, libtool, and fat build additions.
In general, random Darwin linker flags should go into LINK_SPEC
instead of LINK_COMMAND_SPEC. The command spec is better for
@@ -353,43 +360,42 @@ extern GTY(()) int darwin_ms_struct;
/* Support -mmacosx-version-min by supplying different (stub) libgcc_s.dylib
libraries to link against, and by not linking against libgcc_s on
- earlier-than-10.3.9.
+ earlier-than-10.3.9. If we need exceptions, prior to 10.3.9, then we have
+ to link the static eh lib, since there's no shared version on the system.
+
+ Note that by default, except as above, -lgcc_eh is not linked against.
+ This is because,in general, we need to unwind through system libraries that
+ are linked with the shared unwinder in libunwind (or libgcc_s for 10.4/5).
- Note that by default, -lgcc_eh is not linked against! This is
- because in a future version of Darwin the EH frame information may
- be in a new format, or the fallback routine might be changed; if
- you want to explicitly link against the static version of those
- routines, because you know you don't need to unwind through system
- libraries, you need to explicitly say -static-libgcc.
+ The static version of the current libgcc unwinder (which differs from the
+ implementation in libunwind.dylib on systems Darwin10 [10.6]+) can be used
+ by specifying -static-libgcc.
- If it is linked against, it has to be before -lgcc, because it may
+ If libgcc_eh is linked against, it has to be before -lgcc, because it might
need symbols from -lgcc. */
+
#undef REAL_LIBGCC_SPEC
#define REAL_LIBGCC_SPEC \
"%{static-libgcc|static: -lgcc_eh -lgcc; \
- shared-libgcc|fexceptions|fgnu-runtime: \
- %:version-compare(!> 10.5 mmacosx-version-min= -lgcc_s.10.4) \
+ shared-libgcc|fexceptions|fobjc-exceptions|fgnu-runtime: \
+ %:version-compare(!> 10.3.9 mmacosx-version-min= -lgcc_eh) \
+ %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_s.10.4) \
%:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5) \
- %:version-compare(!> 10.5 mmacosx-version-min= -lgcc_ext.10.4) \
+ %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_ext.10.4) \
%:version-compare(>= 10.5 mmacosx-version-min= -lgcc_ext.10.5) \
-lgcc ; \
:%:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_s.10.4) \
%:version-compare(>< 10.5 10.6 mmacosx-version-min= -lgcc_s.10.5) \
- %:version-compare(!> 10.5 mmacosx-version-min= -lgcc_ext.10.4) \
+ %:version-compare(>< 10.3.9 10.5 mmacosx-version-min= -lgcc_ext.10.4) \
%:version-compare(>= 10.5 mmacosx-version-min= -lgcc_ext.10.5) \
-lgcc }"
-/* We specify crt0.o as -lcrt0.o so that ld will search the library path.
-
- crt3.o provides __cxa_atexit on systems that don't have it. Since
- it's only used with C++, which requires passing -shared-libgcc, key
- off that to avoid unnecessarily adding a destructor to every
- powerpc program built. */
+/* We specify crt0.o as -lcrt0.o so that ld will search the library path. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
- "%{Zdynamiclib: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}} \
- %{!Zdynamiclib:%{Zbundle:%{!static: \
+"%{Zdynamiclib: %(darwin_dylib1) %{fgnu-tm: -lcrttms.o}} \
+ %{!Zdynamiclib:%{Zbundle:%{!static: \
%:version-compare(< 10.6 mmacosx-version-min= -lbundle1.o) \
%{fgnu-tm: -lcrttms.o}}} \
%{!Zbundle:%{pg:%{static:-lgcrt0.o} \
@@ -403,7 +409,7 @@ extern GTY(()) int darwin_ms_struct;
%{!object:%{preload:-lcrt0.o} \
%{!preload: %(darwin_crt1) \
%(darwin_crt2)}}}}}} \
- %{shared-libgcc:%:version-compare(< 10.5 mmacosx-version-min= crt3.o%s)}"
+ %(darwin_crt3)"
/* We want a destructor last in the list. */
#define TM_DESTRUCTOR "%{fgnu-tm: -lcrttme.o}"
@@ -411,18 +417,30 @@ extern GTY(()) int darwin_ms_struct;
#define DARWIN_EXTRA_SPECS \
{ "darwin_crt1", DARWIN_CRT1_SPEC }, \
+ { "darwin_crt2", DARWIN_CRT2_SPEC }, \
+ { "darwin_crt3", DARWIN_CRT3_SPEC }, \
{ "darwin_dylib1", DARWIN_DYLIB1_SPEC },
-#define DARWIN_DYLIB1_SPEC \
- "%:version-compare(!> 10.5 mmacosx-version-min= -ldylib1.o) \
- %:version-compare(>< 10.5 10.6 mmacosx-version-min= -ldylib1.10.5.o)"
-
#define DARWIN_CRT1_SPEC \
"%:version-compare(!> 10.5 mmacosx-version-min= -lcrt1.o) \
%:version-compare(>< 10.5 10.6 mmacosx-version-min= -lcrt1.10.5.o) \
%:version-compare(>< 10.6 10.8 mmacosx-version-min= -lcrt1.10.6.o) \
%{fgnu-tm: -lcrttms.o}"
+#define DARWIN_CRT2_SPEC ""
+
+/* crt3.o provides __cxa_atexit on systems that don't have it (and a fix
+ up for faulty versions on 10.4). Since it's only used with C++, which
+ requires passing -shared-libgcc, key off that to avoid unnecessarily
+ adding a destructor to every program built for 10.4 or earlier. */
+
+#define DARWIN_CRT3_SPEC \
+"%{shared-libgcc:%:version-compare(< 10.5 mmacosx-version-min= crt3.o%s)}"
+
+#define DARWIN_DYLIB1_SPEC \
+ "%:version-compare(!> 10.5 mmacosx-version-min= -ldylib1.o) \
+ %:version-compare(>< 10.5 10.6 mmacosx-version-min= -ldylib1.10.5.o)"
+
#ifdef HAVE_AS_MMACOSX_VERSION_MIN_OPTION
/* Emit macosx version (but only major). */
#define ASM_MMACOSX_VERSION_MIN_SPEC \
@@ -788,21 +806,52 @@ extern GTY(()) section * darwin_sections[NUM_DARWIN_SECTIONS];
#undef TARGET_ASM_MARK_DECL_PRESERVED
#define TARGET_ASM_MARK_DECL_PRESERVED darwin_mark_decl_preserved
-/* Set on a symbol with SYMBOL_FLAG_FUNCTION or
- MACHO_SYMBOL_FLAG_VARIABLE to indicate that the function or
- variable has been defined in this translation unit.
- When porting Mach-O to new architectures you need to make
- sure these aren't clobbered by the backend. */
+/* Any port using this header needs to define the first available
+ subtarget symbol bit: SYMBOL_FLAG_SUBT_DEP. */
+
+/* Is a variable. */
+#define MACHO_SYMBOL_FLAG_VARIABLE (SYMBOL_FLAG_SUBT_DEP)
+#define MACHO_SYMBOL_VARIABLE_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_VARIABLE) != 0)
+
+/* Set on a symbol that must be indirected, even when there is a
+ definition in the TU. The ABI mandates that common symbols are so
+ indirected, as are weak. If 'fix-and-continue' is operational then
+ data symbols might also be. */
+
+#define MACHO_SYMBOL_FLAG_MUST_INDIRECT ((SYMBOL_FLAG_SUBT_DEP) << 1)
+#define MACHO_SYMBOL_MUST_INDIRECT_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_MUST_INDIRECT) != 0)
-#define MACHO_SYMBOL_FLAG_VARIABLE (SYMBOL_FLAG_MACH_DEP)
-#define MACHO_SYMBOL_FLAG_DEFINED ((SYMBOL_FLAG_MACH_DEP) << 1)
+/* Set on a symbol with SYMBOL_FLAG_FUNCTION or MACHO_SYMBOL_FLAG_VARIABLE
+ to indicate that the function or variable is considered defined in this
+ translation unit. */
+
+#define MACHO_SYMBOL_FLAG_DEFINED ((SYMBOL_FLAG_SUBT_DEP) << 2)
+#define MACHO_SYMBOL_DEFINED_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_DEFINED) != 0)
+
+/* Set on a symbol that has specified non-default visibility. */
+
+#define MACHO_SYMBOL_FLAG_HIDDEN_VIS ((SYMBOL_FLAG_SUBT_DEP) << 3)
+#define MACHO_SYMBOL_HIDDEN_VIS_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_HIDDEN_VIS) != 0)
+
+/* Set on a symbol that is a pic stub or symbol indirection (i.e. the
+ L_xxxxx${stub,non_lazy_ptr,lazy_ptr}. */
+
+#define MACHO_SYMBOL_FLAG_INDIRECTION ((SYMBOL_FLAG_SUBT_DEP) << 5)
+#define MACHO_SYMBOL_INDIRECTION_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_INDIRECTION) != 0)
/* Set on a symbol to indicate when fix-and-continue style code
generation is being used and the symbol refers to a static symbol
that should be rebound from new instances of a translation unit to
the original instance of the data. */
-#define MACHO_SYMBOL_STATIC ((SYMBOL_FLAG_MACH_DEP) << 2)
+#define MACHO_SYMBOL_FLAG_STATIC ((SYMBOL_FLAG_SUBT_DEP) << 6)
+#define MACHO_SYMBOL_STATIC_P(RTX) \
+ ((SYMBOL_REF_FLAGS (RTX) & MACHO_SYMBOL_FLAG_STATIC) != 0)
/* Symbolic names for various things we might know about a symbol. */
@@ -995,8 +1044,12 @@ extern void darwin_driver_init (unsigned int *,struct cl_decoded_option **);
_tested_ version known to support this so far. */
#define MIN_LD64_NO_COAL_SECTS "236.4"
+/* From at least version 62.1, ld64 can build symbol indirection stubs as
+ needed, and there is no need for the compiler to emit them. */
+#define MIN_LD64_OMIT_STUBS "85.2"
+
#ifndef LD64_VERSION
-#define LD64_VERSION "85.2"
+#define LD64_VERSION "62.1"
#else
#define DEF_LD64 LD64_VERSION
#endif
diff --git a/gcc/config/darwin.opt b/gcc/config/darwin.opt
index 52a919a3f17..6183be34ca9 100644
--- a/gcc/config/darwin.opt
+++ b/gcc/config/darwin.opt
@@ -75,6 +75,10 @@ mone-byte-bool
Target RejectNegative Report Var(darwin_one_byte_bool)
Set sizeof(bool) to 1.
+msymbol-stubs
+Target Report Var(darwin_symbol_stubs) Init(0)
+Force generation of external symbol indirection stubs.
+
; Some code-gen may be improved / adjusted if the linker is sufficiently modern.
mtarget-linker=
Target RejectNegative Joined Report Alias(mtarget-linker)
diff --git a/gcc/config/i386/darwin.h b/gcc/config/i386/darwin.h
index 0603951d936..2d0dc1f2605 100644
--- a/gcc/config/i386/darwin.h
+++ b/gcc/config/i386/darwin.h
@@ -89,14 +89,12 @@ along with GCC; see the file COPYING3. If not see
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 32
-/* Generate branch islands stubs if this is true. */
-extern int darwin_emit_branch_islands;
-
-#undef TARGET_MACHO_BRANCH_ISLANDS
-#define TARGET_MACHO_BRANCH_ISLANDS darwin_emit_branch_islands
+/* Generate pic symbol indirection stubs if this is true. */
+#undef TARGET_MACHO_SYMBOL_STUBS
+#define TARGET_MACHO_SYMBOL_STUBS (darwin_symbol_stubs)
/* For compatibility with OSX system tools, use the new style of pic stub
- if this is set. */
+ if this is set (default). */
#undef MACHOPIC_ATT_STUB
#define MACHOPIC_ATT_STUB (darwin_macho_att_stub)
@@ -241,16 +239,16 @@ extern int darwin_emit_branch_islands;
/* Darwin profiling -- call mcount. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
- do { \
- if (TARGET_MACHO_BRANCH_ISLANDS \
- && MACHOPIC_INDIRECT && !TARGET_64BIT) \
- { \
- const char *name = machopic_mcount_stub_name (); \
- fprintf (FILE, "\tcall %s\n", name+1); /* skip '&' */ \
- machopic_validate_stub_or_non_lazy_ptr (name); \
- } \
- else fprintf (FILE, "\tcall mcount\n"); \
- } while (0)
+ do { \
+ if (TARGET_MACHO_SYMBOL_STUBS \
+ && MACHOPIC_INDIRECT && !TARGET_64BIT) \
+ { \
+ const char *name = machopic_mcount_stub_name (); \
+ fprintf (FILE, "\tcall %s\n", name+1); /* skip '&' */ \
+ machopic_validate_stub_or_non_lazy_ptr (name); \
+ } \
+ else fprintf (FILE, "\tcall mcount\n"); \
+ } while (0)
#define C_COMMON_OVERRIDE_OPTIONS \
do { \
@@ -323,10 +321,8 @@ do { \
} \
}
-/* This needs to move since i386 uses the first flag and other flags are
- used in Mach-O. */
-#undef MACHO_SYMBOL_FLAG_VARIABLE
-#define MACHO_SYMBOL_FLAG_VARIABLE ((SYMBOL_FLAG_MACH_DEP) << 3)
+/* First available SYMBOL flag bit for use by subtargets. */
+#define SYMBOL_FLAG_SUBT_DEP (SYMBOL_FLAG_MACH_DEP << 5)
#undef MACHOPIC_NL_SYMBOL_PTR_SECTION
#define MACHOPIC_NL_SYMBOL_PTR_SECTION \
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7c92e698505..f156f7e66a4 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3380,7 +3380,7 @@ ix86_option_override_internal (bool main_args_p,
| PTA_AVX512VBMI | PTA_AVX512IFMA | PTA_SHA;
const wide_int_bitmask PTA_ICELAKE_CLIENT = PTA_CANNONLAKE | PTA_AVX512VNNI
| PTA_GFNI | PTA_VAES | PTA_AVX512VBMI2 | PTA_VPCLMULQDQ | PTA_AVX512BITALG
- | PTA_RDPID | PTA_CLWB;
+ | PTA_RDPID | PTA_CLWB | PTA_AVX512VPOPCNTDQ;
const wide_int_bitmask PTA_ICELAKE_SERVER = PTA_ICELAKE_CLIENT | PTA_PCONFIG
| PTA_WBNOINVD;
const wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER
@@ -5450,7 +5450,25 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
ret = false;
}
else
- p_strings[opt] = xstrdup (p + opt_len);
+ {
+ p_strings[opt] = xstrdup (p + opt_len);
+ if (opt == IX86_FUNCTION_SPECIFIC_ARCH)
+ {
+ /* If arch= is set, clear all bits in x_ix86_isa_flags,
+ except for ISA_64BIT, ABI_64, ABI_X32, and CODE16
+ and all bits in x_ix86_isa_flags2. */
+ opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
+ | OPTION_MASK_ABI_64
+ | OPTION_MASK_ABI_X32
+ | OPTION_MASK_CODE16);
+ opts->x_ix86_isa_flags_explicit &= (OPTION_MASK_ISA_64BIT
+ | OPTION_MASK_ABI_64
+ | OPTION_MASK_ABI_X32
+ | OPTION_MASK_CODE16);
+ opts->x_ix86_isa_flags2 = 0;
+ opts->x_ix86_isa_flags2_explicit = 0;
+ }
+ }
}
else if (type == ix86_opt_enum)
@@ -5525,18 +5543,8 @@ ix86_valid_target_attribute_tree (tree args,
/* If we are using the default tune= or arch=, undo the string assigned,
and use the default. */
if (option_strings[IX86_FUNCTION_SPECIFIC_ARCH])
- {
- opts->x_ix86_arch_string
- = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
-
- /* If arch= is set, clear all bits in x_ix86_isa_flags,
- except for ISA_64BIT, ABI_64, ABI_X32, and CODE16. */
- opts->x_ix86_isa_flags &= (OPTION_MASK_ISA_64BIT
- | OPTION_MASK_ABI_64
- | OPTION_MASK_ABI_X32
- | OPTION_MASK_CODE16);
- opts->x_ix86_isa_flags2 = 0;
- }
+ opts->x_ix86_arch_string
+ = ggc_strdup (option_strings[IX86_FUNCTION_SPECIFIC_ARCH]);
else if (!orig_arch_specified)
opts->x_ix86_arch_string = NULL;
@@ -17211,7 +17219,7 @@ output_pic_addr_const (FILE *file, rtx x, int code)
break;
case SYMBOL_REF:
- if (TARGET_64BIT || ! TARGET_MACHO_BRANCH_ISLANDS)
+ if (TARGET_64BIT || ! TARGET_MACHO_SYMBOL_STUBS)
output_addr_const (file, x);
else
{
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index bcefa0ebd4b..59357e07a07 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -621,7 +621,7 @@ extern tree x86_mfence;
/* Replace MACH-O, ifdefs by in-line tests, where possible.
(a) Macros defined in config/i386/darwin.h */
#define TARGET_MACHO 0
-#define TARGET_MACHO_BRANCH_ISLANDS 0
+#define TARGET_MACHO_SYMBOL_STUBS 0
#define MACHOPIC_ATT_STUB 0
/* (b) Macros defined in config/darwin.h */
#define MACHO_DYNAMIC_NO_PIC_P 0
diff --git a/gcc/config/i386/intelmic-mkoffload.c b/gcc/config/i386/intelmic-mkoffload.c
index b8f116446e6..008968e3e37 100644
--- a/gcc/config/i386/intelmic-mkoffload.c
+++ b/gcc/config/i386/intelmic-mkoffload.c
@@ -453,8 +453,6 @@ prepare_target_image (const char *target_compiler, int argc, char **argv)
if (verbose)
obstack_ptr_grow (&argv_obstack, "-v");
obstack_ptr_grow (&argv_obstack, "-xlto");
- obstack_ptr_grow (&argv_obstack, "-shared");
- obstack_ptr_grow (&argv_obstack, "-fPIC");
obstack_ptr_grow (&argv_obstack, opt1);
for (int i = 1; i < argc; i++)
{
@@ -466,6 +464,9 @@ prepare_target_image (const char *target_compiler, int argc, char **argv)
if (!out_obj_filename)
fatal_error (input_location, "output file not specified");
obstack_ptr_grow (&argv_obstack, opt2);
+ /* NB: Put -fPIC and -shared the last to create shared library. */
+ obstack_ptr_grow (&argv_obstack, "-fPIC");
+ obstack_ptr_grow (&argv_obstack, "-shared");
obstack_ptr_grow (&argv_obstack, "-o");
obstack_ptr_grow (&argv_obstack, target_so_filename);
compile_for_target (&argv_obstack);
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index d7fdbb093ab..c3fe8d9ddfc 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -5772,8 +5772,8 @@
"ISA_HAS_ROR"
{
if (CONST_INT_P (operands[2]))
- gcc_assert (INTVAL (operands[2]) >= 0
- && INTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode));
+ operands[2] = GEN_INT (INTVAL (operands[2])
+ & (GET_MODE_BITSIZE (<MODE>mode) - 1));
return "<d>ror\t%0,%1,%2";
}
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 411ea9cbb0d..715877d0b8b 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -123,7 +123,6 @@ static void pa_linux_output_function_prologue (FILE *) ATTRIBUTE_UNUSED;
static void update_total_code_bytes (unsigned int);
static void pa_output_function_epilogue (FILE *);
static int pa_adjust_cost (rtx_insn *, int, rtx_insn *, int, unsigned int);
-static int pa_adjust_priority (rtx_insn *, int);
static int pa_issue_rate (void);
static int pa_reloc_rw_mask (void);
static void pa_som_asm_init_sections (void) ATTRIBUTE_UNUSED;
@@ -279,8 +278,6 @@ static size_t n_deferred_plabels = 0;
#undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST pa_adjust_cost
-#undef TARGET_SCHED_ADJUST_PRIORITY
-#define TARGET_SCHED_ADJUST_PRIORITY pa_adjust_priority
#undef TARGET_SCHED_ISSUE_RATE
#define TARGET_SCHED_ISSUE_RATE pa_issue_rate
@@ -4991,37 +4988,6 @@ pa_adjust_cost (rtx_insn *insn, int dep_type, rtx_insn *dep_insn, int cost,
}
}
-/* Adjust scheduling priorities. We use this to try and keep addil
- and the next use of %r1 close together. */
-static int
-pa_adjust_priority (rtx_insn *insn, int priority)
-{
- rtx set = single_set (insn);
- rtx src, dest;
- if (set)
- {
- src = SET_SRC (set);
- dest = SET_DEST (set);
- if (GET_CODE (src) == LO_SUM
- && symbolic_operand (XEXP (src, 1), VOIDmode)
- && ! read_only_operand (XEXP (src, 1), VOIDmode))
- priority >>= 3;
-
- else if (GET_CODE (src) == MEM
- && GET_CODE (XEXP (src, 0)) == LO_SUM
- && symbolic_operand (XEXP (XEXP (src, 0), 1), VOIDmode)
- && ! read_only_operand (XEXP (XEXP (src, 0), 1), VOIDmode))
- priority >>= 1;
-
- else if (GET_CODE (dest) == MEM
- && GET_CODE (XEXP (dest, 0)) == LO_SUM
- && symbolic_operand (XEXP (XEXP (dest, 0), 1), VOIDmode)
- && ! read_only_operand (XEXP (XEXP (dest, 0), 1), VOIDmode))
- priority >>= 3;
- }
- return priority;
-}
-
/* The 700 can only issue a single insn at a time.
The 7XXX processors can issue two insns at a time.
The 8000 can issue 4 insns at a time. */
@@ -7887,7 +7853,7 @@ pa_attr_length_call (rtx_insn *insn, int sibcall)
/* 64-bit plabel sequence. */
else if (TARGET_64BIT && !local_call)
- length += sibcall ? 28 : 24;
+ length += 24;
/* non-pic long absolute branch sequence. */
else if ((TARGET_LONG_ABS_CALL || local_call) && !flag_pic)
@@ -7959,38 +7925,24 @@ pa_output_call (rtx_insn *insn, rtx call_dest, int sibcall)
xoperands[0] = pa_get_deferred_plabel (call_dest);
xoperands[1] = gen_label_rtx ();
- /* If this isn't a sibcall, we put the load of %r27 into the
- delay slot. We can't do this in a sibcall as we don't
- have a second call-clobbered scratch register available.
- We don't need to do anything when generating fast indirect
- calls. */
- if (seq_length != 0 && !sibcall)
+ /* Put the load of %r27 into the delay slot. We don't need to
+ do anything when generating fast indirect calls. */
+ if (seq_length != 0)
{
final_scan_insn (NEXT_INSN (insn), asm_out_file,
optimize, 0, NULL);
/* Now delete the delay insn. */
SET_INSN_DELETED (NEXT_INSN (insn));
- seq_length = 0;
}
output_asm_insn ("addil LT'%0,%%r27", xoperands);
output_asm_insn ("ldd RT'%0(%%r1),%%r1", xoperands);
output_asm_insn ("ldd 0(%%r1),%%r1", xoperands);
-
- if (sibcall)
- {
- output_asm_insn ("ldd 24(%%r1),%%r27", xoperands);
- output_asm_insn ("ldd 16(%%r1),%%r1", xoperands);
- output_asm_insn ("bve (%%r1)", xoperands);
- }
- else
- {
- output_asm_insn ("ldd 16(%%r1),%%r2", xoperands);
- output_asm_insn ("bve,l (%%r2),%%r2", xoperands);
- output_asm_insn ("ldd 24(%%r1),%%r27", xoperands);
- seq_length = 1;
- }
+ output_asm_insn ("ldd 16(%%r1),%%r2", xoperands);
+ output_asm_insn ("bve,l (%%r2),%%r2", xoperands);
+ output_asm_insn ("ldd 24(%%r1),%%r27", xoperands);
+ seq_length = 1;
}
else
{
@@ -8083,20 +8035,22 @@ pa_output_call (rtx_insn *insn, rtx call_dest, int sibcall)
{
output_asm_insn ("addil LT'%0,%%r19", xoperands);
output_asm_insn ("ldw RT'%0(%%r1),%%r1", xoperands);
- output_asm_insn ("ldw 0(%%r1),%%r1", xoperands);
+ output_asm_insn ("ldw 0(%%r1),%%r22", xoperands);
}
else
{
output_asm_insn ("addil LR'%0-$global$,%%r27",
xoperands);
- output_asm_insn ("ldw RR'%0-$global$(%%r1),%%r1",
+ output_asm_insn ("ldw RR'%0-$global$(%%r1),%%r22",
xoperands);
}
- output_asm_insn ("bb,>=,n %%r1,30,.+16", xoperands);
- output_asm_insn ("depi 0,31,2,%%r1", xoperands);
- output_asm_insn ("ldw 4(%%sr0,%%r1),%%r19", xoperands);
- output_asm_insn ("ldw 0(%%sr0,%%r1),%%r1", xoperands);
+ output_asm_insn ("bb,>=,n %%r22,30,.+16", xoperands);
+ output_asm_insn ("depi 0,31,2,%%r22", xoperands);
+ /* Should this be an ordered load to ensure the target
+ address is loaded before the global pointer? */
+ output_asm_insn ("ldw 0(%%r22),%%r1", xoperands);
+ output_asm_insn ("ldw 4(%%r22),%%r19", xoperands);
if (!sibcall && !TARGET_PA_20)
{
@@ -8189,10 +8143,6 @@ pa_attr_length_indirect_call (rtx_insn *insn)
if (TARGET_PORTABLE_RUNTIME)
return 16;
- /* Inline version of $$dyncall. */
- if ((TARGET_NO_SPACE_REGS || TARGET_PA_20) && !optimize_size)
- return 20;
-
if (!TARGET_LONG_CALLS
&& ((TARGET_PA_20 && !TARGET_SOM && distance < 7600000)
|| distance < MAX_PCREL17F_OFFSET))
@@ -8202,12 +8152,15 @@ pa_attr_length_indirect_call (rtx_insn *insn)
if (!flag_pic)
return 12;
- /* Inline version of $$dyncall. */
- if (TARGET_NO_SPACE_REGS || TARGET_PA_20)
- return 20;
-
+ /* Inline versions of $$dyncall. */
if (!optimize_size)
- return 36;
+ {
+ if (TARGET_NO_SPACE_REGS)
+ return 28;
+
+ if (TARGET_PA_20)
+ return 32;
+ }
/* Long PIC pc-relative call. */
return 20;
@@ -8245,22 +8198,6 @@ pa_output_indirect_call (rtx_insn *insn, rtx call_dest)
return "blr %%r0,%%r2\n\tbv,n %%r0(%%r31)";
}
- /* Maybe emit a fast inline version of $$dyncall. */
- if ((TARGET_NO_SPACE_REGS || TARGET_PA_20) && !optimize_size)
- {
- output_asm_insn ("bb,>=,n %%r22,30,.+12\n\t"
- "ldw 2(%%r22),%%r19\n\t"
- "ldw -2(%%r22),%%r22", xoperands);
- pa_output_arg_descriptor (insn);
- if (TARGET_NO_SPACE_REGS)
- {
- if (TARGET_PA_20)
- return "bve,l,n (%%r22),%%r2\n\tnop";
- return "ble 0(%%sr4,%%r22)\n\tcopy %%r31,%%r2";
- }
- return "bve,l (%%r22),%%r2\n\tstw %%r2,-24(%%sp)";
- }
-
/* Now the normal case -- we can reach $$dyncall directly or
we're sure that we can get there via a long-branch stub.
@@ -8289,35 +8226,40 @@ pa_output_indirect_call (rtx_insn *insn, rtx call_dest)
return "ble R'$$dyncall(%%sr4,%%r2)\n\tcopy %%r31,%%r2";
}
- /* Maybe emit a fast inline version of $$dyncall. The long PIC
- pc-relative call sequence is five instructions. The inline PA 2.0
- version of $$dyncall is also five instructions. The PA 1.X versions
- are longer but still an overall win. */
- if (TARGET_NO_SPACE_REGS || TARGET_PA_20 || !optimize_size)
+ /* The long PIC pc-relative call sequence is five instructions. So,
+ let's use an inline version of $$dyncall when the calling sequence
+ has a roughly similar number of instructions and we are not optimizing
+ for size. We need two instructions to load the return pointer plus
+ the $$dyncall implementation. */
+ if (!optimize_size)
{
- output_asm_insn ("bb,>=,n %%r22,30,.+12\n\t"
- "ldw 2(%%r22),%%r19\n\t"
- "ldw -2(%%r22),%%r22", xoperands);
if (TARGET_NO_SPACE_REGS)
{
pa_output_arg_descriptor (insn);
- if (TARGET_PA_20)
- return "bve,l,n (%%r22),%%r2\n\tnop";
- return "ble 0(%%sr4,%%r22)\n\tcopy %%r31,%%r2";
+ output_asm_insn ("bl .+8,%%r2\n\t"
+ "ldo 20(%%r2),%%r2\n\t"
+ "extru,<> %%r22,30,1,%%r0\n\t"
+ "bv,n %%r0(%%r22)\n\t"
+ "ldw -2(%%r22),%%r21\n\t"
+ "bv %%r0(%%r21)\n\t"
+ "ldw 2(%%r22),%%r19", xoperands);
+ return "";
}
if (TARGET_PA_20)
{
pa_output_arg_descriptor (insn);
- return "bve,l (%%r22),%%r2\n\tstw %%r2,-24(%%sp)";
+ output_asm_insn ("bl .+8,%%r2\n\t"
+ "ldo 24(%%r2),%%r2\n\t"
+ "stw %%r2,-24(%%sp)\n\t"
+ "extru,<> %r22,30,1,%%r0\n\t"
+ "bve,n (%%r22)\n\t"
+ "ldw -2(%%r22),%%r21\n\t"
+ "bve (%%r21)\n\t"
+ "ldw 2(%%r22),%%r19", xoperands);
+ return "";
}
- output_asm_insn ("bl .+8,%%r2\n\t"
- "ldo 16(%%r2),%%r2\n\t"
- "ldsid (%%r22),%%r1\n\t"
- "mtsp %%r1,%%sr0", xoperands);
- pa_output_arg_descriptor (insn);
- return "be 0(%%sr0,%%r22)\n\tstw %%r2,-24(%%sp)";
}
-
+
/* We need a long PIC call to $$dyncall. */
xoperands[0] = gen_rtx_SYMBOL_REF (Pmode, "$$dyncall");
xoperands[1] = gen_rtx_REG (Pmode, 2);
@@ -10076,7 +10018,7 @@ pa_modes_tieable_p (machine_mode mode1, machine_mode mode2)
/* Length in units of the trampoline instruction code. */
-#define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 32 : 40))
+#define TRAMPOLINE_CODE_SIZE (TARGET_64BIT ? 24 : (TARGET_PA_20 ? 36 : 48))
/* Output assembler code for a block containing the constant parts
@@ -10097,27 +10039,46 @@ pa_asm_trampoline_template (FILE *f)
{
if (!TARGET_64BIT)
{
- fputs ("\tldw 36(%r22),%r21\n", f);
- fputs ("\tbb,>=,n %r21,30,.+16\n", f);
- if (ASSEMBLER_DIALECT == 0)
- fputs ("\tdepi 0,31,2,%r21\n", f);
- else
- fputs ("\tdepwi 0,31,2,%r21\n", f);
- fputs ("\tldw 4(%r21),%r19\n", f);
- fputs ("\tldw 0(%r21),%r21\n", f);
if (TARGET_PA_20)
{
- fputs ("\tbve (%r21)\n", f);
- fputs ("\tldw 40(%r22),%r29\n", f);
+ fputs ("\tmfia %r20\n", f);
+ fputs ("\tldw 48(%r20),%r22\n", f);
+ fputs ("\tcopy %r22,%r21\n", f);
+ fputs ("\tbb,>=,n %r22,30,.+16\n", f);
+ fputs ("\tdepwi 0,31,2,%r22\n", f);
+ fputs ("\tldw 0(%r22),%r21\n", f);
+ fputs ("\tldw 4(%r22),%r19\n", f);
+ fputs ("\tbve (%r21)\n", f);
+ fputs ("\tldw 52(%r1),%r29\n", f);
+ fputs ("\t.word 0\n", f);
fputs ("\t.word 0\n", f);
fputs ("\t.word 0\n", f);
}
else
{
+ if (ASSEMBLER_DIALECT == 0)
+ {
+ fputs ("\tbl .+8,%r20\n", f);
+ fputs ("\tdepi 0,31,2,%r20\n", f);
+ }
+ else
+ {
+ fputs ("\tb,l .+8,%r20\n", f);
+ fputs ("\tdepwi 0,31,2,%r20\n", f);
+ }
+ fputs ("\tldw 40(%r20),%r22\n", f);
+ fputs ("\tcopy %r22,%r21\n", f);
+ fputs ("\tbb,>=,n %r22,30,.+16\n", f);
+ if (ASSEMBLER_DIALECT == 0)
+ fputs ("\tdepi 0,31,2,%r22\n", f);
+ else
+ fputs ("\tdepwi 0,31,2,%r22\n", f);
+ fputs ("\tldw 0(%r22),%r21\n", f);
+ fputs ("\tldw 4(%r22),%r19\n", f);
fputs ("\tldsid (%r21),%r1\n", f);
fputs ("\tmtsp %r1,%sr0\n", f);
- fputs ("\tbe 0(%sr0,%r21)\n", f);
- fputs ("\tldw 40(%r22),%r29\n", f);
+ fputs ("\tbe 0(%sr0,%r21)\n", f);
+ fputs ("\tldw 44(%r20),%r29\n", f);
}
fputs ("\t.word 0\n", f);
fputs ("\t.word 0\n", f);
@@ -10131,11 +10092,11 @@ pa_asm_trampoline_template (FILE *f)
fputs ("\t.dword 0\n", f);
fputs ("\t.dword 0\n", f);
fputs ("\tmfia %r31\n", f);
- fputs ("\tldd 24(%r31),%r1\n", f);
- fputs ("\tldd 24(%r1),%r27\n", f);
- fputs ("\tldd 16(%r1),%r1\n", f);
- fputs ("\tbve (%r1)\n", f);
+ fputs ("\tldd 24(%r31),%r27\n", f);
fputs ("\tldd 32(%r31),%r31\n", f);
+ fputs ("\tldd 16(%r27),%r1\n", f);
+ fputs ("\tbve (%r1)\n", f);
+ fputs ("\tldd 24(%r27),%r27\n", f);
fputs ("\t.dword 0 ; fptr\n", f);
fputs ("\t.dword 0 ; static link\n", f);
}
@@ -10145,10 +10106,10 @@ pa_asm_trampoline_template (FILE *f)
FNADDR is an RTX for the address of the function's pure code.
CXT is an RTX for the static chain value for the function.
- Move the function address to the trampoline template at offset 36.
- Move the static chain value to trampoline template at offset 40.
- Move the trampoline address to trampoline template at offset 44.
- Move r19 to trampoline template at offset 48. The latter two
+ Move the function address to the trampoline template at offset 48.
+ Move the static chain value to trampoline template at offset 52.
+ Move the trampoline address to trampoline template at offset 56.
+ Move r19 to trampoline template at offset 60. The latter two
words create a plabel for the indirect call to the trampoline.
A similar sequence is used for the 64-bit port but the plabel is
@@ -10174,15 +10135,15 @@ pa_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
if (!TARGET_64BIT)
{
- tmp = adjust_address (m_tramp, Pmode, 36);
+ tmp = adjust_address (m_tramp, Pmode, 48);
emit_move_insn (tmp, fnaddr);
- tmp = adjust_address (m_tramp, Pmode, 40);
+ tmp = adjust_address (m_tramp, Pmode, 52);
emit_move_insn (tmp, chain_value);
/* Create a fat pointer for the trampoline. */
- tmp = adjust_address (m_tramp, Pmode, 44);
+ tmp = adjust_address (m_tramp, Pmode, 56);
emit_move_insn (tmp, r_tramp);
- tmp = adjust_address (m_tramp, Pmode, 48);
+ tmp = adjust_address (m_tramp, Pmode, 60);
emit_move_insn (tmp, gen_rtx_REG (Pmode, 19));
/* fdc and fic only use registers for the address to flush,
@@ -10241,13 +10202,13 @@ pa_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
/* Perform any machine-specific adjustment in the address of the trampoline.
ADDR contains the address that was passed to pa_trampoline_init.
- Adjust the trampoline address to point to the plabel at offset 44. */
+ Adjust the trampoline address to point to the plabel at offset 56. */
static rtx
pa_trampoline_adjust_address (rtx addr)
{
if (!TARGET_64BIT)
- addr = memory_address (Pmode, plus_constant (Pmode, addr, 46));
+ addr = memory_address (Pmode, plus_constant (Pmode, addr, 58));
return addr;
}
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 01aefdf0aa7..232495bd719 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -689,7 +689,7 @@ extern int may_call_alloca;
/* Length in units of the trampoline for entering a nested function. */
-#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
+#define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 64)
/* Alignment required by the trampoline. */
@@ -1293,13 +1293,12 @@ do { \
#endif
/* The maximum offset in bytes for a PA 1.X pc-relative call to the
- head of the preceding stub table. The selected offsets have been
- chosen so that approximately one call stub is allocated for every
- 86.7 instructions. A long branch stub is two instructions when
- not generating PIC code. For HP-UX and ELF targets, PIC stubs are
- seven and four instructions, respectively. */
-#define MAX_PCREL17F_OFFSET \
- (flag_pic ? (TARGET_HPUX ? 198164 : 221312) : 240000)
+ head of the preceding stub table. A long branch stub is two or three
+ instructions for non-PIC and PIC, respectively. Import stubs are
+ seven and five instructions for HP-UX and ELF targets, respectively.
+ The default stub group size for ELF targets is 217856 bytes.
+ FIXME: We need an option to set the maximum offset. */
+#define MAX_PCREL17F_OFFSET (TARGET_HPUX ? 198164 : 217856)
#define NEED_INDICATE_EXEC_STACK 0
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index b39eb35d97c..fb9a6c40fdd 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -10091,23 +10091,55 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
(set_attr "length" "4,16")])
;; PA 2.0 hardware supports out-of-order execution of loads and stores, so
-;; we need a memory barrier to enforce program order for memory references.
-;; Since we want PA 1.x code to be PA 2.0 compatible, we also need the
-;; barrier when generating PA 1.x code.
+;; we need memory barriers to enforce program order for memory references
+;; when the TLB and PSW O bits are not set. We assume all PA 2.0 systems
+;; are weakly ordered since neither HP-UX or Linux set the PSW O bit. Since
+;; we want PA 1.x code to be PA 2.0 compatible, we also need barriers when
+;; generating PA 1.x code even though all PA 1.x systems are strongly ordered.
+
+;; When barriers are needed, we use a strongly ordered ldcw instruction as
+;; the barrier. Most PA 2.0 targets are cache coherent. In that case, we
+;; can use the coherent cache control hint and avoid aligning the ldcw
+;; address. In spite of its description, it is not clear that the sync
+;; instruction works as a barrier.
(define_expand "memory_barrier"
- [(set (match_dup 0)
- (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
+ [(parallel
+ [(set (match_dup 0) (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+ (clobber (match_dup 1))])]
""
{
- operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
+ /* We don't need a barrier if the target uses ordered memory references. */
+ if (TARGET_ORDERED)
+ FAIL;
+ operands[1] = gen_reg_rtx (Pmode);
+ operands[0] = gen_rtx_MEM (BLKmode, operands[1]);
MEM_VOLATILE_P (operands[0]) = 1;
})
-(define_insn "*memory_barrier"
+(define_insn "*memory_barrier_coherent"
[(set (match_operand:BLK 0 "" "")
- (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
- ""
- "sync"
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+ (clobber (match_operand 1 "pmode_register_operand" "=r"))]
+ "TARGET_PA_20 && TARGET_COHERENT_LDCW"
+ "ldcw,co 0(%%sp),%1"
[(set_attr "type" "binary")
(set_attr "length" "4")])
+
+(define_insn "*memory_barrier_64"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+ (clobber (match_operand 1 "pmode_register_operand" "=&r"))]
+ "TARGET_64BIT"
+ "ldo 15(%%sp),%1\n\tdepd %%r0,63,3,%1\n\tldcw 0(%1),%1"
+ [(set_attr "type" "binary")
+ (set_attr "length" "12")])
+
+(define_insn "*memory_barrier_32"
+ [(set (match_operand:BLK 0 "" "")
+ (unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
+ (clobber (match_operand 1 "pmode_register_operand" "=&r"))]
+ ""
+ "ldo 15(%%sp),%1\n\t{dep|depw} %%r0,31,3,%1\n\tldcw 0(%1),%1"
+ [(set_attr "type" "binary")
+ (set_attr "length" "12")])
diff --git a/gcc/config/pa/pa.opt b/gcc/config/pa/pa.opt
index 4aaf6acc203..5a3707e5759 100644
--- a/gcc/config/pa/pa.opt
+++ b/gcc/config/pa/pa.opt
@@ -45,6 +45,10 @@ mcaller-copies
Target Report Mask(CALLER_COPIES)
Caller copies function arguments passed by hidden reference.
+mcoherent-ldcw
+Target Report Var(TARGET_COHERENT_LDCW) Init(1)
+Use ldcw/ldcd coherent cache-control hint.
+
mdisable-fpregs
Target Report Mask(DISABLE_FPREGS)
Disable FP regs.
@@ -90,6 +94,10 @@ mno-space-regs
Target RejectNegative Report Mask(NO_SPACE_REGS)
Disable space regs.
+mordered
+Target Report Var(TARGET_ORDERED) Init(0)
+Assume memory references are ordered and barriers are not needed.
+
mpa-risc-1-0
Target RejectNegative
Generate PA1.0 code.
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index f55f77e9ef1..fb262236b0a 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -575,7 +575,7 @@
[(set_attr "type" "vecsimple")])
;;
-(define_insn "altivec_vavgu<VI_char>"
+(define_insn "uavg<mode>3_ceil"
[(set (match_operand:VI 0 "register_operand" "=v")
(unspec:VI [(match_operand:VI 1 "register_operand" "v")
(match_operand:VI 2 "register_operand" "v")]
@@ -584,7 +584,7 @@
"vavgu<VI_char> %0,%1,%2"
[(set_attr "type" "vecsimple")])
-(define_insn "altivec_vavgs<VI_char>"
+(define_insn "avg<mode>3_ceil"
[(set (match_operand:VI 0 "register_operand" "=v")
(unspec:VI [(match_operand:VI 1 "register_operand" "v")
(match_operand:VI 2 "register_operand" "v")]
diff --git a/gcc/config/rs6000/darwin.h b/gcc/config/rs6000/darwin.h
index 2e7a94aee2a..f1d0b8b68c7 100644
--- a/gcc/config/rs6000/darwin.h
+++ b/gcc/config/rs6000/darwin.h
@@ -75,9 +75,6 @@
} \
while (0)
-/* Generate branch islands stubs if this is true. */
-extern int darwin_emit_branch_islands;
-
#define SUBTARGET_OVERRIDE_OPTIONS darwin_rs6000_override_options ()
#define C_COMMON_OVERRIDE_OPTIONS do { \
@@ -132,9 +129,37 @@ extern int darwin_emit_branch_islands;
mcpu=G5:ppc970; \
:ppc}"
-/* crt2.o is at least partially required for 10.3.x and earlier. */
+/* We need to jam the crt to 10.5 for 10.6 (Rosetta) use. */
+#undef DARWIN_CRT1_SPEC
+#define DARWIN_CRT1_SPEC \
+ "%:version-compare(!> 10.5 mmacosx-version-min= -lcrt1.o) \
+ %:version-compare(>< 10.5 10.7 mmacosx-version-min= -lcrt1.10.5.o) \
+ %{fgnu-tm: -lcrttms.o}"
+
+/* crt2.o is at least partially required for 10.3.x and earlier.
+ It deals with registration of the unwind frames, where this is not
+ automatically provided by the system. So we need it for any case that
+ might use exceptions. */
+#undef DARWIN_CRT2_SPEC
#define DARWIN_CRT2_SPEC \
- "%{!m64:%:version-compare(!> 10.4 mmacosx-version-min= crt2.o%s)}"
+"%{!m64:%{shared-libgcc|static-libstdc++|fexceptions|fobjc-exceptions|fgnu-runtime: \
+ %:version-compare(!> 10.4 mmacosx-version-min= crt2.o%s) \
+ }}"
+
+/* crt3 deals with providing cxa_atexit on earlier systems (or fixing it up,
+ for broken versions). It's only needed for c++ code, so we can make it
+ conditional on shared-libgcc since that's forced on for c++. */
+#undef DARWIN_CRT3_SPEC
+#define DARWIN_CRT3_SPEC \
+"%{!m64:%{shared-libgcc|static-libstdc++: \
+ %:version-compare(>< 10.4 10.5 mmacosx-version-min= crt3.o%s) \
+ %:version-compare(!> 10.4 mmacosx-version-min= crt3_2.o%s) \
+ }}"
+
+/* The PPC regs save/restore functions are leaves and could, conceivably
+ be used by the tm destructor. */
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC TM_DESTRUCTOR " -lef_ppc"
#undef SUBTARGET_EXTRA_SPECS
#define SUBTARGET_EXTRA_SPECS \
@@ -278,9 +303,9 @@ extern int darwin_emit_branch_islands;
/* This is supported in cctools 465 and later. The macro test
above prevents using it in earlier build environments. */
#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE,LOG,MAX_SKIP) \
- if ((LOG) != 0) \
+ if ((LOG) > 0) \
{ \
- if ((MAX_SKIP) == 0) \
+ if ((MAX_SKIP) <= 0) \
fprintf ((FILE), "\t.p2align %d\n", (LOG)); \
else \
fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP)); \
@@ -395,6 +420,7 @@ extern int darwin_emit_branch_islands;
do \
{ \
DARWIN_REGISTER_TARGET_PRAGMAS(); \
+ targetm.target_option.pragma_parse = rs6000_pragma_target_parse; \
targetm.resolve_overloaded_builtin = altivec_resolve_overloaded_builtin; \
} \
while (0)
@@ -454,6 +480,9 @@ do { \
this will need to be modified similar to the x86 case. */
#define TARGET_FOLD_BUILTIN SUBTARGET_FOLD_BUILTIN
+/* First available SYMBOL flag bit for use by subtargets. */
+#define SYMBOL_FLAG_SUBT_DEP (SYMBOL_FLAG_MACH_DEP)
+
/* Use standard DWARF numbering for DWARF debugging information. */
#define RS6000_USE_DWARF_NUMBERING
diff --git a/gcc/config/rs6000/darwin.md b/gcc/config/rs6000/darwin.md
index 48fd5b9613c..157326d3559 100644
--- a/gcc/config/rs6000/darwin.md
+++ b/gcc/config/rs6000/darwin.md
@@ -137,38 +137,6 @@ You should have received a copy of the GNU General Public License
[(set_attr "type" "store")
(set_attr "length" "4")])
-;; 64-bit MachO load/store support
-(define_insn "movdi_low"
- [(set (match_operand:DI 0 "gpc_reg_operand" "=r,*!d")
- (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
- (match_operand 2 "" ""))))]
- "TARGET_MACHO && TARGET_64BIT"
- "@
- ld %0,lo16(%2)(%1)
- lfd %0,lo16(%2)(%1)"
- [(set_attr "type" "load")
- (set_attr "length" "4")])
-
-(define_insn "movsi_low_st"
- [(set (mem:SI (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
- (match_operand 2 "" "")))
- (match_operand:SI 0 "gpc_reg_operand" "r"))]
- "TARGET_MACHO && ! TARGET_64BIT"
- "stw %0,lo16(%2)(%1)"
- [(set_attr "type" "store")
- (set_attr "length" "4")])
-
-(define_insn "movdi_low_st"
- [(set (mem:DI (lo_sum:DI (match_operand:DI 1 "gpc_reg_operand" "b,b")
- (match_operand 2 "" "")))
- (match_operand:DI 0 "gpc_reg_operand" "r,*!d"))]
- "TARGET_MACHO && TARGET_64BIT"
- "@
- std %0,lo16(%2)(%1)
- stfd %0,lo16(%2)(%1)"
- [(set_attr "type" "store")
- (set_attr "length" "4")])
-
;; Mach-O PIC trickery.
(define_expand "macho_high"
[(set (match_operand 0 "")
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index f526b652bc9..002e394b252 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -1085,8 +1085,7 @@
return 1;
/* Allow any integer constant. */
- if (GET_MODE_CLASS (mode) == MODE_INT
- && CONST_SCALAR_INT_P (op))
+ if (SCALAR_INT_MODE_P (mode) && CONST_SCALAR_INT_P (op))
return 1;
/* Allow easy vector constants. */
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 78042d51593..fa0f3f1e8a5 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1048,12 +1048,12 @@ BU_ALTIVEC_2 (VADDUWS, "vadduws", CONST, altivec_vadduws)
BU_ALTIVEC_2 (VADDSWS, "vaddsws", CONST, altivec_vaddsws)
BU_ALTIVEC_2 (VAND, "vand", CONST, andv4si3)
BU_ALTIVEC_2 (VANDC, "vandc", CONST, andcv4si3)
-BU_ALTIVEC_2 (VAVGUB, "vavgub", CONST, altivec_vavgub)
-BU_ALTIVEC_2 (VAVGSB, "vavgsb", CONST, altivec_vavgsb)
-BU_ALTIVEC_2 (VAVGUH, "vavguh", CONST, altivec_vavguh)
-BU_ALTIVEC_2 (VAVGSH, "vavgsh", CONST, altivec_vavgsh)
-BU_ALTIVEC_2 (VAVGUW, "vavguw", CONST, altivec_vavguw)
-BU_ALTIVEC_2 (VAVGSW, "vavgsw", CONST, altivec_vavgsw)
+BU_ALTIVEC_2 (VAVGUB, "vavgub", CONST, uavgv16qi3_ceil)
+BU_ALTIVEC_2 (VAVGSB, "vavgsb", CONST, avgv16qi3_ceil)
+BU_ALTIVEC_2 (VAVGUH, "vavguh", CONST, uavgv8hi3_ceil)
+BU_ALTIVEC_2 (VAVGSH, "vavgsh", CONST, avgv8hi3_ceil)
+BU_ALTIVEC_2 (VAVGUW, "vavguw", CONST, uavgv4si3_ceil)
+BU_ALTIVEC_2 (VAVGSW, "vavgsw", CONST, avgv4si3_ceil)
BU_ALTIVEC_2 (VCFUX, "vcfux", CONST, altivec_vcfux)
BU_ALTIVEC_2 (VCFSX, "vcfsx", CONST, altivec_vcfsx)
BU_ALTIVEC_2 (VCMPBFP, "vcmpbfp", CONST, altivec_vcmpbfp)
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index a2b74c7af43..b153043bc9d 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3895,7 +3895,10 @@ darwin_rs6000_override_options (void)
if (flag_mkernel)
{
rs6000_default_long_calls = 1;
- rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
+
+ /* Allow a kext author to do -mkernel -mhard-float. */
+ if (! (rs6000_isa_flags_explicit & OPTION_MASK_SOFT_FLOAT))
+ rs6000_isa_flags |= OPTION_MASK_SOFT_FLOAT;
}
/* Make -m64 imply -maltivec. Darwin's 64-bit ABI includes
@@ -8258,6 +8261,101 @@ address_offset (rtx op)
return NULL_RTX;
}
+/* This tests that a lo_sum {constant, symbol, symbol+offset} is valid for
+ the mode. If we can't find (or don't know) the alignment of the symbol
+ we assume (optimistically) that it's sufficiently aligned [??? maybe we
+ should be pessimistic]. Offsets are validated in the same way as for
+ reg + offset. */
+static bool
+darwin_rs6000_legitimate_lo_sum_const_p (rtx x, machine_mode mode)
+{
+ if (GET_CODE (x) == CONST)
+ x = XEXP (x, 0);
+
+ if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_MACHOPIC_OFFSET)
+ x = XVECEXP (x, 0, 0);
+
+ rtx sym = NULL_RTX;
+ unsigned HOST_WIDE_INT offset = 0;
+
+ if (GET_CODE (x) == PLUS)
+ {
+ sym = XEXP (x, 0);
+ if (! SYMBOL_REF_P (sym))
+ return false;
+ if (!CONST_INT_P (XEXP (x, 1)))
+ return false;
+ offset = INTVAL (XEXP (x, 1));
+ }
+ else if (SYMBOL_REF_P (x))
+ sym = x;
+ else if (CONST_INT_P (x))
+ offset = INTVAL (x);
+ else if (GET_CODE (x) == LABEL_REF)
+ offset = 0; // We assume code labels are Pmode aligned
+ else
+ return false; // not sure what we have here.
+
+ /* If we don't know the alignment of the thing to which the symbol refers,
+ we assume optimistically it is "enough".
+ ??? maybe we should be pessimistic instead. */
+ unsigned align = 0;
+
+ if (sym)
+ {
+ tree decl = SYMBOL_REF_DECL (sym);
+#if TARGET_MACHO
+ if (MACHO_SYMBOL_INDIRECTION_P (sym))
+ /* The decl in an indirection symbol is the original one, which might
+ be less aligned than the indirection. Our indirections are always
+ pointer-aligned. */
+ ;
+ else
+#endif
+ if (decl && DECL_ALIGN (decl))
+ align = DECL_ALIGN_UNIT (decl);
+ }
+
+ unsigned int extra = 0;
+ switch (mode)
+ {
+ case E_DFmode:
+ case E_DDmode:
+ case E_DImode:
+ /* If we are using VSX scalar loads, restrict ourselves to reg+reg
+ addressing. */
+ if (VECTOR_MEM_VSX_P (mode))
+ return false;
+
+ if (!TARGET_POWERPC64)
+ extra = 4;
+ else if ((offset & 3) || (align & 3))
+ return false;
+ break;
+
+ case E_TFmode:
+ case E_IFmode:
+ case E_KFmode:
+ case E_TDmode:
+ case E_TImode:
+ case E_PTImode:
+ extra = 8;
+ if (!TARGET_POWERPC64)
+ extra = 12;
+ else if ((offset & 3) || (align & 3))
+ return false;
+ break;
+
+ default:
+ break;
+ }
+
+ /* We only care if the access(es) would cause a change to the high part. */
+ offset = ((offset & 0xffff) ^ 0x8000) - 0x8000;
+ return IN_RANGE (offset, -(HOST_WIDE_INT_1 << 15),
+ (HOST_WIDE_INT_1 << 15) - 1 - extra);
+}
+
/* Return true if the MEM operand is a memory operand suitable for use
with a (full width, possibly multiple) gpr load/store. On
powerpc64 this means the offset must be divisible by 4.
@@ -8292,7 +8390,13 @@ mem_operand_gpr (rtx op, machine_mode mode)
&& legitimate_indirect_address_p (XEXP (addr, 0), false))
return true;
- /* Don't allow non-offsettable addresses. See PRs 83969 and 84279. */
+ /* We need to look through Mach-O PIC unspecs to determine if a lo_sum is
+ really OK. Doing this early avoids teaching all the other machinery
+ about them. */
+ if (TARGET_MACHO && GET_CODE (addr) == LO_SUM)
+ return darwin_rs6000_legitimate_lo_sum_const_p (XEXP (addr, 1), mode);
+
+ /* Only allow offsettable addresses. See PRs 83969 and 84279. */
if (!rs6000_offsettable_memref_p (op, mode, false))
return false;
@@ -21925,7 +22029,7 @@ print_operand (FILE *file, rtx x, int code)
{
const char *name = XSTR (x, 0);
#if TARGET_MACHO
- if (darwin_emit_branch_islands
+ if (darwin_symbol_stubs
&& MACHOPIC_INDIRECT
&& machopic_classify_symbol (x) == MACHOPIC_UNDEFINED_FUNCTION)
name = machopic_indirection_name (x, /*stub_p=*/true);
@@ -26038,10 +26142,14 @@ rs6000_emit_allocate_stack (HOST_WIDE_INT size, rtx copy_reg, int copy_off)
stack_limit_rtx,
GEN_INT (size)));
- emit_insn (gen_elf_high (tmp_reg, toload));
- emit_insn (gen_elf_low (tmp_reg, tmp_reg, toload));
- emit_insn (gen_cond_trap (LTU, stack_reg, tmp_reg,
- const0_rtx));
+ /* We cannot use r0 with elf_low. Lamely solve this problem by
+ moving registers around. */
+ rtx r11_reg = gen_rtx_REG (Pmode, 11);
+ emit_move_insn (tmp_reg, r11_reg);
+ emit_insn (gen_elf_high (r11_reg, toload));
+ emit_insn (gen_elf_low (r11_reg, r11_reg, toload));
+ emit_insn (gen_cond_trap (LTU, stack_reg, r11_reg, const0_rtx));
+ emit_move_insn (r11_reg, tmp_reg);
}
else
warning (0, "stack limit expression is not supported");
@@ -33674,7 +33782,7 @@ output_call (rtx_insn *insn, rtx *operands, int dest_operand_number,
int cookie_operand_number)
{
static char buf[256];
- if (darwin_emit_branch_islands
+ if (darwin_symbol_stubs
&& GET_CODE (operands[dest_operand_number]) == SYMBOL_REF
&& (INTVAL (operands[cookie_operand_number]) & CALL_LONG))
{
@@ -38134,25 +38242,31 @@ rs6000_can_inline_p (tree caller, tree callee)
tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller);
tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee);
- /* If callee has no option attributes, then it is ok to inline. */
+ /* If the callee has no option attributes, then it is ok to inline. */
if (!callee_tree)
ret = true;
- /* If caller has no option attributes, but callee does then it is not ok to
- inline. */
- else if (!caller_tree)
- ret = false;
-
else
{
- struct cl_target_option *caller_opts = TREE_TARGET_OPTION (caller_tree);
+ HOST_WIDE_INT caller_isa;
struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
+ HOST_WIDE_INT callee_isa = callee_opts->x_rs6000_isa_flags;
+ HOST_WIDE_INT explicit_isa = callee_opts->x_rs6000_isa_flags_explicit;
- /* Callee's options should a subset of the caller's, i.e. a vsx function
- can inline an altivec function but a non-vsx function can't inline a
- vsx function. */
- if ((caller_opts->x_rs6000_isa_flags & callee_opts->x_rs6000_isa_flags)
- == callee_opts->x_rs6000_isa_flags)
+ /* If the caller has option attributes, then use them.
+ Otherwise, use the command line options. */
+ if (caller_tree)
+ caller_isa = TREE_TARGET_OPTION (caller_tree)->x_rs6000_isa_flags;
+ else
+ caller_isa = rs6000_isa_flags;
+
+ /* The callee's options must be a subset of the caller's options, i.e.
+ a vsx function may inline an altivec function, but a no-vsx function
+ must not inline a vsx function. However, for those options that the
+ callee has explicitly enabled or disabled, then we must enforce that
+ the callee's and caller's options match exactly; see PR70010. */
+ if (((caller_isa & callee_isa) == callee_isa)
+ && (caller_isa & explicit_isa) == (callee_isa & explicit_isa))
ret = true;
}
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index dd68d1b4157..4dbe8e5d133 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6698,14 +6698,6 @@
;; do the load 16-bits at a time. We could do this by loading from memory,
;; and this is even supposed to be faster, but it is simpler not to get
;; integers in the TOC.
-(define_insn "movsi_low"
- [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
- (mem:SI (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b")
- (match_operand 2 "" ""))))]
- "TARGET_MACHO && ! TARGET_64BIT"
- "lwz %0,lo16(%2)(%1)"
- [(set_attr "type" "load")
- (set_attr "length" "4")])
;; MR LA LWZ LFIWZX LXSIWZX
;; STW STFIWX STXSIWX LI LIS
diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h
index 71a067e871c..b3f73c2f2bf 100644
--- a/gcc/config/sparc/sparc-protos.h
+++ b/gcc/config/sparc/sparc-protos.h
@@ -69,6 +69,7 @@ extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
extern int sparc_split_reg_reg_legitimate (rtx, rtx);
extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
+extern const char *output_load_pcrel_sym (rtx *);
extern const char *output_ubranch (rtx, rtx_insn *);
extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
extern const char *output_return (rtx_insn *);
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 10c868239e1..e435021f914 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -4203,13 +4203,6 @@ eligible_for_sibcall_delay (rtx_insn *trial)
static bool
sparc_cannot_force_const_mem (machine_mode mode, rtx x)
{
- /* After IRA has run in PIC mode, it is too late to put anything into the
- constant pool if the PIC register hasn't already been initialized. */
- if ((lra_in_progress || reload_in_progress)
- && flag_pic
- && !crtl->uses_pic_offset_table)
- return true;
-
switch (GET_CODE (x))
{
case CONST_INT:
@@ -4245,9 +4238,11 @@ sparc_cannot_force_const_mem (machine_mode mode, rtx x)
}
/* Global Offset Table support. */
-static GTY(()) rtx got_helper_rtx = NULL_RTX;
-static GTY(()) rtx got_register_rtx = NULL_RTX;
static GTY(()) rtx got_symbol_rtx = NULL_RTX;
+static GTY(()) rtx got_register_rtx = NULL_RTX;
+static GTY(()) rtx got_helper_rtx = NULL_RTX;
+
+static GTY(()) bool got_helper_needed = false;
/* Return the SYMBOL_REF for the Global Offset Table. */
@@ -4260,27 +4255,6 @@ sparc_got (void)
return got_symbol_rtx;
}
-#ifdef HAVE_GAS_HIDDEN
-# define USE_HIDDEN_LINKONCE 1
-#else
-# define USE_HIDDEN_LINKONCE 0
-#endif
-
-static void
-get_pc_thunk_name (char name[32], unsigned int regno)
-{
- const char *reg_name = reg_names[regno];
-
- /* Skip the leading '%' as that cannot be used in a
- symbol name. */
- reg_name += 1;
-
- if (USE_HIDDEN_LINKONCE)
- sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
- else
- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
-}
-
/* Wrapper around the load_pcrel_sym{si,di} patterns. */
static rtx
@@ -4300,30 +4274,78 @@ gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2)
return insn;
}
+/* Output the load_pcrel_sym{si,di} patterns. */
+
+const char *
+output_load_pcrel_sym (rtx *operands)
+{
+ if (flag_delayed_branch)
+ {
+ output_asm_insn ("sethi\t%%hi(%a1-4), %0", operands);
+ output_asm_insn ("call\t%a2", operands);
+ output_asm_insn (" add\t%0, %%lo(%a1+4), %0", operands);
+ }
+ else
+ {
+ output_asm_insn ("sethi\t%%hi(%a1-8), %0", operands);
+ output_asm_insn ("add\t%0, %%lo(%a1-4), %0", operands);
+ output_asm_insn ("call\t%a2", operands);
+ output_asm_insn (" nop", NULL);
+ }
+
+ if (operands[2] == got_helper_rtx)
+ got_helper_needed = true;
+
+ return "";
+}
+
+#ifdef HAVE_GAS_HIDDEN
+# define USE_HIDDEN_LINKONCE 1
+#else
+# define USE_HIDDEN_LINKONCE 0
+#endif
+
/* Emit code to load the GOT register. */
void
load_got_register (void)
{
- if (!got_register_rtx)
- got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
+ rtx insn;
if (TARGET_VXWORKS_RTP)
- emit_insn (gen_vxworks_load_got ());
+ {
+ if (!got_register_rtx)
+ got_register_rtx = pic_offset_table_rtx;
+
+ insn = gen_vxworks_load_got ();
+ }
else
{
+ if (!got_register_rtx)
+ got_register_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
+
/* The GOT symbol is subject to a PC-relative relocation so we need a
helper function to add the PC value and thus get the final value. */
if (!got_helper_rtx)
{
char name[32];
- get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
+
+ /* Skip the leading '%' as that cannot be used in a symbol name. */
+ if (USE_HIDDEN_LINKONCE)
+ sprintf (name, "__sparc_get_pc_thunk.%s",
+ reg_names[REGNO (got_register_rtx)] + 1);
+ else
+ ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC",
+ REGNO (got_register_rtx));
+
got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
}
- emit_insn (gen_load_pcrel_sym (got_register_rtx, sparc_got (),
- got_helper_rtx));
+ insn
+ = gen_load_pcrel_sym (got_register_rtx, sparc_got (), got_helper_rtx);
}
+
+ emit_insn (insn);
}
/* Ensure that we are not using patterns that are not OK with PIC. */
@@ -5475,7 +5497,7 @@ save_local_or_in_reg_p (unsigned int regno, int leaf_function)
return true;
/* GOT register (%l7) if needed. */
- if (regno == GLOBAL_OFFSET_TABLE_REGNUM && got_register_rtx)
+ if (got_register_rtx && regno == REGNO (got_register_rtx))
return true;
/* If the function accesses prior frames, the frame pointer and the return
@@ -12456,10 +12478,9 @@ static void
sparc_file_end (void)
{
/* If we need to emit the special GOT helper function, do so now. */
- if (got_helper_rtx)
+ if (got_helper_needed)
{
const char *name = XSTR (got_helper_rtx, 0);
- const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
#ifdef DWARF2_UNWIND_INFO
bool do_cfi;
#endif
@@ -12496,17 +12517,22 @@ sparc_file_end (void)
#ifdef DWARF2_UNWIND_INFO
do_cfi = dwarf2out_do_cfi_asm ();
if (do_cfi)
- fprintf (asm_out_file, "\t.cfi_startproc\n");
+ output_asm_insn (".cfi_startproc", NULL);
#endif
if (flag_delayed_branch)
- fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
- reg_name, reg_name);
+ {
+ output_asm_insn ("jmp\t%%o7+8", NULL);
+ output_asm_insn (" add\t%%o7, %0, %0", &got_register_rtx);
+ }
else
- fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
- reg_name, reg_name);
+ {
+ output_asm_insn ("add\t%%o7, %0, %0", &got_register_rtx);
+ output_asm_insn ("jmp\t%%o7+8", NULL);
+ output_asm_insn (" nop", NULL);
+ }
#ifdef DWARF2_UNWIND_INFO
if (do_cfi)
- fprintf (asm_out_file, "\t.cfi_endproc\n");
+ output_asm_insn (".cfi_endproc", NULL);
#endif
}
@@ -13012,7 +13038,10 @@ sparc_init_pic_reg (void)
edge entry_edge;
rtx_insn *seq;
- if (!crtl->uses_pic_offset_table)
+ /* In PIC mode, we need to always initialize the PIC register if optimization
+ is enabled, because we are called from IRA and LRA may later force things
+ to the constant pool for optimization purposes. */
+ if (!flag_pic || (!crtl->uses_pic_offset_table && !optimize))
return;
start_sequence ();
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 25134bd1148..468e2cc5d3b 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -1601,10 +1601,7 @@
(clobber (reg:P O7_REG))]
"REGNO (operands[0]) == INTVAL (operands[3])"
{
- if (flag_delayed_branch)
- return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
- else
- return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
+ return output_load_pcrel_sym (operands);
}
[(set (attr "type") (const_string "multi"))
(set (attr "length")
diff --git a/gcc/configure b/gcc/configure
index 6d2f088c266..7313088fc2c 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -666,6 +666,7 @@ build_exeext
all_selected_languages
all_languages
all_lang_makefrags
+all_lang_configurefrags
all_gtfiles
all_compilers
srcdir
@@ -18448,7 +18449,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18451 "configure"
+#line 18452 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -18554,7 +18555,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 18557 "configure"
+#line 18558 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -29512,7 +29513,8 @@ lang_tree_files=
all_languages=
all_compilers=
all_outputs='Makefile'
-# List of language makefile fragments.
+# List of language configure and makefile fragments.
+all_lang_configurefrags=
all_lang_makefrags=
# Additional files for gengtype
all_gtfiles="$target_gtfiles"
@@ -29598,6 +29600,7 @@ do
esac
$ok || continue
+ all_lang_configurefrags="$all_lang_configurefrags \$(srcdir)/$gcc_subdir/config-lang.in"
all_lang_makefrags="$all_lang_makefrags \$(srcdir)/$gcc_subdir/Make-lang.in"
if test -f $srcdir/$gcc_subdir/lang.opt; then
lang_opt_files="$lang_opt_files $srcdir/$gcc_subdir/lang.opt"
@@ -29760,6 +29763,7 @@ fi
+
# Echo link setup.
if test x${build} = x${host} ; then
if test x${host} = x${target} ; then
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 2d5e9aca63a..9bed32ad43f 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -6139,7 +6139,8 @@ lang_tree_files=
all_languages=
all_compilers=
all_outputs='Makefile'
-# List of language makefile fragments.
+# List of language configure and makefile fragments.
+all_lang_configurefrags=
all_lang_makefrags=
# Additional files for gengtype
all_gtfiles="$target_gtfiles"
@@ -6227,6 +6228,7 @@ changequote([,])dnl
esac
$ok || continue
+ all_lang_configurefrags="$all_lang_configurefrags \$(srcdir)/$gcc_subdir/config-lang.in"
all_lang_makefrags="$all_lang_makefrags \$(srcdir)/$gcc_subdir/Make-lang.in"
if test -f $srcdir/$gcc_subdir/lang.opt; then
lang_opt_files="$lang_opt_files $srcdir/$gcc_subdir/lang.opt"
@@ -6328,6 +6330,7 @@ AC_SUBST(subdirs)
AC_SUBST(srcdir)
AC_SUBST(all_compilers)
AC_SUBST(all_gtfiles)
+AC_SUBST(all_lang_configurefrags)
AC_SUBST(all_lang_makefrags)
AC_SUBST(all_languages)
AC_SUBST(all_selected_languages)
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 5a1c4c5765b..a506c71e34b 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,39 @@
+2019-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2019-10-22 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/85887
+ * decl.c (expand_static_init): Drop ECF_LEAF from __cxa_guard_acquire
+ and __cxa_guard_release.
+
+ 2019-10-29 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/92201
+ * cp-gimplify.c (cp_gimplify_expr): If gimplify_to_rvalue changes the
+ function pointer type, re-add cast to the original one.
+
+ 2019-10-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/91974
+ * cp-gimplify.c (cp_gimplify_expr) <case CALL_EXPR>: For
+ -fstrong-eval-order ensure CALL_EXPR_FN side-effects are evaluated
+ before any arguments. Additionally, ensure CALL_EXPR_FN that isn't
+ invariant nor OBJ_TYPE_REF nor SSA_NAME is forced into a temporary.
+
+ 2019-08-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/91401
+ * parser.c (cp_parser_omp_clause_dist_schedule): Comment out the
+ check_no_duplicate_clause call, instead emit a warning for duplicate
+ dist_schedule clauses.
+
+2019-11-05 Jason Merrill <jason@redhat.com>
+
+ PR c++/88075
+ * parser.c (cp_parser_decl_specifier_seq): Support C++20
+ concept-definition syntax without 'bool'.
+
2019-10-22 Marek Polacek <polacek@redhat.com>
Backported from mainline
diff --git a/gcc/cp/cp-gimplify.c b/gcc/cp/cp-gimplify.c
index 564a0d38d95..dc946b9c682 100644
--- a/gcc/cp/cp-gimplify.c
+++ b/gcc/cp/cp-gimplify.c
@@ -775,6 +775,27 @@ cp_gimplify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p)
case CALL_EXPR:
ret = GS_OK;
+ if (flag_strong_eval_order == 2
+ && CALL_EXPR_FN (*expr_p)
+ && cp_get_callee_fndecl_nofold (*expr_p) == NULL_TREE)
+ {
+ tree fnptrtype = TREE_TYPE (CALL_EXPR_FN (*expr_p));
+ enum gimplify_status t
+ = gimplify_expr (&CALL_EXPR_FN (*expr_p), pre_p, NULL,
+ is_gimple_call_addr, fb_rvalue);
+ if (t == GS_ERROR)
+ ret = GS_ERROR;
+ else if (is_gimple_variable (CALL_EXPR_FN (*expr_p))
+ && TREE_CODE (CALL_EXPR_FN (*expr_p)) != SSA_NAME)
+ CALL_EXPR_FN (*expr_p)
+ = get_initialized_tmp_var (CALL_EXPR_FN (*expr_p), pre_p,
+ NULL);
+ /* GIMPLE considers most pointer conversion useless, but for
+ calls we actually care about the exact function pointer type. */
+ if (t != GS_ERROR && TREE_TYPE (CALL_EXPR_FN (*expr_p)) != fnptrtype)
+ CALL_EXPR_FN (*expr_p)
+ = build1 (NOP_EXPR, fnptrtype, CALL_EXPR_FN (*expr_p));
+ }
if (!CALL_EXPR_FN (*expr_p))
/* Internal function call. */;
else if (CALL_EXPR_REVERSE_ARGS (*expr_p))
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 211b113a0c9..1d363d8a0be 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -8347,14 +8347,14 @@ expand_static_init (tree decl, tree init)
(acquire_name, build_function_type_list (integer_type_node,
TREE_TYPE (guard_addr),
NULL_TREE),
- NULL_TREE, ECF_NOTHROW | ECF_LEAF);
+ NULL_TREE, ECF_NOTHROW);
if (!release_fn || !abort_fn)
vfntype = build_function_type_list (void_type_node,
TREE_TYPE (guard_addr),
NULL_TREE);
if (!release_fn)
release_fn = push_library_fn (release_name, vfntype, NULL_TREE,
- ECF_NOTHROW | ECF_LEAF);
+ ECF_NOTHROW);
if (!abort_fn)
abort_fn = push_library_fn (abort_name, vfntype, NULL_TREE,
ECF_NOTHROW | ECF_LEAF);
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 5193c36dc85..d17a212a18f 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -13552,6 +13552,15 @@ cp_parser_decl_specifier_seq (cp_parser* parser,
case RID_CONCEPT:
ds = ds_concept;
cp_lexer_consume_token (parser->lexer);
+ /* In C++20 a concept definition is just 'concept name = expr;'
+ Support that syntax by pretending we've seen 'bool'. */
+ if (cp_lexer_next_token_is (parser->lexer, CPP_NAME)
+ && cp_lexer_nth_token_is (parser->lexer, 2, CPP_EQ))
+ {
+ cp_parser_set_decl_spec_type (decl_specs, boolean_type_node,
+ token, /*type_definition*/false);
+ decl_specs->any_type_specifiers_p = true;
+ }
break;
/* function-specifier:
@@ -33653,8 +33662,10 @@ cp_parser_omp_clause_dist_schedule (cp_parser *parser, tree list,
else if (!cp_parser_require (parser, CPP_CLOSE_PAREN, RT_COMMA_CLOSE_PAREN))
goto resync_fail;
- check_no_duplicate_clause (list, OMP_CLAUSE_DIST_SCHEDULE, "dist_schedule",
- location);
+ /* check_no_duplicate_clause (list, OMP_CLAUSE_DIST_SCHEDULE,
+ "dist_schedule", location); */
+ if (omp_find_clause (list, OMP_CLAUSE_DIST_SCHEDULE))
+ warning_at (location, 0, "too many %qs clauses", "dist_schedule");
OMP_CLAUSE_CHAIN (c) = list;
return c;
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index de86d7a1e01..c63f5611afb 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -7373,7 +7373,7 @@ consumers are not expected to support this extended format, and they
would be rendered unable to decode location lists using it.
@item -ginternal-reset-location-views
-@itemx -gnointernal-reset-location-views
+@itemx -gno-internal-reset-location-views
@opindex ginternal-reset-location-views
@opindex gno-internal-reset-location-views
Attempt to determine location views that can be omitted from location
diff --git a/gcc/expmed.c b/gcc/expmed.c
index cee0d6ae630..114f108cb74 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -838,6 +838,27 @@ store_bit_field_1 (rtx str_rtx, poly_uint64 bitsize, poly_uint64 bitnum,
if (MEM_P (op0))
op0 = adjust_bitfield_address_size (op0, op0_mode.else_blk (),
0, MEM_SIZE (op0));
+ else if (!op0_mode.exists ())
+ {
+ if (ibitnum == 0
+ && known_eq (ibitsize, GET_MODE_BITSIZE (GET_MODE (op0)))
+ && MEM_P (value)
+ && !reverse)
+ {
+ value = adjust_address (value, GET_MODE (op0), 0);
+ emit_move_insn (op0, value);
+ return true;
+ }
+ if (!fallback_p)
+ return false;
+ rtx temp = assign_stack_temp (GET_MODE (op0),
+ GET_MODE_SIZE (GET_MODE (op0)));
+ emit_move_insn (temp, op0);
+ store_bit_field_1 (temp, bitsize, bitnum, 0, 0, fieldmode, value,
+ reverse, fallback_p);
+ emit_move_insn (op0, temp);
+ return true;
+ }
else
op0 = gen_lowpart (op0_mode.require (), op0);
}
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index f7ddfdd6377..1345536fd5b 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,23 @@
+2019-11-10 Thomas Koenig <tkoenig@gcc.gnu.org>
+
+ Backport from trunk
+ PR fortran/92113
+ * trans-decl.c (gfc_get_symbol_decl): If __def_init actually
+ contains a value, put it into the read-only section.
+
+2019-10-27 Paul Thomas <pault@gcc.gnu.org>
+
+ Backport from mainline
+ PR fortran/86248
+ * resolve.c (flag_fn_result_spec): Correct a typo before the
+ function declaration.
+ * trans-decl.c (gfc_sym_identifier): Boost the length of 'name'
+ to allow for all variants. Simplify the code by using a pointer
+ to the symbol's proc_name and taking the return out of each of
+ the conditional branches. Allow symbols with fn_result_spec set
+ that do not come from a procedure namespace and have a module
+ name to go through the non-fn_result_spec branch.
+
2019-10-18 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/69455
diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 3aad0bfa79b..8afc72350c1 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -7256,6 +7256,10 @@ gfc_expr_to_initialize (gfc_expr *e)
for (ref = result->ref; ref; ref = ref->next)
if (ref->type == REF_ARRAY && ref->next == NULL)
{
+ if (ref->u.ar.dimen == 0
+ && ref->u.ar.as && ref->u.ar.as->corank)
+ return result;
+
ref->u.ar.type = AR_FULL;
for (i = 0; i < ref->u.ar.dimen; i++)
@@ -16351,8 +16355,8 @@ resolve_equivalence (gfc_equiv *eq)
}
-/* Function called by resolve_fntype to flag other symbol used in the
- length type parameter specification of function resuls. */
+/* Function called by resolve_fntype to flag other symbols used in the
+ length type parameter specification of function results. */
static bool
flag_fn_result_spec (gfc_expr *expr,
diff --git a/gcc/fortran/trans-decl.c b/gcc/fortran/trans-decl.c
index 4e778be34c5..1e46b627f8f 100644
--- a/gcc/fortran/trans-decl.c
+++ b/gcc/fortran/trans-decl.c
@@ -366,44 +366,37 @@ gfc_sym_identifier (gfc_symbol * sym)
static const char *
mangled_identifier (gfc_symbol *sym)
{
- static char name[GFC_MAX_MANGLED_SYMBOL_LEN + 1];
+ gfc_symbol *proc = sym->ns->proc_name;
+ static char name[3*GFC_MAX_MANGLED_SYMBOL_LEN + 14];
/* Prevent the mangling of identifiers that have an assigned
binding label (mainly those that are bind(c)). */
if (sym->attr.is_bind_c == 1 && sym->binding_label)
return sym->binding_label;
- if (!sym->fn_result_spec)
+ if (!sym->fn_result_spec
+ || (sym->module && !(proc && proc->attr.flavor == FL_PROCEDURE)))
{
if (sym->module == NULL)
return sym_identifier (sym);
else
- {
- snprintf (name, sizeof name, "__%s_MOD_%s", sym->module, sym->name);
- return name;
- }
+ snprintf (name, sizeof name, "__%s_MOD_%s", sym->module, sym->name);
}
else
{
/* This is an entity that is actually local to a module procedure
that appears in the result specification expression. Since
sym->module will be a zero length string, we use ns->proc_name
- instead. */
- if (sym->ns->proc_name && sym->ns->proc_name->module)
- {
- snprintf (name, sizeof name, "__%s_MOD__%s_PROC_%s",
- sym->ns->proc_name->module,
- sym->ns->proc_name->name,
- sym->name);
- return name;
- }
+ to provide the module name instead. */
+ if (proc && proc->module)
+ snprintf (name, sizeof name, "__%s_MOD__%s_PROC_%s",
+ proc->module, proc->name, sym->name);
else
- {
- snprintf (name, sizeof name, "__%s_PROC_%s",
- sym->ns->proc_name->name, sym->name);
- return name;
- }
+ snprintf (name, sizeof name, "__%s_PROC_%s",
+ proc->name, sym->name);
}
+
+ return name;
}
/* Get mangled identifier, adding the symbol to the global table if
@@ -1892,9 +1885,18 @@ gfc_get_symbol_decl (gfc_symbol * sym)
if (sym->attr.associate_var)
GFC_DECL_ASSOCIATE_VAR_P (decl) = 1;
- if (sym->attr.vtab
- || (sym->name[0] == '_' && strncmp ("__def_init", sym->name, 10) == 0))
- DECL_ARTIFICIAL (decl) = 1;
+ /* We only mark __def_init as read-only if it actually has an
+ initializer so it does not needlessly take up space in the
+ read-only section and can go into the BSS instead, see PR 84487.
+ Marking this as artificial means that OpenMP will treat this as
+ predetermined shared. */
+
+ if (sym->attr.vtab || strncmp ("__def_init", sym->name, 10) == 0)
+ {
+ DECL_ARTIFICIAL (decl) = 1;
+ if (sym->attr.vtab || sym->value)
+ TREE_READONLY (decl) = 1;
+ }
return decl;
}
diff --git a/gcc/function.c b/gcc/function.c
index d81e8b1ba8a..ebc7eda1604 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -2477,8 +2477,7 @@ assign_parm_find_data_types (struct assign_parm_data_all *all, tree parm,
/* If the parm is to be passed as a transparent union or record, use the
type of the first field for the tests below. We have already verified
that the modes are the same. */
- if ((TREE_CODE (passed_type) == UNION_TYPE
- || TREE_CODE (passed_type) == RECORD_TYPE)
+ if (RECORD_OR_UNION_TYPE_P (passed_type)
&& TYPE_TRANSPARENT_AGGR (passed_type))
passed_type = TREE_TYPE (first_field (passed_type));
@@ -3098,7 +3097,7 @@ assign_parm_setup_block (struct assign_parm_data_all *all,
move_block_from_reg (REGNO (entry_parm), mem,
size_stored / UNITS_PER_WORD);
}
- else if (data->stack_parm == 0)
+ else if (data->stack_parm == 0 && !TYPE_EMPTY_P (data->passed_type))
{
push_to_sequence2 (all->first_conversion_insn, all->last_conversion_insn);
emit_block_move (stack_parm, data->entry_parm, GEN_INT (size),
@@ -3474,7 +3473,9 @@ assign_parm_setup_stack (struct assign_parm_data_all *all, tree parm,
dest = validize_mem (copy_rtx (data->stack_parm));
src = validize_mem (copy_rtx (data->entry_parm));
- if (MEM_P (src))
+ if (TYPE_EMPTY_P (data->passed_type))
+ /* Empty types don't really need to be copied. */;
+ else if (MEM_P (src))
{
/* Use a block move to handle potentially misaligned entry_parm. */
if (!to_conversion)
@@ -3749,6 +3750,16 @@ assign_parms (tree fndecl)
{
assign_parm_find_stack_rtl (parm, &data);
assign_parm_adjust_entry_rtl (&data);
+ /* For arguments that occupy no space in the parameter
+ passing area, have non-zero size and have address taken,
+ force creation of a stack slot so that they have distinct
+ address from other parameters. */
+ if (TYPE_EMPTY_P (data.passed_type)
+ && TREE_ADDRESSABLE (parm)
+ && data.entry_parm == data.stack_parm
+ && MEM_P (data.entry_parm)
+ && int_size_in_bytes (data.passed_type))
+ data.stack_parm = NULL_RTX;
}
if (!POINTER_BOUNDS_TYPE_P (data.passed_type))
{
diff --git a/gcc/gimplify.c b/gcc/gimplify.c
index fcb50c8e047..3bfd0692103 100644
--- a/gcc/gimplify.c
+++ b/gcc/gimplify.c
@@ -8181,8 +8181,8 @@ gimplify_scan_omp_clauses (tree *list_p, gimple_seq *pre_p,
break;
if (scp)
continue;
- gcc_assert (offset == NULL_TREE
- || poly_int_tree_p (offset));
+ gcc_assert (offset2 == NULL_TREE
+ || poly_int_tree_p (offset2));
tree d1 = OMP_CLAUSE_DECL (*sc);
tree d2 = OMP_CLAUSE_DECL (c);
while (TREE_CODE (d1) == ARRAY_REF)
diff --git a/gcc/internal-fn.c b/gcc/internal-fn.c
index da205c9d68a..3b95cb6d258 100644
--- a/gcc/internal-fn.c
+++ b/gcc/internal-fn.c
@@ -1385,7 +1385,7 @@ expand_mul_overflow (location_t loc, tree lhs, tree arg0, tree arg1,
/* s1 * s2 -> ur */
if (!uns0_p && !uns1_p && unsr_p)
{
- rtx tem, tem2;
+ rtx tem;
switch (pos_neg0 | pos_neg1)
{
case 1: /* Both operands known to be non-negative. */
@@ -1415,10 +1415,8 @@ expand_mul_overflow (location_t loc, tree lhs, tree arg0, tree arg1,
ops.op2 = NULL_TREE;
ops.location = loc;
res = expand_expr_real_2 (&ops, NULL_RTX, mode, EXPAND_NORMAL);
- tem = expand_binop (mode, and_optab, op0, op1, NULL_RTX, false,
- OPTAB_LIB_WIDEN);
- do_compare_rtx_and_jump (tem, const0_rtx, EQ, true, mode,
- NULL_RTX, NULL, done_label,
+ do_compare_rtx_and_jump (pos_neg0 == 1 ? op0 : op1, const0_rtx, EQ,
+ true, mode, NULL_RTX, NULL, done_label,
profile_probability::very_likely ());
goto do_error_label;
}
@@ -1449,16 +1447,23 @@ expand_mul_overflow (location_t loc, tree lhs, tree arg0, tree arg1,
arg1 = error_mark_node;
emit_jump (do_main_label);
emit_label (after_negate_label);
- tem2 = expand_binop (mode, xor_optab, op0, op1, NULL_RTX, false,
- OPTAB_LIB_WIDEN);
- do_compare_rtx_and_jump (tem2, const0_rtx, GE, false, mode, NULL_RTX,
- NULL, do_main_label, profile_probability::very_likely ());
+ tem = expand_binop (mode, xor_optab, op0, op1, NULL_RTX, false,
+ OPTAB_LIB_WIDEN);
+ do_compare_rtx_and_jump (tem, const0_rtx, GE, false, mode, NULL_RTX,
+ NULL, do_main_label,
+ profile_probability::very_likely ());
/* One argument is negative here, the other positive. This
overflows always, unless one of the arguments is 0. But
if e.g. s2 is 0, (U) s1 * 0 doesn't overflow, whatever s1
is, thus we can keep do_main code oring in overflow as is. */
- do_compare_rtx_and_jump (tem, const0_rtx, EQ, true, mode, NULL_RTX,
- NULL, do_main_label, profile_probability::very_likely ());
+ if (pos_neg0 != 2)
+ do_compare_rtx_and_jump (op0, const0_rtx, EQ, true, mode, NULL_RTX,
+ NULL, do_main_label,
+ profile_probability::very_unlikely ());
+ if (pos_neg1 != 2)
+ do_compare_rtx_and_jump (op1, const0_rtx, EQ, true, mode, NULL_RTX,
+ NULL, do_main_label,
+ profile_probability::very_unlikely ());
expand_arith_set_overflow (lhs, target);
emit_label (do_main_label);
goto do_main;
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 575ffad1573..1e98df48132 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -1774,14 +1774,24 @@ uses_hard_regs_p (rtx x, HARD_REG_SET set)
return false;
code = GET_CODE (x);
mode = GET_MODE (x);
+
if (code == SUBREG)
{
+ /* For all SUBREGs we want to check whether the full multi-register
+ overlaps the set. For normal SUBREGs this means 'get_hard_regno' of
+ the inner register, for paradoxical SUBREGs this means the
+ 'get_hard_regno' of the full SUBREG and for complete SUBREGs either is
+ fine. Use the wider mode for all cases. */
+ rtx subreg = SUBREG_REG (x);
mode = wider_subreg_mode (x);
- x = SUBREG_REG (x);
- code = GET_CODE (x);
+ if (mode == GET_MODE (subreg))
+ {
+ x = subreg;
+ code = GET_CODE (x);
+ }
}
- if (REG_P (x))
+ if (REG_P (x) || SUBREG_P (x))
{
x_hard_regno = get_hard_regno (x, true);
return (x_hard_regno >= 0
diff --git a/gcc/optabs.c b/gcc/optabs.c
index b31016c05eb..a74d7be0d09 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -5778,6 +5778,25 @@ expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
icode = get_vcond_icode (mode, cmp_op_mode, unsignedp);
if (icode == CODE_FOR_nothing)
{
+ if (tcode == LT_EXPR
+ && op0a == op0
+ && TREE_CODE (op0) == VECTOR_CST)
+ {
+ /* A VEC_COND_EXPR condition could be folded from EQ_EXPR/NE_EXPR
+ into a constant when only get_vcond_eq_icode is supported.
+ Verify < 0 and != 0 behave the same and change it to NE_EXPR. */
+ unsigned HOST_WIDE_INT nelts;
+ if (!VECTOR_CST_NELTS (op0).is_constant (&nelts))
+ {
+ if (VECTOR_CST_STEPPED_P (op0))
+ return 0;
+ nelts = vector_cst_encoded_nelts (op0);
+ }
+ for (unsigned int i = 0; i < nelts; ++i)
+ if (tree_int_cst_sgn (vector_cst_elt (op0, i)) == 1)
+ return 0;
+ tcode = NE_EXPR;
+ }
if (tcode == EQ_EXPR || tcode == NE_EXPR)
icode = get_vcond_eq_icode (mode, cmp_op_mode);
if (icode == CODE_FOR_nothing)
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 233bef2100b..d50680c8af9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,247 @@
+2019-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/91355
+ * g++.dg/torture/pr91355.C: New test.
+
+ Backported from mainline
+ 2019-11-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/90840
+ * gcc.c-torture/compile/pr90840.c: New test.
+
+ PR target/90867
+ * gcc.target/i386/pr90867.c: New test.
+
+ PR c/90898
+ * gcc.dg/pr90898.c: New test.
+
+ 2019-11-19 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/91450
+ * gcc.c-torture/execute/pr91450-1.c: New test.
+ * gcc.c-torture/execute/pr91450-2.c: New test.
+
+ 2019-11-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/92384
+ * g++.dg/torture/pr92384.C: New test.
+
+ 2019-10-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR preprocessor/92296
+ * c-c++-common/cpp/pr92296-1.c: New test.
+ * c-c++-common/cpp/pr92296-2.c: New test.
+
+ 2019-10-29 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/92201
+ * g++.dg/other/pr92201.C: New test.
+
+ 2019-10-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/92056
+ * gcc.c-torture/compile/pr92056.c: New test.
+
+ 2019-10-04 Jakub Jelinek <jakub@redhat.com>
+
+ PR c++/91974
+ * g++.dg/cpp1z/eval-order5.C: New test.
+
+ 2019-09-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/91665
+ * gcc.dg/vect/pr91665.c: New test.
+
+ 2019-09-05 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/91001
+ PR middle-end/91105
+ PR middle-end/91106
+ * gcc.c-torture/compile/pr91001.c: New test.
+
+ 2019-09-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/91623
+ * gcc.target/i386/pr91623.c: New test.
+
+ 2019-08-09 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/91401
+ * c-c++-common/gomp/pr91401-1.c: New test.
+ * c-c++-common/gomp/pr91401-2.c: New test.
+
+2019-11-20 Peter Bergner <bergner@linux.ibm.com>
+
+ Backport from mainline
+ 2019-11-13 David Edelsohn <dje.gcc@gmail.com>
+
+ * gcc.target/powerpc/pr92090.c: Limit -mbig to powerpc64le-*-*.
+ * gcc.target/powerpc/pr92090-2.c: Likewise.
+
+ 2019-11-07 Peter Bergner <bergner@linux.ibm.com>
+
+ PR other/92090
+ * gcc.target/powerpc/pr92090-2.c: New test.
+
+ 2019-11-07 Peter Bergner <bergner@linux.ibm.com>
+
+ PR other/92090
+ * gcc.target/powerpc/pr92090.c: New test.
+
+2019-11-08 Eric Botcazou <ebotcazou@adacore.com>
+
+ * gcc.c-torture/compile/20191108-1.c: New test.
+ * gcc.target/sparc/overflow-1.c: Add -fno-pie to the options.
+ * gcc.target/sparc/overflow-2.c: Likewise.
+ * gcc.target/sparc/overflow-3.c: Likewise.
+ * gcc.target/sparc/overflow-4.c: Likewise.
+ * gcc.target/sparc/overflow-5.c: Likewise.
+
+2019-11-05 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline.
+ 2019-06-20 Iain Sandoe <iain@sandoe.co.uk>
+
+ * obj-c++.dg/stubify-1.mm: Adjust options and scan-asm checks.
+ * obj-c++.dg/stubify-2.mm: Likewise.
+ * objc.dg/stubify-1.m: Likewise.
+ * objc.dg/stubify-2.m: Likewise.
+
+2019-11-03 Iain Sandoe <iain@sandoe.co.uk>
+
+ PR c++/79274
+ * g++.dg/tls/pr77285-2.C: XFAIL test for Darwin.
+
+2019-11-02 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline
+ 2019-06-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ * gcc.dg/pr90760.c: Require alias support.
+
+2019-11-01 Delia Burduv <Delia.Burduv@arm.com>
+
+ Backport from trunk
+ 2019-02-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
+
+ PR target/86487
+ * gcc.target/arm/pr86487.c: New.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline.
+ 2019-10-22 Iain Sandoe <iain@sandoe.co.uk>
+
+ * gcc.dg/Wnonnull.c: Provide prototypes for strlen and memcpy.
+ Use __SIZE_TYPE__ instead of size_t.
+
+ Backport from mainline.
+ 2019-10-19 Iain Sandoe <iain@sandoe.co.uk>
+
+ * gcc.dg/Wnonnull.c: Add attributed function declarations for
+ memcpy and strlen for Darwin.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline.
+ 2019-10-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ * gcc.target/i386/indirect-thunk-1.c: Allow 'l' or 'L' in
+ indirection label prefix, for Darwin.
+ * gcc.target/i386/indirect-thunk-2.c: Likewise.
+ * gcc.target/i386/indirect-thunk-3.c: Likewise.
+ * gcc.target/i386/indirect-thunk-4.c: Likewise.
+ * gcc.target/i386/indirect-thunk-attr-1.c: Likewise.
+ * gcc.target/i386/indirect-thunk-attr-2.c: Likewise.
+ * gcc.target/i386/indirect-thunk-attr-3.c: Likewise.
+ * gcc.target/i386/indirect-thunk-attr-4.c: Likewise.
+ * gcc.target/i386/indirect-thunk-attr-5.c: Likewise.
+ * gcc.target/i386/indirect-thunk-attr-6.c: Likewise.
+ * gcc.target/i386/indirect-thunk-extern-1.c: Likewise.
+ * gcc.target/i386/indirect-thunk-extern-2.c: Likewise.
+ * gcc.target/i386/indirect-thunk-extern-3.c: Likewise.
+ * gcc.target/i386/indirect-thunk-extern-4.c: Likewise.
+ * gcc.target/i386/indirect-thunk-inline-1.c: Likewise.
+ * gcc.target/i386/indirect-thunk-inline-2.c: Likewise.
+ * gcc.target/i386/indirect-thunk-inline-3.c: Likewise.
+ * gcc.target/i386/indirect-thunk-inline-4.c: Likewise.
+ * gcc.target/i386/pr32219-2.c: Likewise.
+ * gcc.target/i386/pr32219-3.c: Likewise.
+ * gcc.target/i386/pr32219-4.c: Likewise.
+ * gcc.target/i386/pr32219-7.c: Likewise.
+ * gcc.target/i386/pr32219-8.c: Likewise.
+ * gcc.target/i386/ret-thunk-14.c: Likewise.
+ * gcc.target/i386/ret-thunk-15.c: Likewise.
+ * gcc.target/i386/ret-thunk-9.c: Likewise.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline.
+ 2019-08-13 Iain Sandoe <iain@sandoe.co.uk>
+
+ * obj-c++.dg/stubify-1.mm: Rename symbol stub option.
+ * obj-c++.dg/stubify-2.mm: Likewise.
+ * objc.dg/stubify-1.m: Likewise.
+ * objc.dg/stubify-2.m: Likewise.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline.
+ 2019-05-15 Iain Sandoe <iain@sandoe.co.uk>
+
+ * lib/target-supports.exp
+ (check_effective_target_powerpc_p8vector_ok): No support for Darwin.
+ (check_effective_target_powerpc_p9vector_ok): Likewise.
+ (check_effective_target_powerpc_float128_sw_ok): Likewise.
+ (check_effective_target_powerpc_float128_hw_ok): Likewise.
+ (check_effective_target_powerpc_vsx_ok): Likewise.
+ * gcc.target/powerpc/bfp/bfp.exp: Don't try to run this for Darwin.
+ * gcc.target/powerpc/dfp/dfp.exp: Likewise.
+
+2019-10-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
+
+ Backport from mainline
+ 2019-07-09 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
+
+ * gcc.target/mips/cfgcleanup-jalr1.c: New test.
+ * gcc.target/mips/cfgcleanup-jalr2.c: New test.
+ * gcc.target/mips/cfgcleanup-jalr3.c: New test.
+
+2019-10-28 Iain Sandoe <iain@sandoe.co.uk>
+
+ * gcc.c-torture/compile/pr72802.c: Skip for Darwin.
+
+2019-10-28 Jiufu Guo <guojiufu@linux.ibm.com>
+
+ Backport from mainline
+ PR target/70010
+ * gcc.target/powerpc/pr70010.c: Add -Wno-psabi and -mvsx.
+
+2019-10-28 Peter Bergner <bergner@linux.ibm.com>
+ Jiufu Guo <guojiufu@linux.ibm.com>
+
+ PR target/70010
+ * gcc.target/powerpc/pr70010.c: New test.
+ * gcc.target/powerpc/pr70010-1.c: New test.
+ * gcc.target/powerpc/pr70010-3.c: New test.
+ * gcc.target/powerpc/pr70010-4.c: New test.
+
+2019-10-27 Paul Thomas <pault@gcc.gnu.org>
+
+ Backport from mainline
+ PR fortran/86248
+ * gfortran.dg/char_result_19.f90 : New test.
+ * gfortran.dg/char_result_mod_19.f90 : Module for the new test.
+
+2019-10-25 Richard Earnshaw <rearnsha@arm.com>
+
+ Backport from mainline
+ 2019-05-08 Mihail Ionescu <mihail.ionescu@arm.com>
+ Richard Earnshaw <rearnsha@arm.com>
+ PR target/88167
+ * gcc.target/arm/pr88167-1.c: New test.
+ * gcc.target/arm/pr88167-2.c: New test.
+
2019-10-23 Richard Biener <rguenther@suse.de>
Backport from mainline
diff --git a/gcc/testsuite/c-c++-common/cpp/pr92296-1.c b/gcc/testsuite/c-c++-common/cpp/pr92296-1.c
new file mode 100644
index 00000000000..4bd69c8be87
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cpp/pr92296-1.c
@@ -0,0 +1,32 @@
+/* PR preprocessor/92296 */
+/* { dg-do preprocess } */
+
+#pragma push_macro("__TIMESTAMP__")
+#pragma pop_macro("__TIMESTAMP__")
+
+#pragma push_macro("__TIME__")
+#pragma pop_macro("__TIME__")
+
+#pragma push_macro("__DATE__")
+#pragma pop_macro("__DATE__")
+
+#pragma push_macro("__FILE__")
+#pragma pop_macro("__FILE__")
+
+#pragma push_macro("__BASE_FILE__")
+#pragma pop_macro("__BASE_FILE__")
+
+#pragma push_macro("__LINE__")
+#pragma pop_macro("__LINE__")
+
+#pragma push_macro("__INCLUDE_LEVEL__")
+#pragma pop_macro("__INCLUDE_LEVEL__")
+
+#pragma push_macro("__COUNTER__")
+#pragma pop_macro("__COUNTER__")
+
+#pragma push_macro("__has_attribute")
+#pragma pop_macro("__has_attribute")
+
+#pragma push_macro("__has_cpp_attribute")
+#pragma pop_macro("__has_cpp_attribute")
diff --git a/gcc/testsuite/c-c++-common/cpp/pr92296-2.c b/gcc/testsuite/c-c++-common/cpp/pr92296-2.c
new file mode 100644
index 00000000000..15362a4bdc3
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cpp/pr92296-2.c
@@ -0,0 +1,73 @@
+/* PR preprocessor/92296 */
+/* { dg-do preprocess } */
+/* { dg-options "-Wno-builtin-macro-redefined" } */
+
+#pragma push_macro("__TIMESTAMP__")
+#undef __TIMESTAMP__
+#define __TIMESTAMP__ "Thu Oct 31 12:00:00 2019"
+timestamp1 = __TIMESTAMP__
+#pragma pop_macro("__TIMESTAMP__")
+timestamp2 = __TIMESTAMP__
+
+#pragma push_macro("__TIME__")
+#undef __TIME__
+#define __TIME__ "12:00:00"
+time1 = __TIME__
+#pragma pop_macro("__TIME__")
+time2 = __TIME__
+
+#pragma push_macro("__DATE__")
+#undef __DATE__
+#define __DATE__ "Oct 31 2019"
+date1 = __DATE__
+#pragma pop_macro("__DATE__")
+date2 = __DATE__
+
+#pragma push_macro("__FILE__")
+#undef __FILE__
+#define __FILE__ "pr92296-3.c"
+file1 = __FILE__ /* { dg-final { scan-file pr92296-2.i "file1 = \"pr92296-3.c\"" } } */
+#pragma pop_macro("__FILE__")
+file2 = __FILE__ /* { dg-final { scan-file-not pr92296-2.i "file2 = \"pr92296-3.c\"" } } */
+
+#pragma push_macro("__BASE_FILE__")
+#undef __BASE_FILE__
+#define __BASE_FILE__ "pr92296-4.c"
+filebase1 = __BASE_FILE__ /* { dg-final { scan-file pr92296-2.i "filebase1 = \"pr92296-4.c\"" } } */
+#pragma pop_macro("__BASE_FILE__")
+filebase2 = __BASE_FILE__ /* { dg-final { scan-file-not pr92296-2.i "filebase2 = \"pr92296-4.c\"" } } */
+
+#pragma push_macro("__LINE__")
+#undef __LINE__ /* { dg-warning "undefining" } */
+#define __LINE__ 142
+line1 = __LINE__ /* { dg-final { scan-file pr92296-2.i "line1 = 142" } } */
+#pragma pop_macro("__LINE__")
+line2 = __LINE__ /* { dg-final { scan-file pr92296-2.i "line2 = 45" } } */
+
+#pragma push_macro("__INCLUDE_LEVEL__")
+#undef __INCLUDE_LEVEL__ /* { dg-warning "undefining" } */
+#define __INCLUDE_LEVEL__ 42
+includelevel1 = __INCLUDE_LEVEL__ /* { dg-final { scan-file pr92296-2.i "includelevel1 = 42" } } */
+#pragma pop_macro("__INCLUDE_LEVEL__")
+includelevel2 = __INCLUDE_LEVEL__ /* { dg-final { scan-file pr92296-2.i "includelevel2 = 0" } } */
+
+#pragma push_macro("__COUNTER__")
+#undef __COUNTER__ /* { dg-warning "undefining" } */
+#define __COUNTER__ 172
+counter1 = __COUNTER__ /* { dg-final { scan-file pr92296-2.i "counter1 = 172" } } */
+#pragma pop_macro("__COUNTER__")
+counter2 = __COUNTER__ /* { dg-final { scan-file-not pr92296-2.i "counter2 = 172" } } */
+
+#pragma push_macro("__has_attribute")
+#undef __has_attribute /* { dg-warning "undefining" } */
+#define __has_attribute(x) 0
+hasattr1 = __has_attribute(noreturn) /* { dg-final { scan-file pr92296-2.i "hasattr1 = 0" } } */
+#pragma pop_macro("__has_attribute")
+hasattr2 = __has_attribute(noreturn) /* { dg-final { scan-file-not pr92296-2.i "hasattr2 = 0" } } */
+
+#pragma push_macro("__has_cpp_attribute")
+#undef __has_cpp_attribute /* { dg-warning "undefining" } */
+#define __has_cpp_attribute(x) 0
+hasattrcpp1 = __has_cpp_attribute(noreturn) /* { dg-final { scan-file pr92296-2.i "hasattrcpp1 = 0" } } */
+#pragma pop_macro("__has_cpp_attribute")
+hasattrcpp2 = __has_cpp_attribute(noreturn) /* { dg-final { scan-file-not pr92296-2.i "hasattrcpp2 = 0" } } */
diff --git a/gcc/testsuite/c-c++-common/gomp/pr91401-1.c b/gcc/testsuite/c-c++-common/gomp/pr91401-1.c
new file mode 100644
index 00000000000..f588bf6f16c
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/gomp/pr91401-1.c
@@ -0,0 +1,10 @@
+/* PR c/91401 */
+
+void
+foo (void)
+{
+ int i;
+ #pragma omp distribute parallel for schedule (static) dist_schedule (static)
+ for (i = 0; i < 64; i++)
+ ;
+}
diff --git a/gcc/testsuite/c-c++-common/gomp/pr91401-2.c b/gcc/testsuite/c-c++-common/gomp/pr91401-2.c
new file mode 100644
index 00000000000..f537e66e27c
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/gomp/pr91401-2.c
@@ -0,0 +1,15 @@
+#pragma omp declare target
+void f0 (void);
+
+void
+f1 (void)
+{
+ int i;
+ #pragma omp distribute dist_schedule(static) dist_schedule(static) /* { dg-warning "too many 'dist_schedule' clauses" } */
+ for (i = 0; i < 8; ++i)
+ f0 ();
+ #pragma omp distribute dist_schedule(static,2) dist_schedule(static,4) /* { dg-warning "too many 'dist_schedule' clauses" } */
+ for (i = 0; i < 8; ++i)
+ f0 ();
+}
+#pragma omp end declare target
diff --git a/gcc/testsuite/g++.dg/concepts/no-bool1.C b/gcc/testsuite/g++.dg/concepts/no-bool1.C
new file mode 100644
index 00000000000..be9b73a0689
--- /dev/null
+++ b/gcc/testsuite/g++.dg/concepts/no-bool1.C
@@ -0,0 +1,4 @@
+// { dg-do compile { target c++14 } }
+// { dg-additional-options -fconcepts }
+
+template <class T> concept True = true;
diff --git a/gcc/testsuite/g++.dg/cpp1z/eval-order5.C b/gcc/testsuite/g++.dg/cpp1z/eval-order5.C
new file mode 100644
index 00000000000..a8f06ed421a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1z/eval-order5.C
@@ -0,0 +1,31 @@
+// PR c++/91974
+// { dg-do run }
+// { dg-options "-fstrong-eval-order" }
+
+extern "C" void abort ();
+
+bool ok = false;
+
+void
+foo (int x)
+{
+ if (x != 0)
+ abort ();
+ ok = true;
+}
+
+void
+bar (int)
+{
+ abort ();
+}
+
+int
+main ()
+{
+ typedef void (*T) (int);
+ T fn = foo;
+ fn ((fn = bar, 0));
+ if (fn != bar || !ok)
+ abort ();
+}
diff --git a/gcc/testsuite/g++.dg/other/pr92201.C b/gcc/testsuite/g++.dg/other/pr92201.C
new file mode 100644
index 00000000000..15ba1a12525
--- /dev/null
+++ b/gcc/testsuite/g++.dg/other/pr92201.C
@@ -0,0 +1,7 @@
+// PR c++/92201
+
+int
+foo (void (*p) ())
+{
+ return (*reinterpret_cast<int (*)()> (p)) ();
+}
diff --git a/gcc/testsuite/g++.dg/tls/pr77285-2.C b/gcc/testsuite/g++.dg/tls/pr77285-2.C
index bac273a4d68..459ecc6555d 100644
--- a/gcc/testsuite/g++.dg/tls/pr77285-2.C
+++ b/gcc/testsuite/g++.dg/tls/pr77285-2.C
@@ -3,7 +3,7 @@
// { dg-require-effective-target tls }
// { dg-final { scan-assembler "_Z4var1B3tag" } }
// { dg-final { scan-assembler "_Z4var2B3tag" } }
-// { dg-final { scan-assembler "_ZTH4var1B3tag" } }
+// { dg-final { scan-assembler "_ZTH4var1B3tag" { xfail *-*-darwin* } } }
// { dg-final { scan-assembler "_ZTW4var1B3tag" } }
struct __attribute__((abi_tag("tag"))) X { ~X () {} int i = 0; };
diff --git a/gcc/testsuite/g++.dg/torture/pr91355.C b/gcc/testsuite/g++.dg/torture/pr91355.C
new file mode 100644
index 00000000000..7a385dc5bdd
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr91355.C
@@ -0,0 +1,28 @@
+// PR tree-optimization/91355
+// { dg-do run }
+// { dg-options "-std=c++14" }
+
+unsigned int d = 0;
+
+struct S {
+ S () { d++; }
+ S (const S &) { d++; }
+ ~S () { d--; }
+};
+
+void
+foo (int i) throw (int) // { dg-warning "dynamic exception specifications are deprecated" }
+{
+ if (i == 0)
+ throw 3;
+ S d;
+ throw 3;
+}
+
+int
+main ()
+{
+ try { foo (1); } catch (...) {}
+ if (d)
+ __builtin_abort ();
+}
diff --git a/gcc/testsuite/g++.dg/torture/pr92384.C b/gcc/testsuite/g++.dg/torture/pr92384.C
new file mode 100644
index 00000000000..049a45a0154
--- /dev/null
+++ b/gcc/testsuite/g++.dg/torture/pr92384.C
@@ -0,0 +1,38 @@
+// PR c++/92384
+// { dg-do run }
+
+struct S {};
+struct T : public S { S a, b, c, d, e, f, g, h, i, j, k, l, m; };
+struct U { long long a, b, c; };
+
+U
+foo (S, S, S, T, T, T, U g)
+{
+ return g;
+}
+
+__attribute__((noipa)) bool
+bar (S a, S b, S c, T d, T e, T f, U g, void **h)
+{
+ h[0] = (void *) &a;
+ h[1] = (void *) &b;
+ h[2] = (void *) &c;
+ h[3] = (void *) &d;
+ h[4] = (void *) &e;
+ h[5] = (void *) &f;
+ h[6] = (void *) &g;
+ asm volatile ("" : : "r" (h) : "memory");
+ return (h[0] != h[1] && h[1] != h[2] && h[2] != h[3]
+ && h[3] != h[4] && h[4] != h[5] && h[5] != h[6]);
+}
+
+int
+main ()
+{
+ S a;
+ T b;
+ U c = { 1, 2, 3 };
+ void *d[7];
+ if (!bar (a, a, a, b, b, b, c, d))
+ __builtin_abort ();
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/20191108-1.c b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
new file mode 100644
index 00000000000..7929751bb06
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/20191108-1.c
@@ -0,0 +1,14 @@
+/* PR target/92095 */
+/* Testcase by Sergei Trofimovich <slyfox@inbox.ru> */
+
+typedef union {
+ double a;
+ int b[2];
+} c;
+
+double d(int e)
+{
+ c f;
+ (&f)->b[0] = 15728640;
+ return e ? -(&f)->a : (&f)->a;
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr72802.c b/gcc/testsuite/gcc.c-torture/compile/pr72802.c
index b9e1ab31580..1e19577194e 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr72802.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr72802.c
@@ -1,3 +1,4 @@
+/* { dg-skip-if "see PR trail" { *-*-darwin* } } */
static a[];
static b, h, m, n, o, p, q, t, u, v, t5, t6, t16, t17, t18, t25;
c;
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr90840.c b/gcc/testsuite/gcc.c-torture/compile/pr90840.c
new file mode 100644
index 00000000000..94a6f3f4baf
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr90840.c
@@ -0,0 +1,19 @@
+/* PR middle-end/90840 */
+struct S { long long a; int b; };
+struct S foo (void);
+struct __attribute__((packed)) T { long long a; char b; };
+struct T baz (void);
+
+void
+bar (void)
+{
+ _Complex long double c;
+ *(struct S *) &c = foo ();
+}
+
+void
+qux (void)
+{
+ _Complex long double c;
+ *(struct T *) &c = baz ();
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr91001.c b/gcc/testsuite/gcc.c-torture/compile/pr91001.c
new file mode 100644
index 00000000000..4b6a017c860
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr91001.c
@@ -0,0 +1,31 @@
+/* PR middle-end/91001 */
+/* PR middle-end/91105 */
+/* PR middle-end/91106 */
+
+struct __attribute__((packed)) S { short b; char c; };
+struct T { short b, c, d; };
+struct __attribute__((packed)) R { int b; char c; };
+union __attribute__((aligned(128), transparent_union)) U { struct S c; } u;
+union __attribute__((aligned(32), transparent_union)) V { struct T c; } v;
+union __attribute__((aligned(32), transparent_union)) W { struct R c; } w;
+void foo (union U);
+void bar (union V);
+void baz (union W);
+
+void
+qux (void)
+{
+ foo (u);
+}
+
+void
+quux (void)
+{
+ bar (v);
+}
+
+void
+corge (void)
+{
+ baz (w);
+}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr92056.c b/gcc/testsuite/gcc.c-torture/compile/pr92056.c
new file mode 100644
index 00000000000..d04da763e15
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr92056.c
@@ -0,0 +1,18 @@
+/* PR tree-optimization/92056 */
+
+const char *d;
+
+void
+foo (int c, char *e, const char *a, const char *b)
+{
+ switch (c)
+ {
+ case 33:
+ for (;; d++)
+ if (__builtin_strcmp (b ? : "", d))
+ return;
+ break;
+ case 4:
+ __builtin_sprintf (e, a);
+ }
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr91450-1.c b/gcc/testsuite/gcc.c-torture/execute/pr91450-1.c
new file mode 100644
index 00000000000..9aafc5f791a
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr91450-1.c
@@ -0,0 +1,88 @@
+/* PR middle-end/91450 */
+
+__attribute__((noipa)) unsigned long long
+foo (int a, int b)
+{
+ unsigned long long r;
+ if (!__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ return r;
+}
+
+__attribute__((noipa)) unsigned long long
+bar (int a, int b)
+{
+ unsigned long long r;
+ if (a >= 0)
+ return 0;
+ if (!__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ return r;
+}
+
+__attribute__((noipa)) unsigned long long
+baz (int a, int b)
+{
+ unsigned long long r;
+ if (b >= 0)
+ return 0;
+ if (!__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ return r;
+}
+
+__attribute__((noipa)) unsigned long long
+qux (int a, int b)
+{
+ unsigned long long r;
+ if (a >= 0)
+ return 0;
+ if (b < 0)
+ return 0;
+ if (!__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ return r;
+}
+
+__attribute__((noipa)) unsigned long long
+quux (int a, int b)
+{
+ unsigned long long r;
+ if (a < 0)
+ return 0;
+ if (b >= 0)
+ return 0;
+ if (!__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ return r;
+}
+
+int
+main ()
+{
+ if (foo (-4, 2) != -8ULL)
+ __builtin_abort ();
+ if (foo (2, -4) != -8ULL)
+ __builtin_abort ();
+ if (bar (-4, 2) != -8ULL)
+ __builtin_abort ();
+ if (baz (2, -4) != -8ULL)
+ __builtin_abort ();
+ if (qux (-4, 2) != -8ULL)
+ __builtin_abort ();
+ if (quux (2, -4) != -8ULL)
+ __builtin_abort ();
+ if (foo (-2, 1) != -2ULL)
+ __builtin_abort ();
+ if (foo (1, -2) != -2ULL)
+ __builtin_abort ();
+ if (bar (-2, 1) != -2ULL)
+ __builtin_abort ();
+ if (baz (1, -2) != -2ULL)
+ __builtin_abort ();
+ if (qux (-2, 1) != -2ULL)
+ __builtin_abort ();
+ if (quux (1, -2) != -2ULL)
+ __builtin_abort ();
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr91450-2.c b/gcc/testsuite/gcc.c-torture/execute/pr91450-2.c
new file mode 100644
index 00000000000..bfaabbb5ac6
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr91450-2.c
@@ -0,0 +1,76 @@
+/* PR middle-end/91450 */
+
+__attribute__((noipa)) void
+foo (int a, int b)
+{
+ unsigned long long r;
+ if (__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ if (r != 0)
+ __builtin_abort ();
+}
+
+__attribute__((noipa)) void
+bar (int a, int b)
+{
+ unsigned long long r;
+ if (a >= 0)
+ return;
+ if (__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ if (r != 0)
+ __builtin_abort ();
+}
+
+__attribute__((noipa)) void
+baz (int a, int b)
+{
+ unsigned long long r;
+ if (b >= 0)
+ return;
+ if (__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ if (r != 0)
+ __builtin_abort ();
+}
+
+__attribute__((noipa)) void
+qux (int a, int b)
+{
+ unsigned long long r;
+ if (a >= 0)
+ return;
+ if (b < 0)
+ return;
+ if (__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ if (r != 0)
+ __builtin_abort ();
+}
+
+__attribute__((noipa)) void
+quux (int a, int b)
+{
+ unsigned long long r;
+ if (a < 0)
+ return;
+ if (b >= 0)
+ return;
+ if (__builtin_mul_overflow (a, b, &r))
+ __builtin_abort ();
+ if (r != 0)
+ __builtin_abort ();
+}
+
+int
+main ()
+{
+ foo (-4, 0);
+ foo (0, -4);
+ foo (0, 0);
+ bar (-4, 0);
+ baz (0, -4);
+ qux (-4, 0);
+ quux (0, -4);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/Wnonnull.c b/gcc/testsuite/gcc.dg/Wnonnull.c
index be89a5a755c..0ed06aabe68 100644
--- a/gcc/testsuite/gcc.dg/Wnonnull.c
+++ b/gcc/testsuite/gcc.dg/Wnonnull.c
@@ -2,7 +2,10 @@
{ dg-do compile }
{ dg-options "-O2 -Wall" } */
-#include <string.h>
+extern __SIZE_TYPE__ strlen (const char *__s)
+ __attribute ((pure)) __attribute ((nonnull (1)));
+extern void *memcpy (void *__restrict __dest, const void *__restrict __src,
+ __SIZE_TYPE__ __n) __attribute ((nonnull (1, 2)));
char buf[100];
@@ -14,9 +17,9 @@ struct Test
__attribute ((nonnull (1, 2)))
inline char*
-my_strcpy (char *restrict dst, const char *restrict src, size_t size)
+my_strcpy (char *restrict dst, const char *restrict src, __SIZE_TYPE__ size)
{
- size_t len = strlen (src); /* { dg-warning "argument 1 null where non-null expected" } */
+ __SIZE_TYPE__ len = strlen (src); /* { dg-warning "argument 1 null where non-null expected" } */
if (len < size)
memcpy (dst, src, len + 1); /* { dg-warning "argument 2 null where non-null expected" } */
else
diff --git a/gcc/testsuite/gcc.dg/pr90760.c b/gcc/testsuite/gcc.dg/pr90760.c
index 525a21a732f..6092a4e98cb 100644
--- a/gcc/testsuite/gcc.dg/pr90760.c
+++ b/gcc/testsuite/gcc.dg/pr90760.c
@@ -1,5 +1,6 @@
/* PR c/90760 */
/* { dg-do compile } */
+/* { dg-require-alias "" } */
/* { dg-require-named-sections "" } */
void bar (void) {}
diff --git a/gcc/testsuite/gcc.dg/pr90898.c b/gcc/testsuite/gcc.dg/pr90898.c
new file mode 100644
index 00000000000..e992ea34cd9
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr90898.c
@@ -0,0 +1,16 @@
+/* PR c/90898 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+void *p;
+int bar (void);
+void baz (int *);
+
+void
+foo (void)
+{
+ p = __builtin_stack_save ();
+ int a[(bar (), 2)];
+ baz (a);
+ __builtin_stack_restore (p);
+}
diff --git a/gcc/testsuite/gcc.dg/vect/pr91665.c b/gcc/testsuite/gcc.dg/vect/pr91665.c
new file mode 100644
index 00000000000..6b69ea030b1
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr91665.c
@@ -0,0 +1,15 @@
+/* PR tree-optimization/91665 */
+/* { dg-do compile } */
+/* { dg-additional-options "-Ofast" } */
+
+short int v;
+
+void
+foo (short int x, short int y)
+{
+ short int *p = &v;
+
+ x = 1;
+ while (x != 0)
+ x += ++y || (*p = x);
+}
diff --git a/gcc/testsuite/gcc.target/arm/pr86487.c b/gcc/testsuite/gcc.target/arm/pr86487.c
new file mode 100644
index 00000000000..1c1db7852d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr86487.c
@@ -0,0 +1,10 @@
+/* { dg-skip-if "" { *-*-* } { "-march=armv[0-6]*" "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm_neon_hw } */
+/* { dg-options "-O1 -mbig-endian" } */
+/* { dg-add-options arm_neon } */
+int a, b, c, d;
+long long fn1(long long p2) { return p2 == 0 ? -1 : -1 % p2; }
+void fn2(long long p1, short p2, long p3) {
+ b = fn1((d || 6) & a);
+ c = b | p3;
+}
diff --git a/gcc/testsuite/gcc.target/arm/pr88167-1.c b/gcc/testsuite/gcc.target/arm/pr88167-1.c
new file mode 100644
index 00000000000..517a86d6e4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr88167-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-options "-O2 -mthumb" } */
+
+void *retaddr;
+
+void foo (void) {
+ retaddr = __builtin_return_address (0);
+
+ /* Used for enforcing registers stacking. */
+ asm volatile ("" : : : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12");
+}
+
+/* { dg-final { scan-assembler-not "mov\tlr," } } */
diff --git a/gcc/testsuite/gcc.target/arm/pr88167-2.c b/gcc/testsuite/gcc.target/arm/pr88167-2.c
new file mode 100644
index 00000000000..6a303345eb9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr88167-2.c
@@ -0,0 +1,18 @@
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+/* { dg-skip-if "" { ! { arm_thumb1 } } } */
+
+int __attribute__((noclone, noinline))
+foo (int a, long long b) {
+ /* Used for enforcing registers stacking. */
+ asm volatile ("" : : : "r0", "r1", "r2", "r3",
+ "r8", "r9", "r10", "r11", "r12");
+ return (int) b;
+}
+
+int main ()
+{
+ if (foo (1, 0x1000000000000003LL) != 3)
+ __builtin_abort ();
+ __builtin_exit (0);
+}
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c
index 052d24dabdf..e2914a8333c 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-1.c
@@ -14,7 +14,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "jmp\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c
index 2cfbd728b4b..d2b7c74b143 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-2.c
@@ -14,7 +14,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "jmp\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c
index 59bb08613b7..129fb2125f0 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-3.c
@@ -15,7 +15,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c
index 59640fab8f1..01996fb029f 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-4.c
@@ -15,7 +15,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c
index 8620bf1d836..1493e18243b 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-1.c
@@ -17,7 +17,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "jmp\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c
index 42e83416965..3ddd4980b69 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-2.c
@@ -15,7 +15,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "jmp\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c
index 6a9c51337d9..43d5f95b4fb 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-3.c
@@ -17,7 +17,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler-times {jmp[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler-times {call[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler {\tpause} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c
index 85ec57b5a8d..bf62636c63c 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-4.c
@@ -16,7 +16,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler-times {jmp[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler-times {call[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler {\tpause} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c
index db1d8fb9979..27ba82932e4 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-5.c
@@ -17,7 +17,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
/* { dg-final { scan-assembler-not {jmp[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c
index 24fc43b3ba5..bdf15d36bac 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-attr-6.c
@@ -16,7 +16,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
/* { dg-final { scan-assembler-not {jmp[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c
index 3dc02f80ff5..c30c331c23b 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-1.c
@@ -14,7 +14,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "jmp\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
/* { dg-final { scan-assembler-not {jmp[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c
index c4adae23dd3..7edd7313027 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-2.c
@@ -14,7 +14,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "jmp\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
/* { dg-final { scan-assembler-not {jmp[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c
index b800b40b055..8e391797c5e 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-3.c
@@ -15,7 +15,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
/* { dg-final { scan-assembler-not {jmp[ \t]*\.?LIND} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c
index f68902ddc25..6033d13e8a7 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-extern-4.c
@@ -15,6 +15,6 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not {\t(lfence|pause)} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c
index 7301490d49c..ef3577d2934 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-1.c
@@ -14,7 +14,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {\tpause} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c
index ef1ba02978d..f26a5fb9015 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-2.c
@@ -14,7 +14,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler {jmp[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler {\tpause} } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c
index 58de8f0393e..3b8a1eeaffb 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-3.c
@@ -15,7 +15,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler-times {jmp[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler-times {call[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler-times {\tpause} 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c
index 3be3ce07527..40d31803a2e 100644
--- a/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c
+++ b/gcc/testsuite/gcc.target/i386/indirect-thunk-inline-4.c
@@ -15,7 +15,7 @@ male_indirect_jump (long offset)
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*dispatch" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_dispatch} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_dispatch\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler-times {jmp[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler-times {call[ \t]*\.?LIND} 2 } } */
/* { dg-final { scan-assembler-times {\tpause} 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr32219-2.c b/gcc/testsuite/gcc.target/i386/pr32219-2.c
index cb587db47aa..b6212f7dd4c 100644
--- a/gcc/testsuite/gcc.target/i386/pr32219-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr32219-2.c
@@ -20,5 +20,5 @@ foo ()
/* { dg-final { scan-assembler "movl\[ \t\]xxx@GOT\\(%\[^,\]*\\), %" { target { ia32 && { ! *-*-darwin* } } } } } */
/* Darwin m32 defaults to PIC but common symbols need to be indirected. */
-/* { dg-final { scan-assembler {movl[ \t]l_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t][Ll]_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr32219-3.c b/gcc/testsuite/gcc.target/i386/pr32219-3.c
index f9cfca7d72c..a1b0df28d0d 100644
--- a/gcc/testsuite/gcc.target/i386/pr32219-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr32219-3.c
@@ -24,4 +24,4 @@ foo ()
/* For Darwin, we need PIC to allow PIE, but also we must indirect weak symbols so that
they can be indirected. Again, dyld knows how to deal with this. */
-/* { dg-final { scan-assembler {movl[ \t]l_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t][Ll]_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr32219-4.c b/gcc/testsuite/gcc.target/i386/pr32219-4.c
index 0ac0674ae17..31d0710b7ed 100644
--- a/gcc/testsuite/gcc.target/i386/pr32219-4.c
+++ b/gcc/testsuite/gcc.target/i386/pr32219-4.c
@@ -21,4 +21,4 @@ foo ()
/* { dg-final { scan-assembler "movl\[ \t\]xxx@GOT\\(%\[^,\]*\\), %" { target { ia32 && { ! *-*-darwin* } } } } } */
/* Darwin m32 equivalent (indirect and PIC). */
-/* { dg-final { scan-assembler {movl[ \t]l_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t][Ll]_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr32219-7.c b/gcc/testsuite/gcc.target/i386/pr32219-7.c
index 469e9e38b07..20fef8dd063 100644
--- a/gcc/testsuite/gcc.target/i386/pr32219-7.c
+++ b/gcc/testsuite/gcc.target/i386/pr32219-7.c
@@ -23,4 +23,4 @@ foo ()
/* { dg-final { scan-assembler-not "movl\[ \t\]xxx@GOT\\(%\[^,\]*\\), %eax" { target { ia32 && { ! *-*-darwin* } } } } } */
/* Darwin m32 equivalent (indirect and PIC). */
-/* { dg-final { scan-assembler {movl[ \t]l_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t][Ll]_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr32219-8.c b/gcc/testsuite/gcc.target/i386/pr32219-8.c
index 75eb287fc59..767928f049e 100644
--- a/gcc/testsuite/gcc.target/i386/pr32219-8.c
+++ b/gcc/testsuite/gcc.target/i386/pr32219-8.c
@@ -21,4 +21,4 @@ foo ()
/* { dg-final { scan-assembler "movl\[ \t\]xxx@GOT\\(%\[^,\]*\\), %" { target { ia32 && { ! *-*-darwin* } } } } } */
/* Darwin m32 default to PIC but needs indirection for the weak symbol. */
-/* { dg-final { scan-assembler {movl[ \t]l_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t][Ll]_xxx\$non_lazy_ptr-L1\$pb\(%eax\),[ \t]%eax} { target { ia32 && *-*-darwin* } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr90867.c b/gcc/testsuite/gcc.target/i386/pr90867.c
new file mode 100644
index 00000000000..1ed96b582ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr90867.c
@@ -0,0 +1,30 @@
+/* PR target/90867 */
+/* { dg-do run { target lp64 } } */
+/* { dg-options "-O2 -msse2" } */
+
+unsigned long long freq = 3600000000UL; /* 3.6 GHz = 3600.0 MHz */
+
+__attribute__((noipa)) void
+bar (double x)
+{
+ static double d = 3600000000.0;
+ if (x != d)
+ __builtin_abort ();
+ d /= 1000.0;
+}
+
+__attribute__ ((target ("arch=x86-64"))) int
+foo ()
+{
+ bar ((double) freq);
+ bar (1e-3 * freq);
+ bar (1e-6 * freq);
+ bar (1e-9 * freq);
+ return 0;
+}
+
+int
+main ()
+{
+ return foo ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr91623.c b/gcc/testsuite/gcc.target/i386/pr91623.c
new file mode 100644
index 00000000000..94de4f91c6d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr91623.c
@@ -0,0 +1,32 @@
+/* PR middle-end/91623 */
+/* { dg-do compile } */
+/* { dg-options "-O3 -msse4.1 -mno-sse4.2" } */
+
+typedef long long V __attribute__((__vector_size__(16)));
+V e, h;
+int d;
+const int i;
+
+void foo (void);
+
+void
+bar (int k, int l)
+{
+ if (d && 0 <= k - 1 && l)
+ foo ();
+}
+
+void
+baz (void)
+{
+ V n = (V) { 1 };
+ V g = (V) {};
+ V o = g;
+ for (int f = 0; f < i; ++f)
+ {
+ V a = o == n;
+ h = a;
+ bar (f, i);
+ o = e;
+ }
+}
diff --git a/gcc/testsuite/gcc.target/i386/ret-thunk-14.c b/gcc/testsuite/gcc.target/i386/ret-thunk-14.c
index 3eaddee8c34..881f541772c 100644
--- a/gcc/testsuite/gcc.target/i386/ret-thunk-14.c
+++ b/gcc/testsuite/gcc.target/i386/ret-thunk-14.c
@@ -19,6 +19,6 @@ foo (void)
/* { dg-final { scan-assembler {call[ \t]*\.?LIND} } } */
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*bar" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_bar} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_bar\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_bar\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" } } */
diff --git a/gcc/testsuite/gcc.target/i386/ret-thunk-15.c b/gcc/testsuite/gcc.target/i386/ret-thunk-15.c
index 2793f72cdc1..5687440bf31 100644
--- a/gcc/testsuite/gcc.target/i386/ret-thunk-15.c
+++ b/gcc/testsuite/gcc.target/i386/ret-thunk-15.c
@@ -19,6 +19,6 @@ foo (void)
/* { dg-final { scan-assembler-times {\tlfence} 1 } } */
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*bar" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_bar} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_bar\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_bar\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
/* { dg-final { scan-assembler-not "pushq\[ \t\]%rax" } } */
diff --git a/gcc/testsuite/gcc.target/i386/ret-thunk-9.c b/gcc/testsuite/gcc.target/i386/ret-thunk-9.c
index 63af6741e05..3d4497000dc 100644
--- a/gcc/testsuite/gcc.target/i386/ret-thunk-9.c
+++ b/gcc/testsuite/gcc.target/i386/ret-thunk-9.c
@@ -17,7 +17,7 @@ foo (void)
/* { dg-final { scan-assembler "_?__x86_return_thunk:" } } */
/* { dg-final { scan-assembler "mov(?:l|q)\[ \t\]*bar" { target *-*-linux* } } } */
/* { dg-final { scan-assembler {movq[ \t]*_bar} { target { lp64 && *-*-darwin* } } } } */
-/* { dg-final { scan-assembler {movl[ \t]*l_bar\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
+/* { dg-final { scan-assembler {movl[ \t]*[Ll]_bar\$non_lazy_ptr-L[0-9]+\$pb} { target { ia32 && *-*-darwin* } } } } */
/* { dg-final { scan-assembler-times {\tpause} 2 } } */
/* { dg-final { scan-assembler-times {\tlfence} 2 } } */
/* { dg-final { scan-assembler "call\[ \t\]*_?__x86_indirect_thunk_(r|e)ax" } } */
diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c
new file mode 100644
index 00000000000..24c18262b1a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */
+/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */
+
+extern void foo (void*);
+
+extern void bar (void*);
+
+void
+test (void* p)
+{
+ if (!p)
+ foo(p);
+ else
+ bar(p);
+}
+
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */
diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c
new file mode 100644
index 00000000000..9fd75c98773
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */
+/* { dg-additional-options "-fno-inline -fipa-ra -mcompact-branches=never" } */
+/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */
+
+static int foo (void* p) { __asm__ (""::"r"(p):"$t0"); return 0; }
+
+static int bar (void* p) { return 1; }
+
+int
+test (void* p)
+{
+ int res = !p ? foo(p) : bar(p);
+
+ register int tmp __asm__("$t0") = -1;
+ __asm__ (""::"r"(tmp));
+
+ return res;
+}
+
+/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */
+/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */
+/* { dg-final { scan-assembler-not "\\.set\tnomacro\n\tjalr\t\\\$25" } } */
diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c
new file mode 100644
index 00000000000..580c6ec069d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */
+/* { dg-additional-options "-fno-inline -fipa-ra -mcompact-branches=never" } */
+/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */
+
+static int foo (void* p) { return 0; }
+
+static int bar (void* p) { return 1; }
+
+int
+test (void* p)
+{
+ int res = !p ? foo(p) : bar(p);
+
+ register int tmp __asm__("$t0") = -1;
+ __asm__ (""::"r"(tmp));
+
+ return res;
+}
+
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */
+/* { dg-final { scan-assembler "\\.set\tnomacro\n\tjalr\t\\\$25" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/bfp.exp b/gcc/testsuite/gcc.target/powerpc/bfp/bfp.exp
index 439ad57f72d..59b0eb52b41 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/bfp.exp
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/bfp.exp
@@ -16,9 +16,11 @@
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
-# Exit immediately if this isn't a PowerPC target or if the target is aix.
+# Exit immediately if this isn't a PowerPC target or if the target is
+# aix or Darwin.
if { (![istarget powerpc*-*-*] && ![istarget rs6000-*-*])
- || [istarget "powerpc*-*-aix*"] } then {
+ || [istarget "powerpc*-*-aix*"]
+ || [istarget "powerpc*-*-darwin*"] } then {
return
}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp
index 24769205dc0..17ba6d4f82e 100644
--- a/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp
@@ -16,8 +16,11 @@
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
-# Exit immediately if this isn't a PowerPC target.
-if { ![istarget powerpc*-*-*] && ![istarget rs6000-*-*] } then {
+# Exit immediately if this isn't a PowerPC target, also exit if we
+# are on Darwin which doesn't support decimal float.
+if { (![istarget powerpc*-*-*] && ![istarget rs6000-*-*])
+ || [istarget "powerpc*-*-darwin*"]
+} then {
return
}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr70010-1.c b/gcc/testsuite/gcc.target/powerpc/pr70010-1.c
new file mode 100644
index 00000000000..4b3abb7d8fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr70010-1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -flto -mvsx" } */
+/* { dg-require-effective-target lto } */
+
+vector int c, a, b;
+
+static inline void __attribute__ ((__always_inline__, target ("no-vsx")))
+foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+{
+ c = a + b;
+}
+
+int
+main ()
+{
+ foo (); /* { dg-message "called from here" } */
+ c = a + b;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr70010-3.c b/gcc/testsuite/gcc.target/powerpc/pr70010-3.c
new file mode 100644
index 00000000000..bca31875632
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr70010-3.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-vsx" } */
+
+vector int c, a, b;
+
+static inline void __attribute__ ((__always_inline__, target ("no-vsx")))
+foo ()
+{
+ c = a + b;
+}
+
+int
+main ()
+{
+ foo ();
+ c = a + b;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr70010-4.c b/gcc/testsuite/gcc.target/powerpc/pr70010-4.c
new file mode 100644
index 00000000000..c575cff1b52
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr70010-4.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mvsx" } */
+
+vector int c, a, b;
+
+static inline void __attribute__ ((__always_inline__, target ("no-vsx")))
+foo () /* { dg-error "inlining failed in call to .* target specific option mismatch" } */
+{
+ c = a + b;
+}
+
+int
+main ()
+{
+ foo (); /* { dg-message "called from here" } */
+ c = a + b;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr70010.c b/gcc/testsuite/gcc.target/powerpc/pr70010.c
new file mode 100644
index 00000000000..c8772fcacdb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr70010.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -finline-functions -Wno-psabi -mvsx" } */
+/* { dg-final { scan-assembler {\mbl \.?vadd_no_vsx\M} } } */
+
+
+typedef int vec_t __attribute__((vector_size(16)));
+
+static vec_t
+__attribute__((__target__("no-vsx")))
+vadd_no_vsx (vec_t a, vec_t b)
+{
+ return a + b;
+}
+
+vec_t
+__attribute__((__target__("vsx")))
+call_vadd_no_vsx (vec_t x, vec_t y, vec_t z)
+{
+ return vadd_no_vsx (x, y) - z;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92090-2.c b/gcc/testsuite/gcc.target/powerpc/pr92090-2.c
new file mode 100644
index 00000000000..893530613f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92090-2.c
@@ -0,0 +1,45 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=power8 -Os -w" } */
+/* { dg-additional-options "-mbig" { target powerpc64le-*-* } } */
+
+/* Verify that we don't ICE. */
+
+int a;
+static _Atomic long double b, c, d, m;
+double n;
+extern int foo (void);
+extern void bar (int, int, int, int);
+
+void
+bug (void)
+{
+ b = 1.79769313486231580793728971405301199e308L;
+ for (int i = 0; i < 10000; i++)
+ if (__builtin_isinf (n))
+ b;
+ c = 1;
+ int e, f, g, h;
+ while (a)
+ ;
+ for (int i; i; i++)
+ {
+ double j = c /= foo ();
+ if (__builtin_isinf (j))
+ {
+ if (foo == 1 << 31)
+ e++;
+ f++;
+ c = 0;
+ }
+ else
+ {
+ if (foo == 1 << 30)
+ g++;
+ h++;
+ c = 1;
+ }
+ }
+ bar (e, f, g, h);
+ d = 1.79769313486231580793728971405301199e308L;
+ m = 1;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92090.c b/gcc/testsuite/gcc.target/powerpc/pr92090.c
new file mode 100644
index 00000000000..9af74946afb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr92090.c
@@ -0,0 +1,43 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=power8 -Os" } */
+/* { dg-additional-options "-mbig" { target powerpc64le-*-* } } */
+
+/* Verify that we don't ICE. */
+
+_Atomic int a;
+_Atomic long double b, c;
+int j;
+void foo (void);
+void bar (int, int, int, int);
+
+void
+bug (void)
+{
+ b = 1;
+ int d, e, f, g;
+ while (a)
+ ;
+ for (int h = 0; h < 10000; h++)
+ {
+ double i = b /= 3;
+ foo ();
+ if (i)
+ {
+ if (i == 1)
+ d++;
+ e++;
+ b = 0;
+ }
+ else
+ {
+ if (i == 2)
+ f++;
+ g++;
+ b = 1;
+ }
+ }
+ bar (d, e, f, g);
+ c = 1;
+ for (int h; h; h++)
+ j = 0;
+}
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-1.c b/gcc/testsuite/gcc.target/sparc/overflow-1.c
index e3fa0d04573..75f69ba4f9d 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-1.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O -mcpu=v8" } */
+/* { dg-options "-O -fno-pie -mcpu=v8" } */
/* { dg-require-effective-target ilp32 } */
#include <stdbool.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-2.c b/gcc/testsuite/gcc.target/sparc/overflow-2.c
index 9e42bd214de..feb3f194828 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-2.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O -mcpu=v8" } */
+/* { dg-options "-O -fno-pie -mcpu=v8" } */
/* { dg-require-effective-target ilp32 } */
#include <stdbool.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-3.c b/gcc/testsuite/gcc.target/sparc/overflow-3.c
index 8cb24f52f7b..18253bb6e5e 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-3.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O" } */
+/* { dg-options "-O -fno-pie" } */
/* { dg-require-effective-target lp64 } */
#include <stdbool.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c
index 868edea2b9e..fb30877efb9 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-4.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O -mno-vis3" } */
+/* { dg-options "-O -fno-pie -mno-vis3" } */
/* { dg-require-effective-target lp64 } */
#include <stdbool.h>
diff --git a/gcc/testsuite/gcc.target/sparc/overflow-5.c b/gcc/testsuite/gcc.target/sparc/overflow-5.c
index 501ce04f7a1..509d957715d 100644
--- a/gcc/testsuite/gcc.target/sparc/overflow-5.c
+++ b/gcc/testsuite/gcc.target/sparc/overflow-5.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O -mvis3" } */
+/* { dg-options "-O -fno-pie -mvis3" } */
/* { dg-require-effective-target lp64 } */
#include <stdbool.h>
diff --git a/gcc/testsuite/gfortran.dg/char_result_19.f90 b/gcc/testsuite/gfortran.dg/char_result_19.f90
new file mode 100644
index 00000000000..e66ebdcda53
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/char_result_19.f90
@@ -0,0 +1,24 @@
+! { dg-do preprocess }
+! { dg-additional-options "-cpp" }
+!
+! Test the fix for PR86248
+!
+! Contributed by Bill Long <longb@cray.com>
+!
+program test
+ use test_module
+ implicit none
+ integer :: i
+ character(:), allocatable :: chr
+ do i = 0, 2
+ chr = func_1 (i)
+ select case (i)
+ case (0)
+ if (chr .ne. 'el0') stop i
+ case (1)
+ if (chr .ne. 'el11') stop i
+ case (2)
+ if (chr .ne. 'el2') stop i
+ end select
+ end do
+end program test
diff --git a/gcc/testsuite/gfortran.dg/char_result_mod_19.f90 b/gcc/testsuite/gfortran.dg/char_result_mod_19.f90
new file mode 100644
index 00000000000..a2b5e94f1b6
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/char_result_mod_19.f90
@@ -0,0 +1,18 @@
+! { dg-do run }
+! { dg-additional-sources char_result_19.f90 }
+!
+! Module for char_result_19.f90
+! Tests fix for PR86248
+!
+module test_module
+ implicit none
+ public :: func_1
+ private
+ character(len=*),dimension(0:2),parameter :: darray = (/"el0 ","el11","el2 "/)
+contains
+ function func_1 (func_1_input) result(f)
+ integer, intent(in) :: func_1_input
+ character(len = len_trim (darray(func_1_input))) :: f
+ f = darray(func_1_input)
+ end function func_1
+end module test_module
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index c591acd0a26..e6b84041fc5 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5018,13 +5018,13 @@ proc check_effective_target_powerpc_p8vector_ok { } {
|| [istarget powerpc*-*-aix5.2*] } {
return 0
}
+ # Darwin doesn't run on power8, so far.
+ if { [istarget *-*-darwin*] } {
+ return 0
+ }
return [check_no_compiler_messages powerpc_p8vector_ok object {
int main (void) {
-#ifdef __MACH__
- asm volatile ("xxlorc vs0,vs0,vs0");
-#else
asm volatile ("xxlorc 0,0,0");
-#endif
return 0;
}
} "-mpower8-vector"]
@@ -5045,6 +5045,10 @@ proc check_effective_target_powerpc_p9vector_ok { } {
|| [istarget powerpc*-*-aix5.2*] } {
return 0
}
+ # Darwin doesn't run on power9, so far.
+ if { [istarget *-*-darwin*] } {
+ return 0
+ }
return [check_no_compiler_messages powerpc_p9vector_ok object {
int main (void) {
long e = -1;
@@ -5095,6 +5099,10 @@ proc check_effective_target_powerpc_float128_sw_ok { } {
|| [istarget powerpc*-*-aix5.2*] } {
return 0
}
+ # Darwin doesn't have VSX, so no soft support for float128.
+ if { [istarget *-*-darwin*] } {
+ return 0
+ }
return [check_no_compiler_messages powerpc_float128_sw_ok object {
volatile __float128 x = 1.0q;
volatile __float128 y = 2.0q;
@@ -5121,6 +5129,10 @@ proc check_effective_target_powerpc_float128_hw_ok { } {
|| [istarget powerpc*-*-aix5.2*] } {
return 0
}
+ # Darwin doesn't run on any machine with float128 h/w so far.
+ if { [istarget *-*-darwin*] } {
+ return 0
+ }
return [check_no_compiler_messages powerpc_float128_hw_ok object {
volatile __float128 x = 1.0q;
volatile __float128 y = 2.0q;
@@ -5147,13 +5159,14 @@ proc check_effective_target_powerpc_vsx_ok { } {
|| [istarget powerpc*-*-aix6*] } {
return 0
}
+ # Darwin doesn't have VSX, even if it's used with an assembler
+ # which recognises the insns.
+ if { [istarget *-*-darwin*] } {
+ return 0
+ }
return [check_no_compiler_messages powerpc_vsx_ok object {
int main (void) {
-#ifdef __MACH__
- asm volatile ("xxlor vs0,vs0,vs0");
-#else
asm volatile ("xxlor 0,0,0");
-#endif
return 0;
}
} "-mvsx"]
diff --git a/gcc/testsuite/obj-c++.dg/stubify-1.mm b/gcc/testsuite/obj-c++.dg/stubify-1.mm
index c2355437afc..e8f21882de9 100644
--- a/gcc/testsuite/obj-c++.dg/stubify-1.mm
+++ b/gcc/testsuite/obj-c++.dg/stubify-1.mm
@@ -4,7 +4,7 @@
/* { dg-do compile { target *-*-darwin* } } */
/* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */
/* { dg-require-effective-target ilp32 } */
-/* { dg-options "-Os -mdynamic-no-pic -fno-exceptions -mmacosx-version-min=10.4" } */
+/* { dg-options "-mdynamic-no-pic -fno-exceptions -mmacosx-version-min=10.4 -msymbol-stubs" } */
typedef struct objc_object { } *id ;
int x = 41 ;
@@ -32,8 +32,8 @@ extern "C" {
}
@end
-/* { dg-final { scan-assembler-not "\(bl|call\)\[ \t\]+_objc_msgSend\n" } } */
-/* { dg-final { scan-assembler "\(bl|call\)\[ \t\]+L_objc_msgSend\\\$stub\n" } } */
-/* { dg-final { scan-assembler-not "\(bl|call\)\[ \t\]+_bogonic\n" } } */
-/* { dg-final { scan-assembler "\(bl|call\)\[ \t\]+L_bogonic\\\$stub\n" } } */
-/* { dg-final { scan-assembler-not "\\\$non_lazy_ptr" } } */
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_objc_msgSend\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L_objc_msgSend\$stub\n} } } */
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_bogonic\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L_bogonic\$stub\n} } } */
+/* { dg-final { scan-assembler-not {\$non_lazy_ptr} } } */
diff --git a/gcc/testsuite/obj-c++.dg/stubify-2.mm b/gcc/testsuite/obj-c++.dg/stubify-2.mm
index a9f66cac5d2..1863f986ce0 100644
--- a/gcc/testsuite/obj-c++.dg/stubify-2.mm
+++ b/gcc/testsuite/obj-c++.dg/stubify-2.mm
@@ -4,7 +4,7 @@
/* { dg-do compile { target *-*-darwin* } } */
/* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */
/* { dg-require-effective-target ilp32 } */
-/* { dg-options "-mdynamic-no-pic -fdump-rtl-jump -mmacosx-version-min=10.4" } */
+/* { dg-options "-mdynamic-no-pic -mmacosx-version-min=10.4 -msymbol-stubs" } */
typedef struct objc_object { } *id ;
int x = 41 ;
@@ -30,4 +30,9 @@ extern int bogonic (int, int, int) ;
/* Any symbol_ref of an un-stubified objc_msgSend is an error; look
for "objc_msgSend" in quotes, without the $stub suffix. */
-/* { dg-final { scan-rtl-dump-not "symbol_ref.*\"objc_msgSend\"" "jump" } } */
+
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_objc_msgSend\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L_objc_msgSend\$stub\n} } } */
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_Z7bogoniciii\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L__Z7bogoniciii\$stub\n} } } */
+/* { dg-final { scan-assembler-not {\$non_lazy_ptr} } } */
diff --git a/gcc/testsuite/objc.dg/stubify-1.m b/gcc/testsuite/objc.dg/stubify-1.m
index 91bf73a14f7..641595ccfe4 100644
--- a/gcc/testsuite/objc.dg/stubify-1.m
+++ b/gcc/testsuite/objc.dg/stubify-1.m
@@ -4,7 +4,7 @@
/* { dg-do compile { target *-*-darwin* } } */
/* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */
/* { dg-require-effective-target ilp32 } */
-/* { dg-options "-Os -mdynamic-no-pic -mmacosx-version-min=10.4" } */
+/* { dg-options "-Os -mdynamic-no-pic -mmacosx-version-min=10.4 -msymbol-stubs" } */
typedef struct objc_object { } *id ;
int x = 41 ;
@@ -28,8 +28,8 @@ extern int bogonic (int, int, int) ;
}
@end
-/* { dg-final { scan-assembler-not "\(bl|call\)\[ \t\]+_objc_msgSend\n" } } */
-/* { dg-final { scan-assembler "\(bl|call\)\[ \t\]+L_objc_msgSend\\\$stub\n" } } */
-/* { dg-final { scan-assembler-not "\(bl|call\)\[ \t\]+_bogonic\n" } } */
-/* { dg-final { scan-assembler "\(bl|call\)\[ \t\]+L_bogonic\\\$stub\n" } } */
-/* { dg-final { scan-assembler-not "\\\$non_lazy_ptr" } } */
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_objc_msgSend\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L_objc_msgSend\$stub\n} } } */
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_bogonic\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L_bogonic\$stub\n} } } */
+/* { dg-final { scan-assembler-not {\$non_lazy_ptr} } } */
diff --git a/gcc/testsuite/objc.dg/stubify-2.m b/gcc/testsuite/objc.dg/stubify-2.m
index eaf4b964e4b..2930e46fc13 100644
--- a/gcc/testsuite/objc.dg/stubify-2.m
+++ b/gcc/testsuite/objc.dg/stubify-2.m
@@ -1,10 +1,10 @@
/* All calls must be properly stubified, m32 only. */
/* Testcase extracted from TextEdit:Document.m. */
-/* { dg-do compile { target powerpc*-*-darwin* } } */
+/* { dg-do compile { target *-*-darwin* } } */
/* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */
/* { dg-require-effective-target ilp32 } */
-/* { dg-options "-mdynamic-no-pic -fdump-rtl-jump -mmacosx-version-min=10.4" } */
+/* { dg-options "-mdynamic-no-pic -mmacosx-version-min=10.4 -msymbol-stubs" } */
typedef struct objc_object { } *id ;
int x = 41 ;
@@ -30,4 +30,9 @@ extern int bogonic (int, int, int) ;
/* Any symbol_ref of an un-stubified objc_msgSend is an error; look
for "objc_msgSend" in quotes, without the $stub suffix. */
-/* { dg-final { scan-rtl-dump-not "symbol_ref.*\"objc_msgSend\"" "jump" } } */
+
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_objc_msgSend\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L_objc_msgSend\$stub\n} } } */
+/* { dg-final { scan-assembler-not {(bl|call)[ \t]+_bogonic\n} } } */
+/* { dg-final { scan-assembler {(bl|call)[ \t]+L_bogonic\$stub\n} } } */
+/* { dg-final { scan-assembler-not {\$non_lazy_ptr} } } */
diff --git a/gcc/tree-object-size.c b/gcc/tree-object-size.c
index 4f6b230c740..f9998597c49 100644
--- a/gcc/tree-object-size.c
+++ b/gcc/tree-object-size.c
@@ -899,6 +899,9 @@ cond_expr_object_size (struct object_size_info *osi, tree var, gimple *stmt)
else
expr_object_size (osi, var, then_);
+ if (object_sizes[object_size_type][varno] == unknown[object_size_type])
+ return reexamine;
+
if (TREE_CODE (else_) == SSA_NAME)
reexamine |= merge_object_sizes (osi, var, else_, 0);
else
diff --git a/gcc/tree-ssa-ccp.c b/gcc/tree-ssa-ccp.c
index 5719d6d3e2e..9f5bf637ed5 100644
--- a/gcc/tree-ssa-ccp.c
+++ b/gcc/tree-ssa-ccp.c
@@ -2082,8 +2082,6 @@ insert_clobber_before_stack_restore (tree saved_val, tree var,
visited);
else if (chkp_gimple_call_builtin_p (stmt, BUILT_IN_CHKP_BNDRET))
continue;
- else
- gcc_assert (is_gimple_debug (stmt));
}
/* Advance the iterator to the previous non-debug gimple statement in the same
@@ -2108,9 +2106,9 @@ gsi_prev_dom_bb_nondebug (gimple_stmt_iterator *i)
/* Find a BUILT_IN_STACK_SAVE dominating gsi_stmt (I), and insert
a clobber of VAR before each matching BUILT_IN_STACK_RESTORE.
- It is possible that BUILT_IN_STACK_SAVE cannot be find in a dominator when a
- previous pass (such as DOM) duplicated it along multiple paths to a BB. In
- that case the function gives up without inserting the clobbers. */
+ It is possible that BUILT_IN_STACK_SAVE cannot be found in a dominator when
+ a previous pass (such as DOM) duplicated it along multiple paths to a BB.
+ In that case the function gives up without inserting the clobbers. */
static void
insert_clobbers_for_var (gimple_stmt_iterator i, tree var)
diff --git a/gcc/tree-ssa-sink.c b/gcc/tree-ssa-sink.c
index 345ed2b0329..5ac18289d90 100644
--- a/gcc/tree-ssa-sink.c
+++ b/gcc/tree-ssa-sink.c
@@ -229,7 +229,7 @@ select_best_block (basic_block early_bb,
/* If result of comparsion is unknown, preffer EARLY_BB.
Thus use !(...>=..) rather than (...<...) */
&& !(best_bb->count.apply_scale (100, 1)
- > (early_bb->count.apply_scale (threshold, 1))))
+ >= early_bb->count.apply_scale (threshold, 1)))
return best_bb;
/* No better block found, so return EARLY_BB, which happens to be the
diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c
index e50dca91b63..ce87614d253 100644
--- a/gcc/tree-vect-loop.c
+++ b/gcc/tree-vect-loop.c
@@ -6808,10 +6808,13 @@ vectorizable_reduction (gimple *stmt, gimple_stmt_iterator *gsi,
gcc_assert (TREE_CODE (base) == INTEGER_CST
&& TREE_CODE (step) == INTEGER_CST);
cond_reduc_val = NULL_TREE;
+ tree res = PHI_RESULT (STMT_VINFO_STMT (cond_stmt_vinfo));
+ if (!types_compatible_p (TREE_TYPE (res), TREE_TYPE (base)))
+ ;
/* Find a suitable value, for MAX_EXPR below base, for MIN_EXPR
above base; punt if base is the minimum value of the type for
MAX_EXPR or maximum value of the type for MIN_EXPR for now. */
- if (tree_int_cst_sgn (step) == -1)
+ else if (tree_int_cst_sgn (step) == -1)
{
cond_reduc_op_code = MIN_EXPR;
if (tree_int_cst_sgn (base) == -1)
diff --git a/libcpp/ChangeLog b/libcpp/ChangeLog
index bc1208a689b..f444b2112fe 100644
--- a/libcpp/ChangeLog
+++ b/libcpp/ChangeLog
@@ -1,3 +1,17 @@
+2019-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2019-10-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR preprocessor/92296
+ * internal.h (struct def_pragma_macro): Add is_builtin bitfield.
+ (_cpp_restore_special_builtin): Declare.
+ * init.c (_cpp_restore_special_builtin): New function.
+ * directives.c (do_pragma_push_macro): For NT_MACRO with NODE_BUILTIN
+ set is_builtin and don't try to grab definition.
+ (cpp_pop_definition): Use _cpp_restore_special_builtin to restore
+ builtin macros.
+
2019-03-11 Martin Liska <mliska@suse.cz>
Backport from mainline
diff --git a/libcpp/directives.c b/libcpp/directives.c
index bf13ada14ee..a1fde9c1ad1 100644
--- a/libcpp/directives.c
+++ b/libcpp/directives.c
@@ -1574,6 +1574,8 @@ do_pragma_push_macro (cpp_reader *pfile)
node = _cpp_lex_identifier (pfile, c->name);
if (node->type == NT_VOID)
c->is_undef = 1;
+ else if (node->type == NT_MACRO && (node->flags & NODE_BUILTIN))
+ c->is_builtin = 1;
else
{
defn = cpp_macro_definition (pfile, node);
@@ -2504,6 +2506,11 @@ cpp_pop_definition (cpp_reader *pfile, struct def_pragma_macro *c)
cpp_hashnode *node = _cpp_lex_identifier (pfile, c->name);
if (node == NULL)
return;
+ if (c->is_builtin)
+ {
+ _cpp_restore_special_builtin (pfile, c);
+ return;
+ }
if (pfile->cb.before_define)
pfile->cb.before_define (pfile);
diff --git a/libcpp/init.c b/libcpp/init.c
index d1697fdec1c..ca3fbaa5c05 100644
--- a/libcpp/init.c
+++ b/libcpp/init.c
@@ -488,6 +488,26 @@ cpp_init_special_builtins (cpp_reader *pfile)
}
}
+/* Restore macro C to builtin macro definition. */
+
+void
+_cpp_restore_special_builtin (cpp_reader *pfile, struct def_pragma_macro *c)
+{
+ size_t len = strlen (c->name);
+
+ for (const struct builtin_macro *b = builtin_array;
+ b < builtin_array + ARRAY_SIZE (builtin_array); b++)
+ if (b->len == len && memcmp (c->name, b->name, len + 1) == 0)
+ {
+ cpp_hashnode *hp = cpp_lookup (pfile, b->name, b->len);
+ hp->type = NT_MACRO;
+ hp->flags |= NODE_BUILTIN;
+ if (b->always_warn_if_redefined)
+ hp->flags |= NODE_WARN;
+ hp->value.builtin = (enum cpp_builtin_type) b->value;
+ }
+}
+
/* Read the builtins table above and enter them, and language-specific
macros, into the hash table. HOSTED is true if this is a hosted
environment. */
diff --git a/libcpp/internal.h b/libcpp/internal.h
index 782d8e6349f..4f74f995cec 100644
--- a/libcpp/internal.h
+++ b/libcpp/internal.h
@@ -381,6 +381,8 @@ struct def_pragma_macro {
/* Mark if we save an undefined macro. */
unsigned int is_undef : 1;
+ /* Nonzero if it was a builtin macro. */
+ unsigned int is_builtin : 1;
};
/* A cpp_reader encapsulates the "state" of a pre-processor run.
@@ -689,6 +691,8 @@ extern void _cpp_init_lexer (void);
/* In init.c. */
extern void _cpp_maybe_push_include_file (cpp_reader *);
extern const char *cpp_named_operator2name (enum cpp_ttype type);
+extern void _cpp_restore_special_builtin (cpp_reader *pfile,
+ struct def_pragma_macro *);
/* In directives.c */
extern int _cpp_test_assertion (cpp_reader *, unsigned int *);
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 2facd005ba5..1e1a73a7e7e 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,70 @@
+2019-11-17 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/linux-atomic.c (__kernel_cmpxchg): Change argument 1 to
+ volatile void *. Remove trap check.
+ (__kernel_cmpxchg2): Likewise.
+ (FETCH_AND_OP_2): Adjust operand types.
+ (OP_AND_FETCH_2): Likewise.
+ (FETCH_AND_OP_WORD): Likewise.
+ (OP_AND_FETCH_WORD): Likewise.
+ (COMPARE_AND_SWAP_2): Likewise.
+ (__sync_val_compare_and_swap_4): Likewise.
+ (__sync_bool_compare_and_swap_4): Likewise.
+ (SYNC_LOCK_TEST_AND_SET_2): Likewise.
+ (__sync_lock_test_and_set_4): Likewise.
+ (SYNC_LOCK_RELEASE_1): Likewise. Use __kernel_cmpxchg2 for release.
+ (__sync_lock_release_4): Adjust operand types. Use __kernel_cmpxchg
+ for release.
+ (__sync_lock_release_8): Remove.
+
+2019-11-04 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2019-10-12 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/lib2funcs.S (__gcc_plt_call): Load branch target to %r21.
+ Load PIC register after branch target. Fix white space.
+ * config/pa/milli64.S ($$dyncall): Separate LINUX and non LINUX
+ implementations. Load PIC register after branch target. Don't
+ clobber function pointer when it points to function descriptor.
+ Use nullification instead of branch in LINUX implementation.
+
+2019-11-04 John David Anglin <danglin@gcc.gnu.org>
+
+ Backport from mainline
+ 2019-10-15 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/fptr.c (_dl_read_access_allowed): Change argument to
+ unsigned int. Adjust callers.
+ (__canonicalize_funcptr_for_compare): Change plabel type to volatile
+ unsigned int *. Load relocation offset before function pointer.
+ Add barrier to ensure ordering.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline.
+ 2019-07-03 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config.host (powerpc-*-darwin*,powerpc64-*-darwin*): Revise crt
+ list.
+ * config/rs6000/t-darwin: Build crt3_2 for older systems. Revise
+ mmacosx-version-min for crts to run across all system versions.
+ * config/rs6000/t-darwin64 (LIB2ADD): Remove.
+ * config/t-darwin: Revise mmacosx-version-min for crts to run across
+ system versions >= 10.4.
+
+2019-10-31 Iain Sandoe <iain@sandoe.co.uk>
+
+ Backport from mainline.
+ 2019-06-25 Iain Sandoe <iain@sandoe.co.uk>
+
+ * config.host: Add libef_ppc.a to the extra files for powerpc-darwin.
+ * config/rs6000/t-darwin: (PPC_ENDFILE_SRC, PPC_ENDFILE_OBJS): New.
+ Build objects for the out of line save/restore register functions
+ so that they can be used for any supported Darwin version.
+ * config/t-darwin: Default the build Darwin version to Darwin8
+ (MacOS 10.4).
+
2019-08-27 Iain Sandoe <iain@sandoe.co.uk>
Backport from mainline.
diff --git a/libgcc/config.host b/libgcc/config.host
index 11b4acaff55..b12c86267da 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1018,12 +1018,12 @@ powerpc-*-darwin*)
md_unwind_header=rs6000/darwin-unwind.h
;;
esac
- tmake_file="$tmake_file rs6000/t-ibm-ldouble"
- extra_parts="$extra_parts crt2.o"
+ tmake_file="$tmake_file rs6000/t-ppc64-fp rs6000/t-ibm-ldouble"
+ extra_parts="$extra_parts crt2.o crt3_2.o libef_ppc.a dw_ppc.o"
;;
powerpc64-*-darwin*)
tmake_file="$tmake_file rs6000/t-darwin64 rs6000/t-ibm-ldouble"
- extra_parts="$extra_parts crt2.o"
+ extra_parts="$extra_parts crt2.o crt3_2.o libef_ppc.a dw_ppc.o"
;;
powerpc*-*-freebsd*)
tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-savresfgpr rs6000/t-crtstuff rs6000/t-freebsd t-softfp-sfdf t-softfp-excl t-softfp"
diff --git a/libgcc/config/pa/fptr.c b/libgcc/config/pa/fptr.c
index 944ed4495d9..f33e9c25259 100644
--- a/libgcc/config/pa/fptr.c
+++ b/libgcc/config/pa/fptr.c
@@ -53,7 +53,7 @@ typedef int (*fixup_t) (struct link_map *, unsigned int);
extern unsigned int _GLOBAL_OFFSET_TABLE_;
static inline int
-_dl_read_access_allowed (unsigned int *addr)
+_dl_read_access_allowed (unsigned int addr)
{
int result;
@@ -76,7 +76,8 @@ __canonicalize_funcptr_for_compare (fptr_t fptr)
{
static unsigned int fixup_plabel[2] __attribute__((used));
fixup_t fixup;
- unsigned int *got, *iptr, *plabel;
+ volatile unsigned int *plabel;
+ unsigned int *got, *iptr, reloc_offset;
int i;
/* -1 and page 0 are special. -1 is used in crtend to mark the end of
@@ -91,17 +92,20 @@ __canonicalize_funcptr_for_compare (fptr_t fptr)
to the entry of the PLT stub just before the global offset table.
The second word in the plabel contains the relocation offset for the
function. */
- plabel = (unsigned int *) ((unsigned int) fptr & ~3);
- if (!_dl_read_access_allowed (plabel))
+ plabel = (volatile unsigned int *) ((unsigned int) fptr & ~3);
+ if (!_dl_read_access_allowed ((unsigned int)plabel))
return (unsigned int) fptr;
/* Load first word of candidate descriptor. It should be a pointer
with word alignment and point to memory that can be read. */
got = (unsigned int *) plabel[0];
if (((unsigned int) got & 3) != 0
- || !_dl_read_access_allowed (got))
+ || !_dl_read_access_allowed ((unsigned int)got))
return (unsigned int) fptr;
+ /* We need to load the relocation offset before the function address. */
+ reloc_offset = plabel[1];
+ __sync_synchronize();
got = (unsigned int *) (plabel[0] + GOT_FROM_PLT_STUB);
/* Return the address of the function if the plabel has been resolved. */
@@ -137,7 +141,7 @@ __canonicalize_funcptr_for_compare (fptr_t fptr)
/* Call fixup to resolve the function address. got[1] contains the
link_map pointer and plabel[1] the relocation offset. */
- fixup ((struct link_map *) got[1], plabel[1]);
+ fixup ((struct link_map *) got[1], reloc_offset);
return plabel[0];
}
diff --git a/libgcc/config/pa/lib2funcs.S b/libgcc/config/pa/lib2funcs.S
index 4d671996bac..94ba2393c49 100644
--- a/libgcc/config/pa/lib2funcs.S
+++ b/libgcc/config/pa/lib2funcs.S
@@ -55,13 +55,13 @@ __gcc_plt_call
; An inline version of dyncall so we don't have to worry
; about long calls to millicode, PIC and other complexities.
bb,>=,n %r22,30,L$foo
- depi 0,31,2,%r22
- ldw 4(%r22),%r19
- ldw 0(%r22),%r22
+ depi 0,31,2,%r22
+ ldw 0(%r22),%r21
+ ldw 4(%r22),%r19
L$foo
- ldsid (%r22),%r1
- mtsp %r1,%sr0
- ble 0(%sr0,%r22)
+ ldsid (%r21),%r1
+ mtsp %r1,%sr0
+ ble 0(%sr0,%r21)
copy %r31,%r2
ldw -8(%r30),%r2
diff --git a/libgcc/config/pa/linux-atomic.c b/libgcc/config/pa/linux-atomic.c
index ddd0b1e9708..5961abf3554 100644
--- a/libgcc/config/pa/linux-atomic.c
+++ b/libgcc/config/pa/linux-atomic.c
@@ -41,7 +41,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
/* Kernel helper for compare-and-exchange a 32-bit value. */
static inline long
-__kernel_cmpxchg (int *mem, int oldval, int newval)
+__kernel_cmpxchg (volatile void *mem, int oldval, int newval)
{
register unsigned long lws_mem asm("r26") = (unsigned long) (mem);
register int lws_old asm("r25") = oldval;
@@ -54,20 +54,18 @@ __kernel_cmpxchg (int *mem, int oldval, int newval)
: "i" (LWS_CAS), "r" (lws_mem), "r" (lws_old), "r" (lws_new)
: "r1", "r20", "r22", "r23", "r29", "r31", "memory"
);
- if (__builtin_expect (lws_errno == -EFAULT || lws_errno == -ENOSYS, 0))
- __builtin_trap ();
/* If the kernel LWS call succeeded (lws_errno == 0), lws_ret contains
the old value from memory. If this value is equal to OLDVAL, the
new value was written to memory. If not, return -EBUSY. */
if (!lws_errno && lws_ret != oldval)
- lws_errno = -EBUSY;
+ return -EBUSY;
return lws_errno;
}
static inline long
-__kernel_cmpxchg2 (void *mem, const void *oldval, const void *newval,
+__kernel_cmpxchg2 (volatile void *mem, const void *oldval, const void *newval,
int val_size)
{
register unsigned long lws_mem asm("r26") = (unsigned long) (mem);
@@ -88,9 +86,6 @@ __kernel_cmpxchg2 (void *mem, const void *oldval, const void *newval,
if (__builtin_expect (lws_ret == 0, 1))
return 0;
- if (__builtin_expect (lws_errno == -EFAULT || lws_errno == -ENOSYS, 0))
- __builtin_trap ();
-
/* If the kernel LWS call fails with no error, return -EBUSY */
if (__builtin_expect (!lws_errno, 0))
return -EBUSY;
@@ -108,13 +103,13 @@ __kernel_cmpxchg2 (void *mem, const void *oldval, const void *newval,
#define FETCH_AND_OP_2(OP, PFX_OP, INF_OP, TYPE, WIDTH, INDEX) \
TYPE HIDDEN \
- __sync_fetch_and_##OP##_##WIDTH (TYPE *ptr, TYPE val) \
+ __sync_fetch_and_##OP##_##WIDTH (volatile void *ptr, TYPE val) \
{ \
TYPE tmp, newval; \
long failure; \
\
do { \
- tmp = __atomic_load_n (ptr, __ATOMIC_RELAXED); \
+ tmp = __atomic_load_n ((volatile TYPE *)ptr, __ATOMIC_RELAXED); \
newval = PFX_OP (tmp INF_OP val); \
failure = __kernel_cmpxchg2 (ptr, &tmp, &newval, INDEX); \
} while (failure != 0); \
@@ -122,36 +117,36 @@ __kernel_cmpxchg2 (void *mem, const void *oldval, const void *newval,
return tmp; \
}
-FETCH_AND_OP_2 (add, , +, long long, 8, 3)
-FETCH_AND_OP_2 (sub, , -, long long, 8, 3)
-FETCH_AND_OP_2 (or, , |, long long, 8, 3)
-FETCH_AND_OP_2 (and, , &, long long, 8, 3)
-FETCH_AND_OP_2 (xor, , ^, long long, 8, 3)
-FETCH_AND_OP_2 (nand, ~, &, long long, 8, 3)
-
-FETCH_AND_OP_2 (add, , +, short, 2, 1)
-FETCH_AND_OP_2 (sub, , -, short, 2, 1)
-FETCH_AND_OP_2 (or, , |, short, 2, 1)
-FETCH_AND_OP_2 (and, , &, short, 2, 1)
-FETCH_AND_OP_2 (xor, , ^, short, 2, 1)
-FETCH_AND_OP_2 (nand, ~, &, short, 2, 1)
-
-FETCH_AND_OP_2 (add, , +, signed char, 1, 0)
-FETCH_AND_OP_2 (sub, , -, signed char, 1, 0)
-FETCH_AND_OP_2 (or, , |, signed char, 1, 0)
-FETCH_AND_OP_2 (and, , &, signed char, 1, 0)
-FETCH_AND_OP_2 (xor, , ^, signed char, 1, 0)
-FETCH_AND_OP_2 (nand, ~, &, signed char, 1, 0)
+FETCH_AND_OP_2 (add, , +, long long unsigned int, 8, 3)
+FETCH_AND_OP_2 (sub, , -, long long unsigned int, 8, 3)
+FETCH_AND_OP_2 (or, , |, long long unsigned int, 8, 3)
+FETCH_AND_OP_2 (and, , &, long long unsigned int, 8, 3)
+FETCH_AND_OP_2 (xor, , ^, long long unsigned int, 8, 3)
+FETCH_AND_OP_2 (nand, ~, &, long long unsigned int, 8, 3)
+
+FETCH_AND_OP_2 (add, , +, short unsigned int, 2, 1)
+FETCH_AND_OP_2 (sub, , -, short unsigned int, 2, 1)
+FETCH_AND_OP_2 (or, , |, short unsigned int, 2, 1)
+FETCH_AND_OP_2 (and, , &, short unsigned int, 2, 1)
+FETCH_AND_OP_2 (xor, , ^, short unsigned int, 2, 1)
+FETCH_AND_OP_2 (nand, ~, &, short unsigned int, 2, 1)
+
+FETCH_AND_OP_2 (add, , +, unsigned char, 1, 0)
+FETCH_AND_OP_2 (sub, , -, unsigned char, 1, 0)
+FETCH_AND_OP_2 (or, , |, unsigned char, 1, 0)
+FETCH_AND_OP_2 (and, , &, unsigned char, 1, 0)
+FETCH_AND_OP_2 (xor, , ^, unsigned char, 1, 0)
+FETCH_AND_OP_2 (nand, ~, &, unsigned char, 1, 0)
#define OP_AND_FETCH_2(OP, PFX_OP, INF_OP, TYPE, WIDTH, INDEX) \
TYPE HIDDEN \
- __sync_##OP##_and_fetch_##WIDTH (TYPE *ptr, TYPE val) \
+ __sync_##OP##_and_fetch_##WIDTH (volatile void *ptr, TYPE val) \
{ \
TYPE tmp, newval; \
long failure; \
\
do { \
- tmp = __atomic_load_n (ptr, __ATOMIC_RELAXED); \
+ tmp = __atomic_load_n ((volatile TYPE *)ptr, __ATOMIC_RELAXED); \
newval = PFX_OP (tmp INF_OP val); \
failure = __kernel_cmpxchg2 (ptr, &tmp, &newval, INDEX); \
} while (failure != 0); \
@@ -159,36 +154,37 @@ FETCH_AND_OP_2 (nand, ~, &, signed char, 1, 0)
return PFX_OP (tmp INF_OP val); \
}
-OP_AND_FETCH_2 (add, , +, long long, 8, 3)
-OP_AND_FETCH_2 (sub, , -, long long, 8, 3)
-OP_AND_FETCH_2 (or, , |, long long, 8, 3)
-OP_AND_FETCH_2 (and, , &, long long, 8, 3)
-OP_AND_FETCH_2 (xor, , ^, long long, 8, 3)
-OP_AND_FETCH_2 (nand, ~, &, long long, 8, 3)
-
-OP_AND_FETCH_2 (add, , +, short, 2, 1)
-OP_AND_FETCH_2 (sub, , -, short, 2, 1)
-OP_AND_FETCH_2 (or, , |, short, 2, 1)
-OP_AND_FETCH_2 (and, , &, short, 2, 1)
-OP_AND_FETCH_2 (xor, , ^, short, 2, 1)
-OP_AND_FETCH_2 (nand, ~, &, short, 2, 1)
-
-OP_AND_FETCH_2 (add, , +, signed char, 1, 0)
-OP_AND_FETCH_2 (sub, , -, signed char, 1, 0)
-OP_AND_FETCH_2 (or, , |, signed char, 1, 0)
-OP_AND_FETCH_2 (and, , &, signed char, 1, 0)
-OP_AND_FETCH_2 (xor, , ^, signed char, 1, 0)
-OP_AND_FETCH_2 (nand, ~, &, signed char, 1, 0)
+OP_AND_FETCH_2 (add, , +, long long unsigned int, 8, 3)
+OP_AND_FETCH_2 (sub, , -, long long unsigned int, 8, 3)
+OP_AND_FETCH_2 (or, , |, long long unsigned int, 8, 3)
+OP_AND_FETCH_2 (and, , &, long long unsigned int, 8, 3)
+OP_AND_FETCH_2 (xor, , ^, long long unsigned int, 8, 3)
+OP_AND_FETCH_2 (nand, ~, &, long long unsigned int, 8, 3)
+
+OP_AND_FETCH_2 (add, , +, short unsigned int, 2, 1)
+OP_AND_FETCH_2 (sub, , -, short unsigned int, 2, 1)
+OP_AND_FETCH_2 (or, , |, short unsigned int, 2, 1)
+OP_AND_FETCH_2 (and, , &, short unsigned int, 2, 1)
+OP_AND_FETCH_2 (xor, , ^, short unsigned int, 2, 1)
+OP_AND_FETCH_2 (nand, ~, &, short unsigned int, 2, 1)
+
+OP_AND_FETCH_2 (add, , +, unsigned char, 1, 0)
+OP_AND_FETCH_2 (sub, , -, unsigned char, 1, 0)
+OP_AND_FETCH_2 (or, , |, unsigned char, 1, 0)
+OP_AND_FETCH_2 (and, , &, unsigned char, 1, 0)
+OP_AND_FETCH_2 (xor, , ^, unsigned char, 1, 0)
+OP_AND_FETCH_2 (nand, ~, &, unsigned char, 1, 0)
#define FETCH_AND_OP_WORD(OP, PFX_OP, INF_OP) \
- int HIDDEN \
- __sync_fetch_and_##OP##_4 (int *ptr, int val) \
+ unsigned int HIDDEN \
+ __sync_fetch_and_##OP##_4 (volatile void *ptr, unsigned int val) \
{ \
- int tmp; \
+ unsigned int tmp; \
long failure; \
\
do { \
- tmp = __atomic_load_n (ptr, __ATOMIC_RELAXED); \
+ tmp = __atomic_load_n ((volatile unsigned int *)ptr, \
+ __ATOMIC_RELAXED); \
failure = __kernel_cmpxchg (ptr, tmp, PFX_OP (tmp INF_OP val)); \
} while (failure != 0); \
\
@@ -203,14 +199,15 @@ FETCH_AND_OP_WORD (xor, , ^)
FETCH_AND_OP_WORD (nand, ~, &)
#define OP_AND_FETCH_WORD(OP, PFX_OP, INF_OP) \
- int HIDDEN \
- __sync_##OP##_and_fetch_4 (int *ptr, int val) \
+ unsigned int HIDDEN \
+ __sync_##OP##_and_fetch_4 (volatile void *ptr, unsigned int val) \
{ \
- int tmp; \
+ unsigned int tmp; \
long failure; \
\
do { \
- tmp = __atomic_load_n (ptr, __ATOMIC_RELAXED); \
+ tmp = __atomic_load_n ((volatile unsigned int *)ptr, \
+ __ATOMIC_RELAXED); \
failure = __kernel_cmpxchg (ptr, tmp, PFX_OP (tmp INF_OP val)); \
} while (failure != 0); \
\
@@ -228,7 +225,7 @@ typedef unsigned char bool;
#define COMPARE_AND_SWAP_2(TYPE, WIDTH, INDEX) \
TYPE HIDDEN \
- __sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval, \
+ __sync_val_compare_and_swap_##WIDTH (volatile void *ptr, TYPE oldval, \
TYPE newval) \
{ \
TYPE actual_oldval; \
@@ -236,7 +233,8 @@ typedef unsigned char bool;
\
while (1) \
{ \
- actual_oldval = __atomic_load_n (ptr, __ATOMIC_RELAXED); \
+ actual_oldval = __atomic_load_n ((volatile TYPE *)ptr, \
+ __ATOMIC_RELAXED); \
\
if (__builtin_expect (oldval != actual_oldval, 0)) \
return actual_oldval; \
@@ -248,27 +246,29 @@ typedef unsigned char bool;
} \
} \
\
- bool HIDDEN \
- __sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval, \
- TYPE newval) \
+ _Bool HIDDEN \
+ __sync_bool_compare_and_swap_##WIDTH (volatile void *ptr, \
+ TYPE oldval, TYPE newval) \
{ \
long failure = __kernel_cmpxchg2 (ptr, &oldval, &newval, INDEX); \
return (failure == 0); \
}
-COMPARE_AND_SWAP_2 (long long, 8, 3)
-COMPARE_AND_SWAP_2 (short, 2, 1)
-COMPARE_AND_SWAP_2 (char, 1, 0)
+COMPARE_AND_SWAP_2 (long long unsigned int, 8, 3)
+COMPARE_AND_SWAP_2 (short unsigned int, 2, 1)
+COMPARE_AND_SWAP_2 (unsigned char, 1, 0)
-int HIDDEN
-__sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval)
+unsigned int HIDDEN
+__sync_val_compare_and_swap_4 (volatile void *ptr, unsigned int oldval,
+ unsigned int newval)
{
long fail;
- int actual_oldval;
+ unsigned int actual_oldval;
while (1)
{
- actual_oldval = __atomic_load_n (ptr, __ATOMIC_RELAXED);
+ actual_oldval = __atomic_load_n ((volatile unsigned int *)ptr,
+ __ATOMIC_RELAXED);
if (__builtin_expect (oldval != actual_oldval, 0))
return actual_oldval;
@@ -280,8 +280,9 @@ __sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval)
}
}
-bool HIDDEN
-__sync_bool_compare_and_swap_4 (int *ptr, int oldval, int newval)
+_Bool HIDDEN
+__sync_bool_compare_and_swap_4 (volatile void *ptr, unsigned int oldval,
+ unsigned int newval)
{
long failure = __kernel_cmpxchg (ptr, oldval, newval);
return (failure == 0);
@@ -289,55 +290,64 @@ __sync_bool_compare_and_swap_4 (int *ptr, int oldval, int newval)
#define SYNC_LOCK_TEST_AND_SET_2(TYPE, WIDTH, INDEX) \
TYPE HIDDEN \
- __sync_lock_test_and_set_##WIDTH (TYPE *ptr, TYPE val) \
+ __sync_lock_test_and_set_##WIDTH (volatile void *ptr, TYPE val) \
{ \
TYPE oldval; \
long failure; \
\
do { \
- oldval = __atomic_load_n (ptr, __ATOMIC_RELAXED); \
+ oldval = __atomic_load_n ((volatile TYPE *)ptr, \
+ __ATOMIC_RELAXED); \
failure = __kernel_cmpxchg2 (ptr, &oldval, &val, INDEX); \
} while (failure != 0); \
\
return oldval; \
}
-SYNC_LOCK_TEST_AND_SET_2 (long long, 8, 3)
-SYNC_LOCK_TEST_AND_SET_2 (short, 2, 1)
-SYNC_LOCK_TEST_AND_SET_2 (signed char, 1, 0)
+SYNC_LOCK_TEST_AND_SET_2 (long long unsigned int, 8, 3)
+SYNC_LOCK_TEST_AND_SET_2 (short unsigned int, 2, 1)
+SYNC_LOCK_TEST_AND_SET_2 (unsigned char, 1, 0)
-int HIDDEN
-__sync_lock_test_and_set_4 (int *ptr, int val)
+unsigned int HIDDEN
+__sync_lock_test_and_set_4 (volatile void *ptr, unsigned int val)
{
long failure;
- int oldval;
+ unsigned int oldval;
do {
- oldval = __atomic_load_n (ptr, __ATOMIC_RELAXED);
+ oldval = __atomic_load_n ((volatile unsigned int *)ptr, __ATOMIC_RELAXED);
failure = __kernel_cmpxchg (ptr, oldval, val);
} while (failure != 0);
return oldval;
}
-void HIDDEN
-__sync_lock_release_8 (long long *ptr)
-{
- /* All accesses must be complete before we release the lock. */
- __sync_synchronize ();
- *(double *)ptr = 0;
-}
-
-#define SYNC_LOCK_RELEASE_1(TYPE, WIDTH) \
+#define SYNC_LOCK_RELEASE_1(TYPE, WIDTH, INDEX) \
void HIDDEN \
- __sync_lock_release_##WIDTH (TYPE *ptr) \
+ __sync_lock_release_##WIDTH (volatile void *ptr) \
{ \
- /* All accesses must be complete before we release \
- the lock. */ \
- __sync_synchronize (); \
- *ptr = 0; \
+ TYPE oldval, val = 0; \
+ long failure; \
+ \
+ do { \
+ oldval = __atomic_load_n ((volatile TYPE *)ptr, \
+ __ATOMIC_RELAXED); \
+ failure = __kernel_cmpxchg2 (ptr, &oldval, &val, INDEX); \
+ } while (failure != 0); \
}
-SYNC_LOCK_RELEASE_1 (int, 4)
-SYNC_LOCK_RELEASE_1 (short, 2)
-SYNC_LOCK_RELEASE_1 (signed char, 1)
+SYNC_LOCK_RELEASE_1 (long long unsigned int, 8, 3)
+SYNC_LOCK_RELEASE_1 (short unsigned int, 2, 1)
+SYNC_LOCK_RELEASE_1 (unsigned char, 1, 0)
+
+void HIDDEN
+__sync_lock_release_4 (volatile void *ptr)
+{
+ long failure;
+ unsigned int oldval;
+
+ do {
+ oldval = __atomic_load_n ((volatile unsigned int *)ptr, __ATOMIC_RELAXED);
+ failure = __kernel_cmpxchg (ptr, oldval, 0);
+ } while (failure != 0);
+}
diff --git a/libgcc/config/pa/milli64.S b/libgcc/config/pa/milli64.S
index 12013563789..b72ca063cc9 100644
--- a/libgcc/config/pa/milli64.S
+++ b/libgcc/config/pa/milli64.S
@@ -222,19 +222,26 @@ GSYM($$dyncall)
.proc
.callinfo millicode
.entry
- bb,>=,n %r22,30,LREF(1) ; branch if not plabel address
- depi 0,31,2,%r22 ; clear the two least significant bits
- ldw 4(%r22),%r19 ; load new LTP value
- ldw 0(%r22),%r22 ; load address of target
-LSYM(1)
#ifdef LINUX
- bv %r0(%r22) ; branch to the real target
+ extru,<> %r22,30,1,%r0 ; nullify if plabel bit set
+ bv,n %r0(%r22) ; branch to target
+ ldw -2(%r22),%r21 ; load address of target
+ bv %r0(%r21) ; branch to the real target
+ ldw 2(%r22),%r19 ; load new LTP value
#else
+ bb,>=,n %r22,30,LREF(1) ; branch if not plabel address
+ ldw -2(%r22),%r21 ; load address of target to r21
+ ldsid (%sr0,%r21),%r1 ; get the "space ident" selected by r21
+ ldw 2(%r22),%r19 ; load new LTP value
+ mtsp %r1,%sr0 ; move that space identifier into sr0
+ be 0(%sr0,%r21) ; branch to the real target
+ stw %r2,-24(%r30) ; save return address into frame marker
+LSYM(1)
ldsid (%sr0,%r22),%r1 ; get the "space ident" selected by r22
mtsp %r1,%sr0 ; move that space identifier into sr0
- be 0(%sr0,%r22) ; branch to the real target
-#endif
+ be 0(%sr0,%r22) ; branch to the target
stw %r2,-24(%r30) ; save return address into frame marker
+#endif
.exit
.procend
#endif
diff --git a/libgcc/config/rs6000/t-darwin b/libgcc/config/rs6000/t-darwin
index 61da0bdf13a..8b513bdb1d7 100644
--- a/libgcc/config/rs6000/t-darwin
+++ b/libgcc/config/rs6000/t-darwin
@@ -1,25 +1,57 @@
-DARWIN_EXTRA_CRT_BUILD_CFLAGS = -mlongcall -mmacosx-version-min=10.4
crt2.o: $(srcdir)/config/rs6000/darwin-crt2.c
- $(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -c $<
+ $(crt_compile) -mmacosx-version-min=10.1 -c $<
+
+# The sources for this indicate that there are some parts that
+# don't apply >= 10.4
+crt3_2.o: $(srcdir)/config/darwin-crt3.c
+ $(crt_compile) -mmacosx-version-min=10.1 -c $<
+
+# The outlined register save/restore functions need to run anywhere, and
+# they must be leaf functions suitable for use in an endfile.
+
+PPC_ENDFILE_SRC = \
+ $(srcdir)/config/rs6000/darwin-gpsave.S \
+ $(srcdir)/config/rs6000/darwin-fpsave.S \
+ $(srcdir)/config/rs6000/darwin-vecsave.S
+
+PPC_ENDFILE_OBJS = \
+ darwin-gpsave.o \
+ darwin-fpsave.o \
+ darwin-vecsave.o
+
+darwin-gpsave.o: $(srcdir)/config/rs6000/darwin-gpsave.S
+ $(crt_compile) -mmacosx-version-min=10.1 -c $<
+
+darwin-fpsave.o: $(srcdir)/config/rs6000/darwin-fpsave.S
+ $(crt_compile) -mmacosx-version-min=10.1 -c $<
+
+darwin-vecsave.o: $(srcdir)/config/rs6000/darwin-vecsave.S
+ $(crt_compile) -mmacosx-version-min=10.1 -c $<
+
+# We build these into a library, so that they are only linked as needed and not
+# forced into every object.
+
+libef_ppc.a: $(PPC_ENDFILE_OBJS)
+ $(AR_CREATE_FOR_TARGET) $@ $(PPC_ENDFILE_OBJS)
+ $(RANLIB_FOR_TARGET) $@
+
+dw_ppc.o: $(srcdir)/config/rs6000/darwin-world.S
+ $(crt_compile) -mmacosx-version-min=10.1 -c $<
LIB2ADD = $(srcdir)/config/rs6000/darwin-tramp.S \
$(srcdir)/config/darwin-64.c \
- $(srcdir)/config/rs6000/darwin-fpsave.S \
- $(srcdir)/config/rs6000/darwin-gpsave.S \
- $(srcdir)/config/rs6000/darwin-world.S \
- $(srcdir)/config/rs6000/ppc64-fp.c
-
-LIB2ADD_ST = \
- $(srcdir)/config/rs6000/darwin-vecsave.S
+ $(srcdir)/config/rs6000/darwin-world.S
# The .S files above are designed to run on all processors, even though
# they use AltiVec instructions.
# -Wa is used because -force_cpusubtype_ALL doesn't work with -dynamiclib.
-# -mmacosx-version-min=10.4 is used to provide compatibility for code from
-# earlier OSX versions.
-HOST_LIBGCC2_CFLAGS += -Wa,-force_cpusubtype_ALL -mmacosx-version-min=10.4
+HOST_LIBGCC2_CFLAGS += -Wa,-force_cpusubtype_ALL
+
+# Although the default for 10.4 is G3, we need the unwinder to be built
+# with vector support so that the "save/rest_world" outlined functions are
+# correctly invoked.
unwind-dw2_s.o: HOST_LIBGCC2_CFLAGS += -maltivec
unwind-dw2.o: HOST_LIBGCC2_CFLAGS += -maltivec
diff --git a/libgcc/config/rs6000/t-darwin64 b/libgcc/config/rs6000/t-darwin64
index 50f09d6de1a..999679fc3cb 100644
--- a/libgcc/config/rs6000/t-darwin64
+++ b/libgcc/config/rs6000/t-darwin64
@@ -1,7 +1 @@
LIB2_SIDITI_CONV_FUNCS = yes
-
-LIB2ADD = $(srcdir)/config/rs6000/darwin-tramp.S \
- $(srcdir)/config/darwin-64.c \
- $(srcdir)/config/rs6000/darwin-fpsave.S \
- $(srcdir)/config/rs6000/darwin-gpsave.S \
- $(srcdir)/config/rs6000/darwin-world.S
diff --git a/libgcc/config/t-darwin b/libgcc/config/t-darwin
index 13ca6ed99d3..d9d268e352f 100644
--- a/libgcc/config/t-darwin
+++ b/libgcc/config/t-darwin
@@ -1,21 +1,15 @@
# Set this as a minimum (unless overriden by arch t-files) since it's a
# reasonable lowest common denominator that works for all our archs.
-HOST_LIBGCC2_CFLAGS += -mmacosx-version-min=10.5
+HOST_LIBGCC2_CFLAGS += -mmacosx-version-min=10.4
crt3.o: $(srcdir)/config/darwin-crt3.c
- $(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -c $<
+ $(crt_compile) -mmacosx-version-min=10.4 -c $<
crttms.o: $(srcdir)/config/darwin-crt-tm.c
- $(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -DSTART -c $<
+ $(crt_compile) -mmacosx-version-min=10.4 -DSTART -c $<
crttme.o: $(srcdir)/config/darwin-crt-tm.c
- $(crt_compile) $(DARWIN_EXTRA_CRT_BUILD_CFLAGS) -DEND -c $<
-
-# -pipe because there's an assembler bug, 4077127, which causes
-# it to not properly process the first # directive, causing temporary
-# file names to appear in stabs, causing the bootstrap to fail. Using -pipe
-# works around this by not having any temporary file names.
-HOST_LIBGCC2_CFLAGS += -pipe
+ $(crt_compile) -mmacosx-version-min=10.4 -DEND -c $<
# Use unwind-dw2-fde-darwin
LIB2ADDEH = $(srcdir)/unwind-dw2.c $(srcdir)/config/unwind-dw2-fde-darwin.c \
diff --git a/libquadmath/ChangeLog b/libquadmath/ChangeLog
index 37ce3985943..3a1083f0067 100644
--- a/libquadmath/ChangeLog
+++ b/libquadmath/ChangeLog
@@ -1,3 +1,12 @@
+2019-11-21 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2019-08-02 Jakub Jelinek <jakub@redhat.com>
+
+ * quadmath.h (M_Eq, M_LOG2Eq, M_LOG10Eq, M_LN2q, M_LN10q, M_PIq,
+ M_PI_2q, M_PI_4q, M_1_PIq, M_2_PIq, M_2_SQRTPIq, M_SQRT2q,
+ M_SQRT1_2q): Use two more decimal places.
+
2019-02-22 Release Manager
* GCC 8.3.0 released.
diff --git a/libquadmath/quadmath.h b/libquadmath/quadmath.h
index 95487b7d6ef..2ab80e3aaa5 100644
--- a/libquadmath/quadmath.h
+++ b/libquadmath/quadmath.h
@@ -1,5 +1,5 @@
/* GCC Quad-Precision Math Library
- Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+ Copyright (C) 2010-2019 Free Software Foundation, Inc.
Written by Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
This file is part of the libquadmath library.
@@ -163,19 +163,19 @@ extern int quadmath_snprintf (char *str, size_t size,
(floating constant exceeds range of ‘__float128’) */
/* #define HUGE_VALQ (__extension__ 0x1.0p32767Q) */
-#define M_Eq 2.7182818284590452353602874713526625Q /* e */
-#define M_LOG2Eq 1.4426950408889634073599246810018921Q /* log_2 e */
-#define M_LOG10Eq 0.4342944819032518276511289189166051Q /* log_10 e */
-#define M_LN2q 0.6931471805599453094172321214581766Q /* log_e 2 */
-#define M_LN10q 2.3025850929940456840179914546843642Q /* log_e 10 */
-#define M_PIq 3.1415926535897932384626433832795029Q /* pi */
-#define M_PI_2q 1.5707963267948966192313216916397514Q /* pi/2 */
-#define M_PI_4q 0.7853981633974483096156608458198757Q /* pi/4 */
-#define M_1_PIq 0.3183098861837906715377675267450287Q /* 1/pi */
-#define M_2_PIq 0.6366197723675813430755350534900574Q /* 2/pi */
-#define M_2_SQRTPIq 1.1283791670955125738961589031215452Q /* 2/sqrt(pi) */
-#define M_SQRT2q 1.4142135623730950488016887242096981Q /* sqrt(2) */
-#define M_SQRT1_2q 0.7071067811865475244008443621048490Q /* 1/sqrt(2) */
+#define M_Eq 2.718281828459045235360287471352662498Q /* e */
+#define M_LOG2Eq 1.442695040888963407359924681001892137Q /* log_2 e */
+#define M_LOG10Eq 0.434294481903251827651128918916605082Q /* log_10 e */
+#define M_LN2q 0.693147180559945309417232121458176568Q /* log_e 2 */
+#define M_LN10q 2.302585092994045684017991454684364208Q /* log_e 10 */
+#define M_PIq 3.141592653589793238462643383279502884Q /* pi */
+#define M_PI_2q 1.570796326794896619231321691639751442Q /* pi/2 */
+#define M_PI_4q 0.785398163397448309615660845819875721Q /* pi/4 */
+#define M_1_PIq 0.318309886183790671537767526745028724Q /* 1/pi */
+#define M_2_PIq 0.636619772367581343075535053490057448Q /* 2/pi */
+#define M_2_SQRTPIq 1.128379167095512573896158903121545172Q /* 2/sqrt(pi) */
+#define M_SQRT2q 1.414213562373095048801688724209698079Q /* sqrt(2) */
+#define M_SQRT1_2q 0.707106781186547524400844362104849039Q /* 1/sqrt(2) */
#define __quadmath_extern_inline \
extern inline __attribute__ ((__gnu_inline__))
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 098fc6a5fb4..16f3f106b73 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,81 @@
+2019-10-24 Jonathan Wakely <jwakely@redhat.com>
+
+ Backport from mainline
+ 2019-06-06 Jonathan Wakely <jwakely@redhat.com>
+
+ * testsuite/20_util/is_nothrow_invocable/value.cc: Test converting to
+ void.
+ * testsuite/experimental/names.cc: Do not run for C++98 mode. Do not
+ include Library Fundamentals or Networking headers in C++11 mode.
+
+ Backport from mainline
+ 2019-10-22 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/memoryfwd.h (uses_allocator): Do not declare for C++98.
+ * testsuite/17_intro/names.cc: Check uses_allocator in C++98.
+
+ Backport from mainline
+ 2019-10-18 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/92143
+ * libsupc++/new_opa.cc (operator new) [__APPLE__]: Increase alignment
+ to at least sizeof(void*).
+
+ Backport from mainline
+ 2019-10-08 Jonathan Wakely <jwakely@redhat.com>
+
+ * doc/Makefile.am (doc-html-docbook-regenerate): New target.
+ (${docbook_outdir}/html): Do not create unused 'html/ext' directory.
+ * doc/Makefile.in: Regenerate.
+ * doc/xml/manual/documentation_hacking.xml: Document new target.
+ * doc/html/*: Regenerate.
+
+ * doc/xml/manual/allocator.xml: Use archived copy of CUJ article.
+
+ Backport from mainline
+ 2019-05-31 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/xml/manual/allocator.xml: Move hoard.org back to http.
+
+ Backport from mainline
+ 2019-10-11 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/92059
+ * include/tr2/dynamic_bitset (__dynamic_bitset_base): Define all
+ special member functions as defaulted. Add noexcept to most members.
+ (__dynamic_bitset_base(size_t, unsigned long long, const _Alloc&)):
+ Mask off unwanted bits in the __val parameter. Avoid undefined left
+ shifts.
+ (__dynamic_bitset_base::_M_assign): Remove.
+ (__dynamic_bitset_base::_M_do_reset): Use std::fill.
+ (__dynamic_bitset_base::_M_are_all_aux): Avoid integer promotion when
+ block_type has lower rank than int.
+ (dynamic_bitset): Add noexcept to most members. Use injected-class-name
+ in return types and parameter types.
+ (dynamic_bitset::_M_Nb): Add default member initializer.
+ (dynamic_bitset(), dynamic_bitset(const dynamic_bitset&)): Define as
+ defaulted.
+ (dynamic_bitset(dynamic_bitset&&)): Clear source object after move.
+ (dynamic_bitset::operator=(const dynamic_bitset&)): Define as
+ defaulted.
+ (dynamic_bitset::operator=(dynamic_bitset&&)): Add noexcept-specifier.
+ Define without using swap, to propagate allocator correctly.
+ (dynamic_bitset(const char*, const _Alloc&)): Use strlen.
+ (dynamic_bitset::_M_do_sanitize, dynamic_bitset::_M_do_fill): Use
+ casts to avoid unwanted integer promotions.
+ (dynamic_bitset::_M_copy_from_ptr): Rearrange template parameters and
+ add default template arguments and default argument to simplify usage.
+ (dynamic_bitset::_M_copy_from_string): Adjust call to _M_copy_from_ptr.
+ (operator==(const dynamic_bitset&, const dynamic_bitset&))
+ (operator<(const dynamic_bitset&, const dynamic_bitset&)): Use _M_Nb.
+ * include/tr2/dynamic_bitset.tcc (dynamic_bitset::_M_copy_from_ptr):
+ Adjust template parameters to match declaration.
+ * testsuite/tr2/dynamic_bitset/cmp.cc: New test.
+ * testsuite/tr2/dynamic_bitset/cons.cc: New test.
+ * testsuite/tr2/dynamic_bitset/copy.cc: New test.
+ * testsuite/tr2/dynamic_bitset/move.cc: New test.
+ * testsuite/tr2/dynamic_bitset/pr92059.cc: New test.
+
2019-09-11 Jonathan Wakely <jwakely@redhat.com>
* python/libstdcxx/v6/xmethods.py (SharedPtrUseCountWorker.__call__):
diff --git a/libstdc++-v3/doc/Makefile.am b/libstdc++-v3/doc/Makefile.am
index ffe06a184c8..55204b6807e 100644
--- a/libstdc++-v3/doc/Makefile.am
+++ b/libstdc++-v3/doc/Makefile.am
@@ -477,7 +477,6 @@ ${docbook_outdir}/fo:
${docbook_outdir}/html:
mkdir -p ${docbook_outdir}/html
- mkdir -p ${docbook_outdir}/html/ext
mkdir -p ${docbook_outdir}/html/images
mkdir -p ${docbook_outdir}/html/manual
@@ -546,6 +545,12 @@ stamp-html-docbook: $(xml_sources) ${docbook_outdir}/html
doc-html-docbook: stamp-html-docbook-data
+# Generate the HTML pages and copy them back to the source tree.
+doc-html-docbook-regenerate: doc-html-docbook
+ $(INSTALL_DATA) ${docbook_outdir}/html/*.html ${top_srcdir}/doc/html
+ $(INSTALL_DATA) ${docbook_outdir}/html/images/* ${top_srcdir}/doc/html/images
+ $(INSTALL_DATA) ${docbook_outdir}/html/manual/*.html ${top_srcdir}/doc/html/manual
+
# HTML, all one page
# NB: Have to generate customization XSL for UTF-8 output.
manual_html = ${docbook_outdir}/html/libstdc++-manual-single.html
diff --git a/libstdc++-v3/doc/Makefile.in b/libstdc++-v3/doc/Makefile.in
index eaec7f4173b..d7a3361686a 100644
--- a/libstdc++-v3/doc/Makefile.in
+++ b/libstdc++-v3/doc/Makefile.in
@@ -927,7 +927,6 @@ ${docbook_outdir}/fo:
${docbook_outdir}/html:
mkdir -p ${docbook_outdir}/html
- mkdir -p ${docbook_outdir}/html/ext
mkdir -p ${docbook_outdir}/html/images
mkdir -p ${docbook_outdir}/html/manual
@@ -979,6 +978,12 @@ stamp-html-docbook: $(xml_sources) ${docbook_outdir}/html
$(STAMP) stamp-html-docbook
doc-html-docbook: stamp-html-docbook-data
+
+# Generate the HTML pages and copy them back to the source tree.
+doc-html-docbook-regenerate: doc-html-docbook
+ $(INSTALL_DATA) ${docbook_outdir}/html/*.html ${top_srcdir}/doc/html
+ $(INSTALL_DATA) ${docbook_outdir}/html/images/* ${top_srcdir}/doc/html/images
+ $(INSTALL_DATA) ${docbook_outdir}/html/manual/*.html ${top_srcdir}/doc/html/manual
stamp-html-single-docbook: $(xml_sources) ${docbook_outdir}/html
@echo "Generating html single file..."
$(XSLTPROC) $(XSLT_PARAM) $(XSLT_FLAGS) -o ${manual_html} \
diff --git a/libstdc++-v3/doc/html/manual/documentation_hacking.html b/libstdc++-v3/doc/html/manual/documentation_hacking.html
index ec60d5e3408..e14f94709a7 100644
--- a/libstdc++-v3/doc/html/manual/documentation_hacking.html
+++ b/libstdc++-v3/doc/html/manual/documentation_hacking.html
@@ -381,11 +381,16 @@
</p><p>
</p><pre class="screen"><strong class="userinput"><code>make doc-xml-single-docbook</code></strong></pre><p>
</p><p>
- Generated files are output into separate sub directores of
+ Generated files are output into separate sub-directores of
<code class="filename">doc/docbook/</code> in the
build directory, based on the output format. For instance, the
HTML docs will be in <code class="filename">doc/docbook/html</code>.
</p><p>
+ The </p><pre class="screen">doc-html-docbook-regenerate</pre><p> target will generate
+ the HTML files and copy them back to the libstdc++ source tree.
+ This can be used to update the HTML files that are checked in to
+ version control.
+ </p><p>
If the Docbook stylesheets are installed in a custom location,
one can use the variable <code class="literal">XSL_STYLE_DIR</code> to
override the Makefile defaults. For example:
diff --git a/libstdc++-v3/doc/html/manual/memory.html b/libstdc++-v3/doc/html/manual/memory.html
index f79a180613e..72e73c6b5fa 100644
--- a/libstdc++-v3/doc/html/manual/memory.html
+++ b/libstdc++-v3/doc/html/manual/memory.html
@@ -314,13 +314,13 @@
</em>. </span>
isoc++_1998
<span class="pagenums">20.4 Memory. </span></p></div><div class="biblioentry"><a id="id-1.3.4.4.4.3.9.3"></a><p><span class="title"><em>
- <a class="link" href="http://www.drdobbs.com/the-standard-librarian-what-are-allocato/184403759" target="_top">
+ <a class="link" href="https://web.archive.org/web/20190622154249/http://www.drdobbs.com/the-standard-librarian-what-are-allocato/184403759" target="_top">
The Standard Librarian: What Are Allocators Good For?
- </a>
- </em>. </span><span class="author"><span class="firstname">Matt</span> <span class="surname">Austern</span>. </span><span class="publisher"><span class="publishername">
+ </a>
+ </em>. </span><span class="author"><span class="firstname">Matt</span> <span class="surname">Austern</span>. </span><span class="publisher"><span class="publishername">
C/C++ Users Journal
- . </span></span></p></div><div class="biblioentry"><a id="id-1.3.4.4.4.3.9.4"></a><p><span class="title"><em>
- <a class="link" href="https://www.hoard.org" target="_top">
+ . </span></span><span class="pubdate">2000-12. </span></p></div><div class="biblioentry"><a id="id-1.3.4.4.4.3.9.4"></a><p><span class="title"><em>
+ <a class="link" href="http://hoard.org" target="_top">
The Hoard Memory Allocator
</a>
</em>. </span><span class="author"><span class="firstname">Emery</span> <span class="surname">Berger</span>. </span></p></div><div class="biblioentry"><a id="id-1.3.4.4.4.3.9.5"></a><p><span class="title"><em>
diff --git a/libstdc++-v3/doc/xml/manual/allocator.xml b/libstdc++-v3/doc/xml/manual/allocator.xml
index 31ee0f0ba88..058a43dedca 100644
--- a/libstdc++-v3/doc/xml/manual/allocator.xml
+++ b/libstdc++-v3/doc/xml/manual/allocator.xml
@@ -502,12 +502,12 @@
</biblioentry>
<biblioentry>
- <title>
- <link xmlns:xlink="http://www.w3.org/1999/xlink"
- xlink:href="http://www.drdobbs.com/the-standard-librarian-what-are-allocato/184403759">
+ <title>
+ <link xmlns:xlink="http://www.w3.org/1999/xlink"
+ xlink:href="https://web.archive.org/web/20190622154249/http://www.drdobbs.com/the-standard-librarian-what-are-allocato/184403759">
The Standard Librarian: What Are Allocators Good For?
- </link>
- </title>
+ </link>
+ </title>
<author><personname><firstname>Matt</firstname><surname>Austern</surname></personname></author>
<publisher>
@@ -515,12 +515,13 @@
C/C++ Users Journal
</publishername>
</publisher>
+ <pubdate>2000-12</pubdate>
</biblioentry>
<biblioentry>
<title>
<link xmlns:xlink="http://www.w3.org/1999/xlink"
- xlink:href="https://www.hoard.org">
+ xlink:href="http://hoard.org">
The Hoard Memory Allocator
</link>
</title>
diff --git a/libstdc++-v3/doc/xml/manual/documentation_hacking.xml b/libstdc++-v3/doc/xml/manual/documentation_hacking.xml
index 463786d6313..271285d5f39 100644
--- a/libstdc++-v3/doc/xml/manual/documentation_hacking.xml
+++ b/libstdc++-v3/doc/xml/manual/documentation_hacking.xml
@@ -805,7 +805,7 @@
</para>
<para>
- Generated files are output into separate sub directores of
+ Generated files are output into separate sub-directores of
<filename class="directory">doc/docbook/</filename> in the
build directory, based on the output format. For instance, the
HTML docs will be in <filename
@@ -813,6 +813,13 @@
</para>
<para>
+ The <screen>doc-html-docbook-regenerate</screen> target will generate
+ the HTML files and copy them back to the libstdc++ source tree.
+ This can be used to update the HTML files that are checked in to
+ version control.
+ </para>
+
+ <para>
If the Docbook stylesheets are installed in a custom location,
one can use the variable <literal>XSL_STYLE_DIR</literal> to
override the Makefile defaults. For example:
diff --git a/libstdc++-v3/include/bits/memoryfwd.h b/libstdc++-v3/include/bits/memoryfwd.h
index 9ecadba3055..4a77e10d597 100644
--- a/libstdc++-v3/include/bits/memoryfwd.h
+++ b/libstdc++-v3/include/bits/memoryfwd.h
@@ -66,9 +66,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
template<>
class allocator<void>;
+#if __cplusplus >= 201103L
/// Declare uses_allocator so it can be specialized in \<queue\> etc.
template<typename, typename>
struct uses_allocator;
+#endif
/// @} group memory
diff --git a/libstdc++-v3/include/tr2/dynamic_bitset b/libstdc++-v3/include/tr2/dynamic_bitset
index f76c8faf6e3..4f7a9bc9452 100644
--- a/libstdc++-v3/include/tr2/dynamic_bitset
+++ b/libstdc++-v3/include/tr2/dynamic_bitset
@@ -34,10 +34,9 @@
#include <limits>
#include <vector>
#include <string>
-#include <memory> // For std::allocator
-#include <bits/functexcept.h> // For invalid_argument, out_of_range,
- // overflow_error
-#include <iosfwd>
+#include <istream>
+#include <bits/functexcept.h>
+#include <bits/stl_algo.h> // For fill
#include <bits/cxxabi_forced.h>
namespace std _GLIBCXX_VISIBILITY(default)
@@ -76,41 +75,48 @@ namespace tr2
std::vector<block_type, allocator_type> _M_w;
explicit
- __dynamic_bitset_base(const allocator_type& __alloc = allocator_type())
+ __dynamic_bitset_base(const allocator_type& __alloc)
: _M_w(__alloc)
{ }
- explicit
- __dynamic_bitset_base(__dynamic_bitset_base&& __b)
- { this->_M_w.swap(__b._M_w); }
+ __dynamic_bitset_base() = default;
+ __dynamic_bitset_base(const __dynamic_bitset_base&) = default;
+ __dynamic_bitset_base(__dynamic_bitset_base&& __b) = default;
+ __dynamic_bitset_base& operator=(const __dynamic_bitset_base&) = default;
+ __dynamic_bitset_base& operator=(__dynamic_bitset_base&&) = default;
+ ~__dynamic_bitset_base() = default;
explicit
__dynamic_bitset_base(size_type __nbits, unsigned long long __val = 0ULL,
const allocator_type& __alloc = allocator_type())
- : _M_w(__nbits / _S_bits_per_block
- + (__nbits % _S_bits_per_block > 0),
- __val, __alloc)
+ : _M_w(__nbits / _S_bits_per_block + (__nbits % _S_bits_per_block > 0),
+ block_type(0), __alloc)
{
- unsigned long long __mask = ~static_cast<block_type>(0);
- size_t __n = std::min(this->_M_w.size(),
- sizeof(unsigned long long) / sizeof(block_type));
- for (size_t __i = 0; __i < __n; ++__i)
+ if (__nbits < std::numeric_limits<decltype(__val)>::digits)
+ __val &= ~(-1ULL << __nbits);
+ if (__val == 0)
+ return;
+
+ if _GLIBCXX17_CONSTEXPR (sizeof(__val) == sizeof(block_type))
+ _M_w[0] = __val;
+ else
{
- this->_M_w[__i] = (__val & __mask) >> (__i * _S_bits_per_block);
- __mask <<= _S_bits_per_block;
+ const size_t __n
+ = std::min(_M_w.size(), sizeof(__val) / sizeof(block_type));
+ for (size_t __i = 0; __val && __i < __n; ++__i)
+ {
+ _M_w[__i] = static_cast<block_type>(__val);
+ __val >>= _S_bits_per_block;
+ }
}
}
void
- _M_assign(const __dynamic_bitset_base& __b)
- { this->_M_w = __b._M_w; }
-
- void
- _M_swap(__dynamic_bitset_base& __b)
+ _M_swap(__dynamic_bitset_base& __b) noexcept
{ this->_M_w.swap(__b._M_w); }
void
- _M_clear()
+ _M_clear() noexcept
{ this->_M_w.clear(); }
void
@@ -129,7 +135,7 @@ namespace tr2
}
allocator_type
- _M_get_allocator() const
+ _M_get_allocator() const noexcept
{ return this->_M_w.get_allocator(); }
static size_type
@@ -149,23 +155,23 @@ namespace tr2
{ return (static_cast<block_type>(1)) << _S_whichbit(__pos); }
block_type&
- _M_getword(size_type __pos)
+ _M_getword(size_type __pos) noexcept
{ return this->_M_w[_S_whichword(__pos)]; }
block_type
- _M_getword(size_type __pos) const
+ _M_getword(size_type __pos) const noexcept
{ return this->_M_w[_S_whichword(__pos)]; }
block_type&
- _M_hiword()
+ _M_hiword() noexcept
{ return this->_M_w[_M_w.size() - 1]; }
block_type
- _M_hiword() const
+ _M_hiword() const noexcept
{ return this->_M_w[_M_w.size() - 1]; }
void
- _M_do_and(const __dynamic_bitset_base& __x)
+ _M_do_and(const __dynamic_bitset_base& __x) noexcept
{
if (__x._M_w.size() == this->_M_w.size())
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
@@ -175,7 +181,7 @@ namespace tr2
}
void
- _M_do_or(const __dynamic_bitset_base& __x)
+ _M_do_or(const __dynamic_bitset_base& __x) noexcept
{
if (__x._M_w.size() == this->_M_w.size())
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
@@ -185,7 +191,7 @@ namespace tr2
}
void
- _M_do_xor(const __dynamic_bitset_base& __x)
+ _M_do_xor(const __dynamic_bitset_base& __x) noexcept
{
if (__x._M_w.size() == this->_M_w.size())
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
@@ -195,7 +201,7 @@ namespace tr2
}
void
- _M_do_dif(const __dynamic_bitset_base& __x)
+ _M_do_dif(const __dynamic_bitset_base& __x) noexcept
{
if (__x._M_w.size() == this->_M_w.size())
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
@@ -211,28 +217,27 @@ namespace tr2
_M_do_right_shift(size_t __shift);
void
- _M_do_flip()
+ _M_do_flip() noexcept
{
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
this->_M_w[__i] = ~this->_M_w[__i];
}
void
- _M_do_set()
+ _M_do_set() noexcept
{
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
- this->_M_w[__i] = ~static_cast<block_type>(0);
+ this->_M_w[__i] = static_cast<block_type>(-1);
}
void
- _M_do_reset()
+ _M_do_reset() noexcept
{
- for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
- this->_M_w[__i] = static_cast<block_type>(0);
+ std::fill(_M_w.begin(), _M_w.end(), static_cast<block_type>(0));
}
bool
- _M_is_equal(const __dynamic_bitset_base& __x) const
+ _M_is_equal(const __dynamic_bitset_base& __x) const noexcept
{
if (__x._M_w.size() == this->_M_w.size())
{
@@ -246,7 +251,7 @@ namespace tr2
}
bool
- _M_is_less(const __dynamic_bitset_base& __x) const
+ _M_is_less(const __dynamic_bitset_base& __x) const noexcept
{
if (__x._M_w.size() == this->_M_w.size())
{
@@ -264,17 +269,17 @@ namespace tr2
}
size_t
- _M_are_all_aux() const
+ _M_are_all_aux() const noexcept
{
for (size_t __i = 0; __i < this->_M_w.size() - 1; ++__i)
- if (_M_w[__i] != ~static_cast<block_type>(0))
+ if (_M_w[__i] != static_cast<block_type>(-1))
return 0;
return ((this->_M_w.size() - 1) * _S_bits_per_block
+ __builtin_popcountll(this->_M_hiword()));
}
bool
- _M_is_any() const
+ _M_is_any() const noexcept
{
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
if (this->_M_w[__i] != static_cast<block_type>(0))
@@ -283,7 +288,7 @@ namespace tr2
}
bool
- _M_is_subset_of(const __dynamic_bitset_base& __b)
+ _M_is_subset_of(const __dynamic_bitset_base& __b) noexcept
{
if (__b._M_w.size() == this->_M_w.size())
{
@@ -297,7 +302,7 @@ namespace tr2
}
bool
- _M_is_proper_subset_of(const __dynamic_bitset_base& __b) const
+ _M_is_proper_subset_of(const __dynamic_bitset_base& __b) const noexcept
{
if (this->is_subset_of(__b))
{
@@ -311,7 +316,7 @@ namespace tr2
}
size_t
- _M_do_count() const
+ _M_do_count() const noexcept
{
size_t __result = 0;
for (size_t __i = 0; __i < this->_M_w.size(); ++__i)
@@ -357,6 +362,7 @@ namespace tr2
*
* See N2050,
* Proposal to Add a Dynamically Sizeable Bitset to the Standard Library.
+ * http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2006/n2050.pdf
*
* In the general unoptimized case, storage is allocated in
* word-sized blocks. Let B be the number of bits in a word, then
@@ -435,7 +441,7 @@ namespace tr2
{
size_type __shift = this->_M_Nb % bits_per_block;
if (__shift > 0)
- this->_M_hiword() &= ~((~static_cast<block_type>(0)) << __shift);
+ this->_M_hiword() &= block_type(~(block_type(-1) << __shift));
}
// Set the unused bits in the uppermost word.
@@ -444,22 +450,22 @@ namespace tr2
{
size_type __shift = this->_M_Nb % bits_per_block;
if (__shift > 0)
- this->_M_hiword() |= ((~static_cast<block_type>(0)) << __shift);
+ this->_M_hiword() |= block_type(block_type(-1) << __shift);
}
/**
* These versions of single-bit set, reset, flip, and test
* do no range checking.
*/
- dynamic_bitset<_WordT, _Alloc>&
- _M_unchecked_set(size_type __pos)
+ dynamic_bitset&
+ _M_unchecked_set(size_type __pos) noexcept
{
this->_M_getword(__pos) |= _Base::_S_maskbit(__pos);
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
- _M_unchecked_set(size_type __pos, int __val)
+ dynamic_bitset&
+ _M_unchecked_set(size_type __pos, int __val) noexcept
{
if (__val)
this->_M_getword(__pos) |= _Base::_S_maskbit(__pos);
@@ -468,26 +474,26 @@ namespace tr2
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
- _M_unchecked_reset(size_type __pos)
+ dynamic_bitset&
+ _M_unchecked_reset(size_type __pos) noexcept
{
this->_M_getword(__pos) &= ~_Base::_S_maskbit(__pos);
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
- _M_unchecked_flip(size_type __pos)
+ dynamic_bitset&
+ _M_unchecked_flip(size_type __pos) noexcept
{
this->_M_getword(__pos) ^= _Base::_S_maskbit(__pos);
return *this;
}
bool
- _M_unchecked_test(size_type __pos) const
+ _M_unchecked_test(size_type __pos) const noexcept
{ return ((this->_M_getword(__pos) & _Base::_S_maskbit(__pos))
!= static_cast<_WordT>(0)); }
- size_type _M_Nb;
+ size_type _M_Nb = 0;
public:
/**
@@ -511,22 +517,16 @@ namespace tr2
block_type *_M_wp;
size_type _M_bpos;
- // left undefined
- reference();
-
public:
- reference(dynamic_bitset& __b, size_type __pos)
+ reference(dynamic_bitset& __b, size_type __pos) noexcept
{
this->_M_wp = &__b._M_getword(__pos);
this->_M_bpos = _Base::_S_whichbit(__pos);
}
- ~reference()
- { }
-
// For b[i] = __x;
reference&
- operator=(bool __x)
+ operator=(bool __x) noexcept
{
if (__x)
*this->_M_wp |= _Base::_S_maskbit(this->_M_bpos);
@@ -537,7 +537,7 @@ namespace tr2
// For b[i] = b[__j];
reference&
- operator=(const reference& __j)
+ operator=(const reference& __j) noexcept
{
if ((*(__j._M_wp) & _Base::_S_maskbit(__j._M_bpos)))
*this->_M_wp |= _Base::_S_maskbit(this->_M_bpos);
@@ -548,16 +548,16 @@ namespace tr2
// Flips the bit
bool
- operator~() const
+ operator~() const noexcept
{ return (*(_M_wp) & _Base::_S_maskbit(this->_M_bpos)) == 0; }
// For __x = b[i];
- operator bool() const
+ operator bool() const noexcept
{ return (*(this->_M_wp) & _Base::_S_maskbit(this->_M_bpos)) != 0; }
// For b[i].flip();
reference&
- flip()
+ flip() noexcept
{
*this->_M_wp ^= _Base::_S_maskbit(this->_M_bpos);
return *this;
@@ -569,10 +569,14 @@ namespace tr2
typedef bool const_reference;
// 23.3.5.1 constructors:
+
+ /// All bits set to zero.
+ dynamic_bitset() = default;
+
/// All bits set to zero.
explicit
- dynamic_bitset(const allocator_type& __alloc = allocator_type())
- : _Base(__alloc), _M_Nb(0)
+ dynamic_bitset(const allocator_type& __alloc)
+ : _Base(__alloc)
{ }
/// Initial bits bitwise-copied from a single word (others set to zero).
@@ -585,7 +589,7 @@ namespace tr2
dynamic_bitset(initializer_list<block_type> __il,
const allocator_type& __alloc = allocator_type())
- : _Base(__alloc), _M_Nb(0)
+ : _Base(__alloc)
{ this->append(__il); }
/**
@@ -609,8 +613,7 @@ namespace tr2
__n = std::basic_string<_CharT, _Traits, _Alloc1>::npos,
_CharT __zero = _CharT('0'), _CharT __one = _CharT('1'),
const allocator_type& __alloc = allocator_type())
- : _Base(__alloc),
- _M_Nb(0) // Watch for npos.
+ : _Base(__alloc)
{
if (__pos > __str.size())
__throw_out_of_range(__N("dynamic_bitset::bitset initial position "
@@ -619,8 +622,7 @@ namespace tr2
// Watch for npos.
this->_M_Nb = (__n > __str.size() ? __str.size() - __pos : __n);
this->resize(this->_M_Nb);
- this->_M_copy_from_string(__str, __pos, __n,
- _CharT('0'), _CharT('1'));
+ this->_M_copy_from_string(__str, __pos, __n);
}
/**
@@ -633,61 +635,42 @@ namespace tr2
explicit
dynamic_bitset(const char* __str,
const allocator_type& __alloc = allocator_type())
- : _Base(__alloc)
+ : _Base(__builtin_strlen(__str), 0ULL, __alloc),
+ _M_Nb(__builtin_strlen(__str))
{
- size_t __len = 0;
- if (__str)
- while (__str[__len] != '\0')
- ++__len;
- this->resize(__len);
- this->_M_copy_from_ptr<char,std::char_traits<char>>
- (__str, __len, 0, __len, '0', '1');
+ this->_M_copy_from_ptr(__str, _M_Nb, 0, _M_Nb);
}
- /**
- * @brief Copy constructor.
- */
- dynamic_bitset(const dynamic_bitset& __b)
- : _Base(__b), _M_Nb(__b.size())
- { }
+ /// Copy constructor.
+ dynamic_bitset(const dynamic_bitset&) = default;
- /**
- * @brief Move constructor.
- */
- dynamic_bitset(dynamic_bitset&& __b)
- : _Base(std::forward<_Base>(__b)), _M_Nb(__b.size())
- { }
+ /// Move constructor.
+ dynamic_bitset(dynamic_bitset&& __b) noexcept
+ : _Base(std::move(__b)), _M_Nb(__b._M_Nb)
+ { __b.clear(); }
- /**
- * @brief Swap with another bitset.
- */
+ /// Swap with another bitset.
void
- swap(dynamic_bitset& __b)
+ swap(dynamic_bitset& __b) noexcept
{
this->_M_swap(__b);
std::swap(this->_M_Nb, __b._M_Nb);
}
- /**
- * @brief Assignment.
- */
- dynamic_bitset&
- operator=(const dynamic_bitset& __b)
- {
- if (&__b != this)
- {
- this->_M_assign(__b);
- this->_M_Nb = __b._M_Nb;
- }
- }
+ /// Copy assignment operator.
+ dynamic_bitset& operator=(const dynamic_bitset&) = default;
- /**
- * @brief Move assignment.
- */
+ /// Move assignment operator.
dynamic_bitset&
operator=(dynamic_bitset&& __b)
+ noexcept(std::is_nothrow_move_assignable<_Base>::value)
{
- this->swap(__b);
+ static_cast<_Base&>(*this) = static_cast<_Base&&>(__b);
+ _M_Nb = __b._M_Nb;
+ if _GLIBCXX17_CONSTEXPR (std::is_nothrow_move_assignable<_Base>::value)
+ __b._M_Nb = 0;
+ else if (get_allocator() == __b.get_allocator())
+ __b._M_Nb = 0;
return *this;
}
@@ -695,7 +678,7 @@ namespace tr2
* @brief Return the allocator for the bitset.
*/
allocator_type
- get_allocator() const
+ get_allocator() const noexcept
{ return this->_M_get_allocator(); }
/**
@@ -733,6 +716,8 @@ namespace tr2
this->_M_unchecked_set(this->_M_Nb, __bit);
}
+ // XXX why is there no pop_back() member in the proposal?
+
/**
* @brief Append a block.
*/
@@ -769,36 +754,36 @@ namespace tr2
*
* These should be self-explanatory.
*/
- dynamic_bitset<_WordT, _Alloc>&
- operator&=(const dynamic_bitset<_WordT, _Alloc>& __rhs)
+ dynamic_bitset&
+ operator&=(const dynamic_bitset& __rhs)
{
this->_M_do_and(__rhs);
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
- operator&=(dynamic_bitset<_WordT, _Alloc>&& __rhs)
+ dynamic_bitset&
+ operator&=(dynamic_bitset&& __rhs)
{
this->_M_do_and(std::move(__rhs));
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
- operator|=(const dynamic_bitset<_WordT, _Alloc>& __rhs)
+ dynamic_bitset&
+ operator|=(const dynamic_bitset& __rhs)
{
this->_M_do_or(__rhs);
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
- operator^=(const dynamic_bitset<_WordT, _Alloc>& __rhs)
+ dynamic_bitset&
+ operator^=(const dynamic_bitset& __rhs)
{
this->_M_do_xor(__rhs);
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
- operator-=(const dynamic_bitset<_WordT, _Alloc>& __rhs)
+ dynamic_bitset&
+ operator-=(const dynamic_bitset& __rhs)
{
this->_M_do_dif(__rhs);
return *this;
@@ -812,7 +797,7 @@ namespace tr2
*
* These should be self-explanatory.
*/
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
operator<<=(size_type __pos)
{
if (__builtin_expect(__pos < this->_M_Nb, 1))
@@ -825,7 +810,7 @@ namespace tr2
return *this;
}
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
operator>>=(size_type __pos)
{
if (__builtin_expect(__pos < this->_M_Nb, 1))
@@ -843,7 +828,7 @@ namespace tr2
/**
* @brief Sets every bit to true.
*/
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
set()
{
this->_M_do_set();
@@ -857,7 +842,7 @@ namespace tr2
* @param __val Either true or false, defaults to true.
* @throw std::out_of_range If @a __pos is bigger the size of the %set.
*/
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
set(size_type __pos, bool __val = true)
{
if (__pos >= _M_Nb)
@@ -868,7 +853,7 @@ namespace tr2
/**
* @brief Sets every bit to false.
*/
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
reset()
{
this->_M_do_reset();
@@ -882,7 +867,7 @@ namespace tr2
*
* Same as writing @c set(__pos, false).
*/
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
reset(size_type __pos)
{
if (__pos >= _M_Nb)
@@ -893,7 +878,7 @@ namespace tr2
/**
* @brief Toggles every bit to its opposite value.
*/
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
flip()
{
this->_M_do_flip();
@@ -906,7 +891,7 @@ namespace tr2
* @param __pos The index of the bit.
* @throw std::out_of_range If @a __pos is bigger the size of the %set.
*/
- dynamic_bitset<_WordT, _Alloc>&
+ dynamic_bitset&
flip(size_type __pos)
{
if (__pos >= _M_Nb)
@@ -915,7 +900,7 @@ namespace tr2
}
/// See the no-argument flip().
- dynamic_bitset<_WordT, _Alloc>
+ dynamic_bitset
operator~() const
{ return dynamic_bitset<_WordT, _Alloc>(*this).flip(); }
@@ -977,19 +962,23 @@ namespace tr2
}
// Helper functions for string operations.
- template<typename _CharT, typename _Traits>
+ template<typename _Traits = std::char_traits<char>,
+ typename _CharT = typename _Traits::char_type>
void
_M_copy_from_ptr(const _CharT*, size_t, size_t, size_t,
- _CharT, _CharT);
+ _CharT __zero = _CharT('0'),
+ _CharT __one = _CharT('1'));
template<typename _CharT, typename _Traits, typename _Alloc1>
void
- _M_copy_from_string(const std::basic_string<_CharT,
- _Traits, _Alloc1>& __str, size_t __pos, size_t __n,
+ _M_copy_from_string(const basic_string<_CharT, _Traits, _Alloc1>& __str,
+ size_t __pos, size_t __n,
_CharT __zero = _CharT('0'),
_CharT __one = _CharT('1'))
- { _M_copy_from_ptr<_CharT, _Traits>(__str.data(), __str.size(),
- __pos, __n, __zero, __one); }
+ {
+ _M_copy_from_ptr<_Traits>(__str.data(), __str.size(), __pos, __n,
+ __zero, __one);
+ }
template<typename _CharT, typename _Traits, typename _Alloc1>
void
@@ -1064,13 +1053,13 @@ namespace tr2
//@{
/// Self-explanatory.
- dynamic_bitset<_WordT, _Alloc>
+ dynamic_bitset
operator<<(size_type __pos) const
- { return dynamic_bitset<_WordT, _Alloc>(*this) <<= __pos; }
+ { return dynamic_bitset(*this) <<= __pos; }
- dynamic_bitset<_WordT, _Alloc>
+ dynamic_bitset
operator>>(size_type __pos) const
- { return dynamic_bitset<_WordT, _Alloc>(*this) >>= __pos; }
+ { return dynamic_bitset(*this) >>= __pos; }
//@}
/**
@@ -1101,14 +1090,14 @@ namespace tr2
{ return this->_M_is_proper_subset_of(__b); }
friend bool
- operator==(const dynamic_bitset<_WordT, _Alloc>& __lhs,
- const dynamic_bitset<_WordT, _Alloc>& __rhs)
- { return __lhs._M_is_equal(__rhs); }
+ operator==(const dynamic_bitset& __lhs,
+ const dynamic_bitset& __rhs) noexcept
+ { return __lhs._M_Nb == __rhs._M_Nb && __lhs._M_is_equal(__rhs); }
friend bool
- operator<(const dynamic_bitset<_WordT, _Alloc>& __lhs,
- const dynamic_bitset<_WordT, _Alloc>& __rhs)
- { return __lhs._M_is_less(__rhs); }
+ operator<(const dynamic_bitset& __lhs,
+ const dynamic_bitset& __rhs) noexcept
+ { return __lhs._M_is_less(__rhs) || __lhs._M_Nb < __rhs._M_Nb; }
};
template<typename _WordT, typename _Alloc>
diff --git a/libstdc++-v3/include/tr2/dynamic_bitset.tcc b/libstdc++-v3/include/tr2/dynamic_bitset.tcc
index 6632403b499..76e75ad64a6 100644
--- a/libstdc++-v3/include/tr2/dynamic_bitset.tcc
+++ b/libstdc++-v3/include/tr2/dynamic_bitset.tcc
@@ -174,7 +174,7 @@ namespace tr2
// Definitions of non-inline member functions.
template<typename _WordT, typename _Alloc>
- template<typename _CharT, typename _Traits>
+ template<typename _Traits, typename _CharT>
void
dynamic_bitset<_WordT, _Alloc>::
_M_copy_from_ptr(const _CharT* __str, size_t __len,
diff --git a/libstdc++-v3/libsupc++/new_opa.cc b/libstdc++-v3/libsupc++/new_opa.cc
index 68eac5b8ceb..64b9ccb3493 100644
--- a/libstdc++-v3/libsupc++/new_opa.cc
+++ b/libstdc++-v3/libsupc++/new_opa.cc
@@ -114,9 +114,10 @@ operator new (std::size_t sz, std::align_val_t al)
sz = 1;
#if _GLIBCXX_HAVE_ALIGNED_ALLOC
-# ifdef _AIX
+# if defined _AIX || defined __APPLE__
/* AIX 7.2.0.0 aligned_alloc incorrectly has posix_memalign's requirement
- * that alignment is a multiple of sizeof(void*). */
+ * that alignment is a multiple of sizeof(void*).
+ * OS X 10.15 has the same requirement. */
if (align < sizeof(void*))
align = sizeof(void*);
# endif
diff --git a/libstdc++-v3/testsuite/17_intro/names.cc b/libstdc++-v3/testsuite/17_intro/names.cc
index b29be74b2ed..dad7ba970aa 100644
--- a/libstdc++-v3/testsuite/17_intro/names.cc
+++ b/libstdc++-v3/testsuite/17_intro/names.cc
@@ -100,6 +100,10 @@
#define tmp (
+#if __cplusplus < 201103L
+#define uses_allocator (
+#endif
+
#if __cplusplus < 201703L
// <charconv> defines to_chars_result::ptr and to_chars_result::ec
#define ec (
diff --git a/libstdc++-v3/testsuite/20_util/is_nothrow_invocable/value.cc b/libstdc++-v3/testsuite/20_util/is_nothrow_invocable/value.cc
index d745b998443..7396df2ff52 100644
--- a/libstdc++-v3/testsuite/20_util/is_nothrow_invocable/value.cc
+++ b/libstdc++-v3/testsuite/20_util/is_nothrow_invocable/value.cc
@@ -119,9 +119,11 @@ void test01()
static_assert( ! is_nt_invocable_r< T, F >(), "call throws");
static_assert( ! is_nt_invocable_r< NT, F >(), "call throws");
static_assert( ! is_nt_invocable_r< Ex, F >(), "call throws");
+ static_assert( ! is_nt_invocable_r< void, F >(), "call throws");
static_assert( ! is_nt_invocable_r< T, CF >(), "conversion throws");
static_assert( is_nt_invocable_r< NT, CF >(), "" );
static_assert( ! is_nt_invocable_r< Ex, CF >(), "conversion fails");
+ static_assert( is_nt_invocable_r< void, CF >(), "");
static_assert( ! is_nt_invocable< F, int >(), "call throws");
static_assert( is_nt_invocable< F&, int >(), "");
@@ -140,12 +142,14 @@ void test01()
static_assert( is_nt_invocable_r< char&, CF, int >(), "");
static_assert( is_nt_invocable_r< char&, CF&, int >(), "");
+ static_assert( is_nt_invocable_r< void, CF&, int >(), "");
static_assert( ! is_nt_invocable_r< T, CF&, int >(),
"conversion throws");
static_assert( is_nt_invocable_r< NT, CF&, int >(), "");
static_assert( ! is_nt_invocable_r< Ex, CF&, int >(),
"conversion fails, would use explicit constructor");
+ static_assert( is_nt_invocable_r< void, CF&, int >(), "");
static_assert( ! is_nt_invocable< F, int, int >(),
"would call private member");
diff --git a/libstdc++-v3/testsuite/experimental/names.cc b/libstdc++-v3/testsuite/experimental/names.cc
index 1d2e7c0af22..17c8f37737a 100644
--- a/libstdc++-v3/testsuite/experimental/names.cc
+++ b/libstdc++-v3/testsuite/experimental/names.cc
@@ -15,7 +15,7 @@
// with this library; see the file COPYING3. If not see
// <http://www.gnu.org/licenses/>.
-// { dg-do compile }
+// { dg-do compile { target c++11 } }
// Define macros for some common variables names that we must not use for
// naming variables, parameters etc. in the library.
@@ -25,6 +25,9 @@
#if __has_include(<experimental/filesystem>)
# include <experimental/filesystem>
#endif
+
+#if __cplusplus >= 201402L
+
// Library Fundamentals
#include <experimental/algorithm>
#include <experimental/any>
@@ -55,3 +58,5 @@
#include <experimental/unordered_set>
#include <experimental/utility>
#include <experimental/vector>
+
+#endif // C++14
diff --git a/libstdc++-v3/testsuite/tr2/dynamic_bitset/cmp.cc b/libstdc++-v3/testsuite/tr2/dynamic_bitset/cmp.cc
new file mode 100644
index 00000000000..a811307c73a
--- /dev/null
+++ b/libstdc++-v3/testsuite/tr2/dynamic_bitset/cmp.cc
@@ -0,0 +1,50 @@
+// Copyright (C) 2019 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-do run { target c++11 } }
+
+#include <tr2/dynamic_bitset>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+ std::tr2::dynamic_bitset<> a(100);
+ std::tr2::dynamic_bitset<> b = a;
+ VERIFY( a == b );
+ b.resize(99);
+ VERIFY( a != b );
+}
+
+void
+test02()
+{
+ std::tr2::dynamic_bitset<> a(100);
+ std::tr2::dynamic_bitset<> b = a;
+ VERIFY( !(a < b) );
+ VERIFY( !(b < a) );
+ b.resize(99);
+ VERIFY( !(a < b) );
+ VERIFY( b < a );
+}
+
+int
+main()
+{
+ test01();
+ test02();
+}
diff --git a/libstdc++-v3/testsuite/tr2/dynamic_bitset/cons.cc b/libstdc++-v3/testsuite/tr2/dynamic_bitset/cons.cc
new file mode 100644
index 00000000000..9e21a91ff52
--- /dev/null
+++ b/libstdc++-v3/testsuite/tr2/dynamic_bitset/cons.cc
@@ -0,0 +1,105 @@
+// Copyright (C) 2019 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-do run { target c++11 } }
+
+#include <tr2/dynamic_bitset>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+ std::tr2::dynamic_bitset<> a;
+ VERIFY( a.size() == 0 );
+ VERIFY( a.empty() );
+ std::tr2::dynamic_bitset<> b(1);
+ VERIFY( b.size() == 1 );
+ VERIFY( !b.empty() );
+ VERIFY( a != b );
+}
+
+void
+test02()
+{
+ std::tr2::dynamic_bitset<> a(1, 0); // { 0 }
+ std::tr2::dynamic_bitset<> b(2, 2); // { 0, 1 }
+ VERIFY( a != b );
+}
+
+void
+test03()
+{
+ std::tr2::dynamic_bitset<> a;
+ a.resize(1); // { 0 }
+ std::tr2::dynamic_bitset<> b(2, 2); // { 0, 1 }
+ VERIFY( a != b );
+}
+
+void
+test04()
+{
+ std::tr2::dynamic_bitset<> a(3, 2); // { 0, 1, 0 }
+ std::tr2::dynamic_bitset<> b(2, 2); // { 0, 1 }
+ VERIFY( a != b );
+}
+
+void
+test05()
+{
+ std::tr2::dynamic_bitset<unsigned short> a(1, 0); // { 0 }
+ std::tr2::dynamic_bitset<unsigned short> b(2, 2); // { 0, 1 }
+ VERIFY( a != b );
+}
+
+void
+test06()
+{
+ std::tr2::dynamic_bitset<unsigned short> a;
+ a.resize(1); // { 0 }
+ std::tr2::dynamic_bitset<unsigned short> b(2, 2); // { 0, 1 }
+ VERIFY( a != b );
+}
+
+void
+test07()
+{
+ std::tr2::dynamic_bitset<unsigned short> a(3, 2); // { 0, 1, 0 }
+ std::tr2::dynamic_bitset<unsigned short> b(2, 2); // { 0, 1 }
+ VERIFY( a != b );
+}
+
+void
+test08()
+{
+ std::tr2::dynamic_bitset<> a(65, -1ULL);
+ std::tr2::dynamic_bitset<> b(64, -1ULL);
+ b.push_back(0);
+ VERIFY( a == b );
+}
+
+int
+main()
+{
+ test01();
+ test02();
+ test03();
+ test04();
+ test05();
+ test06();
+ test07();
+ test08();
+}
diff --git a/libstdc++-v3/testsuite/tr2/dynamic_bitset/copy.cc b/libstdc++-v3/testsuite/tr2/dynamic_bitset/copy.cc
new file mode 100644
index 00000000000..06bc1158a82
--- /dev/null
+++ b/libstdc++-v3/testsuite/tr2/dynamic_bitset/copy.cc
@@ -0,0 +1,55 @@
+// Copyright (C) 2019 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-do run { target c++11 } }
+
+#include <tr2/dynamic_bitset>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+ std::tr2::dynamic_bitset<> a(100);
+ const auto n = a.num_blocks();
+ std::tr2::dynamic_bitset<> b = a;
+ VERIFY(b.num_blocks() == n);
+ VERIFY(b.size() == 100);
+ VERIFY(a.num_blocks() == n);
+ VERIFY(a.size() == 100);
+ VERIFY(b == a);
+}
+
+void
+test02()
+{
+ std::tr2::dynamic_bitset<> a(100);
+ const auto n = a.num_blocks();
+ std::tr2::dynamic_bitset<> b;
+ b = a;
+ VERIFY(b.num_blocks() == n);
+ VERIFY(b.size() == 100);
+ VERIFY(a.num_blocks() == n);
+ VERIFY(a.size() == 100);
+ VERIFY(b == a);
+}
+
+int
+main()
+{
+ test01();
+ test02();
+}
diff --git a/libstdc++-v3/testsuite/tr2/dynamic_bitset/move.cc b/libstdc++-v3/testsuite/tr2/dynamic_bitset/move.cc
new file mode 100644
index 00000000000..ed320db300d
--- /dev/null
+++ b/libstdc++-v3/testsuite/tr2/dynamic_bitset/move.cc
@@ -0,0 +1,53 @@
+// Copyright (C) 2019 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-do run { target c++11 } }
+
+#include <tr2/dynamic_bitset>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+ std::tr2::dynamic_bitset<> a(100);
+ const auto n = a.num_blocks();
+ std::tr2::dynamic_bitset<> b = std::move(a);
+ VERIFY(b.num_blocks() == n);
+ VERIFY(b.size() == 100);
+ VERIFY(a.num_blocks() == 0);
+ VERIFY(a.size() == 0);
+}
+
+void
+test02()
+{
+ std::tr2::dynamic_bitset<> a(100);
+ const auto n = a.num_blocks();
+ std::tr2::dynamic_bitset<> b;
+ b = std::move(a);
+ VERIFY(b.num_blocks() == n);
+ VERIFY(b.size() == 100);
+ VERIFY(a.num_blocks() == 0);
+ VERIFY(a.size() == 0);
+}
+
+int
+main()
+{
+ test01();
+ test02();
+}
diff --git a/libstdc++-v3/testsuite/tr2/dynamic_bitset/pr92059.cc b/libstdc++-v3/testsuite/tr2/dynamic_bitset/pr92059.cc
new file mode 100644
index 00000000000..0aec1adf65b
--- /dev/null
+++ b/libstdc++-v3/testsuite/tr2/dynamic_bitset/pr92059.cc
@@ -0,0 +1,36 @@
+// Copyright (C) 2019 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3. If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-do run { target c++11 } }
+
+#include <tr2/dynamic_bitset>
+#include <testsuite_hooks.h>
+
+void
+test01()
+{
+ // PR libstdc++/92059
+ std::tr2::dynamic_bitset<> b1(10000), b2(10000);
+ b2 = b1; // crashed on missing return
+ VERIFY( b2 == b1);
+}
+
+int
+main()
+{
+ test01();
+}