diff options
| author | H.J. Lu <hongjiu.lu@intel.com> | 2008-06-09 18:54:42 +0000 |
|---|---|---|
| committer | H.J. Lu <hongjiu.lu@intel.com> | 2008-06-09 18:54:42 +0000 |
| commit | 6865f3bcfee4e6b01873e2ec8a5fe719eecdc826 (patch) | |
| tree | 73d8db5c49e25313908c8d4a52d1764d9eca7481 | |
| parent | 1be4e8faf80ef80c8d82f4e05f3bcfca69862610 (diff) | |
2008-06-09 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/sse.md (AVXMODEI): Removed.
(*avx_nand<mode>3): Replace AVXMODEI with AVX256MODEI.
(*avx_<code><mode>3): Likewise.
(*avx_<code><mode>3): New.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ix86/avx@136598 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog.avx | 7 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 31 |
2 files changed, 27 insertions, 11 deletions
diff --git a/gcc/ChangeLog.avx b/gcc/ChangeLog.avx index 17cb532b58e..18ae373cf3f 100644 --- a/gcc/ChangeLog.avx +++ b/gcc/ChangeLog.avx @@ -1,3 +1,10 @@ +2008-06-09 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/sse.md (AVXMODEI): Removed. + (*avx_nand<mode>3): Replace AVXMODEI with AVX256MODEI. + (*avx_<code><mode>3): Likewise. + (*avx_<code><mode>3): New. + 2008-06-05 H.J. Lu <hongjiu.lu@intel.com> * config/i386/sse.md (avx_cmps<ssemodesuffixf2c><mode>3): Use diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index af36732fa45..6c93007f908 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -29,9 +29,6 @@ ;; 32 byte integral vector modes handled by AVX (define_mode_iterator AVX256MODEI [V32QI V16HI V8SI V4DI]) -;; All integral vector modes handled by AVX -(define_mode_iterator AVXMODEI [V16QI V8HI V4SI V2DI V32QI V16HI V8SI V4DI]) - ;; All 32-byte vector modes handled by AVX (define_mode_iterator AVX256MODE [V32QI V16HI V8SI V4DI V8SF V4DF]) @@ -5727,10 +5724,10 @@ }) (define_insn "*avx_nand<mode>3" - [(set (match_operand:AVXMODEI 0 "register_operand" "=x") - (and:AVXMODEI - (not:AVXMODEI (match_operand:SSEMODEI 1 "register_operand" "x")) - (match_operand:AVXMODEI 2 "nonimmediate_operand" "xm")))] + [(set (match_operand:AVX256MODEI 0 "register_operand" "=x") + (and:AVX256MODEI + (not:AVX256MODEI (match_operand:AVX256MODEI 1 "register_operand" "x")) + (match_operand:AVX256MODEI 2 "nonimmediate_operand" "xm")))] "TARGET_AVX" "vandnps\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sselog") @@ -5789,10 +5786,10 @@ "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);") (define_insn "*avx_<code><mode>3" - [(set (match_operand:AVXMODEI 0 "register_operand" "=x") - (plogic:AVXMODEI - (match_operand:AVXMODEI 1 "nonimmediate_operand" "%x") - (match_operand:AVXMODEI 2 "nonimmediate_operand" "xm")))] + [(set (match_operand:AVX256MODEI 0 "register_operand" "=x") + (plogic:AVX256MODEI + (match_operand:AVX256MODEI 1 "nonimmediate_operand" "%x") + (match_operand:AVX256MODEI 2 "nonimmediate_operand" "xm")))] "TARGET_AVX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)" "v<plogicprefix>ps\t{%2, %1, %0|%0, %1, %2}" @@ -5811,6 +5808,18 @@ [(set_attr "type" "sselog") (set_attr "mode" "V4SF")]) +(define_insn "*avx_<code><mode>3" + [(set (match_operand:SSEMODEI 0 "register_operand" "=x") + (plogic:SSEMODEI + (match_operand:SSEMODEI 1 "nonimmediate_operand" "%x") + (match_operand:SSEMODEI 2 "nonimmediate_operand" "xm")))] + "TARGET_AVX + && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)" + "vp<plogicprefix>\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "sselog") + (set_attr "prefix" "vex") + (set_attr "mode" "TI")]) + (define_insn "*sse2_<code><mode>3" [(set (match_operand:SSEMODEI 0 "register_operand" "=x") (plogic:SSEMODEI |