diff options
author | H.J. Lu <hongjiu.lu@intel.com> | 2008-08-05 17:40:16 +0000 |
---|---|---|
committer | H.J. Lu <hongjiu.lu@intel.com> | 2008-08-05 17:40:16 +0000 |
commit | 1302026b11ae2af2add8d32b04eeab6b58c0b453 (patch) | |
tree | 7c841aa2a4f3ff46481a825e04b8b36c04ec123e | |
parent | 793cb7c1c4a68a755fd9142e886ef29338dc3fa1 (diff) |
gcc/
2008-08-05 H.J. Lu <hongjiu.lu@intel.com>
PR target/36992
* config/i386/emmintrin.h (_mm_move_epi64): Use
__builtin_ia32_movq128.
* config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVQ128.
(bdesc_args): Add IX86_BUILTIN_MOVQ128.
* config/i386/sse.md (sse2_movq128): New.
(*sse2_movq128): Likewise.
* doc/extend.texi: Document __builtin_ia32_movq128.
gcc/testsuite/
2008-08-04 H.J. Lu <hongjiu.lu@intel.com>
PR target/36992
* gcc.target/i386/pr36992-1.c: Scan movq.
* gcc.target/i386/pr36992-2.c: Likewise.
* gcc.target/i386/pr36992-3.c: New.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ix86/avx@138734 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog.avx | 14 | ||||
-rw-r--r-- | gcc/config/i386/emmintrin.h | 2 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 4 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 22 | ||||
-rw-r--r-- | gcc/doc/extend.texi | 1 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog.avx | 8 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr36992-1.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr36992-2.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr36992-3.c | 12 |
9 files changed, 64 insertions, 3 deletions
diff --git a/gcc/ChangeLog.avx b/gcc/ChangeLog.avx index 81a1c66c856..14e4d98550e 100644 --- a/gcc/ChangeLog.avx +++ b/gcc/ChangeLog.avx @@ -1,3 +1,17 @@ +2008-08-05 H.J. Lu <hongjiu.lu@intel.com> + + PR target/36992 + * config/i386/emmintrin.h (_mm_move_epi64): Use + __builtin_ia32_movq128. + + * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVQ128. + (bdesc_args): Add IX86_BUILTIN_MOVQ128. + + * config/i386/sse.md (sse2_movq128): New. + (*sse2_movq128): Likewise. + + * doc/extend.texi: Document __builtin_ia32_movq128. + 2008-08-04 H.J. Lu <hongjiu.lu@intel.com> * config/i386/sse.md (*avx_shufps_1): Removed. diff --git a/gcc/config/i386/emmintrin.h b/gcc/config/i386/emmintrin.h index 933dcd61e63..c6590dce4d4 100644 --- a/gcc/config/i386/emmintrin.h +++ b/gcc/config/i386/emmintrin.h @@ -726,7 +726,7 @@ _mm_movpi64_epi64 (__m64 __A) extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_move_epi64 (__m128i __A) { - return _mm_set_epi64 ((__m64)0LL, _mm_movepi64_pi64 (__A)); + return (__m128i)__builtin_ia32_movq128 ((__v2di) __A); } /* Create a vector of zeros. */ diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d00065ca63d..3cfe3170b1b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -19116,6 +19116,8 @@ enum ix86_builtins IX86_BUILTIN_MOVNTPD, IX86_BUILTIN_MOVNTDQ, + IX86_BUILTIN_MOVQ128, + /* SSE2 MMX */ IX86_BUILTIN_MASKMOVDQU, IX86_BUILTIN_MOVMSKPD, @@ -20467,6 +20469,8 @@ static const struct builtin_description bdesc_args[] = { OPTION_MASK_ISA_SSE2, CODE_FOR_abstf2, 0, IX86_BUILTIN_FABSQ, UNKNOWN, (int) FLOAT128_FTYPE_FLOAT128 }, { OPTION_MASK_ISA_SSE2, CODE_FOR_copysigntf3, 0, IX86_BUILTIN_COPYSIGNQ, UNKNOWN, (int) FLOAT128_FTYPE_FLOAT128_FLOAT128 }, + { OPTION_MASK_ISA_SSE, CODE_FOR_sse2_movq128, "__builtin_ia32_movq128", IX86_BUILTIN_MOVQ128, UNKNOWN, (int) V2DI_FTYPE_V2DI }, + /* SSE2 MMX */ { OPTION_MASK_ISA_SSE2, CODE_FOR_mmx_addv1di3, "__builtin_ia32_paddq", IX86_BUILTIN_PADDQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI }, { OPTION_MASK_ISA_SSE2, CODE_FOR_mmx_subv1di3, "__builtin_ia32_psubq", IX86_BUILTIN_PSUBQ, UNKNOWN, (int) V1DI_FTYPE_V1DI_V1DI }, diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 9ea8d8f5daa..9f9f5e889ec 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -339,6 +339,28 @@ (set_attr "prefix" "vex") (set_attr "mode" "<MODE>")]) +(define_expand "sse2_movq128" + [(set (match_operand:V2DI 0 "register_operand" "=x") + (vec_concat:V2DI + (vec_select:DI + (match_operand:V2DI 1 "nonimmediate_operand" "x") + (parallel [(const_int 0)])) + (match_dup 2)))] + "TARGET_SSE2" + "operands[2] = CONST0_RTX (DImode);") + +(define_insn "*sse2_movq128" + [(set (match_operand:V2DI 0 "register_operand" "=x") + (vec_concat:V2DI + (vec_select:DI + (match_operand:V2DI 1 "nonimmediate_operand" "x") + (parallel [(const_int 0)])) + (match_operand:DI 2 "const0_operand" "")))] + "TARGET_SSE2" + "movq\t{%1, %0|%0, %1}" + [(set_attr "type" "ssemov") + (set_attr "mode" "TI")]) + (define_insn "<sse>_movup<ssemodesuffixf2c>" [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m") (unspec:SSEMODEF2P diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 9557ba3bad9..66fb8401c78 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -8071,6 +8071,7 @@ v2di __builtin_ia32_psrlqi128 (v2di, int) v8hi __builtin_ia32_psrawi128 (v8hi, int) v4si __builtin_ia32_psradi128 (v4si, int) v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi) +v2di __builtin_ia32_movq128 (v2di) @end smallexample The following built-in functions are available when @option{-msse3} is used. diff --git a/gcc/testsuite/ChangeLog.avx b/gcc/testsuite/ChangeLog.avx index 6481e2be699..5d718b8f3c7 100644 --- a/gcc/testsuite/ChangeLog.avx +++ b/gcc/testsuite/ChangeLog.avx @@ -1,3 +1,11 @@ +2008-08-04 H.J. Lu <hongjiu.lu@intel.com> + + PR target/36992 + * gcc.target/i386/pr36992-1.c: Scan movq. + * gcc.target/i386/pr36992-2.c: Likewise. + + * gcc.target/i386/pr36992-3.c: New. + 2008-07-12 H.J. Lu <hongjiu.lu@intel.com> * gcc.dg/compat/vector-1b_main.c: New. diff --git a/gcc/testsuite/gcc.target/i386/pr36992-1.c b/gcc/testsuite/gcc.target/i386/pr36992-1.c index aad6f7cd14d..7cd24cccf3e 100644 --- a/gcc/testsuite/gcc.target/i386/pr36992-1.c +++ b/gcc/testsuite/gcc.target/i386/pr36992-1.c @@ -9,4 +9,4 @@ test (__m128i b) return _mm_move_epi64 (b); } -/* { dg-final { scan-assembler-times "mov\[qd\]\[ \\t\]+.*%xmm" 1 } } */ +/* { dg-final { scan-assembler-times "movq\[ \\t\]+.*%xmm" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr36992-2.c b/gcc/testsuite/gcc.target/i386/pr36992-2.c index eb9c3a28fee..8c9089460f0 100644 --- a/gcc/testsuite/gcc.target/i386/pr36992-2.c +++ b/gcc/testsuite/gcc.target/i386/pr36992-2.c @@ -9,4 +9,4 @@ test (__m128i b) return _mm_move_epi64 (b); } -/* { dg-final { scan-assembler-not "%mm" } } */ +/* { dg-final { scan-assembler-times "movq\[ \\t\]+.*%xmm" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr36992-3.c b/gcc/testsuite/gcc.target/i386/pr36992-3.c new file mode 100644 index 00000000000..17696a5b276 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr36992-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile } +/* { dg-options "-O2 -msse4" } */ + +#include <emmintrin.h> + +__m128i +test (__m128i b) +{ + return _mm_move_epi64 (b); +} + +/* { dg-final { scan-assembler-times "movq\[ \\t\]+.*%xmm" 1 } } */ |