* config/mips/mips.h (PROCESSOR_R4121): Rename to PROCESSOR_R4120.

	(TARGET_MIPS4121): Rename to TARGET_MIPS4120.
	* config/mips/mips.c (mips_cpu_info): Rename vr4121 to vr4120.
	* config/mips/mips.md: Apply same renaming here.


git-svn-id: https://gcc.gnu.org/svn/gcc/branches/mips-3_4-rewrite-branch@57893 138bc75d-0d04-0410-961f-82ee72b054a4

4 files changed, 19 insertions, 12 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 48c6a8cb424..4aa6af8748b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
 2002-10-01  Richard Sandiford  <rsandifo@redhat.com>
 
+	* config/mips/mips.h (PROCESSOR_R4121): Rename to PROCESSOR_R4120.
+	(TARGET_MIPS4121): Rename to TARGET_MIPS4120.
+	* config/mips/mips.c (mips_cpu_info): Rename vr4121 to vr4120.
+	* config/mips/mips.md: Apply same renaming here.
+
+2002-10-01  Richard Sandiford  <rsandifo@redhat.com>
+
 	* config/mips/mips.c (PROCESSOR_R4320, TARGET_MIPS4320): Remove.
 	(GENERATE_MULT3_SI): Remove use of TARGET_MIPS4320.
 	* config/mips/mips.c (mips_cpu_info): Remove vr4320 entry.
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index da1c650cfe2..c9c492b4a6a 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -596,7 +596,7 @@ const struct mips_cpu_info mips_cpu_info_table[] = {
   { "r4000", PROCESSOR_R4000, 3 },
   { "vr4100", PROCESSOR_R4100, 3 },
   { "vr4111", PROCESSOR_R4111, 3 },
-  { "vr4121", PROCESSOR_R4121, 3 },
+  { "vr4120", PROCESSOR_R4120, 3 },
   { "vr4300", PROCESSOR_R4300, 3 },
   { "r4400", PROCESSOR_R4000, 3 }, /* = r4000 */
   { "r4600", PROCESSOR_R4600, 3 },
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 6c84bae108c..114712b45e6 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -64,7 +64,7 @@ enum processor_type {
   PROCESSOR_R4000,
   PROCESSOR_R4100,
   PROCESSOR_R4111,
-  PROCESSOR_R4121,
+  PROCESSOR_R4120,
   PROCESSOR_R4300,
   PROCESSOR_R4600,
   PROCESSOR_R4650,
@@ -357,7 +357,7 @@ extern void		sbss_section PARAMS ((void));
 #define TARGET_MIPS3900             (mips_arch == PROCESSOR_R3900)
 #define TARGET_MIPS4000             (mips_arch == PROCESSOR_R4000)
 #define TARGET_MIPS4100             (mips_arch == PROCESSOR_R4100)
-#define TARGET_MIPS4121             (mips_arch == PROCESSOR_R4121)
+#define TARGET_MIPS4120             (mips_arch == PROCESSOR_R4120)
 #define TARGET_MIPS4300             (mips_arch == PROCESSOR_R4300)
 #define TARGET_MIPS4KC              (mips_arch == PROCESSOR_R4KC)
 #define TARGET_MIPS5KC              (mips_arch == PROCESSOR_R5KC)
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 2336bdf67d4..bd36d0560ed 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -122,7 +122,7 @@
 
 ;; ??? Fix everything that tests this attribute.
 (define_attr "cpu"
-  "default,r3000,r3900,r6000,r4000,r4100,r4121,r4300,r4600,r4650,r5000,r5400,r5500,r8000,sr71000,r4kc,r5kc,r20kc"
+  "default,r3000,r3900,r6000,r4000,r4100,r4120,r4300,r4600,r4650,r5000,r5400,r5500,r8000,sr71000,r4kc,r5kc,r20kc"
   (const (symbol_ref "mips_cpu_attr")))
 
 ;; Does the instruction have a mandatory delay slot?
@@ -207,12 +207,12 @@
 
 (define_function_unit "memory" 1 0
   (and (eq_attr "type" "load")
-       (eq_attr "cpu" "!r3000,r3900,r4600,r4650,r4100,r4121,r4300,r5000"))
+       (eq_attr "cpu" "!r3000,r3900,r4600,r4650,r4100,r4120,r4300,r5000"))
   3 0)
 
 (define_function_unit "memory" 1 0
   (and (eq_attr "type" "load")
-       (eq_attr "cpu" "r3000,r3900,r4600,r4650,r4100,r4121,r4300,r5000"))
+       (eq_attr "cpu" "r3000,r3900,r4600,r4650,r4100,r4120,r4300,r5000"))
   2 0)
 
 (define_function_unit "memory"   1 0 (eq_attr "type" "store") 1 0)
@@ -225,7 +225,7 @@
 
 (define_function_unit "imuldiv"  1 0
   (and (eq_attr "type" "imul,imadd")
-       (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4121,r4300,r5000"))
+       (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000"))
   17 17)
 
 ;; On them mips16, we want to stronly discourage a mult from appearing
@@ -252,12 +252,12 @@
 
 (define_function_unit "imuldiv"  1 0
   (and (eq_attr "type" "imul,imadd")
-       (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4121")))
+       (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4120")))
   1 1)
 
 (define_function_unit "imuldiv"  1 0
   (and (eq_attr "type" "imul,imadd")
-       (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4121")))
+       (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4120")))
   4 4)
 
 (define_function_unit "imuldiv"  1 0
@@ -277,7 +277,7 @@
 
 (define_function_unit "imuldiv"  1 0
   (and (eq_attr "type" "idiv")
-       (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4121,r4300,r5000"))
+       (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000"))
   38 38)
 
 (define_function_unit "imuldiv"  1 0
@@ -298,12 +298,12 @@
 
 (define_function_unit "imuldiv" 1 0
   (and (eq_attr "type" "idiv")
-       (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4121")))
+       (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4120")))
   35 35)
 
 (define_function_unit "imuldiv" 1 0
   (and (eq_attr "type" "idiv")
-       (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4121")))
+       (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4120")))
   67 67)
 
 (define_function_unit "imuldiv" 1 0