* config/mips/mips.md (extended_mips16): New attribute.

	(define_attr length): Default to 8 if extended_mips16 == yes.
	(truncdisi2): Set extended_mips16 to yes for the sll alternative.
	(truncdihi2, truncdiqi2, *extendsidi2): Likewise.
	(call_internal): Set extended_mips16 to yes for direct jumps.
	Remove redundant mode attribute.
	(call_value_internal, call_value_multiple_internal): Likewise.
	(call_split): Remove redundant mode attribute.
	(call_value_split, call_value_multiple_split): Likewise.


git-svn-id: https://gcc.gnu.org/svn/gcc/branches/mips-3_4-rewrite-branch@64868 138bc75d-0d04-0410-961f-82ee72b054a4

2 files changed, 46 insertions, 29 deletions

diff --git a/gcc/ChangeLog.rewrite b/gcc/ChangeLog.rewrite
index c8d81c5e3f7..299cb237b97 100644
--- a/gcc/ChangeLog.rewrite
+++ b/gcc/ChangeLog.rewrite
@@ -1,5 +1,15 @@
 2003-03-25  Richard Sandiford  <rsandifo@redhat.com>
 
+	* config/mips/mips.md (extended_mips16): New attribute.
+	(define_attr length): Default to 8 if extended_mips16 == yes.
+	(truncdisi2): Set extended_mips16 to yes for the sll alternative.
+	(truncdihi2, truncdiqi2, *extendsidi2): Likewise.
+	(call_internal): Set extended_mips16 to yes for direct jumps.
+	Remove redundant mode attribute.
+	(call_value_internal, call_value_multiple_internal): Likewise.
+	(call_split): Remove redundant mode attribute.
+	(call_value_split, call_value_multiple_split): Likewise.
+
 	* config/mips/mips.c (mips_symbol_insns): Rework.  Fix handling
 	of unaligned offsets.
 
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 26681df2fcc..b50e8c358fa 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -116,6 +116,10 @@
 (define_attr "macro_calls" "no,yes"
   (const (symbol_ref "TARGET_ABICALLS && !TARGET_NEWABI")))
 
+;; Is this an extended instruction in mips16 mode?
+(define_attr "extended_mips16" "no,yes"
+  (const_string "no"))
+
 ;; Length (in # of bytes).  A conditional branch is allowed only to a
 ;; location within a signed 18-bit offset of the delay slot.  If that
 ;; provides too smal a range, we use the `j' instruction.  This
@@ -151,10 +155,12 @@
 	  ;;	 nop
 	  ;;	 lw $gp,X($sp)
 	  ;;	 nop
-	  (eq_attr "type" "call")
-	  (if_then_else (eq_attr "macro_calls" "yes")
-			(const_int 32)
-			(const_int 4))
+	  (and (eq_attr "type" "call")
+	       (eq_attr "macro_calls" "yes"))
+	  (const_int 32)
+	  (and (eq_attr "extended_mips16" "yes")
+	       (ne (symbol_ref "TARGET_MIPS16") (const_int 0)))
+	  (const_int 8)
 	  ] (const_int 4)))
 
 ;; Attribute describing the processor.  This attribute must match exactly
@@ -3979,7 +3985,8 @@ move\\t%0,%z4\\n\\
     sll\t%0,%1,0
     sw\t%1,%0"
   [(set_attr "type" "darith")
-   (set_attr "mode" "SI")])
+   (set_attr "mode" "SI")
+   (set_attr "extended_mips16" "yes,*")])
 
 (define_insn "truncdihi2"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=d,m")
@@ -3989,7 +3996,8 @@ move\\t%0,%z4\\n\\
     sll\t%0,%1,0
     sh\t%1,%0"
   [(set_attr "type" "darith")
-   (set_attr "mode" "SI")])
+   (set_attr "mode" "SI")
+   (set_attr "extended_mips16" "yes,*")])
 
 (define_insn "truncdiqi2"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=d,m")
@@ -3999,7 +4007,8 @@ move\\t%0,%z4\\n\\
     sll\t%0,%1,0
     sb\t%1,%0"
   [(set_attr "type" "darith")
-   (set_attr "mode" "SI")])
+   (set_attr "mode" "SI")
+   (set_attr "extended_mips16" "yes,*")])
 
 ;; Combiner patterns to optimize shift/truncate combinations.
 
@@ -4343,7 +4352,8 @@ move\\t%0,%z4\\n\\
    sll\t%0,%1,0
    lw\t%0,%1"
   [(set_attr "type" "arith,load")
-   (set_attr "mode" "DI")])
+   (set_attr "mode" "DI")
+   (set_attr "extended_mips16" "yes,*")])
 
 ;; These patterns originally accepted general_operands, however, slightly
 ;; better code is generated by only accepting register_operands, and then
@@ -9790,8 +9800,8 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2"
 })
 
 (define_insn_and_split "call_internal"
-  [(call (mem:SI (match_operand 0 "call_insn_operand" "cS"))
-	 (match_operand 1 "" "i"))
+  [(call (mem:SI (match_operand 0 "call_insn_operand" "c,S"))
+	 (match_operand 1 "" ""))
    (clobber (reg:SI 31))]
   ""
   "%*jal\\t%0"
@@ -9802,18 +9812,17 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2"
     emit_insn (gen_exception_receiver ());
     DONE;
   }
-  [(set_attr "type"	"call")
-   (set_attr "mode"	"none")])
+  [(set_attr "type" "call")
+   (set_attr "extended_mips16" "no,yes")])
 
 (define_insn "call_split"
   [(call (mem:SI (match_operand 0 "call_insn_operand" "c"))
-	 (match_operand 1 "" "i"))
+	 (match_operand 1 "" ""))
    (clobber (reg:SI 31))
    (const_int 1)]
   "TARGET_SPLIT_CALLS"
   "%*jalr\\t%0"
   [(set_attr "type" "call")
-   (set_attr "mode" "none")
    (set_attr "macro_calls" "no")])
 
 (define_expand "call_value"
@@ -9829,9 +9838,9 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2"
 })
 
 (define_insn_and_split "call_value_internal"
-  [(set (match_operand 0 "register_operand" "=df")
-        (call (mem:SI (match_operand 1 "call_insn_operand" "cS"))
-              (match_operand 2 "" "i")))
+  [(set (match_operand 0 "register_operand" "=df,df")
+        (call (mem:SI (match_operand 1 "call_insn_operand" "c,S"))
+              (match_operand 2 "" "")))
    (clobber (reg:SI 31))]
   ""
   "%*jal\\t%1"
@@ -9843,26 +9852,25 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2"
     emit_insn (gen_exception_receiver ());
     DONE;
   }
-  [(set_attr "type"	"call")
-   (set_attr "mode"	"none")])
+  [(set_attr "type" "call")
+   (set_attr "extended_mips16" "no,yes")])
 
 (define_insn "call_value_split"
   [(set (match_operand 0 "register_operand" "=df")
         (call (mem:SI (match_operand 1 "call_insn_operand" "c"))
-              (match_operand 2 "" "i")))
+              (match_operand 2 "" "")))
    (clobber (reg:SI 31))
    (const_int 1)]
   "TARGET_SPLIT_CALLS"
   "%*jalr\\t%1"
   [(set_attr "type" "call")
-   (set_attr "mode" "none")
    (set_attr "macro_calls" "no")])
 
 (define_insn_and_split "call_value_multiple_internal"
-  [(set (match_operand 0 "register_operand" "=df")
-        (call (mem:SI (match_operand 1 "call_insn_operand" "cS"))
-              (match_operand 2 "" "i")))
-   (set (match_operand 3 "register_operand" "=df")
+  [(set (match_operand 0 "register_operand" "=df,df")
+        (call (mem:SI (match_operand 1 "call_insn_operand" "c,S"))
+              (match_operand 2 "" "")))
+   (set (match_operand 3 "register_operand" "=df,df")
 	(call (mem:SI (match_dup 1))
 	      (match_dup 2)))
    (clobber (reg:SI 31))]
@@ -9876,13 +9884,13 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2"
     emit_insn (gen_exception_receiver ());
     DONE;
   }
-  [(set_attr "type"	"call")
-   (set_attr "mode"	"none")])
+  [(set_attr "type" "call")
+   (set_attr "extended_mips16" "no,yes")])
 
 (define_insn "call_value_multiple_split"
   [(set (match_operand 0 "register_operand" "=df")
         (call (mem:SI (match_operand 1 "call_insn_operand" "c"))
-              (match_operand 2 "" "i")))
+              (match_operand 2 "" "")))
    (set (match_operand 3 "register_operand" "=df")
 	(call (mem:SI (match_dup 1))
 	      (match_dup 2)))
@@ -9891,7 +9899,6 @@ ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\\n\\t%*j\\t%2"
   "TARGET_SPLIT_CALLS"
   "%*jalr\\t%1"
   [(set_attr "type" "call")
-   (set_attr "mode" "none")
    (set_attr "macro_calls" "no")])
 
 ;; Call subroutine returning any type.