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authorUros Bizjak <ubizjak@gmail.com>2013-05-17 15:06:36 +0000
committerUros Bizjak <ubizjak@gmail.com>2013-05-17 15:06:36 +0000
commit04d5e4b640eaf877f386a51ecbc947207e8008df (patch)
treede9f9c52de072da93cdd599adc1e522f4b0530aa /gcc/ChangeLog
parentb13a9bdb13856ee52f4af78af128e2a8310a91a8 (diff)
Backport from mainline
2013-05-16 Uros Bizjak <ubizjak@gmail.com> * config/i386/driver-i386.c (host_detect_local_cpu): Determine cache parameters using detect_caches_amd also for CYRIX, NSC and TM2 signatures. 2013-05-16 Uros Bizjak <ubizjak@gmail.com> Dzianis Kahanovich <mahatma@eu.by> PR target/45359 PR target/46396 * config/i386/driver-i386.c (host_detect_local_cpu): Detect VIA/Centaur processors and determine their cache parameters using detect_caches_amd. 2013-05-15 Uros Bizjak <ubizjak@gmail.com> * config/i386/i386.c (ix86_option_override_internal): Update processor_alias_table for missing PTA_PRFCHW and PTA_FXSR flags. Add PTA_POPCNT to corei7 entry. Do not enable SSE prefetch on non-SSE 3dNow! targets. Enable TARGET_PRFCHW for TARGET_3DNOW targets. * config/i386/i386.md (prefetch): Enable for TARGET_PRFCHW instead of TARGET_3DNOW. (*prefetch_3dnow): Enable for TARGET_PRFCHW only. git-svn-id: https://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@199017 138bc75d-0d04-0410-961f-82ee72b054a4
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diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 970efc371f8..8dfc0ce2e27 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,31 @@
+2013-05-17 Uros Bizjak <ubizjak@gmail.com>
+
+ Backport from mainline
+ 2013-05-16 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/driver-i386.c (host_detect_local_cpu): Determine
+ cache parameters using detect_caches_amd also for CYRIX,
+ NSC and TM2 signatures.
+
+ 2013-05-16 Uros Bizjak <ubizjak@gmail.com>
+ Dzianis Kahanovich <mahatma@eu.by>
+
+ PR target/45359
+ PR target/46396
+ * config/i386/driver-i386.c (host_detect_local_cpu): Detect
+ VIA/Centaur processors and determine their cache parameters
+ using detect_caches_amd.
+
+ 2013-05-15 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_option_override_internal): Update
+ processor_alias_table for missing PTA_PRFCHW and PTA_FXSR flags. Add
+ PTA_POPCNT to corei7 entry. Do not enable SSE prefetch on
+ non-SSE 3dNow! targets. Enable TARGET_PRFCHW for TARGET_3DNOW targets.
+ * config/i386/i386.md (prefetch): Enable for TARGET_PRFCHW instead
+ of TARGET_3DNOW.
+ (*prefetch_3dnow): Enable for TARGET_PRFCHW only.
+
2013-05-17 Jakub Jelinek <jakub@redhat.com>
* gcc.c (SANITIZER_SPEC): Reject -fsanitize=address -fsanitize=thread