diff options
author | Kazu Hirata <kazu@cs.umass.edu> | 2004-02-02 06:31:08 +0000 |
---|---|---|
committer | Kazu Hirata <kazu@cs.umass.edu> | 2004-02-02 06:31:08 +0000 |
commit | a8a80090d029e2a4f43f77dca95e0858c699fee5 (patch) | |
tree | 2249fc0052d6cffd5c822372939c700c16faed7e /gcc/config/arc | |
parent | 4a80b50527db413d07ccbbbeefe719a41896adb9 (diff) |
* config/arc/arc.md, config/arm/arm.c, config/arm/arm.md,
config/c4x/c4x.c, config/c4x/c4x.md, config/cris/cris.md,
config/frv/frv.c, config/h8300/h8300.c, config/ip2k/ip2k.md,
config/iq2000/iq2000.c, config/m32r/m32r.c,
config/mcore/mcore.c, config/mips/mips.c, config/mmix/mmix.md,
config/mn10300/mn10300.c, config/rs6000/rs6000.c,
config/rs6000/rs6000.md, config/sh/sh.c, config/sh/sh.md,
config/stormy16/stormy16.c, config/v850/v850.md,
config/xtensa/xtensa.c: Replace gen_rtx with gen_rtx_fmt_e*.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@77098 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arc')
-rw-r--r-- | gcc/config/arc/arc.md | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index c541ab6f873..2e7e98a4244 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1,5 +1,6 @@ ;; Machine description of the Argonaut ARC cpu for GNU C compiler -;; Copyright (C) 1994, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1997, 1998, 1999, 2000, 2004 +;; Free Software Foundation, Inc. ;; This file is part of GCC. @@ -582,7 +583,7 @@ = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), 61); - operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); }") ;(define_expand "movdicc" @@ -598,7 +599,7 @@ ; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), ; 61); ; -; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); +; operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); ;}") (define_expand "movsfcc" @@ -614,7 +615,7 @@ = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), 61); - operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); }") ;(define_expand "movdfcc" @@ -630,7 +631,7 @@ ; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), ; 61); ; -; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); +; operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); ;}") (define_insn "*movsicc_insn" |