AVX-512. Introduce SKylake server CPU.

gcc/
	* config.gcc: Support "skylake-avx512".
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        PROCESSOR_SKYLAKE_AVX512.
        * config/i386/i386.c (m_SKYLAKE_AVX512): Define.
        (processor_target_table): Add "skylake-avx512".
        (PTA_SKYLAKE_AVX512): Define.
	(ix86_option_override_internal): Add "skylake_avx512".
        (fold_builtin_cpu): Handle "skylake_avx512", add F_AVX512VL
	F_AVX512BW, F_AVX512DQ, F_AVX512ER, F_AVX512PF, F_AVX512CD.
        * config/i386/i386.h (TARGET_SKYLAKE_AVX512): Define.
        (processor_type): Add PROCESSOR_SKYLAKE_AVX512.
	* doc/invoke.texi (skylake-avx512): New.

libgcc/
	* libgcc/config/i386/cpuinfo.c (enum processor_features): Add
	FEATURE_AVX512VL, FEATURE_AVX512BW, FEATURE_AVX512DQ,
	FEATURE_AVX512CD, FEATURE_AVX512ER, FEATURE_AVX512PF.
	(get_available_features): Habdle new features.

gcc/testsuite/
        * gcc.target/i386/funcspec-5.c: Test avx512vl, avx512bw,
	avx512dq, avx512cd, avx512er, avx512pf and skylake-avx512.
	* gcc.target/i386/builtin_target.c: Test  avx512vl, avx512bw,
	avx512dq, avx512cd, avx512er and avx512pf.


git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@228009 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 41 insertions, 21 deletions

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d547cfd108a..8a26f68aca5 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2098,6 +2098,7 @@ const struct processor_costs *ix86_cost = &pentium_cost;
 #define m_BONNELL (1<<PROCESSOR_BONNELL)
 #define m_SILVERMONT (1<<PROCESSOR_SILVERMONT)
 #define m_KNL (1<<PROCESSOR_KNL)
+#define m_SKYLAKE_AVX512 (1<<PROCESSOT_SKYLAKE_AVX512)
 #define m_INTEL (1<<PROCESSOR_INTEL)
 
 #define m_GEODE (1<<PROCESSOR_GEODE)
@@ -2567,6 +2568,7 @@ static const struct ptt processor_target_table[PROCESSOR_max] =
   {"bonnell", &atom_cost, 16, 15, 16, 7, 16},
   {"silvermont", &slm_cost, 16, 15, 16, 7, 16},
   {"knl", &slm_cost, 16, 15, 16, 7, 16},
+  {"skylake-avx512", &core_cost, 16, 10, 16, 10, 16},
   {"intel", &intel_cost, 16, 15, 16, 7, 16},
   {"geode", &geode_cost, 0, 0, 0, 0, 0},
   {"k6", &k6_cost, 32, 7, 32, 7, 32},
@@ -3286,6 +3288,9 @@ ix86_option_override_internal (bool main_args_p,
   (PTA_HASWELL | PTA_ADX | PTA_PRFCHW | PTA_RDSEED)
 #define PTA_SKYLAKE \
   (PTA_BROADWELL | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES)
+#define PTA_SKYLAKE_AVX512 \
+  (PTA_SKYLAKE | PTA_AVX512F | PTA_AVX512CD | PTA_AVX512VL \
+   | PTA_AVX512BW | PTA_AVX512DQ)
 #define PTA_KNL \
   (PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD)
 #define PTA_BONNELL \
@@ -3349,6 +3354,7 @@ ix86_option_override_internal (bool main_args_p,
       {"core-avx2", PROCESSOR_HASWELL, CPU_HASWELL, PTA_HASWELL},
       {"broadwell", PROCESSOR_HASWELL, CPU_HASWELL, PTA_BROADWELL},
       {"skylake", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE},
+      {"skylake-avx512", PROCESSOR_HASWELL, CPU_HASWELL, PTA_SKYLAKE_AVX512},
       {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
       {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
       {"silvermont", PROCESSOR_SILVERMONT, CPU_SLM, PTA_SILVERMONT},
@@ -35624,6 +35630,12 @@ fold_builtin_cpu (tree fndecl, tree *args)
     F_BMI2,
     F_AES,
     F_PCLMUL,
+    F_AVX512VL,
+    F_AVX512BW,
+    F_AVX512DQ,
+    F_AVX512CD,
+    F_AVX512ER,
+    F_AVX512PF,
     F_MAX
   };
 
@@ -35658,7 +35670,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
     M_INTEL_COREI7_IVYBRIDGE,
     M_INTEL_COREI7_HASWELL,
     M_INTEL_COREI7_BROADWELL,
-    M_INTEL_COREI7_SKYLAKE
+    M_INTEL_COREI7_SKYLAKE,
+    M_INTEL_COREI7_SKYLAKE_AVX512
   };
 
   static struct _arch_names_table
@@ -35681,6 +35694,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
       {"haswell", M_INTEL_COREI7_HASWELL},
       {"broadwell", M_INTEL_COREI7_BROADWELL},
       {"skylake", M_INTEL_COREI7_SKYLAKE},
+      {"skylake-avx512", M_INTEL_COREI7_SKYLAKE_AVX512},
       {"bonnell", M_INTEL_BONNELL},
       {"silvermont", M_INTEL_SILVERMONT},
       {"knl", M_INTEL_KNL},
@@ -35704,26 +35718,32 @@ fold_builtin_cpu (tree fndecl, tree *args)
     }
   const isa_names_table[] =
     {
-      {"cmov",   F_CMOV},
-      {"mmx",    F_MMX},
-      {"popcnt", F_POPCNT},
-      {"sse",    F_SSE},
-      {"sse2",   F_SSE2},
-      {"sse3",   F_SSE3},
-      {"ssse3",  F_SSSE3},
-      {"sse4a",  F_SSE4_A},
-      {"sse4.1", F_SSE4_1},
-      {"sse4.2", F_SSE4_2},
-      {"avx",    F_AVX},
-      {"fma4",   F_FMA4},
-      {"xop",    F_XOP},
-      {"fma",    F_FMA},
-      {"avx2",   F_AVX2},
-      {"avx512f",F_AVX512F},
-      {"bmi",    F_BMI},
-      {"bmi2",   F_BMI2},
-      {"aes",    F_AES},
-      {"pclmul", F_PCLMUL}
+      {"cmov",    F_CMOV},
+      {"mmx",     F_MMX},
+      {"popcnt",  F_POPCNT},
+      {"sse",     F_SSE},
+      {"sse2",    F_SSE2},
+      {"sse3",    F_SSE3},
+      {"ssse3",   F_SSSE3},
+      {"sse4a",   F_SSE4_A},
+      {"sse4.1",  F_SSE4_1},
+      {"sse4.2",  F_SSE4_2},
+      {"avx",     F_AVX},
+      {"fma4",    F_FMA4},
+      {"xop",     F_XOP},
+      {"fma",     F_FMA},
+      {"avx2",    F_AVX2},
+      {"avx512f", F_AVX512F},
+      {"bmi",     F_BMI},
+      {"bmi2",    F_BMI2},
+      {"aes",     F_AES},
+      {"pclmul",  F_PCLMUL},
+      {"avx512vl",F_AVX512VL},
+      {"avx512bw",F_AVX512BW},
+      {"avx512dq",F_AVX512DQ},
+      {"avx512cd",F_AVX512CD},
+      {"avx512er",F_AVX512ER},
+      {"avx512pf",F_AVX512PF},
     };
 
   tree __processor_model_type = build_processor_model_struct ();