* Makefile.in (OBJS): Add doloop.o.

	* doloop.c: New file.

	* final.c (insn_current_reference_address): Return 0 before final.
	* flags.h (flag_branch_on_count_reg): Fix typos in commentary.
	* jump.c (any_uncondjump_p): Likewise.
	* loop.c (indirect_jump_in_function): Make static.
	(strength_reduce): Call doloop_optimize.
	(insert_bct, instrument_loop_bct): Remove.
	* loop.h (doloop_optimize): Prototype.
	* recog.c (split_all_insns): Split all INSN_P.
	* toplev.c (flag_branch_on_count_reg): Default on.

	* config/c4x/c4x.c (c4x_optimization_options): Don't set
	flag_branch_on_count_reg.
	* config/i386/i386.c (override_options): Likewise.
	* config/rs6000/rs6000.c (optimization_options): Likewise.

	* config/i386/i386.md (decrement_and_branch_on_count): Remove.
	(doloop_end): New.
	(dbra_ge): Remove, as well as all it's splitters.

	* config/rs6000/rs6000.md (decrement_and_branch_on_count): Remove.
	(doloop_end): New.

	* config/ia64/ia64-protos.h (ar_lc_reg_operand): Declare.
	(ia64_register_move_cost): Declare.
	* config/ia64/ia64.c (ar_lc_reg_operand): New.
	(struct ia64_frame_info): Add ar_size.
	(ia64_compute_frame_size): Set it.
	(save_restore_insns): Save and restore ar.lc.
	(ia64_register_move_cost): New, moved from header file.  Handle
	application registers.
	(REG_AR_PFS, REG_AR_EC): Remove.  Replace with AR_*_REGNUM numbers.
	(emit_insn_group_barriers): Special case doloop_end_internal.
	(ia64_epilogue_uses): Mark ar.lc live at end.
	* config/ia64/ia64.h (AR_CCV_REGNUM, AR_LC_REGNUM): New registers.
	(AR_EC_REGNUM, AR_PFS_REGNUM): New registers.
	(FIRST_PSEUDO_REGISTER): Make room.
	(AR_M_REGNO_P, AR_I_REGNO_P, AR_REGNO_P): New.
	(FIXED_REGISTERS, CALL_USED_REGISTERS): Update.
	(REG_ALLOC_ORDER): Update.
	(HARD_REGNO_MODE_OK): Update.
	(REGISTER_NAMES): Update.
	(enum reg_class): Add AR_M_REGS and AR_I_REGS.
	(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Update.
	(REGNO_REG_CLASS): Update.
	(LEGITIMATE_ADDRESS_DISP): Displacement range is 9 bits, not 10.
	(REGISTER_MOVE_COST): Move out of line.
	(PREDICATE_CODES): Update.
	* config/ia64/ia64.md (movdi patterns): Handle ar register classes.
	(addsi3_plus1_alt, adddi3_plus1_alt): New.
	(shladd_elim splitter): Allow constants in the predicate.
	(doloop_end, doloop_end_internal): New.


git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@35358 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 33 insertions, 102 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index eecb151db8a..0c061248959 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8327,27 +8327,32 @@
 ;; This is all complicated by the fact that since this is a jump insn
 ;; we must handle our own reloads.
 
-(define_expand "decrement_and_branch_on_count"
-  [(parallel [(set (pc) (if_then_else
-			  (ne (match_operand:SI 0 "register_operand" "")
-			      (const_int 1))
-			  (label_ref (match_operand 1 "" ""))
-			  (pc)))
-	      (set (match_dup 0)
-		   (plus:SI (match_dup 0)
-			    (const_int -1)))
-	      (clobber (match_scratch:SI 2 ""))
-	      (clobber (reg:CC 17))])]
+(define_expand "doloop_end"
+  [(use (match_operand 0 "" ""))        ; loop pseudo
+   (use (match_operand 1 "" ""))        ; iterations; zero if unknown
+   (use (match_operand 2 "" ""))        ; max iterations
+   (use (match_operand 3 "" ""))        ; loop level 
+   (use (match_operand 4 "" ""))]       ; label
   "TARGET_USE_LOOP"
-  "")
+  "                                 
+{
+  /* Only use cloop on innermost loops.  */
+  if (INTVAL (operands[3]) > 1)
+    FAIL;
+  if (GET_MODE (operands[0]) != SImode)
+    FAIL;
+  emit_jump_insn (gen_doloop_end_internal (operands[4], operands[0],
+					   operands[0]));
+  DONE;
+}")
 
-(define_insn "*dbra_ne"
+(define_insn "doloop_end_internal"
   [(set (pc)
-	(if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r")
+	(if_then_else (ne (match_operand:SI 1 "register_operand" "c,?*r,?*r")
 			  (const_int 1))
 		      (label_ref (match_operand 0 "" ""))
 		      (pc)))
-   (set (match_operand:SI 2 "register_operand" "=1,*r,*m*r")
+   (set (match_operand:SI 2 "register_operand" "=1,1,*m*r")
 	(plus:SI (match_dup 1)
 		 (const_int -1)))
    (clobber (match_scratch:SI 3 "=X,X,r"))
@@ -8372,55 +8377,24 @@
 		      (const_string "ibr")
 		      (const_string "multi")))])
 
-(define_insn "*dbra_ge"
-  [(set (pc)
-	(if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r")
-			  (const_int 0))
-		      (label_ref (match_operand 0 "" ""))
-		      (pc)))
-   (set (match_operand:SI 2 "register_operand" "=1,*r,*m*r")
-	(plus:SI (match_dup 1)
-		 (const_int -1)))
-   (clobber (match_scratch:SI 3 "=X,X,r"))
-   (clobber (reg:CC 17))]
-  "TARGET_USE_LOOP && find_reg_note (insn, REG_NONNEG, 0)"
-  "*
-{
-  if (which_alternative != 0)
-    return \"#\";
-  if (get_attr_length (insn) == 2)
-    return \"loop\\t%l0\";
-  else
-    return \"dec{l}\\t%1\;jne\\t%l0\";
-}"
-  [(set (attr "type")
-	(if_then_else (and (eq_attr "alternative" "0")
-			   (and (ge (minus (match_dup 0) (pc))
-			            (const_int -128))
-			        (lt (minus (match_dup 0) (pc))
-			            (const_int 124))))
-		      (const_string "ibr")
-		      (const_string "multi")))
-   (set_attr "ppro_uops" "many")])
-
 (define_split
   [(set (pc)
 	(if_then_else (ne (match_operand:SI 1 "register_operand" "")
 			  (const_int 1))
 		      (match_operand 0 "" "")
 		      (pc)))
-   (set (match_operand:SI 2 "register_operand" "")
+   (set (match_dup 1)
 	(plus:SI (match_dup 1)
 		 (const_int -1)))
-   (clobber (match_scratch:SI 3 ""))
+   (clobber (match_scratch:SI 2 ""))
    (clobber (reg:CC 17))]
-  "TARGET_USE_LOOP && reload_completed
-   && ! (REGNO (operands[1]) == 2 && rtx_equal_p (operands[1], operands[2]))"
-  [(set (match_dup 2) (match_dup 1))
-   (parallel [(set (reg:CCZ 17)
-		   (compare:CCZ (plus:SI (match_dup 2) (const_int -1))
+  "TARGET_USE_LOOP
+   && reload_completed
+   && REGNO (operands[1]) != 2"
+  [(parallel [(set (reg:CCZ 17)
+		   (compare:CCZ (plus:SI (match_dup 1) (const_int -1))
 				 (const_int 0)))
-	      (set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))])
+	      (set (match_dup 1) (plus:SI (match_dup 1) (const_int -1)))])
    (set (pc) (if_then_else (ne (reg:CCZ 17) (const_int 0))
 			   (match_dup 0)
 			   (pc)))]
@@ -8432,12 +8406,15 @@
 			  (const_int 1))
 		      (match_operand 0 "" "")
 		      (pc)))
-   (set (match_operand:SI 2 "memory_operand" "")
+   (set (match_operand:SI 2 "nonimmediate_operand" "")
 	(plus:SI (match_dup 1)
 		 (const_int -1)))
    (clobber (match_scratch:SI 3 ""))
    (clobber (reg:CC 17))]
-  "TARGET_USE_LOOP && reload_completed"
+  "TARGET_USE_LOOP
+   && reload_completed
+   && (! REG_P (operands[2])
+       || ! rtx_equal_p (operands[1], operands[2]))"
   [(set (match_dup 3) (match_dup 1))
    (parallel [(set (reg:CCZ 17)
 		   (compare:CCZ (plus:SI (match_dup 3) (const_int -1))
@@ -8448,52 +8425,6 @@
 			   (match_dup 0)
 			   (pc)))]
   "")
-
-(define_split
-  [(set (pc)
-	(if_then_else (ge (match_operand:SI 1 "register_operand" "")
-			  (const_int 0))
-		      (match_operand 0 "" "")
-		      (pc)))
-   (set (match_operand:SI 2 "register_operand" "")
-	(plus:SI (match_dup 1)
-		 (const_int -1)))
-   (clobber (match_scratch:SI 3 ""))
-   (clobber (reg:CC 17))]
-  "TARGET_USE_LOOP && reload_completed
-   && ! (REGNO (operands[1]) == 2 && rtx_equal_p (operands[1], operands[2]))"
-  [(set (match_dup 2) (match_dup 1))
-   (parallel [(set (reg:CCNO 17)
-		   (compare:CCNO (plus:SI (match_dup 2) (const_int -1))
-				 (const_int 0)))
-	      (set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))])
-   (set (pc) (if_then_else (lt (reg:CCNO 17) (const_int 0))
-			   (match_dup 0)
-			   (pc)))]
-  "")
-  
-(define_split
-  [(set (pc)
-	(if_then_else (ge (match_operand:SI 1 "register_operand" "")
-			  (const_int 0))
-		      (match_operand 0 "" "")
-		      (pc)))
-   (set (match_operand:SI 2 "memory_operand" "")
-	(plus:SI (match_dup 1)
-		 (const_int -1)))
-   (clobber (match_scratch:SI 3 ""))
-   (clobber (reg:CC 17))]
-  "TARGET_USE_LOOP && reload_completed"
-  [(set (match_dup 3) (match_dup 1))
-   (parallel [(set (reg:CCNO 17)
-		   (compare:CCNO (plus:SI (match_dup 3) (const_int -1))
-				 (const_int 0)))
-	      (set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))])
-   (set (match_dup 2) (match_dup 3))
-   (set (pc) (if_then_else (lt (reg:CCNO 17) (const_int 0))
-			   (match_dup 0)
-			   (pc)))]
-  "")
 
 ;; Call instructions.