* i386-protos.h (no_comparison_operator, uno_comparison_operator):

	Remove.
	(ix86_comparison_operator, ix86_cc_mode): Declare
	* i386.h (CCGC, CCGCO): New modes.
	(SELECT_CC_MODE): Move offline to ....
	* i386.c (ix86_cc_mode): .... here; use new modes.
	(ix86_comparison_operator): New.
	(fcmov_comparison_operator): Ensure proper mode.
	(put_condition_mode): More sanity checking.
	(ix86_match_ccmode): Handle new modes.
	(ix86_expand_fp_compare): GEU requires CCmode.
	(ix86_expand_strlensi_unroll_1): Use emit_cmp_and_jump_insn instead of
	doing it by hand.
	* i386.md (cmp?i_ccz_1): Remove
	(cmp?i_ccno_1): Use ix86_match_ccmode.
	(cmp?i_minus_1): New.
	(cmpsi_1): New expander.
	(cmpqi_ext_1): Use match_ccmode
	(cmpqi_ext_3): New expander.
	(cmpqi_ext_3_insn): Rename from cmpqi_ext_3.
	(cmpqi_ext_4): Use match_ccmode.
	(add?i_?): Use match_ccmode.
	(add?i_6): New.
	(test?i_ccz_1): Remove
	(test?i_1): New.
	(testsi_ccno_1, testqi_ccz_1, testqi_ext_ccno_0): New expander.
	(testqi_ext_0): Use ix86_match_ccmode.
	(*xorqi_cc_ext_1): Use ix86_match_ccmode.
	(xorqi_cc_ext_1): New expander.
	(shift patterns): Use CCGOCmode for all shifts except for sar.
	(setcc_?, jcc_?, miv?icc_nic): Use ix86_comparison_operator.
	(setcc_3, jcc_3, miv?icc_c): Remove.


git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@36442 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 314 insertions, 221 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 91ae7b83337..b825e0f2242 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1061,11 +1061,11 @@
   DONE;
 }")
 
-(define_insn "cmpsi_ccz_1"
-  [(set (reg:CCZ 17)
-	(compare:CCZ (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
-		     (match_operand:SI 1 "const0_operand" "n,n")))]
-  ""
+(define_insn "*cmpsi_ccno_1"
+  [(set (reg 17)
+	(compare (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
+		 (match_operand:SI 1 "const0_operand" "n,n")))]
+  "ix86_match_ccmode (insn, CCNOmode)"
   "@
    test{l}\\t{%0, %0|%0, %0}
    cmp{l}\\t{%1, %0|%0, %1}"
@@ -1073,28 +1073,34 @@
    (set_attr "length_immediate" "0,1")
    (set_attr "mode" "SI")])
 
-(define_insn "cmpsi_ccno_1"
-  [(set (reg:CCNO 17)
-	(compare:CCNO (match_operand:SI 0 "nonimmediate_operand" "r,?mr")
-		      (match_operand:SI 1 "const0_operand" "n,n")))]
-  ""
-  "@
-   test{l}\\t{%0, %0|%0, %0}
-   cmp{l}\\t{%1, %0|%0, %1}"
-  [(set_attr "type" "test,icmp")
-   (set_attr "length_immediate" "0,1")
+(define_insn "*cmpsi_minus_1"
+  [(set (reg 17)
+	(compare (minus:SI (match_operand:SI 0 "nonimmediate_operand" "rm,r")
+			   (match_operand:SI 1 "general_operand" "ri,mr"))
+		 (const_int 0)))]
+  "ix86_match_ccmode (insn, CCGOCmode)"
+  "cmp{l}\\t{%1, %0|%0, %1}"
+  [(set_attr "type" "icmp")
    (set_attr "mode" "SI")])
 
-(define_insn "cmpsi_1"
+(define_expand "cmpsi_1"
   [(set (reg:CC 17)
 	(compare:CC (match_operand:SI 0 "nonimmediate_operand" "rm,r")
 		    (match_operand:SI 1 "general_operand" "ri,mr")))]
-  "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
+  ""
+  "")
+
+(define_insn "*cmpsi_1_insn"
+  [(set (reg 17)
+	(compare (match_operand:SI 0 "nonimmediate_operand" "rm,r")
+		 (match_operand:SI 1 "general_operand" "ri,mr")))]
+  "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
+    && ix86_match_ccmode (insn, CCmode)"
   "cmp{l}\\t{%1, %0|%0, %1}"
   [(set_attr "type" "icmp")
    (set_attr "mode" "SI")])
 
-(define_insn "*cmphi_0"
+(define_insn "*cmphi_ccno_1"
   [(set (reg 17)
 	(compare (match_operand:HI 0 "nonimmediate_operand" "r,?mr")
 		 (match_operand:HI 1 "const0_operand" "n,n")))]
@@ -1106,32 +1112,31 @@
    (set_attr "length_immediate" "0,1")
    (set_attr "mode" "HI")])
 
-(define_insn "*cmphi_1"
-  [(set (reg:CC 17)
-	(compare:CC (match_operand:HI 0 "nonimmediate_operand" "rm,r")
-		    (match_operand:HI 1 "general_operand" "ri,mr")))]
-  "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
+(define_insn "*cmphi_minus_1"
+  [(set (reg 17)
+	(compare (minus:HI (match_operand:HI 0 "nonimmediate_operand" "rm,r")
+			   (match_operand:HI 1 "general_operand" "ri,mr"))
+		 (const_int 0)))]
+  "ix86_match_ccmode (insn, CCGOCmode)"
   "cmp{w}\\t{%1, %0|%0, %1}"
   [(set_attr "type" "icmp")
    (set_attr "mode" "HI")])
 
-(define_insn "cmpqi_ccz_1"
-  [(set (reg:CCZ 17)
-	(compare:CCZ (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
-		     (match_operand:QI 1 "const0_operand" "n,n")))]
-  ""
-  "@
-   test{b}\\t{%0, %0|%0, %0}
-   cmp{b}\\t{$0, %0|%0, 0}"
-  [(set_attr "type" "test,icmp")
-   (set_attr "length_immediate" "0,1")
-   (set_attr "mode" "QI")])
+(define_insn "*cmphi_1"
+  [(set (reg 17)
+	(compare (match_operand:HI 0 "nonimmediate_operand" "rm,r")
+		 (match_operand:HI 1 "general_operand" "ri,mr")))]
+  "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
+   && ix86_match_ccmode (insn, CCmode)"
+  "cmp{w}\\t{%1, %0|%0, %1}"
+  [(set_attr "type" "icmp")
+   (set_attr "mode" "HI")])
 
 (define_insn "*cmpqi_ccno_1"
-  [(set (reg:CCNO 17)
-	(compare:CCNO (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
-		      (match_operand:QI 1 "const0_operand" "n,n")))]
-  ""
+  [(set (reg 17)
+	(compare (match_operand:QI 0 "nonimmediate_operand" "q,?mq")
+		 (match_operand:QI 1 "const0_operand" "n,n")))]
+  "ix86_match_ccmode (insn, CCNOmode)"
   "@
    test{b}\\t{%0, %0|%0, %0}
    cmp{b}\\t{$0, %0|%0, 0}"
@@ -1140,24 +1145,35 @@
    (set_attr "mode" "QI")])
 
 (define_insn "*cmpqi_1"
-  [(set (reg:CC 17)
-	(compare:CC (match_operand:QI 0 "nonimmediate_operand" "qm,q")
-		    (match_operand:QI 1 "general_operand" "qi,mq")))]
-  "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
+  [(set (reg 17)
+	(compare (match_operand:QI 0 "nonimmediate_operand" "qm,q")
+		 (match_operand:QI 1 "general_operand" "qi,mq")))]
+  "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
+    && ix86_match_ccmode (insn, CCmode)"
   "cmp{b}\\t{%1, %0|%0, %1}"
   [(set_attr "type" "icmp")
    (set_attr "mode" "QI")])
 
+(define_insn "*cmpqi_minus_1"
+  [(set (reg 17)
+	(compare (minus:QI (match_operand:QI 0 "nonimmediate_operand" "rm,r")
+			   (match_operand:QI 1 "general_operand" "ri,mr"))
+		 (const_int 0)))]
+  "ix86_match_ccmode (insn, CCGOCmode)"
+  "cmp{w}\\t{%1, %0|%0, %1}"
+  [(set_attr "type" "icmp")
+   (set_attr "mode" "QI")])
+
 (define_insn "*cmpqi_ext_1"
-  [(set (reg:CC 17)
-	(compare:CC
+  [(set (reg 17)
+	(compare
 	  (match_operand:QI 0 "general_operand" "qm")
 	  (subreg:QI
 	    (zero_extract:SI
 	      (match_operand 1 "ext_register_operand" "q")
 	      (const_int 8)
 	      (const_int 8)) 0)))]
-  ""
+  "ix86_match_ccmode (insn, CCmode)"
   "cmp{b}\\t{%h1, %0|%0, %h1}"
   [(set_attr "type" "icmp")
    (set_attr "mode" "QI")])
@@ -1177,7 +1193,7 @@
    (set_attr "length_immediate" "0")
    (set_attr "mode" "QI")])
 
-(define_insn "cmpqi_ext_3"
+(define_expand "cmpqi_ext_3"
   [(set (reg:CC 17)
 	(compare:CC
 	  (subreg:QI
@@ -1187,13 +1203,25 @@
 	      (const_int 8)) 0)
 	  (match_operand:QI 1 "general_operand" "qmn")))]
   ""
+  "")
+
+(define_insn "cmpqi_ext_3_insn"
+  [(set (reg 17)
+	(compare
+	  (subreg:QI
+	    (zero_extract:SI
+	      (match_operand 0 "ext_register_operand" "q")
+	      (const_int 8)
+	      (const_int 8)) 0)
+	  (match_operand:QI 1 "general_operand" "qmn")))]
+  "ix86_match_ccmode (insn, CCmode)"
   "cmp{b}\\t{%1, %h0|%h0, %1}"
   [(set_attr "type" "icmp")
    (set_attr "mode" "QI")])
 
 (define_insn "*cmpqi_ext_4"
-  [(set (reg:CC 17)
-	(compare:CC
+  [(set (reg 17)
+	(compare
 	  (subreg:QI
 	    (zero_extract:SI
 	      (match_operand 0 "ext_register_operand" "q")
@@ -1204,7 +1232,7 @@
 	      (match_operand 1 "ext_register_operand" "q")
 	      (const_int 8)
 	      (const_int 8)) 0)))]
-  ""
+  "ix86_match_ccmode (insn, CCmode)"
   "cmp{b}\\t{%h1, %h0|%h0, %h1}"
   [(set_attr "type" "icmp")
    (set_attr "mode" "QI")])
@@ -3955,7 +3983,7 @@
 	  (const_int 0)))			
    (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
 	(plus:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (PLUS, SImode, operands)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
@@ -4001,7 +4029,7 @@
 	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
 		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:SI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
@@ -4043,12 +4071,13 @@
    (set_attr "mode" "SI")])
 
 (define_insn "*addsi_4"
-  [(set (reg:CC 17)
-	(compare:CC (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))
-		    (match_operand:SI 1 "nonimmediate_operand" "%0,0")))
+  [(set (reg 17)
+	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))
+		 (match_operand:SI 1 "nonimmediate_operand" "%0,0")))
    (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
 	(plus:SI (match_dup 1) (match_dup 2)))]
   "ix86_binary_operator_ok (PLUS, SImode, operands)
+   && ix86_match_ccmode (insn, CCmode)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
    && ! pic_symbolic_operand (operands[2], VOIDmode)"
@@ -4057,11 +4086,12 @@
    (set_attr "mode" "SI")])
 
 (define_insn "*addsi_5"
-  [(set (reg:CC 17)
-	(compare:CC (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
-		    (match_operand:SI 1 "nonimmediate_operand" "%0")))
+  [(set (reg 17)
+	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
+		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:SI 0 "=r"))]
   "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
+   && ix86_match_ccmode (insn, CCmode)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
    && ! pic_symbolic_operand (operands[2], VOIDmode)"
@@ -4069,6 +4099,54 @@
   [(set_attr "type" "alu")
    (set_attr "mode" "SI")])
 
+(define_insn "*addsi_6"
+  [(set (reg 17)
+	(compare
+	  (plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
+		   (match_operand:SI 2 "general_operand" "rmni"))
+	  (const_int 0)))			
+   (clobber (match_scratch:SI 0 "=r"))]
+  "ix86_match_ccmode (insn, CCGOCmode)
+   && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
+   /* Current assemblers are broken and do not allow @GOTOFF in
+      ought but a memory context. */
+   && ! pic_symbolic_operand (operands[2], VOIDmode)"
+  "*
+{
+  switch (get_attr_type (insn))
+    {
+    case TYPE_INCDEC:
+      if (! rtx_equal_p (operands[0], operands[1]))
+	abort ();
+      if (operands[2] == const1_rtx)
+        return \"inc{l}\\t%0\";
+      else if (operands[2] == constm1_rtx)
+        return \"dec{l}\\t%0\";
+      else
+	abort();
+
+    default:
+      if (! rtx_equal_p (operands[0], operands[1]))
+	abort ();
+      /* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
+	 Exceptions: -128 encodes smaller than 128, so swap sign and op.  */
+      if (GET_CODE (operands[2]) == CONST_INT
+          && (INTVAL (operands[2]) == 128
+	      || (INTVAL (operands[2]) < 0
+		  && INTVAL (operands[2]) != -128)))
+        {
+          operands[2] = GEN_INT (-INTVAL (operands[2]));
+          return \"sub{l}\\t{%2, %0|%0, %2}\";
+        }
+      return \"add{l}\\t{%2, %0|%0, %2}\";
+    }
+}"
+  [(set (attr "type")
+     (if_then_else (match_operand:SI 2 "incdec_operand" "")
+	(const_string "incdec")
+	(const_string "alu")))
+   (set_attr "mode" "SI")])
+
 (define_expand "addhi3"
   [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
 		   (plus:HI (match_operand:HI 1 "nonimmediate_operand" "")
@@ -4173,7 +4251,7 @@
 	  (const_int 0)))			
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(plus:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (PLUS, HImode, operands)"
   "*
 {
@@ -4213,7 +4291,7 @@
 	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
 		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "*
 {
@@ -4249,26 +4327,70 @@
    (set_attr "mode" "HI")])
 
 (define_insn "*addhi_4"
-  [(set (reg:CC 17)
-	(compare:CC (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))
-		    (match_operand:HI 1 "nonimmediate_operand" "%0,0")))
+  [(set (reg 17)
+	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))
+		 (match_operand:HI 1 "nonimmediate_operand" "%0,0")))
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(plus:HI (match_dup 1) (match_dup 2)))]
-  "ix86_binary_operator_ok (PLUS, HImode, operands)"
+  "ix86_match_ccmode (insn, CCmode)
+   && ix86_binary_operator_ok (PLUS, HImode, operands)"
   "add{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "HI")])
 
 (define_insn "*addhi_5"
-  [(set (reg:CC 17)
-	(compare:CC (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
-		    (match_operand:HI 1 "nonimmediate_operand" "%0")))
+  [(set (reg 17)
+	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
+		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:HI 0 "=r"))]
-  "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
+  "ix86_match_ccmode (insn, CCmode)
+   && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "add{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "HI")])
 
+(define_insn "*addhi_6"
+  [(set (reg 17)
+	(compare
+	  (plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0")
+		   (match_operand:HI 2 "general_operand" "rmni"))
+	  (const_int 0)))			
+   (clobber (match_scratch:HI 0 "=r"))]
+  "ix86_match_ccmode (insn, CCGOCmode)
+   && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
+  "*
+{
+  switch (get_attr_type (insn))
+    {
+    case TYPE_INCDEC:
+      if (operands[2] == const1_rtx)
+	return \"inc{w}\\t%0\";
+      else if (operands[2] == constm1_rtx
+	       || (GET_CODE (operands[2]) == CONST_INT
+		   && INTVAL (operands[2]) == 65535))
+	return \"dec{w}\\t%0\";
+      abort();
+
+    default:
+      /* Make things pretty and `subl $4,%eax' rather than `addl $-4, %eax'.
+	 Exceptions: -128 encodes smaller than 128, so swap sign and op.  */
+      if (GET_CODE (operands[2]) == CONST_INT
+          && (INTVAL (operands[2]) == 128
+	      || (INTVAL (operands[2]) < 0
+		  && INTVAL (operands[2]) != -128)))
+	{
+	  operands[2] = GEN_INT (-INTVAL (operands[2]));
+	  return \"sub{w}\\t{%2, %0|%0, %2}\";
+	}
+      return \"add{w}\\t{%2, %0|%0, %2}\";
+    }
+}"
+  [(set (attr "type")
+     (if_then_else (match_operand:HI 2 "incdec_operand" "")
+	(const_string "incdec")
+	(const_string "alu")))
+   (set_attr "mode" "HI")])
+
 (define_expand "addqi3"
   [(parallel [(set (match_operand:QI 0 "nonimmediate_operand" "")
 		   (plus:QI (match_operand:QI 1 "nonimmediate_operand" "")
@@ -4384,7 +4506,7 @@
 	  (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(plus:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (PLUS, QImode, operands)"
   "*
 {
@@ -4421,7 +4543,7 @@
 	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
 		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:QI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "*
 {
@@ -4454,26 +4576,67 @@
    (set_attr "mode" "QI")])
 
 (define_insn "*addqi_4"
-  [(set (reg:CC 17)
-	(compare:CC (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))
-		    (match_operand:QI 1 "nonimmediate_operand" "%0,0")))
+  [(set (reg 17)
+	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))
+		 (match_operand:QI 1 "nonimmediate_operand" "%0,0")))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(plus:QI (match_dup 1) (match_dup 2)))]
-  "ix86_binary_operator_ok (PLUS, QImode, operands)"
+  "ix86_match_ccmode (insn, CCmode)
+   && ix86_binary_operator_ok (PLUS, QImode, operands)"
   "add{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "QI")])
 
 (define_insn "*addqi_5"
-  [(set (reg:CC 17)
-	(compare:CC (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
-		    (match_operand:QI 1 "nonimmediate_operand" "%0")))
+  [(set (reg 17)
+	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
+		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
    (clobber (match_scratch:QI 0 "=r"))]
-  "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
+  "ix86_match_ccmode (insn, CCmode)
+   && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "add{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "QI")])
 
+(define_insn "*addqi_6"
+  [(set (reg 17)
+	(compare
+	  (plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0")
+		   (match_operand:QI 2 "general_operand" "qmni"))
+	  (const_int 0)))
+   (clobber (match_scratch:QI 0 "=r"))]
+  "ix86_match_ccmode (insn, CCGOCmode)
+   && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
+  "*
+{
+  switch (get_attr_type (insn))
+    {
+    case TYPE_INCDEC:
+      if (operands[2] == const1_rtx)
+	return \"inc{b}\\t%0\";
+      else if (operands[2] == constm1_rtx
+	       || (GET_CODE (operands[2]) == CONST_INT
+		   && INTVAL (operands[2]) == 255))
+	return \"dec{b}\\t%0\";
+      abort();
+
+    default:
+      /* Make things pretty and `subb $4,%al' rather than `addb $-4, %al'.  */
+      if (GET_CODE (operands[2]) == CONST_INT
+          && INTVAL (operands[2]) < 0)
+	{
+	  operands[2] = GEN_INT (-INTVAL (operands[2]));
+	  return \"sub{b}\\t{%2, %0|%0, %2}\";
+	}
+      return \"add{b}\\t{%2, %0|%0, %2}\";
+    }
+}"
+  [(set (attr "type")
+     (if_then_else (match_operand:QI 2 "incdec_operand" "")
+	(const_string "incdec")
+	(const_string "alu")))
+   (set_attr "mode" "QI")])
+
 
 (define_insn "addqi_ext_1"
   [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "=q")
@@ -4631,7 +4794,7 @@
 	  (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
 	(minus:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (MINUS, SImode, operands)"
   "sub{l}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4675,7 +4838,7 @@
 	  (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm,r")
 	(minus:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (MINUS, HImode, operands)"
   "sub{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4719,7 +4882,7 @@
 	  (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=qm,q")
 	(minus:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (MINUS, QImode, operands)"
   "sub{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -5175,31 +5338,28 @@
 ;; On Pentium, "test imm, reg" is pairable only with eax, ax, and al.
 ;; Note that this excludes ah.
 
-(define_insn "*testsi_ccz_1"
-  [(set (reg:CCZ 17)
-	(compare:CCZ
+
+(define_insn "testsi_1"
+  [(set (reg 17)
+	(compare
 	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
 		  (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
 	  (const_int 0)))]
-  ""
+  "ix86_match_ccmode (insn, CCNOmode)"
   "test{l}\\t{%1, %0|%0, %1}"
   [(set_attr "type" "test")
    (set_attr "modrm" "0,1,1")
    (set_attr "mode" "SI")
    (set_attr "pent_pair" "uv,np,uv")])
 
-(define_insn "testsi_ccno_1"
+(define_expand "testsi_ccno_1"
   [(set (reg:CCNO 17)
 	(compare:CCNO
-	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
-		  (match_operand:SI 1 "nonmemory_operand" "in,in,rin"))
+	  (and:SI (match_operand:SI 0 "nonimmediate_operand" "")
+		  (match_operand:SI 1 "nonmemory_operand" ""))
 	  (const_int 0)))]
   ""
-  "test{l}\\t{%1, %0|%0, %1}"
-  [(set_attr "type" "test")
-   (set_attr "modrm" "0,1,1")
-   (set_attr "mode" "SI")
-   (set_attr "pent_pair" "uv,np,uv")])
+  "")
 
 (define_insn "*testhi_1"
   [(set (reg 17)
@@ -5213,25 +5373,20 @@
    (set_attr "mode" "HI")
    (set_attr "pent_pair" "uv,np,uv")])
 
-(define_insn "testqi_ccz_1"
+(define_expand "testqi_ccz_1"
   [(set (reg:CCZ 17)
-        (compare:CCZ
-	  (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm")
-		  (match_operand:QI 1 "nonmemory_operand" "n,n,qn"))
-	  (const_int 0)))]
+        (compare:CCZ (and:QI (match_operand:QI 0 "nonimmediate_operand" "")
+			     (match_operand:QI 1 "nonmemory_operand" ""))
+		 (const_int 0)))]
   ""
-  "test{b}\\t{%1, %0|%0, %1}"
-  [(set_attr "type" "test")
-   (set_attr "modrm" "0,1,1")
-   (set_attr "mode" "QI")
-   (set_attr "pent_pair" "uv,np,uv")])
+  "")
 
-(define_insn "*testqi_ccno_1"
-  [(set (reg:CCNO 17)
-        (compare:CCNO (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm,r")
-			      (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
-		      (const_int 0)))]
-  ""
+(define_insn "*testqi_1"
+  [(set (reg 17)
+        (compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm,r")
+			 (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
+		 (const_int 0)))]
+  "ix86_match_ccmode (insn, CCNOmode)"
   "@
    test{b}\\t{%1, %0|%0, %1} 
    test{b}\\t{%1, %0|%0, %1} 
@@ -5242,26 +5397,22 @@
    (set_attr "mode" "QI,QI,QI,SI")
    (set_attr "pent_pair" "uv,np,uv,np")])
 
-(define_insn "*testqi_ext_ccz_0"
-  [(set (reg:CCZ 17)
-	(compare:CCZ
+(define_expand "testqi_ext_ccno_0"
+  [(set (reg:CCNO 17)
+	(compare:CCNO
 	  (and:SI
 	    (zero_extract:SI
-	      (match_operand 0 "ext_register_operand" "q")
+	      (match_operand 0 "ext_register_operand" "")
 	      (const_int 8)
 	      (const_int 8))
-	    (match_operand 1 "const_int_operand" "n"))
+	    (match_operand 1 "const_int_operand" ""))
 	  (const_int 0)))]
-  "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff"
-  "test{b}\\t{%1, %h0|%h0, %1}"
-  [(set_attr "type" "test")
-   (set_attr "mode" "QI")
-   (set_attr "length_immediate" "1")
-   (set_attr "pent_pair" "np")])
+  ""
+  "")
 
-(define_insn "testqi_ext_ccno_0"
-  [(set (reg:CCNO 17)
-	(compare:CCNO
+(define_insn "*testqi_ext_0"
+  [(set (reg 17)
+	(compare
 	  (and:SI
 	    (zero_extract:SI
 	      (match_operand 0 "ext_register_operand" "q")
@@ -5269,7 +5420,8 @@
 	      (const_int 8))
 	    (match_operand 1 "const_int_operand" "n"))
 	  (const_int 0)))]
-  "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff"
+  "(unsigned HOST_WIDE_INT) INTVAL (operands[1]) <= 0xff
+   && ix86_match_ccmode (insn, CCNOmode)"
   "test{b}\\t{%1, %h0|%h0, %1}"
   [(set_attr "type" "test")
    (set_attr "mode" "QI")
@@ -5941,9 +6093,9 @@
   [(set_attr "type" "alu")
    (set_attr "mode" "QI")])
 
-(define_insn "xorqi_cc_ext_1"
-  [(set (reg:CCNO 17)
-	(compare:CCNO
+(define_insn "*xorqi_cc_ext_1"
+  [(set (reg 17)
+	(compare
 	  (xor:SI
 	    (zero_extract:SI
 	      (match_operand 1 "ext_register_operand" "0")
@@ -5957,10 +6109,30 @@
 	(xor:SI 
 	  (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8))
 	  (match_dup 2)))]
-  ""
+  "ix86_match_ccmode (insn, CCNOmode)"
   "xor{b}\\t{%2, %h0|%h0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "QI")])
+
+(define_expand "xorqi_cc_ext_1"
+  [(parallel [
+     (set (reg:CCNO 17)
+	  (compare:CCNO
+	    (xor:SI
+	      (zero_extract:SI
+		(match_operand 1 "ext_register_operand" "")
+		(const_int 8)
+		(const_int 8))
+	      (match_operand:QI 2 "general_operand" ""))
+	    (const_int 0)))
+     (set (zero_extract:SI (match_operand 0 "ext_register_operand" "")
+			   (const_int 8)
+			   (const_int 8))
+	  (xor:SI 
+	    (zero_extract:SI (match_dup 1) (const_int 8) (const_int 8))
+	    (match_dup 2)))])]
+  ""
+  "")
 
 ;; Negation instructions
 
@@ -6810,7 +6982,7 @@
 	  (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
 	(ashift:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
   "*
 {
@@ -6939,7 +7111,7 @@
 	  (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
 	(ashift:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
   "*
 {
@@ -7106,7 +7278,7 @@
 	  (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
 	(ashift:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
   "*
 {
@@ -7576,7 +7748,7 @@
 	  (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
 	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\\t%0"
@@ -7597,7 +7769,7 @@
 	  (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
 	(lshiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "@
    shr{l}\\t{%2, %0|%0, %2}"
@@ -7649,7 +7821,7 @@
 	  (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
 	(lshiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{w}\\t%0"
@@ -7670,7 +7842,7 @@
 	  (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
 	(lshiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "@
    shr{w}\\t{%2, %0|%0, %2}"
@@ -7722,7 +7894,7 @@
 	  (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
 	(lshiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && (TARGET_PENTIUM || TARGET_PENTIUMPRO)
    && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "shr{b}\\t%0"
@@ -7743,7 +7915,7 @@
 	  (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
 	(lshiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCNOmode)
+  "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "shr{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
@@ -8132,7 +8304,7 @@
 
 (define_insn "*setcc_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
-	(match_operator:QI 1 "no_comparison_operator"
+	(match_operator:QI 1 "ix86_comparison_operator"
 	  [(reg 17) (const_int 0)]))]
   ""
   "set%C1\\t%0"
@@ -8141,30 +8313,13 @@
 
 (define_insn "*setcc_2"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
-	(match_operator:QI 1 "no_comparison_operator"
+	(match_operator:QI 1 "ix86_comparison_operator"
 	  [(reg 17) (const_int 0)]))]
   ""
   "set%C1\\t%0"
   [(set_attr "type" "setcc")
    (set_attr "mode" "QI")])
 
-(define_insn "*setcc_3"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=qm")
-	(match_operator:QI 1 "uno_comparison_operator"
-	  [(reg:CC 17) (const_int 0)]))]
-  ""
-  "set%C1\\t%0"
-  [(set_attr "type" "setcc")
-   (set_attr "mode" "QI")])
-
-(define_insn "setcc_4"
-  [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm"))
-	(match_operator:QI 1 "uno_comparison_operator"
-	  [(reg:CC 17) (const_int 0)]))]
-  ""
-  "set%C1\\t%0"
-  [(set_attr "type" "setcc")
-   (set_attr "mode" "QI")])
 
 ;; Basic conditional jump instructions.
 ;; We ignore the overflow flag for signed branch instructions.
@@ -8318,7 +8473,7 @@
 
 (define_insn "*jcc_1"
   [(set (pc)
-	(if_then_else (match_operator 1 "no_comparison_operator"
+	(if_then_else (match_operator 1 "ix86_comparison_operator"
 				      [(reg 17) (const_int 0)])
 		      (label_ref (match_operand 0 "" ""))
 		      (pc)))]
@@ -8335,7 +8490,7 @@
 
 (define_insn "*jcc_2"
   [(set (pc)
-	(if_then_else (match_operator 1 "no_comparison_operator"
+	(if_then_else (match_operator 1 "ix86_comparison_operator"
 				      [(reg 17) (const_int 0)])
 		      (pc)
 		      (label_ref (match_operand 0 "" ""))))]
@@ -8350,40 +8505,6 @@
 	     (const_int 0)
 	     (const_int 1)))])
 
-(define_insn "*jcc_3"
-  [(set (pc)
-	(if_then_else (match_operator 1 "uno_comparison_operator"
-				      [(reg:CC 17) (const_int 0)])
-		      (label_ref (match_operand 0 "" ""))
-		      (pc)))]
-  ""
-  "j%C1\\t%l0"
-  [(set_attr "type" "ibr")
-   (set (attr "prefix_0f")
-	   (if_then_else (and (ge (minus (match_dup 0) (pc))
-				  (const_int -128))
-			      (lt (minus (match_dup 0) (pc))
-				  (const_int 124)))
-	     (const_int 0)
-	     (const_int 1)))])
-
-(define_insn "*jcc_4"
-  [(set (pc)
-	(if_then_else (match_operator 1 "uno_comparison_operator"
-				      [(reg:CC 17) (const_int 0)])
-		      (pc)
-		      (label_ref (match_operand 0 "" ""))))]
-  ""
-  "j%c1\\t%l0"
-  [(set_attr "type" "ibr")
-   (set (attr "prefix_0f")
-	   (if_then_else (and (ge (minus (match_dup 0) (pc))
-				  (const_int -128))
-			      (lt (minus (match_dup 0) (pc))
-				  (const_int 124)))
-	     (const_int 0)
-	     (const_int 1)))])
-
 ;; Define combination compare-and-branch fp compare instructions to use
 ;; during early optimization.  Splitting the operation apart early makes
 ;; for bad code when we want to reverse the operation.
@@ -10484,7 +10605,7 @@
 
 (define_insn "*movsicc_noc"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
-	(if_then_else:SI (match_operator 1 "no_comparison_operator" 
+	(if_then_else:SI (match_operator 1 "ix86_comparison_operator" 
 				[(reg 17) (const_int 0)])
 		      (match_operand:SI 2 "nonimmediate_operand" "rm,0")
 		      (match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
@@ -10496,20 +10617,6 @@
   [(set_attr "type" "icmov")
    (set_attr "mode" "SI")])
 
-(define_insn "*movsicc_c"
-  [(set (match_operand:SI 0 "register_operand" "=r,r")
-	(if_then_else:SI (match_operator 1 "uno_comparison_operator" 
-				[(reg:CC 17) (const_int 0)])
-		      (match_operand:SI 2 "nonimmediate_operand" "rm,0")
-		      (match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
-  "TARGET_CMOVE
-   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
-  "@
-   cmov%C1\\t{%2, %0|%0, %2}
-   cmov%c1\\t{%3, %0|%0, %3}"
-  [(set_attr "type" "icmov")
-   (set_attr "mode" "SI")])
-
 (define_expand "movhicc"
   [(set (match_operand:HI 0 "register_operand" "")
 	(if_then_else:HI (match_operand 1 "comparison_operator" "")
@@ -10520,7 +10627,7 @@
 
 (define_insn "*movhicc_noc"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
-	(if_then_else:HI (match_operator 1 "no_comparison_operator" 
+	(if_then_else:HI (match_operator 1 "ix86_comparison_operator" 
 				[(reg 17) (const_int 0)])
 		      (match_operand:HI 2 "nonimmediate_operand" "rm,0")
 		      (match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
@@ -10532,20 +10639,6 @@
   [(set_attr "type" "icmov")
    (set_attr "mode" "HI")])
 
-(define_insn "*movhicc_c"
-  [(set (match_operand:HI 0 "register_operand" "=r,r")
-	(if_then_else:HI (match_operator 1 "uno_comparison_operator" 
-				[(reg:CC 17) (const_int 0)])
-		      (match_operand:HI 2 "nonimmediate_operand" "rm,0")
-		      (match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
-  "TARGET_CMOVE
-   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
-  "@
-   cmov%C1\\t{%2, %0|%0, %2}
-   cmov%c1\\t{%3, %0|%0, %3}"
-  [(set_attr "type" "icmov")
-   (set_attr "mode" "HI")])
-
 (define_expand "movsfcc"
   [(set (match_operand:SF 0 "register_operand" "")
 	(if_then_else:SF (match_operand 1 "comparison_operator" "")