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authorJan Hubicka <jh@suse.cz>2000-09-29 11:24:13 +0000
committerJan Hubicka <jh@suse.cz>2000-09-29 11:24:13 +0000
commit995a2a969b253a9ad5d9e4b798559627a6ec9a00 (patch)
treedaf24fe6a604f9c91a67080db41f6d3f1e17db76 /gcc/config/i386/i386.md
parent9358537d2c3524243e9b6f1b73c15bf449b3d764 (diff)
* recog.c (recog_memoized): Rename to recog_memoized_1.
* recog.h (recog_memoized): Rename to recog_memoized_1. (recog_memoized): New macro. * rtl.h (single_set): Rename to single_set_1 (single_set): New macro. * rtlanal.c (single_set): Rename to single_set_1; expect clobbers to be last. * i386.md (strmovsi_1, strmovhi_1 strmovqi_1): Do not use match_dup of input operands at outputs. Use register_operand for memory expression. (rep_movsi): Put use last, canonicalize. Use register_operand for memory expression. (rep_movqi): Put use last. Use register_operand for memory expression. (strsetsi_1, strset_hi_1, strsetqi_1): Do not use match_dup of input operands at outputs. Use register_operand for memory expression. (rep_stossi): Put use last; canonicalize; fix match_dup in the address expression (rep_stosqi): Likewise. (memcmp expander): Update calls. (cmpstrsi_nz_1, cmpstrsi_1, strlensi_1): Avoid match_dups in the clobbers. * i386.md (fp_jcc_3, fp_jcc_4, jp_fcc_5): if_then_else operand is VOIDmode. (fp_jcc_4, fp_jcc_3): Refuse unordered comparisons. git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@36664 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/i386.md')
-rw-r--r--gcc/config/i386/i386.md116
1 files changed, 55 insertions, 61 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index a8555089f57..db8be567a43 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8539,7 +8539,7 @@
(define_insn "*fp_jcc_3"
[(set (pc)
- (if_then_else (match_operator:CCFP 0 "comparison_operator"
+ (if_then_else (match_operator 0 "comparison_operator"
[(match_operand 1 "register_operand" "f")
(match_operand 2 "nonimmediate_operand" "fm")])
(label_ref (match_operand 3 "" ""))
@@ -8550,12 +8550,14 @@
"TARGET_80387
&& (GET_MODE (operands[1]) == SFmode || GET_MODE (operands[1]) == DFmode)
&& GET_MODE (operands[1]) == GET_MODE (operands[2])
- && !ix86_use_fcomi_compare (GET_CODE (operands[0]))"
+ && !ix86_use_fcomi_compare (GET_CODE (operands[0]))
+ && SELECT_CC_MODE (GET_CODE (operands[0]),
+ operands[1], operands[2]) == CCFPmode"
"#")
(define_insn "*fp_jcc_4"
[(set (pc)
- (if_then_else (match_operator:CCFP 0 "comparison_operator"
+ (if_then_else (match_operator 0 "comparison_operator"
[(match_operand 1 "register_operand" "f")
(match_operand 2 "nonimmediate_operand" "fm")])
(pc)
@@ -8566,7 +8568,9 @@
"TARGET_80387
&& (GET_MODE (operands[1]) == SFmode || GET_MODE (operands[1]) == DFmode)
&& GET_MODE (operands[1]) == GET_MODE (operands[2])
- && !ix86_use_fcomi_compare (GET_CODE (operands[0]))"
+ && !ix86_use_fcomi_compare (GET_CODE (operands[0]))
+ && SELECT_CC_MODE (GET_CODE (operands[0]),
+ operands[1], operands[2]) == CCFPmode"
"#")
(define_insn "*fp_jcc_5"
@@ -10003,10 +10007,10 @@
[(set (mem:SI (match_operand:SI 2 "register_operand" "0"))
(mem:SI (match_operand:SI 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_dup 0)
+ (plus:SI (match_dup 2)
(const_int 4)))
(set (match_operand:SI 1 "register_operand" "=S")
- (plus:SI (match_dup 1)
+ (plus:SI (match_dup 3)
(const_int 4)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
@@ -10019,10 +10023,10 @@
[(set (mem:HI (match_operand:SI 2 "register_operand" "0"))
(mem:HI (match_operand:SI 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_dup 0)
+ (plus:SI (match_dup 2)
(const_int 2)))
(set (match_operand:SI 1 "register_operand" "=S")
- (plus:SI (match_dup 1)
+ (plus:SI (match_dup 3)
(const_int 2)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
@@ -10035,10 +10039,10 @@
[(set (mem:QI (match_operand:SI 2 "register_operand" "0"))
(mem:QI (match_operand:SI 3 "register_operand" "1")))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_dup 0)
+ (plus:SI (match_dup 2)
(const_int 1)))
(set (match_operand:SI 1 "register_operand" "=S")
- (plus:SI (match_dup 1)
+ (plus:SI (match_dup 3)
(const_int 1)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
@@ -10047,21 +10051,18 @@
(set_attr "memory" "both")
(set_attr "mode" "QI")])
-;; It might seem that operands 3 & 4 could use predicate register_operand.
-;; But strength reduction might offset the MEM expression. So we let
-;; reload put the address into %edi & %esi.
-
(define_insn "rep_movsi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0))
- (use (match_operand:SI 5 "register_operand" "2"))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_operand:SI 3 "address_operand" "0")
- (ashift:SI (match_dup 5) (const_int 2))))
+ (plus:SI (ashift:SI (match_operand:SI 5 "register_operand" "2")
+ (const_int 2))
+ (match_operand:SI 3 "register_operand" "0")))
(set (match_operand:SI 1 "register_operand" "=S")
- (plus:SI (match_operand:SI 4 "address_operand" "1")
- (ashift:SI (match_dup 5) (const_int 2))))
+ (plus:SI (ashift:SI (match_dup 5) (const_int 2))
+ (match_operand:SI 4 "register_operand" "1")))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
+ (use (match_dup 5))
(use (reg:SI 19))]
""
"rep\;movsl|rep movsd"
@@ -10072,13 +10073,14 @@
(define_insn "rep_movqi"
[(set (match_operand:SI 2 "register_operand" "=c") (const_int 0))
- (use (match_operand:SI 5 "register_operand" "2"))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_operand:SI 3 "address_operand" "0") (match_dup 5)))
+ (plus:SI (match_operand:SI 3 "register_operand" "0")
+ (match_operand:SI 5 "register_operand" "2")))
(set (match_operand:SI 1 "register_operand" "=S")
- (plus:SI (match_operand:SI 4 "address_operand" "1") (match_dup 5)))
+ (plus:SI (match_operand:SI 4 "register_operand" "1") (match_dup 5)))
(set (mem:BLK (match_dup 3))
(mem:BLK (match_dup 4)))
+ (use (match_dup 5))
(use (reg:SI 19))]
""
"rep\;movsb|rep movsb"
@@ -10307,7 +10309,7 @@
[(set (mem:SI (match_operand:SI 1 "register_operand" "0"))
(match_operand:SI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_dup 0)
+ (plus:SI (match_dup 1)
(const_int 4)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
@@ -10320,7 +10322,7 @@
[(set (mem:HI (match_operand:SI 1 "register_operand" "0"))
(match_operand:HI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_dup 0)
+ (plus:SI (match_dup 1)
(const_int 2)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
@@ -10333,7 +10335,7 @@
[(set (mem:QI (match_operand:SI 1 "register_operand" "0"))
(match_operand:QI 2 "register_operand" "a"))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_dup 0)
+ (plus:SI (match_dup 1)
(const_int 1)))
(use (reg:SI 19))]
"TARGET_SINGLE_STRINGOP || optimize_size"
@@ -10342,19 +10344,16 @@
(set_attr "memory" "store")
(set_attr "mode" "QI")])
-;; It might seem that operand 0 could use predicate register_operand.
-;; But strength reduction might offset the MEM expression. So we let
-;; reload put the address into %edi.
-
(define_insn "rep_stossi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0))
- (use (match_operand:SI 2 "register_operand" "a"))
- (use (match_operand:SI 4 "register_operand" "1"))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_operand:SI 3 "address_operand" "0")
- (ashift:SI (match_dup 3) (const_int 2))))
+ (plus:SI (ashift:SI (match_operand:SI 4 "register_operand" "1")
+ (const_int 2))
+ (match_operand:SI 3 "register_operand" "0")))
(set (mem:BLK (match_dup 3))
(const_int 0))
+ (use (match_operand:SI 2 "register_operand" "a"))
+ (use (match_dup 4))
(use (reg:SI 19))]
""
"rep\;stosl|rep stosd"
@@ -10365,12 +10364,13 @@
(define_insn "rep_stosqi"
[(set (match_operand:SI 1 "register_operand" "=c") (const_int 0))
- (use (match_operand:QI 2 "register_operand" "a"))
- (use (match_operand:SI 4 "register_operand" "1"))
(set (match_operand:SI 0 "register_operand" "=D")
- (plus:SI (match_operand:SI 3 "address_operand" "0") (match_dup 3)))
+ (plus:SI (match_operand:SI 3 "register_operand" "0")
+ (match_operand:SI 4 "register_operand" "1")))
(set (mem:BLK (match_dup 3))
(const_int 0))
+ (use (match_operand:QI 2 "register_operand" "a"))
+ (use (match_dup 4))
(use (reg:SI 19))]
""
"rep\;stosb|rep stosb"
@@ -10413,12 +10413,14 @@
emit_move_insn (operands[0], const0_rtx);
DONE;
}
- emit_insn (gen_cmpstrsi_nz_1 (addr1, addr2, countreg, align));
+ emit_insn (gen_cmpstrsi_nz_1 (addr1, addr2, countreg, align,
+ addr1, addr2, countreg));
}
else
{
emit_insn (gen_cmpsi_1 (countreg, countreg));
- emit_insn (gen_cmpstrsi_1 (addr1, addr2, countreg, align));
+ emit_insn (gen_cmpstrsi_1 (addr1, addr2, countreg, align,
+ addr1, addr2, countreg));
}
outlow = gen_lowpart (QImode, out);
@@ -10448,21 +10450,17 @@
;; memcmp recognizers. The `cmpsb' opcode does nothing if the count is
;; zero. Emit extra code to make sure that a zero-length compare is EQ.
-;;
-;; It might seem that operands 0 & 1 could use predicate register_operand.
-;; But strength reduction might offset the MEM expression. So we let
-;; reload put the address into %edi & %esi.
(define_insn "cmpstrsi_nz_1"
[(set (reg:CC 17)
- (compare:CC (mem:BLK (match_operand:SI 0 "address_operand" "S"))
- (mem:BLK (match_operand:SI 1 "address_operand" "D"))))
- (use (match_operand:SI 2 "register_operand" "c"))
+ (compare:CC (mem:BLK (match_operand:SI 4 "register_operand" "0"))
+ (mem:BLK (match_operand:SI 5 "register_operand" "1"))))
+ (use (match_operand:SI 6 "register_operand" "2"))
(use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:SI 19))
- (clobber (match_dup 0))
- (clobber (match_dup 1))
- (clobber (match_dup 2))]
+ (clobber (match_operand:SI 0 "register_operand" "=S"))
+ (clobber (match_operand:SI 1 "register_operand" "=D"))
+ (clobber (match_operand:SI 2 "register_operand" "=c"))]
""
"repz{\;| }cmpsb"
[(set_attr "type" "str")
@@ -10473,17 +10471,17 @@
(define_insn "cmpstrsi_1"
[(set (reg:CC 17)
- (if_then_else:CC (ne (match_operand:SI 2 "register_operand" "c")
+ (if_then_else:CC (ne (match_operand:SI 6 "register_operand" "2")
(const_int 0))
- (compare:SI (mem:BLK (match_operand:SI 0 "address_operand" "S"))
- (mem:BLK (match_operand:SI 1 "address_operand" "D")))
+ (compare:SI (mem:BLK (match_operand:SI 4 "register_operand" "0"))
+ (mem:BLK (match_operand:SI 5 "register_operand" "1")))
(const_int 0)))
(use (match_operand:SI 3 "immediate_operand" "i"))
(use (reg:CC 17))
(use (reg:SI 19))
- (clobber (match_dup 0))
- (clobber (match_dup 1))
- (clobber (match_dup 2))]
+ (clobber (match_operand:SI 0 "register_operand" "=S"))
+ (clobber (match_operand:SI 1 "register_operand" "=D"))
+ (clobber (match_operand:SI 2 "register_operand" "=c"))]
""
"repz{\;| }cmpsb"
[(set_attr "type" "str")
@@ -10547,25 +10545,21 @@
emit_insn (gen_cld ());
emit_insn (gen_strlensi_1 (scratch1, scratch3, eoschar,
- align, constm1_rtx));
+ align, constm1_rtx, scratch3));
emit_insn (gen_one_cmplsi2 (scratch2, scratch1));
emit_insn (gen_addsi3 (out, scratch2, constm1_rtx));
}
DONE;
}")
-;; It might seem that operands 0 & 1 could use predicate register_operand.
-;; But strength reduction might offset the MEM expression. So we let
-;; reload put the address into %edi.
-
(define_insn "strlensi_1"
[(set (match_operand:SI 0 "register_operand" "=&c")
- (unspec:SI [(mem:BLK (match_operand:SI 1 "address_operand" "D"))
+ (unspec:SI [(mem:BLK (match_operand:SI 5 "register_operand" "1"))
(match_operand:QI 2 "general_operand" "a")
(match_operand:SI 3 "immediate_operand" "i")
(match_operand:SI 4 "immediate_operand" "0")] 0))
(use (reg:SI 19))
- (clobber (match_dup 1))
+ (clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (reg:CC 17))]
""
"repnz{\;| }scasb"