* i386.c (ix86_comparison_operator, put_condition_code,

        ix86_match_ccmode, ix86_cc_mode): Handle CCRCmode.
        (ix86_expand_strlensi_unroll_1): Use CCRCmode.
        * i386.h (EXTRA_CC_MODES): Add CCRCmode.
        * i386.md (adddi and negdi splitter): Use CCRCmode.
        (add?i_3, add?i_4, add?i_5): Use CCRCmode; swap operands
        (subsi3_carry): add '*'
        (addsi3_carry_rc, subsi3_carry_rc, x86_movsicc_0_m1_rc): New.
        (cmp to add peep2): Use CCRCmode; swap operands.


git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@36927 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 89 insertions, 46 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b89f50ecb48..3d908eacaef 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3738,10 +3738,11 @@
 		 (match_operand:DI 2 "general_operand" "")))
    (clobber (reg:CC 17))]
   "reload_completed"
-  [(parallel [(set (reg:CC 17) (compare:CC (neg:SI (match_dup 2)) (match_dup 1)))
+  [(parallel [(set (reg:CCRC 17)
+		   (compare:CCRC (match_dup 1) (neg:SI (match_dup 2))))
 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
    (parallel [(set (match_dup 3)
-		   (plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
+		   (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
 				     (match_dup 4))
 			    (match_dup 5)))
 	      (clobber (reg:CC 17))])]
@@ -3762,6 +3763,19 @@
    (set_attr "mode" "SI")
    (set_attr "ppro_uops" "few")])
 
+(define_insn "*addsi3_carry_rc"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
+	  (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
+			    (match_operand:SI 1 "nonimmediate_operand" "%0,0"))
+		   (match_operand:SI 2 "general_operand" "ri,rm")))
+   (clobber (reg:CC 17))]
+  "ix86_binary_operator_ok (PLUS, SImode, operands)"
+  "adc{l}\\t{%2, %0|%0, %2}"
+  [(set_attr "type" "alu")
+   (set_attr "pent_pair" "pu")
+   (set_attr "mode" "SI")
+   (set_attr "ppro_uops" "few")])
+
 (define_expand "addsi3"
   [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
 		   (plus:SI (match_operand:SI 1 "nonimmediate_operand" "")
@@ -4006,8 +4020,8 @@
 
 (define_insn "*addsi_3"
   [(set (reg 17)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
-		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:SI 1 "nonimmediate_operand" "%0")
+		 (neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:SI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
@@ -4052,12 +4066,12 @@
 
 (define_insn "*addsi_4"
   [(set (reg 17)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))
-		 (match_operand:SI 1 "nonimmediate_operand" "%0,0")))
+	(compare (match_operand:SI 1 "nonimmediate_operand" "%0,0")
+		 (neg:SI (match_operand:SI 2 "general_operand" "rmni,rni"))))
    (set (match_operand:SI 0 "nonimmediate_operand" "=r,rm")
 	(plus:SI (match_dup 1) (match_dup 2)))]
   "ix86_binary_operator_ok (PLUS, SImode, operands)
-   && ix86_match_ccmode (insn, CCmode)
+   && ix86_match_ccmode (insn, CCRCmode)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
    && ! pic_symbolic_operand (operands[2], VOIDmode)"
@@ -4067,11 +4081,11 @@
 
 (define_insn "*addsi_5"
   [(set (reg 17)
-	(compare (neg:SI (match_operand:SI 2 "general_operand" "rmni"))
-		 (match_operand:SI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:SI 1 "nonimmediate_operand" "%0")
+		 (neg:SI (match_operand:SI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:SI 0 "=r"))]
   "(GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)
-   && ix86_match_ccmode (insn, CCmode)
+   && ix86_match_ccmode (insn, CCRCmode)
    /* Current assemblers are broken and do not allow @GOTOFF in
       ought but a memory context. */
    && ! pic_symbolic_operand (operands[2], VOIDmode)"
@@ -4268,8 +4282,8 @@
 
 (define_insn "*addhi_3"
   [(set (reg 17)
-	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
-		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:HI 1 "nonimmediate_operand" "%0")
+		 (neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
@@ -4308,11 +4322,11 @@
 
 (define_insn "*addhi_4"
   [(set (reg 17)
-	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))
-		 (match_operand:HI 1 "nonimmediate_operand" "%0,0")))
+	(compare (match_operand:HI 1 "nonimmediate_operand" "%0,0")
+		 (neg:HI (match_operand:HI 2 "general_operand" "rmni,rni"))))
    (set (match_operand:HI 0 "nonimmediate_operand" "=r,rm")
 	(plus:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && ix86_binary_operator_ok (PLUS, HImode, operands)"
   "add{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4320,10 +4334,10 @@
 
 (define_insn "*addhi_5"
   [(set (reg 17)
-	(compare (neg:HI (match_operand:HI 2 "general_operand" "rmni"))
-		 (match_operand:HI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:HI 1 "nonimmediate_operand" "%0")
+		 (neg:HI (match_operand:HI 2 "general_operand" "rmni"))))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "add{w}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4520,8 +4534,8 @@
 
 (define_insn "*addqi_3"
   [(set (reg 17)
-	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
-		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:QI 1 "nonimmediate_operand" "%0")
+		 (neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
    (clobber (match_scratch:QI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
@@ -4557,31 +4571,31 @@
 
 (define_insn "*addqi_4"
   [(set (reg 17)
-	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))
-		 (match_operand:QI 1 "nonimmediate_operand" "%0,0")))
+	(compare (match_operand:QI 1 "nonimmediate_operand" "%0,0")
+		 (neg:QI (match_operand:QI 2 "general_operand" "qmni,qni"))))
    (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm")
 	(plus:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && ix86_binary_operator_ok (PLUS, QImode, operands)"
   "add{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "mode" "QI")])
 
-(define_expand "addqi3_cc"
+(define_expand "addqi3_ccrc"
   [(parallel [
-     (set (reg:CC 17)
-	  (compare:CC (neg:QI (match_operand:QI 2 "general_operand" ""))
-		      (match_operand:QI 1 "nonimmediate_operand" "")))
+     (set (reg:CCRC 17)
+	  (compare:CCRC (match_operand:QI 1 "nonimmediate_operand" "")
+		        (neg:QI (match_operand:QI 2 "general_operand" ""))))
      (clobber (match_scratch:QI 0 ""))])]
   ""
   "")
 
 (define_insn "*addqi_5"
   [(set (reg 17)
-	(compare (neg:QI (match_operand:QI 2 "general_operand" "qmni"))
-		 (match_operand:QI 1 "nonimmediate_operand" "%0")))
+	(compare (match_operand:QI 1 "nonimmediate_operand" "%0")
+		 (neg:QI (match_operand:QI 2 "general_operand" "qmni"))))
    (clobber (match_scratch:QI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "add{b}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
@@ -4734,7 +4748,7 @@
    split_di (operands+1, 1, operands+1, operands+4);
    split_di (operands+2, 1, operands+2, operands+5);")
 
-(define_insn "subsi3_carry"
+(define_insn "*subsi3_carry"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
 	  (minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
 	    (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
@@ -4747,6 +4761,19 @@
    (set_attr "ppro_uops" "few")
    (set_attr "mode" "SI")])
 
+(define_insn "subsi3_carry_rc"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
+	  (minus:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
+	    (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
+	       (match_operand:SI 2 "general_operand" "ri,rm"))))
+   (clobber (reg:CC 17))]
+  "ix86_binary_operator_ok (MINUS, SImode, operands)"
+  "sbb{l}\\t{%2, %0|%0, %2}"
+  [(set_attr "type" "alu")
+   (set_attr "pent_pair" "pu")
+   (set_attr "ppro_uops" "few")
+   (set_attr "mode" "SI")])
+
 (define_expand "subsi3"
   [(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
 		   (minus:SI (match_operand:SI 1 "nonimmediate_operand" "")
@@ -6142,7 +6169,7 @@
      (set (match_dup 0) (neg:SI (match_dup 2)))])
    (parallel
     [(set (match_dup 1)
-	  (plus:SI (plus:SI (ltu:SI (reg:CC 17) (const_int 0))
+	  (plus:SI (plus:SI (gtu:SI (reg:CCRC 17) (const_int 0))
 			    (match_dup 3))
 		   (const_int 0)))
      (clobber (reg:CC 17))])
@@ -10576,6 +10603,22 @@
    (set_attr "mode" "SI")
    (set_attr "length_immediate" "0")])
 
+(define_insn "x86_movsicc_0_m1_rc"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(if_then_else:SI (gtu (reg:CCRC 17) (const_int 0))
+	  (const_int -1)
+	  (const_int 0)))
+   (clobber (reg:CC 17))]
+  ""
+  "sbb{l}\\t%0, %0"
+  ; Since we don't have the proper number of operands for an alu insn,
+  ; fill in all the blanks.
+  [(set_attr "type" "alu")
+   (set_attr "memory" "none")
+   (set_attr "imm_disp" "false")
+   (set_attr "mode" "SI")
+   (set_attr "length_immediate" "0")])
+
 (define_insn "*movsicc_noc"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
 	(if_then_else:SI (match_operator 1 "ix86_comparison_operator" 
@@ -11413,8 +11456,8 @@
   "ix86_match_ccmode (insn, CCGCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
   [(parallel [(set (reg:CCGC 17)
-		   (compare:CCGC (neg:SI (match_dup 1))
-				 (match_dup 0)))
+		   (compare:CCGC (match_dup 0)
+				 (neg:SI (match_dup 1))))
 	      (clobber (match_dup 0))])]
   "operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
 
@@ -11425,8 +11468,8 @@
   "ix86_match_ccmode (insn, CCGCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
   [(parallel [(set (reg:CCGC 17)
-		   (compare:CCGC (neg:HI (match_dup 1))
-				 (match_dup 0)))
+		   (compare:CCGC (match_dup 0)
+				 (neg:HI (match_dup 1))))
 	      (clobber (match_dup 0))])]
   "operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
 
@@ -11437,8 +11480,8 @@
   "ix86_match_ccmode (insn, CCGCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
   [(parallel [(set (reg:CCGC 17)
-		   (compare:CCGC (neg:QI (match_dup 1))
-				 (match_dup 0)))
+		   (compare:CCGC (match_dup 0)
+				 (neg:QI (match_dup 1))))
 	      (clobber (match_dup 0))])]
   "operands[1] = (operands[1] == const1_rtx) ? constm1_rtx : const1_rtx;")
 
@@ -11447,11 +11490,11 @@
   [(set (reg 17)
 	(compare (match_operand:SI 0 "register_operand" "")
 		 (const_int 128)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CC 17)
-		   (compare:CC (neg:SI (const_int -128))
-			       (match_dup 0)))
+  [(parallel [(set (reg:CCRC 17)
+		   (compare:CCRC (match_dup 0)
+			         (neg:SI (const_int -128))))
 	      (clobber (match_dup 0))])]
   "")
 
@@ -11459,11 +11502,11 @@
   [(set (reg 17)
 	(compare (match_operand:HI 0 "register_operand" "")
 		 (const_int 128)))]
-  "ix86_match_ccmode (insn, CCmode)
+  "ix86_match_ccmode (insn, CCRCmode)
    && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CC 17)
-		   (compare:CC (neg:HI (const_int -128))
-			       (match_dup 0)))
+  [(parallel [(set (reg:CCRC 17)
+		   (compare:CCRC (match_dup 0)
+			         (neg:HI (const_int -128))))
 	      (clobber (match_dup 0))])]
   "")