diff options
| author | Uros Bizjak <ubizjak@gmail.com> | 2015-06-04 10:06:11 +0000 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2015-06-04 10:06:11 +0000 |
| commit | 31d8ed0673c115d88339cfe5b2b0c8bc4e432877 (patch) | |
| tree | 6c19af416a8734800d4c1726431a043fb6e3eca9 /gcc/config/i386 | |
| parent | aee81825419e6aef515dda441fdde0d11e31ac98 (diff) | |
PR target/66369
* config/i386/sse.md (<sse2_avx2>_pmovmsk): Merge from avx2_pmovmskb
and sse2_pmovmskb using VI1_AVX2 mode iterator.
(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): New insn pattern.
(*<sse2_avx2>_pmovmskb_zext): Ditto.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@224120 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386')
| -rw-r--r-- | gcc/config/i386/sse.md | 48 |
1 files changed, 36 insertions, 12 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 21c6c6cd5be..e44ba9a6d36 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -13112,24 +13112,48 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "<MODE>")]) -(define_insn "avx2_pmovmskb" - [(set (match_operand:SI 0 "register_operand" "=r") - (unspec:SI [(match_operand:V32QI 1 "register_operand" "x")] - UNSPEC_MOVMSK))] - "TARGET_AVX2" - "vpmovmskb\t{%1, %0|%0, %1}" +(define_insn "*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext" + [(set (match_operand:DI 0 "register_operand" "=r") + (zero_extend:DI + (unspec:SI + [(match_operand:VF_128_256 1 "register_operand" "x")] + UNSPEC_MOVMSK)))] + "TARGET_64BIT && TARGET_SSE" + "%vmovmsk<ssemodesuffix>\t{%1, %k0|%k0, %1}" [(set_attr "type" "ssemov") - (set_attr "prefix" "vex") - (set_attr "mode" "DI")]) + (set_attr "prefix" "maybe_vex") + (set_attr "mode" "<MODE>")]) -(define_insn "sse2_pmovmskb" +(define_insn "<sse2_avx2>_pmovmskb" [(set (match_operand:SI 0 "register_operand" "=r") - (unspec:SI [(match_operand:V16QI 1 "register_operand" "x")] - UNSPEC_MOVMSK))] + (unspec:SI + [(match_operand:VI1_AVX2 1 "register_operand" "x")] + UNSPEC_MOVMSK))] "TARGET_SSE2" "%vpmovmskb\t{%1, %0|%0, %1}" [(set_attr "type" "ssemov") - (set_attr "prefix_data16" "1") + (set (attr "prefix_data16") + (if_then_else + (match_test "TARGET_AVX") + (const_string "*") + (const_string "1"))) + (set_attr "prefix" "maybe_vex") + (set_attr "mode" "SI")]) + +(define_insn "*<sse2_avx2>_pmovmskb_zext" + [(set (match_operand:DI 0 "register_operand" "=r") + (zero_extend:DI + (unspec:SI + [(match_operand:VI1_AVX2 1 "register_operand" "x")] + UNSPEC_MOVMSK)))] + "TARGET_64BIT && TARGET_SSE2" + "%vpmovmskb\t{%1, %k0|%k0, %1}" + [(set_attr "type" "ssemov") + (set (attr "prefix_data16") + (if_then_else + (match_test "TARGET_AVX") + (const_string "*") + (const_string "1"))) (set_attr "prefix" "maybe_vex") (set_attr "mode" "SI")]) |