diff options
| author | Uros Bizjak <ubizjak@gmail.com> | 2015-04-29 18:53:19 +0000 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2015-04-29 18:53:19 +0000 |
| commit | 7c6585035da180f0b60948d7031e84cc09d1c038 (patch) | |
| tree | dae6a7281ef2669aa08033f45b2d5e5ac0d04dcf /gcc/config/i386 | |
| parent | cf6960ab8e32f125bd0a5110618a7cf23f918917 (diff) | |
PR target/65871
* config/i386/i386.md (*bmi_bextr_<mode>_cczonly): New pattern.
(*bmi2_bzhi_<mode>3_1_cczonly): Ditto.
testsuite/ChangeLog:
PR target/65871
* gcc.target/i386/pr65871-1.c: New test
* gcc.target/i386/pr65871-2.c: Ditto.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@222588 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386')
| -rw-r--r-- | gcc/config/i386/i386.md | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 937871a5af5..060ffa8ab84 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12594,6 +12594,20 @@ (set_attr "btver2_decode" "direct, double") (set_attr "mode" "<MODE>")]) +(define_insn "*bmi_bextr_<mode>_cczonly" + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ + (unspec:SWI48 [(match_operand:SWI48 1 "nonimmediate_operand" "r,m") + (match_operand:SWI48 2 "register_operand" "r,r")] + UNSPEC_BEXTR) + (const_int 0))) + (clobber (match_scratch:SWI48 0 "=r,r"))] + "TARGET_BMI" + "bextr\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "bitmanip") + (set_attr "btver2_decode" "direct, double") + (set_attr "mode" "<MODE>")]) + (define_insn "*bmi_blsi_<mode>" [(set (match_operand:SWI48 0 "register_operand" "=r") (and:SWI48 @@ -12667,6 +12681,7 @@ (set_attr "mode" "<MODE>")]) (define_mode_attr k [(SI "k") (DI "q")]) + (define_insn "*bmi2_bzhi_<mode>3_1" [(set (match_operand:SWI48 0 "register_operand" "=r") (zero_extract:SWI48 @@ -12682,6 +12697,23 @@ (set_attr "prefix" "vex") (set_attr "mode" "<MODE>")]) +(define_insn "*bmi2_bzhi_<mode>3_1_cczonly" + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ + (zero_extract:SWI48 + (match_operand:SWI48 1 "nonimmediate_operand" "rm") + (umin:SWI48 + (zero_extend:SWI48 (match_operand:QI 2 "register_operand" "r")) + (match_operand:SWI48 3 "const_int_operand" "n")) + (const_int 0)) + (const_int 0))) + (clobber (match_scratch:SWI48 0 "=r"))] + "TARGET_BMI2 && INTVAL (operands[3]) == <MODE_SIZE> * BITS_PER_UNIT" + "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}" + [(set_attr "type" "bitmanip") + (set_attr "prefix" "vex") + (set_attr "mode" "<MODE>")]) + (define_insn "bmi2_pdep_<mode>3" [(set (match_operand:SWI48 0 "register_operand" "=r") (unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r") |