diff options
author | Daniel Berlin <dberlin@dberlin.org> | 2005-02-28 03:48:13 +0000 |
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committer | Daniel Berlin <dberlin@dberlin.org> | 2005-02-28 03:48:13 +0000 |
commit | ff5f58a960ef5ebef296b78380ac21ec73eb60d3 (patch) | |
tree | 6b416e8523c502a82d386c98de1a39da6527b040 /gcc/config/ia64/ia64.h | |
parent | f9f5c9e8498b005d223e54abc259d8edc19f22f3 (diff) |
Merge from the pain trainstructure-aliasing-branch
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/structure-aliasing-branch@95649 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/ia64/ia64.h')
-rw-r--r-- | gcc/config/ia64/ia64.h | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h index 255f9f29fdf..a81cd2c9fe2 100644 --- a/gcc/config/ia64/ia64.h +++ b/gcc/config/ia64/ia64.h @@ -75,8 +75,6 @@ extern int target_flags; #define MASK_ILP32 0x00000020 /* Generate ILP32 code. */ -#define MASK_B_STEP 0x00000040 /* Emit code for Itanium B step. */ - #define MASK_REG_NAMES 0x00000080 /* Use in/loc/out register names. */ #define MASK_NO_SDATA 0x00000100 /* Disable sdata/scommon/sbss. */ @@ -113,8 +111,6 @@ extern int target_flags; #define TARGET_ILP32 (target_flags & MASK_ILP32) -#define TARGET_B_STEP (target_flags & MASK_B_STEP) - #define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES) #define TARGET_NO_SDATA (target_flags & MASK_NO_SDATA) @@ -196,8 +192,6 @@ extern int ia64_tls_size; N_("Emit stop bits before and after volatile extended asms") }, \ { "no-volatile-asm-stop", -MASK_VOL_ASM_STOP, \ N_("Don't emit stop bits before and after volatile extended asms") }, \ - { "b-step", MASK_B_STEP, \ - N_("Emit code for Itanium (TM) processor B step")}, \ { "register-names", MASK_REG_NAMES, \ N_("Use in/loc/out register names")}, \ { "no-sdata", MASK_NO_SDATA, \ @@ -2199,6 +2193,9 @@ struct machine_function GTY(()) /* The number of varargs registers to save. */ int n_varargs; + + /* The number of the next unwind state to copy. */ + int state_num; }; |