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authorH.J. Lu <hongjiu.lu@intel.com>2010-07-23 19:37:40 +0000
committerH.J. Lu <hongjiu.lu@intel.com>2010-07-23 19:37:40 +0000
commite59b0ef2e7a1fb44791d473ee416aeb01fcb169c (patch)
tree437dca120093cc7b1f6debf6f6b31779526c7192 /gcc/config/mips/mips.h
parentf25b023a0d9de6a6c1e1965d93ba6028cb03fc7d (diff)
parent92ac755201aad4366eaff2b75b3239637bee3590 (diff)
Merged with trunk at revision 162480.ifunc
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/ifunc@162483 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/mips.h')
-rw-r--r--gcc/config/mips/mips.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index ea79eba2550..a75cd578c21 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -3025,6 +3025,7 @@ extern const struct mips_cpu_info *mips_tune_info;
extern const struct mips_rtx_cost_data *mips_cost;
extern bool mips_base_mips16;
extern enum mips_code_readable_setting mips_code_readable;
+extern GTY(()) struct target_globals *mips16_globals;
#endif
/* Enable querying of DFA units. */
@@ -3059,3 +3060,6 @@ extern enum mips_code_readable_setting mips_code_readable;
support this feature. */
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
(((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_absptr)
+
+/* For switching between MIPS16 and non-MIPS16 modes. */
+#define SWITCHABLE_TARGET 1