* config/elfos.h: Follow spelling conventions.

	* config/alpha/alpha.h: Likewise.
	* config/arc/arc.h: Likewise.
	* config/arm/arm.md: Likewise.
	* config/avr/avr.h: Likewise.
	* config/cris/cris.md: Likewise.
	* config/d30v/d30v.h: Likewise.
	* config/frv/frv.c: Likewise.
	* config/frv/frv.h: Likewise.
	* config/h8300/h8300.c: Likewise.
	* config/h8300/h8300.h: Likewise.
	* config/h8300/h8300.md: Likewise.
	* config/i386/cygwin.h: Likewise.
	* config/i386/i386.h: Likewise.
	* config/i386/sysv3.h: Likewise.
	* config/i960/i960.h: Likewise.
	* config/ia64/ia64.h: Likewise.
	* config/ia64/ia64.md: Likewise.
	* config/ip2k/ip2k.h: Likewise.
	* config/m32r/m32r.h: Likewise.
	* config/m68k/m68k.h: Likewise.
	* config/m88k/m88k.h: Likewise.
	* config/mcore/mcore.c: Likewise.
	* config/mcore/mcore.h: Likewise.
	* config/mcore/mcore.md: Likewise.
	* config/mips/mips.h: Likewise.
	* config/mmix/mmix.h: Likewise.
	* config/mmix/mmix.md: Likewise.
	* config/ns32k/netbsd.h: Likewise.
	* config/ns32k/ns32k.h: Likewise.
	* config/ns32k/ns32k.md: Likewise.
	* config/pa/pa.h: Likewise.
	* config/romp/romp.h: Likewise.
	* config/rs6000/rs6000.h: Likewise.
	* config/rs6000/rs6000.md: Likewise.
	* config/sparc/sparc.h: Likewise.
	* config/stormy16/stormy-abi: Likewise.
	* config/stormy16/stormy16.h: Likewise.
	* config/vax/vax.h: Likewise.


git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@57468 138bc75d-0d04-0410-961f-82ee72b054a4

3 files changed, 5 insertions, 5 deletions

diff --git a/gcc/config/ns32k/netbsd.h b/gcc/config/ns32k/netbsd.h
index 66ba1cb4724..595a36c8fb4 100644
--- a/gcc/config/ns32k/netbsd.h
+++ b/gcc/config/ns32k/netbsd.h
@@ -30,7 +30,7 @@ Boston, MA 02111-1307, USA.  */
 
 /* Compile for the floating point unit & 32532 by default;
    Don't assume SB is zero;
-   Don't use bitfield instructions;
+   Don't use bit-field instructions;
    FPU is 32381;
    Use multiply-add instructions */
 
diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h
index 4ecb47b46d5..e6de13ca79c 100644
--- a/gcc/config/ns32k/ns32k.h
+++ b/gcc/config/ns32k/ns32k.h
@@ -126,7 +126,7 @@ extern int target_flags;
 
 #define TARGET_HIMEM (target_flags & MASK_HIMEM)
 
-/* Compile using bitfield insns.  */
+/* Compile using bit-field insns.  */
 #define TARGET_BITFIELD ((target_flags & MASK_NO_BITFIELD) == 0)
 
 #define TARGET_IEEE_COMPARE (target_flags & MASK_IEEE_COMPARE)
@@ -276,7 +276,7 @@ while (0)
 
 /* If bit field type is int, don't let it cross an int,
    and give entire struct the alignment of an int.  */
-/* Required on the 386 since it doesn't have a full set of bitfield insns.
+/* Required on the 386 since it doesn't have a full set of bit-field insns.
    (There is no signed extv insn.)  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md
index ba450012a4a..3929eb95cc1 100644
--- a/gcc/config/ns32k/ns32k.md
+++ b/gcc/config/ns32k/ns32k.md
@@ -2124,7 +2124,7 @@
 }")
 
 ;; extract(base, width, offset)
-;; Signed bitfield extraction is not supported in hardware on the
+;; Signed bit-field extraction is not supported in hardware on the
 ;; NS 32032.  It is therefore better to let GCC figure out a
 ;; good strategy for generating the proper instruction sequence
 ;; and represent it as rtl.
@@ -2169,7 +2169,7 @@
 }")
 
 ;; The exts/ext instructions have the problem that they always access
-;; 32 bits even if the bitfield is smaller. For example the instruction
+;; 32 bits even if the bit-field is smaller. For example the instruction
 ;; 	extsd 7(r1),r0,2,5
 ;; would read not only at address 7(r1) but also at 8(r1) to 10(r1).
 ;; If these addresses are in a different (unmapped) page a memory fault