diff options
| author | David Edelsohn <edelsohn@gnu.org> | 2005-06-13 15:49:51 +0000 |
|---|---|---|
| committer | David Edelsohn <edelsohn@gnu.org> | 2005-06-13 15:49:51 +0000 |
| commit | 64b817b45d18383564dae777e30f04062d73a12e (patch) | |
| tree | a58a9d3d5452d75a261d15b9b8287be2b6853e69 /gcc/config/rs6000/rs6000.md | |
| parent | a5c42af24d409ce683eee66371fcdaec7bdb8f46 (diff) | |
Revert scc_operand patch.
* config/rs6000/predicates.md (scc_operand): Delete.
* config/rs6000/rs6000.md (scc_operand): Change to scc_eq_operand.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@100879 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 8e4fd3551d0..eee241010af 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -11246,7 +11246,7 @@ (define_insn "" [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r") (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r") - (match_operand:SI 2 "scc_operand" "r,O,K,L,I")) + (match_operand:SI 2 "scc_eq_operand" "r,O,K,L,I")) (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r")))] "TARGET_32BIT" "@ @@ -11263,7 +11263,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r") - (match_operand:SI 2 "scc_operand" "r,O,K,L,I,r,O,K,L,I")) + (match_operand:SI 2 "scc_eq_operand" "r,O,K,L,I,r,O,K,L,I")) (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r,r,r,r,r,r")) (const_int 0))) (clobber (match_scratch:SI 4 "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r"))] @@ -11287,7 +11287,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "") - (match_operand:SI 2 "scc_operand" "")) + (match_operand:SI 2 "scc_eq_operand" "")) (match_operand:SI 3 "gpc_reg_operand" "")) (const_int 0))) (clobber (match_scratch:SI 4 ""))] @@ -11306,7 +11306,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r") - (match_operand:SI 2 "scc_operand" "r,O,K,L,I,r,O,K,L,I")) + (match_operand:SI 2 "scc_eq_operand" "r,O,K,L,I,r,O,K,L,I")) (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r,r,r,r,r,r")) (const_int 0))) (set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r") @@ -11331,7 +11331,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "") - (match_operand:SI 2 "scc_operand" "")) + (match_operand:SI 2 "scc_eq_operand" "")) (match_operand:SI 3 "gpc_reg_operand" "")) (const_int 0))) (set (match_operand:SI 0 "gpc_reg_operand" "") @@ -11347,7 +11347,7 @@ (define_insn "" [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r") (neg:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r") - (match_operand:SI 2 "scc_operand" "r,O,K,L,I"))))] + (match_operand:SI 2 "scc_eq_operand" "r,O,K,L,I"))))] "TARGET_32BIT" "@ xor %0,%1,%2\;{ai|addic} %0,%0,-1\;{sfe|subfe} %0,%0,%0 |