diff options
| author | Fariborz Jahanian <fjahanian@apple.com> | 2005-06-10 15:01:59 +0000 |
|---|---|---|
| committer | Fariborz Jahanian <fjahanian@apple.com> | 2005-06-10 15:01:59 +0000 |
| commit | 8164942f3517efa85acbe7f63d9b97b946513252 (patch) | |
| tree | e40684a215a637b820559186d0071f3dfe3e5a20 /gcc/config/rs6000/rs6000.md | |
| parent | 6c23b5e9f0cdfa6af489737c391e6214e76cc8a9 (diff) | |
Use scc_operand predicate for eq:SI in powerpc.
Oked by David Edelsohn.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@100818 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 2f3331b2c9c..ead5f03a3c4 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -11560,7 +11560,7 @@ (define_insn "" [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r") (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r") - (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I")) + (match_operand:SI 2 "scc_operand" "r,O,K,L,I")) (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r")))] "TARGET_32BIT" "@ @@ -11577,7 +11577,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r") - (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I,r,O,K,L,I")) + (match_operand:SI 2 "scc_operand" "r,O,K,L,I,r,O,K,L,I")) (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r,r,r,r,r,r")) (const_int 0))) (clobber (match_scratch:SI 4 "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r"))] @@ -11601,7 +11601,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "") - (match_operand:SI 2 "reg_or_cint_operand" "")) + (match_operand:SI 2 "scc_operand" "")) (match_operand:SI 3 "gpc_reg_operand" "")) (const_int 0))) (clobber (match_scratch:SI 4 ""))] @@ -11620,7 +11620,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r") - (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I,r,O,K,L,I")) + (match_operand:SI 2 "scc_operand" "r,O,K,L,I,r,O,K,L,I")) (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r,r,r,r,r,r")) (const_int 0))) (set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r") @@ -11645,7 +11645,7 @@ (compare:CC (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "") - (match_operand:SI 2 "reg_or_cint_operand" "")) + (match_operand:SI 2 "scc_operand" "")) (match_operand:SI 3 "gpc_reg_operand" "")) (const_int 0))) (set (match_operand:SI 0 "gpc_reg_operand" "") @@ -11661,7 +11661,7 @@ (define_insn "" [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r") (neg:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r") - (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))))] + (match_operand:SI 2 "scc_operand" "r,O,K,L,I"))))] "TARGET_32BIT" "@ xor %0,%1,%2\;{ai|addic} %0,%0,-1\;{sfe|subfe} %0,%0,%0 |