diff options
| author | Eric Christopher <echristo@apple.com> | 2005-08-10 19:52:55 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2005-08-10 19:52:55 +0000 |
| commit | d9beceeab005d12dbdf7406af2172b25278fbbf9 (patch) | |
| tree | 7a3055424b4a8f77e035af7455a562a19bcc5135 /gcc/config/rs6000/rs6000.md | |
| parent | 2999c4b0bd874b796c066888b8cd1e7c5bd97988 (diff) | |
2005-08-10 Eric Christopher <echristo@apple.com>
* config/rs6000/rs6000.c (mems_ok_for_quad_peep): Rewrite.
* config/rs6000/rs6000.md (*lfq_power2, *stfq_power2): Use
V2DFmode.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@102956 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 05ff9bd3b49..288b40f93b0 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4830,7 +4830,7 @@ (match_dup 3) (match_dup 4)))] "TARGET_PPC_GFXOPT && TARGET_HARD_FLOAT && TARGET_FPRS - && !HONOR_NANS (SFmode) && !HONOR_SIGNED_ZEROS (SFmode)" + && !HONOR_NANS (SFmode) && !HONOR_SIGNED_ZEROS (SFmode)" { operands[3] = gen_reg_rtx (SFmode); operands[4] = gen_reg_rtx (SFmode); @@ -9144,11 +9144,11 @@ ;; Peephole to convert two consecutive FP loads or stores into lfq/stfq. (define_insn "*lfq_power2" - [(set (match_operand:TF 0 "gpc_reg_operand" "=f") - (match_operand:TF 1 "memory_operand" ""))] + [(set (match_operand:V2DF 0 "gpc_reg_operand" "=f") + (match_operand:V2DF 1 "memory_operand" ""))] "TARGET_POWER2 && TARGET_HARD_FLOAT && TARGET_FPRS" - "lfq%U1%X1 %0,%1") + "lfq%U1%X1 %0,%1") (define_peephole2 [(set (match_operand:DF 0 "gpc_reg_operand" "") @@ -9160,13 +9160,13 @@ && registers_ok_for_quad_peep (operands[0], operands[2]) && mems_ok_for_quad_peep (operands[1], operands[3])" [(set (match_dup 0) - (match_dup 1))] - "operands[1] = widen_memory_access (operands[1], TFmode, 0); - operands[0] = gen_rtx_REG (TFmode, REGNO (operands[0]));") + (match_dup 1))] + "operands[1] = widen_memory_access (operands[1], V2DFmode, 0); + operands[0] = gen_rtx_REG (V2DFmode, REGNO (operands[0]));") (define_insn "*stfq_power2" - [(set (match_operand:TF 0 "memory_operand" "") - (match_operand:TF 1 "gpc_reg_operand" "f"))] + [(set (match_operand:V2DF 0 "memory_operand" "") + (match_operand:V2DF 1 "gpc_reg_operand" "f"))] "TARGET_POWER2 && TARGET_HARD_FLOAT && TARGET_FPRS" "stfq%U0%X0 %1,%0") @@ -9183,8 +9183,8 @@ && mems_ok_for_quad_peep (operands[0], operands[2])" [(set (match_dup 0) (match_dup 1))] - "operands[0] = widen_memory_access (operands[0], TFmode, 0); - operands[1] = gen_rtx_REG (TFmode, REGNO (operands[1]));") + "operands[0] = widen_memory_access (operands[0], V2DFmode, 0); + operands[1] = gen_rtx_REG (V2DFmode, REGNO (operands[1]));") ;; after inserting conditional returns we can sometimes have ;; unnecessary register moves. Unfortunately we cannot have a |