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author | Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> | 2013-05-02 14:28:13 +0000 |
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committer | Matthew Gretton-Dann <matthew.gretton-dann@linaro.org> | 2013-05-02 14:28:13 +0000 |
commit | b472757a5af5e8bcf85c92d25dc0fa464c4ddac1 (patch) | |
tree | 604f9a852907f16c427b2b3fc5519d79522e4850 /gcc/config | |
parent | 79a11417ffd8dd6efc36a2678aa0b00f13dad3e6 (diff) |
Backport from trunk r198424-198425.
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_8-branch@198544 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/aarch64/aarch64.md | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 00d36cb7905..f312103c99d 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -808,26 +808,28 @@ ) (define_insn "*movsi_aarch64" - [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m, *w, r,*w") - (match_operand:SI 1 "aarch64_mov_operand" " r,M,m,rZ,rZ,*w,*w"))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,*w,m, m,*w, r,*w") + (match_operand:SI 1 "aarch64_mov_operand" " r,M,m, m,rZ,*w,rZ,*w,*w"))] "(register_operand (operands[0], SImode) || aarch64_reg_or_zero (operands[1], SImode))" "@ mov\\t%w0, %w1 mov\\t%w0, %1 ldr\\t%w0, %1 + ldr\\t%s0, %1 str\\t%w1, %0 + str\\t%s1, %0 fmov\\t%s0, %w1 fmov\\t%w0, %s1 fmov\\t%s0, %s1" - [(set_attr "v8type" "move,alu,load1,store1,fmov,fmov,fmov") + [(set_attr "v8type" "move,alu,load1,load1,store1,store1,fmov,fmov,fmov") (set_attr "mode" "SI") - (set_attr "fp" "*,*,*,*,yes,yes,yes")] + (set_attr "fp" "*,*,*,*,*,*,yes,yes,yes")] ) (define_insn "*movdi_aarch64" - [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,m, r, r, *w, r,*w,w") - (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,m,rZ,Usa,Ush,rZ,*w,*w,Dd"))] + [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,*w,m, m,r, r, *w, r,*w,w") + (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,m, m,rZ,*w,Usa,Ush,rZ,*w,*w,Dd"))] "(register_operand (operands[0], DImode) || aarch64_reg_or_zero (operands[1], DImode))" "@ @@ -836,16 +838,18 @@ mov\\t%x0, %1 mov\\t%x0, %1 ldr\\t%x0, %1 + ldr\\t%d0, %1 str\\t%x1, %0 + str\\t%d1, %0 adr\\t%x0, %a1 adrp\\t%x0, %A1 fmov\\t%d0, %x1 fmov\\t%x0, %d1 fmov\\t%d0, %d1 movi\\t%d0, %1" - [(set_attr "v8type" "move,move,move,alu,load1,store1,adr,adr,fmov,fmov,fmov,fmov") + [(set_attr "v8type" "move,move,move,alu,load1,load1,store1,store1,adr,adr,fmov,fmov,fmov,fmov") (set_attr "mode" "DI") - (set_attr "fp" "*,*,*,*,*,*,*,*,yes,yes,yes,yes")] + (set_attr "fp" "*,*,*,*,*,*,*,*,*,*,yes,yes,yes,yes")] ) (define_insn "insv_imm<mode>" |