diff options
| author | Zack Weinberg <zack@codesourcery.com> | 2002-12-16 18:23:00 +0000 |
|---|---|---|
| committer | Zack Weinberg <zack@codesourcery.com> | 2002-12-16 18:23:00 +0000 |
| commit | e617c603ec85a5352d10f30cb3e094a12f708ebe (patch) | |
| tree | c259697c448b0c6f548f153c48c46a8d7a75970f /gcc/config | |
| parent | cb0f4ede438457918d8d6fdcc08ea82f15fda5ba (diff) | |
Merge basic-improvements-branch to trunk
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@60174 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config')
210 files changed, 4272 insertions, 4008 deletions
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index d6a9f6bc661..eeab8057204 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -118,6 +120,8 @@ int alpha_this_literal_sequence_number; int alpha_this_gpdisp_sequence_number; /* Declarations of static functions. */ +static bool alpha_function_ok_for_sibcall + PARAMS ((tree, tree)); static int tls_symbolic_operand_1 PARAMS ((rtx, enum machine_mode, int, int)); static enum tls_model tls_symbolic_operand_type @@ -297,6 +301,9 @@ static void unicosmk_unique_section PARAMS ((tree, int)); #undef TARGET_EXPAND_BUILTIN #define TARGET_EXPAND_BUILTIN alpha_expand_builtin +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL alpha_function_ok_for_sibcall + #if TARGET_ABI_OSF #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK alpha_output_mi_thunk_osf @@ -2274,6 +2281,19 @@ alpha_legitimize_address (x, scratch, mode) } } +/* We do not allow indirect calls to be optimized into sibling calls, nor + can we allow a call to a function in a different compilation unit to + be optimized into a sibcall. */ +static bool +alpha_function_ok_for_sibcall (decl, exp) + tree decl; + tree exp ATTRIBUTE_UNUSED; +{ + return (decl + && (! TREE_PUBLIC (decl) + || (TREE_ASM_WRITTEN (decl) && (*targetm.binds_local_p) (decl)))); +} + /* For TARGET_EXPLICIT_RELOCS, we don't obfuscate a SYMBOL_REF to a small symbolic operand until after reload. At which point we need to replace (mem (symbol_ref)) with (mem (lo_sum $29 symbol_ref)) @@ -9673,7 +9693,7 @@ unicosmk_output_addr_vec (file, vec) int vlen = XVECLEN (body, 0); int idx; - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (lab)); + (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (lab)); for (idx = 0; idx < vlen; idx++) { diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 9e39a40395b..026c62a0bed 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -1164,14 +1164,6 @@ extern int alpha_memory_latency; } \ } -/* We do not allow indirect calls to be optimized into sibling calls, nor - can we allow a call to a function in a different compilation unit to - be optimized into a sibcall. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) \ - (DECL \ - && (! TREE_PUBLIC (DECL) \ - || (TREE_ASM_WRITTEN (DECL) && (*targetm.binds_local_p) (DECL)))) - /* Try to output insns to set TARGET equal to the constant C if it can be done in less than N insns. Do all computations in MODE. Returns the place where the output has been placed if it can be done and the insns have been @@ -1285,12 +1277,6 @@ do { \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -1757,18 +1743,12 @@ do { \ #define USER_LABEL_PREFIX "" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "$%s%d:\n", PREFIX, NUM) - /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where @@ -1877,14 +1857,6 @@ do { \ ( fputs ("\t.lcomm ", (FILE)), \ assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%d\n", (SIZE))) - -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) /* Print operand X (an rtx) in assembler syntax to file FILE. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index c878366b846..062e05e5c42 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -4727,20 +4727,19 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 26)) (clobber (reg:DI 27))] "TARGET_ABI_OPEN_VMS" - "* { switch (which_alternative) { case 0: - return \"mov %2,$27\;jsr $26,0\;ldq $27,0($29)\"; + return "mov %2,$27\;jsr $26,0\;ldq $27,0($29)"; case 1: operands [2] = alpha_use_linkage (operands [0], cfun->decl, 1, 0); operands [3] = alpha_use_linkage (operands [0], cfun->decl, 0, 0); - return \"ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)\"; + return "ldq $26,%3\;ldq $27,%2\;jsr $26,%0\;ldq $27,0($29)"; default: abort(); } -}" +} [(set_attr "type" "jsr") (set_attr "length" "12,16")]) @@ -6460,6 +6459,56 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" FAIL; }) +(define_expand "movstrdi" + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (match_operand:BLK 1 "memory_operand" "")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_operand:DI 3 "immediate_operand" "")) + (use (match_dup 4)) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 18)) + (clobber (reg:DI 19)) + (clobber (reg:DI 20)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))])] + "TARGET_ABI_OPEN_VMS" +{ + operands[4] = gen_rtx_SYMBOL_REF (Pmode, "OTS$MOVE"); + alpha_need_linkage (XSTR (operands[4], 0), 0); +}) + +(define_insn "*movstrdi_1" + [(set (match_operand:BLK 0 "memory_operand" "=m,=m") + (match_operand:BLK 1 "memory_operand" "m,m")) + (use (match_operand:DI 2 "nonmemory_operand" "r,i")) + (use (match_operand:DI 3 "immediate_operand" "")) + (use (match_operand:DI 4 "call_operand" "i,i")) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 18)) + (clobber (reg:DI 19)) + (clobber (reg:DI 20)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))] + "TARGET_ABI_OPEN_VMS" +{ + operands [5] = alpha_use_linkage (operands [4], cfun->decl, 0, 1); + switch (which_alternative) + { + case 0: + return "lda $16,%0\;bis $31,%2,$17\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; + case 1: + return "lda $16,%0\;lda $17,%2($31)\;lda $18,%1\;ldq $26,%5\;lda $25,3($31)\;jsr $26,%4\;ldq $27,0($29)"; + default: + abort(); + } +} + [(set_attr "type" "multi") + (set_attr "length" "28")]) + (define_expand "clrstrqi" [(parallel [(set (match_operand:BLK 0 "memory_operand" "") (const_int 0)) @@ -6472,6 +6521,51 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" else FAIL; }) + +(define_expand "clrstrdi" + [(parallel [(set (match_operand:BLK 0 "memory_operand" "") + (const_int 0)) + (use (match_operand:DI 1 "immediate_operand" "")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_dup 3)) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))])] + "TARGET_ABI_OPEN_VMS" +{ + operands[3] = gen_rtx_SYMBOL_REF (Pmode, "OTS$ZERO"); + alpha_need_linkage (XSTR (operands[3], 0), 0); +}) + +(define_insn "*clrstrdi_1" + [(set (match_operand:BLK 0 "memory_operand" "=m,=m") + (const_int 0)) + (use (match_operand:DI 1 "nonmemory_operand" "r,i")) + (use (match_operand:DI 2 "immediate_operand" "")) + (use (match_operand:DI 3 "call_operand" "i,i")) + (clobber (reg:DI 25)) + (clobber (reg:DI 16)) + (clobber (reg:DI 17)) + (clobber (reg:DI 26)) + (clobber (reg:DI 27))] + "TARGET_ABI_OPEN_VMS" +{ + operands [4] = alpha_use_linkage (operands [3], cfun->decl, 0, 1); + switch (which_alternative) + { + case 0: + return "lda $16,%0\;bis $31,%1,$17\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; + case 1: + return "lda $16,%0\;lda $17,%1($31)\;ldq $26,%4\;lda $25,2($31)\;jsr $26,%3\;ldq $27,0($29)"; + default: + abort(); + } +} + [(set_attr "type" "multi") + (set_attr "length" "24")]) + ;; Subroutine of stack space allocation. Perform a stack probe. (define_expand "probe_stack" @@ -6571,7 +6665,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" "" { operands[2] = gen_label_rtx (); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (operands[2])); return "stq $31,-8192(%1)\;subq %0,1,%0\;lda %1,-8192(%1)\;bne %0,%l2"; @@ -7918,20 +8012,19 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none" (use (reg:DI 26)) (clobber (reg:DI 27))] "TARGET_ABI_OPEN_VMS" - "* { switch (which_alternative) { case 0: - return \"mov %3,$27\;jsr $26,0\;ldq $27,0($29)\"; + return "mov %3,$27\;jsr $26,0\;ldq $27,0($29)"; case 1: operands [3] = alpha_use_linkage (operands [1], cfun->decl, 1, 0); operands [4] = alpha_use_linkage (operands [1], cfun->decl, 0, 0); - return \"ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)\"; + return "ldq $26,%4\;ldq $27,%3\;jsr $26,%1\;ldq $27,0($29)"; default: abort(); } -}" +} [(set_attr "type" "jsr") (set_attr "length" "12,16")]) diff --git a/gcc/config/alpha/elf.h b/gcc/config/alpha/elf.h index dbe92638664..afe96462d4e 100644 --- a/gcc/config/alpha/elf.h +++ b/gcc/config/alpha/elf.h @@ -103,7 +103,7 @@ do { \ #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \ do { \ ASM_OUTPUT_BEFORE_CASE_LABEL (FILE, PREFIX, NUM, JUMPTABLE) \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ } while (0) /* The standard SVR4 assembler seems to require that certain builtin diff --git a/gcc/config/alpha/unicosmk.h b/gcc/config/alpha/unicosmk.h index 8f7b53db071..b8f9512f522 100644 --- a/gcc/config/alpha/unicosmk.h +++ b/gcc/config/alpha/unicosmk.h @@ -350,12 +350,12 @@ ssib_section () \ #undef ASM_OUTPUT_SOURCE_FILENAME /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM) + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM) /* CAM has some restrictions with respect to string literals. It won't accept lines with more that 256 characters which means that we have diff --git a/gcc/config/alpha/vms-cc.c b/gcc/config/alpha/vms-cc.c index 26c3ae3b1ff..07b668f983d 100644 --- a/gcc/config/alpha/vms-cc.c +++ b/gcc/config/alpha/vms-cc.c @@ -25,6 +25,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #undef PATH_SEPARATOR #undef PATH_SEPARATOR_STR diff --git a/gcc/config/alpha/vms-ld.c b/gcc/config/alpha/vms-ld.c index e5688d89d53..60e01d8ddd6 100644 --- a/gcc/config/alpha/vms-ld.c +++ b/gcc/config/alpha/vms-ld.c @@ -26,6 +26,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" typedef struct dsc {unsigned short len, mbz; char *adr; } Descr; diff --git a/gcc/config/alpha/vms.h b/gcc/config/alpha/vms.h index 8df61564e72..57d8e697c46 100644 --- a/gcc/config/alpha/vms.h +++ b/gcc/config/alpha/vms.h @@ -306,7 +306,7 @@ extern void literals_section PARAMS ((void)); #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 3); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 3); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This says how to output assembler code to declare an uninitialized external linkage data object. */ @@ -448,10 +448,7 @@ do { \ #undef PREFERRED_DEBUGGING_TYPE #define PREFERRED_DEBUGGING_TYPE VMS_AND_DWARF2_DEBUG -#undef ASM_FORMAT_PRIVATE_NAME -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* ??? VMS uses different linkage. */ #undef TARGET_ASM_OUTPUT_MI_THUNK diff --git a/gcc/config/alpha/vxworks.h b/gcc/config/alpha/vxworks.h deleted file mode 100644 index a27c6452116..00000000000 --- a/gcc/config/alpha/vxworks.h +++ /dev/null @@ -1,55 +0,0 @@ -/* Definitions of target machine for GNU compiler. Vxworks Alpha version. - Copyright (C) 1998 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* This file just exists to give specs for the Alpha running on VxWorks. */ - -#undef CPP_SUBTARGET_SPEC -#define CPP_SUBTARGET_SPEC "\ -%{mvxsim:-DCPU=SIMALPHADUNIX} \ -%{!mvxsim: %{!mcpu*|mcpu=21064:-DCPU=21064} %{mcpu=21164:-DCPU=21164}} \ -%{posix: -D_POSIX_SOURCE}" - -#define TARGET_OS_CPP_BUILTINS() \ - do { \ - builtin_define ("__vxworks"); \ - builtin_define ("__alpha_vxworks"); \ - builtin_define ("_LONGLONG"); \ - builtin_assert ("system=vxworks"); \ - builtin_assert ("system=embedded"); \ - } while (0) - -/* VxWorks does all the library stuff itself. */ - -#undef LIB_SPEC -#define LIB_SPEC "" - -/* VxWorks uses object files, not loadable images. Make linker just combine - objects. Also show using 32 bit mode and set start of text to 0. */ - -#undef LINK_SPEC -#define LINK_SPEC "-r -taso -T 0" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "" - -#undef ENDFILE_SPEC -#define ENDFILE_SPEC "" diff --git a/gcc/config/alpha/xm-alpha-interix.h b/gcc/config/alpha/xm-alpha-interix.h deleted file mode 100644 index dd71a1dfa09..00000000000 --- a/gcc/config/alpha/xm-alpha-interix.h +++ /dev/null @@ -1,39 +0,0 @@ -/* Configuration for GNU compiler - for an DEC/Compaq Alpha - Copyright (C) 1999, 2001 Free Software Foundation, Inc. - Donn Terry, Softway Systems, Inc. - derived from code by Douglas B. Rupp (drupp@cs.washington.edu) - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define HOST_BITS_PER_WIDE_INT 64 -#ifdef __GNUC__ -# define HOST_WIDE_INT long long -#else -# define HOST_WIDE_INT __int64 -#endif - -#define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER_LONGLONG -#ifdef __GNUC__ -# define HOST_WIDEST_INT long long -#else -# define HOST_WIDEST_INT __int64 -#endif -#define HOST_WIDEST_INT_PRINT_DEC "%lld" -#define HOST_WIDEST_INT_PRINT_UNSIGNED "%llu" -#define HOST_WIDEST_INT_PRINT_HEX "0x%llx" diff --git a/gcc/config/alpha/xm-vms.h b/gcc/config/alpha/xm-vms.h index 7bfcebae81c..51806acd10d 100644 --- a/gcc/config/alpha/xm-vms.h +++ b/gcc/config/alpha/xm-vms.h @@ -19,9 +19,6 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#define HOST_WIDE_INT long long -#define HOST_BITS_PER_WIDE_INT 64 - /* A couple of conditionals for execution machine are controlled here. */ #ifndef VMS #define VMS diff --git a/gcc/config/alpha/xm-vms64.h b/gcc/config/alpha/xm-vms64.h deleted file mode 100644 index 26fd82923a4..00000000000 --- a/gcc/config/alpha/xm-vms64.h +++ /dev/null @@ -1,29 +0,0 @@ -/* Configuration for GNU C-compiler for openVMS/Alpha. - Copyright (C) 2001 Free Software Foundation, Inc. - Contributed by Douglas Rupp (rupp@gnat.com). - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#undef HOST_WIDE_INT - -/* Since DEC C long != Gnu C long */ -#define HOST_PTR_PRINTF "%llx" -#define HOST_WIDE_INT_PRINT_DEC "%lld" -#define HOST_WIDE_INT_PRINT_UNSIGNED "%llu" -#define HOST_WIDE_INT_PRINT_HEX "0x%llx" -#define HOST_WIDE_INT_PRINT_DOUBLE_HEX "0x%llx%016llx" diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index ab7fe4280d2..c106b88e2cf 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -93,6 +95,7 @@ static bool arc_assemble_integer PARAMS ((rtx, unsigned int, int)); static void arc_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT)); static void arc_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT)); static void arc_encode_section_info PARAMS ((tree, int)); +static void arc_internal_label PARAMS ((FILE *, const char *, unsigned long)); /* Initialize the GCC target structure. */ #undef TARGET_ASM_ALIGNED_HI_OP @@ -110,6 +113,8 @@ static void arc_encode_section_info PARAMS ((tree, int)); #define TARGET_ATTRIBUTE_TABLE arc_attribute_table #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO arc_encode_section_info +#undef TARGET_ASM_INTERNAL_LABEL +#define TARGET_ASM_INTERNAL_LABEL arc_internal_label struct gcc_target targetm = TARGET_INITIALIZER; @@ -1922,7 +1927,7 @@ record_cc_ref (insn) 0 -> 2 final_prescan_insn, if the `target' is an unconditional branch 1 -> 3 branch patterns, after having not output the conditional branch 2 -> 4 branch patterns, after having not output the conditional branch - 3 -> 0 ASM_OUTPUT_INTERNAL_LABEL, if the `target' label is reached + 3 -> 0 (*targetm.asm_out.internal_label), if the `target' label is reached (the target label has CODE_LABEL_NUMBER equal to arc_ccfsm_target_label). 4 -> 0 final_prescan_insn, if `target' unconditional branch is reached @@ -2218,7 +2223,7 @@ arc_final_prescan_insn (insn, opvec, noperands) /* Record that we are currently outputting label NUM with prefix PREFIX. It it's the label we're looking for, reset the ccfsm machinery. - Called from ASM_OUTPUT_INTERNAL_LABEL. */ + Called from (*targetm.asm_out.internal_label). */ void arc_ccfsm_at_label (prefix, num) @@ -2358,3 +2363,16 @@ arc_encode_section_info (decl, first) if (TREE_CODE (decl) == FUNCTION_DECL) SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1; } + +/* This is how to output a definition of an internal numbered label where + PREFIX is the class of label and NUM is the number within the class. */ + +static void +arc_internal_label (stream, prefix, labelno) + FILE *stream; + const char *prefix; + unsigned long labelno; +{ + arc_ccfsm_at_label (prefix, labelno); + default_internal_label (stream, prefix, labelno); +} diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index 3c4904a7a92..7739fa4cdad 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -1202,7 +1202,7 @@ do { \ compiled for different cpus. */ /* We work around a dwarfout.c deficiency by watching for labels from it and not adding the '_' prefix nor the cpu suffix. There is a comment in - dwarfout.c that says it should be using ASM_OUTPUT_INTERNAL_LABEL. */ + dwarfout.c that says it should be using (*targetm.asm_out.internal_label). */ extern const char *arc_mangle_cpu; #define ASM_OUTPUT_LABELREF(FILE, NAME) \ do { \ @@ -1217,22 +1217,6 @@ do { \ } \ } while (0) -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ -do { \ - arc_ccfsm_at_label (PREFIX, NUM); \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \ -} while (0) - -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* Assembler pseudo-op to equate one value with another. */ /* ??? This is needed because dwarfout.c provides a default definition too late for defaults.h (which contains the default definition of ASM_OUTPUT_DEF diff --git a/gcc/config/arm/aof.h b/gcc/config/arm/aof.h index 965337cf700..73b62b5bb58 100644 --- a/gcc/config/arm/aof.h +++ b/gcc/config/arm/aof.h @@ -27,7 +27,7 @@ Boston, MA 02111-1307, USA. */ #define LINK_LIBGCC_SPECIAL 1 #define LINK_SPEC "%{aof} %{bin} %{aif} %{ihf} %{shl,*} %{reent*} %{split} \ - %{ov*,*} %{reloc*} -nodebug" + %{ov*} %{reloc*} -nodebug" #define STARTFILE_SPEC "crtbegin.o%s" @@ -267,10 +267,6 @@ do { \ #define ASM_GENERATE_INTERNAL_LABEL(STRING,PREFIX,NUM) \ sprintf ((STRING), "*|%s..%ld|", (PREFIX), (long)(NUM)) -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \ - ((OUTVAR) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER))) - /* How initialization functions are handled */ #define CTORS_SECTION_ASM_OP "\tAREA\t|C$$gnu_ctorsvec|, DATA, READONLY" diff --git a/gcc/config/arm/aout.h b/gcc/config/arm/aout.h index 8f4a6056f98..a142ae11944 100644 --- a/gcc/config/arm/aout.h +++ b/gcc/config/arm/aout.h @@ -127,7 +127,7 @@ Boston, MA 02111-1307, USA. */ output_quoted_string (STREAM, NAME); \ fprintf (STREAM, ",%d,0,315,%s\n", N_SO, <ext_label_name[1]); \ text_section (); \ - ASM_OUTPUT_INTERNAL_LABEL (STREAM, "Ltext", 0); \ + (*targetm.asm_out.internal_label) (STREAM, "Ltext", 0); \ } \ while (0) @@ -151,11 +151,6 @@ Boston, MA 02111-1307, USA. */ sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM)) #endif -/* Construct a private name. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \ - ((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \ - sprintf (OUTVAR, "%s.%d", NAME, NUMBER)) - /* Output an element of a dispatch table. */ #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE) diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index cae9bea4ce8..b0173be1894 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -42,7 +42,6 @@ extern unsigned int arm_compute_initial_elimination_offset PARAMS ((unsigned in #ifdef TREE_CODE extern int arm_return_in_memory PARAMS ((tree)); extern void arm_encode_call_attribute PARAMS ((tree, int)); -extern int arm_function_ok_for_sibcall PARAMS ((tree)); #endif #ifdef RTX_CODE extern int arm_hard_regno_mode_ok PARAMS ((unsigned int, diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index a6203c3fbe3..c4326bac5c1 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "obstack.h" @@ -117,6 +119,7 @@ static void arm_set_default_type_attributes PARAMS ((tree)); static int arm_adjust_cost PARAMS ((rtx, rtx, rtx, int)); static int count_insns_for_constant PARAMS ((HOST_WIDE_INT, int)); static int arm_get_strip_length PARAMS ((int)); +static bool arm_function_ok_for_sibcall PARAMS ((tree, tree)); #ifdef OBJECT_FORMAT_ELF static void arm_elf_asm_named_section PARAMS ((const char *, unsigned int)); #endif @@ -126,6 +129,7 @@ static void arm_encode_section_info PARAMS ((tree, int)); #ifdef AOF_ASSEMBLER static void aof_globalize_label PARAMS ((FILE *, const char *)); #endif +static void arm_internal_label PARAMS ((FILE *, const char *, unsigned long)); static void arm_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); @@ -191,6 +195,12 @@ static void arm_output_mi_thunk PARAMS ((FILE *, tree, #undef TARGET_STRIP_NAME_ENCODING #define TARGET_STRIP_NAME_ENCODING arm_strip_name_encoding +#undef TARGET_ASM_INTERNAL_LABEL +#define TARGET_ASM_INTERNAL_LABEL arm_internal_label + +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL arm_function_ok_for_sibcall + #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK arm_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK @@ -2308,16 +2318,17 @@ arm_is_longcall_p (sym_ref, call_cookie, call_symbol) /* Return nonzero if it is ok to make a tail-call to DECL. */ -int -arm_function_ok_for_sibcall (decl) +static bool +arm_function_ok_for_sibcall (decl, exp) tree decl; + tree exp ATTRIBUTE_UNUSED; { int call_type = TARGET_LONG_CALLS ? CALL_LONG : CALL_NORMAL; /* Never tailcall something for which we have no decl, or if we are in Thumb mode. */ if (decl == NULL || TARGET_THUMB) - return 0; + return false; /* Get the calling method. */ if (lookup_attribute ("short_call", TYPE_ATTRIBUTES (TREE_TYPE (decl)))) @@ -2329,20 +2340,20 @@ arm_function_ok_for_sibcall (decl) a branch instruction. However, if not compiling PIC, we know we can reach the symbol if it is in this compilation unit. */ if (call_type == CALL_LONG && (flag_pic || !TREE_ASM_WRITTEN (decl))) - return 0; + return false; /* If we are interworking and the function is not declared static then we can't tail-call it unless we know that it exists in this compilation unit (since it might be a Thumb routine). */ if (TARGET_INTERWORK && TREE_PUBLIC (decl) && !TREE_ASM_WRITTEN (decl)) - return 0; + return false; /* Never tailcall from an ISR routine - it needs a special exit sequence. */ if (IS_INTERRUPT (arm_current_func_type ())) - return 0; + return false; /* Everything else is ok. */ - return 1; + return true; } @@ -8853,7 +8864,7 @@ arm_assemble_integer (x, size, aligned_p) 0 -> 2 final_prescan_insn if the `target' is an unconditional branch 1 -> 3 ASM_OUTPUT_OPCODE after not having output the conditional branch 2 -> 4 ASM_OUTPUT_OPCODE after not having output the conditional branch - 3 -> 0 ASM_OUTPUT_INTERNAL_LABEL if the `target' label is reached + 3 -> 0 (*targetm.asm_out.internal_label) if the `target' label is reached (the target label has CODE_LABEL_NUMBER equal to arm_target_label). 4 -> 0 final_prescan_insn if the `target' unconditional branch is reached (the target insn is arm_target_insn). @@ -11353,6 +11364,21 @@ arm_encode_section_info (decl, first) } #endif /* !ARM_PE */ +static void +arm_internal_label (stream, prefix, labelno) + FILE *stream; + const char *prefix; + unsigned long labelno; +{ + if (arm_ccfsm_state == 3 && (unsigned) arm_target_label == labelno + && !strcmp (prefix, "L")) + { + arm_ccfsm_state = 0; + arm_target_insn = NULL; + } + default_internal_label (stream, prefix, labelno); +} + /* Output code to add DELTA to the first argument, and then jump to FUNCTION. Used for C++ multiple inheritance. */ @@ -11390,4 +11416,3 @@ arm_output_mi_thunk (file, thunk, delta, vcall_offset, function) fputs ("(PLT)", file); fputc ('\n', file); } - diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index eda2d47feff..186664c54e4 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1517,12 +1517,6 @@ typedef struct arm_va_arg (valist, type) -/* Tail calling. */ - -/* A C expression that evaluates to true if it is ok to perform a sibling - call to DECL. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) arm_function_ok_for_sibcall ((DECL)) - /* Perform any actions needed for a function that is receiving a variable number of arguments. CUM is as above. MODE and TYPE are the mode and type of the current parameter. PRETEND_SIZE is a variable that should be set to @@ -2486,25 +2480,6 @@ extern int making_const_table; #undef ASM_APP_OFF #define ASM_APP_OFF (TARGET_THUMB ? "\t.code\t16\n" : "") -/* Output an internal label definition. */ -#ifndef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \ - do \ - { \ - char * s = (char *) alloca (40 + strlen (PREFIX)); \ - \ - if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \ - && !strcmp (PREFIX, "L")) \ - { \ - arm_ccfsm_state = 0; \ - arm_target_insn = NULL; \ - } \ - ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM)); \ - ASM_OUTPUT_LABEL (STREAM, s); \ - } \ - while (0) -#endif - /* Output a push or a pop instruction (only used when profiling). */ #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ if (TARGET_ARM) \ @@ -2529,7 +2504,7 @@ extern int making_const_table; { \ if (TARGET_THUMB) \ ASM_OUTPUT_ALIGN (FILE, 2); \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ } \ while (0) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 82fafa3f7fa..be955ce61b0 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4206,7 +4206,7 @@ (use (label_ref (match_operand 1 "" "")))] "TARGET_THUMB && flag_pic" "* - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[1])); return \"add\\t%0, %|pc\"; " @@ -4219,7 +4219,7 @@ (use (label_ref (match_operand 1 "" "")))] "TARGET_ARM && flag_pic" "* - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[1])); return \"add%?\\t%0, %|pc, %0\"; " diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h index 0ad23f8f5d0..53a67d5c11e 100644 --- a/gcc/config/arm/elf.h +++ b/gcc/config/arm/elf.h @@ -128,26 +128,6 @@ Boston, MA 02111-1307, USA. */ } \ while (0) #endif - -/* Output an internal label definition. */ -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \ - do \ - { \ - char * s = (char *) alloca (40 + strlen (PREFIX)); \ - extern int arm_target_label, arm_ccfsm_state; \ - extern rtx arm_target_insn; \ - \ - if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \ - && !strcmp (PREFIX, "L")) \ - { \ - arm_ccfsm_state = 0; \ - arm_target_insn = NULL; \ - } \ - ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM)); \ - ASM_OUTPUT_LABEL (STREAM, s); \ - } \ - while (0) #undef TARGET_ASM_NAMED_SECTION #define TARGET_ASM_NAMED_SECTION arm_elf_asm_named_section diff --git a/gcc/config/arm/pe.c b/gcc/config/arm/pe.c index ee3da8fd411..57c53f3b77c 100644 --- a/gcc/config/arm/pe.c +++ b/gcc/config/arm/pe.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "output.h" #include "flags.h" diff --git a/gcc/config/arm/t-pe b/gcc/config/arm/t-pe index f559bd20cff..ba4ea10e402 100644 --- a/gcc/config/arm/t-pe +++ b/gcc/config/arm/t-pe @@ -20,8 +20,8 @@ dp-bit.c: $(srcdir)/config/fp-bit.c echo '#endif' >> dp-bit.c cat $(srcdir)/config/fp-bit.c >> dp-bit.c -pe.o: $(srcdir)/config/arm/pe.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) output.h \ - flags.h $(TREE_H) $(EXPR_H) toplev.h $(TM_P_H) +pe.o: $(srcdir)/config/arm/pe.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(RTL_H) output.h flags.h $(TREE_H) expr.h toplev.h $(TM_P_H) $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/arm/pe.c MULTILIB_OPTIONS = mhard-float mthumb diff --git a/gcc/config/arm/t-strongarm-pe b/gcc/config/arm/t-strongarm-pe index 6a44132bd07..e6c65bfc69e 100644 --- a/gcc/config/arm/t-strongarm-pe +++ b/gcc/config/arm/t-strongarm-pe @@ -20,7 +20,8 @@ dp-bit.c: $(srcdir)/config/fp-bit.c echo '#endif' >> dp-bit.c cat $(srcdir)/config/fp-bit.c >> dp-bit.c -pe.o: $(srcdir)/config/arm/pe.c +pe.o: $(srcdir)/config/arm/pe.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(RTL_H) output.h flags.h $(TREE_H) expr.h toplev.h $(TM_P_H) $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/arm/pe.c MULTILIB_OPTIONS = mhard-float/msoft-float diff --git a/gcc/config/arm/vxarm.h b/gcc/config/arm/vxarm.h deleted file mode 100644 index 473362e4332..00000000000 --- a/gcc/config/arm/vxarm.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Definitions of target machine for GNU compiler, - for ARM with targetting the VXWorks run time environment. - Copyright (C) 1999, 2000 Free Software Foundation, Inc. - - Contributed by: Mike Stump <mrs@wrs.com> - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm710 - -#undef SUBTARGET_CPP_SPEC -#define SUBTARGET_CPP_SPEC \ -"%{march=arm710:-DCPU=ARM710A} \ - %{march=arm7tdmi:-DCPU=ARM7TDMI} \ - %{march=arm810:-DCPU=ARM810} \ - %{march=strongarm110:-DCPU=ARMSA110} \ - %{!march=*: \ - %{mcpu=arm710:-DCPU=ARM710A} \ - %{mcpu=arm7tdmi:-DCPU=ARM7TDMI} \ - %{mcpu=arm810:-DCPU=ARM810} \ - %{mcpu=strongarm110:-DCPU=ARMSA110}} \ - %{!mcpu*:%{!march=*:-DCPU=ARM710A}} \ -" - -#define TARGET_OS_CPP_BUILTINS() \ - do { \ - builtin_define ("__vxworks"); \ - } while (0) - -/* VxWorks does all the library stuff itself. */ -#undef LIB_SPEC -#define LIB_SPEC "" - -/* VxWorks uses object files, not loadable images. make linker just - combine objects. */ -#undef LINK_SPEC -#define LINK_SPEC "-r" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "" - -#undef ENDFILE_SPEC -#define ENDFILE_SPEC "" - -#undef TARGET_VERSION -#define TARGET_VERSION fputs (" (ARM/VxWorks)", stderr); - -#undef ASM_FILE_START -#define ASM_FILE_START(STREAM) \ - do \ - { \ - fprintf (STREAM, "%s Generated by gcc %s for ARM/VxWorks\n", \ - ASM_COMMENT_START, version_string); \ - } \ - while (0) diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 5e4e42c5ace..fcfec615c91 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -21,6 +21,8 @@ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h index 4281d01a254..4dcef89b91e 100644 --- a/gcc/config/avr/avr.h +++ b/gcc/config/avr/avr.h @@ -1307,8 +1307,6 @@ extern int avr_reg_order[]; addressing. */ #define HAVE_PRE_DECREMENT 1 -/* #define HAVE_PRE_INCREMENT - #define HAVE_POST_DECREMENT */ /* Similar for other kinds of addressing. */ #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) @@ -2103,32 +2101,13 @@ do { \ setting the `DECL_ONE_ONLY' flag is enough to mark a declaration to be emitted as one-only. */ -#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \ -fprintf(STREAM, ".%s%d:\n", PREFIX, NUM) -/* A C statement to output to the stdio stream STREAM a label whose - name is made from the string PREFIX and the number NUM. - - It is absolutely essential that these labels be distinct from the - labels used for user-level functions and variables. Otherwise, - certain programs will have name conflicts with internal labels. - - It is desirable to exclude internal labels from the symbol table - of the object file. Most assemblers have a naming convention for - labels that should be excluded; on many systems, the letter `L' at - the beginning of a label has this effect. You should find out what - convention your system uses, and follow it. - - The usual definition of this macro is as follows: - - fprintf (STREAM, "L%s%d:\n", PREFIX, NUM) */ - #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ sprintf (STRING, "*.%s%d", PREFIX, NUM) /* A C statement to store into the string STRING a label whose name is made from the string PREFIX and the number NUM. This string, when output subsequently by `assemble_name', should - produce the output that `ASM_OUTPUT_INTERNAL_LABEL' would produce + produce the output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX and NUM. If the string begins with `*', then `assemble_name' will output @@ -2139,27 +2118,6 @@ sprintf (STRING, "*.%s%d", PREFIX, NUM) `ASM_OUTPUT_LABELREF' is also part of your machine description, so you should know what it does on your machine.) */ -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - -/* A C expression to assign to OUTVAR (which is a variable of type - `char *') a newly allocated string made from the string NAME and - the number NUMBER, with some suitable punctuation added. Use - `alloca' to get space for the string. - - The string will be used as an argument to `ASM_OUTPUT_LABELREF' to - produce an assembler label for an internal static variable whose - name is NAME. Therefore, the string must be such as to result in - valid assembler code. The argument NUMBER is different each time - this macro is executed; it prevents conflicts between - similarly-named internal static variables in different scopes. - - Ideally this string should not be a valid C identifier, to prevent - any conflict with the user's own symbols. Most assemblers allow - periods or percent signs in assembler symbols; putting at least - one of these between the name and the number will suffice. */ - /* `ASM_OUTPUT_WEAK_ALIAS (STREAM, NAME, VALUE)' A C statement to output to the stdio stream STREAM assembler code which defines (equates) the weak symbol NAME to have the value @@ -2304,18 +2262,18 @@ sprintf (STRING, "*.%s%d", PREFIX, NUM) The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a reference to a label. VALUE is the number of an internal label - whose definition is output using `ASM_OUTPUT_INTERNAL_LABEL'. For + whose definition is output using `(*targetm.asm_out.internal_label)'. For example, fprintf (STREAM, "\t.word L%d\n", VALUE) */ #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \ - progmem_section (), ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM) + progmem_section (), (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM) /* `ASM_OUTPUT_CASE_LABEL (STREAM, PREFIX, NUM, TABLE)' Define this if the label before a jump-table needs to be output specially. The first three arguments are the same as for - `ASM_OUTPUT_INTERNAL_LABEL'; the fourth argument is the jump-table + `(*targetm.asm_out.internal_label)'; the fourth argument is the jump-table which follows (a `jump_insn' containing an `addr_vec' or `addr_diff_vec'). @@ -2323,7 +2281,7 @@ sprintf (STRING, "*.%s%d", PREFIX, NUM) the table. If this macro is not defined, these labels are output with - `ASM_OUTPUT_INTERNAL_LABEL'. */ + `(*targetm.asm_out.internal_label)'. */ /* `ASM_OUTPUT_CASE_END (STREAM, NUM, TABLE)' Define this if something special must be output at the end of a @@ -2530,14 +2488,6 @@ extern int avr_case_values_threshold; pass to `cc1plus'. */ #define ASM_SPEC "%{mmcu=*:-mmcu=%*}" -/* A C string constant that tells the GNU CC driver program options to - pass to the assembler. It can also specify how to translate - options you give to GNU CC into options for GNU CC to pass to the - assembler. See the file `sun3.h' for an example of this. - - Do not define this macro if it does not need to do anything. */ - -#define ASM_FINAL_SPEC "" /* A C string constant that tells the GNU CC driver program how to run any programs which cleanup after the normal assembler. Normally, this is not needed. See the file `mips.h' for an diff --git a/gcc/config/c4x/c4x-c.c b/gcc/config/c4x/c4x-c.c index 36d78fb8505..5b958a2ba97 100644 --- a/gcc/config/c4x/c4x-c.c +++ b/gcc/config/c4x/c4x-c.c @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "toplev.h" #include "cpplib.h" diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c index 354ac76d1fa..8fe42862d95 100644 --- a/gcc/config/c4x/c4x.c +++ b/gcc/config/c4x/c4x.c @@ -25,6 +25,8 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in c4x.md need these. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h index 94cca09b597..576aaff3826 100644 --- a/gcc/config/c4x/c4x.h +++ b/gcc/config/c4x/c4x.h @@ -1651,17 +1651,11 @@ fini_section () \ /* The TI assembler wants to have hex numbers this way. */ #undef HOST_WIDE_INT_PRINT_HEX -#ifndef HOST_WIDE_INT_PRINT_HEX -# if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT -# define HOST_WIDE_INT_PRINT_HEX "0%xh" -# else -# if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG -# define HOST_WIDE_INT_PRINT_HEX "0%lxh" -# else -# define HOST_WIDE_INT_PRINT_HEX "0%llxh" -# endif -# endif -#endif /* ! HOST_WIDE_INT_PRINT_HEX */ +#if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG +# define HOST_WIDE_INT_PRINT_HEX "0%lxh" +#else +# define HOST_WIDE_INT_PRINT_HEX "0%llxh" +#endif /* Overall Framework of an Assembler File. */ /* We need to have a data section we can identify so that we can set @@ -1724,12 +1718,6 @@ c4x_file_end (FILE) #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -1738,14 +1726,6 @@ c4x_file_end (FILE) #define ASM_GENERATE_INTERNAL_LABEL(BUFFER, PREFIX, NUM) \ sprintf (BUFFER, "*%s%d", PREFIX, NUM) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s$%d", (NAME), (LABELNO))) - /* A C statement to output to the stdio stream STREAM assembler code which defines (equates) the symbol NAME to have the value VALUE. */ diff --git a/gcc/config/c4x/t-c4x b/gcc/config/c4x/t-c4x index d1a83fb4231..0ac2c7f1782 100644 --- a/gcc/config/c4x/t-c4x +++ b/gcc/config/c4x/t-c4x @@ -7,9 +7,9 @@ LIB1ASMFUNCS = _divsf3 _divsi3 _udivsi3 _umodsi3 _modsi3 _mulsi3 \ TARGET_LIBGCC2_CFLAGS = -Dexit=unused_exit -c4x-c.o: $(srcdir)/config/c4x/c4x-c.c $(CONFIG_H) $(SYSTEM_H) cpplib.h \ - $(TREE_H) c-pragma.h toplev.h $(TM_P_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< +c4x-c.o: $(srcdir)/config/c4x/c4x-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(TREE_H) toplev.h $(CPPLIB_H) c-pragma.h $(TM_P_H) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/c4x/c4x-c.c MULTILIB_OPTIONS = m30 msmall mmemparm MULTILIB_DIRNAMES = c3x small mem diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index 2eb864f065c..0aeccc01636 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/cris/cris.h b/gcc/config/cris/cris.h index 4aa88466c80..bd044f3a51a 100644 --- a/gcc/config/cris/cris.h +++ b/gcc/config/cris/cris.h @@ -122,7 +122,7 @@ extern const char *cris_elinux_stacksize_str; someone will fight for us. This year in the mountains. Note that for -melinux and -mlinux, command-line -isystem options are emitted both before and after the synthesized one. We can't remove all - of them: a %{<isystem} will only remove the first one and %{<isystem*} + of them: a %<isystem will only remove the first one and %<isystem* will not do TRT. Those extra occurrences are harmless anyway. */ #define CPP_SPEC \ "-$ -D__CRIS_ABI_version=2\ @@ -1580,28 +1580,11 @@ call_ ## FUNC (void) \ handle (to #undef or ignore it) in a.out. */ #define HAVE_GAS_HIDDEN 1 -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ - do \ - { \ - asm_fprintf (FILE, "%L%s%d:\n", PREFIX, NUM); \ - } \ - while (0) - /* Remove any previous definition (elfos.h). */ #undef ASM_GENERATE_INTERNAL_LABEL #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long) NUM) -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ - do \ - { \ - (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)); \ - } \ - while (0) - - /* Node: Initialization */ /* (no definitions) */ diff --git a/gcc/config/d30v/d30v.c b/gcc/config/d30v/d30v.c index 8169d8ebd4f..4f282a80bcf 100644 --- a/gcc/config/d30v/d30v.c +++ b/gcc/config/d30v/d30v.c @@ -21,6 +21,8 @@ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" diff --git a/gcc/config/d30v/d30v.h b/gcc/config/d30v/d30v.h index 095a1def4af..6fdbbd434d5 100644 --- a/gcc/config/d30v/d30v.h +++ b/gcc/config/d30v/d30v.h @@ -2207,9 +2207,7 @@ typedef struct machine_function GTY(()) #define HAVE_POST_INCREMENT 1 /* Similar for other kinds of addressing. */ -/* #define HAVE_PRE_INCREMENT 0 */ #define HAVE_POST_DECREMENT 1 -/* #define HAVE_PRE_DECREMENT 0 */ /* A C expression that is 1 if the RTX X is a constant which is a valid address. On most machines, this can be defined as `CONSTANT_P (X)', but a @@ -2819,7 +2817,7 @@ extern const char *d30v_branch_cost_string; outputting the label definition at the proper place. Here is how to do this: - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LC", LABELNO); + (*targetm.asm_out.internal_label) (FILE, "LC", LABELNO); When you output a pool entry specially, you should end with a `goto' to the label JUMPTO. This will prevent the same pool entry from being output a @@ -3075,31 +3073,11 @@ extern const char *d30v_branch_cost_string; is in most Berkeley Unix systems. This macro is used in `assemble_name'. */ /* #define ASM_OUTPUT_LABELREF(STREAM, NAME) */ -/* A C statement to output to the stdio stream STREAM a label whose name is - made from the string PREFIX and the number NUM. - - It is absolutely essential that these labels be distinct from the labels - used for user-level functions and variables. Otherwise, certain programs - will have name conflicts with internal labels. - - It is desirable to exclude internal labels from the symbol table of the - object file. Most assemblers have a naming convention for labels that - should be excluded; on many systems, the letter `L' at the beginning of a - label has this effect. You should find out what convention your system - uses, and follow it. - - The usual definition of this macro is as follows: - - fprintf (STREAM, "L%s%d:\n", PREFIX, NUM) - - Defined in svr4.h. */ -/* #define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) */ - /* A C statement to store into the string STRING a label whose name is made from the string PREFIX and the number NUM. This string, when output subsequently by `assemble_name', should produce the - output that `ASM_OUTPUT_INTERNAL_LABEL' would produce with the same PREFIX + output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX and NUM. If the string begins with `*', then `assemble_name' will output the rest of @@ -3118,28 +3096,6 @@ do { \ } while (0) */ -/* A C expression to assign to OUTVAR (which is a variable of type `char *') a - newly allocated string made from the string NAME and the number NUMBER, with - some suitable punctuation added. Use `alloca' to get space for the string. - - The string will be used as an argument to `ASM_OUTPUT_LABELREF' to produce - an assembler label for an internal static variable whose name is NAME. - Therefore, the string must be such as to result in valid assembler code. - The argument NUMBER is different each time this macro is executed; it - prevents conflicts between similarly-named internal static variables in - different scopes. - - Ideally this string should not be a valid C identifier, to prevent any - conflict with the user's own symbols. Most assemblers allow periods or - percent signs in assembler symbols; putting at least one of these between - the name and the number will suffice. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \ -do { \ - (OUTVAR) = (char *) alloca (strlen ((NAME)) + 12); \ - sprintf ((OUTVAR), "%s.%ld", (NAME), (long)(NUMBER)); \ -} while (0) - /* A C statement to output to the stdio stream STREAM assembler code which defines (equates) the symbol NAME to have the value VALUE. @@ -3495,7 +3451,7 @@ do { \ The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a difference between two labels. VALUE and REL are the numbers of two internal labels. The definitions of - these labels are output using `ASM_OUTPUT_INTERNAL_LABEL', and they must be + these labels are output using `(*targetm.asm_out.internal_label)', and they must be printed in the same way here. For example, fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */ @@ -3509,7 +3465,7 @@ fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a reference to a label. VALUE is the number of an internal label whose definition is output using - `ASM_OUTPUT_INTERNAL_LABEL'. For example, + `(*targetm.asm_out.internal_label)'. For example, fprintf (STREAM, "\t.word L%d\n", VALUE) */ @@ -3517,7 +3473,7 @@ fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) fprintf (STREAM, "\t.word .L%d\n", VALUE) /* Define this if the label before a jump-table needs to be output specially. - The first three arguments are the same as for `ASM_OUTPUT_INTERNAL_LABEL'; + The first three arguments are the same as for `(*targetm.asm_out.internal_label)'; the fourth argument is the jump-table which follows (a `jump_insn' containing an `addr_vec' or `addr_diff_vec'). @@ -3525,7 +3481,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE) table. If this macro is not defined, these labels are output with - `ASM_OUTPUT_INTERNAL_LABEL'. + `(*targetm.asm_out.internal_label)'. Defined in svr4.h. */ /* #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) */ diff --git a/gcc/config/darwin-c.c b/gcc/config/darwin-c.c index c04c2b57607..805a82486a2 100644 --- a/gcc/config/darwin-c.c +++ b/gcc/config/darwin-c.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "cpplib.h" #include "tree.h" #include "c-pragma.h" diff --git a/gcc/config/darwin.c b/gcc/config/darwin.c index 3722950f634..a7dfe59bec6 100644 --- a/gcc/config/darwin.c +++ b/gcc/config/darwin.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/darwin.h b/gcc/config/darwin.h index 7997a46e7a5..a3dcc166818 100644 --- a/gcc/config/darwin.h +++ b/gcc/config/darwin.h @@ -694,13 +694,6 @@ objc_section_init () \ #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ sprintf (LABEL, "*%s%ld", PREFIX, (long)(NUM)) -/* This is how to output an internal numbered label where PREFIX is - the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* Since we have a separate readonly data section, define this so that jump tables end up in text rather than data. */ diff --git a/gcc/config/dbxcoff.h b/gcc/config/dbxcoff.h index b955932797c..1d54ecf3604 100644 --- a/gcc/config/dbxcoff.h +++ b/gcc/config/dbxcoff.h @@ -70,7 +70,7 @@ Boston, MA 02111-1307, USA. */ assemble_name (FILE, \ XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \ putc ('\n', FILE); \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LM", sym_lineno); \ + (*targetm.asm_out.internal_label) (FILE, "LM", sym_lineno); \ sym_lineno++; \ } } diff --git a/gcc/config/dbxelf.h b/gcc/config/dbxelf.h index 9f8f56a1b01..dbc8f347eb3 100644 --- a/gcc/config/dbxelf.h +++ b/gcc/config/dbxelf.h @@ -69,7 +69,7 @@ do \ assemble_name (FILE, \ XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));\ putc ('\n', FILE); \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LM", sym_lineno); \ + (*targetm.asm_out.internal_label) (FILE, "LM", sym_lineno); \ sym_lineno += 1; \ } \ while (0) diff --git a/gcc/config/dsp16xx/dsp16xx-protos.h b/gcc/config/dsp16xx/dsp16xx-protos.h index a2f68afbc3e..c2a2584682d 100644 --- a/gcc/config/dsp16xx/dsp16xx-protos.h +++ b/gcc/config/dsp16xx/dsp16xx-protos.h @@ -81,7 +81,7 @@ extern void asm_output_float PARAMS ((FILE *, double)); extern void dsp16xx_file_start PARAMS ((void)); extern void coff_dsp16xx_file_start PARAMS ((FILE *)); extern void luxworks_dsp16xx_file_start PARAMS ((FILE *)); -extern struct rtx_def *(*dsp16xx_compare_gen) PARAMS (()); +extern bool dsp16xx_compare_gen; extern int hard_regno_mode_ok PARAMS ((int, enum machine_mode)); extern enum reg_class dsp16xx_reg_class_from_letter PARAMS ((int)); extern int regno_reg_class PARAMS ((int)); diff --git a/gcc/config/dsp16xx/dsp16xx.c b/gcc/config/dsp16xx/dsp16xx.c index b031aa2bdcb..3b9f752914a 100644 --- a/gcc/config/dsp16xx/dsp16xx.c +++ b/gcc/config/dsp16xx/dsp16xx.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in dsp1600.md need these. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -58,7 +60,7 @@ const char *save_chip_name; rtx dsp16xx_compare_op0; rtx dsp16xx_compare_op1; -rtx (*dsp16xx_compare_gen) PARAMS (()); +bool dsp16xx_compare_gen; static const char *fp; static const char *sp; diff --git a/gcc/config/dsp16xx/dsp16xx.h b/gcc/config/dsp16xx/dsp16xx.h index c530a02debc..fbbf50efec3 100644 --- a/gcc/config/dsp16xx/dsp16xx.h +++ b/gcc/config/dsp16xx/dsp16xx.h @@ -1288,9 +1288,6 @@ extern struct dsp16xx_frame_info current_frame_info; #define HAVE_POST_INCREMENT 1 #define HAVE_POST_DECREMENT 1 -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Recognize any constant value that is a valid address. */ #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) @@ -1642,22 +1639,7 @@ extern struct dsp16xx_frame_info current_frame_info; } \ while (0) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable or function - named NAME. LABELNO is an integer which is different for - each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ - do { \ - int len = strlen (NAME); \ - char *temp = (char *) alloca (len + 3); \ - temp[0] = 'L'; \ - strcpy (&temp[1], (NAME)); \ - temp[len + 1] = '_'; \ - temp[len + 2] = 0; \ - (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \ - ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \ - } while (0) +#define ASM_PN_FORMAT "*L%s_%lu" /* OUTPUT OF UNINITIALIZED VARIABLES */ @@ -1702,11 +1684,6 @@ extern struct dsp16xx_frame_info current_frame_info; #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. diff --git a/gcc/config/dsp16xx/dsp16xx.md b/gcc/config/dsp16xx/dsp16xx.md index 89c09a19349..fdb71de10a9 100644 --- a/gcc/config/dsp16xx/dsp16xx.md +++ b/gcc/config/dsp16xx/dsp16xx.md @@ -70,7 +70,7 @@ "" " { - dsp16xx_compare_gen = gen_tst_reg; + dsp16xx_compare_gen = false; dsp16xx_compare_op0 = operands[0]; dsp16xx_compare_op1 = const0_rtx; DONE; @@ -89,7 +89,7 @@ "" " { - dsp16xx_compare_gen = gen_tst_reg; + dsp16xx_compare_gen = false; dsp16xx_compare_op0 = operands[0]; dsp16xx_compare_op1 = const0_rtx; DONE; @@ -181,7 +181,7 @@ if (GET_CODE (operands[1]) == CONST_INT) operands[1] = force_reg (HImode, operands[1]); - dsp16xx_compare_gen = gen_compare_reg; + dsp16xx_compare_gen = true; dsp16xx_compare_op0 = operands[0]; dsp16xx_compare_op1 = operands[1]; DONE; @@ -266,7 +266,7 @@ { if (operands[0]) /* Avoid unused code warning */ { - dsp16xx_compare_gen = gen_compare_reg; + dsp16xx_compare_gen = true; dsp16xx_compare_op0 = operands[0]; dsp16xx_compare_op1 = operands[1]; DONE; @@ -433,7 +433,7 @@ if (!dsp16xx_cmphf3_libcall) dsp16xx_cmphf3_libcall = gen_rtx_SYMBOL_REF (Pmode, CMPHF3_LIBCALL); - dsp16xx_compare_gen = gen_compare_reg; + dsp16xx_compare_gen = true; dsp16xx_compare_op0 = operands[0]; dsp16xx_compare_op1 = operands[1]; emit_library_call (dsp16xx_cmphf3_libcall, 1, HImode, 2, @@ -2397,10 +2397,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(EQ, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (EQ, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") (define_expand "sne" @@ -2409,10 +2409,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(NE, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (NE, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2422,10 +2422,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GT, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GT, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2435,10 +2435,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LT, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LT, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") (define_expand "sge" @@ -2447,10 +2447,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GE, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GE, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2460,10 +2460,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LE, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LE, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2473,10 +2473,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GTU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GTU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2486,10 +2486,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LTU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LTU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2499,10 +2499,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GEU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GEU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2512,10 +2512,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LEU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LEU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2539,10 +2539,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(EQ, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (EQ, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") (define_expand "bne" @@ -2554,10 +2554,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(NE, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (NE, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2570,10 +2570,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GT, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GT, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2586,10 +2586,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GE, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GE, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2602,10 +2602,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LT, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LT, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2618,10 +2618,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LE, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LE, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2634,10 +2634,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GTU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GTU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2650,10 +2650,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(GEU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (GEU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2666,10 +2666,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LTU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LTU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") @@ -2682,10 +2682,10 @@ "" " { - if (dsp16xx_compare_gen == gen_compare_reg) - operands[1] = (*dsp16xx_compare_gen)(LEU, dsp16xx_compare_op0, dsp16xx_compare_op1); + if (dsp16xx_compare_gen) + operands[1] = gen_compare_reg (LEU, dsp16xx_compare_op0, dsp16xx_compare_op1); else - operands[1] = (*dsp16xx_compare_gen)(dsp16xx_compare_op0); + operands[1] = gen_tst_reg (dsp16xx_compare_op0); }") diff --git a/gcc/config/elfos.h b/gcc/config/elfos.h index 25a44afe344..3254a0ce621 100644 --- a/gcc/config/elfos.h +++ b/gcc/config/elfos.h @@ -110,20 +110,6 @@ Boston, MA 02111-1307, USA. */ #define ASM_OUTPUT_SKIP(FILE, SIZE) \ fprintf (FILE, "%s%u\n", SKIP_ASM_OP, (SIZE)) -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. - - For most svr4 systems, the convention is that any symbol which begins - with a period is not put into the linker symbol table by the assembler. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ - do \ - { \ - fprintf (FILE, ".%s%u:\n", PREFIX, (unsigned) (NUM)); \ - } \ - while (0) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -161,7 +147,7 @@ Boston, MA 02111-1307, USA. */ do \ { \ ASM_OUTPUT_BEFORE_CASE_LABEL (FILE, PREFIX, NUM, JUMPTABLE) \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ } \ while (0) diff --git a/gcc/config/fp-bit.c b/gcc/config/fp-bit.c index 7ec20ecf9f2..495a5978ac0 100644 --- a/gcc/config/fp-bit.c +++ b/gcc/config/fp-bit.c @@ -44,6 +44,8 @@ Boston, MA 02111-1307, USA. */ to one copy, then compile both copies and add them to libgcc.a. */ #include "tconfig.h" +#include "coretypes.h" +#include "tm.h" #include "fp-bit.h" /* The following macros can be defined to change the behavior of this file: diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c index d01d6bd1610..0c143b34224 100644 --- a/gcc/config/fr30/fr30.c +++ b/gcc/config/fr30/fr30.c @@ -23,6 +23,8 @@ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h index 32ee2d78549..57b24960679 100644 --- a/gcc/config/fr30/fr30.h +++ b/gcc/config/fr30/fr30.h @@ -1166,29 +1166,6 @@ do \ /* Globalizing directive for a label. */ #define GLOBAL_ASM_OP "\t.globl " -/* A C expression to assign to OUTVAR (which is a variable of type `char *') a - newly allocated string made from the string NAME and the number NUMBER, with - some suitable punctuation added. Use `alloca' to get space for the string. - - The string will be used as an argument to `ASM_OUTPUT_LABELREF' to produce - an assembler label for an internal static variable whose name is NAME. - Therefore, the string must be such as to result in valid assembler code. - The argument NUMBER is different each time this macro is executed; it - prevents conflicts between similarly-named internal static variables in - different scopes. - - Ideally this string should not be a valid C identifier, to prevent any - conflict with the user's own symbols. Most assemblers allow periods or - percent signs in assembler symbols; putting at least one of these between - the name and the number will suffice. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \ - do \ - { \ - (OUTVAR) = (char *) alloca (strlen ((NAME)) + 12); \ - sprintf ((OUTVAR), "%s.%ld", (NAME), (long)(NUMBER)); \ - } \ - while (0) - /*}}}*/ /*{{{ Output of Assembler Instructions. */ @@ -1243,7 +1220,7 @@ do \ The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a difference between two labels. VALUE and REL are the numbers of two internal labels. The definitions of - these labels are output using `ASM_OUTPUT_INTERNAL_LABEL', and they must be + these labels are output using `(*targetm.asm_out.internal_label)', and they must be printed in the same way here. For example, fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */ @@ -1256,7 +1233,7 @@ fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a reference to a label. VALUE is the number of an internal label whose definition is output using - `ASM_OUTPUT_INTERNAL_LABEL'. For example, + `(*targetm.asm_out.internal_label)'. For example, fprintf (STREAM, "\t.word L%d\n", VALUE) */ #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c index d09533a5f15..aa29d248c47 100644 --- a/gcc/config/frv/frv.c +++ b/gcc/config/frv/frv.c @@ -20,6 +20,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h index f9900b2f2bc..e7a481a728f 100644 --- a/gcc/config/frv/frv.h +++ b/gcc/config/frv/frv.h @@ -2888,7 +2888,7 @@ do { \ from the string PREFIX and the number NUM. This string, when output subsequently by `assemble_name', should produce the - output that `ASM_OUTPUT_INTERNAL_LABEL' would produce with the same PREFIX + output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX and NUM. If the string begins with `*', then `assemble_name' will output the rest of @@ -2905,27 +2905,6 @@ do { \ sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \ } while (0) -/* A C expression to assign to OUTVAR (which is a variable of type `char *') a - newly allocated string made from the string NAME and the number NUMBER, with - some suitable punctuation added. Use `alloca' to get space for the string. - - The string will be used as an argument to `ASM_OUTPUT_LABELREF' to produce - an assembler label for an internal static variable whose name is NAME. - Therefore, the string must be such as to result in valid assembler code. - The argument NUMBER is different each time this macro is executed; it - prevents conflicts between similarly-named internal static variables in - different scopes. - - Ideally this string should not be a valid C identifier, to prevent any - conflict with the user's own symbols. Most assemblers allow periods or - percent signs in assembler symbols; putting at least one of these between - the name and the number will suffice. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \ -do { \ - (OUTVAR) = (char *) alloca (strlen ((NAME)) + 12); \ - sprintf ((OUTVAR), "%s.%ld", (NAME), (long)(NUMBER)); \ -} while (0) - /* Macros Controlling Initialization Routines. */ @@ -3115,7 +3094,7 @@ do { \ The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a difference between two labels. VALUE and REL are the numbers of two internal labels. The definitions of - these labels are output using `ASM_OUTPUT_INTERNAL_LABEL', and they must be + these labels are output using `(*targetm.asm_out.internal_label)', and they must be printed in the same way here. For example, fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */ @@ -3128,14 +3107,14 @@ fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a reference to a label. VALUE is the number of an internal label whose definition is output using - `ASM_OUTPUT_INTERNAL_LABEL'. For example, + `(*targetm.asm_out.internal_label)'. For example, fprintf (STREAM, "\t.word L%d\n", VALUE) */ #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ fprintf (STREAM, "\t.word .L%d\n", VALUE) /* Define this if the label before a jump-table needs to be output specially. - The first three arguments are the same as for `ASM_OUTPUT_INTERNAL_LABEL'; + The first three arguments are the same as for `(*targetm.asm_out.internal_label)'; the fourth argument is the jump-table which follows (a `jump_insn' containing an `addr_vec' or `addr_diff_vec'). @@ -3143,7 +3122,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE) table. If this macro is not defined, these labels are output with - `ASM_OUTPUT_INTERNAL_LABEL'. + `(*targetm.asm_out.internal_label)'. Defined in svr4.h. */ /* When generating embedded PIC or mips16 code we want to put the jump @@ -3158,7 +3137,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE) do { \ if (flag_pic) \ function_section (current_function_decl); \ - ASM_OUTPUT_INTERNAL_LABEL (STREAM, PREFIX, NUM); \ + (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM); \ } while (0) /* Define this to determine whether case statement labels are relative to @@ -3492,9 +3471,6 @@ frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR) scheduling. */ #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead -/* Return true if a function is ok to be called as a sibcall. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) 0 - enum frv_builtins { FRV_BUILTIN_MAND, diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index eac88bde469..078c4a97651 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h index 21f3eeb689b..49c47ef7a23 100644 --- a/gcc/config/h8300/h8300.h +++ b/gcc/config/h8300/h8300.h @@ -1159,20 +1159,13 @@ struct cum_arg #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. - - N.B.: The h8300.md branch_true and branch_false patterns also know - how to generate internal labels. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. - This is suitable for output with `assemble_name'. */ + This is suitable for output with `assemble_name'. + N.B.: The h8300.md branch_true and branch_false patterns also know + how to generate internal labels. */ #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf (LABEL, "*.%s%d", PREFIX, NUM) @@ -1238,13 +1231,7 @@ struct cum_arg assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%d\n", (SIZE))) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* Print an instruction operand X on file FILE. Look in h8300.c for details. */ diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index de6edc9b4d2..cf4e6a95cb1 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -353,7 +353,7 @@ || register_operand (operands[1], SImode))" "* { - int rn = -1; + unsigned int rn = -1; switch (which_alternative) { case 0: @@ -420,7 +420,7 @@ "* { /* Copy of the movsi stuff. */ - int rn = -1; + unsigned int rn = -1; switch (which_alternative) { case 0: diff --git a/gcc/config/i370/i370-c.c b/gcc/config/i370/i370-c.c index 5651a5661c3..ab67c75e2c6 100644 --- a/gcc/config/i370/i370-c.c +++ b/gcc/config/i370/i370-c.c @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "toplev.h" #include "cpplib.h" diff --git a/gcc/config/i370/i370.c b/gcc/config/i370/i370.c index b4474db3273..3db961a6170 100644 --- a/gcc/config/i370/i370.c +++ b/gcc/config/i370/i370.c @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -109,6 +111,7 @@ static void i370_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT)); static int mvs_hash_alias PARAMS ((const char *)); #endif static void i370_encode_section_info PARAMS ((tree, int)); +static void i370_internal_label PARAMS ((FILE *, const char *, unsigned long)); /* ===================================================== */ /* defines and functions specific to the HLASM assembler */ @@ -312,6 +315,8 @@ static const unsigned char ebcasc[256] = #define TARGET_ASM_FUNCTION_EPILOGUE i370_output_function_epilogue #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO i370_encode_section_info +#undef TARGET_ASM_INTERNAL_LABEL +#define TARGET_ASM_INTERNAL_LABEL i370_internal_label struct gcc_target targetm = TARGET_INITIALIZER; @@ -1597,3 +1602,14 @@ i370_encode_section_info (decl, first) SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1; } +static void +i370_internal_label (stream, prefix, labelno) + FILE *stream; + const char *prefix; + unsigned long labelno; +{ + if (!strcmp (prefix, "L")) + mvs_add_label(labelno); + + default_internal_label (stream, prefix, labelno); +} diff --git a/gcc/config/i370/i370.h b/gcc/config/i370/i370.h index 23cf036b0df..802103315d2 100644 --- a/gcc/config/i370/i370.h +++ b/gcc/config/i370/i370.h @@ -656,12 +656,6 @@ enum reg_class /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT */ -/* #define HAVE_POST_DECREMENT */ - -/* #define HAVE_PRE_DECREMENT */ -/* #define HAVE_PRE_INCREMENT */ - /* These assume that REGNO is a hard or pseudo reg number. They give nonzero only if REGNO is a hard reg of the suitable class or a pseudo reg currently allocated to a suitable hard reg. @@ -1098,18 +1092,6 @@ enum reg_class #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf (LABEL, "*%s%d", PREFIX, NUM) -/* Generate internal label. Since we can branch here from off page, we - must reload the base register. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ -{ \ - if (!strcmp (PREFIX,"L")) \ - { \ - mvs_add_label(NUM); \ - } \ - fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \ -} - /* Generate case label. For HLASM we can change to the data CSECT and put the vectors out of the code body. The assembler just concatenates CSECTs with the same name. */ @@ -1258,15 +1240,7 @@ enum reg_class ASM_OUTPUT_SKIP (FILE,SIZE); \ } -/* Store in OUTPUT a string (made with alloca) containing an - assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -{ \ - (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \ - sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \ -} +#define ASM_PN_FORMAT "%s%lu" /* Print operand XV (an rtx) in assembler syntax to file FILE. CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. @@ -1837,19 +1811,6 @@ abort(); \ /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */ -/* Generate internal label. Since we can branch here from off page, we - must reload the base register. Note that internal labels are generated - for loops, goto's and case labels. */ -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ -{ \ - if (!strcmp (PREFIX,"L")) \ - { \ - mvs_add_label(NUM); \ - } \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \ -} - /* let config/svr4.h define this ... * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) * fprintf (FILE, "%s%d:\n", PREFIX, NUM) @@ -1886,11 +1847,7 @@ abort(); \ #undef SHIFT_DOUBLE_OMITS_COUNT #define SHIFT_DOUBLE_OMITS_COUNT 0 -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - - /* Implicit library calls should use memcpy, not bcopy, etc. */ +/* Implicit library calls should use memcpy, not bcopy, etc. */ #define TARGET_MEM_FUNCTIONS /* Output before read-only data. */ diff --git a/gcc/config/i370/t-i370 b/gcc/config/i370/t-i370 index 34758d838fd..96138a1c372 100644 --- a/gcc/config/i370/t-i370 +++ b/gcc/config/i370/t-i370 @@ -1,3 +1,3 @@ -i370-c.o: $(srcdir)/config/i370/i370-c.c $(CONFIG_H) $(SYSTEM_H) cpplib.h \ - $(TREE_H) c-pragma.h toplev.h $(TM_P_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< +i370-c.o: $(srcdir)/config/i370/i370-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h + $(TM_H) $(TREE_H) toplev.h $(CPPLIB_H) c-pragma.h $(TM_P_H) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/i370/i370-c.c diff --git a/gcc/config/i386/athlon.md b/gcc/config/i386/athlon.md index 548f2adf422..719046fcd61 100644 --- a/gcc/config/i386/athlon.md +++ b/gcc/config/i386/athlon.md @@ -1,34 +1,5 @@ ;; AMD Athlon Scheduling -;; Copyright (C) 2002 Free Software Foundation, Inc. ;; -;; This file is part of GNU CC. -;; -;; GNU CC is free software; you can redistribute it and/or modify -;; it under the terms of the GNU General Public License as published by -;; the Free Software Foundation; either version 2, or (at your option) -;; any later version. -;; -;; GNU CC is distributed in the hope that it will be useful, -;; but WITHOUT ANY WARRANTY; without even the implied warranty of -;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -;; GNU General Public License for more details. -;; -;; You should have received a copy of the GNU General Public License -;; along with GNU CC; see the file COPYING. If not, write to -;; the Free Software Foundation, 59 Temple Place - Suite 330, -;; Boston, MA 02111-1307, USA. */ -(define_attr "athlon_decode" "direct,vector" - (cond [(eq_attr "type" "call,imul,idiv,other,multi,fcmov,fpspc,str,pop,cld,fcmov") - (const_string "vector") - (and (eq_attr "type" "push") - (match_operand 1 "memory_operand" "")) - (const_string "vector") - (and (eq_attr "type" "fmov") - (and (eq_attr "memory" "load,store") - (eq_attr "mode" "XF"))) - (const_string "vector")] - (const_string "direct"))) - ;; The Athlon does contain three pipelined FP units, three integer units and ;; three address generation units. ;; @@ -46,161 +17,649 @@ ;; The load/store queue unit is not attached to the schedulers but ;; communicates with all the execution units separately instead. -(define_function_unit "athlon_vectordec" 1 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "athlon_decode" "vector")) - 1 1) - -(define_function_unit "athlon_directdec" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "athlon_decode" "direct")) - 1 1) - -(define_function_unit "athlon_vectordec" 1 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "athlon_decode" "direct")) - 1 1 [(eq_attr "athlon_decode" "vector")]) - -(define_function_unit "athlon_ieu" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "alu1,negnot,alu,icmp,test,imov,imovx,lea,incdec,ishift,ishift1,rotate,rotate1,ibr,call,callv,icmov,cld,pop,setcc,push,pop")) - 1 1) - -(define_function_unit "athlon_ieu" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "str")) - 15 15) - -(define_function_unit "athlon_ieu" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "imul")) - 5 0) - -(define_function_unit "athlon_ieu" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "idiv")) - 42 0) - -(define_function_unit "athlon_muldiv" 1 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "imul")) - 5 0) - -(define_function_unit "athlon_muldiv" 1 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "idiv")) - 42 42) - -(define_attr "athlon_fpunits" "none,store,mul,add,muladd,any" - (cond [(eq_attr "type" "fop,fcmp,fistp") - (const_string "add") - (eq_attr "type" "fmul,fdiv,fpspc,fsgn,fcmov") - (const_string "mul") - (and (eq_attr "type" "fmov") (eq_attr "memory" "store,both")) - (const_string "store") - (and (eq_attr "type" "fmov") (eq_attr "memory" "load")) - (const_string "any") +(define_attr "athlon_decode" "direct,vector" + (cond [(eq_attr "type" "call,imul,idiv,other,multi,fcmov,fpspc,str,pop,cld,leave") + (const_string "vector") + (and (eq_attr "type" "push") + (match_operand 1 "memory_operand" "")) + (const_string "vector") (and (eq_attr "type" "fmov") - (ior (match_operand:SI 1 "register_operand" "") - (match_operand 1 "immediate_operand" ""))) - (const_string "store") - (eq_attr "type" "fmov") - (const_string "muladd")] - (const_string "none"))) - -;; We use latencies 1 for definitions. This is OK to model colisions -;; in execution units. The real latencies are modeled in the "fp" pipeline. - -;; fsin, fcos: 96-192 -;; fsincos: 107-211 -;; fsqrt: 19 for SFmode, 27 for DFmode, 35 for XFmode. -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "fpspc")) - 100 1) - -;; 16 cycles for SFmode, 20 for DFmode and 24 for XFmode. -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "fdiv")) - 24 1) - -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "fop,fmul,fistp")) - 4 1) - -;; XFmode loads are slow. -;; XFmode store is slow too (8 cycles), but we don't need to model it, because -;; there are no dependent instructions. + (and (eq_attr "memory" "load,store") + (eq_attr "mode" "XF"))) + (const_string "vector")] + (const_string "direct"))) -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (and (eq_attr "type" "fmov") - (and (eq_attr "memory" "load") - (eq_attr "mode" "XF")))) - 10 1) +;; +;; decode0 decode1 decode2 +;; \ | / +;; instruction control unit (72 entry scheduler) +;; | | +;; integer scheduler (18) stack map +;; / | | | | \ stack rename +;; ieu0 agu0 ieu1 agu1 ieu2 agu2 scheduler +;; | agu0 | agu1 agu2 register file +;; | \ | | / | | | +;; \ /\ | / fadd fmul fstore +;; \ / \ | / fadd fmul fstore +;; imul load/store (2x) fadd fmul fstore -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "fmov,fsgn")) - 2 1) +(define_automaton "athlon,athlon_load,athlon_mult,athlon_fp") +(define_cpu_unit "athlon-decode0" "athlon") +(define_cpu_unit "athlon-decode1" "athlon") +(define_cpu_unit "athlon-decode2" "athlon") +(define_cpu_unit "athlon-decodev" "athlon") +;; Model the fact that double decoded instruction may take 2 cycles +;; to decode when decoder2 and decoder0 in next cycle +;; is used (this is needed to allow troughput of 1.5 double decoded +;; instructions per cycle). +;; +;; In order to avoid dependnece between reservation of decoder +;; and other units, we model decoder as two stage fully pipelined unit +;; and only double decoded instruction may occupy unit in the first cycle. +;; With this scheme however two double instructions can be issued cycle0. +;; +;; Avoid this by using presence set requiring decoder0 to be allocated +;; too. Vector decoded instructions then can't be issued when +;; modeled as consuming decoder0+decoder1+decoder2. +;; We solve that by specialized vector decoder unit and exclusion set. +(presence_set "athlon-decode2" "athlon-decode0") +(exclusion_set "athlon-decodev" "athlon-decode0,athlon-decode1,athlon-decode2") +(define_reservation "athlon-vector" "nothing,athlon-decodev") +(define_reservation "athlon-direct0" "nothing,athlon-decode0") +(define_reservation "athlon-direct" "nothing, + (athlon-decode0 | athlon-decode1 + | athlon-decode2)") +;; Double instructions behaves like two direct instructions. +(define_reservation "athlon-double" "((athlon-decode2, athlon-decode0) + | (nothing,(athlon-decode0 + athlon-decode1)) + | (nothing,(athlon-decode1 + athlon-decode2)))") -;; fcmp and ftst instructions -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (and (eq_attr "type" "fcmp") - (eq_attr "athlon_decode" "direct"))) - 3 1) +;; Agu and ieu unit results in extremly large automatons and +;; in our approximation they are hardly filled in. Only ieu +;; unit can, as issue rate is 3 and agu unit is always used +;; first in the insn reservations. Skip the models. -;; fcmpi instructions. -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (and (eq_attr "type" "fcmp") - (eq_attr "athlon_decode" "vector"))) - 3 1) +;(define_cpu_unit "athlon-ieu0" "athlon_ieu") +;(define_cpu_unit "athlon-ieu1" "athlon_ieu") +;(define_cpu_unit "athlon-ieu2" "athlon_ieu") +;(define_reservation "athlon-ieu" "(athlon-ieu0 | athlon-ieu1 | athlon-ieu2)") +(define_reservation "athlon-ieu" "nothing") +(define_cpu_unit "athlon-ieu0" "athlon") +;(define_cpu_unit "athlon-agu0" "athlon_agu") +;(define_cpu_unit "athlon-agu1" "athlon_agu") +;(define_cpu_unit "athlon-agu2" "athlon_agu") +;(define_reservation "athlon-agu" "(athlon-agu0 | athlon-agu1 | athlon-agu2)") +(define_reservation "athlon-agu" "nothing,nothing") -(define_function_unit "athlon_fp" 3 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "type" "fcmov")) - 7 1) +(define_cpu_unit "athlon-mult" "athlon_mult") -(define_function_unit "athlon_fp_mul" 1 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "athlon_fpunits" "mul")) - 1 1) +(define_cpu_unit "athlon-load0" "athlon_load") +(define_cpu_unit "athlon-load1" "athlon_load") +(define_reservation "athlon-load" "athlon-agu, + (athlon-load0 | athlon-load1)") +(define_reservation "athlon-store" "nothing") -(define_function_unit "athlon_fp_add" 1 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "athlon_fpunits" "add")) - 1 1) +;; The three fp units are fully pipelined with latency of 3 +(define_cpu_unit "athlon-fadd" "athlon_fp") +(define_cpu_unit "athlon-fmul" "athlon_fp") +(define_cpu_unit "athlon-fstore" "athlon_fp") +(define_reservation "athlon-fany" "(athlon-fadd | athlon-fmul | athlon-fstore)") +(define_reservation "athlon-faddmul" "(athlon-fadd | athlon-fmul)") -(define_function_unit "athlon_fp_muladd" 2 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "athlon_fpunits" "muladd,mul,add")) - 1 1) -(define_function_unit "athlon_fp_store" 1 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "athlon_fpunits" "store")) - 1 1) +;; Jump instructions are executed in the branch unit compltetely transparent to us +(define_insn_reservation "athlon_branch" 0 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "ibr")) + "athlon-direct") +(define_insn_reservation "athlon_call" 0 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "call,callv")) + "athlon-vector") -;; We don't need to model the Address Generation Unit, since we don't model -;; the re-order buffer yet and thus we never schedule more than three operations -;; at time. Later we may want to experiment with MD_SCHED macros modeling the -;; decoders independently on the functional units. +;; Latency of push operation is 3 cycles, but ESP value is available +;; earlier +(define_insn_reservation "athlon_push" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "push")) + "athlon-direct,nothing,athlon-store") +(define_insn_reservation "athlon_pop" 4 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "pop")) + "athlon-vector,athlon-ieu,athlon-load") +(define_insn_reservation "athlon_pop_k8" 3 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "pop")) + "athlon-double,athlon-ieu,athlon-load") +(define_insn_reservation "athlon_leave" 3 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "leave")) + "athlon-vector,athlon-load") +(define_insn_reservation "athlon_leave_k8" 3 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "leave")) + "athlon-double,athlon-load") -;(define_function_unit "athlon_agu" 3 0 -; (and (eq_attr "cpu" "athlon") -; (and (eq_attr "memory" "!none") -; (eq_attr "athlon_fpunits" "none"))) -; 1 1) +;; Lea executes in AGU unit with 2 cycles latency. +(define_insn_reservation "athlon_lea" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "lea")) + "athlon-direct,athlon-agu") -;; Model load unit to avoid too long sequences of loads. We don't need to -;; model store queue, since it is hardly going to be bottleneck. +;; Mul executes in special multiplier unit attached to IEU0 +(define_insn_reservation "athlon_imul" 5 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "imul") + (eq_attr "memory" "none,unknown"))) + "athlon-vector,athlon-ieu0,athlon-mult,nothing,nothing,athlon-ieu0") +;; ??? Widening multiply is vector or double. +(define_insn_reservation "athlon_imul_k8_DI" 4 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "imul") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "none,unknown")))) + "athlon-direct0,athlon-ieu0,athlon-mult,nothing,athlon-ieu0") +(define_insn_reservation "athlon_imul_k8" 3 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "imul") + (eq_attr "memory" "none,unknown"))) + "athlon-direct0,athlon-ieu0,athlon-mult,athlon-ieu0") +(define_insn_reservation "athlon_imul_mem" 8 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "imul") + (eq_attr "memory" "load,both"))) + "athlon-vector,athlon-load,athlon-ieu,athlon-mult,nothing,nothing,athlon-ieu") +(define_insn_reservation "athlon_imul_mem_k8_DI" 7 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "imul") + (and (eq_attr "mode" "DI") + (eq_attr "memory" "load,both")))) + "athlon-vector,athlon-load,athlon-ieu,athlon-mult,nothing,athlon-ieu") +(define_insn_reservation "athlon_imul_mem_k8" 6 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "imul") + (eq_attr "memory" "load,both"))) + "athlon-vector,athlon-load,athlon-ieu,athlon-mult,athlon-ieu") +(define_insn_reservation "athlon_idiv" 42 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "idiv") + (eq_attr "memory" "none,unknown"))) + "athlon-vector,athlon-ieu*42") +(define_insn_reservation "athlon_idiv_mem" 45 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "idiv") + (eq_attr "memory" "load,both"))) + "athlon-vector,athlon-load,athlon-ieu*42") +(define_insn_reservation "athlon_str" 15 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "str") + (eq_attr "memory" "load,both,store"))) + "athlon-vector,athlon-load,athlon-ieu*10") -(define_function_unit "athlon_load" 2 0 - (and (eq_attr "cpu" "athlon") - (eq_attr "memory" "load,both")) - 1 1) +(define_insn_reservation "athlon_idirect" 1 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "direct") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "none,unknown")))) + "athlon-direct,athlon-ieu") +(define_insn_reservation "athlon_ivector" 2 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "vector") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "none,unknown")))) + "athlon-vector,athlon-ieu,athlon-ieu") +(define_insn_reservation "athlon_idirect_loadmov" 3 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "imov") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load") +(define_insn_reservation "athlon_idirect_load" 4 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "direct") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-ieu") +(define_insn_reservation "athlon_ivector_load" 6 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "vector") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "load")))) + "athlon-vector,athlon-load,athlon-ieu,athlon-ieu") +(define_insn_reservation "athlon_idirect_movstore" 1 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "imov") + (eq_attr "memory" "store"))) + "athlon-direct,athlon-agu,athlon-store") +(define_insn_reservation "athlon_idirect_both" 4 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "direct") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "both")))) + "athlon-direct,athlon-load,athlon-ieu, + athlon-store") +(define_insn_reservation "athlon_ivector_both" 6 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "vector") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "both")))) + "athlon-vector,athlon-load,athlon-ieu,athlon-ieu, + athlon-store") +(define_insn_reservation "athlon_idirect_store" 1 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "direct") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "store")))) + "athlon-direct,athlon-ieu, + athlon-store") +(define_insn_reservation "athlon_ivector_store" 2 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "vector") + (and (eq_attr "unit" "integer,unknown") + (eq_attr "memory" "store")))) + "athlon-vector,athlon-ieu,athlon-ieu, + athlon-store") +;; Athlon floatin point unit +(define_insn_reservation "athlon_fldxf" 12 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fmov") + (and (eq_attr "memory" "load") + (eq_attr "mode" "XF")))) + "athlon-vector,athlon-fany") +(define_insn_reservation "athlon_fldxf_k8" 13 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fmov") + (and (eq_attr "memory" "load") + (eq_attr "mode" "XF")))) + "athlon-vector,athlon-fany") +(define_insn_reservation "athlon_fld" 6 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-fany,nothing,athlon-load") +(define_insn_reservation "athlon_fld_k8" 4 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-fany,athlon-load") +(define_insn_reservation "athlon_fstxf" 10 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fmov") + (and (eq_attr "memory" "store,both") + (eq_attr "mode" "XF")))) + "athlon-vector,athlon-fstore") +(define_insn_reservation "athlon_fstxf_k8" 8 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fmov") + (and (eq_attr "memory" "store,both") + (eq_attr "mode" "XF")))) + "athlon-vector,athlon-fstore") +(define_insn_reservation "athlon_fst" 4 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "store,both"))) + "athlon-direct,athlon-fstore,nothing,athlon-store") +(define_insn_reservation "athlon_fst_k8" 2 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fmov") + (eq_attr "memory" "store,both"))) + "athlon-direct,athlon-fstore,athlon-store") +(define_insn_reservation "athlon_fist" 4 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fistp")) + "athlon-direct,athlon-fstore,nothing") +(define_insn_reservation "athlon_fmov" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fmov")) + "athlon-direct,athlon-faddmul") +(define_insn_reservation "athlon_fadd_load" 7 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fop") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_fadd_load_k8" 6 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fop") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_fadd" 4 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fop")) + "athlon-direct,athlon-fadd") +(define_insn_reservation "athlon_fmul_load" 7 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fmul") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_fmul_load_k8" 6 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fmul") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_fmul" 4 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fmul")) + "athlon-direct,athlon-fmul") +(define_insn_reservation "athlon_fsgn" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fsgn")) + "athlon-direct,athlon-fmul") +(define_insn_reservation "athlon_fdiv_load" 24 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fdiv") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_fdiv_load_k8" 13 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fdiv") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_fdiv" 24 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "fdiv")) + "athlon-direct,athlon-fmul") +(define_insn_reservation "athlon_fdiv_k8" 11 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "fdiv")) + "athlon-direct,athlon-fmul") +(define_insn_reservation "athlon_fpspc_load" 103 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "fpspc") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_fpspc" 100 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fpspc")) + "athlon-vector,athlon-fmul") +(define_insn_reservation "athlon_fcmov_load" 10 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fcmov") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_fcmov" 7 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "fcmov")) + "athlon-vector,athlon-fmul") +(define_insn_reservation "athlon_fcmov_load_k8" 17 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "fcmov") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_fcmov_k8" 15 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "fcmov")) + "athlon-vector,athlon-fmul") +(define_insn_reservation "athlon_fcomi_load" 6 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "fcmp") + (and (eq_attr "athlon_decode" "vector") + (eq_attr "memory" "load")))) + "athlon-vector,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_fcomi" 3 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "athlon_decode" "vector") + (eq_attr "type" "fcmp"))) + "athlon-vector,athlon-fadd") +(define_insn_reservation "athlon_fcom_load" 5 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "fcmp") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_fcom" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fcmp")) + "athlon-direct,athlon-fadd") +(define_insn_reservation "athlon_fxch" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "fxch")) + "athlon-direct,athlon-fany") +;; Athlon handle MMX operations in the FPU unit with shorter latencies +(define_insn_reservation "athlon_movlpd_load" 4 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssemov") + (match_operand:DF 1 "memory_operand" ""))) + "athlon-direct,athlon-load") +(define_insn_reservation "athlon_movaps_load" 4 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "V4SF,V2DF,TI") + (eq_attr "memory" "load")))) + "athlon-double,athlon-load") +(define_insn_reservation "athlon_movss_load" 3 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssemov") + (and (eq_attr "mode" "SF,DI") + (eq_attr "memory" "load")))) + "athlon-double,athlon-load") +(define_insn_reservation "athlon_mmxsseld" 4 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "mmxmov,ssemov") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-fany,athlon-load") +(define_insn_reservation "athlon_mmxssest" 3 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "mmxmov,ssemov") + (and (eq_attr "mode" "V4SF,V2DF,TI") + (eq_attr "memory" "store,both")))) + "athlon-double,athlon-store") +(define_insn_reservation "athlon_mmxssest_k8" 2 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "mmxmov,ssemov") + (eq_attr "memory" "store,both"))) + "athlon-direct,athlon-store") +(define_insn_reservation "athlon_movaps" 2 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssemov") + (eq_attr "mode" "V4SF,V2DF"))) + "athlon-double,athlon-faddmul,athlon-faddmul") +(define_insn_reservation "athlon_mmxssemov" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "mmxmov,ssemov")) + "athlon-direct,athlon-faddmul") +(define_insn_reservation "athlon_mmxmul_load" 6 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "mmxmul") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_mmxmul" 3 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "type" "mmxmul")) + "athlon-direct,athlon-fmul") +(define_insn_reservation "athlon_mmx_load" 5 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "unit" "mmx") + (eq_attr "memory" "load"))) + "athlon-direct,athlon-load,athlon-faddmul") +(define_insn_reservation "athlon_mmx" 2 + (and (eq_attr "cpu" "athlon,k8") + (eq_attr "unit" "mmx")) + "athlon-direct,athlon-faddmul") +;; SSE operations are handled by the i387 unit as well. The latnecy +;; is same as for i387 operations for scalar operations +(define_insn_reservation "athlon_sselog_load" 6 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "sselog") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_sselog_load_k8" 5 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "sselog") + (eq_attr "memory" "load"))) + "athlon-double,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_sselog" 3 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "sselog")) + "athlon-vector,athlon-fmul") +(define_insn_reservation "athlon_sselog_k8" 3 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "sselog")) + "athlon-double,athlon-fmul") +(define_insn_reservation "athlon_ssecmp_load" 5 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssecmp") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-vector,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_ssecmp" 2 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssecmp") + (eq_attr "mode" "SF,DF"))) + "athlon-direct,athlon-fadd") +(define_insn_reservation "athlon_ssecmpvector_load" 6 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "ssecmp") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-fadd") +(define_insn_reservation "athlon_ssecmpvector_load_k8" 5 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssecmp") + (eq_attr "memory" "load"))) + "athlon-double,athlon-fadd") +(define_insn_reservation "athlon_ssecmpvector" 3 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "ssecmp")) + "athlon-vector,athlon-fadd") +(define_insn_reservation "athlon_ssecmpvector_k8" 3 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "ssecmp")) + "athlon-double,athlon-fadd") +(define_insn_reservation "athlon_sseadd_load" 7 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_sseadd_load_k8" 6 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "sseadd") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_sseadd" 4 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "sseadd") + (eq_attr "mode" "SF,DF"))) + "athlon-direct,athlon-fadd") +(define_insn_reservation "athlon_sseaddvector_load" 8 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "sseadd") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_sseaddvector_load_k8" 7 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "sseadd") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_sseaddvector" 5 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "sseadd")) + "athlon-vector,athlon-fadd") +(define_insn_reservation "athlon_sseaddvector_k8" 4 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "sseadd")) + "athlon-vector,athlon-fadd") +(define_insn_reservation "athlon_ssecvt_load" 5 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_ssecvt_load_k8" 4 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssecvt") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_ssecvt" 2 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssecvt") + (eq_attr "mode" "SF,DF"))) + "athlon-direct,athlon-fadd") +(define_insn_reservation "athlon_ssecvtvector_load" 6 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "ssecvt") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_ssecvtvector_load_k8" 5 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssecvt") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fadd") +(define_insn_reservation "athlon_ssecvtvector" 5 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "ssecvt")) + "athlon-vector,athlon-fadd") +(define_insn_reservation "athlon_ssecvtvector_k8" 3 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "ssecvt")) + "athlon-vector,athlon-fadd") +(define_insn_reservation "athlon_ssemul_load" 7 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssemul_load_k8" 6 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssemul") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssemul" 4 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssemul") + (eq_attr "mode" "SF,DF"))) + "athlon-direct,athlon-fmul") +(define_insn_reservation "athlon_ssemulvector_load" 8 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "ssemul") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssemulvector_load_k8" 7 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssemul") + (eq_attr "memory" "load"))) + "athlon-double,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssemulvector" 5 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "ssemul")) + "athlon-vector,athlon-fmul") +(define_insn_reservation "athlon_ssemulvector_k8" 5 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "ssemul")) + "athlon-double,athlon-fmul") +(define_insn_reservation "athlon_ssediv_load" 19 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssediv_load_k8" 18 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssediv") + (and (eq_attr "mode" "SF,DF") + (eq_attr "memory" "load")))) + "athlon-direct,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssediv" 16 + (and (eq_attr "cpu" "athlon,k8") + (and (eq_attr "type" "ssediv") + (eq_attr "mode" "SF,DF"))) + "athlon-direct,athlon-fmul") +(define_insn_reservation "athlon_ssedivvector_load" 32 + (and (eq_attr "cpu" "athlon") + (and (eq_attr "type" "ssediv") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssedivvector_load_k8" 35 + (and (eq_attr "cpu" "k8") + (and (eq_attr "type" "ssediv") + (eq_attr "memory" "load"))) + "athlon-vector,athlon-load,athlon-fmul") +(define_insn_reservation "athlon_ssedivvector" 29 + (and (eq_attr "cpu" "athlon") + (eq_attr "type" "ssediv")) + "athlon-vector,athlon-fmul") +(define_insn_reservation "athlon_ssedivvector_k8" 33 + (and (eq_attr "cpu" "k8") + (eq_attr "type" "ssediv")) + "athlon-vector,athlon-fmul") diff --git a/gcc/config/i386/att.h b/gcc/config/i386/att.h index 70ae1641365..8d9930852f7 100644 --- a/gcc/config/i386/att.h +++ b/gcc/config/i386/att.h @@ -90,13 +90,6 @@ do \ #define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \ sprintf ((BUF), "%s%s%ld", LOCAL_LABEL_PREFIX, (PREFIX), (long)(NUMBER)) -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%s%d:\n", LOCAL_LABEL_PREFIX, PREFIX, NUM) - /* The prefix to add to user-visible assembler symbols. */ #undef USER_LABEL_PREFIX diff --git a/gcc/config/i386/bsd.h b/gcc/config/i386/bsd.h index 69ad1688bfb..9f396ec46ae 100644 --- a/gcc/config/i386/bsd.h +++ b/gcc/config/i386/bsd.h @@ -88,12 +88,6 @@ Boston, MA 02111-1307, USA. */ #define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \ sprintf ((BUF), "*%s%ld", (PREFIX), (long)(NUMBER)) -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* The prefix to add to user-visible assembler symbols. */ #define USER_LABEL_PREFIX "_" diff --git a/gcc/config/i386/freebsd-aout.h b/gcc/config/i386/freebsd-aout.h index a2b616e700b..646cf13b5d8 100644 --- a/gcc/config/i386/freebsd-aout.h +++ b/gcc/config/i386/freebsd-aout.h @@ -198,7 +198,8 @@ do { \ ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \ } while (0) -#define ASM_SPEC " %| %{fpic:-k} %{fPIC:-k}" +#define AS_NEEDS_DASH_FOR_PIPED_INPUT +#define ASM_SPEC "%{fpic:-k} %{fPIC:-k}" #define LINK_SPEC \ "%{p:%e`-p' not supported; use `-pg' and gprof(1)} \ %{shared:-Bshareable} \ diff --git a/gcc/config/i386/i386-coff.h b/gcc/config/i386/i386-coff.h index e8c5de9c65c..a4bb04ad729 100644 --- a/gcc/config/i386/i386-coff.h +++ b/gcc/config/i386/i386-coff.h @@ -60,11 +60,4 @@ Boston, MA 02111-1307, USA. */ #define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \ sprintf ((BUF), ".%s%ld", (PREFIX), (long)(NUMBER)) -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM) - /* end of i386-coff.h */ diff --git a/gcc/config/i386/i386-interix.h b/gcc/config/i386/i386-interix.h index d309087217d..7e2290f2d3a 100644 --- a/gcc/config/i386/i386-interix.h +++ b/gcc/config/i386/i386-interix.h @@ -35,11 +35,12 @@ Boston, MA 02111-1307, USA. */ /* By default, target has a 80387, uses IEEE compatible arithmetic, and returns float values in the 387 and needs stack probes - We also align doubles to 64-bits for MSVC default compatibility */ + We also align doubles to 64-bits for MSVC default compatibility + We do bitfields MSVC-compatably by default, too. */ #undef TARGET_SUBTARGET_DEFAULT #define TARGET_SUBTARGET_DEFAULT \ (MASK_80387 | MASK_IEEE_FP | MASK_FLOAT_RETURNS | MASK_STACK_PROBE | \ - MASK_ALIGN_DOUBLE) + MASK_ALIGN_DOUBLE | MASK_MS_BITFIELD_LAYOUT) #undef TARGET_CPU_DEFAULT #define TARGET_CPU_DEFAULT 2 /* 486 */ @@ -243,6 +244,28 @@ Boston, MA 02111-1307, USA. */ #define TARGET_NOP_FUN_DLLIMPORT 1 #define drectve_section() /* nothing */ +/* Objective C has its own packing rules... + Objc tries to parallel the code in stor-layout.c at runtime + (see libobjc/encoding.c). This (compile-time) packing info isn't + available at runtime, so it's hopeless to try. + + And if the user tries to set the flag for objc, give an error + so he has some clue. */ + +#undef SUBTARGET_OVERRIDE_OPTIONS +#define SUBTARGET_OVERRIDE_OPTIONS \ +do { \ + if (strcmp (lang_hooks.name, "GNU Objective-C") == 0) \ + { \ + if ((target_flags & MASK_MS_BITFIELD_LAYOUT) != 0 \ + && (target_flags_explicit & MASK_MS_BITFIELD_LAYOUT) != 0) \ + { \ + error ("ms-bitfields not supported for objc"); \ + } \ + target_flags &= ~MASK_MS_BITFIELD_LAYOUT; \ + } \ +} while (0) + #define EH_FRAME_IN_DATA_SECTION #define READONLY_DATA_SECTION_ASM_OP "\t.section\t.rdata,\"r\"" @@ -273,8 +296,6 @@ while (0) #define HOST_PTR_AS_INT unsigned long #define PCC_BITFIELD_TYPE_MATTERS 1 -#define PCC_BITFIELD_TYPE_TEST TYPE_NATIVE(rec) -#define GROUP_BITFIELDS_BY_ALIGN TYPE_NATIVE(rec) /* The following two flags are usually "off" for i386, because some non-gnu tools (for the i386) don't handle them. However, we don't have that diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 4afdf668bd8..e403950ab32 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -41,6 +41,9 @@ extern int ix86_aligned_p PARAMS ((rtx)); extern int standard_80387_constant_p PARAMS ((rtx)); extern int standard_sse_constant_p PARAMS ((rtx)); extern int symbolic_reference_mentioned_p PARAMS ((rtx)); +extern bool extended_reg_mentioned_p PARAMS ((rtx)); +extern bool x86_extended_QIreg_mentioned_p PARAMS ((rtx)); +extern bool x86_extended_reg_mentioned_p PARAMS ((rtx)); extern int any_fp_register_operand PARAMS ((rtx, enum machine_mode)); extern int register_and_not_any_fp_reg_operand PARAMS ((rtx, enum machine_mode)); @@ -63,6 +66,7 @@ extern int initial_exec_symbolic_operand PARAMS ((rtx, enum machine_mode)); extern int local_exec_symbolic_operand PARAMS ((rtx, enum machine_mode)); extern int pic_symbolic_operand PARAMS ((rtx, enum machine_mode)); extern int call_insn_operand PARAMS ((rtx, enum machine_mode)); +extern int sibcall_insn_operand PARAMS ((rtx, enum machine_mode)); extern int constant_call_address_operand PARAMS ((rtx, enum machine_mode)); extern int const0_operand PARAMS ((rtx, enum machine_mode)); extern int const1_operand PARAMS ((rtx, enum machine_mode)); @@ -137,7 +141,7 @@ extern void ix86_expand_branch PARAMS ((enum rtx_code, rtx)); extern int ix86_expand_setcc PARAMS ((enum rtx_code, rtx)); extern int ix86_expand_int_movcc PARAMS ((rtx[])); extern int ix86_expand_fp_movcc PARAMS ((rtx[])); -extern void ix86_expand_call PARAMS ((rtx, rtx, rtx, rtx, rtx)); +extern void ix86_expand_call PARAMS ((rtx, rtx, rtx, rtx, rtx, int)); extern void x86_initialize_trampoline PARAMS ((rtx, rtx, rtx)); extern rtx ix86_zero_extend_to_Pmode PARAMS ((rtx)); extern void ix86_split_long_move PARAMS ((rtx[])); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 42f6d93d3c3..2eaa1c54875 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "tm_p.h" @@ -55,9 +57,9 @@ struct processor_costs size_cost = { /* costs for tunning for size */ 3, /* cost of a lea instruction */ 2, /* variable shift costs */ 3, /* constant shift costs */ - 3, /* cost of starting a multiply */ + {3, 3, 3, 3, 5}, /* cost of starting a multiply */ 0, /* cost of multiply per each bit set */ - 3, /* cost of a divide/mod */ + {3, 3, 3, 3, 5}, /* cost of a divide/mod */ 3, /* cost of movsx */ 3, /* cost of movzx */ 0, /* "large" insn */ @@ -84,6 +86,7 @@ struct processor_costs size_cost = { /* costs for tunning for size */ 3, /* MMX or SSE register to integer */ 0, /* size of prefetch block */ 0, /* number of parallel prefetches */ + 1, /* Branch cost */ 2, /* cost of FADD and FSUB insns. */ 2, /* cost of FMUL instruction. */ 2, /* cost of FDIV instruction. */ @@ -99,9 +102,9 @@ struct processor_costs i386_cost = { /* 386 specific costs */ 1, /* cost of a lea instruction */ 3, /* variable shift costs */ 2, /* constant shift costs */ - 6, /* cost of starting a multiply */ + {6, 6, 6, 6, 6}, /* cost of starting a multiply */ 1, /* cost of multiply per each bit set */ - 23, /* cost of a divide/mod */ + {23, 23, 23, 23, 23}, /* cost of a divide/mod */ 3, /* cost of movsx */ 2, /* cost of movzx */ 15, /* "large" insn */ @@ -128,6 +131,7 @@ struct processor_costs i386_cost = { /* 386 specific costs */ 3, /* MMX or SSE register to integer */ 0, /* size of prefetch block */ 0, /* number of parallel prefetches */ + 1, /* Branch cost */ 23, /* cost of FADD and FSUB insns. */ 27, /* cost of FMUL instruction. */ 88, /* cost of FDIV instruction. */ @@ -142,9 +146,9 @@ struct processor_costs i486_cost = { /* 486 specific costs */ 1, /* cost of a lea instruction */ 3, /* variable shift costs */ 2, /* constant shift costs */ - 12, /* cost of starting a multiply */ + {12, 12, 12, 12, 12}, /* cost of starting a multiply */ 1, /* cost of multiply per each bit set */ - 40, /* cost of a divide/mod */ + {40, 40, 40, 40, 40}, /* cost of a divide/mod */ 3, /* cost of movsx */ 2, /* cost of movzx */ 15, /* "large" insn */ @@ -171,6 +175,7 @@ struct processor_costs i486_cost = { /* 486 specific costs */ 3, /* MMX or SSE register to integer */ 0, /* size of prefetch block */ 0, /* number of parallel prefetches */ + 1, /* Branch cost */ 8, /* cost of FADD and FSUB insns. */ 16, /* cost of FMUL instruction. */ 73, /* cost of FDIV instruction. */ @@ -185,9 +190,9 @@ struct processor_costs pentium_cost = { 1, /* cost of a lea instruction */ 4, /* variable shift costs */ 1, /* constant shift costs */ - 11, /* cost of starting a multiply */ + {11, 11, 11, 11, 11}, /* cost of starting a multiply */ 0, /* cost of multiply per each bit set */ - 25, /* cost of a divide/mod */ + {25, 25, 25, 25, 25}, /* cost of a divide/mod */ 3, /* cost of movsx */ 2, /* cost of movzx */ 8, /* "large" insn */ @@ -214,6 +219,7 @@ struct processor_costs pentium_cost = { 3, /* MMX or SSE register to integer */ 0, /* size of prefetch block */ 0, /* number of parallel prefetches */ + 2, /* Branch cost */ 3, /* cost of FADD and FSUB insns. */ 3, /* cost of FMUL instruction. */ 39, /* cost of FDIV instruction. */ @@ -228,9 +234,9 @@ struct processor_costs pentiumpro_cost = { 1, /* cost of a lea instruction */ 1, /* variable shift costs */ 1, /* constant shift costs */ - 4, /* cost of starting a multiply */ + {4, 4, 4, 4, 4}, /* cost of starting a multiply */ 0, /* cost of multiply per each bit set */ - 17, /* cost of a divide/mod */ + {17, 17, 17, 17, 17}, /* cost of a divide/mod */ 1, /* cost of movsx */ 1, /* cost of movzx */ 8, /* "large" insn */ @@ -257,6 +263,7 @@ struct processor_costs pentiumpro_cost = { 3, /* MMX or SSE register to integer */ 32, /* size of prefetch block */ 6, /* number of parallel prefetches */ + 2, /* Branch cost */ 3, /* cost of FADD and FSUB insns. */ 5, /* cost of FMUL instruction. */ 56, /* cost of FDIV instruction. */ @@ -271,9 +278,9 @@ struct processor_costs k6_cost = { 2, /* cost of a lea instruction */ 1, /* variable shift costs */ 1, /* constant shift costs */ - 3, /* cost of starting a multiply */ + {3, 3, 3, 3, 3}, /* cost of starting a multiply */ 0, /* cost of multiply per each bit set */ - 18, /* cost of a divide/mod */ + {18, 18, 18, 18, 18}, /* cost of a divide/mod */ 2, /* cost of movsx */ 2, /* cost of movzx */ 8, /* "large" insn */ @@ -300,6 +307,7 @@ struct processor_costs k6_cost = { 6, /* MMX or SSE register to integer */ 32, /* size of prefetch block */ 1, /* number of parallel prefetches */ + 1, /* Branch cost */ 2, /* cost of FADD and FSUB insns. */ 2, /* cost of FMUL instruction. */ 56, /* cost of FDIV instruction. */ @@ -314,9 +322,9 @@ struct processor_costs athlon_cost = { 2, /* cost of a lea instruction */ 1, /* variable shift costs */ 1, /* constant shift costs */ - 5, /* cost of starting a multiply */ + {5, 5, 5, 5, 5}, /* cost of starting a multiply */ 0, /* cost of multiply per each bit set */ - 42, /* cost of a divide/mod */ + {18, 26, 42, 74, 74}, /* cost of a divide/mod */ 1, /* cost of movsx */ 1, /* cost of movzx */ 8, /* "large" insn */ @@ -343,6 +351,7 @@ struct processor_costs athlon_cost = { 5, /* MMX or SSE register to integer */ 64, /* size of prefetch block */ 6, /* number of parallel prefetches */ + 2, /* Branch cost */ 4, /* cost of FADD and FSUB insns. */ 4, /* cost of FMUL instruction. */ 24, /* cost of FDIV instruction. */ @@ -352,14 +361,58 @@ struct processor_costs athlon_cost = { }; static const +struct processor_costs k8_cost = { + 1, /* cost of an add instruction */ + 2, /* cost of a lea instruction */ + 1, /* variable shift costs */ + 1, /* constant shift costs */ + {3, 4, 3, 4, 5}, /* cost of starting a multiply */ + 0, /* cost of multiply per each bit set */ + {18, 26, 42, 74, 74}, /* cost of a divide/mod */ + 1, /* cost of movsx */ + 1, /* cost of movzx */ + 8, /* "large" insn */ + 9, /* MOVE_RATIO */ + 4, /* cost for loading QImode using movzbl */ + {3, 4, 3}, /* cost of loading integer registers + in QImode, HImode and SImode. + Relative to reg-reg move (2). */ + {3, 4, 3}, /* cost of storing integer registers */ + 4, /* cost of reg,reg fld/fst */ + {4, 4, 12}, /* cost of loading fp registers + in SFmode, DFmode and XFmode */ + {6, 6, 8}, /* cost of loading integer registers */ + 2, /* cost of moving MMX register */ + {3, 3}, /* cost of loading MMX registers + in SImode and DImode */ + {4, 4}, /* cost of storing MMX registers + in SImode and DImode */ + 2, /* cost of moving SSE register */ + {4, 3, 6}, /* cost of loading SSE registers + in SImode, DImode and TImode */ + {4, 4, 5}, /* cost of storing SSE registers + in SImode, DImode and TImode */ + 5, /* MMX or SSE register to integer */ + 64, /* size of prefetch block */ + 6, /* number of parallel prefetches */ + 2, /* Branch cost */ + 4, /* cost of FADD and FSUB insns. */ + 4, /* cost of FMUL instruction. */ + 19, /* cost of FDIV instruction. */ + 2, /* cost of FABS instruction. */ + 2, /* cost of FCHS instruction. */ + 35, /* cost of FSQRT instruction. */ +}; + +static const struct processor_costs pentium4_cost = { 1, /* cost of an add instruction */ 1, /* cost of a lea instruction */ - 8, /* variable shift costs */ - 8, /* constant shift costs */ - 30, /* cost of starting a multiply */ + 4, /* variable shift costs */ + 4, /* constant shift costs */ + {15, 15, 15, 15, 15}, /* cost of starting a multiply */ 0, /* cost of multiply per each bit set */ - 112, /* cost of a divide/mod */ + {56, 56, 56, 56, 56}, /* cost of a divide/mod */ 1, /* cost of movsx */ 1, /* cost of movzx */ 16, /* "large" insn */ @@ -386,6 +439,7 @@ struct processor_costs pentium4_cost = { 10, /* MMX or SSE register to integer */ 64, /* size of prefetch block */ 6, /* number of parallel prefetches */ + 2, /* Branch cost */ 5, /* cost of FADD and FSUB insns. */ 7, /* cost of FMUL instruction. */ 43, /* cost of FDIV instruction. */ @@ -404,52 +458,66 @@ const struct processor_costs *ix86_cost = &pentium_cost; #define m_K6 (1<<PROCESSOR_K6) #define m_ATHLON (1<<PROCESSOR_ATHLON) #define m_PENT4 (1<<PROCESSOR_PENTIUM4) +#define m_K8 (1<<PROCESSOR_K8) +#define m_ATHLON_K8 (m_K8 | m_ATHLON) -const int x86_use_leave = m_386 | m_K6 | m_ATHLON; -const int x86_push_memory = m_386 | m_K6 | m_ATHLON | m_PENT4; +const int x86_use_leave = m_386 | m_K6 | m_ATHLON_K8; +const int x86_push_memory = m_386 | m_K6 | m_ATHLON_K8 | m_PENT4; const int x86_zero_extend_with_and = m_486 | m_PENT; -const int x86_movx = m_ATHLON | m_PPRO | m_PENT4 /* m_386 | m_K6 */; +const int x86_movx = m_ATHLON_K8 | m_PPRO | m_PENT4 /* m_386 | m_K6 */; const int x86_double_with_add = ~m_386; const int x86_use_bit_test = m_386; -const int x86_unroll_strlen = m_486 | m_PENT | m_PPRO | m_ATHLON | m_K6; -const int x86_cmove = m_PPRO | m_ATHLON | m_PENT4; -const int x86_3dnow_a = m_ATHLON; -const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON | m_PENT4; +const int x86_unroll_strlen = m_486 | m_PENT | m_PPRO | m_ATHLON_K8 | m_K6; +const int x86_cmove = m_PPRO | m_ATHLON_K8 | m_PENT4; +const int x86_3dnow_a = m_ATHLON_K8; +const int x86_deep_branch = m_PPRO | m_K6 | m_ATHLON_K8 | m_PENT4; const int x86_branch_hints = m_PENT4; const int x86_use_sahf = m_PPRO | m_K6 | m_PENT4; const int x86_partial_reg_stall = m_PPRO; const int x86_use_loop = m_K6; -const int x86_use_fiop = ~(m_PPRO | m_ATHLON | m_PENT); +const int x86_use_fiop = ~(m_PPRO | m_ATHLON_K8 | m_PENT); const int x86_use_mov0 = m_K6; const int x86_use_cltd = ~(m_PENT | m_K6); const int x86_read_modify_write = ~m_PENT; const int x86_read_modify = ~(m_PENT | m_PPRO); const int x86_split_long_moves = m_PPRO; -const int x86_promote_QImode = m_K6 | m_PENT | m_386 | m_486 | m_ATHLON; +const int x86_promote_QImode = m_K6 | m_PENT | m_386 | m_486 | m_ATHLON_K8; const int x86_fast_prefix = ~(m_PENT | m_486 | m_386); const int x86_single_stringop = m_386 | m_PENT4; const int x86_qimode_math = ~(0); const int x86_promote_qi_regs = 0; const int x86_himode_math = ~(m_PPRO); const int x86_promote_hi_regs = m_PPRO; -const int x86_sub_esp_4 = m_ATHLON | m_PPRO | m_PENT4; -const int x86_sub_esp_8 = m_ATHLON | m_PPRO | m_386 | m_486 | m_PENT4; -const int x86_add_esp_4 = m_ATHLON | m_K6 | m_PENT4; -const int x86_add_esp_8 = m_ATHLON | m_PPRO | m_K6 | m_386 | m_486 | m_PENT4; -const int x86_integer_DFmode_moves = ~(m_ATHLON | m_PENT4 | m_PPRO); -const int x86_partial_reg_dependency = m_ATHLON | m_PENT4; -const int x86_memory_mismatch_stall = m_ATHLON | m_PENT4; -const int x86_accumulate_outgoing_args = m_ATHLON | m_PENT4 | m_PPRO; -const int x86_prologue_using_move = m_ATHLON | m_PENT4 | m_PPRO; -const int x86_epilogue_using_move = m_ATHLON | m_PENT4 | m_PPRO; +const int x86_sub_esp_4 = m_ATHLON_K8 | m_PPRO | m_PENT4; +const int x86_sub_esp_8 = m_ATHLON_K8 | m_PPRO | m_386 | m_486 | m_PENT4; +const int x86_add_esp_4 = m_ATHLON_K8 | m_K6 | m_PENT4; +const int x86_add_esp_8 = m_ATHLON_K8 | m_PPRO | m_K6 | m_386 | m_486 | m_PENT4; +const int x86_integer_DFmode_moves = ~(m_ATHLON_K8 | m_PENT4 | m_PPRO); +const int x86_partial_reg_dependency = m_ATHLON_K8 | m_PENT4; +const int x86_memory_mismatch_stall = m_ATHLON_K8 | m_PENT4; +const int x86_accumulate_outgoing_args = m_ATHLON_K8 | m_PENT4 | m_PPRO; +const int x86_prologue_using_move = m_ATHLON_K8 | m_PENT4 | m_PPRO; +const int x86_epilogue_using_move = m_ATHLON_K8 | m_PENT4 | m_PPRO; const int x86_decompose_lea = m_PENT4; const int x86_shift1 = ~m_486; -const int x86_arch_always_fancy_math_387 = m_PENT | m_PPRO | m_ATHLON | m_PENT4; +const int x86_arch_always_fancy_math_387 = m_PENT | m_PPRO | m_ATHLON_K8 | m_PENT4; +const int x86_sse_partial_reg_dependency = m_PENT4 | m_PPRO; +/* Set for machines where the type and dependencies are resolved on SSE register + parts insetad of whole registers, so we may maintain just lower part of + scalar values in proper format leaving the upper part undefined. */ +const int x86_sse_partial_regs = m_ATHLON_K8; +/* Athlon optimizes partial-register FPS special case, thus avoiding the + need for extra instructions beforehand */ +const int x86_sse_partial_regs_for_cvtsd2ss = 0; +const int x86_sse_typeless_stores = m_ATHLON_K8; +const int x86_sse_load0_by_pxor = m_PPRO | m_PENT4; +const int x86_use_ffreep = m_ATHLON_K8; +const int x86_rep_movl_optimal = m_386 | m_PENT | m_PPRO | m_K6; /* In case the avreage insn count for single function invocation is lower than this constant, emit fast (but longer) prologue and epilogue code. */ -#define FAST_PROLOGUE_INSN_COUNT 30 +#define FAST_PROLOGUE_INSN_COUNT 20 /* Set by prologue expander and used by epilogue expander to determine the style used. */ @@ -755,6 +823,7 @@ static void x86_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); static bool x86_can_output_mi_thunk PARAMS ((tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); +bool ix86_expand_carry_flag_compare PARAMS ((enum rtx_code, rtx, rtx, rtx*)); struct ix86_address { @@ -796,9 +865,12 @@ static void ix86_compute_frame_layout PARAMS ((struct ix86_frame *)); static int ix86_comp_type_attributes PARAMS ((tree, tree)); static int ix86_fntype_regparm PARAMS ((tree)); const struct attribute_spec ix86_attribute_table[]; +static bool ix86_function_ok_for_sibcall PARAMS ((tree, tree)); static tree ix86_handle_cdecl_attribute PARAMS ((tree *, tree, tree, int, bool *)); static tree ix86_handle_regparm_attribute PARAMS ((tree *, tree, tree, int, bool *)); static int ix86_value_regno PARAMS ((enum machine_mode)); +static bool ix86_ms_bitfield_layout_p PARAMS ((tree)); +static int extended_reg_mentioned_1 PARAMS ((rtx *, void *)); #if defined (DO_GLOBAL_CTORS_BODY) && defined (HAS_INIT_SECTION) static void ix86_svr3_asm_out_constructor PARAMS ((rtx, int)); @@ -897,6 +969,9 @@ static enum x86_64_reg_class merge_classes PARAMS ((enum x86_64_reg_class, #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \ ia32_multipass_dfa_lookahead +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL ix86_function_ok_for_sibcall + #ifdef HAVE_AS_TLS #undef TARGET_HAVE_TLS #define TARGET_HAVE_TLS true @@ -904,6 +979,9 @@ static enum x86_64_reg_class merge_classes PARAMS ((enum x86_64_reg_class, #undef TARGET_CANNOT_FORCE_CONST_MEM #define TARGET_CANNOT_FORCE_CONST_MEM ix86_cannot_force_const_mem +#undef TARGET_MS_BITFIELD_LAYOUT_P +#define TARGET_MS_BITFIELD_LAYOUT_P ix86_ms_bitfield_layout_p + #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK x86_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK @@ -937,17 +1015,17 @@ override_options () const int align_jump; const int align_jump_max_skip; const int align_func; - const int branch_cost; } const processor_target_table[PROCESSOR_max] = { - {&i386_cost, 0, 0, 4, 3, 4, 3, 4, 1}, - {&i486_cost, 0, 0, 16, 15, 16, 15, 16, 1}, - {&pentium_cost, 0, 0, 16, 7, 16, 7, 16, 1}, - {&pentiumpro_cost, 0, 0, 16, 15, 16, 7, 16, 1}, - {&k6_cost, 0, 0, 32, 7, 32, 7, 32, 1}, - {&athlon_cost, 0, 0, 16, 7, 64, 7, 16, 1}, - {&pentium4_cost, 0, 0, 0, 0, 0, 0, 0, 1} + {&i386_cost, 0, 0, 4, 3, 4, 3, 4}, + {&i486_cost, 0, 0, 16, 15, 16, 15, 16}, + {&pentium_cost, 0, 0, 16, 7, 16, 7, 16}, + {&pentiumpro_cost, 0, 0, 16, 15, 16, 7, 16}, + {&k6_cost, 0, 0, 32, 7, 32, 7, 32}, + {&athlon_cost, 0, 0, 16, 7, 16, 7, 16}, + {&pentium4_cost, 0, 0, 0, 0, 0, 0, 0}, + {&k8_cost, 0, 0, 16, 7, 16, 7, 16} }; static const char * const cpu_names[] = TARGET_CPU_DEFAULT_NAMES; @@ -962,7 +1040,8 @@ override_options () PTA_MMX = 4, PTA_PREFETCH_SSE = 8, PTA_3DNOW = 16, - PTA_3DNOW_A = 64 + PTA_3DNOW_A = 64, + PTA_64BIT = 128 } flags; } const processor_alias_table[] = @@ -994,6 +1073,8 @@ override_options () | PTA_3DNOW_A | PTA_SSE}, {"athlon-mp", PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_3DNOW_A | PTA_SSE}, + {"k8", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT + | PTA_3DNOW_A | PTA_SSE | PTA_SSE2}, }; int const pta_size = ARRAY_SIZE (processor_alias_table); @@ -1033,7 +1114,7 @@ override_options () if (!ix86_cpu_string) ix86_cpu_string = cpu_names [TARGET_CPU_DEFAULT]; if (!ix86_arch_string) - ix86_arch_string = TARGET_64BIT ? "athlon-4" : "i386"; + ix86_arch_string = TARGET_64BIT ? "k8" : "i386"; if (ix86_cmodel_string != 0) { @@ -1099,6 +1180,8 @@ override_options () target_flags |= MASK_SSE2; if (processor_alias_table[i].flags & PTA_PREFETCH_SSE) x86_prefetch_sse = true; + if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT)) + error ("CPU you selected does not support x86-64 instruction set"); break; } @@ -1109,6 +1192,8 @@ override_options () if (! strcmp (ix86_cpu_string, processor_alias_table[i].name)) { ix86_cpu = processor_alias_table[i].processor; + if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT)) + error ("CPU you selected does not support x86-64 instruction set"); break; } if (processor_alias_table[i].flags & PTA_PREFETCH_SSE) @@ -1215,7 +1300,7 @@ override_options () } /* Validate -mbranch-cost= value, or provide default. */ - ix86_branch_cost = processor_target_table[ix86_cpu].branch_cost; + ix86_branch_cost = processor_target_table[ix86_cpu].cost->branch_cost; if (ix86_branch_cost_string) { i = atoi (ix86_branch_cost_string); @@ -1371,6 +1456,60 @@ const struct attribute_spec ix86_attribute_table[] = { NULL, 0, 0, false, false, false, NULL } }; +/* If PIC, we cannot make sibling calls to global functions + because the PLT requires %ebx live. + If we are returning floats on the register stack, we cannot make + sibling calls to functions that return floats. (The stack adjust + instruction will wind up after the sibcall jump, and not be executed.) */ + +static bool +ix86_function_ok_for_sibcall (decl, exp) + tree decl; + tree exp; +{ + /* If we are generating position-independent code, we cannot sibcall + optimize any indirect call, or a direct call to a global function, + as the PLT requires %ebx be live. */ + if (!TARGET_64BIT && flag_pic && (!decl || TREE_PUBLIC (decl))) + return false; + + /* If we are returning floats on the 80387 register stack, we cannot + make a sibcall from a function that doesn't return a float to a + function that does; the necessary stack adjustment will not be + executed. */ + if (STACK_REG_P (ix86_function_value (TREE_TYPE (exp))) + && ! STACK_REG_P (ix86_function_value (TREE_TYPE (DECL_RESULT (cfun->decl))))) + return false; + + /* If this call is indirect, we'll need to be able to use a call-clobbered + register for the address of the target function. Make sure that all + such registers are not used for passing parameters. */ + if (!decl && !TARGET_64BIT) + { + int regparm = ix86_regparm; + tree attr, type; + + /* We're looking at the CALL_EXPR, we need the type of the function. */ + type = TREE_OPERAND (exp, 0); /* pointer expression */ + type = TREE_TYPE (type); /* pointer type */ + type = TREE_TYPE (type); /* function type */ + + attr = lookup_attribute ("regparm", TYPE_ATTRIBUTES (type)); + if (attr) + regparm = TREE_INT_CST_LOW (TREE_VALUE (TREE_VALUE (attr))); + + if (regparm >= 3) + { + /* ??? Need to count the actual number of registers to be used, + not the possible number of registers. Fix later. */ + return false; + } + } + + /* Otherwise okay. That also includes certain types of indirect calls. */ + return true; +} + /* Handle a "cdecl" or "stdcall" attribute; arguments as in struct attribute_spec.handler. */ static tree @@ -3209,6 +3348,32 @@ call_insn_operand (op, mode) return general_operand (op, Pmode); } +/* Test for a valid operand for a call instruction. Don't allow the + arg pointer register or virtual regs since they may decay into + reg + const, which the patterns can't handle. */ + +int +sibcall_insn_operand (op, mode) + rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + /* Disallow indirect through a virtual register. This leads to + compiler aborts when trying to eliminate them. */ + if (GET_CODE (op) == REG + && (op == arg_pointer_rtx + || op == frame_pointer_rtx + || (REGNO (op) >= FIRST_PSEUDO_REGISTER + && REGNO (op) <= LAST_VIRTUAL_REGISTER))) + return 0; + + /* Explicitly allow SYMBOL_REF even if pic. */ + if (GET_CODE (op) == SYMBOL_REF) + return 1; + + /* Otherwise we can only allow register operands. */ + return register_operand (op, Pmode); +} + int constant_call_address_operand (op, mode) rtx op; @@ -3387,6 +3552,18 @@ q_regs_operand (op, mode) return ANY_QI_REG_P (op); } +/* Return true if op is an flags register. */ + +int +flags_reg_operand (op, mode) + register rtx op; + enum machine_mode mode; +{ + if (mode != VOIDmode && GET_MODE (op) != mode) + return 0; + return REG_P (op) && REGNO (op) == FLAGS_REG && GET_MODE (op) != VOIDmode; +} + /* Return true if op is a NON_Q_REGS class register. */ int @@ -3401,6 +3578,31 @@ non_q_regs_operand (op, mode) return NON_QI_REG_P (op); } +int +zero_extended_scalar_load_operand (op, mode) + rtx op; + enum machine_mode mode ATTRIBUTE_UNUSED; +{ + unsigned n_elts; + if (GET_CODE (op) != MEM) + return 0; + op = maybe_get_pool_constant (op); + if (!op) + return 0; + if (GET_CODE (op) != CONST_VECTOR) + return 0; + n_elts = + (GET_MODE_SIZE (GET_MODE (op)) / + GET_MODE_SIZE (GET_MODE_INNER (GET_MODE (op)))); + for (n_elts--; n_elts > 0; n_elts--) + { + rtx elt = CONST_VECTOR_ELT (op, n_elts); + if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op)))) + return 0; + } + return 1; +} + /* Return 1 if OP is a comparison that can be used in the CMPSS/CMPPS insns. */ int @@ -4160,7 +4362,7 @@ output_set_got (dest) is what will be referred to by the Mach-O PIC subsystem. */ ASM_OUTPUT_LABEL (asm_out_file, machopic_function_base_name ()); #endif - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (XEXP (xops[2], 0))); if (flag_pic) @@ -4456,14 +4658,32 @@ ix86_expand_prologue () int use_mov = 0; HOST_WIDE_INT allocate; + ix86_compute_frame_layout (&frame); if (!optimize_size) { - use_fast_prologue_epilogue - = !expensive_function_p (FAST_PROLOGUE_INSN_COUNT); + int count = frame.nregs; + + /* The fast prologue uses move instead of push to save registers. This + is significantly longer, but also executes faster as modern hardware + can execute the moves in parallel, but can't do that for push/pop. + + Be curefull about choosing what prologue to emit: When function takes + many instructions to execute we may use slow version as well as in + case function is known to be outside hot spot (this is known with + feedback only). Weight the size of function by number of registers + to save as it is cheap to use one or two push instructions but very + slow to use many of them. */ + if (count) + count = (count - 1) * FAST_PROLOGUE_INSN_COUNT; + if (cfun->function_frequency < FUNCTION_FREQUENCY_NORMAL + || (flag_branch_probabilities + && cfun->function_frequency < FUNCTION_FREQUENCY_HOT)) + use_fast_prologue_epilogue = 0; + else + use_fast_prologue_epilogue = !expensive_function_p (count); if (TARGET_PROLOGUE_USING_MOVE) use_mov = use_fast_prologue_epilogue; } - ix86_compute_frame_layout (&frame); /* Note: AT&T enter does NOT have reversed args. Enter is probably slower on all targets. Also sdb doesn't like it. */ @@ -8960,6 +9180,84 @@ ix86_expand_setcc (code, dest) return 1; /* DONE */ } +/* Expand comparison setting or clearing carry flag. Return true when sucesfull + and set pop for the operation. */ +bool +ix86_expand_carry_flag_compare (code, op0, op1, pop) + rtx op0, op1, *pop; + enum rtx_code code; +{ + enum machine_mode mode = + GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1); + + /* Do not handle DImode compares that go trought special path. Also we can't + deal with FP compares yet. This is possible to add. */ + if ((mode == DImode && !TARGET_64BIT) || !INTEGRAL_MODE_P (mode)) + return false; + switch (code) + { + case LTU: + case GEU: + break; + + /* Convert a==0 into (unsigned)a<1. */ + case EQ: + case NE: + if (op1 != const0_rtx) + return false; + op1 = const1_rtx; + code = (code == EQ ? LTU : GEU); + break; + + /* Convert a>b into b<a or a>=b-1. */ + case GTU: + case LEU: + if (GET_CODE (op1) == CONST_INT) + { + op1 = gen_int_mode (INTVAL (op1) + 1, GET_MODE (op0)); + /* Bail out on overflow. We still can swap operands but that + would force loading of the constant into register. */ + if (op1 == const0_rtx + || !x86_64_immediate_operand (op1, GET_MODE (op1))) + return false; + code = (code == GTU ? GEU : LTU); + } + else + { + rtx tmp = op1; + op1 = op0; + op0 = tmp; + code = (code == GTU ? LTU : GEU); + } + break; + + /* Convert a>0 into (unsigned)a<0x7fffffff. */ + case LT: + case GE: + if (mode == DImode || op1 != const0_rtx) + return false; + op1 = gen_int_mode (~(1 << (GET_MODE_BITSIZE (mode) - 1)), mode); + code = (code == LT ? GEU : LTU); + break; + case LE: + case GT: + if (mode == DImode || op1 != constm1_rtx) + return false; + op1 = gen_int_mode (~(1 << (GET_MODE_BITSIZE (mode) - 1)), mode); + code = (code == LE ? GEU : LTU); + break; + + default: + return false; + } + ix86_compare_op0 = op0; + ix86_compare_op1 = op1; + *pop = ix86_expand_compare (code, NULL, NULL); + if (GET_CODE (*pop) != LTU && GET_CODE (*pop) != GEU) + abort (); + return true; +} + int ix86_expand_int_movcc (operands) rtx operands[]; @@ -8968,30 +9266,7 @@ ix86_expand_int_movcc (operands) rtx compare_seq, compare_op; rtx second_test, bypass_test; enum machine_mode mode = GET_MODE (operands[0]); - - /* When the compare code is not LTU or GEU, we can not use sbbl case. - In case comparsion is done with immediate, we can convert it to LTU or - GEU by altering the integer. */ - - if ((code == LEU || code == GTU) - && GET_CODE (ix86_compare_op1) == CONST_INT - && mode != HImode - && INTVAL (ix86_compare_op1) != -1 - /* For x86-64, the immediate field in the instruction is 32-bit - signed, so we can't increment a DImode value above 0x7fffffff. */ - && (!TARGET_64BIT - || GET_MODE (ix86_compare_op0) != DImode - || INTVAL (ix86_compare_op1) != 0x7fffffff) - && GET_CODE (operands[2]) == CONST_INT - && GET_CODE (operands[3]) == CONST_INT) - { - if (code == LEU) - code = LTU; - else - code = GEU; - ix86_compare_op1 = gen_int_mode (INTVAL (ix86_compare_op1) + 1, - GET_MODE (ix86_compare_op0)); - } + bool sign_bit_compare_p = false;; start_sequence (); compare_op = ix86_expand_compare (code, &second_test, &bypass_test); @@ -9000,10 +9275,14 @@ ix86_expand_int_movcc (operands) compare_code = GET_CODE (compare_op); + if ((ix86_compare_op1 == const0_rtx && (code == GE || code == LT)) + || (ix86_compare_op1 == constm1_rtx && (code == GT || code == LE))) + sign_bit_compare_p = true; + /* Don't attempt mode expansion here -- if we had to expand 5 or 6 HImode insns, we'd be swallowed in word prefix ops. */ - if (mode != HImode + if ((mode != HImode || TARGET_FAST_PREFIX) && (mode != DImode || TARGET_64BIT) && GET_CODE (operands[2]) == CONST_INT && GET_CODE (operands[3]) == CONST_INT) @@ -9013,32 +9292,53 @@ ix86_expand_int_movcc (operands) HOST_WIDE_INT cf = INTVAL (operands[3]); HOST_WIDE_INT diff; - if ((compare_code == LTU || compare_code == GEU) - && !second_test && !bypass_test) + diff = ct - cf; + /* Sign bit compares are better done using shifts than we do by using + sbb. */ + if (sign_bit_compare_p + || ix86_expand_carry_flag_compare (code, ix86_compare_op0, + ix86_compare_op1, &compare_op)) { /* Detect overlap between destination and compare sources. */ rtx tmp = out; - /* To simplify rest of code, restrict to the GEU case. */ - if (compare_code == LTU) + if (!sign_bit_compare_p) { - HOST_WIDE_INT tmp = ct; - ct = cf; - cf = tmp; - compare_code = reverse_condition (compare_code); - code = reverse_condition (code); - } - diff = ct - cf; + compare_code = GET_CODE (compare_op); + + /* To simplify rest of code, restrict to the GEU case. */ + if (compare_code == LTU) + { + HOST_WIDE_INT tmp = ct; + ct = cf; + cf = tmp; + compare_code = reverse_condition (compare_code); + code = reverse_condition (code); + } + diff = ct - cf; - if (reg_overlap_mentioned_p (out, ix86_compare_op0) - || reg_overlap_mentioned_p (out, ix86_compare_op1)) - tmp = gen_reg_rtx (mode); + if (reg_overlap_mentioned_p (out, ix86_compare_op0) + || reg_overlap_mentioned_p (out, ix86_compare_op1)) + tmp = gen_reg_rtx (mode); - emit_insn (compare_seq); - if (mode == DImode) - emit_insn (gen_x86_movdicc_0_m1_rex64 (tmp)); + if (mode == DImode) + emit_insn (gen_x86_movdicc_0_m1_rex64 (tmp)); + else + emit_insn (gen_x86_movsicc_0_m1 (gen_lowpart (SImode, tmp))); + } else - emit_insn (gen_x86_movsicc_0_m1 (tmp)); + { + if (code == GT || code == GE) + code = reverse_condition (code); + else + { + HOST_WIDE_INT tmp = ct; + ct = cf; + cf = tmp; + } + tmp = emit_store_flag (tmp, code, ix86_compare_op0, + ix86_compare_op1, VOIDmode, 0, -1); + } if (diff == 1) { @@ -9052,7 +9352,7 @@ ix86_expand_int_movcc (operands) if (ct) tmp = expand_simple_binop (mode, PLUS, tmp, GEN_INT (ct), - tmp, 1, OPTAB_DIRECT); + copy_rtx (tmp), 1, OPTAB_DIRECT); } else if (cf == -1) { @@ -9065,7 +9365,7 @@ ix86_expand_int_movcc (operands) */ tmp = expand_simple_binop (mode, IOR, tmp, GEN_INT (ct), - tmp, 1, OPTAB_DIRECT); + copy_rtx (tmp), 1, OPTAB_DIRECT); } else if (diff == -1 && ct) { @@ -9077,11 +9377,11 @@ ix86_expand_int_movcc (operands) * * Size 8 - 11. */ - tmp = expand_simple_unop (mode, NOT, tmp, tmp, 1); + tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1); if (cf) tmp = expand_simple_binop (mode, PLUS, - tmp, GEN_INT (cf), - tmp, 1, OPTAB_DIRECT); + copy_rtx (tmp), GEN_INT (cf), + copy_rtx (tmp), 1, OPTAB_DIRECT); } else { @@ -9099,26 +9399,25 @@ ix86_expand_int_movcc (operands) { cf = ct; ct = 0; - tmp = expand_simple_unop (mode, NOT, tmp, tmp, 1); + tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1); } tmp = expand_simple_binop (mode, AND, - tmp, + copy_rtx (tmp), gen_int_mode (cf - ct, mode), - tmp, 1, OPTAB_DIRECT); + copy_rtx (tmp), 1, OPTAB_DIRECT); if (ct) tmp = expand_simple_binop (mode, PLUS, - tmp, GEN_INT (ct), - tmp, 1, OPTAB_DIRECT); + copy_rtx (tmp), GEN_INT (ct), + copy_rtx (tmp), 1, OPTAB_DIRECT); } - if (tmp != out) - emit_move_insn (out, tmp); + if (!rtx_equal_p (tmp, out)) + emit_move_insn (copy_rtx (out), copy_rtx (tmp)); return 1; /* DONE */ } - diff = ct - cf; if (diff < 0) { HOST_WIDE_INT tmp; @@ -9194,8 +9493,10 @@ ix86_expand_int_movcc (operands) } } + if ((diff == 1 || diff == 2 || diff == 4 || diff == 8 || diff == 3 || diff == 5 || diff == 9) + && ((mode != QImode && mode != HImode) || !TARGET_PARTIAL_REG_STALL) && (mode != DImode || x86_64_sign_extended_value (GEN_INT (cf)))) { /* @@ -9237,15 +9538,14 @@ ix86_expand_int_movcc (operands) tmp = gen_rtx_PLUS (mode, tmp, GEN_INT (cf)); nops++; } - if (tmp != out - && (GET_CODE (tmp) != SUBREG || SUBREG_REG (tmp) != out)) + if (!rtx_equal_p (tmp, out)) { if (nops == 1) out = force_operand (tmp, out); else - emit_insn (gen_rtx_SET (VOIDmode, out, tmp)); + emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (out), copy_rtx (tmp))); } - if (out != operands[0]) + if (!rtx_equal_p (out, operands[0])) emit_move_insn (operands[0], copy_rtx (out)); return 1; /* DONE */ @@ -9265,12 +9565,10 @@ ix86_expand_int_movcc (operands) * This is reasonably steep, but branch mispredict costs are * high on modern cpus, so consider failing only if optimizing * for space. - * - * %%% Parameterize branch_cost on the tuning architecture, then - * use that. The 80386 couldn't care less about mispredicts. */ - if (!optimize_size && !TARGET_CMOVE) + if ((!TARGET_CMOVE || (mode == QImode && TARGET_PARTIAL_REG_STALL)) + && BRANCH_COST >= 2) { if (cf == 0) { @@ -9324,31 +9622,31 @@ ix86_expand_int_movcc (operands) out = emit_store_flag (out, code, ix86_compare_op0, ix86_compare_op1, VOIDmode, 0, 1); - out = expand_simple_binop (mode, PLUS, out, constm1_rtx, - out, 1, OPTAB_DIRECT); + out = expand_simple_binop (mode, PLUS, copy_rtx (out), constm1_rtx, + copy_rtx (out), 1, OPTAB_DIRECT); } - out = expand_simple_binop (mode, AND, out, + out = expand_simple_binop (mode, AND, copy_rtx (out), gen_int_mode (cf - ct, mode), - out, 1, OPTAB_DIRECT); + copy_rtx (out), 1, OPTAB_DIRECT); if (ct) - out = expand_simple_binop (mode, PLUS, out, GEN_INT (ct), - out, 1, OPTAB_DIRECT); - if (out != operands[0]) - emit_move_insn (operands[0], out); + out = expand_simple_binop (mode, PLUS, copy_rtx (out), GEN_INT (ct), + copy_rtx (out), 1, OPTAB_DIRECT); + if (!rtx_equal_p (out, operands[0])) + emit_move_insn (operands[0], copy_rtx (out)); return 1; /* DONE */ } } - if (!TARGET_CMOVE) + if (!TARGET_CMOVE || (mode == QImode && TARGET_PARTIAL_REG_STALL)) { /* Try a few things more with specific constants and a variable. */ optab op; rtx var, orig_out, out, tmp; - if (optimize_size) + if (BRANCH_COST <= 2) return 0; /* FAIL */ /* If one of the two operands is an interesting constant, load a @@ -9357,9 +9655,9 @@ ix86_expand_int_movcc (operands) if (GET_CODE (operands[2]) == CONST_INT) { var = operands[3]; - if (INTVAL (operands[2]) == 0) + if (INTVAL (operands[2]) == 0 && operands[3] != constm1_rtx) operands[3] = constm1_rtx, op = and_optab; - else if (INTVAL (operands[2]) == -1) + else if (INTVAL (operands[2]) == -1 && operands[3] != const0_rtx) operands[3] = const0_rtx, op = ior_optab; else return 0; /* FAIL */ @@ -9367,9 +9665,9 @@ ix86_expand_int_movcc (operands) else if (GET_CODE (operands[3]) == CONST_INT) { var = operands[2]; - if (INTVAL (operands[3]) == 0) + if (INTVAL (operands[3]) == 0 && operands[2] != constm1_rtx) operands[2] = constm1_rtx, op = and_optab; - else if (INTVAL (operands[3]) == -1) + else if (INTVAL (operands[3]) == -1 && operands[3] != const0_rtx) operands[2] = const0_rtx, op = ior_optab; else return 0; /* FAIL */ @@ -9388,8 +9686,8 @@ ix86_expand_int_movcc (operands) /* Mask in the interesting variable. */ out = expand_binop (mode, op, var, tmp, orig_out, 0, OPTAB_WIDEN); - if (out != orig_out) - emit_move_insn (orig_out, out); + if (!rtx_equal_p (out, orig_out)) + emit_move_insn (copy_rtx (orig_out), copy_rtx (out)); return 1; /* DONE */ } @@ -9422,27 +9720,33 @@ ix86_expand_int_movcc (operands) emit_move_insn (tmp, operands[2]); operands[2] = tmp; } + if (! register_operand (operands[2], VOIDmode) - && ! register_operand (operands[3], VOIDmode)) + && (mode == QImode + || ! register_operand (operands[3], VOIDmode))) operands[2] = force_reg (mode, operands[2]); + if (mode == QImode + && ! register_operand (operands[3], VOIDmode)) + operands[3] = force_reg (mode, operands[3]); + emit_insn (compare_seq); emit_insn (gen_rtx_SET (VOIDmode, operands[0], gen_rtx_IF_THEN_ELSE (mode, compare_op, operands[2], operands[3]))); if (bypass_test) - emit_insn (gen_rtx_SET (VOIDmode, operands[0], + emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (operands[0]), gen_rtx_IF_THEN_ELSE (mode, bypass_test, - operands[3], - operands[0]))); + copy_rtx (operands[3]), + copy_rtx (operands[0])))); if (second_test) - emit_insn (gen_rtx_SET (VOIDmode, operands[0], + emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (operands[0]), gen_rtx_IF_THEN_ELSE (mode, second_test, - operands[2], - operands[0]))); + copy_rtx (operands[2]), + copy_rtx (operands[0])))); return 1; /* DONE */ } @@ -9483,8 +9787,14 @@ ix86_expand_fp_movcc (operands) if (rtx_equal_p (operands[2], op0) && rtx_equal_p (operands[3], op1)) { /* Check for min operation. */ - if (code == LT) + if (code == LT || code == UNLE) { + if (code == UNLE) + { + rtx tmp = op0; + op0 = op1; + op1 = tmp; + } operands[0] = force_reg (GET_MODE (operands[0]), operands[0]); if (memory_operand (op0, VOIDmode)) op0 = force_reg (GET_MODE (operands[0]), op0); @@ -9495,8 +9805,14 @@ ix86_expand_fp_movcc (operands) return 1; } /* Check for max operation. */ - if (code == GT) + if (code == GT || code == UNGE) { + if (code == UNGE) + { + rtx tmp = op0; + op0 = op1; + op1 = tmp; + } operands[0] = force_reg (GET_MODE (operands[0]), operands[0]); if (memory_operand (op0, VOIDmode)) op0 = force_reg (GET_MODE (operands[0]), op0); @@ -10242,8 +10558,12 @@ ix86_expand_movstr (dst, src, count_exp, align_exp) /* In case we don't know anything about the alignment, default to library version, since it is usually equally fast and result in - shorter code. */ - if (!TARGET_INLINE_ALL_STRINGOPS && align < UNITS_PER_WORD) + shorter code. + + Also emit call when we know that the count is large and call overhead + will not be important. */ + if (!TARGET_INLINE_ALL_STRINGOPS + && (align < UNITS_PER_WORD || !TARGET_REP_MOVL_OPTIMAL)) { end_sequence (); return 0; @@ -10457,8 +10777,12 @@ ix86_expand_clrstr (src, count_exp, align_exp) /* In case we don't know anything about the alignment, default to library version, since it is usually equally fast and result in - shorter code. */ - if (!TARGET_INLINE_ALL_STRINGOPS && align < UNITS_PER_WORD) + shorter code. + + Also emit call when we know that the count is large and call overhead + will not be important. */ + if (!TARGET_INLINE_ALL_STRINGOPS + && (align < UNITS_PER_WORD || !TARGET_REP_MOVL_OPTIMAL)) return 0; if (TARGET_SINGLE_STRINGOP) @@ -10828,8 +11152,9 @@ ix86_expand_strlensi_unroll_1 (out, align_rtx) } void -ix86_expand_call (retval, fnaddr, callarg1, callarg2, pop) +ix86_expand_call (retval, fnaddr, callarg1, callarg2, pop, sibcall) rtx retval, fnaddr, callarg1, callarg2, pop; + int sibcall; { rtx use = NULL, call; @@ -10861,6 +11186,15 @@ ix86_expand_call (retval, fnaddr, callarg1, callarg2, pop) fnaddr = copy_to_mode_reg (Pmode, XEXP (fnaddr, 0)); fnaddr = gen_rtx_MEM (QImode, fnaddr); } + if (sibcall && TARGET_64BIT + && !constant_call_address_operand (XEXP (fnaddr, 0), Pmode)) + { + rtx addr; + addr = copy_to_mode_reg (Pmode, XEXP (fnaddr, 0)); + fnaddr = gen_rtx_REG (Pmode, 40); + emit_move_insn (fnaddr, addr); + fnaddr = gen_rtx_MEM (QImode, fnaddr); + } call = gen_rtx_CALL (VOIDmode, fnaddr, callarg1); if (retval) @@ -11060,6 +11394,7 @@ ix86_issue_rate () case PROCESSOR_PENTIUMPRO: case PROCESSOR_PENTIUM4: case PROCESSOR_ATHLON: + case PROCESSOR_K8: return 3; default: @@ -11271,16 +11606,10 @@ ix86_adjust_cost (insn, link, dep_insn, cost) break; case PROCESSOR_ATHLON: + case PROCESSOR_K8: memory = get_attr_memory (insn); dep_memory = get_attr_memory (dep_insn); - if (dep_memory == MEMORY_LOAD || dep_memory == MEMORY_BOTH) - { - if (dep_insn_type == TYPE_IMOV || dep_insn_type == TYPE_FMOV) - cost += 2; - else - cost += 3; - } /* Show ability of reorder buffer to hide latency of load by executing in parallel with previous instruction in case previous instruction is not needed to compute the address. */ @@ -11554,7 +11883,7 @@ ix86_variable_issue (dump, sched_verbose, insn, can_issue_more) static int ia32_use_dfa_pipeline_interface () { - if (ix86_cpu == PROCESSOR_PENTIUM) + if (TARGET_PENTIUM || TARGET_ATHLON_K8) return 1; return 0; } @@ -12764,7 +13093,8 @@ safe_vector_operand (x, mode) : gen_rtx_SUBREG (DImode, x, 0))); else emit_insn (gen_sse_clrv4sf (mode == V4SFmode ? x - : gen_rtx_SUBREG (V4SFmode, x, 0))); + : gen_rtx_SUBREG (V4SFmode, x, 0), + CONST0_RTX (V4SFmode))); return x; } @@ -13434,7 +13764,7 @@ ix86_expand_builtin (exp, target, subtarget, mode, ignore) case IX86_BUILTIN_SSE_ZERO: target = gen_reg_rtx (V4SFmode); - emit_insn (gen_sse_clrv4sf (target)); + emit_insn (gen_sse_clrv4sf (target, CONST0_RTX (V4SFmode))); return target; case IX86_BUILTIN_MMX_ZERO: @@ -14058,6 +14388,17 @@ x86_order_regs_for_local_alloc () reg_alloc_order [pos++] = 0; } +#ifndef TARGET_USE_MS_BITFIELD_LAYOUT +#define TARGET_USE_MS_BITFIELD_LAYOUT 0 +#endif + +static bool +ix86_ms_bitfield_layout_p (record_type) + tree record_type ATTRIBUTE_UNUSED; +{ + return TARGET_USE_MS_BITFIELD_LAYOUT; +} + /* Returns an expression indicating where the this parameter is located on entry to the FUNCTION. */ @@ -14317,7 +14658,7 @@ x86_machine_dependent_reorg (first) { edge e; - if (!TARGET_ATHLON || !optimize || optimize_size) + if (!TARGET_ATHLON_K8 || !optimize || optimize_size) return; for (e = EXIT_BLOCK_PTR->pred; e; e = e->pred_next) { @@ -14328,25 +14669,69 @@ x86_machine_dependent_reorg (first) if (!returnjump_p (ret) || !maybe_hot_bb_p (bb)) continue; - prev = prev_nonnote_insn (ret); + for (prev = PREV_INSN (ret); prev; prev = PREV_INSN (prev)) + if (active_insn_p (prev) || GET_CODE (prev) == CODE_LABEL) + break; if (prev && GET_CODE (prev) == CODE_LABEL) { edge e; for (e = bb->pred; e; e = e->pred_next) - if (EDGE_FREQUENCY (e) && e->src->index > 0 + if (EDGE_FREQUENCY (e) && e->src->index >= 0 && !(e->flags & EDGE_FALLTHRU)) insert = 1; } if (!insert) { - prev = prev_real_insn (ret); + prev = prev_active_insn (ret); if (prev && GET_CODE (prev) == JUMP_INSN && any_condjump_p (prev)) insert = 1; + /* Empty functions get branch misspredict even when the jump destination + is not visible to us. */ + if (!prev && cfun->function_frequency > FUNCTION_FREQUENCY_UNLIKELY_EXECUTED) + insert = 1; } if (insert) emit_insn_before (gen_nop (), ret); } } +/* Return nonzero when QImode register that must be represented via REX prefix + is used. */ +bool +x86_extended_QIreg_mentioned_p (insn) + rtx insn; +{ + int i; + extract_insn_cached (insn); + for (i = 0; i < recog_data.n_operands; i++) + if (REG_P (recog_data.operand[i]) + && REGNO (recog_data.operand[i]) >= 4) + return true; + return false; +} + +/* Return nonzero when P points to register encoded via REX prefix. + Called via for_each_rtx. */ +static int +extended_reg_mentioned_1 (p, data) + rtx *p; + void *data ATTRIBUTE_UNUSED; +{ + unsigned int regno; + if (!REG_P (*p)) + return 0; + regno = REGNO (*p); + return REX_INT_REGNO_P (regno) || REX_SSE_REGNO_P (regno); +} + +/* Return true when INSN mentions register that must be encoded using REX + prefix. */ +bool +x86_extended_reg_mentioned_p (insn) + rtx insn; +{ + return for_each_rtx (&PATTERN (insn), extended_reg_mentioned_1, NULL); +} + #include "gt-i386.h" diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 493a2b5bf9c..c1f40dc209c 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -41,9 +41,11 @@ struct processor_costs { const int lea; /* cost of a lea instruction */ const int shift_var; /* variable shift costs */ const int shift_const; /* constant shift costs */ - const int mult_init; /* cost of starting a multiply */ + const int mult_init[5]; /* cost of starting a multiply + in QImode, HImode, SImode, DImode, TImode*/ const int mult_bit; /* cost of multiply per each bit set */ - const int divide; /* cost of a divide/mod */ + const int divide[5]; /* cost of a divide/mod + in QImode, HImode, SImode, DImode, TImode*/ int movsx; /* The cost of movsx operation. */ int movzx; /* The cost of movzx operation. */ const int large_insn; /* insns larger than this cost more */ @@ -75,6 +77,7 @@ struct processor_costs { const int prefetch_block; /* bytes moved to cache for prefetch. */ const int simultaneous_prefetches; /* number of parallel prefetch operations. */ + const int branch_cost; /* Default value for BRANCH_COST. */ const int fadd; /* cost of FADD and FSUB instructions. */ const int fmul; /* cost of FMUL instruction. */ const int fdiv; /* cost of FDIV instruction. */ @@ -118,8 +121,9 @@ extern int target_flags; #define MASK_3DNOW_A 0x00020000 /* Support Athlon 3Dnow builtins */ #define MASK_128BIT_LONG_DOUBLE 0x00040000 /* long double size is 128bit */ #define MASK_64BIT 0x00080000 /* Produce 64bit code */ +#define MASK_MS_BITFIELD_LAYOUT 0x00100000 /* Use native (MS) bitfield layout */ -/* Unused: 0x03f0000 */ +/* Unused: 0x03e0000 */ /* ... overlap with subtarget options starts by 0x04000000. */ #define MASK_NO_RED_ZONE 0x04000000 /* Do not use red zone */ @@ -204,6 +208,8 @@ extern int target_flags; #define TARGET_K6 (ix86_cpu == PROCESSOR_K6) #define TARGET_ATHLON (ix86_cpu == PROCESSOR_ATHLON) #define TARGET_PENTIUM4 (ix86_cpu == PROCESSOR_PENTIUM4) +#define TARGET_K8 (ix86_cpu == PROCESSOR_K8) +#define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON) #define CPUMASK (1 << ix86_cpu) extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and; @@ -221,6 +227,9 @@ extern const int x86_partial_reg_dependency, x86_memory_mismatch_stall; extern const int x86_accumulate_outgoing_args, x86_prologue_using_move; extern const int x86_epilogue_using_move, x86_decompose_lea; extern const int x86_arch_always_fancy_math_387, x86_shift1; +extern const int x86_sse_partial_reg_dependency, x86_sse_partial_regs; +extern const int x86_sse_typeless_stores, x86_sse_load0_by_pxor; +extern const int x86_use_ffreep, x86_sse_partial_regs_for_cvtsd2ss; extern int x86_prefetch_sse; #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK) @@ -257,12 +266,22 @@ extern int x86_prefetch_sse; #define TARGET_SUB_ESP_8 (x86_sub_esp_8 & CPUMASK) #define TARGET_INTEGER_DFMODE_MOVES (x86_integer_DFmode_moves & CPUMASK) #define TARGET_PARTIAL_REG_DEPENDENCY (x86_partial_reg_dependency & CPUMASK) +#define TARGET_SSE_PARTIAL_REG_DEPENDENCY \ + (x86_sse_partial_reg_dependency & CPUMASK) +#define TARGET_SSE_PARTIAL_REGS (x86_sse_partial_regs & CPUMASK) +#define TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS \ + (x86_sse_partial_regs_for_cvtsd2ss & CPUMASK) +#define TARGET_SSE_TYPELESS_STORES (x86_sse_typeless_stores & CPUMASK) +#define TARGET_SSE_TYPELESS_LOAD0 (x86_sse_typeless_load0 & CPUMASK) +#define TARGET_SSE_LOAD0_BY_PXOR (x86_sse_load0_by_pxor & CPUMASK) #define TARGET_MEMORY_MISMATCH_STALL (x86_memory_mismatch_stall & CPUMASK) #define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & CPUMASK) #define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & CPUMASK) #define TARGET_DECOMPOSE_LEA (x86_decompose_lea & CPUMASK) #define TARGET_PREFETCH_SSE (x86_prefetch_sse) #define TARGET_SHIFT1 (x86_shift1 & CPUMASK) +#define TARGET_USE_FFREEP (x86_use_ffreep & CPUMASK) +#define TARGET_REP_MOVL_OPTIMAL (x86_rep_movl_optimal & CPUMASK) #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE) @@ -282,6 +301,8 @@ extern int x86_prefetch_sse; #define TARGET_RED_ZONE (!(target_flags & MASK_NO_RED_ZONE)) +#define TARGET_USE_MS_BITFIELD_LAYOUT (target_flags & MASK_MS_BITFIELD_LAYOUT) + #define TARGET_GNU_TLS (ix86_tls_dialect == TLS_DIALECT_GNU) #define TARGET_SUN_TLS (ix86_tls_dialect == TLS_DIALECT_SUN) @@ -374,6 +395,10 @@ extern int x86_prefetch_sse; N_("Generate 64bit x86-64 code") }, \ { "32", -MASK_64BIT, \ N_("Generate 32bit i386 code") }, \ + { "ms-bitfields", MASK_MS_BITFIELD_LAYOUT, \ + N_("Use native (MS) bitfield layout") }, \ + { "no-ms-bitfields", -MASK_MS_BITFIELD_LAYOUT, \ + N_("Use gcc default bitfield layout") }, \ { "red-zone", -MASK_NO_RED_ZONE, \ N_("Use red-zone in the x86-64 code") }, \ { "no-red-zone", MASK_NO_RED_ZONE, \ @@ -540,6 +565,8 @@ extern int x86_prefetch_sse; if (last_cpu_char != 'n') \ builtin_define ("__tune_athlon_sse__"); \ } \ + else if (TARGET_K8) \ + builtin_define ("__tune_k8__"); \ else if (TARGET_PENTIUM4) \ builtin_define ("__tune_pentium4__"); \ \ @@ -598,6 +625,11 @@ extern int x86_prefetch_sse; if (last_arch_char != 'n') \ builtin_define ("__athlon_sse__"); \ } \ + else if (ix86_arch == PROCESSOR_K8) \ + { \ + builtin_define ("__k8"); \ + builtin_define ("__k8__"); \ + } \ else if (ix86_arch == PROCESSOR_PENTIUM4) \ { \ builtin_define ("__pentium4"); \ @@ -619,11 +651,12 @@ extern int x86_prefetch_sse; #define TARGET_CPU_DEFAULT_k6_3 10 #define TARGET_CPU_DEFAULT_athlon 11 #define TARGET_CPU_DEFAULT_athlon_sse 12 +#define TARGET_CPU_DEFAULT_k8 13 #define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\ "pentiumpro", "pentium2", "pentium3", \ "pentium4", "k6", "k6-2", "k6-3",\ - "athlon", "athlon-4"} + "athlon", "athlon-4", "k8"} #ifndef CC1_SPEC #define CC1_SPEC "%(cc1_cpu) " @@ -1335,6 +1368,9 @@ enum reg_class (((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \ || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)) +#define REX_SSE_REGNO_P(N) \ + ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG) + #define SSE_REGNO(N) \ ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8) #define SSE_REG_P(N) (REG_P (N) && SSE_REGNO_P (REGNO (N))) @@ -1716,18 +1752,6 @@ typedef struct ix86_args { #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 -/* If PIC, we cannot make sibling calls to global functions - because the PLT requires %ebx live. - If we are returning floats on the register stack, we cannot make - sibling calls to functions that return floats. (The stack adjust - instruction will wind up after the sibcall jump, and not be executed.) */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) \ - ((DECL) \ - && (! flag_pic || ! TREE_PUBLIC (DECL)) \ - && (! TARGET_FLOAT_RETURNS_IN_80387 \ - || ! FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (DECL)))) \ - || FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (cfun->decl)))))) - /* Perform any needed actions needed for a function that is receiving a variable number of arguments. @@ -1839,12 +1863,6 @@ typedef struct ix86_args { /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -2602,6 +2620,14 @@ do { \ #define TOPLEVEL_COSTS_N_INSNS(N) \ do { total = COSTS_N_INSNS (N); goto egress_rtx_costs; } while (0) +/* Return index of given mode in mult and division cost tables. */ +#define MODE_INDEX(mode) \ + ((mode) == QImode ? 0 \ + : (mode) == HImode ? 1 \ + : (mode) == SImode ? 2 \ + : (mode) == DImode ? 3 \ + : 4) + /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. This can be used, for example, to indicate how costly a multiply instruction is. In writing this macro, you can use the construct @@ -2687,10 +2713,12 @@ do { \ } \ \ TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ + [MODE_INDEX (GET_MODE (X))] \ + nbits * ix86_cost->mult_bit); \ } \ else /* This is arbitrary */ \ TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \ + [MODE_INDEX (GET_MODE (X))] \ + 7 * ix86_cost->mult_bit); \ \ case DIV: \ @@ -2700,7 +2728,8 @@ do { \ if (FLOAT_MODE_P (GET_MODE (X))) \ TOPLEVEL_COSTS_N_INSNS (ix86_cost->fdiv); \ else \ - TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \ + TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide \ + [MODE_INDEX (GET_MODE (X))]); \ break; \ \ case PLUS: \ @@ -3040,14 +3069,6 @@ extern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]; ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\ : DW_EH_PE_absptr) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* This is how to output an insn to push a register on the stack. It need not be very fast code. */ @@ -3241,6 +3262,7 @@ do { \ LABEL_REF, SUBREG, REG, MEM}}, \ {"pic_symbolic_operand", {CONST}}, \ {"call_insn_operand", {REG, SUBREG, MEM, SYMBOL_REF}}, \ + {"sibcall_insn_operand", {REG, SUBREG, SYMBOL_REF}}, \ {"constant_call_address_operand", {SYMBOL_REF, CONST}}, \ {"const0_operand", {CONST_INT, CONST_DOUBLE}}, \ {"const1_operand", {CONST_INT}}, \ @@ -3252,6 +3274,7 @@ do { \ SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM}}, \ {"nonmemory_no_elim_operand", {CONST_INT, REG, SUBREG}}, \ {"index_register_operand", {SUBREG, REG}}, \ + {"flags_reg_operand", {REG}}, \ {"q_regs_operand", {SUBREG, REG}}, \ {"non_q_regs_operand", {SUBREG, REG}}, \ {"fcmov_comparison_operator", {EQ, NE, LTU, GTU, LEU, GEU, UNORDERED, \ @@ -3286,6 +3309,7 @@ do { \ {"register_and_not_any_fp_reg_operand", {REG}}, \ {"fp_register_operand", {REG}}, \ {"register_and_not_fp_reg_operand", {REG}}, \ + {"zero_extended_scalar_load_operand", {MEM}}, \ /* A list of predicates that do special things with modes, and so should not elicit warnings for VOIDmode match_operand. */ @@ -3305,6 +3329,7 @@ enum processor_type PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, + PROCESSOR_K8, PROCESSOR_max }; diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index befbfe49569..d625f586d46 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -132,7 +132,7 @@ ;; Processor type. This attribute must exactly match the processor_type ;; enumeration in i386.h. -(define_attr "cpu" "i386,i486,pentium,pentiumpro,k6,athlon,pentium4" +(define_attr "cpu" "i386,i486,pentium,pentiumpro,k6,athlon,pentium4,k8" (const (symbol_ref "ix86_cpu"))) ;; A basic instruction type. Refinements due to arguments to be @@ -142,7 +142,7 @@ alu,alu1,negnot,imov,imovx,lea, incdec,ishift,ishift1,rotate,rotate1,imul,idiv, icmp,test,ibr,setcc,icmov, - push,pop,call,callv, + push,pop,call,callv,leave, str,cld, fmov,fop,fsgn,fmul,fdiv,fpspc,fcmov,fcmp,fxch,fistp, sselog,sseiadd,sseishft,sseimul, @@ -152,7 +152,7 @@ ;; Main data type used by the insn (define_attr "mode" - "unknown,none,QI,HI,SI,DI,unknownfp,SF,DF,XF,TI,V4SF,V2DF,V2SF" + "unknown,none,QI,HI,SI,DI,SF,DF,XF,TI,V4SF,V2DF,V2SF" (const_string "unknown")) ;; The CPU unit operations uses. @@ -170,7 +170,7 @@ ;; The (bounding maximum) length of an instruction immediate. (define_attr "length_immediate" "" - (cond [(eq_attr "type" "incdec,setcc,icmov,str,cld,lea,other,multi,idiv") + (cond [(eq_attr "type" "incdec,setcc,icmov,str,cld,lea,other,multi,idiv,leave") (const_int 0) (eq_attr "unit" "i387,sse,mmx") (const_int 0) @@ -232,9 +232,24 @@ (const_int 1) (const_int 0))) +;; Set when 0f opcode prefix is used. +(define_attr "prefix_rex" "" + (cond [(and (eq_attr "mode" "DI") + (eq_attr "type" "!push,pop,call,callv,leave,ibr")) + (const_int 1) + (and (eq_attr "mode" "QI") + (ne (symbol_ref "x86_extended_QIreg_mentioned_p (insn)") + (const_int 0))) + (const_int 1) + (ne (symbol_ref "x86_extended_reg_mentioned_p (insn)") + (const_int 0)) + (const_int 1) + ] + (const_int 0))) + ;; Set when modrm byte is used. (define_attr "modrm" "" - (cond [(eq_attr "type" "str,cld") + (cond [(eq_attr "type" "str,cld,leave") (const_int 0) (eq_attr "unit" "i387") (const_int 0) @@ -273,7 +288,8 @@ (attr "length_address")))] (plus (plus (attr "modrm") (plus (attr "prefix_0f") - (const_int 1))) + (plus (attr "prefix_rex") + (const_int 1)))) (plus (attr "prefix_rep") (plus (attr "prefix_data16") (plus (attr "length_immediate") @@ -288,7 +304,7 @@ (const_string "unknown") (eq_attr "type" "lea,fcmov,fpspc,cld") (const_string "none") - (eq_attr "type" "fistp") + (eq_attr "type" "fistp,leave") (const_string "both") (eq_attr "type" "push") (if_then_else (match_operand 1 "memory_operand" "") @@ -754,7 +770,13 @@ return "ftst\;fnstsw\t%0"; } [(set_attr "type" "multi") - (set_attr "mode" "unknownfp")]) + (set (attr "mode") + (cond [(match_operand:SF 1 "" "") + (const_string "SF") + (match_operand:DF 1 "" "") + (const_string "DF") + ] + (const_string "XF")))]) ;; We may not use "#" to split and emit these, since the REG_DEAD notes ;; used to manage the reg stack popping would not be preserved. @@ -857,7 +879,13 @@ && GET_MODE (operands[0]) == GET_MODE (operands[1])" "* return output_fp_compare (insn, operands, 0, 1);" [(set_attr "type" "fcmp") - (set_attr "mode" "unknownfp")]) + (set (attr "mode") + (cond [(match_operand:SF 1 "" "") + (const_string "SF") + (match_operand:DF 1 "" "") + (const_string "DF") + ] + (const_string "XF")))]) (define_insn "*cmpfp_2u_1" [(set (match_operand:HI 0 "register_operand" "=a") @@ -871,7 +899,13 @@ && GET_MODE (operands[1]) == GET_MODE (operands[2])" "* return output_fp_compare (insn, operands, 2, 1);" [(set_attr "type" "multi") - (set_attr "mode" "unknownfp")]) + (set (attr "mode") + (cond [(match_operand:SF 1 "" "") + (const_string "SF") + (match_operand:DF 1 "" "") + (const_string "DF") + ] + (const_string "XF")))]) ;; Patterns to match the SImode-in-memory ficom instructions. ;; @@ -911,7 +945,7 @@ ;; FP compares, step 2 ;; Move the fpsw to ax. -(define_insn "x86_fnstsw_1" +(define_insn "*x86_fnstsw_1" [(set (match_operand:HI 0 "register_operand" "=a") (unspec:HI [(reg 18)] UNSPEC_FNSTSW))] "TARGET_80387" @@ -946,7 +980,13 @@ && GET_MODE (operands[0]) == GET_MODE (operands[0])" "* return output_fp_compare (insn, operands, 1, 0);" [(set_attr "type" "fcmp") - (set_attr "mode" "unknownfp") + (set (attr "mode") + (cond [(match_operand:SF 1 "" "") + (const_string "SF") + (match_operand:DF 1 "" "") + (const_string "DF") + ] + (const_string "XF"))) (set_attr "athlon_decode" "vector")]) (define_insn "*cmpfp_i_sse" @@ -958,7 +998,10 @@ && GET_MODE (operands[0]) == GET_MODE (operands[0])" "* return output_fp_compare (insn, operands, 1, 0);" [(set_attr "type" "fcmp,ssecmp") - (set_attr "mode" "unknownfp") + (set (attr "mode") + (if_then_else (match_operand:SF 1 "" "") + (const_string "SF") + (const_string "DF"))) (set_attr "athlon_decode" "vector")]) (define_insn "*cmpfp_i_sse_only" @@ -969,7 +1012,10 @@ && GET_MODE (operands[0]) == GET_MODE (operands[0])" "* return output_fp_compare (insn, operands, 1, 0);" [(set_attr "type" "ssecmp") - (set_attr "mode" "unknownfp") + (set (attr "mode") + (if_then_else (match_operand:SF 1 "" "") + (const_string "SF") + (const_string "DF"))) (set_attr "athlon_decode" "vector")]) (define_insn "*cmpfp_iu" @@ -982,7 +1028,13 @@ && GET_MODE (operands[0]) == GET_MODE (operands[1])" "* return output_fp_compare (insn, operands, 1, 1);" [(set_attr "type" "fcmp") - (set_attr "mode" "unknownfp") + (set (attr "mode") + (cond [(match_operand:SF 1 "" "") + (const_string "SF") + (match_operand:DF 1 "" "") + (const_string "DF") + ] + (const_string "XF"))) (set_attr "athlon_decode" "vector")]) (define_insn "*cmpfp_iu_sse" @@ -994,7 +1046,10 @@ && GET_MODE (operands[0]) == GET_MODE (operands[1])" "* return output_fp_compare (insn, operands, 1, 1);" [(set_attr "type" "fcmp,ssecmp") - (set_attr "mode" "unknownfp") + (set (attr "mode") + (if_then_else (match_operand:SF 1 "" "") + (const_string "SF") + (const_string "DF"))) (set_attr "athlon_decode" "vector")]) (define_insn "*cmpfp_iu_sse_only" @@ -1005,7 +1060,10 @@ && GET_MODE (operands[0]) == GET_MODE (operands[1])" "* return output_fp_compare (insn, operands, 1, 1);" [(set_attr "type" "ssecmp") - (set_attr "mode" "unknownfp") + (set (attr "mode") + (if_then_else (match_operand:SF 1 "" "") + (const_string "SF") + (const_string "DF"))) (set_attr "athlon_decode" "vector")]) ;; Move instructions. @@ -2011,22 +2069,11 @@ { switch (which_alternative) { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (SFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (4); - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - case 1: return "push{l}\t%1"; - case 2: - return "#"; default: + /* This insn should be already splitted before reg-stack. */ abort (); } } @@ -2040,23 +2087,11 @@ { switch (which_alternative) { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (SFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (8); - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{q}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{q}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - case 1: return "push{q}\t%q1"; - case 2: - return "#"; - default: + /* This insn should be already splitted before reg-stack. */ abort (); } } @@ -2104,7 +2139,12 @@ case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "fstp\t%y0"; + { + if (REGNO (operands[0]) == FIRST_STACK_REG + && TARGET_USE_FFREEP) + return "ffreep\t%y0"; + return "fstp\t%y0"; + } else if (STACK_TOP_P (operands[0])) return "fld%z1\t%y1"; else @@ -2130,12 +2170,12 @@ case 4: return "mov{l}\t{%1, %0|%0, %1}"; case 5: - if (TARGET_SSE2 && !TARGET_ATHLON) + if (get_attr_mode (insn) == MODE_TI) return "pxor\t%0, %0"; else return "xorps\t%0, %0"; case 6: - if (TARGET_PARTIAL_REG_DEPENDENCY) + if (get_attr_mode (insn) == MODE_V4SF) return "movaps\t{%1, %0|%0, %1}"; else return "movss\t{%1, %0|%0, %1}"; @@ -2155,7 +2195,40 @@ } } [(set_attr "type" "fmov,fmov,fmov,imov,imov,ssemov,ssemov,ssemov,ssemov,mmxmov,mmxmov,mmxmov") - (set_attr "mode" "SF,SF,SF,SI,SI,TI,SF,SF,SF,SI,SI,DI")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "3,4,9,10") + (const_string "SI") + (eq_attr "alternative" "5") + (if_then_else + (and (and (ne (symbol_ref "TARGET_SSE_LOAD0_BY_PXOR") + (const_int 0)) + (ne (symbol_ref "TARGET_SSE2") + (const_int 0))) + (eq (symbol_ref "optimize_size") + (const_int 0))) + (const_string "TI") + (const_string "V4SF")) + /* For architectures resolving dependencies on + whole SSE registers use APS move to break dependency + chains, otherwise use short move to avoid extra work. + + Do the same for architectures resolving dependencies on + the parts. While in DF mode it is better to always handle + just register parts, the SF mode is different due to lack + of instructions to load just part of the register. It is + better to maintain the whole registers in single format + to avoid problems on using packed logical operations. */ + (eq_attr "alternative" "6") + (if_then_else + (ior (ne (symbol_ref "TARGET_SSE_PARTIAL_REG_DEPENDENCY") + (const_int 0)) + (ne (symbol_ref "TARGET_SSE_PARTIAL_REGS") + (const_int 0))) + (const_string "V4SF") + (const_string "SF")) + (eq_attr "alternative" "11") + (const_string "DI")] + (const_string "SF")))]) (define_insn "*swapsf" [(set (match_operand:SF 0 "register_operand" "+f") @@ -2188,26 +2261,8 @@ (match_operand:DF 1 "general_no_elim_operand" "f#Y,Fo#fY,*r#fY,Y#f"))] "!TARGET_64BIT && !TARGET_INTEGER_DFMODE_MOVES" { - switch (which_alternative) - { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (DFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (8); - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - - case 1: - case 2: - case 3: - return "#"; - - default: - abort (); - } + /* This insn should be already splitted before reg-stack. */ + abort (); } [(set_attr "type" "multi") (set_attr "mode" "DF,SI,SI,DF")]) @@ -2217,32 +2272,8 @@ (match_operand:DF 1 "general_no_elim_operand" "f#rY,rFo#fY,Y#rf"))] "TARGET_64BIT || TARGET_INTEGER_DFMODE_MOVES" { - switch (which_alternative) - { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (DFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (8); - if (TARGET_64BIT) - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{q}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{q}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - else - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - - - case 1: - case 2: - return "#"; - - default: - abort (); - } + /* This insn should be already splitted before reg-stack. */ + abort (); } [(set_attr "type" "multi") (set_attr "mode" "DF,SI,DF")]) @@ -2279,7 +2310,7 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Y,m,f#Y,*r,o,Y#f,Y#f,Y#f,m") (match_operand:DF 1 "general_operand" "fm#Y,f#Y,G,*roF,F*r,C,Y#f,YHm#f,Y#f"))] "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM) - && (optimize_size || !TARGET_INTEGER_DFMODE_MOVES) + && ((optimize_size || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT) && (reload_in_progress || reload_completed || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE) || GET_CODE (operands[1]) != CONST_DOUBLE @@ -2290,7 +2321,12 @@ case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "fstp\t%y0"; + { + if (REGNO (operands[0]) == FIRST_STACK_REG + && TARGET_USE_FFREEP) + return "ffreep\t%y0"; + return "fstp\t%y0"; + } else if (STACK_TOP_P (operands[0])) return "fld%z1\t%y1"; else @@ -2316,31 +2352,84 @@ case 4: return "#"; case 5: - if (TARGET_ATHLON) - return "xorpd\t%0, %0"; - else - return "pxor\t%0, %0"; + switch (get_attr_mode (insn)) + { + case MODE_V4SF: + return "xorps\t%0, %0"; + case MODE_V2DF: + return "xorpd\t%0, %0"; + case MODE_TI: + return "pxor\t%0, %0"; + default: + abort (); + } case 6: - if (TARGET_PARTIAL_REG_DEPENDENCY) - return "movapd\t{%1, %0|%0, %1}"; + switch (get_attr_mode (insn)) + { + case MODE_V4SF: + return "movaps\t{%1, %0|%0, %1}"; + case MODE_V2DF: + return "movapd\t{%1, %0|%0, %1}"; + case MODE_DF: + return "movsd\t{%1, %0|%0, %1}"; + default: + abort (); + } + case 7: + if (get_attr_mode (insn) == MODE_V2DF) + return "movlpd\t{%1, %0|%0, %1}"; else return "movsd\t{%1, %0|%0, %1}"; - case 7: case 8: - return "movsd\t{%1, %0|%0, %1}"; + return "movsd\t{%1, %0|%0, %1}"; default: abort(); } } [(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov") - (set_attr "mode" "DF,DF,DF,SI,SI,TI,DF,DF,DF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "3,4") + (const_string "SI") + /* xorps is one byte shorter. */ + (eq_attr "alternative" "5") + (cond [(ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (ne (symbol_ref "TARGET_SSE_LOAD0_BY_PXOR") + (const_int 0)) + (const_string "TI")] + (const_string "V2DF")) + /* For architectures resolving dependencies on + whole SSE registers use APD move to break dependency + chains, otherwise use short move to avoid extra work. + + movaps encodes one byte shorter. */ + (eq_attr "alternative" "6") + (cond + [(ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (ne (symbol_ref "TARGET_SSE_PARTIAL_REG_DEPENDENCY") + (const_int 0)) + (const_string "V2DF")] + (const_string "DF")) + /* For achitectures resolving dependencies on register + parts we may avoid extra work to zero out upper part + of register. */ + (eq_attr "alternative" "7") + (if_then_else + (ne (symbol_ref "TARGET_SSE_PARTIAL_REGS") + (const_int 0)) + (const_string "V2DF") + (const_string "DF"))] + (const_string "DF")))]) (define_insn "*movdf_integer" [(set (match_operand:DF 0 "nonimmediate_operand" "=f#Yr,m,f#Yr,r#Yf,o,Y#rf,Y#rf,Y#rf,m") (match_operand:DF 1 "general_operand" "fm#Yr,f#Yr,G,roF#Yf,Fr#Yf,C,Y#rf,Ym#rf,Y#rf"))] "(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM) - && !optimize_size && TARGET_INTEGER_DFMODE_MOVES + && ((!optimize_size && TARGET_INTEGER_DFMODE_MOVES) || TARGET_64BIT) && (reload_in_progress || reload_completed || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE) || GET_CODE (operands[1]) != CONST_DOUBLE @@ -2351,7 +2440,12 @@ case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "fstp\t%y0"; + { + if (REGNO (operands[0]) == FIRST_STACK_REG + && TARGET_USE_FFREEP) + return "ffreep\t%y0"; + return "fstp\t%y0"; + } else if (STACK_TOP_P (operands[0])) return "fld%z1\t%y1"; else @@ -2378,16 +2472,34 @@ return "#"; case 5: - if (TARGET_ATHLON) - return "xorpd\t%0, %0"; - else - return "pxor\t%0, %0"; + switch (get_attr_mode (insn)) + { + case MODE_V4SF: + return "xorps\t%0, %0"; + case MODE_V2DF: + return "xorpd\t%0, %0"; + case MODE_TI: + return "pxor\t%0, %0"; + default: + abort (); + } case 6: - if (TARGET_PARTIAL_REG_DEPENDENCY) - return "movapd\t{%1, %0|%0, %1}"; + switch (get_attr_mode (insn)) + { + case MODE_V4SF: + return "movaps\t{%1, %0|%0, %1}"; + case MODE_V2DF: + return "movapd\t{%1, %0|%0, %1}"; + case MODE_DF: + return "movsd\t{%1, %0|%0, %1}"; + default: + abort (); + } + case 7: + if (get_attr_mode (insn) == MODE_V2DF) + return "movlpd\t{%1, %0|%0, %1}"; else return "movsd\t{%1, %0|%0, %1}"; - case 7: case 8: return "movsd\t{%1, %0|%0, %1}"; @@ -2396,7 +2508,42 @@ } } [(set_attr "type" "fmov,fmov,fmov,multi,multi,ssemov,ssemov,ssemov,ssemov") - (set_attr "mode" "DF,DF,DF,SI,SI,TI,DF,DF,DF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "3,4") + (const_string "SI") + /* xorps is one byte shorter. */ + (eq_attr "alternative" "5") + (cond [(ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (ne (symbol_ref "TARGET_SSE_LOAD0_BY_PXOR") + (const_int 0)) + (const_string "TI")] + (const_string "V2DF")) + /* For architectures resolving dependencies on + whole SSE registers use APD move to break dependency + chains, otherwise use short move to avoid extra work. + + movaps encodes one byte shorter. */ + (eq_attr "alternative" "6") + (cond + [(ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (ne (symbol_ref "TARGET_SSE_PARTIAL_REG_DEPENDENCY") + (const_int 0)) + (const_string "V2DF")] + (const_string "DF")) + /* For achitectures resolving dependencies on register + parts we may avoid extra work to zero out upper part + of register. */ + (eq_attr "alternative" "7") + (if_then_else + (ne (symbol_ref "TARGET_SSE_PARTIAL_REGS") + (const_int 0)) + (const_string "V2DF") + (const_string "DF"))] + (const_string "DF")))]) (define_split [(set (match_operand:DF 0 "nonimmediate_operand" "") @@ -2451,25 +2598,8 @@ (match_operand:XF 1 "general_no_elim_operand" "f,Fo,*r"))] "!TARGET_64BIT && optimize_size" { - switch (which_alternative) - { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (XFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (12); - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - - case 1: - case 2: - return "#"; - - default: - abort (); - } + /* This insn should be already splitted before reg-stack. */ + abort (); } [(set_attr "type" "multi") (set_attr "mode" "XF,SI,SI")]) @@ -2479,25 +2609,8 @@ (match_operand:TF 1 "general_no_elim_operand" "f,Fo,*r"))] "optimize_size" { - switch (which_alternative) - { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (XFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (16); - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - - case 1: - case 2: - return "#"; - - default: - abort (); - } + /* This insn should be already splitted before reg-stack. */ + abort (); } [(set_attr "type" "multi") (set_attr "mode" "XF,SI,SI")]) @@ -2507,24 +2620,8 @@ (match_operand:XF 1 "general_no_elim_operand" "f#r,ro#f"))] "!TARGET_64BIT && !optimize_size" { - switch (which_alternative) - { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (XFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (12); - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - - case 1: - return "#"; - - default: - abort (); - } + /* This insn should be already splitted before reg-stack. */ + abort (); } [(set_attr "type" "multi") (set_attr "mode" "XF,SI")]) @@ -2534,30 +2631,8 @@ (match_operand:TF 1 "general_no_elim_operand" "f#r,rFo#f"))] "!optimize_size" { - switch (which_alternative) - { - case 0: - /* %%% We loose REG_DEAD notes for controling pops if we split late. */ - operands[0] = gen_rtx_MEM (XFmode, stack_pointer_rtx); - operands[2] = stack_pointer_rtx; - operands[3] = GEN_INT (16); - if (TARGET_64BIT) - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{q}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{q}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - else - if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "sub{l}\t{%3, %2|%2, %3}\;fstp%z0\t%y0"; - else - return "sub{l}\t{%3, %2|%2, %3}\;fst%z0\t%y0"; - - case 1: - return "#"; - - default: - abort (); - } + /* This insn should be already splitted before reg-stack. */ + abort (); } [(set_attr "type" "multi") (set_attr "mode" "XF,SI")]) @@ -2610,7 +2685,12 @@ case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "fstp\t%y0"; + { + if (REGNO (operands[0]) == FIRST_STACK_REG + && TARGET_USE_FFREEP) + return "ffreep\t%y0"; + return "fstp\t%y0"; + } else if (STACK_TOP_P (operands[0])) return "fld%z1\t%y1"; else @@ -2657,7 +2737,12 @@ case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "fstp\t%y0"; + { + if (REGNO (operands[0]) == FIRST_STACK_REG + && TARGET_USE_FFREEP) + return "ffreep\t%y0"; + return "fstp\t%y0"; + } else if (STACK_TOP_P (operands[0])) return "fld%z1\t%y1"; else @@ -2704,7 +2789,12 @@ case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "fstp\t%y0"; + { + if (REGNO (operands[0]) == FIRST_STACK_REG + && TARGET_USE_FFREEP) + return "ffreep\t%y0"; + return "fstp\t%y0"; + } else if (STACK_TOP_P (operands[0])) return "fld%z1\t%y1"; else @@ -2751,7 +2841,12 @@ case 0: if (REG_P (operands[1]) && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) - return "fstp\t%y0"; + { + if (REGNO (operands[0]) == FIRST_STACK_REG + && TARGET_USE_FFREEP) + return "ffreep\t%y0"; + return "fstp\t%y0"; + } else if (STACK_TOP_P (operands[0])) return "fld%z1\t%y1"; else @@ -3699,11 +3794,11 @@ (set_attr "mode" "SF,SF,SF,SF")]) (define_insn "*truncdfsf2_1_sse" - [(set (match_operand:SF 0 "nonimmediate_operand" "=*!m,?f#rx,?r#fx,?x#rf,Y") + [(set (match_operand:SF 0 "nonimmediate_operand" "=*!m#fxr,?f#xr,?r#fx,?x#fr,Y#fr") (float_truncate:SF - (match_operand:DF 1 "nonimmediate_operand" "f,f,f,f,mY"))) + (match_operand:DF 1 "nonimmediate_operand" "f#Y,f#Y,f#Y,f#Y,mY#f"))) (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m,X"))] - "TARGET_80387 && TARGET_SSE2" + "TARGET_80387 && TARGET_SSE2 && !TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS" { switch (which_alternative) { @@ -3713,7 +3808,30 @@ else return "fst%z0\t%y0"; case 4: - return "cvtsd2ss\t{%1, %0|%0, %1}"; + return "#"; + default: + abort (); + } +} + [(set_attr "type" "fmov,multi,multi,multi,ssecvt") + (set_attr "mode" "SF,SF,SF,SF,DF")]) + +(define_insn "*truncdfsf2_1_sse_nooverlap" + [(set (match_operand:SF 0 "nonimmediate_operand" "=*!m,?f#rx,?r#fx,?x#rf,&Y") + (float_truncate:SF + (match_operand:DF 1 "nonimmediate_operand" "f#Y,f#Y,f#Y,f#Y,mY#f"))) + (clobber (match_operand:SF 2 "memory_operand" "=X,m,m,m,X"))] + "TARGET_80387 && TARGET_SSE2 && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS" +{ + switch (which_alternative) + { + case 0: + if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) + return "fstp%z0\t%y0"; + else + return "fst%z0\t%y0"; + case 4: + return "#"; default: abort (); } @@ -3724,8 +3842,8 @@ (define_insn "*truncdfsf2_2" [(set (match_operand:SF 0 "nonimmediate_operand" "=Y,!m") (float_truncate:SF - (match_operand:DF 1 "nonimmediate_operand" "mY,f")))] - "TARGET_80387 && TARGET_SSE2 + (match_operand:DF 1 "nonimmediate_operand" "mY,f#Y")))] + "TARGET_80387 && TARGET_SSE2 && !TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" { switch (which_alternative) @@ -3744,7 +3862,30 @@ [(set_attr "type" "ssecvt,fmov") (set_attr "mode" "DF,SF")]) -(define_insn "truncdfsf2_3" +(define_insn "*truncdfsf2_2_nooverlap" + [(set (match_operand:SF 0 "nonimmediate_operand" "=&Y,!m") + (float_truncate:SF + (match_operand:DF 1 "nonimmediate_operand" "mY,f")))] + "TARGET_80387 && TARGET_SSE2 && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS + && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" +{ + switch (which_alternative) + { + case 0: + return "#"; + case 1: + if (find_regno_note (insn, REG_DEAD, REGNO (operands[1]))) + return "fstp%z0\t%y0"; + else + return "fst%z0\t%y0"; + default: + abort (); + } +} + [(set_attr "type" "ssecvt,fmov") + (set_attr "mode" "DF,SF")]) + +(define_insn "*truncdfsf2_3" [(set (match_operand:SF 0 "memory_operand" "=m") (float_truncate:SF (match_operand:DF 1 "register_operand" "f")))] @@ -3762,11 +3903,20 @@ [(set (match_operand:SF 0 "register_operand" "=Y") (float_truncate:SF (match_operand:DF 1 "nonimmediate_operand" "mY")))] - "!TARGET_80387 && TARGET_SSE2" + "!TARGET_80387 && TARGET_SSE2 && !TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS" "cvtsd2ss\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") (set_attr "mode" "DF")]) +(define_insn "*truncdfsf2_sse_only_nooverlap" + [(set (match_operand:SF 0 "register_operand" "=&Y") + (float_truncate:SF + (match_operand:DF 1 "nonimmediate_operand" "mY")))] + "!TARGET_80387 && TARGET_SSE2 && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS" + "#" + [(set_attr "type" "ssecvt") + (set_attr "mode" "DF")]) + (define_split [(set (match_operand:SF 0 "memory_operand" "") (float_truncate:SF @@ -3776,15 +3926,56 @@ [(set (match_dup 0) (float_truncate:SF (match_dup 1)))] "") +; Avoid possible reformating penalty on the destination by first +; zeroing it out (define_split - [(set (match_operand:SF 0 "nonimmediate_operand" "") + [(set (match_operand:SF 0 "register_operand" "") (float_truncate:SF (match_operand:DF 1 "nonimmediate_operand" ""))) (clobber (match_operand 2 "" ""))] "TARGET_80387 && reload_completed - && !FP_REG_P (operands[0]) && !FP_REG_P (operands[1])" - [(set (match_dup 0) (float_truncate:SF (match_dup 1)))] - "") + && SSE_REG_P (operands[0]) + && !STACK_REG_P (operands[1])" + [(const_int 0)] +{ + rtx src, dest; + if (!TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS) + emit_insn (gen_truncdfsf2_sse_only (operands[0], operands[1])); + else + { + dest = simplify_gen_subreg (V4SFmode, operands[0], SFmode, 0); + src = simplify_gen_subreg (V2DFmode, operands[1], DFmode, 0); + /* simplify_gen_subreg refuses to widen memory references. */ + if (GET_CODE (src) == SUBREG) + alter_subreg (&src); + if (reg_overlap_mentioned_p (operands[0], operands[1])) + abort (); + emit_insn (gen_sse_clrv4sf (dest, CONST0_RTX (V4SFmode))); + emit_insn (gen_cvtsd2ss (dest, dest, src)); + } + DONE; +}) + +(define_split + [(set (match_operand:SF 0 "register_operand" "") + (float_truncate:SF + (match_operand:DF 1 "nonimmediate_operand" "")))] + "TARGET_80387 && reload_completed + && SSE_REG_P (operands[0]) && TARGET_SSE_PARTIAL_REGS_FOR_CVTSD2SS" + [(const_int 0)] +{ + rtx src, dest; + dest = simplify_gen_subreg (V4SFmode, operands[0], SFmode, 0); + src = simplify_gen_subreg (V2DFmode, operands[1], DFmode, 0); + /* simplify_gen_subreg refuses to widen memory references. */ + if (GET_CODE (src) == SUBREG) + alter_subreg (&src); + if (reg_overlap_mentioned_p (operands[0], operands[1])) + abort (); + emit_insn (gen_sse_clrv4sf (dest, CONST0_RTX (V4SFmode))); + emit_insn (gen_cvtsd2ss (dest, dest, src)); + DONE; +}) (define_split [(set (match_operand:SF 0 "register_operand" "") @@ -4468,7 +4659,7 @@ "") (define_insn "*floatsisf2_i387" - [(set (match_operand:SF 0 "register_operand" "=f,?f,x") + [(set (match_operand:SF 0 "register_operand" "=f#x,?f#x,x#f") (float:SF (match_operand:SI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)" "@ @@ -4488,6 +4679,22 @@ (set_attr "mode" "SF") (set_attr "fp_int_src" "true")]) +; Avoid possible reformating penalty on the destination by first +; zeroing it out +(define_split + [(set (match_operand:SF 0 "register_operand" "") + (float:SF (match_operand:SI 1 "nonimmediate_operand" "")))] + "TARGET_80387 && reload_completed && TARGET_SSE_PARTIAL_REGS + && SSE_REG_P (operands[0])" + [(const_int 0)] +{ + rtx dest; + dest = simplify_gen_subreg (V4SFmode, operands[0], SFmode, 0); + emit_insn (gen_sse_clrv4sf (dest, CONST0_RTX (V4SFmode))); + emit_insn (gen_cvtsi2ss (dest, dest, operands[1])); + DONE; +}) + (define_expand "floatdisf2" [(set (match_operand:SF 0 "register_operand" "") (float:SF (match_operand:DI 1 "nonimmediate_operand" "")))] @@ -4506,7 +4713,7 @@ (set_attr "fp_int_src" "true")]) (define_insn "*floatdisf2_i387" - [(set (match_operand:SF 0 "register_operand" "=f,?f,x") + [(set (match_operand:SF 0 "register_operand" "=f#x,?f#x,x#f") (float:SF (match_operand:DI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_64BIT && TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)" "@ @@ -4526,6 +4733,22 @@ (set_attr "mode" "SF") (set_attr "fp_int_src" "true")]) +; Avoid possible reformating penalty on the destination by first +; zeroing it out +(define_split + [(set (match_operand:SF 0 "register_operand" "") + (float:SF (match_operand:DI 1 "nonimmediate_operand" "")))] + "TARGET_80387 && reload_completed && TARGET_SSE_PARTIAL_REGS + && SSE_REG_P (operands[0])" + [(const_int 0)] +{ + rtx dest; + dest = simplify_gen_subreg (V4SFmode, operands[0], SFmode, 0); + emit_insn (gen_sse_clrv4sf (dest, CONST0_RTX (V4SFmode))); + emit_insn (gen_cvtsi2ssq (dest, dest, operands[1])); + DONE; +}) + (define_insn "floathidf2" [(set (match_operand:DF 0 "register_operand" "=f,f") (float:DF (match_operand:HI 1 "nonimmediate_operand" "m,r")))] @@ -4544,7 +4767,7 @@ "") (define_insn "*floatsidf2_i387" - [(set (match_operand:DF 0 "register_operand" "=f,?f,Y") + [(set (match_operand:DF 0 "register_operand" "=f#Y,?f#Y,Y#f") (float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)" "@ @@ -4582,7 +4805,7 @@ (set_attr "fp_int_src" "true")]) (define_insn "*floatdidf2_i387" - [(set (match_operand:DF 0 "register_operand" "=f,?f,Y") + [(set (match_operand:DF 0 "register_operand" "=f#Y,?f#Y,Y#f") (float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r,mr")))] "TARGET_64BIT && TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)" "@ @@ -9269,12 +9492,15 @@ in register. */ rtx reg = gen_reg_rtx (SFmode); rtx dest = operands[0]; + rtx imm = gen_lowpart (SFmode, gen_int_mode (0x80000000, SImode)); operands[1] = force_reg (SFmode, operands[1]); operands[0] = force_reg (SFmode, operands[0]); - emit_move_insn (reg, - gen_lowpart (SFmode, - gen_int_mode (0x80000000, SImode))); + reg = force_reg (V4SFmode, + gen_rtx_CONST_VECTOR (V4SFmode, + gen_rtvec (4, imm, CONST0_RTX (SFmode), + CONST0_RTX (SFmode), + CONST0_RTX (SFmode)))); emit_insn (gen_negsf2_ifs (operands[0], operands[1], reg)); if (dest != operands[0]) emit_move_insn (dest, operands[0]); @@ -9293,7 +9519,7 @@ (define_insn "negsf2_ifs" [(set (match_operand:SF 0 "nonimmediate_operand" "=x#fr,x#fr,f#xr,rm#xf") (neg:SF (match_operand:SF 1 "nonimmediate_operand" "0,x#fr,0,0"))) - (use (match_operand:SF 2 "nonmemory_operand" "x,0#x,*g#x,*g#x")) + (use (match_operand:V4SF 2 "nonimmediate_operand" "xm,0,xm*r,xm*r")) (clobber (reg:CC 17))] "TARGET_SSE && (reload_in_progress || reload_completed @@ -9314,7 +9540,7 @@ (define_split [(set (match_operand:SF 0 "register_operand" "") (neg:SF (match_operand:SF 1 "register_operand" ""))) - (use (match_operand:SF 2 "" "")) + (use (match_operand:V4SF 2 "" "")) (clobber (reg:CC 17))] "reload_completed && !SSE_REG_P (operands[0])" [(parallel [(set (match_dup 0) @@ -9324,13 +9550,15 @@ (define_split [(set (match_operand:SF 0 "register_operand" "") (neg:SF (match_operand:SF 1 "register_operand" ""))) - (use (match_operand:SF 2 "register_operand" "")) + (use (match_operand:V4SF 2 "nonimmediate_operand" "")) (clobber (reg:CC 17))] "reload_completed && SSE_REG_P (operands[0])" [(set (subreg:TI (match_dup 0) 0) - (xor:TI (subreg:TI (match_dup 1) 0) - (subreg:TI (match_dup 2) 0)))] + (xor:TI (match_dup 1) + (match_dup 2)))] { + operands[1] = simplify_gen_subreg (TImode, operands[1], SFmode, 0); + operands[2] = simplify_gen_subreg (TImode, operands[2], V4SFmode, 0); if (operands_match_p (operands[0], operands[2])) { rtx tmp; @@ -9403,7 +9631,7 @@ { /* Using SSE is tricky, since we need bitwise negation of -0 in register. */ - rtx reg = gen_reg_rtx (DFmode); + rtx reg; #if HOST_BITS_PER_WIDE_INT >= 64 rtx imm = gen_int_mode (((HOST_WIDE_INT)1) << 63, DImode); #else @@ -9413,7 +9641,10 @@ operands[1] = force_reg (DFmode, operands[1]); operands[0] = force_reg (DFmode, operands[0]); - emit_move_insn (reg, gen_lowpart (DFmode, imm)); + imm = gen_lowpart (DFmode, imm); + reg = force_reg (V2DFmode, + gen_rtx_CONST_VECTOR (V2DFmode, + gen_rtvec (2, imm, CONST0_RTX (DFmode)))); emit_insn (gen_negdf2_ifs (operands[0], operands[1], reg)); if (dest != operands[0]) emit_move_insn (dest, operands[0]); @@ -9432,7 +9663,7 @@ (define_insn "negdf2_ifs" [(set (match_operand:DF 0 "nonimmediate_operand" "=Y#fr,Y#fr,f#Yr,rm#Yf") (neg:DF (match_operand:DF 1 "nonimmediate_operand" "0,Y#fr,0,0"))) - (use (match_operand:DF 2 "nonmemory_operand" "Y,0,*g#Y,*g#Y")) + (use (match_operand:V2DF 2 "nonimmediate_operand" "Ym,0,Ym*r,Ym*r")) (clobber (reg:CC 17))] "!TARGET_64BIT && TARGET_SSE2 && (reload_in_progress || reload_completed @@ -9442,8 +9673,8 @@ (define_insn "*negdf2_ifs_rex64" [(set (match_operand:DF 0 "nonimmediate_operand" "=Y#f,Y#f,fm#Y") - (neg:DF (match_operand:DF 1 "nonimmediate_operand" "0,Y#f,0"))) - (use (match_operand:DF 2 "general_operand" "Y,0,*g#Y*r")) + (neg:DF (match_operand:DF 1 "nonimmediate_operand" "0,Y#fr,0"))) + (use (match_operand:V2DF 2 "nonimmediate_operand" "Ym,0,Ym*r")) (clobber (reg:CC 17))] "TARGET_64BIT && TARGET_SSE2 && (reload_in_progress || reload_completed @@ -9454,7 +9685,7 @@ (define_split [(set (match_operand:DF 0 "memory_operand" "") (neg:DF (match_operand:DF 1 "memory_operand" ""))) - (use (match_operand:DF 2 "" "")) + (use (match_operand:V2DF 2 "" "")) (clobber (reg:CC 17))] "" [(parallel [(set (match_dup 0) @@ -9464,7 +9695,7 @@ (define_split [(set (match_operand:DF 0 "register_operand" "") (neg:DF (match_operand:DF 1 "register_operand" ""))) - (use (match_operand:DF 2 "" "")) + (use (match_operand:V2DF 2 "" "")) (clobber (reg:CC 17))] "reload_completed && !SSE_REG_P (operands[0]) && (!TARGET_64BIT || FP_REG_P (operands[0]))" @@ -9475,7 +9706,7 @@ (define_split [(set (match_operand:DF 0 "register_operand" "") (neg:DF (match_operand:DF 1 "register_operand" ""))) - (use (match_operand:DF 2 "" "")) + (use (match_operand:V2DF 2 "" "")) (clobber (reg:CC 17))] "TARGET_64BIT && reload_completed && GENERAL_REG_P (operands[0])" [(parallel [(set (match_dup 0) @@ -9488,13 +9719,19 @@ (define_split [(set (match_operand:DF 0 "register_operand" "") (neg:DF (match_operand:DF 1 "register_operand" ""))) - (use (match_operand:DF 2 "register_operand" "")) + (use (match_operand:V2DF 2 "nonimmediate_operand" "")) (clobber (reg:CC 17))] "reload_completed && SSE_REG_P (operands[0])" [(set (subreg:TI (match_dup 0) 0) - (xor:TI (subreg:TI (match_dup 1) 0) - (subreg:TI (match_dup 2) 0)))] + (xor:TI (match_dup 1) + (match_dup 2)))] { + operands[0] = simplify_gen_subreg (V2DFmode, operands[0], DFmode, 0); + operands[1] = simplify_gen_subreg (TImode, operands[1], DFmode, 0); + operands[2] = simplify_gen_subreg (TImode, operands[2], V2DFmode, 0); + /* Avoid possible reformating on the operands. */ + if (TARGET_SSE_PARTIAL_REGS && !optimize_size) + emit_insn (gen_sse2_unpcklpd (operands[0], operands[0], operands[0])); if (operands_match_p (operands[0], operands[2])) { rtx tmp; @@ -9727,14 +9964,18 @@ { /* Using SSE is tricky, since we need bitwise negation of -0 in register. */ - rtx reg = gen_reg_rtx (SFmode); + rtx reg = gen_reg_rtx (V4SFmode); rtx dest = operands[0]; + rtx imm; operands[1] = force_reg (SFmode, operands[1]); operands[0] = force_reg (SFmode, operands[0]); - emit_move_insn (reg, - gen_lowpart (SFmode, - gen_int_mode (0x80000000, SImode))); + imm = gen_lowpart (SFmode, gen_int_mode(~0x80000000, SImode)); + reg = force_reg (V4SFmode, + gen_rtx_CONST_VECTOR (V4SFmode, + gen_rtvec (4, imm, CONST0_RTX (SFmode), + CONST0_RTX (SFmode), + CONST0_RTX (SFmode)))); emit_insn (gen_abssf2_ifs (operands[0], operands[1], reg)); if (dest != operands[0]) emit_move_insn (dest, operands[0]); @@ -9751,20 +9992,20 @@ "#") (define_insn "abssf2_ifs" - [(set (match_operand:SF 0 "nonimmediate_operand" "=x#fr,f#xr,rm#xf") - (abs:SF (match_operand:SF 1 "nonimmediate_operand" "x,0,0"))) - (use (match_operand:SF 2 "nonmemory_operand" "*0#x,*g#x,*g#x")) + [(set (match_operand:SF 0 "nonimmediate_operand" "=x#fr,x#fr,f#xr,rm#xf") + (abs:SF (match_operand:SF 1 "nonimmediate_operand" "0,x#fr,0,0"))) + (use (match_operand:V4SF 2 "nonimmediate_operand" "xm,0,xm*r,xm*r")) (clobber (reg:CC 17))] "TARGET_SSE && (reload_in_progress || reload_completed || (register_operand (operands[0], VOIDmode) - && register_operand (operands[1], VOIDmode)))" + && register_operand (operands[1], VOIDmode)))" "#") (define_split [(set (match_operand:SF 0 "memory_operand" "") (abs:SF (match_operand:SF 1 "memory_operand" ""))) - (use (match_operand:SF 2 "" "")) + (use (match_operand:V4SF 2 "" "")) (clobber (reg:CC 17))] "" [(parallel [(set (match_dup 0) @@ -9774,7 +10015,7 @@ (define_split [(set (match_operand:SF 0 "register_operand" "") (abs:SF (match_operand:SF 1 "register_operand" ""))) - (use (match_operand:SF 2 "" "")) + (use (match_operand:V4SF 2 "" "")) (clobber (reg:CC 17))] "reload_completed && !SSE_REG_P (operands[0])" [(parallel [(set (match_dup 0) @@ -9784,12 +10025,23 @@ (define_split [(set (match_operand:SF 0 "register_operand" "") (abs:SF (match_operand:SF 1 "register_operand" ""))) - (use (match_operand:SF 2 "register_operand" "")) + (use (match_operand:V4SF 2 "nonimmediate_operand" "")) (clobber (reg:CC 17))] "reload_completed && SSE_REG_P (operands[0])" [(set (subreg:TI (match_dup 0) 0) - (and:TI (not:TI (subreg:TI (match_dup 2) 0)) - (subreg:TI (match_dup 1) 0)))]) + (and:TI (match_dup 1) + (match_dup 2)))] +{ + operands[1] = simplify_gen_subreg (TImode, operands[1], SFmode, 0); + operands[2] = simplify_gen_subreg (TImode, operands[2], V4SFmode, 0); + if (operands_match_p (operands[0], operands[2])) + { + rtx tmp; + tmp = operands[1]; + operands[1] = operands[2]; + operands[2] = tmp; + } +}) ;; Keep 'f' and 'r' in separate alternatives to avoid reload problems ;; because of secondary memory needed to reload from class FLOAT_INT_REGS @@ -9852,17 +10104,22 @@ { /* Using SSE is tricky, since we need bitwise negation of -0 in register. */ - rtx reg = gen_reg_rtx (DFmode); + rtx reg = gen_reg_rtx (V2DFmode); #if HOST_BITS_PER_WIDE_INT >= 64 - rtx imm = gen_int_mode (((HOST_WIDE_INT)1) << 63, DImode); + rtx imm = gen_int_mode (~(((HOST_WIDE_INT)1) << 63), DImode); #else - rtx imm = immed_double_const (0, 0x80000000, DImode); + rtx imm = immed_double_const (~0, ~0x80000000, DImode); #endif rtx dest = operands[0]; operands[1] = force_reg (DFmode, operands[1]); operands[0] = force_reg (DFmode, operands[0]); - emit_move_insn (reg, gen_lowpart (DFmode, imm)); + + /* Produce LONG_DOUBLE with the proper immediate argument. */ + imm = gen_lowpart (DFmode, imm); + reg = force_reg (V2DFmode, + gen_rtx_CONST_VECTOR (V2DFmode, + gen_rtvec (2, imm, CONST0_RTX (DFmode)))); emit_insn (gen_absdf2_ifs (operands[0], operands[1], reg)); if (dest != operands[0]) emit_move_insn (dest, operands[0]); @@ -9879,9 +10136,9 @@ "#") (define_insn "absdf2_ifs" - [(set (match_operand:DF 0 "nonimmediate_operand" "=Y#fr,mf#Yr,mr#Yf") - (abs:DF (match_operand:DF 1 "nonimmediate_operand" "Y,0,0"))) - (use (match_operand:DF 2 "nonmemory_operand" "*0#Y,*g#Y,*g#Y")) + [(set (match_operand:DF 0 "nonimmediate_operand" "=Y#fr,Y#fr,mf#Yr,mr#Yf") + (abs:DF (match_operand:DF 1 "nonimmediate_operand" "0,Y#fr,0,0"))) + (use (match_operand:V2DF 2 "nonimmediate_operand" "Ym,0,Ym*r,Ym*r")) (clobber (reg:CC 17))] "!TARGET_64BIT && TARGET_SSE2 && (reload_in_progress || reload_completed @@ -9890,9 +10147,9 @@ "#") (define_insn "*absdf2_ifs_rex64" - [(set (match_operand:DF 0 "nonimmediate_operand" "=Y#fr,mf#Yr") - (abs:DF (match_operand:DF 1 "nonimmediate_operand" "Y,0"))) - (use (match_operand:DF 2 "nonmemory_operand" "*0#Y,*g#Y")) + [(set (match_operand:DF 0 "nonimmediate_operand" "=Y#fr,Y#fr,mf#Yr") + (abs:DF (match_operand:DF 1 "nonimmediate_operand" "0,Y#fr,0"))) + (use (match_operand:V2DF 2 "nonimmediate_operand" "Ym,0,Ym*r")) (clobber (reg:CC 17))] "TARGET_64BIT && TARGET_SSE2 && (reload_in_progress || reload_completed @@ -9903,7 +10160,7 @@ (define_split [(set (match_operand:DF 0 "memory_operand" "") (abs:DF (match_operand:DF 1 "memory_operand" ""))) - (use (match_operand:DF 2 "" "")) + (use (match_operand:V2DF 2 "" "")) (clobber (reg:CC 17))] "" [(parallel [(set (match_dup 0) @@ -9913,7 +10170,7 @@ (define_split [(set (match_operand:DF 0 "register_operand" "") (abs:DF (match_operand:DF 1 "register_operand" ""))) - (use (match_operand:DF 2 "" "")) + (use (match_operand:V2DF 2 "" "")) (clobber (reg:CC 17))] "reload_completed && !SSE_REG_P (operands[0])" [(parallel [(set (match_dup 0) @@ -9923,12 +10180,27 @@ (define_split [(set (match_operand:DF 0 "register_operand" "") (abs:DF (match_operand:DF 1 "register_operand" ""))) - (use (match_operand:DF 2 "register_operand" "")) + (use (match_operand:V2DF 2 "nonimmediate_operand" "")) (clobber (reg:CC 17))] "reload_completed && SSE_REG_P (operands[0])" [(set (subreg:TI (match_dup 0) 0) - (and:TI (not:TI (subreg:TI (match_dup 2) 0)) - (subreg:TI (match_dup 1) 0)))]) + (and:TI (match_dup 1) + (match_dup 2)))] +{ + operands[0] = simplify_gen_subreg (V2DFmode, operands[0], DFmode, 0); + operands[1] = simplify_gen_subreg (TImode, operands[1], DFmode, 0); + operands[2] = simplify_gen_subreg (TImode, operands[2], V2DFmode, 0); + /* Avoid possible reformating on the operands. */ + if (TARGET_SSE_PARTIAL_REGS && !optimize_size) + emit_insn (gen_sse2_unpcklpd (operands[0], operands[0], operands[0])); + if (operands_match_p (operands[0], operands[2])) + { + rtx tmp; + tmp = operands[1]; + operands[1] = operands[2]; + operands[2] = tmp; + } +}) ;; Keep 'f' and 'r' in separate alternatives to avoid reload problems @@ -13367,7 +13639,7 @@ (match_operand:SI 3 "" "")))])] "!TARGET_64BIT" { - ix86_expand_call (NULL, operands[0], operands[1], operands[2], operands[3]); + ix86_expand_call (NULL, operands[0], operands[1], operands[2], operands[3], 0); DONE; }) @@ -13412,7 +13684,17 @@ (use (match_operand 2 "" ""))] "" { - ix86_expand_call (NULL, operands[0], operands[1], operands[2], NULL); + ix86_expand_call (NULL, operands[0], operands[1], operands[2], NULL, 0); + DONE; +}) + +(define_expand "sibcall" + [(call (match_operand:QI 0 "" "") + (match_operand 1 "" "")) + (use (match_operand 2 "" ""))] + "" +{ + ix86_expand_call (NULL, operands[0], operands[1], operands[2], NULL, 1); DONE; }) @@ -13431,41 +13713,51 @@ (define_insn "*call_1" [(call (mem:QI (match_operand:SI 0 "call_insn_operand" "rsm")) (match_operand 1 "" ""))] - "!TARGET_64BIT" + "!SIBLING_CALL_P (insn) && !TARGET_64BIT" { if (constant_call_address_operand (operands[0], QImode)) - { - if (SIBLING_CALL_P (insn)) - return "jmp\t%P0"; - else - return "call\t%P0"; - } - if (SIBLING_CALL_P (insn)) - return "jmp\t%A0"; - else - return "call\t%A0"; + return "call\t%P0"; + return "call\t%A0"; +} + [(set_attr "type" "call")]) + +(define_insn "*sibcall_1" + [(call (mem:QI (match_operand:SI 0 "sibcall_insn_operand" "s,c,d,a")) + (match_operand 1 "" ""))] + "SIBLING_CALL_P (insn) && !TARGET_64BIT" +{ + if (constant_call_address_operand (operands[0], QImode)) + return "jmp\t%P0"; + return "jmp\t%A0"; } [(set_attr "type" "call")]) (define_insn "*call_1_rex64" [(call (mem:QI (match_operand:DI 0 "call_insn_operand" "rsm")) (match_operand 1 "" ""))] - "TARGET_64BIT" + "!SIBLING_CALL_P (insn) && TARGET_64BIT" { if (constant_call_address_operand (operands[0], QImode)) - { - if (SIBLING_CALL_P (insn)) - return "jmp\t%P0"; - else - return "call\t%P0"; - } - if (SIBLING_CALL_P (insn)) - return "jmp\t%A0"; - else - return "call\t%A0"; + return "call\t%P0"; + return "call\t%A0"; } [(set_attr "type" "call")]) +(define_insn "*sibcall_1_rex64" + [(call (mem:QI (match_operand:DI 0 "constant_call_address_operand" "")) + (match_operand 1 "" ""))] + "SIBLING_CALL_P (insn) && TARGET_64BIT" + "jmp\t%P0" + [(set_attr "type" "call")]) + +(define_insn "*sibcall_1_rex64_v" + [(call (mem:QI (reg:DI 40)) + (match_operand 0 "" ""))] + "SIBLING_CALL_P (insn) && TARGET_64BIT" + "jmp\t*%%r11" + [(set_attr "type" "call")]) + + ;; Call subroutine, returning value in operand 0 (define_expand "call_value_pop" @@ -13478,7 +13770,7 @@ "!TARGET_64BIT" { ix86_expand_call (operands[0], operands[1], operands[2], - operands[3], operands[4]); + operands[3], operands[4], 0); DONE; }) @@ -13490,7 +13782,19 @@ ;; Operand 2 not used on the i386. "" { - ix86_expand_call (operands[0], operands[1], operands[2], operands[3], NULL); + ix86_expand_call (operands[0], operands[1], operands[2], operands[3], NULL, 0); + DONE; +}) + +(define_expand "sibcall_value" + [(set (match_operand 0 "" "") + (call (match_operand:QI 1 "" "") + (match_operand:SI 2 "" ""))) + (use (match_operand:SI 3 "" ""))] + ;; Operand 2 not used on the i386. + "" +{ + ix86_expand_call (operands[0], operands[1], operands[2], operands[3], NULL, 1); DONE; }) @@ -13513,7 +13817,7 @@ ix86_expand_call ((TARGET_FLOAT_RETURNS_IN_80387 ? gen_rtx_REG (XCmode, FIRST_FLOAT_REG) : NULL), operands[0], const0_rtx, GEN_INT (SSE_REGPARM_MAX - 1), - NULL); + NULL, 0); for (i = 0; i < XVECLEN (operands[2], 0); i++) { @@ -13662,11 +13966,7 @@ (clobber (mem:BLK (scratch)))] "!TARGET_64BIT" "leave" - [(set_attr "length_immediate" "0") - (set_attr "length" "1") - (set_attr "modrm" "0") - (set_attr "athlon_decode" "vector") - (set_attr "ppro_uops" "few")]) + [(set_attr "type" "leave")]) (define_insn "leave_rex64" [(set (reg:DI 7) (plus:DI (reg:DI 6) (const_int 8))) @@ -13674,11 +13974,7 @@ (clobber (mem:BLK (scratch)))] "TARGET_64BIT" "leave" - [(set_attr "length_immediate" "0") - (set_attr "length" "1") - (set_attr "modrm" "0") - (set_attr "athlon_decode" "vector") - (set_attr "ppro_uops" "few")]) + [(set_attr "type" "leave")]) (define_expand "ffssi2" [(set (match_operand:SI 0 "nonimmediate_operand" "") @@ -14312,6 +14608,24 @@ (const_string "fop"))) (set_attr "mode" "SF")]) +(define_insn "*fop_df_6" + [(set (match_operand:DF 0 "register_operand" "=f,f") + (match_operator:DF 3 "binary_fp_operator" + [(float_extend:DF + (match_operand:SF 1 "register_operand" "0,f")) + (float_extend:DF + (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] + "TARGET_80387 && !(TARGET_SSE2 && TARGET_SSE_MATH)" + "* return output_387_binary_op (insn, operands);" + [(set (attr "type") + (cond [(match_operand:DF 3 "mult_operator" "") + (const_string "fmul") + (match_operand:DF 3 "div_operator" "") + (const_string "fdiv") + ] + (const_string "fop"))) + (set_attr "mode" "SF")]) + (define_insn "*fop_xf_1" [(set (match_operand:XF 0 "register_operand" "=f,f") (match_operator:XF 3 "binary_fp_operator" @@ -14421,7 +14735,7 @@ (define_insn "*fop_xf_4" [(set (match_operand:XF 0 "register_operand" "=f,f") (match_operator:XF 3 "binary_fp_operator" - [(float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "fm,0")) + [(float_extend:XF (match_operand 1 "nonimmediate_operand" "fm,0")) (match_operand:XF 2 "register_operand" "0,f")]))] "!TARGET_64BIT && TARGET_80387" "* return output_387_binary_op (insn, operands);" @@ -14437,7 +14751,7 @@ (define_insn "*fop_tf_4" [(set (match_operand:TF 0 "register_operand" "=f,f") (match_operator:TF 3 "binary_fp_operator" - [(float_extend:TF (match_operand:SF 1 "nonimmediate_operand" "fm,0")) + [(float_extend:TF (match_operand 1 "nonimmediate_operand" "fm,0")) (match_operand:TF 2 "register_operand" "0,f")]))] "TARGET_80387" "* return output_387_binary_op (insn, operands);" @@ -14455,7 +14769,7 @@ (match_operator:XF 3 "binary_fp_operator" [(match_operand:XF 1 "register_operand" "0,f") (float_extend:XF - (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] + (match_operand 2 "nonimmediate_operand" "fm,0"))]))] "!TARGET_64BIT && TARGET_80387" "* return output_387_binary_op (insn, operands);" [(set (attr "type") @@ -14472,7 +14786,7 @@ (match_operator:TF 3 "binary_fp_operator" [(match_operand:TF 1 "register_operand" "0,f") (float_extend:TF - (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] + (match_operand 2 "nonimmediate_operand" "fm,0"))]))] "TARGET_80387" "* return output_387_binary_op (insn, operands);" [(set (attr "type") @@ -14487,41 +14801,10 @@ (define_insn "*fop_xf_6" [(set (match_operand:XF 0 "register_operand" "=f,f") (match_operator:XF 3 "binary_fp_operator" - [(float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "fm,0")) - (match_operand:XF 2 "register_operand" "0,f")]))] - "!TARGET_64BIT && TARGET_80387" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (cond [(match_operand:XF 3 "mult_operator" "") - (const_string "fmul") - (match_operand:XF 3 "div_operator" "") - (const_string "fdiv") - ] - (const_string "fop"))) - (set_attr "mode" "DF")]) - -(define_insn "*fop_tf_6" - [(set (match_operand:TF 0 "register_operand" "=f,f") - (match_operator:TF 3 "binary_fp_operator" - [(float_extend:TF (match_operand:DF 1 "nonimmediate_operand" "fm,0")) - (match_operand:TF 2 "register_operand" "0,f")]))] - "TARGET_80387" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (cond [(match_operand:TF 3 "mult_operator" "") - (const_string "fmul") - (match_operand:TF 3 "div_operator" "") - (const_string "fdiv") - ] - (const_string "fop"))) - (set_attr "mode" "DF")]) - -(define_insn "*fop_xf_7" - [(set (match_operand:XF 0 "register_operand" "=f,f") - (match_operator:XF 3 "binary_fp_operator" - [(match_operand:XF 1 "register_operand" "0,f") + [(float_extend:XF + (match_operand 1 "register_operand" "0,f")) (float_extend:XF - (match_operand:DF 2 "nonimmediate_operand" "fm,0"))]))] + (match_operand 2 "nonimmediate_operand" "fm,0"))]))] "!TARGET_64BIT && TARGET_80387" "* return output_387_binary_op (insn, operands);" [(set (attr "type") @@ -14531,14 +14814,15 @@ (const_string "fdiv") ] (const_string "fop"))) - (set_attr "mode" "DF")]) + (set_attr "mode" "SF")]) -(define_insn "*fop_tf_7" +(define_insn "*fop_tf_6" [(set (match_operand:TF 0 "register_operand" "=f,f") (match_operator:TF 3 "binary_fp_operator" - [(match_operand:TF 1 "register_operand" "0,f") + [(float_extend:TF + (match_operand 1 "register_operand" "0,f")) (float_extend:TF - (match_operand:DF 2 "nonimmediate_operand" "fm,0"))]))] + (match_operand 2 "nonimmediate_operand" "fm,0"))]))] "TARGET_80387" "* return output_387_binary_op (insn, operands);" [(set (attr "type") @@ -14548,7 +14832,7 @@ (const_string "fdiv") ] (const_string "fop"))) - (set_attr "mode" "DF")]) + (set_attr "mode" "SF")]) (define_split [(set (match_operand 0 "register_operand" "") @@ -15949,9 +16233,9 @@ (define_expand "movhicc" [(set (match_operand:HI 0 "register_operand" "") (if_then_else:HI (match_operand 1 "comparison_operator" "") - (match_operand:HI 2 "nonimmediate_operand" "") - (match_operand:HI 3 "nonimmediate_operand" "")))] - "TARGET_CMOVE && TARGET_HIMODE_MATH" + (match_operand:HI 2 "general_operand" "") + (match_operand:HI 3 "general_operand" "")))] + "TARGET_HIMODE_MATH" "if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") (define_insn "*movhicc_noc" @@ -15968,6 +16252,33 @@ [(set_attr "type" "icmov") (set_attr "mode" "HI")]) +(define_expand "movqicc" + [(set (match_operand:QI 0 "register_operand" "") + (if_then_else:QI (match_operand 1 "comparison_operator" "") + (match_operand:QI 2 "general_operand" "") + (match_operand:QI 3 "general_operand" "")))] + "TARGET_QIMODE_MATH" + "if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") + +(define_insn_and_split "*movqicc_noc" + [(set (match_operand:QI 0 "register_operand" "=r,r") + (if_then_else:QI (match_operator 1 "ix86_comparison_operator" + [(match_operand 4 "flags_reg_operand" "") (const_int 0)]) + (match_operand:QI 2 "register_operand" "r,0") + (match_operand:QI 3 "register_operand" "0,r")))] + "TARGET_CMOVE && !TARGET_PARTIAL_REG_STALL" + "#" + "&& reload_completed" + [(set (match_dup 0) + (if_then_else:SI (match_op_dup 1 [(match_dup 4) (const_int 0)]) + (match_dup 2) + (match_dup 3)))] + "operands[0] = gen_lowpart (SImode, operands[0]); + operands[2] = gen_lowpart (SImode, operands[2]); + operands[3] = gen_lowpart (SImode, operands[3]);" + [(set_attr "type" "icmov") + (set_attr "mode" "SI")]) + (define_expand "movsfcc" [(set (match_operand:SF 0 "register_operand" "") (if_then_else:SF (match_operand 1 "comparison_operator" "") @@ -16035,7 +16346,7 @@ (define_split [(set (match_operand:DF 0 "register_and_not_any_fp_reg_operand" "") (if_then_else:DF (match_operator 1 "fcmov_comparison_operator" - [(match_operand 4 "" "") (const_int 0)]) + [(match_operand 4 "flags_reg_operand" "") (const_int 0)]) (match_operand:DF 2 "nonimmediate_operand" "") (match_operand:DF 3 "nonimmediate_operand" "")))] "!TARGET_64BIT && reload_completed" @@ -16549,6 +16860,12 @@ (clobber (reg:CC 17))] "TARGET_SSE && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM) + /* Avoid combine from being smart and converting min/max + instruction patterns into conditional moves. */ + && ((GET_CODE (operands[1]) != LT && GET_CODE (operands[1]) != GT + && GET_CODE (operands[1]) != UNLE && GET_CODE (operands[1]) != UNGE) + || !rtx_equal_p (operands[4], operands[2]) + || !rtx_equal_p (operands[5], operands[3])) && (!TARGET_IEEE_FP || (GET_CODE (operands[1]) != EQ && GET_CODE (operands[1]) != NE))" "#") @@ -16576,6 +16893,12 @@ (clobber (reg:CC 17))] "TARGET_SSE2 && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM) + /* Avoid combine from being smart and converting min/max + instruction patterns into conditional moves. */ + && ((GET_CODE (operands[1]) != LT && GET_CODE (operands[1]) != GT + && GET_CODE (operands[1]) != UNLE && GET_CODE (operands[1]) != UNGE) + || !rtx_equal_p (operands[4], operands[2]) + || !rtx_equal_p (operands[5], operands[3])) && (!TARGET_IEEE_FP || (GET_CODE (operands[1]) != EQ && GET_CODE (operands[1]) != NE))" "#") @@ -16637,6 +16960,14 @@ (set (subreg:TI (match_dup 0) 0) (ior:TI (subreg:TI (match_dup 6) 0) (subreg:TI (match_dup 7) 0)))] { + if (GET_MODE (operands[2]) == DFmode + && TARGET_SSE_PARTIAL_REGS && !optimize_size) + { + rtx op = simplify_gen_subreg (V2DFmode, operands[2], DFmode, 0); + emit_insn (gen_sse2_unpcklpd (op, op, op)); + op = simplify_gen_subreg (V2DFmode, operands[3], DFmode, 0); + emit_insn (gen_sse2_unpcklpd (op, op, op)); + } /* If op2 == op3, op3 will be clobbered before it is used. This should be optimized out though. */ if (operands_match_p (operands[2], operands[3])) @@ -16743,8 +17074,22 @@ || const0_operand (operands[3], GET_MODE (operands[0])))" [(set (match_dup 0) (match_op_dup 1 [(match_dup 0) (match_dup 5)])) (set (subreg:TI (match_dup 0) 0) (and:TI (match_dup 6) - (subreg:TI (match_dup 7) 0)))] + (match_dup 7)))] { + if (TARGET_SSE_PARTIAL_REGS && !optimize_size + && GET_MODE (operands[2]) == DFmode) + { + if (REG_P (operands[2])) + { + rtx op = simplify_gen_subreg (V2DFmode, operands[2], DFmode, 0); + emit_insn (gen_sse2_unpcklpd (op, op, op)); + } + if (REG_P (operands[3])) + { + rtx op = simplify_gen_subreg (V2DFmode, operands[3], DFmode, 0); + emit_insn (gen_sse2_unpcklpd (op, op, op)); + } + } PUT_MODE (operands[1], GET_MODE (operands[0])); if (!sse_comparison_operator (operands[1], VOIDmode)) { @@ -16764,6 +17109,8 @@ operands[7] = operands[2]; operands[6] = gen_rtx_SUBREG (TImode, operands[0], 0); } + operands[7] = simplify_gen_subreg (TImode, operands[7], + GET_MODE (operands[7]), 0); }) (define_expand "allocate_stack_worker" @@ -17759,19 +18106,23 @@ [(set (match_operand 0 "" "") (call (mem:QI (match_operand:SI 1 "call_insn_operand" "rsm")) (match_operand:SI 2 "" "")))] - "!TARGET_64BIT" + "!SIBLING_CALL_P (insn) && !TARGET_64BIT" { if (constant_call_address_operand (operands[1], QImode)) - { - if (SIBLING_CALL_P (insn)) - return "jmp\t%P1"; - else - return "call\t%P1"; - } - if (SIBLING_CALL_P (insn)) - return "jmp\t%*%1"; - else - return "call\t%*%1"; + return "call\t%P1"; + return "call\t%*%1"; +} + [(set_attr "type" "callv")]) + +(define_insn "*sibcall_value_1" + [(set (match_operand 0 "" "") + (call (mem:QI (match_operand:SI 1 "sibcall_insn_operand" "s,c,d,a")) + (match_operand:SI 2 "" "")))] + "SIBLING_CALL_P (insn) && !TARGET_64BIT" +{ + if (constant_call_address_operand (operands[1], QImode)) + return "jmp\t%P1"; + return "jmp\t%*%1"; } [(set_attr "type" "callv")]) @@ -17779,21 +18130,29 @@ [(set (match_operand 0 "" "") (call (mem:QI (match_operand:DI 1 "call_insn_operand" "rsm")) (match_operand:DI 2 "" "")))] - "TARGET_64BIT" + "!SIBLING_CALL_P (insn) && TARGET_64BIT" { if (constant_call_address_operand (operands[1], QImode)) - { - if (SIBLING_CALL_P (insn)) - return "jmp\t%P1"; - else - return "call\t%P1"; - } - if (SIBLING_CALL_P (insn)) - return "jmp\t%A1"; - else - return "call\t%A1"; + return "call\t%P1"; + return "call\t%A1"; } [(set_attr "type" "callv")]) + +(define_insn "*sibcall_value_1_rex64" + [(set (match_operand 0 "" "") + (call (mem:QI (match_operand:DI 1 "constant_call_address_operand" "")) + (match_operand:DI 2 "" "")))] + "SIBLING_CALL_P (insn) && TARGET_64BIT" + "jmp\t%P1" + [(set_attr "type" "callv")]) + +(define_insn "*sibcall_value_1_rex64_v" + [(set (match_operand 0 "" "") + (call (mem:QI (reg:DI 40)) + (match_operand:DI 1 "" "")))] + "SIBLING_CALL_P (insn) && TARGET_64BIT" + "jmp\t*%%r11" + [(set_attr "type" "callv")]) (define_insn "trap" [(trap_if (const_int 1) (const_int 5))] @@ -17838,7 +18197,7 @@ { operands[2] = gen_label_rtx (); output_asm_insn ("j%c0\t%l2\; int\t%1", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (operands[2])); RET; }) @@ -17851,28 +18210,93 @@ [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,m") (match_operand:V4SF 1 "nonimmediate_operand" "xm,x"))] "TARGET_SSE" - ;; @@@ let's try to use movaps here. "movaps\t{%1, %0|%0, %1}" [(set_attr "type" "ssemov") (set_attr "mode" "V4SF")]) +(define_split + [(set (match_operand:V4SF 0 "register_operand" "") + (match_operand:V4SF 1 "zero_extended_scalar_load_operand" ""))] + "TARGET_SSE" + [(set (match_dup 0) + (vec_merge:V4SF + (vec_duplicate:V4SF (match_dup 1)) + (match_dup 2) + (const_int 1)))] +{ + operands[1] = simplify_gen_subreg (SFmode, operands[1], V4SFmode, 0); + operands[2] = CONST0_RTX (V4SFmode); +}) + (define_insn "movv4si_internal" [(set (match_operand:V4SI 0 "nonimmediate_operand" "=x,m") (match_operand:V4SI 1 "nonimmediate_operand" "xm,x"))] "TARGET_SSE" - ;; @@@ let's try to use movaps here. - "movaps\t{%1, %0|%0, %1}" +{ + if (get_attr_mode (insn) == MODE_V4SF) + return "movaps\t{%1, %0|%0, %1}"; + else + return "movdqa\t{%1, %0|%0, %1}"; +} [(set_attr "type" "ssemov") - (set_attr "mode" "V4SF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "0") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI")) + (eq_attr "alternative" "1") + (if_then_else + (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") + (const_int 0)) + (ne (symbol_ref "optimize_size") + (const_int 0))) + (const_string "V4SF") + (const_string "TI"))] + (const_string "TI")))]) (define_insn "movv2di_internal" [(set (match_operand:V2DI 0 "nonimmediate_operand" "=x,m") (match_operand:V2DI 1 "nonimmediate_operand" "xm,x"))] - "TARGET_SSE" - ;; @@@ let's try to use movaps here. - "movdqa\t{%1, %0|%0, %1}" + "TARGET_SSE2" +{ + if (get_attr_mode (insn) == MODE_V4SF) + return "movaps\t{%1, %0|%0, %1}"; + else + return "movdqa\t{%1, %0|%0, %1}"; +} [(set_attr "type" "ssemov") - (set_attr "mode" "V4SF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "0") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI")) + (eq_attr "alternative" "1") + (if_then_else + (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") + (const_int 0)) + (ne (symbol_ref "optimize_size") + (const_int 0))) + (const_string "V4SF") + (const_string "TI"))] + (const_string "TI")))]) + +(define_split + [(set (match_operand:V2DF 0 "register_operand" "") + (match_operand:V2DF 1 "zero_extended_scalar_load_operand" ""))] + "TARGET_SSE2" + [(set (match_dup 0) + (vec_merge:V2DF + (vec_duplicate:V2DF (match_dup 1)) + (match_dup 2) + (const_int 1)))] +{ + operands[1] = simplify_gen_subreg (DFmode, operands[1], V2DFmode, 0); + operands[2] = CONST0_RTX (V2DFmode); +}) (define_insn "movv8qi_internal" [(set (match_operand:V8QI 0 "nonimmediate_operand" "=y,m") @@ -17922,28 +18346,85 @@ [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,m") (match_operand:V2DF 1 "nonimmediate_operand" "xm,x"))] "TARGET_SSE2" - ;; @@@ let's try to use movaps here. - "movapd\t{%1, %0|%0, %1}" +{ + if (get_attr_mode (insn) == MODE_V4SF) + return "movaps\t{%1, %0|%0, %1}"; + else + return "movapd\t{%1, %0|%0, %1}"; +} [(set_attr "type" "ssemov") - (set_attr "mode" "V2DF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "0") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "V2DF")) + (eq_attr "alternative" "1") + (if_then_else + (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") + (const_int 0)) + (ne (symbol_ref "optimize_size") + (const_int 0))) + (const_string "V4SF") + (const_string "V2DF"))] + (const_string "V2DF")))]) (define_insn "movv8hi_internal" [(set (match_operand:V8HI 0 "nonimmediate_operand" "=x,m") (match_operand:V8HI 1 "nonimmediate_operand" "xm,x"))] "TARGET_SSE2" - ;; @@@ let's try to use movaps here. - "movaps\t{%1, %0|%0, %1}" +{ + if (get_attr_mode (insn) == MODE_V4SF) + return "movaps\t{%1, %0|%0, %1}"; + else + return "movdqa\t{%1, %0|%0, %1}"; +} [(set_attr "type" "ssemov") - (set_attr "mode" "V4SF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "0") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI")) + (eq_attr "alternative" "1") + (if_then_else + (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") + (const_int 0)) + (ne (symbol_ref "optimize_size") + (const_int 0))) + (const_string "V4SF") + (const_string "TI"))] + (const_string "TI")))]) (define_insn "movv16qi_internal" [(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m") (match_operand:V16QI 1 "nonimmediate_operand" "xm,x"))] "TARGET_SSE2" - ;; @@@ let's try to use movaps here. - "movaps\t{%1, %0|%0, %1}" +{ + if (get_attr_mode (insn) == MODE_V4SF) + return "movaps\t{%1, %0|%0, %1}"; + else + return "movdqa\t{%1, %0|%0, %1}"; +} [(set_attr "type" "ssemov") - (set_attr "mode" "V4SF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "0") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI")) + (eq_attr "alternative" "1") + (if_then_else + (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") + (const_int 0)) + (ne (symbol_ref "optimize_size") + (const_int 0))) + (const_string "V4SF") + (const_string "TI"))] + (const_string "TI")))]) (define_expand "movv2df" [(set (match_operand:V2DF 0 "general_operand" "") @@ -18160,26 +18641,83 @@ [(set (match_operand:TI 0 "nonimmediate_operand" "=x,x,m") (match_operand:TI 1 "general_operand" "C,xm,x"))] "TARGET_SSE && !TARGET_64BIT" - "@ - xorps\t%0, %0 - movaps\t{%1, %0|%0, %1} - movaps\t{%1, %0|%0, %1}" +{ + switch (which_alternative) + { + case 0: + if (get_attr_mode (insn) == MODE_V4SF) + return "xorps\t%0, %0"; + else + return "pxor\t%0, %0"; + case 1: + case 2: + if (get_attr_mode (insn) == MODE_V4SF) + return "movaps\t{%1, %0|%0, %1}"; + else + return "movdqa\t{%1, %0|%0, %1}"; + default: + abort (); + } +} [(set_attr "type" "ssemov,ssemov,ssemov") - (set_attr "mode" "V4SF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "0,1") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI")) + (eq_attr "alternative" "2") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI"))] + (const_string "TI")))]) (define_insn "*movti_rex64" - [(set (match_operand:TI 0 "nonimmediate_operand" "=r,o,x,mx,x") - (match_operand:TI 1 "general_operand" "riFo,riF,O,x,m"))] + [(set (match_operand:TI 0 "nonimmediate_operand" "=r,o,x,x,xm") + (match_operand:TI 1 "general_operand" "riFo,riF,O,xm,x"))] "TARGET_64BIT && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)" - "@ - # - # - xorps\t%0, %0 - movaps\\t{%1, %0|%0, %1} - movaps\\t{%1, %0|%0, %1}" +{ + switch (which_alternative) + { + case 0: + case 1: + return "#"; + case 2: + if (get_attr_mode (insn) == MODE_V4SF) + return "xorps\t%0, %0"; + else + return "pxor\t%0, %0"; + case 3: + case 4: + if (get_attr_mode (insn) == MODE_V4SF) + return "movaps\t{%1, %0|%0, %1}"; + else + return "movdqa\t{%1, %0|%0, %1}"; + default: + abort (); + } +} [(set_attr "type" "*,*,ssemov,ssemov,ssemov") - (set_attr "mode" "V4SF")]) + (set (attr "mode") + (cond [(eq_attr "alternative" "2,3") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI")) + (eq_attr "alternative" "4") + (if_then_else + (ior (ne (symbol_ref "TARGET_SSE_TYPELESS_STORES") + (const_int 0)) + (ne (symbol_ref "optimize_size") + (const_int 0))) + (const_string "V4SF") + (const_string "TI"))] + (const_string "DI")))]) (define_split [(set (match_operand:TI 0 "nonimmediate_operand" "") @@ -18329,11 +18867,21 @@ [(set_attr "type" "ssecvt") (set_attr "mode" "V4SF")]) -(define_insn "sse_loadss" +(define_expand "sse_loadss" + [(match_operand:V4SF 0 "register_operand" "") + (match_operand:SF 1 "memory_operand" "")] + "TARGET_SSE" +{ + emit_insn (gen_sse_loadss_1 (operands[0], operands[1], + CONST0_RTX (V4SFmode))); + DONE; +}) + +(define_insn "sse_loadss_1" [(set (match_operand:V4SF 0 "register_operand" "=x") (vec_merge:V4SF - (match_operand:V4SF 1 "memory_operand" "m") - (vec_duplicate:V4SF (float:SF (const_int 0))) + (vec_duplicate:V4SF (match_operand:SF 1 "memory_operand" "m")) + (match_operand:V4SF 2 "const0_operand" "X") (const_int 1)))] "TARGET_SSE" "movss\t{%1, %0|%0, %1}" @@ -18856,12 +19404,26 @@ ;; this insn. (define_insn "sse_clrv4sf" [(set (match_operand:V4SF 0 "register_operand" "=x") - (unspec:V4SF [(const_int 0)] UNSPEC_NOP))] + (match_operand:V4SF 1 "const0_operand" "X"))] "TARGET_SSE" - "xorps\t{%0, %0|%0, %0}" +{ + if (get_attr_mode (insn) == MODE_TI) + return "pxor\t{%0, %0|%0, %0}"; + else + return "xorps\t{%0, %0|%0, %0}"; +} [(set_attr "type" "sselog") (set_attr "memory" "none") - (set_attr "mode" "V4SF")]) + (set (attr "mode") + (if_then_else + (and (and (ne (symbol_ref "TARGET_SSE_LOAD0_BY_PXOR") + (const_int 0)) + (ne (symbol_ref "TARGET_SSE2") + (const_int 0))) + (eq (symbol_ref "optimize_size") + (const_int 0))) + (const_string "TI") + (const_string "V4SF")))]) ;; Use xor, but don't show input operands so they aren't live before ;; this insn. @@ -19093,6 +19655,18 @@ [(set_attr "type" "ssecvt") (set_attr "mode" "SF")]) +(define_insn "cvtsi2ssq" + [(set (match_operand:V4SF 0 "register_operand" "=x") + (vec_merge:V4SF + (match_operand:V4SF 1 "register_operand" "0") + (vec_duplicate:V4SF + (float:SF (match_operand:DI 2 "nonimmediate_operand" "rm"))) + (const_int 14)))] + "TARGET_SSE && TARGET_64BIT" + "cvtsi2ssq\t{%2, %0|%0, %2}" + [(set_attr "type" "ssecvt") + (set_attr "mode" "SF")]) + (define_insn "cvtss2si" [(set (match_operand:SI 0 "register_operand" "=r") (vec_select:SI @@ -19883,7 +20457,7 @@ output_asm_insn (\"rex\", operands); output_asm_insn (\"movaps\\t{%5, %4|%4, %5}\", operands); } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[3])); RET; } @@ -20720,7 +21294,7 @@ (vec_merge:V4SF (match_operand:V4SF 1 "register_operand" "0") (vec_duplicate:V4SF (float_truncate:V2SF - (match_operand:V2DF 2 "register_operand" "xm"))) + (match_operand:V2DF 2 "nonimmediate_operand" "xm"))) (const_int 14)))] "TARGET_SSE2" "cvtsd2ss\t{%2, %0|%0, %2}" @@ -20732,7 +21306,7 @@ (vec_merge:V2DF (match_operand:V2DF 1 "register_operand" "0") (float_extend:V2DF (vec_select:V2SF - (match_operand:V4SF 2 "register_operand" "xm") + (match_operand:V4SF 2 "nonimmediate_operand" "xm") (parallel [(const_int 0) (const_int 1)]))) (const_int 2)))] @@ -21008,10 +21582,20 @@ (define_insn "sse2_clrti" [(set (match_operand:TI 0 "register_operand" "=x") (const_int 0))] "TARGET_SSE2" - "pxor\t{%0, %0|%0, %0}" - [(set_attr "type" "sseiadd") +{ + if (get_attr_mode (insn) == MODE_TI) + return "pxor\t%0, %0"; + else + return "xorps\t%0, %0"; +} + [(set_attr "type" "ssemov") (set_attr "memory" "none") - (set_attr "mode" "TI")]) + (set (attr "mode") + (if_then_else + (ne (symbol_ref "optimize_size") + (const_int 0)) + (const_string "V4SF") + (const_string "TI")))]) ;; MMX unsigned averages/sum of absolute differences @@ -21716,11 +22300,21 @@ [(set_attr "type" "ssecvt") (set_attr "mode" "V2DF")]) -(define_insn "sse2_loadsd" +(define_expand "sse2_loadsd" + [(match_operand:V2DF 0 "register_operand" "") + (match_operand:DF 1 "memory_operand" "")] + "TARGET_SSE2" +{ + emit_insn (gen_sse2_loadsd_1 (operands[0], operands[1], + CONST0_RTX (V2DFmode))); + DONE; +}) + +(define_insn "sse2_loadsd_1" [(set (match_operand:V2DF 0 "register_operand" "=x") (vec_merge:V2DF - (match_operand:DF 1 "memory_operand" "m") - (vec_duplicate:DF (float:DF (const_int 0))) + (vec_duplicate:V2DF (match_operand:DF 1 "memory_operand" "m")) + (match_operand:V2DF 2 "const0_operand" "X") (const_int 1)))] "TARGET_SSE2" "movsd\t{%1, %0|%0, %1}" diff --git a/gcc/config/i386/k6.md b/gcc/config/i386/k6.md index af128bfe037..d9f6d84b022 100644 --- a/gcc/config/i386/k6.md +++ b/gcc/config/i386/k6.md @@ -71,7 +71,7 @@ ;; Load unit have two cycle latency, but we take care for it in adjust_cost (define_function_unit "k6_load" 1 0 (and (eq_attr "cpu" "k6") - (ior (eq_attr "type" "pop") + (ior (eq_attr "type" "pop,leave") (eq_attr "memory" "load,both"))) 1 1) diff --git a/gcc/config/i386/lynx-ng.h b/gcc/config/i386/lynx-ng.h index 08fa60f430c..8d41add6cee 100644 --- a/gcc/config/i386/lynx-ng.h +++ b/gcc/config/i386/lynx-ng.h @@ -68,10 +68,3 @@ Boston, MA 02111-1307, USA. */ #undef ASM_GENERATE_INTERNAL_LABEL #define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \ sprintf ((BUF), ".%s%ld", (PREFIX), (long)(NUMBER)) - -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM) diff --git a/gcc/config/i386/lynx.h b/gcc/config/i386/lynx.h index 7835f2713f2..bdbfbe65f0f 100644 --- a/gcc/config/i386/lynx.h +++ b/gcc/config/i386/lynx.h @@ -69,10 +69,3 @@ Boston, MA 02111-1307, USA. */ #undef ASM_GENERATE_INTERNAL_LABEL #define ASM_GENERATE_INTERNAL_LABEL(BUF,PREFIX,NUMBER) \ sprintf ((BUF), ".%s%ld", (PREFIX), (long)(NUMBER)) - -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM) diff --git a/gcc/config/i386/pentium.md b/gcc/config/i386/pentium.md index b4c5ece3678..24f8becb02a 100644 --- a/gcc/config/i386/pentium.md +++ b/gcc/config/i386/pentium.md @@ -194,7 +194,7 @@ (define_insn_reservation "pent_pop" 1 (and (eq_attr "cpu" "pentium") - (eq_attr "type" "pop")) + (eq_attr "type" "pop,leave")) "pentium-firstuv") ;; Call and branch instruction can execute in either pipe, but diff --git a/gcc/config/i386/ppro.md b/gcc/config/i386/ppro.md index 86906856469..67cc1f1e293 100644 --- a/gcc/config/i386/ppro.md +++ b/gcc/config/i386/ppro.md @@ -29,7 +29,7 @@ (define_attr "ppro_uops" "one,few,many" (cond [(eq_attr "type" "other,multi,call,callv,fpspc,str") (const_string "many") - (eq_attr "type" "icmov,fcmov,str,cld") + (eq_attr "type" "icmov,fcmov,str,cld,leave") (const_string "few") (eq_attr "type" "imov") (if_then_else (eq_attr "memory" "store,both") @@ -118,7 +118,7 @@ (define_function_unit "ppro_p2" 1 0 (and (eq_attr "cpu" "pentiumpro") - (ior (eq_attr "type" "pop") + (ior (eq_attr "type" "pop,leave") (eq_attr "memory" "load,both"))) 3 1) diff --git a/gcc/config/i386/sco5.h b/gcc/config/i386/sco5.h index 815e45771d6..3b25b65d826 100644 --- a/gcc/config/i386/sco5.h +++ b/gcc/config/i386/sco5.h @@ -343,7 +343,7 @@ do { \ do { \ if (TARGET_ELF) \ ASM_OUTPUT_ALIGN ((FILE), 2); \ - ASM_OUTPUT_INTERNAL_LABEL((FILE),(PREFIX),(NUM)); \ + (*targetm.asm_out.internal_label)((FILE),(PREFIX),(NUM)); \ } while (0) #undef ASM_OUTPUT_IDENT @@ -354,10 +354,6 @@ do { \ #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \ if (TARGET_ELF) (*targetm.asm_out.globalize_label) (FILE, XSTR (FUN, 0)) -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM) - /* The prefix to add to user-visible assembler symbols. */ #undef USER_LABEL_PREFIX diff --git a/gcc/config/i386/t-cygwin b/gcc/config/i386/t-cygwin index 6fcb8340ddc..b4ea698cbc2 100644 --- a/gcc/config/i386/t-cygwin +++ b/gcc/config/i386/t-cygwin @@ -14,7 +14,9 @@ LIBGCC2_INCLUDES = -I$(srcdir)/../winsup/include \ -I$(srcdir)/../winsup/cygwin/include \ -I$(srcdir)/../winsup/w32api/include -winnt.o: $(srcdir)/config/i386/winnt.c $(RTL_H) $(TREE_H) $(CONFIG_H) $(TM_P_H) +winnt.o: $(srcdir)/config/i386/winnt.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h output.h $(TREE_H) flags.h \ + $(TM_P_H) toplev.h $(HASHTAB_H) $(GGC_H) $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/i386/winnt.c # Don't run fixproto diff --git a/gcc/config/i386/t-interix b/gcc/config/i386/t-interix index 710de8b0881..d5fff6167b7 100644 --- a/gcc/config/i386/t-interix +++ b/gcc/config/i386/t-interix @@ -1,6 +1,7 @@ LIB1ASMSRC = i386/cygwin.asm LIB1ASMFUNCS = _chkstk -winnt.o: $(srcdir)/config/i386/winnt.c $(TM_P_H) +winnt.o: $(srcdir)/config/i386/winnt.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h output.h $(TREE_H) flags.h \ + $(TM_P_H) toplev.h $(HASHTAB_H) $(GGC_H) $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/i386/winnt.c - diff --git a/gcc/config/i386/vxi386.h b/gcc/config/i386/vxi386.h deleted file mode 100644 index ee4a74093f8..00000000000 --- a/gcc/config/i386/vxi386.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Definitions of target machine for GNU compiler. VxWorks i386 version. - Copyright (C) 1998, 2002 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#undef TARGET_VERSION -#define TARGET_VERSION fprintf (stderr, " (80386, VxWorks BSD syntax)"); - -#define TARGET_OS_CPP_BUILTINS() \ - do \ - { \ - builtin_define ("__vxworks"); \ - builtin_assert ("system=unix"); \ - \ - if (TARGET_386) \ - builtin_define ("CPU=I80386"); \ - else if (TARGET_486) \ - builtin_define ("CPU=I80486"); \ - else if (TARGET_PENTIUM) \ - { \ - builtin_define ("CPU=PENTIUM"); \ - builtin_define ("CPU_VARIANT=PENTIUM"); \ - } \ - else if (TARGET_PENTIUMPRO) \ - { \ - builtin_define ("CPU=PENTIUM"); \ - builtin_define ("CPU_VARIANT=PENTIUMPRO"); \ - } \ - } \ - while (0) - -#define HANDLE_SYSV_PRAGMA 1 - -/* VxWorks does all the library stuff itself. */ - -#undef LIB_SPEC -#define LIB_SPEC "" - -/* VxWorks uses object files, not loadable images. make linker just - combine objects. */ - -#undef LINK_SPEC -#define LINK_SPEC "-r" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "" - -#undef ENDFILE_SPEC -#define ENDFILE_SPEC "" diff --git a/gcc/config/i386/winnt.c b/gcc/config/i386/winnt.c index 00b3dfd0442..bc2527aaca5 100644 --- a/gcc/config/i386/winnt.c +++ b/gcc/config/i386/winnt.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/i386/xm-i386-interix.h b/gcc/config/i386/xm-i386-interix.h deleted file mode 100644 index bd010e47bc5..00000000000 --- a/gcc/config/i386/xm-i386-interix.h +++ /dev/null @@ -1,32 +0,0 @@ -/* Configuration for GNU compiler - for an Intel i386 or later processor running Interix. - Copyright (C) 1999 Free Software Foundation, Inc. - Contributed by Donn Terry (donn@interix.com) - Derived from code by Douglas B. Rupp (drupp@cs.washington.edu) - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define HOST_BITS_PER_WIDEST_INT HOST_BITS_PER_LONGLONG -#ifdef __GNUC__ -# define HOST_WIDEST_INT long long -#else -# define HOST_WIDEST_INT __int64 -#endif -#define HOST_WIDEST_INT_PRINT_DEC "%lld" -#define HOST_WIDEST_INT_PRINT_UNSIGNED "%llu" -#define HOST_WIDEST_INT_PRINT_HEX "0x%llx" diff --git a/gcc/config/i960/i960-c.c b/gcc/config/i960/i960-c.c index b6a9b749d0c..781224a0e52 100644 --- a/gcc/config/i960/i960-c.c +++ b/gcc/config/i960/i960-c.c @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "cpplib.h" #include "tree.h" #include "c-pragma.h" diff --git a/gcc/config/i960/i960.c b/gcc/config/i960/i960.c index 102729e444b..08894aa46b1 100644 --- a/gcc/config/i960/i960.c +++ b/gcc/config/i960/i960.c @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include <math.h> #include "rtl.h" #include "regs.h" diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index 9af2964fbbb..3ce98e23011 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -931,12 +931,6 @@ struct cum_args { int ca_nregparms; int ca_nstackparms; }; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -1259,12 +1253,6 @@ extern struct rtx_def *i960_compare_op0, *i960_compare_op1; #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -1350,13 +1338,6 @@ extern struct rtx_def *i960_compare_op0, *i960_compare_op1; #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_CODE_ALIGN ? 3 : 0) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ - ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) /* Print operand X (an rtx) in assembler syntax to file FILE. CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. diff --git a/gcc/config/i960/t-960bare b/gcc/config/i960/t-960bare index 7c243643cb0..e335294f11b 100644 --- a/gcc/config/i960/t-960bare +++ b/gcc/config/i960/t-960bare @@ -18,9 +18,9 @@ xp-bit.c: $(srcdir)/config/fp-bit.c echo '#define EXTENDED_FLOAT_STUBS' > xp-bit.c cat $(srcdir)/config/fp-bit.c >> xp-bit.c -i960-c.o: $(srcdir)/config/i960/i960-c.c $(CONFIG_H) $(SYSTEM_H) cpplib.h \ - $(TREE_H) c-pragma.h toplev.h $(GGC_H) $(TM_P_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< +i960-c.o: $(srcdir)/config/i960/i960-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h + $(TM_H) $(CPPLIB_H) $(TREE_H) c-pragma.h toplev.h $(GGC_H) $(TM_P_H) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/i960/i960-c.c MULTILIB_OPTIONS=mnumerics/msoft-float mlong-double-64 MULTILIB_DIRNAMES=float soft-float ld64 diff --git a/gcc/config/i960/t-vxworks960 b/gcc/config/i960/t-vxworks960 deleted file mode 100644 index 0c5f40fdbf5..00000000000 --- a/gcc/config/i960/t-vxworks960 +++ /dev/null @@ -1,33 +0,0 @@ -# We don't want to put exit in libgcc.a for VxWorks, because VxWorks -# does not have _exit. -TARGET_LIBGCC2_CFLAGS = -Dexit=unused_exit -LIB2FUNCS_EXTRA = xp-bit.c - -# We want fine grained libraries, so use the new code to build the -# floating point emulation libraries. -FPBIT = fp-bit.c -DPBIT = dp-bit.c - -dp-bit.c: $(srcdir)/config/fp-bit.c - echo '#define FLOAT_BIT_ORDER_MISMATCH' > dp-bit.c - cat $(srcdir)/config/fp-bit.c >> dp-bit.c - -fp-bit.c: $(srcdir)/config/fp-bit.c - echo '#define FLOAT' > fp-bit.c - echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c - cat $(srcdir)/config/fp-bit.c >> fp-bit.c - -xp-bit.c: $(srcdir)/config/fp-bit.c - echo '#define EXTENDED_FLOAT_STUBS' > xp-bit.c - cat $(srcdir)/config/fp-bit.c >> xp-bit.c - -i960-c.o: $(srcdir)/config/i960/i960-c.c $(CONFIG_H) $(SYSTEM_H) cpplib.h \ - $(TREE_H) c-pragma.h toplev.h $(GGC_H) $(TM_P_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< - -MULTILIB_OPTIONS=mnumerics/msoft-float mlong-double-64 -MULTILIB_DIRNAMES=float soft-float ld64 -MULTILIB_MATCHES=mnumerics=msb mnumerics=msc mnumerics=mkb mnumerics=mkc mnumerics=mmc mnumerics=mcb mnumerics=mcc msoft-float=msa msoft-float=mka msoft-float=mca msoft-float=mcf - -LIBGCC = stmp-multilib -INSTALL_LIBGCC = install-multilib diff --git a/gcc/config/i960/vx960-coff.h b/gcc/config/i960/vx960-coff.h deleted file mode 100644 index 76352582671..00000000000 --- a/gcc/config/i960/vx960-coff.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Definitions of target machine for GNU compiler. Vxworks i960 version. - Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* This file just exists to give specs for the 960 running on VxWorks. - VxWorks does all the library stuff itself. */ - -#undef MULTILIB_DEFAULTS -#define MULTILIB_DEFAULTS { "msoft-float" } - -#undef LIB_SPEC -#define LIB_SPEC "" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "" - -/* Predefine vxworks. */ - -#undef CPP_PREDEFINES -#define CPP_PREDEFINES "-Di960 -Di80960 -DI960 -DI80960 -Dvxworks -Acpu=i960 -Amachine=i960" - -/* The VxWorks header files expect the compiler to define CPU to a - magic number. Note that we define CPU here even if the user - has specified -ansi. This violates user namespace, but the VxWorks - headers, and potentially user code, all explicitly rely upon the - definition of CPU in order to get the proper processor information. */ - -#undef CPP_SPEC -#define CPP_SPEC "%{mic*:-D__i960\ - %{mka:-D__i960KA}%{mkb:-D__i960KB}\ - %{msa:-D__i960SA}%{msb:-D__i960SB}\ - %{mmc:-D__i960MC}\ - %{mca:-D__i960CA}%{mcc:-D__i960CC}\ - %{mcf:-D__i960CF}}\ - %{mka:-D__i960KA__ -D__i960_KA__ -DCPU=I960KA}\ - %{mkb:-D__i960KB__ -D__i960_KB__ -DCPU=I960KB}\ - %{msa:-D__i960SA__ -D__i960_SA__}\ - %{msb:-D__i960SB__ -D__i960_SB__}\ - %{mmc:-D__i960MC__ -D__i960_MC__}\ - %{mca:-D__i960CA__ -D__i960_CA__ -DCPU=I960CA}\ - %{mcc:-D__i960CC__ -D__i960_CC__}\ - %{mcf:-D__i960CF__ -D__i960_CF__}\ - %{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:\ - %{!mcc:%{!mcf:-D__i960_CA -D__i960CA__ -DCPU=I960CA\ - %{mic*:-D__i960CA}}}}}}}}}\ - %{mlong-double-64:-D__LONG_DOUBLE_64__}" - -/* Default to -mca. */ - -#undef CC1_SPEC -#define CC1_SPEC \ - "%{!mka:%{!mkb:%{!msa:%{!msb:%{!mmc:%{!mca:%{!mcc:%{!mcf:-mca}}}}}}}}\ - %{!gs*:%{!gc*:%{mbout:%{g*:-gstabs}}\ - %{mcoff:%{g*:-gcoff}}\ - %{!mbout:%{!mcoff:%{g*:-gcoff}}}}}" diff --git a/gcc/config/i960/vx960.h b/gcc/config/i960/vx960.h deleted file mode 100644 index ebf70dc183a..00000000000 --- a/gcc/config/i960/vx960.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Definitions of target machine for GNU compiler. Vxworks i960 version. - Copyright (C) 1994, 1996 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* This file just exists to give specs for the 960 running on VxWorks. - VxWorks does all the library stuff itself. */ - -#undef LIB_SPEC -#define LIB_SPEC "" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "" diff --git a/gcc/config/ia64/ia64-c.c b/gcc/config/ia64/ia64-c.c index c19a5860532..efd3a9a1efc 100644 --- a/gcc/config/ia64/ia64-c.c +++ b/gcc/config/ia64/ia64-c.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "cpplib.h" #include "c-common.h" diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 10f06665999..dd7b6d7350a 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h index 59f60d05bfa..3cfc061920f 100644 --- a/gcc/config/ia64/ia64.h +++ b/gcc/config/ia64/ia64.h @@ -1903,18 +1903,9 @@ do { \ sprintf (LABEL, "*.%s%d", PREFIX, NUM); \ } while (0) -/* A C expression to assign to OUTVAR (which is a variable of type `char *') a - newly allocated string made from the string NAME and the number NUMBER, with - some suitable punctuation added. */ - /* ??? Not sure if using a ? in the name for Intel as is safe. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \ -do { \ - (OUTVAR) = (char *) alloca (strlen (NAME) + 12); \ - sprintf (OUTVAR, "%s%c%ld", (NAME), (TARGET_GNU_AS ? '.' : '?'), \ - (long)(NUMBER)); \ -} while (0) +#define ASM_PN_FORMAT (TARGET_GNU_AS ? "%s.%lu" : "%s?%lu") /* A C statement to output to the stdio stream STREAM assembler code which defines (equates) the symbol NAME to have the value VALUE. */ @@ -2231,7 +2222,7 @@ do { \ /* Use tags for debug info labels, so that they don't break instruction bundles. This also avoids getting spurious DV warnings from the - assembler. This is similar to ASM_OUTPUT_INTERNAL_LABEL, except that we + assembler. This is similar to (*targetm.asm_out.internal_label), except that we add brackets around the label. */ #define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \ diff --git a/gcc/config/ia64/t-ia64 b/gcc/config/ia64/t-ia64 index 0cfd9483879..67362a898cd 100644 --- a/gcc/config/ia64/t-ia64 +++ b/gcc/config/ia64/t-ia64 @@ -43,5 +43,5 @@ crtfastmath.o: $(srcdir)/config/ia64/crtfastmath.c $(GCC_PASSES) LIB2ADDEH = $(srcdir)/config/ia64/unwind-ia64.c $(srcdir)/unwind-sjlj.c ia64-c.o: $(srcdir)/config/ia64/ia64-c.c $(CONFIG_H) $(SYSTEM_H) \ - $(TREE_H) $(CPPLIB_H) $(C_COMMON_H) c-pragma.h toplev.h - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< + coretypes.h $(TM_H) $(TREE_H) $(CPPLIB_H) $(C_COMMON_H) c-pragma.h toplev.h + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/ia64/ia64-c.c diff --git a/gcc/config/interix.h b/gcc/config/interix.h index 8d9f58f8b5b..d04e5477dd7 100644 --- a/gcc/config/interix.h +++ b/gcc/config/interix.h @@ -70,19 +70,6 @@ for windows/multi thread */ && strcmp (STR, "Tbss")) -#if 0 -/* don't do this until we can sort out the default path issues. MK */ -#undef STANDARD_EXEC_PREFIX -#define STANDARD_EXEC_PREFIX "" - -#undef STANDARD_STARTFILE_PREFIX -#define STANDARD_STARTFILE_PREFIX "" - -#undef TOOLDIR_BASE_PREFIX -#define TOOLDIR_BASE_PREFIX "" - -#endif /* 0 */ - #define STDC_0_IN_SYSTEM_HEADERS 1 #define HANDLE_SYSV_PRAGMA 1 diff --git a/gcc/config/ip2k/ip2k.c b/gcc/config/ip2k/ip2k.c index c0a643ae1d1..93d2ab27f5c 100644 --- a/gcc/config/ip2k/ip2k.c +++ b/gcc/config/ip2k/ip2k.c @@ -22,6 +22,8 @@ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/ip2k/ip2k.h b/gcc/config/ip2k/ip2k.h index 00be9c4408d..467dfa7b2d2 100644 --- a/gcc/config/ip2k/ip2k.h +++ b/gcc/config/ip2k/ip2k.h @@ -2129,28 +2129,6 @@ do { \ /* Globalizing directive for a label. */ #define GLOBAL_ASM_OP ".global\t" -#undef ASM_FORMAT_PRIVATE_NAME -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - -/* A C expression to assign to OUTVAR (which is a variable of type - `char *') a newly allocated string made from the string NAME and - the number NUMBER, with some suitable punctuation added. Use - `alloca' to get space for the string. - - The string will be used as an argument to `ASM_OUTPUT_LABELREF' to - produce an assembler label for an internal static variable whose - name is NAME. Therefore, the string must be such as to result in - valid assembler code. The argument NUMBER is different each time - this macro is executed; it prevents conflicts between - similarly-named internal static variables in different scopes. - - Ideally this string should not be a valid C identifier, to prevent - any conflict with the user's own symbols. Most assemblers allow - periods or percent signs in assembler symbols; putting at least - one of these between the name and the number will suffice. */ - #define REGISTER_NAMES { \ "$00","$01","$02","$03","iph","ipl","sph","spl", \ "pch","pcl","wreg","status","dph","dpl","$0e","mulh", \ @@ -2266,7 +2244,7 @@ do { \ The definition should be a C statement to output to the stdio stream STREAM an assembler pseudo-instruction to generate a reference to a label. VALUE is the number of an internal label - whose definition is output using `ASM_OUTPUT_INTERNAL_LABEL'. For + whose definition is output using `(*targetm.asm_out.internal_label)'. For example, fprintf ((STREAM), "\t.word L%d\n", (VALUE)) */ diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 5903277c8c2..b95a4684a34 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "rtl.h" #include "regs.h" diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index f5513b8449f..195b4682a1f 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -1694,17 +1694,6 @@ sbss_section () \ } \ while (0) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ - do \ - { \ - (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10);\ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)); \ - } \ - while (0) - /* How to refer to registers in assembler output. This sequence is indexed by compiler's hard-register-number (see above). */ #ifndef SUBTARGET_REGISTER_NAMES diff --git a/gcc/config/m68hc11/m68hc11.c b/gcc/config/m68hc11/m68hc11.c index ac16b527a97..6f616594605 100644 --- a/gcc/config/m68hc11/m68hc11.c +++ b/gcc/config/m68hc11/m68hc11.c @@ -35,6 +35,8 @@ Note: #include <stdio.h> #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "tm_p.h" @@ -64,7 +66,6 @@ static int go_if_legitimate_address_internal PARAMS((rtx, enum machine_mode, int)); static int register_indirect_p PARAMS((rtx, enum machine_mode, int)); static rtx m68hc11_expand_compare PARAMS((enum rtx_code, rtx, rtx)); -static int m68hc11_autoinc_compatible_p PARAMS ((rtx, rtx)); static int must_parenthesize PARAMS ((rtx)); static int m68hc11_shift_cost PARAMS ((enum machine_mode, rtx, int)); static int m68hc11_auto_inc_p PARAMS ((rtx)); @@ -78,6 +79,8 @@ static void m68hc11_output_function_epilogue PARAMS ((FILE *, HOST_WIDE_INT)); static void m68hc11_asm_out_constructor PARAMS ((rtx, int)); static void m68hc11_asm_out_destructor PARAMS ((rtx, int)); static void m68hc11_encode_section_info PARAMS((tree, int)); +static int autoinc_mode PARAMS((rtx)); +static int m68hc11_make_autoinc_notes PARAMS((rtx *, void *)); rtx m68hc11_soft_tmp_reg; diff --git a/gcc/config/m68hc11/m68hc11.h b/gcc/config/m68hc11/m68hc11.h index bdd3fe198f9..393ab7bbf42 100644 --- a/gcc/config/m68hc11/m68hc11.h +++ b/gcc/config/m68hc11/m68hc11.h @@ -1604,16 +1604,6 @@ do { \ assemble_name (FILE, NAME); \ fputs ("\n", FILE);} - - -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* How to refer to registers in assembler output. This sequence is indexed by compiler's hard-register-number (see above). */ #define REGISTER_NAMES \ diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index a71e4f3f0f5..beeded3d6ad 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -1483,7 +1483,7 @@ if (X_REG_P (operands[0])) output_asm_insn (\"dex\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); if (!X_REG_P (operands[0])) { @@ -1552,7 +1552,7 @@ output_asm_insn (\"bpl\\t%l0\", ops); output_asm_insn (\"deca\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); } else @@ -1570,7 +1570,7 @@ output_asm_insn (\"bpl\\t%l0\", ops); } output_asm_insn (\"dec\\t%h0\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); } @@ -1653,7 +1653,7 @@ ops[0] = gen_label_rtx (); output_asm_insn (\"bpl\\t%l0\", ops); output_asm_insn (\"dex\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); return \"\"; }") @@ -1810,7 +1810,7 @@ output_asm_insn (\"inx\", ops); CC_STATUS_INIT; - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); return \"\"; }") @@ -1892,7 +1892,7 @@ output_asm_insn (\"bcc\\t%l3\", ops); output_asm_insn (\"inx\", ops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[3])); } CC_STATUS_INIT; @@ -1995,7 +1995,7 @@ output_asm_insn (inch_mem, ops); } } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); CC_STATUS_INIT; return \"\"; @@ -2060,7 +2060,7 @@ ops[0] = gen_label_rtx (); output_asm_insn (\"bcc\\t%l0\", ops); output_asm_insn (\"in%0\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); CC_STATUS_INIT; return \"\"; }") @@ -2538,7 +2538,7 @@ output_asm_insn (\"subd\\t%2\", operands); output_asm_insn (\"bcc\\t%l0\", ops); output_asm_insn (\"dex\", ops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); CC_STATUS_INIT; return \"\"; }") @@ -2565,7 +2565,7 @@ output_asm_insn (\"sbca\\t#0\", operands); output_asm_insn (\"bcc\\t%l0\", ops); output_asm_insn (\"dex\", ops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); CC_STATUS_INIT; return \"\"; }") @@ -3090,7 +3090,7 @@ if ((val & 0x0FF00) != 0x0FF00) output_asm_insn (\"bclr\\t0,%2, %h1\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); return \"\"; } @@ -3241,7 +3241,7 @@ output_asm_insn (\".relax\\t%l2\", ops); m68hc11_gen_movhi (insn, ops); output_asm_insn (\"bclr\\t0,%2, %1\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); return \"\"; } @@ -3357,7 +3357,7 @@ if ((val & 0x0FF00) != 0) output_asm_insn (\"bset\\t0,%2, %h1\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); return \"\"; } @@ -3455,7 +3455,7 @@ output_asm_insn (\".relax\\t%l2\", ops); m68hc11_gen_movhi (insn, ops); output_asm_insn (\"bset\\t0,%2, %1\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[2])); return \"\"; } @@ -4283,7 +4283,7 @@ output_asm_insn (\"comb\\n\\tcoma\\n\\tinx\\n\\txgdx\", operands); output_asm_insn (\"bne\\t%l0\", ops); output_asm_insn (\"inx\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); return \"\"; }") @@ -4993,7 +4993,7 @@ output_asm_insn (\"comb\", operands); CC_STATUS_INIT; - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); return \"\"; } @@ -5007,7 +5007,7 @@ output_asm_insn (\"bge\\t%l0\", ops); output_asm_insn (\"deca\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); val -= 8; @@ -5030,7 +5030,7 @@ output_asm_insn (\"bcc\\t%l0\", ops); output_asm_insn (\"coma\", ops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); return \"\"; } @@ -5722,14 +5722,14 @@ ops[1] = gen_label_rtx (); output_asm_insn (\"ble\\t%l1\", ops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[0])); output_asm_insn (\"lsrb\", operands); output_asm_insn (\"deca\", operands); output_asm_insn (\"bne\\t%l0\", ops); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (ops[1])); return \"\"; }") diff --git a/gcc/config/m68k/3b1.h b/gcc/config/m68k/3b1.h index d2a1391fd48..655e45c8c81 100644 --- a/gcc/config/m68k/3b1.h +++ b/gcc/config/m68k/3b1.h @@ -96,7 +96,6 @@ output_file_directive ((FILE), main_input_filename) /* Override parts of m68k.h to fit the SGS-3b1 assembler. */ #undef TARGET_VERSION -#undef ASM_FORMAT_PRIVATE_NAME #undef ASM_OUTPUT_ALIGN #undef ASM_OUTPUT_SOURCE_FILENAME #undef ASM_OUTPUT_SOURCE_LINE @@ -105,7 +104,6 @@ output_file_directive ((FILE), main_input_filename) #undef FUNCTION_PROFILER #undef ASM_OUTPUT_ADDR_VEC_ELT #undef ASM_OUTPUT_ADDR_DIFF_ELT -#undef ASM_OUTPUT_INTERNAL_LABEL #undef ASM_OUTPUT_OPCODE #undef ASM_OUTPUT_LOCAL #undef USER_LABEL_PREFIX @@ -113,13 +111,7 @@ output_file_directive ((FILE), main_input_filename) #define TARGET_VERSION fprintf (stderr, " (68k, SGS/AT&T unixpc syntax)"); -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ - sprintf ((OUTPUT), "%s_%%%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s_%%%lu" #define ASM_OUTPUT_ALIGN(FILE,LOG) \ do { \ @@ -323,9 +315,6 @@ do { \ #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf ((LABEL), "%s%%%ld", (PREFIX), (long)(NUM)) -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%%%d:\n", PREFIX, NUM) - /* Must put address in %a0 , not %d0 . -- LGM, 7/15/88 */ #define FUNCTION_PROFILER(FILE, LABEL_NO) \ fprintf (FILE, "\tmov.l &LP%%%d,%%a0\n\tjsr mcount\n", (LABEL_NO)) diff --git a/gcc/config/m68k/amix.h b/gcc/config/m68k/amix.h index b302d0ece2f..b634f391f8f 100644 --- a/gcc/config/m68k/amix.h +++ b/gcc/config/m68k/amix.h @@ -142,10 +142,3 @@ do { \ else \ sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long)(NUM)); \ } while (0) - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - if (flag_pic && !strcmp(PREFIX,"LC")) \ - fprintf (FILE, "%s%%%d:\n", PREFIX, NUM); \ - else \ - asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM) diff --git a/gcc/config/m68k/atari.h b/gcc/config/m68k/atari.h index 54ea0c2dad6..67528c3a7df 100644 --- a/gcc/config/m68k/atari.h +++ b/gcc/config/m68k/atari.h @@ -99,10 +99,3 @@ do { \ else \ sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long)(NUM)); \ } while (0) - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - if (flag_pic && !strcmp(PREFIX,"LC")) \ - fprintf (FILE, "%s%%%d:\n", PREFIX, NUM); \ - else \ - asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM) diff --git a/gcc/config/m68k/hp320.h b/gcc/config/m68k/hp320.h index 680aab4c2f6..a7839bac1f9 100644 --- a/gcc/config/m68k/hp320.h +++ b/gcc/config/m68k/hp320.h @@ -171,9 +171,7 @@ Boston, MA 02111-1307, USA. */ #undef ASM_OUTPUT_SKIP #undef ASM_OUTPUT_COMMON #undef ASM_OUTPUT_LOCAL -#undef ASM_FORMAT_PRIVATE_NAME #undef FUNCTION_PROFILER -#undef ASM_OUTPUT_INTERNAL_LABEL #undef GLOBAL_ASM_OP #undef IMMEDIATE_PREFIX #undef REGISTER_PREFIX @@ -249,20 +247,7 @@ Boston, MA 02111-1307, USA. */ assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%u,2\n", (ROUNDED))) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ -do{ if (PREFIX[0] == 'L' && PREFIX[1] == 'I') \ - fprintf(FILE, "\tset %s%d,.+2\n", PREFIX, NUM); \ - else \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM); \ -} while(0) +#define ASM_PN_FORMAT "%s___%lu" #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ fprintf (FILE, "\tlong L%d\n", VALUE) diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 0407dd6b8db..c7e0e5cdfad 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "rtl.h" #include "function.h" @@ -65,6 +67,9 @@ static void m68k_coff_asm_named_section PARAMS ((const char *, unsigned int)); #ifdef CTOR_LIST_BEGIN static void m68k_svr3_asm_out_constructor PARAMS ((rtx, int)); #endif +#ifdef HPUX_ASM +static void m68k_hp320_internal_label PARAMS ((FILE *, const char *, unsigned long)); +#endif static void m68k_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); static int m68k_save_reg PARAMS ((unsigned int)); @@ -124,6 +129,10 @@ int m68k_last_compare_had_fp_operands; #define TARGET_ASM_FUNCTION_PROLOGUE m68k_output_function_prologue #undef TARGET_ASM_FUNCTION_EPILOGUE #define TARGET_ASM_FUNCTION_EPILOGUE m68k_output_function_epilogue +#ifdef HPUX_ASM +#undef TARGET_ASM_INTERNAL_LABEL +#define TARGET_ASM_INTERNAL_LABEL m68k_hp320_internal_label +#endif #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK m68k_output_mi_thunk @@ -1377,13 +1386,13 @@ output_scc_di(op, operand1, operand2, dest) switch (op_code) { case EQ: - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("seq %5", loperands); break; case NE: - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("sne %5", loperands); break; @@ -1395,15 +1404,15 @@ output_scc_di(op, operand1, operand2, dest) #else output_asm_insn ("shi %5\n\tjra %l6", loperands); #endif - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("sgt %5", loperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[6])); break; case GTU: - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("shi %5", loperands); break; @@ -1415,15 +1424,15 @@ output_scc_di(op, operand1, operand2, dest) #else output_asm_insn ("scs %5\n\tjra %l6", loperands); #endif - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("slt %5", loperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[6])); break; case LTU: - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("scs %5", loperands); break; @@ -1435,15 +1444,15 @@ output_scc_di(op, operand1, operand2, dest) #else output_asm_insn ("scc %5\n\tjra %l6", loperands); #endif - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("sge %5", loperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[6])); break; case GEU: - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("scc %5", loperands); break; @@ -1455,15 +1464,15 @@ output_scc_di(op, operand1, operand2, dest) #else output_asm_insn ("sls %5\n\tjra %l6", loperands); #endif - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("sle %5", loperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[6])); break; case LEU: - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (loperands[4])); output_asm_insn ("sls %5", loperands); break; @@ -1878,7 +1887,7 @@ output_move_himode (operands) CODE_LABEL_NUMBER (XEXP (labelref, 0))); #endif /* not SGS */ #else /* SGS_SWITCH_TABLES or not MOTOROLA */ - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LI", + (*targetm.asm_out.internal_label) (asm_out_file, "LI", CODE_LABEL_NUMBER (XEXP (labelref, 0))); #ifdef SGS_SWITCH_TABLES /* Set flag saying we need to define the symbol @@ -3856,6 +3865,20 @@ m68k_svr3_asm_out_constructor (symbol, priority) } #endif +#ifdef HPUX_ASM +static void +m68k_hp320_internal_label (stream, prefix, labelno) + FILE *stream; + const char *prefix; + unsigned long labelno; +{ + if (prefix[0] == 'L' && prefix[1] == 'I') + fprintf(stream, "\tset %s%ld,.+2\n", prefix, labelno); + else + fprintf (stream, "%s%ld:\n", prefix, labelno); +} +#endif + static void m68k_output_mi_thunk (file, thunk, delta, vcall_offset, function) FILE *file; diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index 795a9793c55..7d07a13a962 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -1190,10 +1190,8 @@ __transfer_from_trampoline () \ /* Addressing modes, and classification of registers for them. */ #define HAVE_POST_INCREMENT 1 -/* #define HAVE_POST_DECREMENT 0 */ #define HAVE_PRE_DECREMENT 1 -/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ @@ -1758,12 +1756,6 @@ __transfer_from_trampoline () \ #define ASM_OUTPUT_LABELREF(FILE,NAME) \ asm_fprintf (FILE, "%0U%s", NAME) -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -1825,14 +1817,6 @@ __transfer_from_trampoline () \ assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%u\n", (ROUNDED))) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* Output a float value (represented as a C double) as an immediate operand. This macro is a 68k-specific macro. */ diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 969e5dc3099..8ce07245216 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -2326,7 +2326,7 @@ #else output_asm_insn (\"add%.l %#1,%2\", operands); #endif - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[3])); return \"\"; }") @@ -6187,7 +6187,7 @@ output_asm_insn (\"cmp%.w %#0,%0\;jne %l4\;cmp%.w %#0,%3\;jeq %l1\", operands); #endif } - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (operands[4])); return \"\"; } ") @@ -7481,7 +7481,7 @@ CODE_LABEL_NUMBER (XEXP (labelref, 0))); #endif /* not SGS */ #else /* SGS_SWITCH_TABLES or not MOTOROLA */ - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"LI\", + (*targetm.asm_out.internal_label) (asm_out_file, \"LI\", CODE_LABEL_NUMBER (XEXP (labelref, 0))); #ifdef SGS_SWITCH_TABLES /* Set flag saying we need to define the symbol diff --git a/gcc/config/m68k/mot3300.h b/gcc/config/m68k/mot3300.h index fb7dffa8fc7..6304e531dea 100644 --- a/gcc/config/m68k/mot3300.h +++ b/gcc/config/m68k/mot3300.h @@ -276,14 +276,7 @@ Boston, MA 02111-1307, USA. */ #define GLOBAL_ASM_OP "\tglobal\t" #endif /* USE_GAS */ -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#undef ASM_FORMAT_PRIVATE_NAME -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ - sprintf ((OUTPUT), "%s_%%%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s_%%%lu" #undef INT_OP_GROUP #ifdef USE_GAS @@ -393,13 +386,6 @@ Boston, MA 02111-1307, USA. */ #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf ((LABEL), "%s%s%ld", LOCAL_LABEL_PREFIX, (PREFIX), (long)(NUM)) -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - asm_fprintf (FILE, "%L%s%d:\n", PREFIX, NUM) - /* The prefix to add to user-visible assembler symbols. */ #undef USER_LABEL_PREFIX @@ -411,7 +397,7 @@ Boston, MA 02111-1307, USA. */ /* The L after the local prefix is the "L" prefix for the normal labels generated by gcc; why are ASM_OUTPUT_ADDR_VEC_ELT and ASM_OUTPUT_ADDR_DIFF_ELT not called with a PREFIX parameter, like - ASM_OUTPUT_INTERNAL_LABEL ? */ + (*targetm.asm_out.internal_label) ? */ #undef ASM_OUTPUT_ADDR_VEC_ELT #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ diff --git a/gcc/config/m68k/netbsd-elf.h b/gcc/config/m68k/netbsd-elf.h index f9576da2905..62f67ef534d 100644 --- a/gcc/config/m68k/netbsd-elf.h +++ b/gcc/config/m68k/netbsd-elf.h @@ -103,10 +103,12 @@ Boston, MA 02111-1307, USA. */ #undef ASM_SPEC #define ASM_SPEC \ - " %| %(asm_default_spec) \ + "%(asm_default_spec) \ %{m68010} %{m68020} %{m68030} %{m68040} %{m68060} \ %{fpic:-k} %{fPIC:-k -K}" +#define AS_NEEDS_DASH_FOR_PIPED_INPUT + /* Provide a LINK_SPEC appropriate for a NetBSD/m68k ELF target. */ #undef LINK_SPEC diff --git a/gcc/config/m68k/netbsd.h b/gcc/config/m68k/netbsd.h index fcf9f531e5a..69a88afe0d5 100644 --- a/gcc/config/m68k/netbsd.h +++ b/gcc/config/m68k/netbsd.h @@ -31,7 +31,9 @@ "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__} %(netbsd_cpp_spec)" #undef ASM_SPEC -#define ASM_SPEC " %| %{m68030} %{m68040} %{m68060} %{fpic:-k} %{fPIC:-k -K}" +#define ASM_SPEC "%{m68030} %{m68040} %{m68060} %{fpic:-k} %{fPIC:-k -K}" + +#define AS_NEEDS_DASH_FOR_PIPED_INPUT /* Make gcc agree with <machine/ansi.h> */ diff --git a/gcc/config/m68k/openbsd.h b/gcc/config/m68k/openbsd.h index 0a5038c4dc7..baa4ef0928c 100644 --- a/gcc/config/m68k/openbsd.h +++ b/gcc/config/m68k/openbsd.h @@ -38,7 +38,9 @@ Boston, MA 02111-1307, USA. */ /* m68k as needs to know about the processor subtype. */ #undef ASM_SPEC -#define ASM_SPEC "%| %{m68030} %{m68040} %{m68060} %{fpic:-k} %{fPIC:-k -K}" +#define ASM_SPEC "%{m68030} %{m68040} %{m68060} %{fpic:-k} %{fPIC:-k -K}" + +#define AS_NEEDS_DASH_FOR_PIPED_INPUT /* Layout of source language data types. */ diff --git a/gcc/config/m68k/sgs.h b/gcc/config/m68k/sgs.h index 949ea7dcaa7..fb799bed6bd 100644 --- a/gcc/config/m68k/sgs.h +++ b/gcc/config/m68k/sgs.h @@ -42,7 +42,7 @@ Boston, MA 02111-1307, USA. */ #define SWBEG_ASM_OP "\t.swbeg " #define SET_ASM_OP "\t.set " -#define ASM_PN_FORMAT "%s_%d" /* Format for private names */ +#define ASM_PN_FORMAT "%s_%lu" /* Format for private names */ /* Here are four prefixes that are used by asm_fprintf to facilitate customization for alternate assembler syntaxes. @@ -360,7 +360,7 @@ do { \ #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ do { \ ASM_OUTPUT_BEFORE_CASE_LABEL((FILE),(PREFIX),(NUM),(TABLE)); \ - ASM_OUTPUT_INTERNAL_LABEL((FILE),(PREFIX),(NUM)); \ + (*targetm.asm_out.internal_label)((FILE),(PREFIX),(NUM)); \ } while (0) /* At end of a switch table, define LDnnn iff the symbol LInnn was defined. @@ -390,13 +390,3 @@ extern int switch_table_difference_label_flag; keep switch tables in the text section. */ #define JUMP_TABLES_IN_TEXT_SECTION 1 - -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#undef ASM_FORMAT_PRIVATE_NAME -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), ASM_PN_FORMAT, (NAME), (LABELNO))) - diff --git a/gcc/config/m68k/t-vxworks68 b/gcc/config/m68k/t-vxworks68 deleted file mode 100644 index f3f8d7bd13c..00000000000 --- a/gcc/config/m68k/t-vxworks68 +++ /dev/null @@ -1,24 +0,0 @@ -LIB1ASMSRC = m68k/lb1sf68.asm -LIB1ASMFUNCS = _mulsi3 _udivsi3 _divsi3 _umodsi3 _modsi3 \ - _double _float _floatex \ - _eqdf2 _nedf2 _gtdf2 _gedf2 _ltdf2 _ledf2 \ - _eqsf2 _nesf2 _gtsf2 _gesf2 _ltsf2 _lesf2 - -# We don't want to put exit in libgcc.a for VxWorks, because VxWorks -# does not have _exit. -TARGET_LIBGCC2_CFLAGS = -Dexit=unused_exit - -LIB2FUNCS_EXTRA = fpgnulib.c xfgnulib.c - -fpgnulib.c: $(srcdir)/config/m68k/fpgnulib.c - cp $(srcdir)/config/m68k/fpgnulib.c fpgnulib.c -xfgnulib.c: $(srcdir)/config/m68k/fpgnulib.c - echo '#define EXTFLOAT' > xfgnulib.c - cat $(srcdir)/config/m68k/fpgnulib.c >> xfgnulib.c - -MULTILIB_OPTIONS = m68000/m68020 m68881/msoft-float -MULTILIB_DIRNAMES = -MULTILIB_MATCHES = m68000=mc68000 m68000=m68302 m68000=m68332 m68020=mc68020 m68020=m68040 - -LIBGCC = stmp-multilib -INSTALL_LIBGCC = install-multilib diff --git a/gcc/config/m68k/tower-as.h b/gcc/config/m68k/tower-as.h index 3e0e9b60f9e..f81268b061c 100644 --- a/gcc/config/m68k/tower-as.h +++ b/gcc/config/m68k/tower-as.h @@ -46,7 +46,7 @@ Boston, MA 02111-1307, USA. */ #define CPP_SPEC "-D__TOWER_ASM__ %{m68881:-D__HAVE_68881__}" /* We don't want local labels to start with period. - See ASM_OUTPUT_INTERNAL_LABEL. */ + See (*targetm.asm_out.internal_label). */ #undef LOCAL_LABEL_PREFIX #define LOCAL_LABEL_PREFIX "" @@ -210,14 +210,7 @@ Boston, MA 02111-1307, USA. */ assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%d\n", ((SIZE) == 0) ? (ROUNDED) : (SIZE))) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#undef ASM_FORMAT_PRIVATE_NAME -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 11), \ - sprintf ((OUTPUT), "%s%%%%%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s%%%%%lu" /* This is the command to make the user-level label named NAME defined for reference from other files. */ @@ -229,10 +222,6 @@ Boston, MA 02111-1307, USA. */ #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf ((LABEL), "%s%%%ld", (PREFIX), (long)(NUM)) -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf ((FILE), "%s%%%d:\n", (PREFIX), (NUM)) - #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \ fprintf (FILE, "\tswbeg &%d\n%s%%%d:\n", \ diff --git a/gcc/config/m68k/vxm68k.h b/gcc/config/m68k/vxm68k.h deleted file mode 100644 index a4daa367afa..00000000000 --- a/gcc/config/m68k/vxm68k.h +++ /dev/null @@ -1,103 +0,0 @@ -/* Definitions of target machine for GNU compiler. Vxworks m68k version. - Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* This comment is here to see if it will keep Sun's cpp from dying. */ - -#include "m68k/m68k-none.h" -#include "aoutos.h" - -#undef CPP_PREDEFINES -#define CPP_PREDEFINES "-Dmc68000 -D__vxworks -D__vxworks_5 -Acpu=m68k -Amachine=m68k" - -/* The default value for -DCPU=. */ -#if TARGET_CPU_DEFAULT == M68K_CPU_m68k || TARGET_CPU_DEFAULT == M68K_CPU_m68020 -#define CPP_SUBTARGET_CPU_DEFAULT_SPEC "-DCPU=MC68020" -#else -#if TARGET_CPU_DEFAULT == M68K_CPU_m68000 -#define CPP_SUBTARGET_CPU_DEFAULT_SPEC "-DCPU=MC68000" -#else -#if TARGET_CPU_DEFAULT == M68K_CPU_m68030 -#define CPP_SUBTARGET_CPU_DEFAULT_SPEC "-DCPU=MC68030" -#else -#if TARGET_CPU_DEFAULT == M68K_CPU_m68040 -#define CPP_SUBTARGET_CPU_DEFAULT_SPEC "-DCPU=MC68040" -#else -#if TARGET_CPU_DEFAULT == M68K_CPU_m68302 -#define CPP_SUBTARGET_CPU_DEFAULT_SPEC "-DCPU=MC68302" -#else -#if TARGET_CPU_DEFAULT == M68K_CPU_m68332 -#define CPP_SUBTARGET_CPU_DEFAULT_SPEC "-DCPU=MC68332" -#else -Unrecognized value in TARGET_CPU_DEFAULT. -#endif -#endif -#endif -#endif -#endif -#endif - -#undef SUBTARGET_EXTRA_SPECS -#define SUBTARGET_EXTRA_SPECS \ -{ "cpp_subtarget_cpu_default", CPP_SUBTARGET_CPU_DEFAULT_SPEC } - -/* Vxworks header files require that the macro CPU be set. */ -/* ??? The previous code didn't set CPU if -ansi. */ -#undef CPP_SUBTARGET_SPEC -#define CPP_SUBTARGET_SPEC "\ -%{m68000:-DCPU=MC68000 }%{m68010:-DCPU=MC68010 }%{m68020:-DCPU=MC68020 }%{mc68020:-DCPU=MC68020 }%{m68030:-DCPU=MC68030 }%{m68040:-DCPU=MC68040 }%{m68020-40:-DCPU=MC68020 }%{m68302:-DCPU=MC68000 }%{m68332:-DCPU=CPU32 } \ -%{!mc68000:%{!m68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68302:%{!m68332:%(cpp_subtarget_cpu_default) }}}}}}}}}} \ -" - -#define DBX_DEBUGGING_INFO 1 -#undef SDB_DEBUGGING_INFO - -/* These are the official values from WRS. */ -#undef WCHAR_TYPE -#define WCHAR_TYPE "char" -#undef WCHAR_TYPE_SIZE -#define WCHAR_TYPE_SIZE 8 -#undef PTRDIFF_TYPE -#define PTRDIFF_TYPE "long int" -#undef SIZE_TYPE -#define SIZE_TYPE "unsigned int" - -/* VxWorks does all the library stuff itself. */ - -#define LIB_SPEC "" - -/* Provide required defaults for linker. */ - -#define LINK_SPEC "-r" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ - -#define STARTFILE_SPEC "" - -/* Every structure or union's size must be a multiple of 2 bytes. */ - -#define STRUCTURE_SIZE_BOUNDARY 16 - -/* GCC is the primary compiler for VxWorks, so we don't need this. */ -#undef PCC_STATIC_STRUCT_RETURN - -/* Restrict use of 128 bit floating-point by default since VxWorks doesn't - have the proper accuracy routines for that size; this is not done because - the hardware doesn't support it, despite the name. */ -#define WIDEST_HARDWARE_FP_SIZE 64 diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c index fde0d14a2a1..44ca220c4e1 100644 --- a/gcc/config/m88k/m88k.c +++ b/gcc/config/m88k/m88k.c @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -74,6 +76,9 @@ static void m88k_svr3_asm_out_destructor PARAMS ((rtx, int)); static void m88k_select_section PARAMS ((tree, int, unsigned HOST_WIDE_INT)); static int m88k_adjust_cost PARAMS ((rtx, rtx, rtx, int)); static void m88k_encode_section_info PARAMS ((tree, int)); +#ifdef AS_BUG_DOT_LABELS +static void m88k_internal_label PARAMS ((FILE *, const char *, unsigned long)); +#endif /* Initialize the GCC target structure. */ #undef TARGET_ASM_BYTE_OP @@ -101,6 +106,10 @@ static void m88k_encode_section_info PARAMS ((tree, int)); #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO m88k_encode_section_info +#ifdef AS_BUG_DOT_LABELS +#undef TARGET_ASM_INTERNAL_LABEL +#define TARGET_ASM_INTERNAL_LABEL m88k_internal_label +#endif struct gcc_target targetm = TARGET_INITIALIZER; @@ -892,7 +901,9 @@ output_call (operands, addr) jump = XVECEXP (final_sequence, 0, 1); if (GET_CODE (jump) == JUMP_INSN) { +#ifndef USE_GAS rtx low, high; +#endif const char *last; rtx dest = XEXP (SET_SRC (PATTERN (jump)), 0); int delta = 4 * (INSN_ADDRESSES (INSN_UID (dest)) @@ -1714,7 +1725,7 @@ void output_label (label_number) int label_number; { - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", label_number); + (*targetm.asm_out.internal_label) (asm_out_file, "L", label_number); } /* Generate the assembly code for function entry. @@ -3339,3 +3350,15 @@ m88k_encode_section_info (decl, first) SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (decl), 0)) = 1; } } + +#ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */ +static void +m88k_internal_label (stream, prefix, labelno) + FILE *stream; + const char *prefix; + unsigned long labelno; +{ + fprintf (stream, TARGET_SVR4 ? ".%s%lu:\n%s.%s%lu\n" : "@%s%ld:\n", + prefix, labelno, INTERNAL_ASM_OP, prefix, labelno); +} +#endif diff --git a/gcc/config/m88k/m88k.h b/gcc/config/m88k/m88k.h index 659f5fbe801..c702094f423 100644 --- a/gcc/config/m88k/m88k.h +++ b/gcc/config/m88k/m88k.h @@ -1104,7 +1104,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \ /* Locate this block; transfer to the next instruction. */ \ fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \ + (*targetm.asm_out.internal_label) (FILE, "LTRMP", labelno); \ /* Save r10; use it as the relative pointer; restore r1. */ \ fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \ fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \ @@ -1155,12 +1155,6 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, #define SELECT_CC_MODE(OP,X,Y) CCmode -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Recognize any constant value that is a valid address. When PIC, we do not accept an address that would require a scratch reg to load into a register. */ @@ -1877,25 +1871,11 @@ do { \ fputs (NAME, FILE); \ } -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. - For V.4, labels use `.' rather than `@'. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */ -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n%s.%s%d\n" : "@%s%d:\n", \ - PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM) -#else -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM) -#endif /* AS_BUG_DOT_LABELS */ - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. This is suitable for output with `assemble_name'. This must agree - with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed + with (*targetm.asm_out.internal_label) above, except for being prefixed with an `*'. */ #undef ASM_GENERATE_INTERNAL_LABEL @@ -1917,7 +1897,7 @@ do { \ readonly_data_section (); \ ASM_OUTPUT_ALIGN (FILE, 2); \ } \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ } while (0) /* Epilogue for case labels. This jump instruction is called by casesi @@ -1992,13 +1972,6 @@ do { \ assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8)) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* This is how to output an insn to push a register on the stack. It need not be very fast code. */ #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ @@ -2030,10 +2003,10 @@ do { \ #define OCS_END_PREFIX "Lte" #define PUT_OCS_FUNCTION_START(FILE) \ - { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); } + { (*targetm.asm_out.internal_label) (FILE, OCS_START_PREFIX, m88k_function_number); } #define PUT_OCS_FUNCTION_END(FILE) \ - { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); } + { (*targetm.asm_out.internal_label) (FILE, OCS_END_PREFIX, m88k_function_number); } /* Macros for debug information */ #define DEBUGGER_AUTO_OFFSET(X) \ diff --git a/gcc/config/mcore/mcore-pe.h b/gcc/config/mcore/mcore-pe.h index a580fc5bfbc..a6ea4d4282c 100644 --- a/gcc/config/mcore/mcore-pe.h +++ b/gcc/config/mcore/mcore-pe.h @@ -125,7 +125,7 @@ drectve_section () \ assemble_name (FILE, \ XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \ putc ('\n', FILE); \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LM", sym_lineno); \ + (*targetm.asm_out.internal_label) (FILE, "LM", sym_lineno); \ sym_lineno ++; \ } \ } diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c index 7068ca696e1..dfe02828bfe 100644 --- a/gcc/config/mcore/mcore.c +++ b/gcc/config/mcore/mcore.c @@ -20,6 +20,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "tm_p.h" @@ -2618,7 +2620,7 @@ mcore_output_jump_label_table () { pool_node * p = pool_vector + i; - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (p->label)); + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (p->label)); output_asm_insn (".long %0", &p->value); } diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h index 7bce37cd227..bfa8271b8f7 100644 --- a/gcc/config/mcore/mcore.h +++ b/gcc/config/mcore/mcore.h @@ -1173,16 +1173,6 @@ extern long mcore_current_compilation_timestamp; #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM) -/* Output an internal label definition. */ -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM) - -/* Construct a private name. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \ - ((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \ - sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER))) - /* Jump tables must be 32 bit aligned. */ #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) \ diff --git a/gcc/config/mcore/mcore.md b/gcc/config/mcore/mcore.md index 7e74a98e061..fe71e377290 100644 --- a/gcc/config/mcore/mcore.md +++ b/gcc/config/mcore/mcore.md @@ -3319,7 +3319,7 @@ "" "* { - int op0 = REGNO (operands[0]); + unsigned int op0 = REGNO (operands[0]); if (GET_CODE (operands[3]) == REG) { diff --git a/gcc/config/mips/irix6-libc-compat.c b/gcc/config/mips/irix6-libc-compat.c index d482dbfa882..cdac9fafea4 100644 --- a/gcc/config/mips/irix6-libc-compat.c +++ b/gcc/config/mips/irix6-libc-compat.c @@ -54,6 +54,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" /* This must only be used for the N32 and N64 ABIs. O32 is correct. */ diff --git a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h index d25cd51ddcc..959a065d2fc 100644 --- a/gcc/config/mips/linux.h +++ b/gcc/config/mips/linux.h @@ -252,3 +252,9 @@ void FN () \ /* The current Linux binutils uses MIPS_STABS_ELF and doesn't support COFF. */ #undef SDB_DEBUGGING_INFO + +#undef LIB_SPEC +#define LIB_SPEC "\ +%{!static:-rpath-link %R/lib:%R/usr/lib} \ +%{!shared: %{pthread:-lthread} \ + %{profile:-lc_p} %{!profile: -lc}}" diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index d92f7e573b3..6d3d16783ee 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -140,6 +140,8 @@ extern int mips_legitimate_address_p PARAMS ((enum machine_mode, extern int mips_reg_mode_ok_for_base_p PARAMS ((rtx, enum machine_mode, int)); +extern bool mips_valid_pointer_mode PARAMS ((enum machine_mode)); + extern int m16_uimm3_b PARAMS ((rtx, enum machine_mode)); extern int m16_simm4_1 PARAMS ((rtx, enum machine_mode)); extern int m16_nsimm4_1 PARAMS ((rtx, enum machine_mode)); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 2dcf69d3f43..f8f3cb6eb7c 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -29,6 +29,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include <signal.h> #include "rtl.h" #include "regs.h" @@ -665,6 +667,9 @@ const struct mips_cpu_info mips_cpu_info_table[] = { #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO mips_encode_section_info +#undef TARGET_VALID_POINTER_MODE +#define TARGET_VALID_POINTER_MODE mips_valid_pointer_mode + struct gcc_target targetm = TARGET_INITIALIZER; /* Return truth value of whether OP can be used as an operands @@ -6944,7 +6949,6 @@ save_restore_insns (store_p, large_reg, large_offset) HOST_WIDE_INT gp_offset; HOST_WIDE_INT fp_offset; HOST_WIDE_INT end_offset; - rtx insn; if (frame_pointer_needed && ! BITSET_P (mask, HARD_FRAME_POINTER_REGNUM - GP_REG_FIRST)) @@ -6998,11 +7002,9 @@ save_restore_insns (store_p, large_reg, large_offset) base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (Pmode == DImode) - insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); else - insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); } else { @@ -7107,11 +7109,9 @@ save_restore_insns (store_p, large_reg, large_offset) base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (Pmode == DImode) - insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); else - insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); } else { @@ -8621,6 +8621,14 @@ mips_class_max_nregs (class, mode) else return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; } + +bool +mips_valid_pointer_mode (mode) + enum machine_mode mode; +{ + return (mode == SImode || (TARGET_64BIT && mode == DImode)); +} + /* For each mips16 function which refers to GP relative symbols, we use a pseudo register, initialized at the start of the function, to @@ -10268,7 +10276,7 @@ mips_output_conditional_branch (insn, else output_asm_insn ("%#", 0); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (target)); return ""; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 3b784c8883d..5be556f7d70 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2976,12 +2976,6 @@ typedef struct mips_args { /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* These assume that REGNO is a hard or pseudo reg number. They give nonzero only if REGNO is a hard reg of the suitable class or a pseudo reg currently allocated to a suitable hard reg. @@ -4361,14 +4355,6 @@ do { \ #undef ASM_DECLARE_FUNCTION_NAME #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) - -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \ - fprintf (STREAM, "%s%s%d:\n", LOCAL_LABEL_PREFIX, PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -4399,7 +4385,9 @@ do { \ fprintf (STREAM, "\t%s\t%sL%d-%sLS%d\n", \ Pmode == DImode ? ".dword" : ".word", \ LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \ - else if (mips_abi == ABI_32 || mips_abi == ABI_O64) \ + else if (mips_abi == ABI_32 || mips_abi == ABI_O64 \ + || mips_abi == ABI_N32 \ + || (TARGET_GAS && mips_abi == ABI_64)) \ fprintf (STREAM, "\t%s\t%sL%d\n", \ Pmode == DImode ? ".gpdword" : ".gpword", \ LOCAL_LABEL_PREFIX, VALUE); \ @@ -4420,7 +4408,7 @@ do { \ do { \ if (TARGET_EMBEDDED_PIC || TARGET_MIPS16) \ function_section (current_function_decl); \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ + (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \ } while (0) /* This is how to output an assembler line @@ -4500,14 +4488,6 @@ sdata_section () \ #undef TARGET_ASM_SELECT_SECTION #define TARGET_ASM_SELECT_SECTION mips_select_section -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \ do \ { \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index cc6cda53dba..46e4fdd86a4 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -9799,7 +9799,7 @@ move\\t%0,%z4\\n\\ "* { /* .cpadd expands to add REG,REG,$gp when pic, and nothing when not pic. */ - if (mips_abi == ABI_32 || mips_abi == ABI_O64) + if (mips_abi == ABI_32 || mips_abi == ABI_O64 || mips_abi == ABI_N32) output_asm_insn (\".cpadd\\t%0\", operands); return \"%*j\\t%0\"; }" @@ -9827,9 +9827,16 @@ move\\t%0,%z4\\n\\ "Pmode == DImode && next_active_insn (insn) != 0 && GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC && PREV_INSN (next_active_insn (insn)) == operands[1]" - "%*j\\t%0" + "* +{ + /* .cpadd expands to add REG,REG,$gp when pic, and nothing when not pic. */ + if (TARGET_GAS && mips_abi == ABI_64) + output_asm_insn (\".cpadd\\t%0\", operands); + return \"%*j\\t%0\"; +}" [(set_attr "type" "jump") - (set_attr "mode" "none")]) + (set_attr "mode" "none") + (set_attr "length" "8")]) ;; Implement a switch statement when generating embedded PIC code. ;; Switches are implemented by `tablejump' when not using -membedded-pic. diff --git a/gcc/config/mips/openbsd.h b/gcc/config/mips/openbsd.h index 02a8f224e57..73a81926be4 100644 --- a/gcc/config/mips/openbsd.h +++ b/gcc/config/mips/openbsd.h @@ -21,7 +21,9 @@ Boston, MA 02111-1307, USA. */ /* Definitions needed for OpenBSD, to avoid picking mips 'defaults'. */ /* GAS must know this. */ -#define SUBTARGET_ASM_SPEC "%{fPIC:-KPIC} %|" +#define SUBTARGET_ASM_SPEC "%{fPIC:-KPIC}" + +#define AS_NEEDS_DASH_FOR_PIPED_INPUT /* CPP specific OpenBSD specs. */ #define SUBTARGET_CPP_SPEC OBSD_CPP_SPEC diff --git a/gcc/config/mips/vr.h b/gcc/config/mips/vr.h index 3ef34afbd34..1352599a300 100644 --- a/gcc/config/mips/vr.h +++ b/gcc/config/mips/vr.h @@ -28,4 +28,4 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ if it is redundant. */ #define DRIVER_SELF_SPECS \ "%{mabi=eabi:%{!mlong*:%{!mgp32:-mlong64}}}", \ - "%{mabi=32:%{<mgp32}}" + "%{mabi=32:%<mgp32}" diff --git a/gcc/config/mips/vxworks.h b/gcc/config/mips/vxworks.h deleted file mode 100644 index 67838e201fd..00000000000 --- a/gcc/config/mips/vxworks.h +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright (C) 1999 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#undef EXTRA_SECTIONS -#define EXTRA_SECTIONS in_sdata, in_sbss - -#undef EXTRA_SECTION_FUNCTIONS -#define EXTRA_SECTION_FUNCTIONS \ - SECTION_FUNCTION_TEMPLATE(sdata_section, in_sdata, SDATA_SECTION_ASM_OP) \ - SECTION_FUNCTION_TEMPLATE(sbss_section, in_sbss, SBSS_SECTION_ASM_OP) - -#undef STARTFILE_SPEC -#undef ENDFILE_SPEC diff --git a/gcc/config/mmix/mmix-protos.h b/gcc/config/mmix/mmix-protos.h index 496752c81d4..fb3705a403c 100644 --- a/gcc/config/mmix/mmix-protos.h +++ b/gcc/config/mmix/mmix-protos.h @@ -42,8 +42,6 @@ extern void mmix_asm_output_ascii PARAMS ((FILE *, const char *, int)); extern void mmix_asm_output_label PARAMS ((FILE *, const char *)); extern void mmix_asm_weaken_label PARAMS ((FILE *, const char *)); extern void mmix_asm_output_labelref PARAMS ((FILE *, const char *)); -extern void mmix_asm_output_internal_label - PARAMS ((FILE *, const char *, int)); extern void mmix_asm_output_def PARAMS ((FILE *, const char *, const char *)); extern int mmix_print_operand_punct_valid_p PARAMS ((int)); extern void mmix_asm_output_reg_push PARAMS ((FILE *, int)); diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c index 8aa1d3a2c9d..db4bb4c1e54 100644 --- a/gcc/config/mmix/mmix.c +++ b/gcc/config/mmix/mmix.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -1577,17 +1579,6 @@ mmix_asm_output_labelref (stream, name) name); } -/* ASM_OUTPUT_INTERNAL_LABEL. */ - -void -mmix_asm_output_internal_label (stream, name, num) - FILE * stream; - const char * name; - int num; -{ - fprintf (stream, "%s:%d\tIS @\n", name, num); -} - /* ASM_OUTPUT_DEF. */ void diff --git a/gcc/config/mmix/mmix.h b/gcc/config/mmix/mmix.h index b6c4ec70210..562c39e1ef3 100644 --- a/gcc/config/mmix/mmix.h +++ b/gcc/config/mmix/mmix.h @@ -992,9 +992,6 @@ typedef struct { int regs; int lib; } CUMULATIVE_ARGS; #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ mmix_asm_output_labelref (STREAM, NAME) -#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \ - mmix_asm_output_internal_label (STREAM, PREFIX, NUM) - /* We insert a ":" to disambiguate against user symbols like L5. */ #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf (LABEL, "*%s:%ld", PREFIX, (long)(NUM)) @@ -1003,9 +1000,7 @@ typedef struct { int regs; int lib; } CUMULATIVE_ARGS; ":" is seen in the object file; we don't really want that mmixal feature visible there. We don't want the default, which uses a dot; that'd be incompatible with mmixal. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ - ((OUTPUT) = (char *) alloca (strlen ((NAME)) + 2 + 10), \ - sprintf ((OUTPUT), "%s::%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s::%lu" #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \ mmix_asm_output_def (STREAM, NAME, VALUE) diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c index b41c61fafca..39a378d3285 100644 --- a/gcc/config/mn10200/mn10200.c +++ b/gcc/config/mn10200/mn10200.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" diff --git a/gcc/config/mn10200/mn10200.h b/gcc/config/mn10200/mn10200.h index 793838fc531..112b90d866b 100644 --- a/gcc/config/mn10200/mn10200.h +++ b/gcc/config/mn10200/mn10200.h @@ -824,13 +824,7 @@ struct cum_arg { int nbytes; }; #define ASM_OUTPUT_LABELREF(FILE, NAME) \ fprintf (FILE, "_%s", (*targetm.strip_name_encoding) (NAME)) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* This is how we tell the assembler that two symbols have the same value. */ diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index 3bad60b7475..578ba644033 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -1149,7 +1151,7 @@ mask_ok_for_mem_btst (len, bit) int len; int bit; { - int mask = 0; + unsigned int mask = 0; while (len > 0) { diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h index f3cf9b639e7..73a355f2790 100644 --- a/gcc/config/mn10300/mn10300.h +++ b/gcc/config/mn10300/mn10300.h @@ -913,13 +913,7 @@ struct cum_arg {int nbytes; }; #define ASM_OUTPUT_LABELREF(FILE, NAME) \ fprintf (FILE, "_%s", (*targetm.strip_name_encoding) (NAME)) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* This is how we tell the assembler that two symbols have the same value. */ diff --git a/gcc/config/netbsd-aout.h b/gcc/config/netbsd-aout.h index 7c2f86573ce..f7eb1bf1449 100644 --- a/gcc/config/netbsd-aout.h +++ b/gcc/config/netbsd-aout.h @@ -39,7 +39,9 @@ Boston, MA 02111-1307, USA. */ with the options for generating PIC code. */ #undef ASM_SPEC -#define ASM_SPEC " %| %{fpic:-k} %{fPIC:-k -K}" +#define ASM_SPEC "%{fpic:-k} %{fPIC:-k -K}" + +#define AS_NEEDS_DASH_FOR_PIPED_INPUT /* Provide a STARTFILE_SPEC appropriate for NetBSD a.out. Here we diff --git a/gcc/config/ns32k/ns32k.c b/gcc/config/ns32k/ns32k.c index b94765bfb3a..fba27cf8604 100644 --- a/gcc/config/ns32k/ns32k.c +++ b/gcc/config/ns32k/ns32k.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h index e6de13ca79c..ba53a6fc28d 100644 --- a/gcc/config/ns32k/ns32k.h +++ b/gcc/config/ns32k/ns32k.h @@ -810,12 +810,6 @@ __transfer_from_trampoline () \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -1315,12 +1309,6 @@ __transfer_from_trampoline () \ /* Globalizing directive for a label. */ #define GLOBAL_ASM_OP ".globl " -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -1371,14 +1359,6 @@ __transfer_from_trampoline () \ assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%u\n", (ROUNDED))) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* Print an instruction operand X on file FILE. CODE is the code from the %-spec that requested printing this operand; if `%z3' was used to print operand 3, then CODE is 'z'. */ diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md index 3929eb95cc1..5d93b53d5f4 100644 --- a/gcc/config/ns32k/ns32k.md +++ b/gcc/config/ns32k/ns32k.md @@ -2693,7 +2693,7 @@ "" "* { - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"LI\", + (*targetm.asm_out.internal_label) (asm_out_file, \"LI\", CODE_LABEL_NUMBER (operands[1])); return \"cased %0\"; }") diff --git a/gcc/config/openbsd.h b/gcc/config/openbsd.h index 1c215ebbf2d..ef12922ae2f 100644 --- a/gcc/config/openbsd.h +++ b/gcc/config/openbsd.h @@ -106,16 +106,12 @@ Boston, MA 02111-1307, USA. */ still uses a special flavor of gas that needs to be told when generating pic code. */ #undef ASM_SPEC -#define ASM_SPEC "%{fpic:-k} %{fPIC:-k -K} %|" - -#else -/* Since we use gas, stdin -> - is a good idea, but we don't want to - override native specs just for that. */ -#ifndef ASM_SPEC -#define ASM_SPEC "%|" -#endif +#define ASM_SPEC "%{fpic:-k} %{fPIC:-k -K}" #endif +/* Since we use gas, stdin -> - is a good idea. */ +#define AS_NEEDS_DASH_FOR_PIPED_INPUT + /* LINK_SPEC appropriate for OpenBSD. Support for GCC options -static, -assert, and -nostdlib. */ #undef LINK_SPEC diff --git a/gcc/config/pa/pa-linux.h b/gcc/config/pa/pa-linux.h index 495046e762b..a39ef318a00 100644 --- a/gcc/config/pa/pa-linux.h +++ b/gcc/config/pa/pa-linux.h @@ -158,7 +158,7 @@ Boston, MA 02111-1307, USA. */ /* Use the default. */ #undef ASM_OUTPUT_LABEL -/* NOTE: ASM_OUTPUT_INTERNAL_LABEL() is defined for us by elfos.h, and +/* NOTE: (*targetm.asm_out.internal_label)() is defined for us by elfos.h, and does what we want (i.e. uses colons). It must be compatible with ASM_GENERATE_INTERNAL_LABEL(), so do not define it here. */ @@ -167,6 +167,11 @@ Boston, MA 02111-1307, USA. */ /* Globalizing directive for a label. */ #define GLOBAL_ASM_OP ".globl " +/* This definition is used inside pa.c to disable all + sibcall optimization, because sibcalls, stubs and + elf sections don't play well. */ +#define TARGET_HAS_STUBS_AND_ELF_SECTIONS 1 + /* FIXME: Hacked from the <elfos.h> one so that we avoid multiple labels in a function declaration (since pa.c seems determined to do it differently) */ diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 5c01a8b0b4f..ccb37d24d07 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -117,6 +119,7 @@ static void pa_select_section PARAMS ((tree, int, unsigned HOST_WIDE_INT)) ATTRIBUTE_UNUSED; static void pa_encode_section_info PARAMS ((tree, int)); static const char *pa_strip_name_encoding PARAMS ((const char *)); +static bool pa_function_ok_for_sibcall PARAMS ((tree, tree)); static void pa_globalize_label PARAMS ((FILE *, const char *)) ATTRIBUTE_UNUSED; static void pa_asm_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, @@ -198,6 +201,9 @@ static size_t n_deferred_plabels = 0; #undef TARGET_STRIP_NAME_ENCODING #define TARGET_STRIP_NAME_ENCODING pa_strip_name_encoding +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL pa_function_ok_for_sibcall + #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK pa_asm_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK @@ -4784,7 +4790,7 @@ output_deferred_plabels (file) /* Now output the deferred plabels. */ for (i = 0; i < n_deferred_plabels; i++) { - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (deferred_plabels[i].internal_label)); + (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (deferred_plabels[i].internal_label)); assemble_integer (gen_rtx_SYMBOL_REF (Pmode, deferred_plabels[i].name), TARGET_64BIT ? 8 : 4, TARGET_64BIT ? 64 : 32, 1); } @@ -5546,7 +5552,7 @@ output_cbranch (operands, nullify, length, negated, insn) { xoperands[4] = gen_label_rtx (); output_asm_insn ("addil L'%l0-%l4,%%r1", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (xoperands[4])); output_asm_insn ("ldo R'%l0-%l4(%%r1),%%r1", xoperands); } @@ -6248,7 +6254,7 @@ output_millicode_call (insn, call_dest) { xoperands[1] = gen_label_rtx (); output_asm_insn ("addil L'%0-%l1,%%r1", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (xoperands[1])); output_asm_insn ("ldo R'%0-%l1(%%r1),%%r1", xoperands); } @@ -6292,7 +6298,7 @@ output_millicode_call (insn, call_dest) millicode symbol but not an arbitrary external symbol when generating SOM output. */ xoperands[1] = gen_label_rtx (); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (xoperands[1])); output_asm_insn ("addil L'%0-%l1,%%r1", xoperands); output_asm_insn ("ldo R'%0-%l1(%%r1),%%r1", xoperands); @@ -6329,7 +6335,7 @@ output_millicode_call (insn, call_dest) { xoperands[1] = gen_label_rtx (); output_asm_insn ("ldo %0-%1(%2),%2", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (xoperands[1])); } else @@ -6540,7 +6546,7 @@ output_call (insn, call_dest, sibcall) xoperands[1] = gen_label_rtx (); output_asm_insn ("{bl|b,l} .+8,%%r1", xoperands); output_asm_insn ("addil L'%0-%l1,%%r1", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (xoperands[1])); output_asm_insn ("ldo R'%0-%l1(%%r1),%%r1", xoperands); } @@ -6667,8 +6673,8 @@ output_call (insn, call_dest, sibcall) { xoperands[1] = gen_label_rtx (); output_asm_insn ("ldo %0-%1(%%r2),%%r2", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", - CODE_LABEL_NUMBER (xoperands[1])); + (*targetm.asm_out.internal_label) (asm_out_file, "L", + CODE_LABEL_NUMBER (xoperands[1])); } else /* ??? This branch may not reach its target. */ @@ -6837,13 +6843,51 @@ pa_asm_output_mi_thunk (file, thunk_fndecl, delta, vcall_offset, function) { data_section (); fprintf (file, "\t.align 4\n"); - ASM_OUTPUT_INTERNAL_LABEL (file, "LTHN", current_thunk_number); + (*targetm.asm_out.internal_label) (file, "LTHN", current_thunk_number); fprintf (file, "\t.word P'%s\n", target_name); function_section (thunk_fndecl); } current_thunk_number++; } +/* Only direct calls to static functions are allowed to be sibling (tail) + call optimized. + + This restriction is necessary because some linker generated stubs will + store return pointers into rp' in some cases which might clobber a + live value already in rp'. + + In a sibcall the current function and the target function share stack + space. Thus if the path to the current function and the path to the + target function save a value in rp', they save the value into the + same stack slot, which has undesirable consequences. + + Because of the deferred binding nature of shared libraries any function + with external scope could be in a different load module and thus require + rp' to be saved when calling that function. So sibcall optimizations + can only be safe for static function. + + Note that GCC never needs return value relocations, so we don't have to + worry about static calls with return value relocations (which require + saving rp'). + + It is safe to perform a sibcall optimization when the target function + will never return. */ +static bool +pa_function_ok_for_sibcall (decl, exp) + tree decl; + tree exp ATTRIBUTE_UNUSED; +{ +#ifdef TARGET_HAS_STUBS_AND_ELF_SECTIONS + /* Sibcalls, stubs, and elf sections don't play well. */ + return false; +#endif + return (decl + && ! TARGET_PORTABLE_RUNTIME + && ! TARGET_64BIT + && ! TREE_PUBLIC (decl)); +} + /* Returns 1 if the 6 operands specified in OPERANDS are suitable for use in fmpyadd instructions. */ int diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 860b7590d98..a1954e189fc 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -926,7 +926,7 @@ extern enum cmp_type hppa_branch_type; #endif #define FUNCTION_PROFILER(FILE, LABEL) \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL) + (*targetm.asm_out.internal_label) (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL) #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no) void hppa_profile_hook PARAMS ((int label_no)); @@ -1729,12 +1729,6 @@ do { \ fputs (xname, FILE); \ } while (0) -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);} - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -1802,13 +1796,7 @@ do { \ assemble_name ((FILE), (NAME)); \ fprintf ((FILE), "\n\t.block %d\n", (SIZE));} -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* All HP assemblers use "!" to separate logical lines. */ #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!') @@ -1889,35 +1877,6 @@ do { \ /* The number of Pmode words for the setjmp buffer. */ #define JMP_BUF_SIZE 50 -/* Only direct calls to static functions are allowed to be sibling (tail) - call optimized. - - This restriction is necessary because some linker generated stubs will - store return pointers into rp' in some cases which might clobber a - live value already in rp'. - - In a sibcall the current function and the target function share stack - space. Thus if the path to the current function and the path to the - target function save a value in rp', they save the value into the - same stack slot, which has undesirable consequences. - - Because of the deferred binding nature of shared libraries any function - with external scope could be in a different load module and thus require - rp' to be saved when calling that function. So sibcall optimizations - can only be safe for static function. - - Note that GCC never needs return value relocations, so we don't have to - worry about static calls with return value relocations (which require - saving rp'). - - It is safe to perform a sibcall optimization when the target function - will never return. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) \ - (DECL \ - && ! TARGET_PORTABLE_RUNTIME \ - && ! TARGET_64BIT \ - && ! TREE_PUBLIC (DECL)) - #define PREDICATE_CODES \ {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \ diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 640196b067d..00ea6e9b49d 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -2455,7 +2455,7 @@ output_asm_insn (\"{bl|b,l} .+8,%0\", xoperands); output_asm_insn (\"{depi|depwi} 0,31,2,%0\", xoperands); if (TARGET_SOM || ! TARGET_GAS) - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (xoperands[2])); /* If we're trying to load the address of a label that happens to be @@ -5724,7 +5724,7 @@ xoperands[2] = gen_label_rtx (); output_asm_insn (\"{bl|b,l} %0,%%r2\;ldo %1-%2(%%r2),%%r25\", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (xoperands[2])); return \"\"; }" @@ -5789,7 +5789,7 @@ output_asm_insn (\"{bl|b,l} .+8,%%r1\\n\\taddil L'%l0-%l1,%%r1\", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (xoperands[1])); output_asm_insn (\"ldo R'%l0-%l1(%%r1),%%r1\", xoperands); } @@ -6018,7 +6018,7 @@ if (TARGET_SOM || ! TARGET_GAS) { output_asm_insn (\"addil L%%$$dyncall-%1,%%r1\", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (xoperands[1])); output_asm_insn (\"ldo R%%$$dyncall-%1(%%r1),%%r1\", xoperands); } @@ -6194,7 +6194,7 @@ if (TARGET_SOM || ! TARGET_GAS) { output_asm_insn (\"addil L%%$$dyncall-%1,%%r1\", xoperands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (xoperands[1])); output_asm_insn (\"ldo R%%$$dyncall-%1(%%r1),%%r1\", xoperands); } diff --git a/gcc/config/pa/pa64-hpux.h b/gcc/config/pa/pa64-hpux.h index aa7dac75382..f212b7c0e34 100644 --- a/gcc/config/pa/pa64-hpux.h +++ b/gcc/config/pa/pa64-hpux.h @@ -173,10 +173,6 @@ do { \ } while (0) /* We need to use the HP style for internal labels. */ -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \ - fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM) - #undef ASM_GENERATE_INTERNAL_LABEL #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM)) diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index a7066bdffb7..d2f25ca6a29 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index f246aa47e5c..f9eb3f0e96a 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -668,10 +668,8 @@ extern int may_call_alloca; /* Addressing modes, and classification of registers for them. */ #define HAVE_POST_INCREMENT 1 -/* #define HAVE_POST_DECREMENT 0 */ #define HAVE_PRE_DECREMENT 1 -/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ @@ -1060,12 +1058,6 @@ fprintf (FILE, "$help$: . = .+8 ; space for tmp moves!\n") \ #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s_%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -1127,14 +1119,6 @@ fprintf (FILE, "$help$: . = .+8 ; space for tmp moves!\n") \ ( assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ":\t.=.+ %#ho\n", (unsigned short)(ROUNDED))) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* Print operand X (an rtx) in assembler syntax to file FILE. CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. For `%' followed by punctuation, CODE is the punctuation and X is null. diff --git a/gcc/config/ptx4.h b/gcc/config/ptx4.h index 3d8e5278567..4560b86eab3 100644 --- a/gcc/config/ptx4.h +++ b/gcc/config/ptx4.h @@ -93,16 +93,7 @@ Boston, MA 02111-1307, USA. "-no_0f_fix -no_eflags_chk %{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}" #endif -/* svr4 assemblers need the `-' (indicating input from stdin) to come after - the -o option (and its argument) for some reason. If we try to put it - before the -o option, the assembler will try to read the file named as - the output file in the -o option as an input file (after it has already - written some stuff to it) and the binary stuff contained therein will - cause totally confuse the assembler, resulting in many spurious error - messages. */ - -#undef ASM_FINAL_SPEC -#define ASM_FINAL_SPEC "%{pipe:-}" +#define AS_NEEDS_DASH_FOR_PIPED_INPUT /* Provide a LIB_SPEC appropriate for svr4. Here we tack on the default standard C library (unless we are building a shared library). */ diff --git a/gcc/config/romp/romp.c b/gcc/config/romp/romp.c index 44d422a3716..dc9761c7113 100644 --- a/gcc/config/romp/romp.c +++ b/gcc/config/romp/romp.c @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/romp/romp.h b/gcc/config/romp/romp.h index 1e3f6476d76..e659f8c8b04 100644 --- a/gcc/config/romp/romp.h +++ b/gcc/config/romp/romp.h @@ -834,12 +834,6 @@ struct rt_cargs {int gregs, fregs; }; /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -1322,18 +1316,12 @@ struct rt_cargs {int gregs, fregs; }; #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where @@ -1392,14 +1380,6 @@ struct rt_cargs {int gregs, fregs; }; assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%d\n", (SIZE))) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* Print operand X (an rtx) in assembler syntax to file FILE. CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. For `%' followed by punctuation, CODE is the punctuation and X is null. */ diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h index 73fd5beed3d..3d5d7e447b8 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h @@ -323,7 +323,7 @@ do \ assemble_name (FILE, \ XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));\ putc ('\n', FILE); \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LM", sym_lineno); \ + (*targetm.asm_out.internal_label) (FILE, "LM", sym_lineno); \ sym_lineno += 1; \ } \ while (0) diff --git a/gcc/config/rs6000/lynx.h b/gcc/config/rs6000/lynx.h index 7878ef94a17..9689bf150f9 100644 --- a/gcc/config/rs6000/lynx.h +++ b/gcc/config/rs6000/lynx.h @@ -33,7 +33,6 @@ Boston, MA 02111-1307, USA. */ #undef TARGET_ASM_SELECT_SECTION #undef USER_LABEL_PREFIX #undef ASM_OUTPUT_LABELREF -#undef ASM_OUTPUT_INTERNAL_LABEL #undef ASM_GENERATE_INTERNAL_LABEL #undef ASM_OUTPUT_COMMON #undef ASM_OUTPUT_LOCAL diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index 03f91baf2c7..a9ea94f9e05 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "cpplib.h" #include "tree.h" #include "c-pragma.h" diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 5c0ef2f6f30..27069b6f1d9 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -165,6 +167,7 @@ struct builtin_description const enum rs6000_builtins code; }; +static bool rs6000_function_ok_for_sibcall PARAMS ((tree, tree)); static void rs6000_add_gc_roots PARAMS ((void)); static int num_insns_constant_wide PARAMS ((HOST_WIDE_INT)); static void validate_condition_mode @@ -388,6 +391,9 @@ static const char alt_reg_names[][8] = #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall #endif +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL rs6000_function_ok_for_sibcall + struct gcc_target targetm = TARGET_INITIALIZER; /* Override command line options. Mostly we process the processor @@ -462,6 +468,9 @@ rs6000_override_options (default_cpu) {"405", PROCESSOR_PPC405, MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, + {"405f", PROCESSOR_PPC405, + MASK_POWERPC | MASK_NEW_MNEMONICS, + POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, {"505", PROCESSOR_MPCCORE, MASK_POWERPC | MASK_NEW_MNEMONICS, POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, @@ -9510,33 +9519,34 @@ rs6000_return_addr (count, frame) vector parameters are required to have a prototype, so the argument type info must be available here. (The tail recursion case can work with vector parameters, but there's no way to distinguish here.) */ -int -function_ok_for_sibcall (fndecl) - tree fndecl; +static bool +rs6000_function_ok_for_sibcall (decl, exp) + tree decl; + tree exp ATTRIBUTE_UNUSED; { tree type; - if (fndecl) + if (decl) { if (TARGET_ALTIVEC_VRSAVE) { - for (type = TYPE_ARG_TYPES (TREE_TYPE (fndecl)); + for (type = TYPE_ARG_TYPES (TREE_TYPE (decl)); type; type = TREE_CHAIN (type)) { if (TREE_CODE (TREE_VALUE (type)) == VECTOR_TYPE) - return 0; + return false; } } if (DEFAULT_ABI == ABI_DARWIN - || (*targetm.binds_local_p) (fndecl)) + || (*targetm.binds_local_p) (decl)) { - tree attr_list = TYPE_ATTRIBUTES (TREE_TYPE (fndecl)); + tree attr_list = TYPE_ATTRIBUTES (TREE_TYPE (decl)); if (!lookup_attribute ("longcall", attr_list) || lookup_attribute ("shortcall", attr_list)) - return 1; + return true; } } - return 0; + return false; } static int @@ -11424,7 +11434,7 @@ rs6000_output_mi_thunk (file, thunk_fndecl, delta, vcall_offset, function) /* Set up a TOC entry for the function. */ ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); toc_section (); - ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno); + (*targetm.asm_out.internal_label) (file, "Lthunk", labelno); labelno++; if (TARGET_MINIMAL_TOC) @@ -11747,7 +11757,7 @@ output_toc (file, x, labelno, mode) ASM_OUTPUT_ALIGN (file, 3); } - ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); + (*targetm.asm_out.internal_label) (file, "LC", labelno); /* Handle FP constants specially. Note that if we have a minimal TOC, things we put here aren't actually in the TOC, so we can allow diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index e5e9e27cce9..9bb6373682b 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -69,6 +69,7 @@ Boston, MA 02111-1307, USA. */ %{mcpu=401: -mppc} \ %{mcpu=403: -m403} \ %{mcpu=405: -m405} \ +%{mcpu=405f: -m405} \ %{mcpu=505: -mppc} \ %{mcpu=601: -m601} \ %{mcpu=602: -mppc} \ @@ -1804,10 +1805,6 @@ typedef struct rs6000_args argument is passed depends on whether or not it is a named argument. */ #define STRICT_ARGUMENT_NAMING 1 -/* We do not allow indirect calls to be optimized into sibling calls, nor - do we allow calls with vector parameters. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) function_ok_for_sibcall ((DECL)) - /* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. */ @@ -1933,9 +1930,6 @@ typedef struct rs6000_args /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - #define HAVE_PRE_DECREMENT 1 #define HAVE_PRE_INCREMENT 1 @@ -2801,14 +2795,6 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */ if ((LOG) != 0) \ fprintf (FILE, "\t.align %d\n", (LOG)) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* Pick up the return address upon entry to a procedure. Used for dwarf2 unwind information. This also enables the table driven mechanism. */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index a031a295e9b..2f11f5781cb 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -36,6 +36,7 @@ ;; 16 macho_correct_pic ;; 19 movesi_from_cr ;; 20 movesi_to_cr +;; 21 cntlz{w,d}2 count lead zero word/double word ;; Define an insn type attribute. This is used in function unit delay ;; computations. @@ -2364,12 +2365,27 @@ (const_int 0)))] "") -(define_insn "ffssi2" - [(set (match_operand:SI 0 "gpc_reg_operand" "=&r") - (ffs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))] +(define_expand "ffssi2" + [(set (match_dup 2) + (neg:SI (match_operand:SI 1 "gpc_reg_operand" "r"))) + (parallel [(set (match_dup 3) (and:SI (match_dup 1) + (match_dup 2))) + (clobber (scratch:CC))]) + (set (match_dup 4) (unspec:SI [(match_dup 3)] 21)) + (set (match_operand:SI 0 "gpc_reg_operand" "=r") + (minus:SI (const_int 32) (match_dup 4)))] "" - "neg %0,%1\;and %0,%0,%1\;{cntlz|cntlzw} %0,%0\;{sfi|subfic} %0,%0,32" - [(set_attr "length" "16")]) + { + operands[2] = gen_reg_rtx (SImode); + operands[3] = gen_reg_rtx (SImode); + operands[4] = gen_reg_rtx (SImode); + }) + +(define_insn "cntlzw2" + [(set (match_operand:SI 0 "gpc_reg_operand" "=r") + (unspec:SI [(match_operand:SI 1 "gpc_reg_operand" "r")] 21))] + "" + "{cntlz|cntlzw} %0,%1") (define_expand "mulsi3" [(use (match_operand:SI 0 "gpc_reg_operand" "")) @@ -6724,12 +6740,27 @@ (const_int 0)))] "") -(define_insn "ffsdi2" - [(set (match_operand:DI 0 "gpc_reg_operand" "=&r") - (ffs:DI (match_operand:DI 1 "gpc_reg_operand" "r")))] +(define_expand "ffsdi2" + [(set (match_dup 2) + (neg:DI (match_operand:DI 1 "gpc_reg_operand" "r"))) + (parallel [(set (match_dup 3) (and:DI (match_dup 1) + (match_dup 2))) + (clobber (scratch:CC))]) + (set (match_dup 4) (unspec:DI [(match_dup 3)] 21)) + (set (match_operand:DI 0 "gpc_reg_operand" "=r") + (minus:DI (const_int 64) (match_dup 4)))] "TARGET_POWERPC64" - "neg %0,%1\;and %0,%0,%1\;cntlzd %0,%0\;subfic %0,%0,64" - [(set_attr "length" "16")]) + { + operands[2] = gen_reg_rtx (DImode); + operands[3] = gen_reg_rtx (DImode); + operands[4] = gen_reg_rtx (DImode); + }) + +(define_insn "cntlzd2" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r")] 21))] + "TARGET_POWERPC64" + "cntlzd %0,%1") (define_insn "muldi3" [(set (match_operand:DI 0 "gpc_reg_operand" "=r") @@ -8581,7 +8612,9 @@ int endian = (WORDS_BIG_ENDIAN == 0); long l[2]; REAL_VALUE_TYPE rv; +#if HOST_BITS_PER_WIDE_INT >= 64 HOST_WIDE_INT val; +#endif REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]); REAL_VALUE_TO_TARGET_DOUBLE (rv, l); diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h index 68fa73f7997..b10649d904a 100644 --- a/gcc/config/rs6000/sysv4.h +++ b/gcc/config/rs6000/sysv4.h @@ -150,7 +150,6 @@ extern int g_switch_set; /* Whether -G xx was passed. */ N_("Link with libmvme.a, libc.a and crt0.o") }, \ { "emb", 0, \ N_("Set the PPC_EMB bit in the ELF flags header") }, \ - { "vxworks", 0, N_("no description yet") }, \ { "windiss", 0, N_("Use the WindISS simulator") }, \ { "shlib", 0, N_("no description yet") }, \ EXTRA_SUBTARGET_SWITCHES \ @@ -458,7 +457,7 @@ toc_section () \ { \ toc_initialized = 1; \ fprintf (asm_out_file, "%s\n", TOC_SECTION_ASM_OP); \ - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LCTOC", 0); \ + (*targetm.asm_out.internal_label) (asm_out_file, "LCTOC", 0); \ fprintf (asm_out_file, "\t.tc "); \ ASM_OUTPUT_INTERNAL_LABEL_PREFIX (asm_out_file, "LCTOC1[TC],"); \ ASM_OUTPUT_INTERNAL_LABEL_PREFIX (asm_out_file, "LCTOC1"); \ @@ -603,7 +602,7 @@ extern int rs6000_pic_labelno; { \ char buf[256]; \ \ - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LCL", rs6000_pic_labelno); \ + (*targetm.asm_out.internal_label) (FILE, "LCL", rs6000_pic_labelno); \ \ ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); \ fprintf (FILE, "\t%s ", init_ptr); \ @@ -646,7 +645,7 @@ extern int rs6000_pic_labelno; #define LOCAL_LABEL_PREFIX "." #define USER_LABEL_PREFIX "" -/* svr4.h overrides ASM_OUTPUT_INTERNAL_LABEL. */ +/* svr4.h overrides (*targetm.asm_out.internal_label). */ #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \ asm_fprintf (FILE, "%L%s", PREFIX) @@ -816,15 +815,15 @@ do { \ %{.s: %{mregnames} %{mno-regnames}} %{.S: %{mregnames} %{mno-regnames}} \ %{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \ %{mrelocatable} %{mrelocatable-lib} %{fpic:-K PIC} %{fPIC:-K PIC} \ -%{memb} %{!memb: %{msdata: -memb} %{msdata=eabi: -memb}} \ -%{mlittle} %{mlittle-endian} %{mbig} %{mbig-endian} \ -%{!mlittle: %{!mlittle-endian: %{!mbig: %{!mbig-endian: \ - %{mcall-freebsd: -mbig} \ - %{mcall-i960-old: -mlittle} \ - %{mcall-linux: -mbig} \ - %{mcall-gnu: -mbig} \ - %{mcall-netbsd: -mbig} \ -}}}}" +%{memb|msdata|msdata=eabi: -memb} \ +%{mlittle|mlittle-endian:-mlittle; \ + mbig|mbig-endian :-mbig; \ + mcall-aixdesc | \ + mcall-freebsd | \ + mcall-netbsd | \ + mcall-linux | \ + mcall-gnu :-mbig; \ + mcall-i960-old :-mlittle}" #define CC1_ENDIAN_BIG_SPEC "" @@ -839,19 +838,15 @@ do { \ /* Pass -G xxx to the compiler and set correct endian mode. */ #define CC1_SPEC "%{G*} \ -%{mlittle: %(cc1_endian_little)} %{!mlittle: %{mlittle-endian: %(cc1_endian_little)}} \ -%{mbig: %(cc1_endian_big)} %{!mbig: %{mbig-endian: %(cc1_endian_big)}} \ -%{!mlittle: %{!mlittle-endian: %{!mbig: %{!mbig-endian: \ - %{mcall-aixdesc: -mbig %(cc1_endian_big) } \ - %{mcall-freebsd: -mbig %(cc1_endian_big) } \ - %{mcall-i960-old: -mlittle %(cc1_endian_little) } \ - %{mcall-linux: -mbig %(cc1_endian_big) } \ - %{mcall-gnu: -mbig %(cc1_endian_big) } \ - %{mcall-netbsd: -mbig %(cc1_endian_big) } \ - %{!mcall-aixdesc: %{!mcall-freebsd: %{!mcall-i960-old: %{!mcall-linux: %{!mcall-gnu: %{!mcall-netbsd: \ - %(cc1_endian_default) \ - }}}}}} \ -}}}} \ +%{mlittle|mlittle-endian: %(cc1_endian_little); \ + mbig |mbig-endian : %(cc1_endian_big); \ + mcall-aixdesc | \ + mcall-freebsd | \ + mcall-netbsd | \ + mcall-linux | \ + mcall-gnu : -mbig %(cc1_endian_big); \ + mcall-i960-old : -mlittle %(cc1_endian_little); \ + : %(cc1_endian_default)} \ %{mno-sdata: -msdata=none } \ %{meabi: %{!mcall-*: -mcall-sysv }} \ %{!meabi: %{!mno-eabi: \ @@ -884,18 +879,16 @@ do { \ /* Default starting address if specified. */ #define LINK_START_SPEC "\ -%{mads: %(link_start_ads) } \ -%{myellowknife: %(link_start_yellowknife) } \ -%{mmvme: %(link_start_mvme) } \ -%{msim: %(link_start_sim) } \ -%{mwindiss: %(link_start_windiss) } \ -%{mcall-freebsd: %(link_start_freebsd) } \ -%{mcall-linux: %(link_start_linux) } \ -%{mcall-gnu: %(link_start_gnu) } \ -%{mcall-netbsd: %(link_start_netbsd) } \ -%{!mads: %{!myellowknife: %{!mmvme: %{!msim: %{!mwindiss: \ - %{!mcall-linux: %{!mcall-gnu: %{!mcall-netbsd: \ - %{!mcall-freebsd: %(link_start_default) }}}}}}}}}" +%{mads : %(link_start_ads) ; \ + myellowknife : %(link_start_yellowknife) ; \ + mmvme : %(link_start_mvme) ; \ + msim : %(link_start_sim) ; \ + mwindiss : %(link_start_windiss) ; \ + mcall-freebsd: %(link_start_freebsd) ; \ + mcall-linux : %(link_start_linux) ; \ + mcall-gnu : %(link_start_gnu) ; \ + mcall-netbsd : %(link_start_netbsd) ; \ + : %(link_start_default) }" #define LINK_START_DEFAULT_SPEC "" @@ -943,18 +936,16 @@ do { \ /* Any specific OS flags. */ #define LINK_OS_SPEC "\ -%{mads: %(link_os_ads) } \ -%{myellowknife: %(link_os_yellowknife) } \ -%{mmvme: %(link_os_mvme) } \ -%{msim: %(link_os_sim) } \ -%{mwindiss: %(link_os_windiss) } \ -%{mcall-freebsd: %(link_os_freebsd) } \ -%{mcall-linux: %(link_os_linux) } \ -%{mcall-gnu: %(link_os_gnu) } \ -%{mcall-netbsd: %(link_os_netbsd) } \ -%{!mads: %{!myellowknife: %{!mmvme: %{!msim: %{!mwindiss: \ - %{!mcall-freebsd: %{!mcall-linux: %{!mcall-gnu: \ - %{!mcall-netbsd: %(link_os_default) }}}}}}}}}" +%{mads : %(link_os_ads) ; \ + myellowknife : %(link_os_yellowknife) ; \ + mmvme : %(link_os_mvme) ; \ + msim : %(link_os_sim) ; \ + mwindiss : %(link_os_windiss) ; \ + mcall-freebsd: %(link_os_freebsd) ; \ + mcall-linux : %(link_os_linux) ; \ + mcall-gnu : %(link_os_gnu) ; \ + mcall-netbsd : %(link_os_netbsd) ; \ + : %(link_os_default) }" #define LINK_OS_DEFAULT_SPEC "" @@ -966,74 +957,64 @@ do { \ /* Override rs6000.h definition. */ #undef CPP_SPEC #define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_sysv) \ -%{mads: %(cpp_os_ads) } \ -%{myellowknife: %(cpp_os_yellowknife) } \ -%{mmvme: %(cpp_os_mvme) } \ -%{msim: %(cpp_os_sim) } \ -%{mwindiss: %(cpp_os_windiss) } \ -%{mcall-freebsd: %(cpp_os_freebsd) } \ -%{mcall-linux: %(cpp_os_linux) } \ -%{mcall-gnu: %(cpp_os_gnu) } \ -%{mcall-netbsd: %(cpp_os_netbsd) } \ -%{!mads: %{!myellowknife: %{!mmvme: %{!msim: %{!mwindiss: \ - %{!mcall-freebsd: %{!mcall-linux: %{!mcall-gnu: \ - %{!mcall-netbsd: %(cpp_os_default) }}}}}}}}}" +%{mads : %(cpp_os_ads) ; \ + myellowknife : %(cpp_os_yellowknife) ; \ + mmvme : %(cpp_os_mvme) ; \ + msim : %(cpp_os_sim) ; \ + mwindiss : %(cpp_os_windiss) ; \ + mcall-freebsd: %(cpp_os_freebsd) ; \ + mcall-linux : %(cpp_os_linux) ; \ + mcall-gnu : %(cpp_os_gnu) ; \ + mcall-netbsd : %(cpp_os_netbsd) ; \ + : %(cpp_os_default) }" #define CPP_OS_DEFAULT_SPEC "" /* Override svr4.h definition. */ #undef STARTFILE_SPEC #define STARTFILE_SPEC "\ -%{mads: %(startfile_ads) } \ -%{myellowknife: %(startfile_yellowknife) } \ -%{mmvme: %(startfile_mvme) } \ -%{msim: %(startfile_sim) } \ -%{mwindiss: %(startfile_windiss) } \ -%{mcall-freebsd: %(startfile_freebsd) } \ -%{mcall-linux: %(startfile_linux) } \ -%{mcall-gnu: %(startfile_gnu) } \ -%{mcall-netbsd: %(startfile_netbsd) } \ -%{!mads: %{!myellowknife: %{!mmvme: %{!msim: %{!mwindiss: \ - %{!mcall-freebsd: %{!mcall-linux: %{!mcall-gnu: \ - %{!mcall-netbsd: %(startfile_default) }}}}}}}}}" +%{mads : %(startfile_ads) ; \ + myellowknife : %(startfile_yellowknife) ; \ + mmvme : %(startfile_mvme) ; \ + msim : %(startfile_sim) ; \ + mwindiss : %(startfile_windiss) ; \ + mcall-freebsd: %(startfile_freebsd) ; \ + mcall-linux : %(startfile_linux) ; \ + mcall-gnu : %(startfile_gnu) ; \ + mcall-netbsd : %(startfile_netbsd) ; \ + : %(startfile_default) }" #define STARTFILE_DEFAULT_SPEC "" /* Override svr4.h definition. */ #undef LIB_SPEC #define LIB_SPEC "\ -%{mads: %(lib_ads) } \ -%{myellowknife: %(lib_yellowknife) } \ -%{mmvme: %(lib_mvme) } \ -%{msim: %(lib_sim) } \ -%{mwindiss: %(lib_windiss) } \ -%{mcall-freebsd: %(lib_freebsd) } \ -%{mcall-linux: %(lib_linux) } \ -%{mcall-gnu: %(lib_gnu) } \ -%{mcall-netbsd: %(lib_netbsd) } \ -%{!mads: %{!myellowknife: %{!mmvme: %{!msim: %{!mwindiss: \ - %{!mcall-freebsd: %{!mcall-linux: %{!mcall-gnu: \ - %{!mcall-netbsd: %(lib_default) }}}}}}}}}" +%{mads : %(lib_ads) ; \ + myellowknife : %(lib_yellowknife) ; \ + mmvme : %(lib_mvme) ; \ + msim : %(lib_sim) ; \ + mwindiss : %(lib_windiss) ; \ + mcall-freebsd: %(lib_freebsd) ; \ + mcall-linux : %(lib_linux) ; \ + mcall-gnu : %(lib_gnu) ; \ + mcall-netbsd : %(lib_netbsd) ; \ + : %(lib_default) }" #define LIB_DEFAULT_SPEC "" /* Override svr4.h definition. */ #undef ENDFILE_SPEC #define ENDFILE_SPEC "\ -%{mads: crtsavres.o%s %(endfile_ads)} \ -%{myellowknife: crtsavres.o%s %(endfile_yellowknife)} \ -%{mmvme: crtsavres.o%s %(endfile_mvme)} \ -%{msim: crtsavres.o%s %(endfile_sim)} \ -%{mwindiss: %(endfile_windiss)} \ -%{mcall-freebsd: crtsavres.o%s %(endfile_freebsd) } \ -%{mcall-linux: crtsavres.o%s %(endfile_linux) } \ -%{mcall-gnu: crtsavres.o%s %(endfile_gnu) } \ -%{mcall-netbsd: crtsavres.o%s %(endfile_netbsd) } \ -%{mvxworks: crtsavres.o%s %(endfile_vxworks) } \ -%{!mads: %{!myellowknife: %{!mmvme: %{!msim: %{!mwindiss: \ - %{!mcall-freebsd: %{!mcall-linux: %{!mcall-gnu: \ - %{!mcall-netbsd: %{!mvxworks: %(crtsavres_default) \ - %(endfile_default) }}}}}}}}}}" +%{mads : crtsavres.o%s %(endfile_ads) ; \ + myellowknife : crtsavres.o%s %(endfile_yellowknife) ; \ + mmvme : crtsavres.o%s %(endfile_mvme) ; \ + msim : crtsavres.o%s %(endfile_sim) ; \ + mwindiss : %(endfile_windiss) ; \ + mcall-freebsd: crtsavres.o%s %(endfile_freebsd) ; \ + mcall-linux : crtsavres.o%s %(endfile_linux) ; \ + mcall-gnu : crtsavres.o%s %(endfile_gnu) ; \ + mcall-netbsd : crtsavres.o%s %(endfile_netbsd) ; \ + : %(crtsavres_default) %(endfile_default) }" #define CRTSAVRES_DEFAULT_SPEC "crtsavres.o%s" @@ -1205,48 +1186,6 @@ ncrtn.o%s" #define CPP_OS_NETBSD_SPEC "\ -D__powerpc__ -D__NetBSD__ -D__ELF__ -D__KPRINTF_ATTRIBUTE__" -/* VxWorks support. */ -/* VxWorks does all the library stuff itself. */ -#define LIB_VXWORKS_SPEC "" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ - -#define STARTFILE_VXWORKS_SPEC "" - -#define ENDFILE_VXWORKS_SPEC "" - -/* Because it uses ld -r, vxworks has no start/end files, nor starting - address. */ - -#define LINK_START_VXWORKS_SPEC "" - -#define LINK_OS_VXWORKS_SPEC "-r" - -#define CPP_OS_VXWORKS_SPEC "\ --DCPU_FAMILY=PPC \ -%{!mcpu*: \ - %{mpowerpc*: -DCPU=PPC603} \ - %{!mno-powerpc: -DCPU=PPC603}} \ -%{mcpu=powerpc: -DCPU=PPC603} \ -%{mcpu=401: -DCPU=PPC403} \ -%{mcpu=403: -DCPU=PPC403} \ -%{mcpu=405: -DCPU=PPC405} \ -%{mcpu=601: -DCPU=PPC601} \ -%{mcpu=602: -DCPU=PPC603} \ -%{mcpu=603: -DCPU=PPC603} \ -%{mcpu=603e: -DCPU=PPC603} \ -%{mcpu=ec603e: -DCPU=PPC603} \ -%{mcpu=604: -DCPU=PPC604} \ -%{mcpu=604e: -DCPU=PPC604} \ -%{mcpu=620: -DCPU=PPC604} \ -%{mcpu=740: -DCPU=PPC603} \ -%{mcpu=7450: -DCPU=PPC603} \ -%{mcpu=750: -DCPU=PPC603} \ -%{mcpu=801: -DCPU=PPC603} \ -%{mcpu=821: -DCPU=PPC603} \ -%{mcpu=823: -DCPU=PPC603} \ -%{mcpu=860: -DCPU=PPC603}" - /* WindISS support. */ #define LIB_WINDISS_SPEC "--start-group -li -lcfp -lwindiss -lram -limpl -limpfp --end-group" @@ -1280,7 +1219,6 @@ ncrtn.o%s" { "lib_gnu", LIB_GNU_SPEC }, \ { "lib_linux", LIB_LINUX_SPEC }, \ { "lib_netbsd", LIB_NETBSD_SPEC }, \ - { "lib_vxworks", LIB_VXWORKS_SPEC }, \ { "lib_windiss", LIB_WINDISS_SPEC }, \ { "lib_default", LIB_DEFAULT_SPEC }, \ { "startfile_ads", STARTFILE_ADS_SPEC }, \ @@ -1291,7 +1229,6 @@ ncrtn.o%s" { "startfile_gnu", STARTFILE_GNU_SPEC }, \ { "startfile_linux", STARTFILE_LINUX_SPEC }, \ { "startfile_netbsd", STARTFILE_NETBSD_SPEC }, \ - { "startfile_vxworks", STARTFILE_VXWORKS_SPEC }, \ { "startfile_windiss", STARTFILE_WINDISS_SPEC }, \ { "startfile_default", STARTFILE_DEFAULT_SPEC }, \ { "endfile_ads", ENDFILE_ADS_SPEC }, \ @@ -1302,7 +1239,6 @@ ncrtn.o%s" { "endfile_gnu", ENDFILE_GNU_SPEC }, \ { "endfile_linux", ENDFILE_LINUX_SPEC }, \ { "endfile_netbsd", ENDFILE_NETBSD_SPEC }, \ - { "endfile_vxworks", ENDFILE_VXWORKS_SPEC }, \ { "endfile_windiss", ENDFILE_WINDISS_SPEC }, \ { "endfile_default", ENDFILE_DEFAULT_SPEC }, \ { "link_path", LINK_PATH_SPEC }, \ @@ -1317,7 +1253,6 @@ ncrtn.o%s" { "link_start_gnu", LINK_START_GNU_SPEC }, \ { "link_start_linux", LINK_START_LINUX_SPEC }, \ { "link_start_netbsd", LINK_START_NETBSD_SPEC }, \ - { "link_start_vxworks", LINK_START_VXWORKS_SPEC }, \ { "link_start_windiss", LINK_START_WINDISS_SPEC }, \ { "link_start_default", LINK_START_DEFAULT_SPEC }, \ { "link_os", LINK_OS_SPEC }, \ @@ -1329,7 +1264,6 @@ ncrtn.o%s" { "link_os_linux", LINK_OS_LINUX_SPEC }, \ { "link_os_gnu", LINK_OS_GNU_SPEC }, \ { "link_os_netbsd", LINK_OS_NETBSD_SPEC }, \ - { "link_os_vxworks", LINK_OS_VXWORKS_SPEC }, \ { "link_os_windiss", LINK_OS_WINDISS_SPEC }, \ { "link_os_default", LINK_OS_DEFAULT_SPEC }, \ { "cc1_endian_big", CC1_ENDIAN_BIG_SPEC }, \ @@ -1343,7 +1277,6 @@ ncrtn.o%s" { "cpp_os_gnu", CPP_OS_GNU_SPEC }, \ { "cpp_os_linux", CPP_OS_LINUX_SPEC }, \ { "cpp_os_netbsd", CPP_OS_NETBSD_SPEC }, \ - { "cpp_os_vxworks", CPP_OS_VXWORKS_SPEC }, \ { "cpp_os_windiss", CPP_OS_WINDISS_SPEC }, \ { "cpp_os_default", CPP_OS_DEFAULT_SPEC }, diff --git a/gcc/config/rs6000/t-rs6000-c-rule b/gcc/config/rs6000/t-rs6000-c-rule index a768fb5b0ea..b9a92dd9f83 100644 --- a/gcc/config/rs6000/t-rs6000-c-rule +++ b/gcc/config/rs6000/t-rs6000-c-rule @@ -1,4 +1,5 @@ rs6000-c.o: $(srcdir)/config/rs6000/rs6000-c.c \ $(srcdir)/config/rs6000/rs6000-protos.h \ - $(CONFIG_H) $(SYSTEM_H) $(TREE_H) $(CPPLIB_H) $(TM_P_H) c-pragma.h errors.h - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION) + $(CONFIG_H) $(SYSTEM_H) $(TREE_H) $(CPPLIB_H) \ + $(TM_P_H) c-pragma.h errors.h coretypes.h $(TM_H) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/rs6000/rs6000-c.c diff --git a/gcc/config/rs6000/t-vxworks b/gcc/config/rs6000/t-vxworks new file mode 100644 index 00000000000..e89e47b8d09 --- /dev/null +++ b/gcc/config/rs6000/t-vxworks @@ -0,0 +1,10 @@ +# Multilibs for VxWorks. + +MULTILIB_OPTIONS = t403/t405/t440/t603/t604/t860 +MULTILIB_DIRNAMES = PPC403gnu PPC405gnu PPC440gnu \ + PPC603gnu PPC604gnu PPC860gnu + +MULTILIB_MATCHES = t604= + +# Put vxlib.c back in LIB2FUNCS_EXTRA (t-ppccomm clobbers it). +LIB2FUNCS_EXTRA += $(srcdir)/config/vxlib.c diff --git a/gcc/config/rs6000/vxppc.h b/gcc/config/rs6000/vxppc.h deleted file mode 100644 index 91250a68909..00000000000 --- a/gcc/config/rs6000/vxppc.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Definitions of target machine for GNU compiler. Vxworks PowerPC version. - Copyright (C) 1996, 2000 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* This file just exists to give specs for the PowerPC running on VxWorks. */ - -/* Reset defaults */ -#undef CPP_OS_DEFAULT_SPEC -#define CPP_OS_DEFAULT_SPEC "%(cpp_os_vxworks)" - -#undef LIB_DEFAULT_SPEC -#define LIB_DEFAULT_SPEC "%(lib_vxworks)" - -#undef STARTFILE_DEFAULT_SPEC -#define STARTFILE_DEFAULT_SPEC "%(startfile_vxworks)" - -#undef ENDFILE_DEFAULT_SPEC -#define ENDFILE_DEFAULT_SPEC "%(endfile_vxworks)" - -#undef LINK_START_DEFAULT_SPEC -#define LINK_START_DEFAULT_SPEC "%(link_start_vxworks)" - -#undef LINK_OS_DEFAULT_SPEC -#define LINK_OS_DEFAULT_SPEC "%(link_os_vxworks)" - -#undef TARGET_OS_CPP_BUILTINS -#define TARGET_OS_CPP_BUILTINS() \ - do \ - { \ - builtin_define ("__vxworks"); \ - builtin_define ("__vxworks__"); \ - builtin_assert ("system=vxworks"); \ - builtin_assert ("system=embedded"); \ - builtin_assert ("cpu=powerpc"); \ - builtin_assert ("machine=powerpc"); \ - } \ - while (0) - -/* We use stabs-in-elf for debugging */ -#undef PREFERRED_DEBUGGING_TYPE -#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG diff --git a/gcc/config/rs6000/vxworks.h b/gcc/config/rs6000/vxworks.h new file mode 100644 index 00000000000..dddd26d8d5e --- /dev/null +++ b/gcc/config/rs6000/vxworks.h @@ -0,0 +1,81 @@ +/* Definitions of target machine for GNU compiler. Vxworks PowerPC version. + Copyright (C) 1996, 2000, 2002 Free Software Foundation, Inc. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +/* N.B. Only big endian PPC is supported by VxWorks. */ + +#undef CPP_PREDEFINES +#define CPP_PREDEFINES \ + "-D__vxworks -D__vxworks__ -D_BIG_ENDIAN -D__BIG_ENDIAN__" + +/* We have to kill off the entire specs set created by rs6000/sysv4.h + and substitute our own set. The top level vxworks.h has done some + of this for us. */ + +#undef SUBTARGET_EXTRA_SPECS +#undef CPP_SPEC +#undef CC1_SPEC +#undef ASM_SPEC + +#define SUBTARGET_EXTRA_SPECS /* none needed */ + +#define CPP_SPEC \ +"-DCPU_FAMILY=PPC -D__ppc -D__EABI__ -D__ELF__ \ + %{t403: -DCPU=PPC403 -D_SOFT_FLOAT ; \ + t405: -DCPU=PPC405 -D_SOFT_FLOAT ; \ + t440: -DCPU=PPC440 -D_SOFT_FLOAT ; \ + t603: -DCPU=PPC603 ; \ + t604: -DCPU=PPC604 ; \ + t860: -DCPU=PPC860 -D_SOFT_FLOAT ; \ + : -DCPU=PPC604} \ + %{!msoft-float:-D__hardfp} \ + %{fpic: -D__PIC__=1 -D__pic__=1 ; \ + fPIC: -D__PIC__=2 -D__pic__=2 } \ + %(cpp_cpu)" + +/* N.B. GCC does not currently support the 440 processor as distinct + from the 405 series. */ +#define CC1_SPEC \ +"%{t403: -mcpu=403 -mstrict-align ; \ + t405: -mcpu=405 -mstrict-align ; \ + t440: -mcpu=405 -mstrict-align ; \ + t603: -mcpu=603 -mstrict-align ; \ + t604: -mcpu=604 -mstrict-align ; \ + t860: -mcpu=860 ; \ + : -mcpu=604 -mstrict-align } \ + %{G*} %{mno-sdata:-msdata=none} %{msdata:-msdata=default} \ + %{mlittle|mlittle-endian:-mstrict-align} \ + %{profile: -p} \ + %{fvec:-maltivec} %{fvec-eabi:-maltivec -mabi=altivec}" + +#define ASM_SPEC "%(asm_cpu) \ +%{.s: %{mregnames} %{mno-regnames}} %{.S: %{mregnames} %{mno-regnames}} \ +%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \ +%{mrelocatable} %{mrelocatable-lib} %{fpic:-K PIC} %{fPIC:-K PIC} -mbig" + +#undef MULTILIB_DEFAULTS +#define MULTILIB_DEFAULTS { "t604" } + +/* We can't use .ctors/.dtors sections. */ +#undef TARGET_ASM_OUTPUT_CONSTRUCTOR +#undef TARGET_ASM_OUTPUT_DESTRUCTOR + +/* Nor sdata. */ +#undef SDATA_DEFAULT_SIZE +#define SDATA_DEFAULT_SIZE 0 diff --git a/gcc/config/rs6000/xcoff.h b/gcc/config/rs6000/xcoff.h index 21d74a9e616..64a0dcd45db 100644 --- a/gcc/config/rs6000/xcoff.h +++ b/gcc/config/rs6000/xcoff.h @@ -325,12 +325,6 @@ toc_section () \ } \ } -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s..%u:\n", (PREFIX), (unsigned) (NUM)) - /* This is how to output an internal label prefix. rs6000.c uses this when generating traceback tables. */ @@ -338,11 +332,11 @@ toc_section () \ fprintf (FILE, "%s..", PREFIX) /* This is how to output a label for a jump table. Arguments are the same as - for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is + for (*targetm.asm_out.internal_label), except the insn for the jump table is passed. */ #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ -{ ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } +{ ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index 3f6ec452b1c..5e4741e86be 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "tm_p.h" @@ -5566,7 +5568,7 @@ s390_function_profiler (file, labelno) output_asm_insn ("bras\t%2,%l6", op); output_asm_insn (".long\t%4", op); output_asm_insn (".long\t%3", op); - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[6])); + (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (op[6])); output_asm_insn ("l\t%0,0(%2)", op); output_asm_insn ("l\t%2,4(%2)", op); output_asm_insn ("basr\t%0,%0", op); @@ -5579,10 +5581,10 @@ s390_function_profiler (file, labelno) output_asm_insn ("st\t%0,%1", op); output_asm_insn ("bras\t%2,%l6", op); - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[5])); + (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (op[5])); output_asm_insn (".long\t%4-%l5", op); output_asm_insn (".long\t%3-%l5", op); - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[6])); + (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (op[6])); output_asm_insn ("lr\t%0,%2", op); output_asm_insn ("a\t%0,0(%2)", op); output_asm_insn ("a\t%2,4(%2)", op); @@ -5728,16 +5730,19 @@ s390_output_mi_thunk (file, thunk, delta, vcall_offset, function) if (op[5]) { output_asm_insn (".align\t4", op); - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[5])); + (*targetm.asm_out.internal_label) (file, "L", + CODE_LABEL_NUMBER (op[5])); } if (op[6]) { - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[6])); + (*targetm.asm_out.internal_label) (file, "L", + CODE_LABEL_NUMBER (op[6])); output_asm_insn (".long\t%2", op); } if (op[7]) { - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[7])); + (*targetm.asm_out.internal_label) (file, "L", + CODE_LABEL_NUMBER (op[7])); output_asm_insn (".long\t%3", op); } } @@ -5750,7 +5755,8 @@ s390_output_mi_thunk (file, thunk, delta, vcall_offset, function) { op[5] = gen_label_rtx (); output_asm_insn ("basr\t%4,0", op); - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[5])); + (*targetm.asm_out.internal_label) (file, "L", + CODE_LABEL_NUMBER (op[5])); } /* Add DELTA to this pointer. */ @@ -5793,7 +5799,8 @@ s390_output_mi_thunk (file, thunk, delta, vcall_offset, function) Re-setup the base pointer (with a different base). */ op[5] = gen_label_rtx (); output_asm_insn ("basr\t%4,0", op); - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[5])); + (*targetm.asm_out.internal_label) (file, "L", + CODE_LABEL_NUMBER (op[5])); } /* Jump to target. */ @@ -5806,7 +5813,7 @@ s390_output_mi_thunk (file, thunk, delta, vcall_offset, function) /* Output literal pool. */ output_asm_insn (".align\t4", op); - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[8])); + (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (op[8])); if (!flag_pic) output_asm_insn (".long\t%0", op); else @@ -5814,12 +5821,14 @@ s390_output_mi_thunk (file, thunk, delta, vcall_offset, function) if (op[6]) { - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[6])); + (*targetm.asm_out.internal_label) (file, "L", + CODE_LABEL_NUMBER (op[6])); output_asm_insn (".long\t%2", op); } if (op[7]) { - ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (op[7])); + (*targetm.asm_out.internal_label) (file, "L", + CODE_LABEL_NUMBER (op[7])); output_asm_insn (".long\t%3", op); } } diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index 23721588c0f..6d8943e760d 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -926,13 +926,6 @@ extern int flag_pic; #define ASM_OUTPUT_SKIP(FILE, SIZE) \ fprintf ((FILE), "\t.set\t.,.+%u\n", (SIZE)) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ - ((OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */ #define LOCAL_LABEL_PREFIX "." diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 197aa67ebcb..4767ebbdaf5 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -5065,7 +5065,7 @@ output_asm_insn (\"lcr\\t%N0,%N1\", operands); output_asm_insn (\"je\\t%l0\", xop); output_asm_insn (\"bctr\\t%0,0\", operands); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, \"L\", + (*targetm.asm_out.internal_label) (asm_out_file, \"L\", CODE_LABEL_NUMBER (xop[0])); return \"\"; }" diff --git a/gcc/config/sh/coff.h b/gcc/config/sh/coff.h index 56399ae630b..4d6443e0209 100644 --- a/gcc/config/sh/coff.h +++ b/gcc/config/sh/coff.h @@ -50,10 +50,6 @@ Boston, MA 02111-1307, USA. */ #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ sprintf ((STRING), "*%s%s%ld", LOCAL_LABEL_PREFIX, (PREFIX), (long)(NUM)) -/* Output an internal label definition. */ -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - asm_fprintf ((FILE), "%L%s%d:\n", (PREFIX), (NUM)) - /* This is how to output an assembler line that says to advance the location counter by SIZE bytes. */ diff --git a/gcc/config/sh/elf.h b/gcc/config/sh/elf.h index 1c3e3c7a4a3..858adb1d2c4 100644 --- a/gcc/config/sh/elf.h +++ b/gcc/config/sh/elf.h @@ -92,10 +92,6 @@ Boston, MA 02111-1307, USA. */ #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ sprintf ((STRING), "*%s%s%ld", LOCAL_LABEL_PREFIX, (PREFIX), (long)(NUM)) -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - asm_fprintf ((FILE), "%L%s%d:\n", (PREFIX), (NUM)) - #undef ASM_OUTPUT_SOURCE_LINE #define ASM_OUTPUT_SOURCE_LINE(file, line) \ do \ diff --git a/gcc/config/sh/lib1funcs.asm b/gcc/config/sh/lib1funcs.asm index f37b5437293..77bb48a9128 100644 --- a/gcc/config/sh/lib1funcs.asm +++ b/gcc/config/sh/lib1funcs.asm @@ -38,9 +38,14 @@ Boston, MA 02111-1307, USA. */ amylaar@cygnus.com */ #ifdef __ELF__ -#define LOCAL(X) .L_##X +#define LOCAL(X) .L_##X +#define FUNC(X) .type X,@function +#define ENDFUNC0(X) .Lfe_##X: .size X,.Lfe_##X-X +#define ENDFUNC(X) ENDFUNC0(X) #else -#define LOCAL(X) L_##X +#define LOCAL(X) L_##X +#define FUNC(X) +#define ENDFUNC(X) #endif #define CONCAT(A,B) A##B @@ -87,6 +92,40 @@ Boston, MA 02111-1307, USA. */ .global GLOBAL(ashiftrt_r4_31) .global GLOBAL(ashiftrt_r4_32) + FUNC(GLOBAL(ashiftrt_r4_0)) + FUNC(GLOBAL(ashiftrt_r4_1)) + FUNC(GLOBAL(ashiftrt_r4_2)) + FUNC(GLOBAL(ashiftrt_r4_3)) + FUNC(GLOBAL(ashiftrt_r4_4)) + FUNC(GLOBAL(ashiftrt_r4_5)) + FUNC(GLOBAL(ashiftrt_r4_6)) + FUNC(GLOBAL(ashiftrt_r4_7)) + FUNC(GLOBAL(ashiftrt_r4_8)) + FUNC(GLOBAL(ashiftrt_r4_9)) + FUNC(GLOBAL(ashiftrt_r4_10)) + FUNC(GLOBAL(ashiftrt_r4_11)) + FUNC(GLOBAL(ashiftrt_r4_12)) + FUNC(GLOBAL(ashiftrt_r4_13)) + FUNC(GLOBAL(ashiftrt_r4_14)) + FUNC(GLOBAL(ashiftrt_r4_15)) + FUNC(GLOBAL(ashiftrt_r4_16)) + FUNC(GLOBAL(ashiftrt_r4_17)) + FUNC(GLOBAL(ashiftrt_r4_18)) + FUNC(GLOBAL(ashiftrt_r4_19)) + FUNC(GLOBAL(ashiftrt_r4_20)) + FUNC(GLOBAL(ashiftrt_r4_21)) + FUNC(GLOBAL(ashiftrt_r4_22)) + FUNC(GLOBAL(ashiftrt_r4_23)) + FUNC(GLOBAL(ashiftrt_r4_24)) + FUNC(GLOBAL(ashiftrt_r4_25)) + FUNC(GLOBAL(ashiftrt_r4_26)) + FUNC(GLOBAL(ashiftrt_r4_27)) + FUNC(GLOBAL(ashiftrt_r4_28)) + FUNC(GLOBAL(ashiftrt_r4_29)) + FUNC(GLOBAL(ashiftrt_r4_30)) + FUNC(GLOBAL(ashiftrt_r4_31)) + FUNC(GLOBAL(ashiftrt_r4_32)) + .align 1 GLOBAL(ashiftrt_r4_32): GLOBAL(ashiftrt_r4_31): @@ -166,6 +205,40 @@ GLOBAL(ashiftrt_r4_1): GLOBAL(ashiftrt_r4_0): rts nop + + ENDFUNC(GLOBAL(ashiftrt_r4_0)) + ENDFUNC(GLOBAL(ashiftrt_r4_1)) + ENDFUNC(GLOBAL(ashiftrt_r4_2)) + ENDFUNC(GLOBAL(ashiftrt_r4_3)) + ENDFUNC(GLOBAL(ashiftrt_r4_4)) + ENDFUNC(GLOBAL(ashiftrt_r4_5)) + ENDFUNC(GLOBAL(ashiftrt_r4_6)) + ENDFUNC(GLOBAL(ashiftrt_r4_7)) + ENDFUNC(GLOBAL(ashiftrt_r4_8)) + ENDFUNC(GLOBAL(ashiftrt_r4_9)) + ENDFUNC(GLOBAL(ashiftrt_r4_10)) + ENDFUNC(GLOBAL(ashiftrt_r4_11)) + ENDFUNC(GLOBAL(ashiftrt_r4_12)) + ENDFUNC(GLOBAL(ashiftrt_r4_13)) + ENDFUNC(GLOBAL(ashiftrt_r4_14)) + ENDFUNC(GLOBAL(ashiftrt_r4_15)) + ENDFUNC(GLOBAL(ashiftrt_r4_16)) + ENDFUNC(GLOBAL(ashiftrt_r4_17)) + ENDFUNC(GLOBAL(ashiftrt_r4_18)) + ENDFUNC(GLOBAL(ashiftrt_r4_19)) + ENDFUNC(GLOBAL(ashiftrt_r4_20)) + ENDFUNC(GLOBAL(ashiftrt_r4_21)) + ENDFUNC(GLOBAL(ashiftrt_r4_22)) + ENDFUNC(GLOBAL(ashiftrt_r4_23)) + ENDFUNC(GLOBAL(ashiftrt_r4_24)) + ENDFUNC(GLOBAL(ashiftrt_r4_25)) + ENDFUNC(GLOBAL(ashiftrt_r4_26)) + ENDFUNC(GLOBAL(ashiftrt_r4_27)) + ENDFUNC(GLOBAL(ashiftrt_r4_28)) + ENDFUNC(GLOBAL(ashiftrt_r4_29)) + ENDFUNC(GLOBAL(ashiftrt_r4_30)) + ENDFUNC(GLOBAL(ashiftrt_r4_31)) + ENDFUNC(GLOBAL(ashiftrt_r4_32)) #endif #ifdef L_ashiftrt_n @@ -188,6 +261,7 @@ GLOBAL(ashiftrt_r4_0): ! .global GLOBAL(ashrsi3) + FUNC(GLOBAL(ashrsi3)) .align 2 GLOBAL(ashrsi3): mov #31,r0 @@ -315,6 +389,7 @@ LOCAL(ashrsi3_0): rts nop + ENDFUNC(GLOBAL(ashrsi3)) #endif #ifdef L_ashiftlt @@ -336,6 +411,7 @@ LOCAL(ashrsi3_0): ! (none) ! .global GLOBAL(ashlsi3) + FUNC(GLOBAL(ashlsi3)) .align 2 GLOBAL(ashlsi3): mov #31,r0 @@ -472,6 +548,7 @@ LOCAL(ashlsi3_0): rts nop + ENDFUNC(GLOBAL(ashlsi3)) #endif #ifdef L_lshiftrt @@ -493,6 +570,7 @@ LOCAL(ashlsi3_0): ! (none) ! .global GLOBAL(lshrsi3) + FUNC(GLOBAL(lshrsi3)) .align 2 GLOBAL(lshrsi3): mov #31,r0 @@ -629,6 +707,7 @@ LOCAL(lshrsi3_0): rts nop + ENDFUNC(GLOBAL(lshrsi3)) #endif #ifdef L_movstr @@ -645,76 +724,113 @@ done: add #64,r4 .align 4 .global GLOBAL(movstrSI64) + FUNC(GLOBAL(movstrSI64)) GLOBAL(movstrSI64): mov.l @(60,r5),r0 mov.l r0,@(60,r4) .global GLOBAL(movstrSI60) + FUNC(GLOBAL(movstrSI60)) GLOBAL(movstrSI60): mov.l @(56,r5),r0 mov.l r0,@(56,r4) .global GLOBAL(movstrSI56) + FUNC(GLOBAL(movstrSI56)) GLOBAL(movstrSI56): mov.l @(52,r5),r0 mov.l r0,@(52,r4) .global GLOBAL(movstrSI52) + FUNC(GLOBAL(movstrSI52)) GLOBAL(movstrSI52): mov.l @(48,r5),r0 mov.l r0,@(48,r4) .global GLOBAL(movstrSI48) + FUNC(GLOBAL(movstrSI48)) GLOBAL(movstrSI48): mov.l @(44,r5),r0 mov.l r0,@(44,r4) .global GLOBAL(movstrSI44) + FUNC(GLOBAL(movstrSI44)) GLOBAL(movstrSI44): mov.l @(40,r5),r0 mov.l r0,@(40,r4) .global GLOBAL(movstrSI40) + FUNC(GLOBAL(movstrSI40)) GLOBAL(movstrSI40): mov.l @(36,r5),r0 mov.l r0,@(36,r4) .global GLOBAL(movstrSI36) + FUNC(GLOBAL(movstrSI36)) GLOBAL(movstrSI36): mov.l @(32,r5),r0 mov.l r0,@(32,r4) .global GLOBAL(movstrSI32) + FUNC(GLOBAL(movstrSI32)) GLOBAL(movstrSI32): mov.l @(28,r5),r0 mov.l r0,@(28,r4) .global GLOBAL(movstrSI28) + FUNC(GLOBAL(movstrSI28)) GLOBAL(movstrSI28): mov.l @(24,r5),r0 mov.l r0,@(24,r4) .global GLOBAL(movstrSI24) + FUNC(GLOBAL(movstrSI24)) GLOBAL(movstrSI24): mov.l @(20,r5),r0 mov.l r0,@(20,r4) .global GLOBAL(movstrSI20) + FUNC(GLOBAL(movstrSI20)) GLOBAL(movstrSI20): mov.l @(16,r5),r0 mov.l r0,@(16,r4) .global GLOBAL(movstrSI16) + FUNC(GLOBAL(movstrSI16)) GLOBAL(movstrSI16): mov.l @(12,r5),r0 mov.l r0,@(12,r4) .global GLOBAL(movstrSI12) + FUNC(GLOBAL(movstrSI12)) GLOBAL(movstrSI12): mov.l @(8,r5),r0 mov.l r0,@(8,r4) .global GLOBAL(movstrSI8) + FUNC(GLOBAL(movstrSI8)) GLOBAL(movstrSI8): mov.l @(4,r5),r0 mov.l r0,@(4,r4) .global GLOBAL(movstrSI4) + FUNC(GLOBAL(movstrSI4)) GLOBAL(movstrSI4): mov.l @(0,r5),r0 mov.l r0,@(0,r4) + .global GLOBAL(movstrSI0) + FUNC(GLOBAL(movstrSI0)) GLOBAL(movstrSI0): rts nop + ENDFUNC(GLOBAL(movstrSI64)) + ENDFUNC(GLOBAL(movstrSI60)) + ENDFUNC(GLOBAL(movstrSI56)) + ENDFUNC(GLOBAL(movstrSI52)) + ENDFUNC(GLOBAL(movstrSI48)) + ENDFUNC(GLOBAL(movstrSI44)) + ENDFUNC(GLOBAL(movstrSI40)) + ENDFUNC(GLOBAL(movstrSI36)) + ENDFUNC(GLOBAL(movstrSI32)) + ENDFUNC(GLOBAL(movstrSI28)) + ENDFUNC(GLOBAL(movstrSI24)) + ENDFUNC(GLOBAL(movstrSI20)) + ENDFUNC(GLOBAL(movstrSI16)) + ENDFUNC(GLOBAL(movstrSI12)) + ENDFUNC(GLOBAL(movstrSI8)) + ENDFUNC(GLOBAL(movstrSI4)) + ENDFUNC(GLOBAL(movstrSI0)) + .align 4 .global GLOBAL(movstr) + FUNC(GLOBAL(movstr)) GLOBAL(movstr): mov.l @(60,r5),r0 mov.l r0,@(60,r4) @@ -771,6 +887,8 @@ GLOBAL(movstr): add #64,r5 bra GLOBAL(movstr) add #64,r4 + + FUNC(GLOBAL(movstr)) #endif #ifdef L_movstr_i4 @@ -779,6 +897,10 @@ GLOBAL(movstr): .global GLOBAL(movstr_i4_odd) .global GLOBAL(movstrSI12_i4) + FUNC(GLOBAL(movstr_i4_even)) + FUNC(GLOBAL(movstr_i4_odd)) + FUNC(GLOBAL(movstrSI12_i4)) + .p2align 5 L_movstr_2mod4_end: mov.l r0,@(16,r4) @@ -787,6 +909,11 @@ L_movstr_2mod4_end: .p2align 2 +GLOBAL(movstr_i4_even): + mov.l @r5+,r0 + bra L_movstr_start_even + mov.l @r5+,r1 + GLOBAL(movstr_i4_odd): mov.l @r5+,r1 add #-4,r4 @@ -813,10 +940,8 @@ L_movstr_start_even: rts mov.l r3,@(12,r4) -GLOBAL(movstr_i4_even): - mov.l @r5+,r0 - bra L_movstr_start_even - mov.l @r5+,r1 + ENDFUNC(GLOBAL(movstr_i4_even)) + ENDFUNC(GLOBAL(movstr_i4_odd)) .p2align 4 GLOBAL(movstrSI12_i4): @@ -827,12 +952,15 @@ GLOBAL(movstrSI12_i4): mov.l r1,@(4,r4) rts mov.l r2,@(8,r4) + + ENDFUNC(GLOBAL(movstrSI12_i4)) #endif #ifdef L_mulsi3 .global GLOBAL(mulsi3) + FUNC(GLOBAL(mulsi3)) ! r4 = aabb ! r5 = ccdd @@ -865,7 +993,7 @@ hiset: sts macl,r0 ! r0 = bb*dd rts add r2,r0 - + FUNC(GLOBAL(mulsi3)) #endif #endif /* ! __SH5__ */ #ifdef L_sdivsi3_i4 @@ -875,6 +1003,7 @@ hiset: sts macl,r0 ! r0 = bb*dd !! args in r4 and r5, result in fpul, clobber dr0, dr2 .global GLOBAL(sdivsi3_i4) + FUNC(GLOBAL(sdivsi3_i4)) GLOBAL(sdivsi3_i4): lds r4,fpul float fpul,dr0 @@ -884,6 +1013,7 @@ GLOBAL(sdivsi3_i4): rts ftrc dr0,fpul + ENDFUNC(GLOBAL(sdivsi3_i4)) #elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) || (defined (__SH5__) && ! defined __SH4_NOFPU__) !! args in r4 and r5, result in fpul, clobber r2, dr0, dr2 @@ -892,6 +1022,7 @@ GLOBAL(sdivsi3_i4): .mode SHcompact #endif .global GLOBAL(sdivsi3_i4) + FUNC(GLOBAL(sdivsi3_i4)) GLOBAL(sdivsi3_i4): sts.l fpscr,@-r15 mov #8,r2 @@ -906,6 +1037,7 @@ GLOBAL(sdivsi3_i4): rts lds.l @r15+,fpscr + ENDFUNC(GLOBAL(sdivsi3_i4)) #endif /* ! __SH5__ || __SH5__ == 32 */ #endif /* ! __SH4__ */ #endif @@ -920,9 +1052,10 @@ GLOBAL(sdivsi3_i4): !! !! -!! args in r4 and r5, result in r0 clobber r1,r2,r3 +!! args in r4 and r5, result in r0 clobber r1, r2, r3, and t bit .global GLOBAL(sdivsi3) + FUNC(GLOBAL(sdivsi3)) #if __SHMEDIA__ #if __SH5__ == 32 .section .text..SHmedia32,"ax" @@ -1166,6 +1299,7 @@ GLOBAL(sdivsi3): div0: rts mov #0,r0 + ENDFUNC(GLOBAL(sdivsi3)) #endif /* ! __SHMEDIA__ */ #endif /* ! __SH4__ */ #endif @@ -1174,9 +1308,11 @@ div0: rts .title "SH DIVIDE" !! 4 byte integer Divide code for the Hitachi SH #ifdef __SH4__ -!! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4 +!! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4, +!! and t bit .global GLOBAL(udivsi3_i4) + FUNC(GLOBAL(udivsi3_i4)) GLOBAL(udivsi3_i4): mov #1,r1 cmp/hi r1,r5 @@ -1217,11 +1353,13 @@ trivial: L1: .double 2147483648 + ENDFUNC(GLOBAL(udivsi3_i4)) #elif defined (__SH5__) && ! defined (__SH4_NOFPU__) #if ! __SH5__ || __SH5__ == 32 !! args in r4 and r5, result in fpul, clobber r20, r21, dr0, fr33 .mode SHmedia .global GLOBAL(udivsi3_i4) + FUNC(GLOBAL(udivsi3_i4)) GLOBAL(udivsi3_i4): addz.l r4,r63,r20 addz.l r5,r63,r21 @@ -1234,6 +1372,8 @@ GLOBAL(udivsi3_i4): ftrc.dq dr0,dr32 fmov.s fr33,fr32 blink tr0,r63 + + ENDFUNC(GLOBAL(udivsi3_i4)) #endif /* ! __SH5__ || __SH5__ == 32 */ #elif defined(__SH4_SINGLE__) || defined(__SH4_SINGLE_ONLY__) !! args in r4 and r5, result in fpul, clobber r0, r1, r4, r5, dr0, dr2, dr4 @@ -1287,6 +1427,7 @@ L1: #endif .double 2147483648 + ENDFUNC(GLOBAL(udivsi3_i4)) #endif /* ! __SH4__ */ #endif @@ -1297,6 +1438,7 @@ L1: !! args in r4 and r5, result in r0, clobbers r4, pr, and t bit .global GLOBAL(udivsi3) + FUNC(GLOBAL(udivsi3)) #if __SHMEDIA__ #if __SH5__ == 32 @@ -1485,6 +1627,7 @@ LOCAL(large_divisor): rts rotcl r0 + ENDFUNC(GLOBAL(udivsi3)) #endif /* ! __SHMEDIA__ */ #endif /* __SH4__ */ #endif /* L_udivsi3 */ @@ -1790,6 +1933,7 @@ GLOBAL(moddi3): .mode SHcompact #endif .global GLOBAL(set_fpscr) + FUNC(GLOBAL(set_fpscr)) GLOBAL(set_fpscr): lds r4,fpscr mov.l LOCAL(set_fpscr_L1),r1 @@ -1822,6 +1966,8 @@ GLOBAL(set_fpscr): .align 2 LOCAL(set_fpscr_L1): .long GLOBAL(fpscr_values) + + ENDFUNC(GLOBAL(set_fpscr)) #ifdef __ELF__ .comm GLOBAL(fpscr_values),8,4 #else @@ -1860,6 +2006,7 @@ GLOBAL(ic_invalidate): blink tr0, r63 #elif defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) .global GLOBAL(ic_invalidate) + FUNC(GLOBAL(ic_invalidate)) GLOBAL(ic_invalidate): ocbwb @r4 mova 0f,r0 @@ -1882,6 +2029,8 @@ GLOBAL(ic_invalidate): nop .endr .endr + + ENDFUNC(GLOBAL(ic_invalidate)) #endif /* SH4 */ #endif /* L_ic_invalidate */ @@ -1940,6 +2089,7 @@ LOCAL(ct_main_table): will be expanded into r2/r3 upon return. */ .global GLOBAL(GCC_shcompact_call_trampoline) + FUNC(GLOBAL(GCC_shcompact_call_trampoline)) GLOBAL(GCC_shcompact_call_trampoline): ptabs/l r0, tr0 /* Prepare to call the actual function. */ movi ((datalabel LOCAL(ct_main_table) - 31 * 2) >> 16) & 65535, r0 @@ -2290,6 +2440,8 @@ LOCAL(ct_ret_wide): /* Call the function, so that we can unpack its shari r2, 32, r2 #endif blink tr0, r63 + + ENDFUNC(GLOBAL(GCC_shcompact_call_trampoline)) #endif /* L_shcompact_call_trampoline */ #ifdef L_shcompact_return_trampoline @@ -2302,6 +2454,7 @@ LOCAL(ct_ret_wide): /* Call the function, so that we can unpack its .section .text..SHmedia32, "ax" .align 2 .global GLOBAL(GCC_shcompact_return_trampoline) + FUNC(GLOBAL(GCC_shcompact_return_trampoline)) GLOBAL(GCC_shcompact_return_trampoline): ptabs/l r18, tr0 #if __LITTLE_ENDIAN__ @@ -2313,6 +2466,8 @@ GLOBAL(GCC_shcompact_return_trampoline): #endif or r3, r2, r2 blink tr0, r63 + + ENDFUNC(GLOBAL(GCC_shcompact_return_trampoline)) #endif /* L_shcompact_return_trampoline */ #ifdef L_shcompact_incoming_args @@ -2367,6 +2522,7 @@ LOCAL(ia_main_table): actual bit pattern. */ .global GLOBAL(GCC_shcompact_incoming_args) + FUNC(GLOBAL(GCC_shcompact_incoming_args)) GLOBAL(GCC_shcompact_incoming_args): ptabs/l r18, tr0 /* Prepare to return. */ shlri r17, 32, r0 /* Load the cookie. */ @@ -2519,6 +2675,7 @@ LOCAL(ia_r9_push): /* Push r9 onto the stack. */ LOCAL(ia_return): /* Return. */ blink tr0, r63 LOCAL(ia_end_of_push_seq): /* Label used to compute the first push instruction. */ + ENDFUNC(GLOBAL(GCC_shcompact_incoming_args)) #endif /* L_shcompact_incoming_args */ #endif #if __SH5__ @@ -2530,6 +2687,7 @@ LOCAL(ia_end_of_push_seq): /* Label used to compute the first push instruction. #endif .align 3 /* It is copied in units of 8 bytes in SHmedia mode. */ .global GLOBAL(GCC_nested_trampoline) + FUNC(GLOBAL(GCC_nested_trampoline)) GLOBAL(GCC_nested_trampoline): .mode SHmedia ptrel/u r63, tr0 @@ -2546,6 +2704,8 @@ GLOBAL(GCC_nested_trampoline): ld.l r0, 28, r1 #endif blink tr1, r63 + + ENDFUNC(GLOBAL(GCC_nested_trampoline)) #endif /* L_nested_trampoline */ #endif /* __SH5__ */ #if __SH5__ == 32 @@ -2555,6 +2715,7 @@ GLOBAL(GCC_nested_trampoline): .align 2 #ifndef __SH4_NOFPU__ .global GLOBAL(GCC_push_shmedia_regs) + FUNC(GLOBAL(GCC_push_shmedia_regs)) GLOBAL(GCC_push_shmedia_regs): addi.l r15, -14*8, r15 fst.d r15, 13*8, dr62 @@ -2573,6 +2734,7 @@ GLOBAL(GCC_push_shmedia_regs): fst.d r15, 0*8, dr36 #endif .global GLOBAL(GCC_push_shmedia_regs_nofpu) + FUNC(GLOBAL(GCC_push_shmedia_regs_nofpu)) GLOBAL(GCC_push_shmedia_regs_nofpu): ptabs/l r18, tr0 addi.l r15, -27*8, r15 @@ -2608,8 +2770,13 @@ GLOBAL(GCC_push_shmedia_regs_nofpu): st.q r15, 0*8, r28 blink tr0, r63 +#ifndef __SH4_NOFPU__ + ENDFUNC(GLOBAL(GCC_push_shmedia_regs)) +#endif + ENDFUNC(GLOBAL(GCC_push_shmedia_regs_nofpu)) #ifndef __SH4_NOFPU__ .global GLOBAL(GCC_pop_shmedia_regs) + FUNC(GLOBAL(GCC_pop_shmedia_regs)) GLOBAL(GCC_pop_shmedia_regs): pt .L0, tr1 movi 41*8, r0 @@ -2630,6 +2797,7 @@ GLOBAL(GCC_pop_shmedia_regs): blink tr1, r63 #endif .global GLOBAL(GCC_pop_shmedia_regs_nofpu) + FUNC(GLOBAL(GCC_pop_shmedia_regs_nofpu)) GLOBAL(GCC_pop_shmedia_regs_nofpu): movi 27*8, r0 .L0: @@ -2666,5 +2834,10 @@ GLOBAL(GCC_pop_shmedia_regs_nofpu): ld.q r15, 0*8, r28 add.l r15, r0, r15 blink tr0, r63 + +#ifndef __SH4_NOFPU__ + ENDFUNC(GLOBAL(GCC_pop_shmedia_regs)) +#endif + ENDFUNC(GLOBAL(GCC_pop_shmedia_regs_nofpu)) #endif /* __SH5__ == 32 */ #endif /* L_push_pop_shmedia_regs */ diff --git a/gcc/config/sh/libgcc-glibc.ver b/gcc/config/sh/libgcc-glibc.ver new file mode 100644 index 00000000000..734d3d6bfe1 --- /dev/null +++ b/gcc/config/sh/libgcc-glibc.ver @@ -0,0 +1,21 @@ +# In order to work around the very problems that force us to now generally +# create a libgcc.so, glibc reexported a number of routines from libgcc.a. +# By now choosing the same version tags for these specific routines, we +# maintain enough binary compatibility to allow future versions of glibc +# to defer implementation of these routines to libgcc.so via DT_AUXILIARY. + +# Note that we cannot use the default libgcc-glibc.ver file on sh, +# because GLIBC_2.0 does not exist on this architecture, as the first +# ever glibc release on the platform was GLIBC_2.2. + +%inherit GCC_3.0 GLIBC_2.2 +GLIBC_2.2 { + __register_frame + __register_frame_table + __deregister_frame + __register_frame_info + __deregister_frame_info + __frame_state_for + __register_frame_info_table +} + diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h index 1a3948386fc..c4f6171a5d0 100644 --- a/gcc/config/sh/linux.h +++ b/gcc/config/sh/linux.h @@ -23,6 +23,22 @@ Boston, MA 02111-1307, USA. */ #undef TARGET_VERSION #define TARGET_VERSION fputs (" (SH GNU/Linux with ELF)", stderr); +/* We're not SYSVR4, not having /usr/ccs */ +#undef MD_EXEC_PREFIX +#undef MD_STARTFILE_PREFIX + +/* This was defined in linux.h. Define it here also. */ +#define HANDLE_PRAGMA_PACK_PUSH_POP + +/* Enable DWARF 2 exceptions. */ +#undef DWARF2_UNWIND_INFO +#define DWARF2_UNWIND_INFO 1 + +#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ + (flag_pic \ + ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \ + : DW_EH_PE_absptr) + #undef SUBTARGET_CPP_SPEC #define SUBTARGET_CPP_SPEC "\ %{posix:-D_POSIX_SOURCE} \ @@ -55,9 +71,15 @@ do { \ #undef LIB_SPEC #define LIB_SPEC \ "%{shared: -lc} \ + %{!static:-rpath-link %R/lib:%R/usr/lib} \ %{!shared: %{pthread:-lthread} \ %{profile:-lc_p} %{!profile: -lc}}" +#if defined(HAVE_LD_EH_FRAME_HDR) +#undef LINK_EH_SPEC +#define LINK_EH_SPEC "%{!static:--eh-frame-hdr} " +#endif + #undef STARTFILE_SPEC #define STARTFILE_SPEC \ "%{!shared: \ @@ -65,3 +87,176 @@ do { \ %{!p:%{profile:gcrt1.o%s} \ %{!profile:crt1.o%s}}}} \ crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}" + +/* Output assembler code to STREAM to call the profiler. */ + +#undef FUNCTION_PROFILER +#define FUNCTION_PROFILER(STREAM,LABELNO) \ + do { \ + if (flag_pic) \ + { \ + fprintf (STREAM, "\tmov.l\t3f,r1\n"); \ + fprintf (STREAM, "\tmova\t3f,r0\n"); \ + fprintf (STREAM, "\tadd\tr1,r0\n"); \ + fprintf (STREAM, "\tmov.l\t1f,r1\n"); \ + fprintf (STREAM, "\tmov.l\t@(r0,r1),r1\n"); \ + } \ + else \ + fprintf (STREAM, "\tmov.l\t1f,r1\n"); \ + fprintf (STREAM, "\tsts.l\tpr,@-r15\n"); \ + fprintf (STREAM, "\tmova\t2f,r0\n"); \ + fprintf (STREAM, "\tjmp\t@r1\n"); \ + fprintf (STREAM, "\tlds\tr0,pr\n"); \ + fprintf (STREAM, "\t.align\t2\n"); \ + if (flag_pic) \ + { \ + fprintf (STREAM, "1:\t.long\tmcount@GOT\n"); \ + fprintf (STREAM, "3:\t.long\t_GLOBAL_OFFSET_TABLE_\n"); \ + } \ + else \ + fprintf (STREAM, "1:\t.long\tmcount\n"); \ + fprintf (STREAM, "2:\tlds.l\t@r15+,pr\n"); \ + } while (0) + +/* Do code reading to identify a signal frame, and set the frame + state data appropriately. See unwind-dw2.c for the structs. */ + +#ifdef IN_LIBGCC2 +#include <signal.h> +#include <sys/ucontext.h> +#include "insn-constants.h" + +# if defined (__SH5__) +#define SH_DWARF_FRAME_GP0 0 +#define SH_DWARF_FRAME_FP0 (__SH5__ == 32 ? 245 : 77) +#define SH_DWARF_FRAME_XD0 289 +#define SH_DWARF_FRAME_BT0 68 +#define SH_DWARF_FRAME_PR 241 +#define SH_DWARF_FRAME_PR_MEDIA 18 +#define SH_DWARF_FRAME_GBR 238 +#define SH_DWARF_FRAME_MACH 239 +#define SH_DWARF_FRAME_MACL 240 +#define SH_DWARF_FRAME_PC 64 +#define SH_DWARF_FRAME_SR 65 +#define SH_DWARF_FRAME_FPUL 244 +#define SH_DWARF_FRAME_FPSCR 243 +#else +#define SH_DWARF_FRAME_GP0 0 +#define SH_DWARF_FRAME_FP0 25 +#define SH_DWARF_FRAME_XD0 87 +#define SH_DWARF_FRAME_PR 17 +#define SH_DWARF_FRAME_GBR 19 +#define SH_DWARF_FRAME_MACH 20 +#define SH_DWARF_FRAME_MACL 21 +#define SH_DWARF_FRAME_PC 16 +#define SH_DWARF_FRAME_SR 22 +#define SH_DWARF_FRAME_FPUL 23 +#define SH_DWARF_FRAME_FPSCR 24 +#endif /* defined (__SH5__) */ + +#if defined (__SH5__) && __SH5__ != 32 +/* MD_FALLBACK_FRAME_STATE_FOR is not yet defiened for SHMEDIA. */ +#else /* defined (__SH5__) && __SH5__ != 32 */ + +#if defined (__SH3E__) || defined (__SH4__) || defined (__SH5__) +#define SH_FALLBACK_FRAME_FLOAT_STATE(SC, FS, CFA) \ + do { \ + int i_, r_; \ + \ + r_ = SH_DWARF_FRAME_FP0; \ + for (i_ = 0; i_ < 16; i_++) \ + { \ + (FS)->regs.reg[r_+i_].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[r_+i_].loc.offset \ + = (long)&((SC)->sc_fpregs[i_]) - (CFA); \ + } \ + \ + r_ = SH_DWARF_FRAME_XD0 ; \ + for (i_ = 0; i_ < 8; i_++) \ + { \ + (FS)->regs.reg[i_].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[i_].loc.offset \ + = (long)&((SC)->sc_xfpregs[2*i_]) - (CFA); \ + } \ + \ + (FS)->regs.reg[SH_DWARF_FRAME_FPUL].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_FPUL].loc.offset \ + = (long)&((SC)->sc_fpul) - (CFA); \ + (FS)->regs.reg[SH_DWARF_FRAME_FPSCR].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_FPSCR].loc.offset \ + = (long)&((SC)->sc_fpscr) - (CFA); \ + } while (0) + +#else +#define SH_FALLBACK_FRAME_FLOAT_STATE(SC, FS, CFA) +#endif + +#define MD_FALLBACK_FRAME_STATE_FOR(CONTEXT, FS, SUCCESS) \ + do { \ + unsigned char *pc_ = (CONTEXT)->ra; \ + struct sigcontext *sc_; \ + long new_cfa_; \ + int i_; \ + \ + /* mov.w 1f,r3; trapa #0x10; 1: .short 0x77 (sigreturn) */ \ + /* mov.w 1f,r3; trapa #0x10; 1: .short 0xad (rt_sigreturn) */ \ + if ((*(unsigned short *) (pc_+0) == 0x9300) \ + && (*(unsigned short *) (pc_+2) == 0xc310) \ + && (*(unsigned short *) (pc_+4) == 0x0077)) \ + sc_ = (CONTEXT)->cfa; \ + else if ((*(unsigned short *) (pc_+0) == 0x9300) \ + && (*(unsigned short *) (pc_+2) == 0xc310) \ + && (*(unsigned short *) (pc_+4) == 0x00ad)) \ + { \ + struct rt_sigframe { \ + struct siginfo info; \ + struct ucontext uc; \ + } *rt_ = (CONTEXT)->cfa; \ + sc_ = (struct sigcontext *) &rt_->uc.uc_mcontext; \ + } \ + else \ + break; \ + \ + new_cfa_ = sc_->sc_regs[15]; \ + (FS)->cfa_how = CFA_REG_OFFSET; \ + (FS)->cfa_reg = 15; \ + (FS)->cfa_offset = new_cfa_ - (long) (CONTEXT)->cfa; \ + \ + for (i_ = 0; i_ < 15; i_++) \ + { \ + (FS)->regs.reg[i_].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[i_].loc.offset \ + = (long)&(sc_->sc_regs[i_]) - new_cfa_; \ + } \ + \ + (FS)->regs.reg[SH_DWARF_FRAME_PR].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_PR].loc.offset \ + = (long)&(sc_->sc_pr) - new_cfa_; \ + (FS)->regs.reg[SH_DWARF_FRAME_SR].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_SR].loc.offset \ + = (long)&(sc_->sc_sr) - new_cfa_; \ + (FS)->regs.reg[SH_DWARF_FRAME_GBR].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_GBR].loc.offset \ + = (long)&(sc_->sc_gbr) - new_cfa_; \ + (FS)->regs.reg[SH_DWARF_FRAME_MACH].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_MACH].loc.offset \ + = (long)&(sc_->sc_mach) - new_cfa_; \ + (FS)->regs.reg[SH_DWARF_FRAME_MACL].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_MACL].loc.offset \ + = (long)&(sc_->sc_macl) - new_cfa_; \ + \ + SH_FALLBACK_FRAME_FLOAT_STATE(sc_, (FS), new_cfa_); \ + \ + /* The unwinder expects the PC to point to the following insn, \ + whereas the kernel returns the address of the actual \ + faulting insn. */ \ + sc_->sc_pc += 2; \ + (FS)->regs.reg[SH_DWARF_FRAME_PC].how = REG_SAVED_OFFSET; \ + (FS)->regs.reg[SH_DWARF_FRAME_PC].loc.offset \ + = (long)&(sc_->sc_pc) - new_cfa_; \ + (FS)->retaddr_column = SH_DWARF_FRAME_PC; \ + goto SUCCESS; \ + } while (0) + +#endif /* defined (__SH5__) && __SH5__ != 32 */ +#endif /* IN_LIBGCC2 */ diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h index 4135b334af1..fd98b421c0e 100644 --- a/gcc/config/sh/sh-protos.h +++ b/gcc/config/sh/sh-protos.h @@ -120,6 +120,7 @@ extern int sh_media_register_for_return PARAMS ((void)); extern void sh_expand_prologue PARAMS ((void)); extern void sh_expand_epilogue PARAMS ((void)); extern int sh_need_epilogue PARAMS ((void)); +extern void sh_set_return_address PARAMS ((rtx, rtx)); extern int initial_elimination_offset PARAMS ((int, int)); extern int fldi_ok PARAMS ((void)); extern int sh_pr_n_sets PARAMS ((void)); diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 75c9d263bfa..261f3247af5 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -23,6 +23,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "insn-config.h" #include "rtl.h" #include "tree.h" @@ -200,6 +202,7 @@ static void sh_insert_attributes PARAMS ((tree, tree *)); static int sh_adjust_cost PARAMS ((rtx, rtx, rtx, int)); static int sh_use_dfa_interface PARAMS ((void)); static int sh_issue_rate PARAMS ((void)); +static bool sh_function_ok_for_sibcall PARAMS ((tree, tree)); static bool sh_cannot_modify_jumps_p PARAMS ((void)); static bool sh_ms_bitfield_layout_p PARAMS ((tree)); @@ -260,6 +263,9 @@ static void flow_dependent_p_1 PARAMS ((rtx, rtx, void *)); #undef TARGET_EXPAND_BUILTIN #define TARGET_EXPAND_BUILTIN sh_expand_builtin +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL sh_function_ok_for_sibcall + struct gcc_target targetm = TARGET_INITIALIZER; /* Print the operand address in x to the stream. */ @@ -1013,12 +1019,12 @@ output_far_jump (insn, op) if (far && flag_pic && TARGET_SH2) { braf_base_lab = gen_label_rtx (); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (braf_base_lab)); } if (far) output_asm_insn (".align 2", 0); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (this.lab)); + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (this.lab)); this.op = op; if (far && flag_pic) { @@ -1077,7 +1083,7 @@ output_branch (logic, insn, operands) output_asm_insn ("bra\t%l0", &op0); fprintf (asm_out_file, "\tnop\n"); - ASM_OUTPUT_INTERNAL_LABEL(asm_out_file, "LF", label); + (*targetm.asm_out.internal_label)(asm_out_file, "LF", label); return ""; } @@ -4166,7 +4172,7 @@ final_prescan_insn (insn, opvec, noperands) asm_fprintf (asm_out_file, "\t.uses %LL%d\n", CODE_LABEL_NUMBER (XEXP (note, 0))); else if (GET_CODE (pattern) == SET) - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (XEXP (note, 0))); else abort (); @@ -4189,7 +4195,7 @@ output_jump_label_table () { pool_node *p = &pool_vector[i]; - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (p->label)); output_asm_insn (".long %O0", &p->value); } @@ -4444,7 +4450,12 @@ calc_live_regs (count_ptr, live_regs_mask) && flag_pic && current_function_args_info.call_cookie && reg == PIC_OFFSET_TABLE_REGNUM) - || (regs_ever_live[reg] && ! call_used_regs[reg]))) + || (regs_ever_live[reg] && ! call_used_regs[reg]) + || (current_function_calls_eh_return + && (reg == EH_RETURN_DATA_REGNO (0) + || reg == EH_RETURN_DATA_REGNO (1) + || reg == EH_RETURN_DATA_REGNO (2) + || reg == EH_RETURN_DATA_REGNO (3))))) { live_regs_mask[reg / 32] |= 1 << (reg % 32); count += GET_MODE_SIZE (REGISTER_NATURAL_MODE (reg)); @@ -4629,6 +4640,9 @@ sh_expand_prologue () higher addresses, that are known to be aligned. Then, we proceed to saving 32-bit registers that don't need 8-byte alignment. */ + /* Note that if you change this code in a way that affects where + the return register is saved, you have to update not only + sh_expand_epilogue, but also sh_set_return_address. */ for (align = 1; align >= 0; align--) for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--) if (live_regs_mask[i/32] & (1 << (i % 32))) @@ -5040,6 +5054,10 @@ sh_expand_epilogue () + current_function_args_info.stack_regs * 8, stack_pointer_rtx, 7, emit_insn); + if (current_function_calls_eh_return) + emit_insn (GEN_ADD3 (stack_pointer_rtx, stack_pointer_rtx, + EH_RETURN_STACKADJ_RTX)); + /* Switch back to the normal stack if necessary. */ if (sp_switch) emit_insn (gen_sp_switch_2 ()); @@ -5070,6 +5088,105 @@ sh_need_epilogue () return sh_need_epilogue_known > 0; } +/* Emit code to change the current function's return address to RA. + TEMP is available as a scratch register, if needed. */ + +void +sh_set_return_address (ra, tmp) + rtx ra, tmp; +{ + HOST_WIDE_INT live_regs_mask[(FIRST_PSEUDO_REGISTER + 31) / 32]; + int d; + int d_rounding = 0; + int pr_reg = TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG; + int pr_offset; + + calc_live_regs (&d, live_regs_mask); + + /* If pr_reg isn't life, we can set it (or the register given in + sh_media_register_for_return) directly. */ + if ((live_regs_mask[pr_reg / 32] & (1 << (pr_reg % 32))) == 0) + { + rtx rr; + + if (TARGET_SHMEDIA) + { + int rr_regno = sh_media_register_for_return (); + + if (rr_regno < 0) + rr_regno = pr_reg; + + rr = gen_rtx_REG (DImode, rr_regno); + } + else + rr = gen_rtx_REG (SImode, pr_reg); + + emit_insn (GEN_MOV (rr, ra)); + /* Tell flow the register for return isn't dead. */ + emit_insn (gen_rtx_USE (VOIDmode, rr)); + return; + } + + if (TARGET_SH5) + { + int i; + int offset; + int align; + + if (d % (STACK_BOUNDARY / BITS_PER_UNIT)) + d_rounding = ((STACK_BOUNDARY / BITS_PER_UNIT) + - d % (STACK_BOUNDARY / BITS_PER_UNIT)); + + offset = 0; + + /* We loop twice: first, we save 8-byte aligned registers in the + higher addresses, that are known to be aligned. Then, we + proceed to saving 32-bit registers that don't need 8-byte + alignment. */ + for (align = 0; align <= 1; align++) + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) + if (live_regs_mask[i/32] & (1 << (i % 32))) + { + enum machine_mode mode = REGISTER_NATURAL_MODE (i); + + if (mode == SFmode && (i % 2) == 0 + && ! TARGET_FPU_SINGLE && FP_REGISTER_P (i) + && (live_regs_mask[(i ^ 1) / 32] & (1 << ((i ^ 1) % 32)))) + { + mode = DFmode; + i++; + } + + /* If we're doing the aligned pass and this is not aligned, + or we're doing the unaligned pass and this is aligned, + skip it. */ + if ((GET_MODE_SIZE (mode) % (STACK_BOUNDARY / BITS_PER_UNIT) + == 0) != align) + continue; + + if (i == pr_reg) + goto found; + + offset += GET_MODE_SIZE (mode); + } + + /* We can't find pr register. */ + abort (); + + found: + pr_offset = (rounded_frame_size (d) - d_rounding + offset + + SHMEDIA_REGS_STACK_ADJUST ()); + } + else + pr_offset = rounded_frame_size (d) - d_rounding; + + emit_insn (GEN_MOV (tmp, GEN_INT (pr_offset))); + emit_insn (GEN_ADD3 (tmp, tmp, frame_pointer_rtx)); + + tmp = gen_rtx_MEM (Pmode, tmp); + emit_insn (GEN_MOV (tmp, ra)); +} + /* Clear variables at function end. */ static void @@ -7405,6 +7522,19 @@ sh_initialize_trampoline (tramp, fnaddr, cxt) } } +/* FIXME: This is overly conservative. A SHcompact function that + receives arguments ``by reference'' will have them stored in its + own stack frame, so it must not pass pointers or references to + these arguments to other functions by means of sibling calls. */ +static bool +sh_function_ok_for_sibcall (decl, exp) + tree decl; + tree exp ATTRIBUTE_UNUSED; +{ + return (decl + && (! TARGET_SHCOMPACT + || current_function_args_info.stack_regs == 0)); +} /* Machine specific built-in functions. */ diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 6e3b91a76e4..4d27e64bcb0 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -28,7 +28,7 @@ Boston, MA 02111-1307, USA. */ fputs (" (Hitachi SH)", stderr); /* Unfortunately, insn-attrtab.c doesn't include insn-codes.h. We can't - include it here, because hconfig.h is also included by gencodes.c . */ + include it here, because bconfig.h is also included by gencodes.c . */ /* ??? No longer true. */ extern int code_for_indirect_jump_scratch; @@ -1705,13 +1705,6 @@ struct sh_args { (CUM).outgoing = 0; \ } while (0) -/* FIXME: This is overly conservative. A SHcompact function that - receives arguments ``by reference'' will have them stored in its - own stack frame, so it must not pass pointers or references to - these arguments to other functions by means of sibling calls. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) \ - (! TARGET_SHCOMPACT || current_function_args_info.stack_regs == 0) - /* Update the data in CUM to advance over an argument of mode MODE and data type TYPE. (TYPE is null for libcalls where that information may not be @@ -2135,8 +2128,6 @@ while (0) /* Addressing modes, and classification of registers for them. */ #define HAVE_POST_INCREMENT TARGET_SH1 -/*#define HAVE_PRE_INCREMENT 1*/ -/*#define HAVE_POST_DECREMENT 1*/ #define HAVE_PRE_DECREMENT TARGET_SH1 #define USE_LOAD_POST_INCREMENT(mode) ((mode == SImode || mode == DImode) \ @@ -2941,6 +2932,8 @@ while (0) to match gdb. */ /* svr4.h undefines this macro, yet we really want to use the same numbers for coff as for elf, so we go via another macro: SH_DBX_REGISTER_NUMBER. */ +/* expand_builtin_init_dwarf_reg_sizes uses this to test if a + register exists, so we should return -1 for invalid register numbers. */ #define DBX_REGISTER_NUMBER(REGNO) SH_DBX_REGISTER_NUMBER (REGNO) #define SH_DBX_REGISTER_NUMBER(REGNO) \ @@ -2967,13 +2960,13 @@ while (0) ? (TARGET_SH5 ? 240 : 21) \ : (REGNO) == FPUL_REG \ ? (TARGET_SH5 ? 244 : 23) \ - : (abort(), -1)) + : -1) /* This is how to output a reference to a user-level label named NAME. */ #define ASM_OUTPUT_LABELREF(FILE, NAME) \ do \ { \ - char * lname; \ + const char * lname; \ \ STRIP_DATALABEL_ENCODING (lname, (NAME)); \ if (lname[0] == '*') \ @@ -3009,11 +3002,6 @@ while (0) /* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE) */ -/* Construct a private name. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \ - ((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \ - sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER))) - /* Output a relative address table. */ #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,BODY,VALUE,REL) \ @@ -3315,6 +3303,11 @@ extern int rtx_equal_function_value_matters; #define DWARF_FRAME_RETURN_COLUMN \ (TARGET_SH5 ? DWARF_FRAME_REGNUM (PR_MEDIA_REG) : DWARF_FRAME_REGNUM (PR_REG)) +#define EH_RETURN_DATA_REGNO(N) \ + ((N) < 4 ? (N) + (TARGET_SH5 ? 2 : 4) : INVALID_REGNUM) + +#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM) + #if (defined CRT_BEGIN || defined CRT_END) && ! __SHMEDIA__ /* SH constant pool breaks the devices in crtstuff.c to control section in where code resides. We have to write it as asm code. */ diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index e3f4ea01d35..029632f4c0a 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -135,6 +135,7 @@ (UNSPEC_FSINA 16) (UNSPEC_NSB 17) (UNSPEC_ALLOCO 18) + (UNSPEC_EH_RETURN 19) ;; These are used with unspec_volatile. (UNSPECV_BLOCKAGE 0) @@ -7145,6 +7146,48 @@ DONE; }") +(define_expand "eh_return" + [(use (match_operand 0 "register_operand" "")) + (use (match_operand 1 "register_operand" ""))] + "" +{ + rtx tmp, sa = operands[0], ra = operands[1]; + + if (TARGET_SHMEDIA64) + emit_insn (gen_eh_set_ra_di (ra)); + else + emit_insn (gen_eh_set_ra_si (ra)); + + emit_move_insn (EH_RETURN_STACKADJ_RTX, sa); + DONE; +}) + +;; Clobber the return address on the stack. We can't expand this +;; until we know where it will be put in the stack frame. + +(define_insn "eh_set_ra_si" + [(unspec [(match_operand:SI 0 "register_operand" "r")] UNSPEC_EH_RETURN) + (clobber (match_scratch:SI 1 "=&r"))] + "! TARGET_SHMEDIA64" + "#") + +(define_insn "eh_set_ra_di" + [(unspec [(match_operand:DI 0 "register_operand" "r")] UNSPEC_EH_RETURN) + (clobber (match_scratch:DI 1 "=&r"))] + "TARGET_SHMEDIA64" + "#") + +(define_split + [(unspec [(match_operand 0 "register_operand" "")] UNSPEC_EH_RETURN) + (clobber (match_scratch 1 ""))] + "reload_completed" + [(const_int 0)] + " +{ + sh_set_return_address (operands[0], operands[1]); + DONE; +}") + (define_insn "blockage" [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] "" diff --git a/gcc/config/sh/t-linux b/gcc/config/sh/t-linux index 2fc932cdc7f..195279a664a 100644 --- a/gcc/config/sh/t-linux +++ b/gcc/config/sh/t-linux @@ -8,4 +8,8 @@ MULTILIB_DIRNAMES= MULTILIB_MATCHES = MULTILIB_EXCEPTIONS= -EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o +EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o + +# Override t-slibgcc-elf-ver to export some libgcc symbols with +# the symbol versions that glibc used. +SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver $(srcdir)/config/sh/libgcc-glibc.ver diff --git a/gcc/config/sparc/freebsd.h b/gcc/config/sparc/freebsd.h index 02cc7a1dfae..bd7fcd24445 100644 --- a/gcc/config/sparc/freebsd.h +++ b/gcc/config/sparc/freebsd.h @@ -130,14 +130,6 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ #define LOCAL_LABEL_PREFIX "." /* XXX2 */ -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".L%s%d:\n", PREFIX, NUM) - -/* XXX2 */ /* This is how to output a reference to an internal numbered label where PREFIX is the class of label and NUM is the number within the class. */ diff --git a/gcc/config/sparc/gmon-sol2.c b/gcc/config/sparc/gmon-sol2.c index c5776661eea..c42badcf761 100644 --- a/gcc/config/sparc/gmon-sol2.c +++ b/gcc/config/sparc/gmon-sol2.c @@ -32,8 +32,10 @@ * for Cygnus Support, July 1992. */ -#include "config.h" -#include "system.h" +#include "tconfig.h" +#include "tsystem.h" +#include "coretypes.h" +#include "tm.h" #if 0 #include "sparc/gmon.h" diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h index ea16b7eed5d..2879c642a71 100644 --- a/gcc/config/sparc/linux.h +++ b/gcc/config/sparc/linux.h @@ -206,13 +206,6 @@ do { \ #undef LOCAL_LABEL_PREFIX #define LOCAL_LABEL_PREFIX "." -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".L%s%d:\n", PREFIX, NUM) - /* This is how to output a reference to an internal numbered label where PREFIX is the class of label and NUM is the number within the class. */ diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h index 8fd3a1ff0df..40fd23257f7 100644 --- a/gcc/config/sparc/linux64.h +++ b/gcc/config/sparc/linux64.h @@ -276,13 +276,6 @@ do { \ #undef LOCAL_LABEL_PREFIX #define LOCAL_LABEL_PREFIX "." -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".L%s%d:\n", PREFIX, NUM) - /* This is how to output a reference to an internal numbered label where PREFIX is the class of label and NUM is the number within the class. */ diff --git a/gcc/config/sparc/netbsd-elf.h b/gcc/config/sparc/netbsd-elf.h index 10788f2ae3b..7e0d70d9e79 100644 --- a/gcc/config/sparc/netbsd-elf.h +++ b/gcc/config/sparc/netbsd-elf.h @@ -69,13 +69,6 @@ Boston, MA 02111-1307, USA. */ #undef LOCAL_LABEL_PREFIX #define LOCAL_LABEL_PREFIX "." -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".L%s%d:\n", PREFIX, NUM) - /* This is how to output a reference to an internal numbered label where PREFIX is the class of label and NUM is the number within the class. */ diff --git a/gcc/config/sparc/pbd.h b/gcc/config/sparc/pbd.h index e7c01c0b48a..dd47b368828 100644 --- a/gcc/config/sparc/pbd.h +++ b/gcc/config/sparc/pbd.h @@ -116,18 +116,9 @@ Boston, MA 02111-1307, USA. */ This is suitable for output with `assemble_name'. */ #undef ASM_GENERATE_INTERNAL_LABEL - #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ sprintf (LABEL, "*.%s%ld", PREFIX, (long)(NUM)) - -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".%s%d:\n", PREFIX, NUM) - /* This is how to output an element of a case-vector that is relative. */ #undef ASM_OUTPUT_ADDR_DIFF_ELT diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h index 3026e405f61..ba0243ceee2 100644 --- a/gcc/config/sparc/sol2.h +++ b/gcc/config/sparc/sol2.h @@ -68,13 +68,6 @@ Boston, MA 02111-1307, USA. */ #undef LOCAL_LABEL_PREFIX #define LOCAL_LABEL_PREFIX "." -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".L%s%d:\n", PREFIX, NUM) - /* This is how to output a reference to an internal numbered label where PREFIX is the class of label and NUM is the number within the class. */ diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 9f608c352eb..aed7e4b79d5 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -24,6 +24,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -176,6 +178,7 @@ static void emit_soft_tfmode_cvt PARAMS ((enum rtx_code, rtx *)); static void emit_hard_tfmode_operation PARAMS ((enum rtx_code, rtx *)); static void sparc_encode_section_info PARAMS ((tree, int)); +static bool sparc_function_ok_for_sibcall PARAMS ((tree, tree)); static void sparc_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); @@ -241,6 +244,9 @@ enum processor_type sparc_cpu; #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO sparc_encode_section_info +#undef TARGET_FUNCTION_OK_FOR_SIBCALL +#define TARGET_FUNCTION_OK_FOR_SIBCALL sparc_function_ok_for_sibcall + #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK sparc_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK @@ -3294,7 +3300,7 @@ load_pic_register () align = floor_log2 (FUNCTION_BOUNDARY / BITS_PER_UNIT); if (align > 0) ASM_OUTPUT_ALIGN (asm_out_file, align); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LGETPC", 0); + (*targetm.asm_out.internal_label) (asm_out_file, "LGETPC", 0); fputs ("\tretl\n\tadd\t%o7, %l7, %l7\n", asm_out_file); } @@ -7819,7 +7825,7 @@ sparc_output_addr_vec (vec) ASM_OUTPUT_CASE_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (lab), NEXT_INSN (lab)); #else - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (lab)); + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (lab)); #endif for (idx = 0; idx < vlen; idx++) @@ -7849,7 +7855,7 @@ sparc_output_addr_diff_vec (vec) ASM_OUTPUT_CASE_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (lab), NEXT_INSN (lab)); #else - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", CODE_LABEL_NUMBER (lab)); + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (lab)); #endif for (idx = 0; idx < vlen; idx++) @@ -8028,6 +8034,32 @@ sparc_elf_asm_named_section (name, flags) } #endif /* OBJECT_FORMAT_ELF */ +/* We do not allow sibling calls if -mflat, nor + we do not allow indirect calls to be optimized into sibling calls. + + Also, on sparc 32-bit we cannot emit a sibling call when the + current function returns a structure. This is because the "unimp + after call" convention would cause the callee to return to the + wrong place. The generic code already disallows cases where the + function being called returns a structure. + + It may seem strange how this last case could occur. Usually there + is code after the call which jumps to epilogue code which dumps the + return value into the struct return area. That ought to invalidate + the sibling call right? Well, in the c++ case we can end up passing + the pointer to the struct return area to a constructor (which returns + void) and then nothing else happens. Such a sibling call would look + valid without the added check here. */ +static bool +sparc_function_ok_for_sibcall (decl, exp) + tree decl; + tree exp ATTRIBUTE_UNUSED; +{ + return (decl + && ! TARGET_FLAT + && (TARGET_ARCH64 || ! current_function_returns_struct)); +} + /* ??? Similar to the standard section selection, but force reloc-y-ness if SUNOS4_SHARED_LIBRARIES. Unclear why this helps (as opposed to pretending PIC always on), but that's what the old code did. */ diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 4dcff9105f0..ab000da6a6e 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -323,9 +323,11 @@ extern enum cmodel sparc_cmodel; /* Special flags to the Sun-4 assembler when using pipe for input. */ #define ASM_SPEC "\ -%| %{R} %{!pg:%{!p:%{fpic:-k} %{fPIC:-k}}} %{keep-local-as-symbols:-L} \ +%{R} %{!pg:%{!p:%{fpic:-k} %{fPIC:-k}}} %{keep-local-as-symbols:-L} \ %(asm_cpu) %(asm_relax)" +#define AS_NEEDS_DASH_FOR_PIPED_INPUT + /* This macro defines names of additional specifications to put in the specs that can be used in various specifications like CC1_SPEC. Its definition is an initializer with a subgrouping for each command option. @@ -1932,27 +1934,6 @@ do { \ #define STRICT_ARGUMENT_NAMING TARGET_V9 -/* We do not allow sibling calls if -mflat, nor - we do not allow indirect calls to be optimized into sibling calls. - - Also, on sparc 32-bit we cannot emit a sibling call when the - current function returns a structure. This is because the "unimp - after call" convention would cause the callee to return to the - wrong place. The generic code already disallows cases where the - function being called returns a structure. - - It may seem strange how this last case could occur. Usually there - is code after the call which jumps to epilogue code which dumps the - return value into the struct return area. That ought to invalidate - the sibling call right? Well, in the c++ case we can end up passing - the pointer to the struct return area to a constructor (which returns - void) and then nothing else happens. Such a sibling call would look - valid without the added check here. */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) \ - (DECL \ - && ! TARGET_FLAT \ - && (TARGET_ARCH64 || ! current_function_returns_struct)) - /* Generate RTL to flush the register windows so as to make arbitrary frames available. */ #define SETUP_FRAME_ADDRESSES() \ @@ -2047,12 +2028,6 @@ do { \ /* Addressing modes, and classification of registers for them. */ -/* #define HAVE_POST_INCREMENT 0 */ -/* #define HAVE_POST_DECREMENT 0 */ - -/* #define HAVE_PRE_DECREMENT 0 */ -/* #define HAVE_PRE_INCREMENT 0 */ - /* Macros to check register numbers against specific register classes. */ /* These assume that REGNO is a hard or pseudo reg number. @@ -2736,12 +2711,6 @@ case LABEL_REF: case SYMBOL_REF: case CONST_DOUBLE: #define USER_LABEL_PREFIX "_" -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -2852,14 +2821,6 @@ do { \ ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN); \ } while (0) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) - #define IDENT_ASM_OP "\t.ident\t" /* Output #ident as a .ident. */ diff --git a/gcc/config/sparc/sysv4.h b/gcc/config/sparc/sysv4.h index f304d6b5497..0543b46d531 100644 --- a/gcc/config/sparc/sysv4.h +++ b/gcc/config/sparc/sysv4.h @@ -93,7 +93,7 @@ Boston, MA 02111-1307, USA. */ #undef ASM_OUTPUT_CASE_LABEL #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \ do { ASM_OUTPUT_ALIGN ((FILE), Pmode == SImode ? 2 : 3); \ - ASM_OUTPUT_INTERNAL_LABEL ((FILE), PREFIX, NUM); \ + (*targetm.asm_out.internal_label) ((FILE), PREFIX, NUM); \ } while (0) /* This is how to equate one symbol to another symbol. The syntax used is diff --git a/gcc/config/sparc/t-sol2 b/gcc/config/sparc/t-sol2 index 4a5a13b8618..f32765ff7f7 100644 --- a/gcc/config/sparc/t-sol2 +++ b/gcc/config/sparc/t-sol2 @@ -1,5 +1,6 @@ # gmon build rule: -$(T)gmon.o: $(srcdir)/config/sparc/gmon-sol2.c $(GCC_PASSES) $(CONFIG_H) stmp-int-hdrs +$(T)gmon.o: $(srcdir)/config/sparc/gmon-sol2.c $(GCC_PASSES) \ + $(TCONFIG_H) tsystem.h coretypes.h $(TM_H) stmp-int-hdrs $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) \ -c $(srcdir)/config/sparc/gmon-sol2.c -o $(T)gmon.o diff --git a/gcc/config/sparc/t-vxsparc b/gcc/config/sparc/t-vxsparc deleted file mode 100644 index 5a47341ac40..00000000000 --- a/gcc/config/sparc/t-vxsparc +++ /dev/null @@ -1,10 +0,0 @@ -# We don't want to put exit in libgcc.a for VxWorks, because VxWorks -# does not have _exit. -TARGET_LIBGCC2_CFLAGS = -Dexit=unused_exit - -MULTILIB_OPTIONS=msoft-float mv8 -MULTILIB_DIRNAMES=soft v8 -MULTILIB_MATCHES=msoft-float=mno-fpu - -LIBGCC = stmp-multilib -INSTALL_LIBGCC = install-multilib diff --git a/gcc/config/sparc/t-vxsparc64 b/gcc/config/sparc/t-vxsparc64 deleted file mode 100644 index ee779eec91b..00000000000 --- a/gcc/config/sparc/t-vxsparc64 +++ /dev/null @@ -1,23 +0,0 @@ -# We don't want to put exit in libgcc.a for VxWorks, because VxWorks -# does not have _exit. -TARGET_LIBGCC2_CFLAGS = -Dexit=unused_exit - -LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c - -dp-bit.c: $(srcdir)/config/fp-bit.c - echo '#define US_SOFTWARE_GOFAST' > dp-bit.c - cat $(srcdir)/config/fp-bit.c >> dp-bit.c - -fp-bit.c: $(srcdir)/config/fp-bit.c - echo '#define FLOAT' > fp-bit.c - echo '#define US_SOFTWARE_GOFAST' >> fp-bit.c - cat $(srcdir)/config/fp-bit.c >> fp-bit.c - -MULTILIB_OPTIONS=O0 -MULTILIB_DIRNAMES=O0 -MULTILIB_MATCHES= -MULTILIB_EXCEPTIONS= -MULTILIB_EXTRA_OPTS=m64 mcpu=ultrasparc - -LIBGCC = stmp-multilib -INSTALL_LIBGCC = install-multilib diff --git a/gcc/config/sparc/vxsim.h b/gcc/config/sparc/vxsim.h deleted file mode 100644 index c9c35699118..00000000000 --- a/gcc/config/sparc/vxsim.h +++ /dev/null @@ -1,136 +0,0 @@ -/* Definitions of target machine for GNU compiler, for SPARC VxSim - Copyright 1996 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#undef TARGET_VERSION -#define TARGET_VERSION fprintf (stderr, " (sparc VxSim)"); - -/* Supposedly the same as vanilla sparc svr4, except for the stuff below: */ - -#undef CPP_PREDEFINES -#define CPP_PREDEFINES \ - "-DCPU=SIMSPARCSOLARIS -D__vxworks -D__vxworks__ -Dsparc -D__svr4__ -D__SVR4 \ - -Asystem=embedded -Asystem=svr4 -Acpu=sparc -Amachine=sparc\ - -D__GCC_NEW_VARARGS__" - -#undef CPP_SPEC -#define CPP_SPEC "" - -#undef CC1_SPEC -#define CC1_SPEC "-fno-builtin %{sun4:} %{target:}" - -/* The sun bundled assembler doesn't accept -Yd, (and neither does gas). - It's safe to pass -s always, even if -g is not used. */ -#undef ASM_SPEC -#define ASM_SPEC \ - "%{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Wa,*:%*} -s \ - %{fpic:-K PIC} %{fPIC:-K PIC}" - -/* However it appears that Solaris 2.0 uses the same reg numbering as - the old BSD-style system did. */ - -#undef DBX_REGISTER_NUMBER -/* Same as sparc.h */ -#define DBX_REGISTER_NUMBER(REGNO) (REGNO) - -/* We use stabs-in-elf for debugging, because that is what the native - toolchain uses. */ -#undef PREFERRED_DEBUGGING_TYPE -#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG - -/* The Solaris 2 assembler uses .skip, not .zero, so put this back. */ -#undef ASM_OUTPUT_SKIP -#define ASM_OUTPUT_SKIP(FILE,SIZE) \ - fprintf (FILE, "\t.skip %u\n", (SIZE)) - -#undef ASM_OUTPUT_ALIGNED_LOCAL -#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ -do { \ - fputs ("\t.local\t", (FILE)); \ - assemble_name ((FILE), (NAME)); \ - putc ('\n', (FILE)); \ - ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \ -} while (0) - -#undef COMMON_ASM_OP -#define COMMON_ASM_OP "\t.common\t" - -#undef LOCAL_LABEL_PREFIX -#define LOCAL_LABEL_PREFIX "." - -/* This is how to output a definition of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, ".L%s%d:\n", PREFIX, NUM) - -/* This is how to output a reference to an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#undef ASM_OUTPUT_INTERNAL_LABELREF -#define ASM_OUTPUT_INTERNAL_LABELREF(FILE,PREFIX,NUM) \ - fprintf (FILE, ".L%s%d", PREFIX, NUM) - -/* This is how to store into the string LABEL - the symbol_ref name of an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. - This is suitable for output with `assemble_name'. */ - -#undef ASM_GENERATE_INTERNAL_LABEL -#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ - sprintf (LABEL, "*.L%s%ld", PREFIX, (long)(NUM)) - - - -#undef LIB_SPEC -#define LIB_SPEC "" - -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "" - -#undef ENDFILE_SPEC -#define ENDFILE_SPEC "" - -#undef LINK_SPEC -#define LINK_SPEC "-r" - -/* This defines which switch letters take arguments. - It is as in svr4.h but with -R added. */ - -#undef SWITCH_TAKES_ARG -#define SWITCH_TAKES_ARG(CHAR) \ - ( (CHAR) == 'D' \ - || (CHAR) == 'U' \ - || (CHAR) == 'o' \ - || (CHAR) == 'e' \ - || (CHAR) == 'u' \ - || (CHAR) == 'I' \ - || (CHAR) == 'm' \ - || (CHAR) == 'L' \ - || (CHAR) == 'R' \ - || (CHAR) == 'A' \ - || (CHAR) == 'h' \ - || (CHAR) == 'z') - -/* ??? This does not work in SunOS 4.x, so it is not enabled in sparc.h. - Instead, it is enabled here, because it does work under Solaris. */ -/* Define for support of TFmode long double. - SPARC ABI says that long double is 4 words. */ -#define LONG_DOUBLE_TYPE_SIZE 64 diff --git a/gcc/config/sparc/vxsparc.h b/gcc/config/sparc/vxsparc.h deleted file mode 100644 index da3e59105d8..00000000000 --- a/gcc/config/sparc/vxsparc.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Definitions of target machine for GNU compiler. Vxworks SPARC version. - Copyright (C) 1994, 1996 Free Software Foundation, Inc. - Contributed by David Henkel-Wallace (gumby@cygnus.com) - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - - -/* Specify what to link with. */ -/* VxWorks does all the library stuff itself. */ - -#undef LIB_SPEC -#define LIB_SPEC "" - -/* Provide required defaults for linker -e. */ -#undef LINK_SPEC -#define LINK_SPEC "%{!nostdlib:%{!r*:%{!e*:-e start}}}" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "" - -#undef CPP_PREDEFINES -#define CPP_PREDEFINES "-Dsparc -Acpu=sparc -Amachine=sparc" - -/* Note that we define CPU here even if the user has specified -ansi. - This violates user namespace, but the VxWorks headers, and potentially - user code, all explicitly rely upon the definition of CPU in order to get - the proper processor information. */ -#undef CPP_SPEC -#define CPP_SPEC "%(cpp_cpu) -DCPU=SPARC" - -#undef PTRDIFF_TYPE -#undef SIZE_TYPE -#undef WCHAR_TYPE -#undef WCHAR_TYPE_SIZE - -#define PTRDIFF_TYPE "long int" -#define SIZE_TYPE "unsigned int" -#define WCHAR_TYPE "char" -#define WCHAR_TYPE_SIZE 8 - -/* US Software GOFAST library support. */ -#undef INIT_SUBTARGET_OPTABS -#define INIT_SUBTARGET_OPTABS INIT_GOFAST_OPTABS diff --git a/gcc/config/sparc/vxsparc64.h b/gcc/config/sparc/vxsparc64.h deleted file mode 100644 index 1da8b7f2566..00000000000 --- a/gcc/config/sparc/vxsparc64.h +++ /dev/null @@ -1,92 +0,0 @@ -/* Definitions of target machine for GNU compiler. - 64-bit VxWorks SPARC version. - Copyright (C) 2001 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - - -/* Specify what to link with. */ -/* VxWorks does all the library stuff itself. */ -#undef LIB_SPEC -#define LIB_SPEC "-r" - -/* VxWorks provides the functionality of crt0.o and friends itself. */ -#undef STARTFILE_SPEC -#undef ENDFILE_SPEC -#define STARTFILE_SPEC "" -#define ENDFILE_SPEC "" - -#undef LINK_SPEC -#define LINK_SPEC "" - -/* We need to prohibit dots in constructor labels so that we can build a - table of { string, address } entries for each non-static name in a - program. The address, being of the form &name, it cannot contain a dot or - C will try to parse it as a &struct.field phrase. */ -#undef NO_DOLLAR_IN_LABEL -#undef DOLLARS_IN_IDENTIFIERS -#define DOLLARS_IN_IDENTIFIERS 1 -#define NO_DOT_IN_LABEL - -/* Enable #pragma pack(n) */ -#define HANDLE_SYSV_PRAGMA 1 - -/* We use stabs for debugging */ -#undef PREFERRED_DEBUGGING_TYPE -#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG - -/* Longs are still only 32bits for vxWorks, even for UltraSPARC */ -#undef LONG_TYPE_SIZE -#define LONG_TYPE_SIZE 32 - -#undef CPP_ARCH32_SPEC -#define CPP_ARCH32_SPEC "-Acpu(sparc) -Amachine(sparc)" -#undef CPP_ARCH64_SPEC -#define CPP_ARCH64_SPEC \ -"-Dsparc64 -D__arch64__ -Acpu(sparc64) -Amachine(sparc64)" - -#undef CPP_PREDEFINES -#define CPP_PREDEFINES "-D__vxworks -D__sparc__ -Dsparc -D__GCC_NEW_VARARGS__" - -/* Note that we define CPU here even if the user has specified -ansi. - This violates user namespace, but the VxWorks headers, and potentially - user code, all explicitly rely upon the definition of CPU in order to get - the proper processor information. */ -#undef CPP_SPEC -#define CPP_SPEC "%(cpp_cpu) %(cpp_arch) -DCPU=ULTRASPARC -D__CPU__=CPU" - -#undef TARGET_DEFAULT -#define TARGET_DEFAULT (MASK_APP_REGS | MASK_FPU \ - | MASK_LONG_DOUBLE_128 | MASK_64BIT) - -#undef SPARC_DEFAULT_CMODEL -#define SPARC_DEFAULT_CMODEL CM_MEDLOW - -#undef PTRDIFF_TYPE -#undef SIZE_TYPE -#undef WCHAR_TYPE -#undef WCHAR_TYPE_SIZE - -#define PTRDIFF_TYPE "long int" -#define SIZE_TYPE "unsigned int" -#define WCHAR_TYPE "char" -#define WCHAR_TYPE_SIZE 8 - -/* US Software GOFAST library support. */ -#undef INIT_SUBTARGET_OPTABS -#define INIT_SUBTARGET_OPTABS INIT_GOFAST_OPTABS diff --git a/gcc/config/stormy16/stormy16.c b/gcc/config/stormy16/stormy16.c index 417a8dc03ab..4d98ea7bf85 100644 --- a/gcc/config/stormy16/stormy16.c +++ b/gcc/config/stormy16/stormy16.c @@ -22,6 +22,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" diff --git a/gcc/config/stormy16/stormy16.h b/gcc/config/stormy16/stormy16.h index 87163dd415c..30f34a4748c 100644 --- a/gcc/config/stormy16/stormy16.h +++ b/gcc/config/stormy16/stormy16.h @@ -1986,8 +1986,6 @@ enum reg_class #define HAVE_POST_INCREMENT 1 /* Similar for other kinds of addressing. */ -/* #define HAVE_PRE_INCREMENT 1 */ -/* #define HAVE_POST_DECREMENT 1 */ #define HAVE_PRE_DECREMENT 1 /* A C expression that is 1 if the RTX X is a constant which is a valid @@ -2608,7 +2606,7 @@ do { \ outputting the label definition at the proper place. Here is how to do this: - ASM_OUTPUT_INTERNAL_LABEL (FILE, "LC", LABELNO); + (*targetm.asm_out.internal_label) (FILE, "LC", LABELNO); When you output a pool entry specially, you should end with a `goto' to the label JUMPTO. This will prevent the same pool entry from being output a @@ -2881,31 +2879,11 @@ do { \ is in most Berkeley Unix systems. This macro is used in `assemble_name'. */ /* #define ASM_OUTPUT_LABELREF(STREAM, NAME) */ -/* A C statement to output to the stdio stream STREAM a label whose name is - made from the string PREFIX and the number NUM. - - It is absolutely essential that these labels be distinct from the labels - used for user-level functions and variables. Otherwise, certain programs - will have name conflicts with internal labels. - - It is desirable to exclude internal labels from the symbol table of the - object file. Most assemblers have a naming convention for labels that - should be excluded; on many systems, the letter `L' at the beginning of a - label has this effect. You should find out what convention your system - uses, and follow it. - - The usual definition of this macro is as follows: - - fprintf (STREAM, "L%s%d:\n", PREFIX, NUM) - - Defined in svr4.h. */ -/* #define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) */ - /* A C statement to store into the string STRING a label whose name is made from the string PREFIX and the number NUM. This string, when output subsequently by `assemble_name', should produce the - output that `ASM_OUTPUT_INTERNAL_LABEL' would produce with the same PREFIX + output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX and NUM. If the string begins with `*', then `assemble_name' will output the rest of @@ -2918,27 +2896,6 @@ do { \ Defined in svr4.h. */ /* #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) */ -/* A C expression to assign to OUTVAR (which is a variable of type `char *') a - newly allocated string made from the string NAME and the number NUMBER, with - some suitable punctuation added. Use `alloca' to get space for the string. - - The string will be used as an argument to `ASM_OUTPUT_LABELREF' to produce - an assembler label for an internal static variable whose name is NAME. - Therefore, the string must be such as to result in valid assembler code. - The argument NUMBER is different each time this macro is executed; it - prevents conflicts between similarly-named internal static variables in - different scopes. - - Ideally this string should not be a valid C identifier, to prevent any - conflict with the user's own symbols. Most assemblers allow periods or - percent signs in assembler symbols; putting at least one of these between - the name and the number will suffice. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \ -do { \ - (OUTVAR) = (char *) alloca (strlen ((NAME)) + 12); \ - sprintf ((OUTVAR), "%s.%ld", (NAME), (long)(NUMBER)); \ -} while (0) - /* A C statement to output to the stdio stream STREAM assembler code which defines (equates) the symbol NAME to have the value VALUE. diff --git a/gcc/config/svr3.h b/gcc/config/svr3.h index e559c5c59d3..8e1e9063e95 100644 --- a/gcc/config/svr3.h +++ b/gcc/config/svr3.h @@ -158,16 +158,6 @@ Boston, MA 02111-1307, USA. #undef USER_LABEL_PREFIX #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. - - For most svr3 systems, the convention is that any symbol which begins - with a period is not put into the linker symbol table by the assembler. */ - -#undef ASM_OUTPUT_INTERNAL_LABEL -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - asm_fprintf (FILE, "%0L%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. diff --git a/gcc/config/svr4.h b/gcc/config/svr4.h index bc6a3b8ed5d..029ad2ccace 100644 --- a/gcc/config/svr4.h +++ b/gcc/config/svr4.h @@ -79,22 +79,16 @@ Boston, MA 02111-1307, USA. Note that gcc doesn't allow a space to follow -Y in a -Ym,* or -Yd,* option. + + The svr4 assembler wants '-' on the command line if it's expected to + read its stdin. */ #undef ASM_SPEC #define ASM_SPEC \ "%{v:-V} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}" -/* svr4 assemblers need the `-' (indicating input from stdin) to come after - the -o option (and its argument) for some reason. If we try to put it - before the -o option, the assembler will try to read the file named as - the output file in the -o option as an input file (after it has already - written some stuff to it) and the binary stuff contained therein will - cause totally confuse the assembler, resulting in many spurious error - messages. */ - -#undef ASM_FINAL_SPEC -#define ASM_FINAL_SPEC "%|" +#define AS_NEEDS_DASH_FOR_PIPED_INPUT /* Under svr4, the normal location of the `ld' and `as' programs is the /usr/ccs/bin directory. */ diff --git a/gcc/config/t-darwin b/gcc/config/t-darwin index aca59ba4f30..e8682e17db8 100644 --- a/gcc/config/t-darwin +++ b/gcc/config/t-darwin @@ -1,12 +1,12 @@ -darwin.o: $(srcdir)/config/darwin.c $(CONFIG_H) $(SYSTEM_H) $(RTL_BASE_H) \ - $(REGS_H) hard-reg-set.h insn-config.h conditions.h output.h \ - insn-attr.h flags.h $(TREE_H) $(EXPR_H) reload.h \ - function.h $(GGC_H) $(TM_P_H) gt-darwin.h - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< +darwin.o: $(srcdir)/config/darwin.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h $(REAL_H) insn-config.h \ + conditions.h insn-flags.h output.h insn-attr.h flags.h $(TREE_H) expr.h \ + reload.h function.h $(GGC_H) langhooks.h $(TM_P_H) gt-darwin.h + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/darwin.c -darwin-c.o: $(srcdir)/config/darwin-c.c $(CONFIG_H) $(SYSTEM_H) \ - $(TREE_H) $(C_TREE_H) c-pragma.h toplev.h cpplib.h $(TM_P_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< +darwin-c.o: $(srcdir)/config/darwin-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(CPPLIB_H) tree.h c-pragma.h $(C_TREE_H) toplev.h $(TM_P_H) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/darwin-c.c gt-darwin.h : s-gtype ; @true diff --git a/gcc/config/t-libunwind b/gcc/config/t-libunwind new file mode 100644 index 00000000000..be50bc481c5 --- /dev/null +++ b/gcc/config/t-libunwind @@ -0,0 +1 @@ +LIB2ADDEH = $(srcdir)/unwind-libunwind.c $(srcdir)/unwind-sjlj.c diff --git a/gcc/config/t-vxworks b/gcc/config/t-vxworks new file mode 100644 index 00000000000..550a161152a --- /dev/null +++ b/gcc/config/t-vxworks @@ -0,0 +1,25 @@ +# Don't run fixproto. +STMP_FIXPROTO = + +# Since we have a functional assert.h, use it. +INSTALL_ASSERT_H = + +# Build libgcc using the multilib mechanism + +LIBGCC = stmp-multilib +INSTALL_LIBGCC = install-multilib + +# No special flags needed for libgcc.a +TARGET_LIBGCC2_CFLAGS = + +# Don't build libgcc.a with debug info +LIBGCC2_DEBUG_CFLAGS = + +# Extra libgcc2 module used by gthr-vxworks.h functions +LIB2FUNCS_EXTRA = $(srcdir)/config/vxlib.c + +# This ensures that the correct target headers are used; some +# VxWorks system headers have names that collide with GCC's +# internal (host) headers, e.g. regs.h. +# FIXME: May not be necessary anymore. +LIBGCC2_INCLUDES="-I$(SYSTEM_HEADER_DIR)" diff --git a/gcc/config/v850/t-v850 b/gcc/config/v850/t-v850 index bd07abead75..75c3b4695bd 100644 --- a/gcc/config/v850/t-v850 +++ b/gcc/config/v850/t-v850 @@ -87,6 +87,6 @@ INSTALL_LIBGCC = install-multilib TCFLAGS = -mno-app-regs -msmall-sld -Wa,-mwarn-signed-overflow -Wa,-mwarn-unsigned-overflow -v850-c.o: $(srcdir)/config/v850/v850-c.c $(RTL_H) $(TREE_H) $(CONFIG_H) $(TM_P_H) - $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< - +v850-c.o: $(srcdir)/config/v850/v850-c.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(CPPLIB_H) $(TREE_H) c-pragma.h toplev.h $(GGC_H) $(TM_P_H) + $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $(srcdir)/config/v850/v850-c.c diff --git a/gcc/config/v850/v850-c.c b/gcc/config/v850/v850-c.c index 8f43930fc5a..431114edfdb 100644 --- a/gcc/config/v850/v850-c.c +++ b/gcc/config/v850/v850-c.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "cpplib.h" #include "tree.h" #include "c-pragma.h" diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c index 8029ecfd021..dcbb644ae2a 100644 --- a/gcc/config/v850/v850.c +++ b/gcc/config/v850/v850.c @@ -22,6 +22,8 @@ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "tree.h" #include "rtl.h" #include "regs.h" diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h index b04b59ef690..aab4dd94d0b 100644 --- a/gcc/config/v850/v850.h +++ b/gcc/config/v850/v850.h @@ -1264,13 +1264,7 @@ zbss_section () \ #define ASM_OUTPUT_LABELREF(FILE, NAME) \ asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME)) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ - -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ -( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ - sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) +#define ASM_PN_FORMAT "%s___%lu" /* This is how we tell the assembler that two symbols have the same value. */ diff --git a/gcc/config/vax/vax-protos.h b/gcc/config/vax/vax-protos.h index 6e3a291c228..307f5eb40ef 100644 --- a/gcc/config/vax/vax-protos.h +++ b/gcc/config/vax/vax-protos.h @@ -35,8 +35,7 @@ extern int check_float_value PARAMS ((enum machine_mode, REAL_VALUE_TYPE *, int) #endif /* REAL_VALUE_TYPE */ #ifdef TREE_CODE -extern void vms_check_external PARAMS ((tree, const char *, int)); +extern void vax_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, tree)); #endif /* TREE_CODE */ -extern void vms_flush_pending_externals PARAMS ((FILE *)); extern void const_section PARAMS ((void)); diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index 7db62115683..69b175fd818 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -21,6 +21,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -41,13 +43,6 @@ Boston, MA 02111-1307, USA. */ static int follows_p PARAMS ((rtx, rtx)); static void vax_output_function_prologue PARAMS ((FILE *, HOST_WIDE_INT)); -#if VMS_TARGET -static void vms_asm_out_constructor PARAMS ((rtx, int)); -static void vms_asm_out_destructor PARAMS ((rtx, int)); -static void vms_select_section PARAMS ((tree, int, unsigned HOST_WIDE_INT)); -static void vms_encode_section_info PARAMS ((tree, int)); -static void vms_globalize_label PARAMS ((FILE *, const char *)); -#endif static void vax_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree)); @@ -58,15 +53,6 @@ static void vax_output_mi_thunk PARAMS ((FILE *, tree, HOST_WIDE_INT, #undef TARGET_ASM_FUNCTION_PROLOGUE #define TARGET_ASM_FUNCTION_PROLOGUE vax_output_function_prologue -#if VMS_TARGET -#undef TARGET_ASM_SELECT_SECTION -#define TARGET_ASM_SELECT_SECTION vms_select_section -#undef TARGET_ENCODE_SECTION_INFO -#define TARGET_ENCODE_SECTION_INFO vms_encode_section_info -#undef TARGET_ASM_GLOBALIZE_LABEL -#define TARGET_ASM_GLOBALIZE_LABEL vms_globalize_label -#endif - #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK vax_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK @@ -124,19 +110,6 @@ vax_output_function_prologue (file, size) dwarf2out_def_cfa (label, FRAME_POINTER_REGNUM, -(offset - 4)); } - if (VMS_TARGET) - { - /* Adjusting the stack pointer by 4 before calling C$MAIN_ARGS - is required when linking with the VMS POSIX version of the C - run-time library; using `subl2 $4,r0' is adequate but we use - `clrl -(sp)' instead. The extra 4 bytes could be removed - after the call because STARTING_FRAME_OFFSET's setting of -4 - will end up adding them right back again, but don't bother. */ - - if (MAIN_NAME_P (DECL_NAME (current_function_decl))) - asm_fprintf (file, "\tclrl -(%Rsp)\n\tjsb _C$MAIN_ARGS\n"); - } - size -= STARTING_FRAME_OFFSET; if (size >= 64) asm_fprintf (file, "\tmovab %d(%Rsp),%Rsp\n", -size); @@ -706,265 +679,6 @@ vax_rtx_cost (x) return c; } -#if VMS_TARGET -/* Additional support code for VMS target. */ - -/* Linked list of all externals that are to be emitted when optimizing - for the global pointer if they haven't been declared by the end of - the program with an appropriate .comm or initialization. */ - -static -struct extern_list { - struct extern_list *next; /* next external */ - const char *name; /* name of the external */ - int size; /* external's actual size */ - int in_const; /* section type flag */ -} *extern_head = 0, *pending_head = 0; - -/* Check whether NAME is already on the external definition list. If not, - add it to either that list or the pending definition list. */ - -void -vms_check_external (decl, name, pending) - tree decl; - const char *name; - int pending; -{ - register struct extern_list *p, *p0; - - for (p = extern_head; p; p = p->next) - if (!strcmp (p->name, name)) - return; - - for (p = pending_head, p0 = 0; p; p0 = p, p = p->next) - if (!strcmp (p->name, name)) - { - if (pending) - return; - - /* Was pending, but has now been defined; move it to other list. */ - if (p == pending_head) - pending_head = p->next; - else - p0->next = p->next; - p->next = extern_head; - extern_head = p; - return; - } - - /* Not previously seen; create a new list entry. */ - p = (struct extern_list *) xmalloc (sizeof (struct extern_list)); - p->name = name; - - if (pending) - { - /* Save the size and section type and link to `pending' list. */ - p->size = (DECL_SIZE (decl) == 0) ? 0 : - TREE_INT_CST_LOW (size_binop (CEIL_DIV_EXPR, DECL_SIZE (decl), - size_int (BITS_PER_UNIT))); - p->in_const = (TREE_READONLY (decl) && ! TREE_THIS_VOLATILE (decl)); - - p->next = pending_head; - pending_head = p; - } - else - { - /* Size and section type don't matter; link to `declared' list. */ - p->size = p->in_const = 0; /* arbitrary init */ - - p->next = extern_head; - extern_head = p; - } - return; -} - -void -vms_flush_pending_externals (file) - FILE *file; -{ - register struct extern_list *p; - - while (pending_head) - { - /* Move next pending declaration to the "done" list. */ - p = pending_head; - pending_head = p->next; - p->next = extern_head; - extern_head = p; - - /* Now output the actual declaration. */ - if (p->in_const) - const_section (); - else - data_section (); - fputs (".comm ", file); - assemble_name (file, p->name); - fprintf (file, ",%d\n", p->size); - } -} - -static void -vms_asm_out_constructor (symbol, priority) - rtx symbol; - int priority ATTRIBUTE_UNUSED; -{ - fprintf (asm_out_file,".globl $$PsectAttributes_NOOVR$$__gxx_init_1\n"); - data_section(); - fprintf (asm_out_file,"$$PsectAttributes_NOOVR$$__gxx_init_1:\n\t.long\t"); - assemble_name (asm_out_file, XSTR (symbol, 0)); - fputc ('\n', asm_out_file); -} - -static void -vms_asm_out_destructor (symbol, priority) - rtx symbol; - int priority ATTRIBUTE_UNUSED; -{ - fprintf (asm_out_file,".globl $$PsectAttributes_NOOVR$$__gxx_clean_1\n"); - data_section(); - fprintf (asm_out_file,"$$PsectAttributes_NOOVR$$__gxx_clean_1:\n\t.long\t"); - assemble_name (asm_out_file, XSTR (symbol, 0)); - fputc ('\n', asm_out_file); -} - -static void -vms_select_section (exp, reloc, align) - tree exp; - int reloc ATTRIBUTE_UNUSED; - unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED; -{ - if (TREE_CODE (exp) == VAR_DECL) - { - if (TREE_READONLY (exp) && ! TREE_THIS_VOLATILE (exp) - && DECL_INITIAL (exp) - && (DECL_INITIAL (exp) == error_mark_node - || TREE_CONSTANT (DECL_INITIAL (exp)))) - { - if (TREE_PUBLIC (exp)) - const_section (); - else - text_section (); - } - else - data_section (); - } - if (TREE_CODE_CLASS (TREE_CODE (exp)) == 'c') - { - if (TREE_CODE (exp) == STRING_CST && flag_writable_strings) - data_section (); - else - text_section (); - } -} - -/* Make sure that external variables are correctly addressed. Under VMS - there is some brain damage in the linker that requires us to do this. */ - -static void -vms_encode_section_info (decl, first) - tree decl; - int first ATTRIBUTE_UNUSED; -{ - if (DECL_EXTERNAL (decl) && TREE_PUBLIC (decl)) - SYMBOL_REF_FLAG (XEXP (DECL_RTL (decl), 0)) = 1; -} - -/* This is how to output a command to make the user-level label named NAME - defined for reference from other files. */ -static void -vms_globalize_label (stream, name) - FILE *stream; - const char *name; -{ - default_globalize_label (stream, name); - vms_check_external (NULL_TREE, name, 0); -} -#endif /* VMS_TARGET */ - -/* Additional support code for VMS host. */ -/* ??? This should really be in libiberty; vax.c is a target file. */ -#ifdef QSORT_WORKAROUND - /* - Do not use VAXCRTL's qsort() due to a severe bug: once you've - sorted something which has a size that's an exact multiple of 4 - and is longword aligned, you cannot safely sort anything which - is either not a multiple of 4 in size or not longword aligned. - A static "move-by-longword" optimization flag inside qsort() is - never reset. This is known to affect VMS V4.6 through VMS V5.5-1, - and was finally fixed in VMS V5.5-2. - - In this work-around an insertion sort is used for simplicity. - The qsort code from glibc should probably be used instead. - */ -void -not_qsort (array, count, size, compare) - void *array; - unsigned count, size; - int (*compare)(); -{ - - if (size == sizeof (short)) - { - register int i; - register short *next, *prev; - short tmp, *base = array; - - for (next = base, i = count - 1; i > 0; i--) - { - prev = next++; - if ((*compare)(next, prev) < 0) - { - tmp = *next; - do *(prev + 1) = *prev; - while (--prev >= base ? (*compare)(&tmp, prev) < 0 : 0); - *(prev + 1) = tmp; - } - } - } - else if (size == sizeof (long)) - { - register int i; - register long *next, *prev; - long tmp, *base = array; - - for (next = base, i = count - 1; i > 0; i--) - { - prev = next++; - if ((*compare)(next, prev) < 0) - { - tmp = *next; - do *(prev + 1) = *prev; - while (--prev >= base ? (*compare)(&tmp, prev) < 0 : 0); - *(prev + 1) = tmp; - } - } - } - else /* arbitrary size */ - { - register int i; - register char *next, *prev, *tmp = alloca (size), *base = array; - - for (next = base, i = count - 1; i > 0; i--) - { /* count-1 forward iterations */ - prev = next, next += size; /* increment front pointer */ - if ((*compare)(next, prev) < 0) - { /* found element out of order; move others up then re-insert */ - memcpy (tmp, next, size); /* save smaller element */ - do { memcpy (prev + size, prev, size); /* move larger elem. up */ - prev -= size; /* decrement back pointer */ - } while (prev >= base ? (*compare)(tmp, prev) < 0 : 0); - memcpy (prev + size, tmp, size); /* restore small element */ - } - } -#ifdef USE_C_ALLOCA - alloca (0); -#endif - } - - return; -} -#endif /* QSORT_WORKAROUND */ - /* Return 1 if insn A follows B. */ static int diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h index 47a0f034e69..ec08c0eeb55 100644 --- a/gcc/config/vax/vax.h +++ b/gcc/config/vax/vax.h @@ -557,10 +557,8 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; /* Addressing modes, and classification of registers for them. */ #define HAVE_POST_INCREMENT 1 -/* #define HAVE_POST_DECREMENT 0 */ #define HAVE_PRE_DECREMENT 1 -/* #define HAVE_PRE_INCREMENT 0 */ /* Macros to check register numbers against specific register classes. */ @@ -1060,12 +1058,6 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; #define USER_LABEL_PREFIX "_" -/* This is how to output an internal numbered label where - PREFIX is the class of label and NUM is the number within the class. */ - -#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ - fprintf (FILE, "%s%d:\n", PREFIX, NUM) - /* This is how to store into the string LABEL the symbol_ref name of an internal numbered label where PREFIX is the class of label and NUM is the number within the class. @@ -1147,6 +1139,14 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ",%u\n", (ROUNDED))) +/* Output code to add DELTA to the first argument, and then jump to FUNCTION. + Used for C++ multiple inheritance. + .mask ^m<r2,r3,r4,r5,r6,r7,r8,r9,r10,r11> #conservative entry mask + addl2 $DELTA, 4(ap) #adjust first argument + jmp FUNCTION+2 #jump beyond FUNCTION's entry mask + */ +#define ASM_OUTPUT_MI_THUNK vax_output_mi_thunk + /* Store in OUTPUT a string (made with alloca) containing an assembler-name for a local static variable named NAME. LABELNO is an integer which is different for each call. */ diff --git a/gcc/config/vax/vms.h b/gcc/config/vax/vms.h deleted file mode 100644 index 870ebaf04eb..00000000000 --- a/gcc/config/vax/vms.h +++ /dev/null @@ -1,274 +0,0 @@ -/* Output variables, constants and external declarations, for GNU compiler. - Copyright (C) 1988, 1994, 1995, 1996, 1997, 1999, 2001, 2002 - Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define TARGET_EXECUTABLE_SUFFIX ".exe" -#define TARGET_OBJECT_SUFFIX ".obj" - -/* This enables certain macros in vax.h, which will make an indirect - reference to an external symbol an invalid address. This needs to be - defined before we include vax.h, since it determines which macros - are used for GO_IF_*. */ - -#define NO_EXTERNAL_INDIRECT_ADDRESS - -#include "vax/vax.h" - -#undef VMS_TARGET -#define VMS_TARGET 1 - -#undef LIB_SPEC -#undef TARGET_NAME -#undef TARGET_DEFAULT -#undef CALL_USED_REGISTERS -#undef STARTING_FRAME_OFFSET - -#define TARGET_OS_CPP_BUILTINS() \ - do \ - { \ - builtin_define_std ("vms"); \ - builtin_define_std ("VMS"); \ - builtin_assert ("system=vms"); \ - \ - builtin_define_std ("vax"); \ - if (TARGET_G_FLOAT) \ - builtin_define_std ("GFLOAT"); \ - } \ - while (0) - -/* These match the definitions used in VAXCRTL, the VMS C run-time library */ - -#define SIZE_TYPE "unsigned int" -#define PTRDIFF_TYPE "int" -#define WCHAR_TYPE "unsigned int" -#define WCHAR_TYPE_SIZE 32 /* in bits */ - -/* Use memcpy for structure copying, and so forth. */ -#define TARGET_MEM_FUNCTIONS - -/* Strictly speaking, VMS does not use DBX at all, but the interpreter built - into gas only speaks straight DBX. */ - -#define DEFAULT_GDB_EXTENSIONS 0 - -#define TARGET_DEFAULT 1 -#define TARGET_NAME "vax/vms" - -/* The structure return address arrives as an "argument" on VMS. */ -#undef STRUCT_VALUE_REGNUM -#define STRUCT_VALUE 0 -#undef PCC_STATIC_STRUCT_RETURN - -#define CALL_USED_REGISTERS {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1} - -/* The run-time library routine VAXC$ESTABLISH (necessary when mixing - VMS exception handling and setjmp/longjmp in the same program) requires - that a hidden automatic variable at the top of the stack be reserved - for its use. We accomplish this by simply adding 4 bytes to the local - stack for all functions, and making sure that normal local variables - are 4 bytes lower on the stack then they would otherwise have been. */ - -#define STARTING_FRAME_OFFSET -4 - -/* This macro definition sets up a default value for `main' to return. */ -#define DEFAULT_MAIN_RETURN c_expand_return (integer_one_node) - -/* Globalizing directive for a label. */ -#define GLOBAL_ASM_OP ".globl " - -/* Under VMS we write the actual size of the storage to be allocated even - though the symbol is external. Although it is possible to give external - symbols a size of 0 (as unix does), the VMS linker does not make the - distinction between a variable definition and an external reference of a - variable, and thus the linker will not complain about a missing definition. - If we followed the unix example of giving external symbols a size of - zero, you tried to link a program where a given variable was externally - defined but none of the object modules contained a non-extern definition, - the linker would allocate 0 bytes for the variable, and any attempt to - use that variable would use the storage allocated to some other variable. - - We must also select either const_section or data_section: this will indicate - whether or not the variable will get the readonly bit set. Since the - VMS linker does not distinguish between a variable's definition and an - external reference, all usages of a given variable must have the readonly - bit set the same way, or the linker will get confused and give warning - messages. */ - -/* We used to round the size up to a multiple of 4, - but that causes linker errors sometimes when the variable was initialized - since the size of its definition was not likewise rounded up. */ - -/* Note: the original ASM_OUTPUT_EXTERNAL code has been moved into - vms_check_external and vms_flush_pending_externals. */ - -#define ASM_OUTPUT_EXTERNAL(FILE,DECL,NAME) \ -{ if (DECL_INITIAL (DECL) == 0 && TREE_CODE (DECL) != FUNCTION_DECL) \ - vms_check_external ((DECL), (NAME), 1); \ -} - -/* ASM_OUTPUT_EXTERNAL will have wait until after an initializer is - completed in order to switch sections for an external object, so - use the DECLARE_OBJECT hooks to manage deferred declarations. */ - -/* This is the default action for ASM_DECLARE_OBJECT_NAME, but if it - is explicitly defined, then ASM_FINISH_DECLARE_OBJECT will be used. */ - -#define ASM_DECLARE_OBJECT_NAME(ASM_OUT_FILE,NAME,DECL) \ - ASM_OUTPUT_LABEL ((ASM_OUT_FILE), (NAME)) - -/* We don't need to do anything special to finish the current object, but it - should now be safe to output any deferred external global declarations. */ - -#define ASM_FINISH_DECLARE_OBJECT(FILE,DECL,TOPLVL,ATEND) \ - vms_flush_pending_externals(FILE) - -/* Anything still pending must be flushed at the very end. */ - -#define ASM_FILE_END(STREAM) \ - vms_flush_pending_externals(STREAM) - -/* Here we redefine ASM_OUTPUT_COMMON to select the data_section or the - const_section before writing the ".const" assembler directive. - If we were specifying a size of zero for external variables, we would - not have to select a section, since the assembler can assume that - when the size > 0, the storage is for a non-external, uninitialized - variable (for which a "const" declaration would be senseless), - and the assembler can make the storage read/write. - - Since the ".const" directive specifies the actual size of the storage used - for both external and non-external variables, the assembler cannot - make this assumption, and thus it has no way of deciding if storage should - be read/write or read-only. To resolve this, we give the assembler some - assistance, in the form of a ".const" or a ".data" directive. - - Under GCC 1.40, external variables were declared with a size of zero. - The GNU assembler, GAS, will recognize the "-2" switch when built for VMS; - when compiling programs with GCC 2.n this switch should be used or the - assembler will not give the read-only attribute to external constants. - Failure to use this switch will result in linker warning messages about - mismatched psect attributes. */ - -#undef ASM_OUTPUT_COMMON - -#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ -( ((TREE_READONLY (decl) && ! TREE_THIS_VOLATILE (decl)) \ - ? (const_section (), 0) : (data_section (), 0)), \ - fputs (".comm ", (FILE)), \ - assemble_name ((FILE), (NAME)), \ - fprintf ((FILE), ",%u\n", (SIZE))) - -/* We define this to prevent the name mangler from putting dollar signs into - function names. This isn't really needed, but it has been here for - some time and removing it would cause the object files generated by the - compiler to be incompatible with the object files from a compiler that - had this defined. Since it does no harm, we leave it in. */ - -#define NO_DOLLAR_IN_LABEL - -/* Add a "const" section. This is viewed by the assembler as being nearly - the same as the "data" section, with the only difference being that a - flag is set for variables declared while in the const section. This - flag is used to determine whether or not the read/write bit should be - set in the Psect definition. */ - -#define EXTRA_SECTIONS in_const - -#define EXTRA_SECTION_FUNCTIONS \ -void \ -const_section () \ -{ \ - if (in_section != in_const) { \ - fprintf(asm_out_file,".const\n"); \ - in_section = in_const; \ - } \ -} - -/* This is used by a hook in varasm.c to write the assembler directives - that are needed to tell the startup code which constructors need to - be run. */ - -#define TARGET_ASM_CONSTRUCTOR vms_asm_out_constructor -#define TARGET_ASM_DESTRUCTOR vms_asm_out_destructor - -/* The following definitions are used in libgcc2.c with the __main - function. The _SHR symbol is used when the sharable image library - for the C++ library is used - this is picked up automatically by the linker - and this symbol points to the start of __CTOR_LIST__ from the C++ library. - If the C++ library is not used, then __CTOR_LIST_SHR__ occurs just after - __CTOR_LIST__, and essentially points to the same list as __CTOR_LIST. */ - -#ifdef L__main - -#define __CTOR_LIST__ __gxx_init_0 -#define __CTOR_LIST_END__ __gxx_init_2 - -#define __CTOR_LIST_SHR__ $$PsectAttributes_NOSHR$$__gxx_init_0_shr -#define __CTOR_LIST_SHR_END__ $$PsectAttributes_NOSHR$$__gxx_init_2_shr - -#define DO_GLOBAL_CTORS_BODY \ -do { \ - func_ptr *p; \ - extern func_ptr __CTOR_LIST__[1], __CTOR_LIST_END__[1]; \ - extern func_ptr __CTOR_LIST_SHR__[1], __CTOR_LIST_SHR_END__[1]; \ - if (&__CTOR_LIST_SHR__[0] != &__CTOR_LIST__[1]) \ - for (p = __CTOR_LIST_SHR__ + 1; p < __CTOR_LIST_SHR_END__ ; p++ ) \ - if (*p) (*p) (); \ - for (p = __CTOR_LIST__ + 1; p < __CTOR_LIST_END__ ; p++ ) \ - if (*p) (*p) (); \ - do { /* arrange for `return' from main() to pass through exit() */ \ - __label__ foo; \ - int *callers_caller_fp = (int *) __builtin_frame_address (3); \ - register int retval asm ("r0"); \ - callers_caller_fp[4] = (int) && foo; \ - break; /* out of do-while block */ \ - foo: \ - exit (retval); \ - } while (0); \ -} while (0) - -#define __DTOR_LIST__ __gxx_clean_0 -#define __DTOR_LIST_END__ __gxx_clean_2 - -#define __DTOR_LIST_SHR__ $$PsectAttributes_NOSHR$$__gxx_clean_0_shr -#define __DTOR_LIST_SHR_END__ $$PsectAttributes_NOSHR$$__gxx_clean_2_shr - -#define DO_GLOBAL_DTORS_BODY \ -do { \ - func_ptr *p; \ - extern func_ptr __DTOR_LIST__[1], __DTOR_LIST_END__[1]; \ - extern func_ptr __DTOR_LIST_SHR__[1], __DTOR_LIST_SHR_END__[1]; \ - for (p = __DTOR_LIST__ + 1; p < __DTOR_LIST_END__ ; p++ ) \ - if (*p) (*p) (); \ - if (&__DTOR_LIST_SHR__[0] != &__DTOR_LIST__[1]) \ - for (p = __DTOR_LIST_SHR__ + 1; p < __DTOR_LIST_SHR_END__ ; p++ ) \ - if (*p) (*p) (); \ -} while (0) - -#endif /* L__main */ - -/* Specify the list of include file directories. */ -#define INCLUDE_DEFAULTS \ -{ \ - { "GNU_GXX_INCLUDE:", "G++", 1, 1 }, \ - { "GNU_CC_INCLUDE:", "GCC", 0, 0 }, /* GNU includes */ \ - { "SYS$SYSROOT:[SYSLIB.]", 0, 0, 0 }, /* VAX-11 "C" includes */ \ - { ".", 0, 0, 1 }, /* Make normal VMS filespecs work. */ \ - { 0, 0, 0, 0 } \ -} diff --git a/gcc/config/vax/xm-vms.h b/gcc/config/vax/xm-vms.h deleted file mode 100644 index eaf5f3bf510..00000000000 --- a/gcc/config/vax/xm-vms.h +++ /dev/null @@ -1,174 +0,0 @@ -/* Configuration for GNU C-compiler for VAX. - Copyright (C) 1987, 1994, 1995, 1996, 1997, 2001 - Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* Other configurations get these via autoconfig. */ -#define STDC_HEADERS 1 -#define HAVE_STDLIB_H 1 -#define HAVE_STRING_H 1 -#ifdef __DECC -#define HAVE_UNISTD_H 1 -#endif - -#if defined(VAXC) || defined(__DECC) -/* if compiling with VAXC, need to fix problem with <stdio.h> - which defines a macro called FILE_TYPE that breaks "tree.h". - Fortunately it uses #ifndef to suppress multiple inclusions. - Three possible cases: - 1) <stdio.h> has already been included -- ours will be no-op; - 2) <stdio.h> will be included after us -- "theirs" will be no-op; - 3) <stdio.h> isn't needed -- including it here shouldn't hurt. - In all three cases, the problem macro will be removed here. */ -#include <stdio.h> -#undef FILE_TYPE -#endif - -#define SUCCESS_EXIT_CODE 1 -#define FATAL_EXIT_CODE (44 | 0x10000000) /* Abort, and no DCL message. */ - -/* A couple of conditionals for execution machine are controlled here. */ -#ifndef VMS -#define VMS -#endif - -#define GCC_INCLUDE_DIR "///not used with VMS///" /* nonsense string for now */ - -/* and define a local equivalent (sort of) for unlink */ -#define unlink remove - -/* Under VMS a directory specification can be enclosed either in square - brackets or in angle brackets. Thus we need to check both. This - macro is used to help compare filenames in cp-lex.c. - - We also need to make sure that the names are all lower case, because - we must be able to compare filenames to determine if a file implements - a class. */ - -#define FILE_NAME_NONDIRECTORY(C) \ -({ \ - char * pnt_ = (C), * pnt1_; \ - pnt1_ = pnt_ - 1; \ - while (*++pnt1_) \ - if (ISUPPER (*pnt1_)) *pnt1_ = TOLOWER (*pnt1_); \ - pnt1_ = strrchr (pnt_, ']'); \ - pnt1_ = (pnt1_ == 0 ? strrchr (pnt_, '>') : pnt1_); \ - pnt1_ = (pnt1_ == 0 ? strrchr (pnt_, ':') : pnt1_); \ - (pnt1_ == 0 ? pnt_ : pnt1_ + 1); \ - }) - -/* Macro to generate the name of the cross reference file. The standard - one does not work, since it was written assuming that the conventions - of a unix style filesystem will work on the host system. */ - -#define XREF_FILE_NAME(BUFF, NAME) \ - s = FILE_NAME_NONDIRECTORY (NAME); \ - if (s == NAME) sprintf(BUFF, "%s_gxref", NAME); \ - else { \ - strcpy(BUFF, NAME); \ - strcat(BUFF, "_gxref"); \ - } - -/* Macro that is used in cp-xref.c to determine whether a file name is - absolute or not. */ - -#define FILE_NAME_ABSOLUTE_P(NAME) \ - (FILE_NAME_NONDIRECTORY (NAME) != (&NAME[1])) - -/* FILE_NAME_JOINER is defined to be the characters that are inserted between - a directory name and a filename in order to make an absolute file - specification. Under VMS the directory specification contains all of the - required characters, so we define this to be a null string. */ - -#define FILE_NAME_JOINER "" - -/* vprintf() has been available since VMS V4.6. */ - -#define HAVE_VPRINTF - -/* Early versions of VAX C for VMS do not have putenv. Comment out - the following define if your system doesn't have putenv. */ -#define HAVE_PUTENV - -#ifndef HAVE_PUTENV -#define putenv(x) -#endif - -#if defined(VAXC) || defined(__DECC) - -/* Customizations/kludges for building with DEC's VAX C compiler - rather than GCC. */ - -#define QSORT_WORKAROUND /* do not use VAXCRTL's qsort */ - -/* use ANSI/SYSV style byte manipulation routines instead of BSD ones */ -/* rename all too-long external symbol names to avoid warnings */ -#define check_for_full_enumeration_handling check_for_full_enum_handling -#define current_function_contains_functions curfunc_contains_functions -#define current_function_epilogue_delay_list curfunc_epilogue_delay_list -#define current_function_has_nonlocal_goto curfunc_has_nonlocal_goto -#define current_function_has_nonlocal_label curfunc_has_nonlocal_label -#define current_function_internal_arg_pointer curfunc_internal_arg_pointer -#define current_function_outgoing_args_size curfunc_outgoing_args_size -#define current_function_pretend_args_size curfunc_pretend_args_size -#define current_function_returns_pcc_struct curfunc_returns_pcc_struct -#define current_function_returns_pointer curfunc_returns_pointer -#define current_function_uses_const_pool curfunc_uses_const_pool -#define current_function_uses_pic_offset_table curfunc_uses_pic_offset_table -#define dbxout_resume_previous_source_file dbxout_resume_previous_src_file -#define expand_builtin_extract_return_addr expand_builtin_extract_ret_addr -#define expand_builtin_set_return_addr_reg expand_builtin_set_ret_addr_reg -#define expand_start_loop_continue_elsewhere expnd_start_loop_cont_elsewhere -#define flag_schedule_insns_after_reload flag_sched_insns_after_reload -#define get_dynamic_handler_chain_libfunc get_dynamic_hndlr_chain_libfunc -#define lookup_name_current_level_global lookup_name_current_level_gbl -#define maybe_building_objc_message_expr maybe_building_objc_msg_expr -#define mesg_implicit_function_declaration mesg_implicit_func_declaration -#define output_deferred_addressed_constants output_deferred_addr_constants -#define protect_cleanup_actions_with_terminate protect_cleanup_act_w_terminate -#define reg_overlap_mentioned_for_reload_p reg_overlap_mtnd_for_reload_p -#define reposition_prologue_and_epilogue_notes repos_prolog_and_epilog_notes -#define rtx_equal_function_value_matters rtx_equal_func_value_matters -#define set_new_first_and_last_label_num set_new_first_and_last_lbl_num -#define thread_prologue_and_epilogue_insns thread_prolog_and_epilog_insns -#endif - -/* We need to avoid the library qsort routine, due to a serious bug - in VAXCRTL. (Sorting anything with size that's not a multiple of 4 - after having previously sorted something that was a multiple of 4 - can produce wrong results and result in data corruption.) We'll - use our own substitute (in vax.c) instead. */ -#ifdef QSORT_WORKAROUND -#define qsort not_qsort -#endif - -#ifdef __DECC -/* DECC$SHR doesn't have VAXCRTL's bugs. */ -#undef QSORT_WORKAROUND -#undef qsort -/* Avoid a lot of informational level diagnostics about implicitly - declared functions. */ -#include <stdlib.h> -#include <string.h> -/* this is for genopinit.c */ - #pragma message disable (undefescap) -#endif - -#define HOST_EXECUTABLE_SUFFIX ".exe" -#define HOST_OBJECT_SUFFIX ".obj" diff --git a/gcc/config/vxlib.c b/gcc/config/vxlib.c new file mode 100644 index 00000000000..89e0c3514d9 --- /dev/null +++ b/gcc/config/vxlib.c @@ -0,0 +1,325 @@ +/* Copyright (C) 2002 Free Software Foundation, Inc. + Contributed by Zack Weinberg <zack@codesourcery.com> + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING. If not, write to the Free +Software Foundation, 59 Temple Place - Suite 330, Boston, MA +02111-1307, USA. */ + +/* Threads compatibility routines for libgcc2 for VxWorks. + These are out-of-line routines called from gthr-vxworks.h. */ + +/* As a special exception, if you link this library with other files, + some of which are compiled with GCC, to produce an executable, + this library does not by itself cause the resulting executable + to be covered by the GNU General Public License. + This exception does not however invalidate any other reasons why + the executable file might be covered by the GNU General Public License. */ + +#include "tconfig.h" +#include "tsystem.h" +#include "gthr.h" + +#include <vxWorks.h> +#include <vxLib.h> +#include <taskLib.h> +#include <taskHookLib.h> + +/* Init-once operation. + + This would be a clone of the implementation from gthr-solaris.h, + except that we have a bootstrap problem - the whole point of this + exercise is to prevent double initialization, but if two threads + are racing with each other, once->mutex is liable to be initialized + by both. Then each thread will lock its own mutex, and proceed to + call the initialization routine. + + So instead we use a bare atomic primitive (vxTas()) to handle + mutual exclusion. Threads losing the race then busy-wait, calling + taskDelay() to yield the processor, until the initialization is + completed. Inefficient, but reliable. */ + +int +__gthread_once (__gthread_once_t *guard, void (*func)(void)) +{ + if (guard->done) + return 0; + + while (!vxTas ((void *)&guard->busy)) + taskDelay (1); + + /* Only one thread at a time gets here. Check ->done again, then + go ahead and call func() if no one has done it yet. */ + if (!guard->done) + { + func (); + guard->done = 1; + } + + guard->busy = 0; + return 0; +} + +/* Thread-specific data. + + We reserve a field in the TCB to point to a dynamically allocated + array which is used to store TSD values. A TSD key is simply an + offset in this array. The exact location of the TCB field is not + known to this code nor to vxlib.c -- all access to it indirects + through the routines __gthread_get_tsd_data and + __gthread_set_tsd_data, which are provided by the VxWorks kernel. + + There is also a global array which records which keys are valid and + which have destructors. + + A task delete hook is installed to execute key destructors. The + routines __gthread_enter_tsd_dtor_context and + __gthread_leave_tsd_dtor_context, which are also provided by the + kernel, ensure that it is safe to call free() on memory allocated + by the task being deleted. (This is a no-op on VxWorks 5, but + a major undertaking on AE.) + + Since this interface is used to allocate only a small number of + keys, the table size is small and static, which simplifies the + code quite a bit. Revisit this if and when it becomes necessary. */ + +#define MAX_KEYS 4 + +/* This is the structure pointed to by the pointer returned + by __gthread_get_tsd_data. */ +struct tsd_data +{ + void *values[MAX_KEYS]; + unsigned int generation[MAX_KEYS]; +}; + + +/* kernel provided routines */ +extern void *__gthread_get_tsd_data (WIND_TCB *tcb); +extern void __gthread_set_tsd_data (WIND_TCB *tcb, void *data); + +extern void __gthread_enter_tsd_dtor_context (WIND_TCB *tcb); +extern void __gthread_leave_tsd_dtor_context (WIND_TCB *tcb); + +typedef void (*fet_callback_t) (WIND_TCB *, unsigned int); +extern void __gthread_for_all_tasks (fet_callback_t fun, unsigned int number); + +/* This is a global structure which records all of the active keys. + + A key is potentially valid (i.e. has been handed out by + __gthread_key_create) iff its generation count in this structure is + even. In that case, the matching entry in the dtors array is a + routine to be called when a thread terminates with a valid, + non-NULL specific value for that key. + + A key is actually valid in a thread T iff the generation count + stored in this structure is equal to the generation count stored in + T's specific-value structure. */ + +typedef void (*tsd_dtor) (void *); + +struct tsd_keys +{ + tsd_dtor dtor[MAX_KEYS]; + unsigned int generation[MAX_KEYS]; +}; + +#define KEY_VALID_P(key) !(tsd_keys.generation[key] & 1) + +/* Note: if MAX_KEYS is increased, this initializer must be updated + to match. All the generation counts begin at 1, which means no + key is valid. */ +static struct tsd_keys tsd_keys = +{ + { 0, 0, 0, 0 }, + { 1, 1, 1, 1 } +}; + +/* This lock protects the tsd_keys structure. */ +static __gthread_mutex_t tsd_lock; + +static __gthread_once_t tsd_init_guard = __GTHREAD_ONCE_INIT; + +/* Internal routines. */ + +/* The task TCB has just been deleted. Call the destructor + function for each TSD key that has both a destructor and + a non-NULL specific value in this thread. + + This routine does not need to take tsd_lock; the generation + count protects us from calling a stale destructor. It does + need to read tsd_keys.dtor[key] atomically. */ + +static void +tsd_delete_hook (WIND_TCB *tcb) +{ + struct tsd_data *data = __gthread_get_tsd_data (tcb); + __gthread_key_t key; + + if (data) + { + __gthread_enter_tsd_dtor_context (tcb); + for (key = 0; key < MAX_KEYS; key++) + { + if (data->generation[key] == tsd_keys.generation[key]) + { + tsd_dtor dtor = tsd_keys.dtor[key]; + + if (dtor) + dtor (data->values[key]); + } + } + free (data); + __gthread_set_tsd_data (tcb, 0); + __gthread_leave_tsd_dtor_context (tcb); + } +} + +/* Initialize global data used by the TSD system. */ +static void +tsd_init (void) +{ + taskDeleteHookAdd ((FUNCPTR)tsd_delete_hook); + __GTHREAD_MUTEX_INIT_FUNCTION (&tsd_lock); +} + +/* External interface */ + +/* Store in KEYP a value which can be passed to __gthread_setspecific/ + __gthread_getspecific to store and retrive a value which is + specific to each calling thread. If DTOR is not NULL, it will be + called when a thread terminates with a non-NULL specific value for + this key, with the value as its sole argument. */ + +int +__gthread_key_create (__gthread_key_t *keyp, tsd_dtor dtor) +{ + __gthread_key_t key; + + __gthread_once (&tsd_init_guard, tsd_init); + + if (__gthread_mutex_lock (&tsd_lock) == ERROR) + return errno; + + for (key = 0; key < MAX_KEYS; key++) + if (!KEY_VALID_P (key)) + goto found_slot; + + /* no room */ + __gthread_mutex_unlock (&tsd_lock); + return EAGAIN; + + found_slot: + tsd_keys.generation[key]++; /* making it even */ + tsd_keys.dtor[key] = dtor; + *keyp = key; + __gthread_mutex_unlock (&tsd_lock); + return 0; +} + +/* Invalidate KEY; it can no longer be used as an argument to + setspecific/getspecific. Note that this does NOT call destructor + functions for any live values for this key. */ +int +__gthread_key_delete (__gthread_key_t key) +{ + if (key >= MAX_KEYS) + return EINVAL; + + __gthread_once (&tsd_init_guard, tsd_init); + + if (__gthread_mutex_lock (&tsd_lock) == ERROR) + return errno; + + if (!KEY_VALID_P (key)) + { + __gthread_mutex_unlock (&tsd_lock); + return EINVAL; + } + + tsd_keys.generation[key]++; /* making it odd */ + tsd_keys.dtor[key] = 0; + + __gthread_mutex_unlock (&tsd_lock); + return 0; +} + +/* Retrieve the thread-specific value for KEY. If it has never been + set in this thread, or KEY is invalid, returns NULL. + + It does not matter if this function races with key_create or + key_delete; the worst that can happen is you get a value other than + the one that a serialized implementation would have provided. */ + +void * +__gthread_getspecific (__gthread_key_t key) +{ + struct tsd_data *data; + + if (key >= MAX_KEYS) + return 0; + + data = __gthread_get_tsd_data (taskTcb (taskIdSelf ())); + + if (!data) + return 0; + + if (data->generation[key] != tsd_keys.generation[key]) + return 0; + + return data->values[key]; +} + +/* Set the thread-specific value for KEY. If KEY is invalid, or + memory allocation fails, returns -1, otherwise 0. + + The generation count protects this function against races with + key_create/key_delete; the worst thing that can happen is that a + value is successfully stored into a dead generation (and then + immediately becomes invalid). However, we do have to make sure + to read tsd_keys.generation[key] atomically. */ + +int +__gthread_setspecific (__gthread_key_t key, void *value) +{ + struct tsd_data *data; + WIND_TCB *tcb; + unsigned int generation; + + if (key >= MAX_KEYS) + return EINVAL; + + tcb = taskTcb (taskIdSelf ()); + data = __gthread_get_tsd_data (tcb); + if (!data) + { + data = malloc (sizeof (struct tsd_data)); + if (!data) + return ENOMEM; + + memset (data, 0, sizeof (struct tsd_data)); + __gthread_set_tsd_data (tcb, data); + } + + generation = tsd_keys.generation[key]; + + if (generation & 1) + return EINVAL; + + data->generation[key] = generation; + data->values[key] = value; + + return 0; +} diff --git a/gcc/config/vxworks.h b/gcc/config/vxworks.h new file mode 100644 index 00000000000..75aae79d68e --- /dev/null +++ b/gcc/config/vxworks.h @@ -0,0 +1,65 @@ +/* Common VxWorks target definitions for GNU compiler. + Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. + Contributed by Wind River Systems. + +This file is part of GNU CC. + +GNU CC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +GNU CC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GNU CC; see the file COPYING. If not, write to +the Free Software Foundation, 59 Temple Place - Suite 330, +Boston, MA 02111-1307, USA. */ + +/* Specify what to link with. */ +/* VxWorks does all the library stuff itself. */ +#undef LIB_SPEC +#define LIB_SPEC "" + +#undef LINK_SPEC +#define LINK_SPEC "-r" + +/* VxWorks provides the functionality of crt0.o and friends itself. */ +#undef STARTFILE_SPEC +#define STARTFILE_SPEC "" + +#undef ENDFILE_SPEC +#define ENDFILE_SPEC "" + +/* VxWorks cannot have dots in constructor labels, because it uses a + mutant variation of collect2 that generates C code instead of + assembly. Thus each constructor label must be a legitimate C + symbol. FIXME: Have VxWorks use real collect2 instead. */ + +#undef NO_DOLLAR_IN_LABEL +#define NO_DOT_IN_LABEL + +/* enable #pragma pack(n) */ +#define HANDLE_SYSV_PRAGMA + +/* No underscore is prepended to any C symbol name. */ +#undef USER_LABEL_PREFIX +#define USER_LABEL_PREFIX "" + +/* VxWorks uses wchar_t == unsigned short (UCS2) on all architectures. */ +#undef WCHAR_TYPE +#define WCHAR_TYPE "short unsigned int" +#undef WCHAR_TYPE_SIZE +#define WCHAR_TYPE_SIZE 16 + +/* Dwarf2 unwind info is not supported. */ +#define DWARF2_UNWIND_INFO 0 +/* Weak symbols and link-once sections are not enabled by default. */ +#define DEFAULT_USE_WEAK 0 + +/* Only supported debug format is Dwarf2. */ +#undef DBX_DEBUGGING_INFO +#undef DWARF_DEBUGGING_INFO diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index babb5b06a51..4ad8c80475b 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -21,6 +21,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include "rtl.h" #include "regs.h" #include "machmode.h" diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index c495ef11af2..d51b6795a34 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -1281,11 +1281,6 @@ typedef struct xtensa_args { indexing purposes) so give the MEM rtx a words's mode. */ #define FUNCTION_MODE SImode -/* A C expression that evaluates to true if it is ok to perform a - sibling call to DECL. */ -/* TODO: fix this up to allow at least some sibcalls */ -#define FUNCTION_OK_FOR_SIBCALL(DECL) 0 - /* Xtensa constant costs. */ #define CONST_COSTS(X, CODE, OUTER_CODE) \ case CONST_INT: \ @@ -1634,15 +1629,6 @@ typedef struct xtensa_args { goto JUMPTO; \ } while (0) -/* Store in OUTPUT a string (made with alloca) containing - an assembler-name for a local static variable named NAME. - LABELNO is an integer which is different for each call. */ -#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ - do { \ - (OUTPUT) = (char *) alloca (strlen (NAME) + 10); \ - sprintf ((OUTPUT), "%s.%u", (NAME), (LABELNO)); \ - } while (0) - /* How to start an assembler comment. */ #define ASM_COMMENT_START "#" |