* config/elfos.h: Follow spelling conventions.

	* config/alpha/alpha.h: Likewise.
	* config/arc/arc.h: Likewise.
	* config/arm/arm.md: Likewise.
	* config/avr/avr.h: Likewise.
	* config/cris/cris.md: Likewise.
	* config/d30v/d30v.h: Likewise.
	* config/frv/frv.c: Likewise.
	* config/frv/frv.h: Likewise.
	* config/h8300/h8300.c: Likewise.
	* config/h8300/h8300.h: Likewise.
	* config/h8300/h8300.md: Likewise.
	* config/i386/cygwin.h: Likewise.
	* config/i386/i386.h: Likewise.
	* config/i386/sysv3.h: Likewise.
	* config/i960/i960.h: Likewise.
	* config/ia64/ia64.h: Likewise.
	* config/ia64/ia64.md: Likewise.
	* config/ip2k/ip2k.h: Likewise.
	* config/m32r/m32r.h: Likewise.
	* config/m68k/m68k.h: Likewise.
	* config/m88k/m88k.h: Likewise.
	* config/mcore/mcore.c: Likewise.
	* config/mcore/mcore.h: Likewise.
	* config/mcore/mcore.md: Likewise.
	* config/mips/mips.h: Likewise.
	* config/mmix/mmix.h: Likewise.
	* config/mmix/mmix.md: Likewise.
	* config/ns32k/netbsd.h: Likewise.
	* config/ns32k/ns32k.h: Likewise.
	* config/ns32k/ns32k.md: Likewise.
	* config/pa/pa.h: Likewise.
	* config/romp/romp.h: Likewise.
	* config/rs6000/rs6000.h: Likewise.
	* config/rs6000/rs6000.md: Likewise.
	* config/sparc/sparc.h: Likewise.
	* config/stormy16/stormy-abi: Likewise.
	* config/stormy16/stormy16.h: Likewise.
	* config/vax/vax.h: Likewise.


git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@57468 138bc75d-0d04-0410-961f-82ee72b054a4

39 files changed, 61 insertions, 61 deletions

diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index 4e94e881cc0..0b70284d599 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -493,7 +493,7 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */
 /* Every structure's size must be a multiple of this.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* No data type wants to be aligned rounder than this.  */
diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index 95bfef73663..3c4904a7a92 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -231,7 +231,7 @@ if (GET_MODE_CLASS (MODE) == MODE_INT		\
 /* Every structure's size must be a multiple of this.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* No data type wants to be aligned rounder than this.  */
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 266d0754d77..1d57485b8ec 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1858,9 +1858,9 @@
 ;;; ??? This pattern is bogus.  If operand3 has bits outside the range
 ;;; represented by the bitfield, then this will produce incorrect results.
 ;;; Somewhere, the value needs to be truncated.  On targets like the m68k,
-;;; which have a real bitfield insert instruction, the truncation happens
-;;; in the bitfield insert instruction itself.  Since arm does not have a
-;;; bitfield insert instruction, we would have to emit code here to truncate
+;;; which have a real bit-field insert instruction, the truncation happens
+;;; in the bit-field insert instruction itself.  Since arm does not have a
+;;; bit-field insert instruction, we would have to emit code here to truncate
 ;;; the value before we insert.  This loses some of the advantage of having
 ;;; this insv pattern, so this pattern needs to be reevalutated.
 
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 7f9f283e4ee..4281d01a254 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -1845,9 +1845,9 @@ progmem_section ()							      \
 
 #define OBJC_PROLOGUE {}
 /* A C statement to output any assembler statements which are
-   required to precede any Objective C object definitions or message
+   required to precede any Objective-C object definitions or message
    sending.  The statement is executed only when compiling an
-   Objective C program.  */
+   Objective-C program.  */
 
 
 #define ASM_OUTPUT_ASCII(FILE, P, SIZE)	 gas_output_ascii (FILE,P,SIZE)
diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index c92ec7fd2a4..1683192189c 100644
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -4689,7 +4689,7 @@
 ;; Please also add a self-contained test-case.
 
 ;; We have trouble with and:s and shifts.  Maybe something is broken in
-;; gcc?  Or it could just be that bitfield insn expansion is a bit
+;; gcc?  Or it could just be that bit-field insn expansion is a bit
 ;; suboptimal when not having extzv insns.
 
 (define_peephole
diff --git a/gcc/config/d30v/d30v.h b/gcc/config/d30v/d30v.h
index 421f964913a..dc0ac209975 100644
--- a/gcc/config/d30v/d30v.h
+++ b/gcc/config/d30v/d30v.h
@@ -2222,7 +2222,7 @@ typedef struct machine_function GTY(())
    Defined in svr4.h.  */
 /* #define TARGET_MEM_FUNCTIONS */
 
-/* Define this macro to generate code for Objective C message sending using the
+/* Define this macro to generate code for Objective-C message sending using the
    calling convention of the NeXT system.  This calling convention involves
    passing the object, the selector and the method arguments all at once to the
    method-lookup library function.
@@ -2800,8 +2800,8 @@ extern const char *d30v_branch_cost_string;
 /* #define ASM_OUTPUT_IDENT(STREAM, STRING) */
 
 /* A C statement to output any assembler statements which are required to
-   precede any Objective C object definitions or message sending.  The
-   statement is executed only when compiling an Objective C program.  */
+   precede any Objective-C object definitions or message sending.  The
+   statement is executed only when compiling an Objective-C program.  */
 /* #define OBJC_PROLOGUE */
 
 
@@ -4129,7 +4129,7 @@ fprintf (STREAM, "\t.word .L%d\n", VALUE)
    instructions.
 
    If both types of instructions truncate the count (for shifts) and position
-   (for bitfield operations), or if no variable-position bitfield instructions
+   (for bit-field operations), or if no variable-position bit-field instructions
    exist, you should define this macro.
 
    However, on some machines, such as the 80386 and the 680x0, truncation only
diff --git a/gcc/config/elfos.h b/gcc/config/elfos.h
index cd20878acee..987622812f0 100644
--- a/gcc/config/elfos.h
+++ b/gcc/config/elfos.h
@@ -46,7 +46,7 @@ Boston, MA 02111-1307, USA.  */
 
 #define NO_DOLLAR_IN_LABEL
 
-/* Writing `int' for a bitfield forces int alignment for the structure.  */
+/* Writing `int' for a bit-field forces int alignment for the structure.  */
 
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index 1b6f37b4934..cea0b571902 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -7858,7 +7858,7 @@ frv_adjust_field_align (field, computed)
 
       /* If this isn't a :0 field and if the previous element is a bitfield
 	 also, see if the type is different, if so, we will need to align the
-	 bitfield to the next boundary */
+	 bit-field to the next boundary */
       if (prev
 	  && ! DECL_PACKED (field)
 	  && ! integer_zerop (DECL_SIZE (field))
diff --git a/gcc/config/frv/frv.h b/gcc/config/frv/frv.h
index 414fe2716ed..f5fe93ee0b6 100644
--- a/gcc/config/frv/frv.h
+++ b/gcc/config/frv/frv.h
@@ -688,13 +688,13 @@ extern int g_switch_set;          /* whether -G xx was passed.  */
 /* Define this if you wish to imitate the way many other C compilers handle
    alignment of bitfields and the structures that contain them.
 
-   The behavior is that the type written for a bitfield (`int', `short', or
+   The behavior is that the type written for a bit-field (`int', `short', or
    other integer type) imposes an alignment for the entire structure, as if the
    structure really did contain an ordinary field of that type.  In addition,
-   the bitfield is placed within the structure so that it would fit within such
+   the bit-field is placed within the structure so that it would fit within such
    a field, not crossing a boundary for it.
 
-   Thus, on most machines, a bitfield whose type is written as `int' would not
+   Thus, on most machines, a bit-field whose type is written as `int' would not
    cross a four-byte boundary, and would force four-byte alignment for the
    whole structure.  (The alignment used may not be four bytes; it is
    controlled by the other alignment parameters.)
@@ -711,7 +711,7 @@ extern int g_switch_set;          /* whether -G xx was passed.  */
    `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'.  Then every
    structure can be accessed with fullwords.
 
-   Unless the machine has bitfield instructions or you define
+   Unless the machine has bit-field instructions or you define
    `STRUCTURE_SIZE_BOUNDARY' that way, you must define
    `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value.
 
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 9e3b1d1238e..2d3c3f4be16 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -941,7 +941,7 @@ jump_address_operand (op, mode)
   return 0;
 }
 
-/* Recognize valid operands for bitfield instructions.  */
+/* Recognize valid operands for bit-field instructions.  */
 
 extern int rtx_equal_function_value_matters;
 
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 0fc4a375663..2c41f42d595 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -224,7 +224,7 @@ extern int target_flags;
    structure layouts.  */
 #define EMPTY_FIELD_BOUNDARY 16
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS  0
 
 /* No data type wants to be aligned rounder than this.
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 5df7be3e0c5..5ac93fc655c 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -1991,7 +1991,7 @@
   "TARGET_H8300"
   "
 {
-  /* We only have single bit bitfield instructions.  */
+  /* We only have single bit bit-field instructions.  */
   if (INTVAL (operands[1]) != 1)
     FAIL;
 
@@ -2019,7 +2019,7 @@
   "TARGET_H8300"
   "
 {
-  /* We only have single bit bitfield instructions.  */
+  /* We only have single bit bit-field instructions.  */
   if (INTVAL (operands[2]) != 1)
     FAIL;
 
diff --git a/gcc/config/i386/cygwin.h b/gcc/config/i386/cygwin.h
index be925413a2b..680bf74da77 100644
--- a/gcc/config/i386/cygwin.h
+++ b/gcc/config/i386/cygwin.h
@@ -418,7 +418,7 @@ extern int i386_pe_dllimport_name_p PARAMS ((const char *));
 #undef	BIGGEST_FIELD_ALIGNMENT
 #define BIGGEST_FIELD_ALIGNMENT 64
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #undef PCC_BITFIELD_TYPE_MATTERS
 #define PCC_BITFIELD_TYPE_MATTERS 1
 #define GROUP_BITFIELDS_BY_ALIGN TYPE_NATIVE(rec)
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index c2d7c432446..68fa7409b7e 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -784,7 +784,7 @@ extern int x86_prefetch_sse;
 
 /* If bit field type is int, don't let it cross an int,
    and give entire struct the alignment of an int.  */
-/* Required on the 386 since it doesn't have bitfield insns.  */
+/* Required on the 386 since it doesn't have bit-field insns.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* Standard register usage.  */
diff --git a/gcc/config/i386/sysv3.h b/gcc/config/i386/sysv3.h
index a55f0e8a95e..93f94450124 100644
--- a/gcc/config/i386/sysv3.h
+++ b/gcc/config/i386/sysv3.h
@@ -42,7 +42,7 @@ Boston, MA 02111-1307, USA.  */
 
 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
 
-/* Writing `int' for a bitfield forces int alignment for the structure.  */
+/* Writing `int' for a bit-field forces int alignment for the structure.  */
 
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h
index a669cf462b1..0c9763f0610 100644
--- a/gcc/config/i960/i960.h
+++ b/gcc/config/i960/i960.h
@@ -1126,7 +1126,7 @@ struct cum_args { int ca_nregparms; int ca_nstackparms; };
 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
 
 /* Nonzero if access to memory by bytes is no faster than for words.
-   Value changed to 1 after reports of poor bitfield code with g++.
+   Value changed to 1 after reports of poor bit-field code with g++.
    Indications are that code is usually as good, sometimes better.  */   
 
 #define SLOW_BYTE_ACCESS 1
diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index 31dd3cde749..1d96eafc8ec 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -329,10 +329,10 @@ while (0)
 
 /* Define this if you wish to imitate the way many other C compilers handle
    alignment of bitfields and the structures that contain them.
-   The behavior is that the type written for a bitfield (`int', `short', or
+   The behavior is that the type written for a bit-field (`int', `short', or
    other integer type) imposes an alignment for the entire structure, as if the
    structure really did contain an ordinary field of that type.  In addition,
-   the bitfield is placed within the structure so that it would fit within such
+   the bit-field is placed within the structure so that it would fit within such
    a field, not crossing a boundary for it.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index b5896521597..4a256907e70 100644
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -1244,7 +1244,7 @@
   "dep %0 = %3, %0, %2, %1"
   [(set_attr "itanium_class" "ishf")])
 
-;; Combine doesn't like to create bitfield insertions into zero.
+;; Combine doesn't like to create bit-field insertions into zero.
 (define_insn "*depz_internal"
   [(set (match_operand:DI 0 "gr_register_operand" "=r")
 	(and:DI (ashift:DI (match_operand:DI 1 "gr_register_operand" "r")
diff --git a/gcc/config/ip2k/ip2k.h b/gcc/config/ip2k/ip2k.h
index dbafef4290e..e05b02c2b0c 100644
--- a/gcc/config/ip2k/ip2k.h
+++ b/gcc/config/ip2k/ip2k.h
@@ -1990,9 +1990,9 @@ do {									\
 
 #define OBJC_PROLOGUE {}
 /* A C statement to output any assembler statements which are
-   required to precede any Objective C object definitions or message
+   required to precede any Objective-C object definitions or message
    sending.  The statement is executed only when compiling an
-   Objective C program.  */
+   Objective-C program.  */
 
 #define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
   fprintf ((STREAM), ".double %.20e\n", (VALUE))
diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h
index 80dffd133fc..f5513b8449f 100644
--- a/gcc/config/m32r/m32r.h
+++ b/gcc/config/m32r/m32r.h
@@ -480,7 +480,7 @@ extern enum m32r_sdata m32r_sdata;
 /* Every structure's size must be a multiple of this.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* No data type wants to be aligned rounder than this.  */
diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h
index bf70352d5a6..3650b91feef 100644
--- a/gcc/config/m68k/m68k.h
+++ b/gcc/config/m68k/m68k.h
@@ -69,7 +69,7 @@ extern int target_flags;
 #define MASK_68881	2
 #define TARGET_68881 (target_flags & MASK_68881)
 
-/* Compile using 68020 bitfield insns.  */
+/* Compile using 68020 bit-field insns.  */
 #define MASK_BITFIELD	4
 #define TARGET_BITFIELD (target_flags & MASK_BITFIELD)
 
diff --git a/gcc/config/m88k/m88k.h b/gcc/config/m88k/m88k.h
index 4cd5075832c..b36c5f50a82 100644
--- a/gcc/config/m88k/m88k.h
+++ b/gcc/config/m88k/m88k.h
@@ -383,7 +383,7 @@ extern int flag_pic;				/* -fpic */
    when given unaligned data.  */
 #define STRICT_ALIGNMENT 1
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* Maximum size (in bits) to use for the largest integral type that
diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c
index fa14654a757..7068ca696e1 100644
--- a/gcc/config/mcore/mcore.c
+++ b/gcc/config/mcore/mcore.c
@@ -1729,7 +1729,7 @@ mcore_expand_insv (operands)
       return 1;
     }
 
-  /* Look at some bitfield placements that we aren't interested
+  /* Look at some bit-field placements that we aren't interested
      in handling ourselves, unless specifically directed to do so.  */
   if (! TARGET_W_FIELD)
     return 0;		/* Generally, give up about now.  */
diff --git a/gcc/config/mcore/mcore.h b/gcc/config/mcore/mcore.h
index 685d62013be..7bce37cd227 100644
--- a/gcc/config/mcore/mcore.h
+++ b/gcc/config/mcore/mcore.h
@@ -284,7 +284,7 @@ extern int mcore_stack_increment;
 /* Every structures size must be a multiple of 8 bits.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* Look at the fundamental type that is used for a bitfield and use 
+/* Look at the fundamental type that is used for a bit-field and use 
    that to impose alignment on the enclosing structure.
    struct s {int a:8}; should have same alignment as "int", not "char".  */
 #define	PCC_BITFIELD_TYPE_MATTERS	1
diff --git a/gcc/config/mcore/mcore.md b/gcc/config/mcore/mcore.md
index 5bdedaf40d3..7e74a98e061 100644
--- a/gcc/config/mcore/mcore.md
+++ b/gcc/config/mcore/mcore.md
@@ -2881,7 +2881,7 @@
     }
   else if (CONST_OK_FOR_K ((1 << INTVAL (operands[2])) - 1))
     {
-      /* A narrow bitfield (<=5 bits) means we can do a shift to put
+      /* A narrow bit-field (<=5 bits) means we can do a shift to put
          it in place and then use an andi to extract it.
          This is as good as a shiftleft/shiftright. */
 
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 9239707a5ce..4d2a33ad834 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1575,14 +1575,14 @@ do {							\
    handle alignment of bitfields and the structures that contain
    them.
 
-   The behavior is that the type written for a bitfield (`int',
+   The behavior is that the type written for a bit-field (`int',
    `short', or other integer type) imposes an alignment for the
    entire structure, as if the structure really did contain an
-   ordinary field of that type.  In addition, the bitfield is placed
+   ordinary field of that type.  In addition, the bit-field is placed
    within the structure so that it would fit within such a field,
    not crossing a boundary for it.
 
-   Thus, on most machines, a bitfield whose type is written as `int'
+   Thus, on most machines, a bit-field whose type is written as `int'
    would not cross a four-byte boundary, and would force four-byte
    alignment for the whole structure.  (The alignment used may not
    be four bytes; it is controlled by the other alignment
diff --git a/gcc/config/mmix/mmix.h b/gcc/config/mmix/mmix.h
index 59b09b4dccd..e3d22d6a0e6 100644
--- a/gcc/config/mmix/mmix.h
+++ b/gcc/config/mmix/mmix.h
@@ -261,7 +261,7 @@ extern int target_flags;
 
 
 /* Node: Storage Layout */
-/* I see no bitfield instructions.  Anyway, the common order is from low
+/* I see no bit-field instructions.  Anyway, the common order is from low
    to high, as the power of two, hence little-endian.  */
 #define BITS_BIG_ENDIAN 0
 #define BYTES_BIG_ENDIAN 1
diff --git a/gcc/config/mmix/mmix.md b/gcc/config/mmix/mmix.md
index d234d8c9cb6..3f4435ca1f7 100644
--- a/gcc/config/mmix/mmix.md
+++ b/gcc/config/mmix/mmix.md
@@ -1081,7 +1081,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2")
    PUSHGO $%p3,%a1")
 
 ;; I hope untyped_call and untyped_return are not needed for MMIX.
-;; Users of Objective C will notice.
+;; Users of Objective-C will notice.
 
 ; Generated by GCC.
 (define_expand "return"
diff --git a/gcc/config/ns32k/netbsd.h b/gcc/config/ns32k/netbsd.h
index 66ba1cb4724..595a36c8fb4 100644
--- a/gcc/config/ns32k/netbsd.h
+++ b/gcc/config/ns32k/netbsd.h
@@ -30,7 +30,7 @@ Boston, MA 02111-1307, USA.  */
 
 /* Compile for the floating point unit & 32532 by default;
    Don't assume SB is zero;
-   Don't use bitfield instructions;
+   Don't use bit-field instructions;
    FPU is 32381;
    Use multiply-add instructions */
 
diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h
index 4ecb47b46d5..e6de13ca79c 100644
--- a/gcc/config/ns32k/ns32k.h
+++ b/gcc/config/ns32k/ns32k.h
@@ -126,7 +126,7 @@ extern int target_flags;
 
 #define TARGET_HIMEM (target_flags & MASK_HIMEM)
 
-/* Compile using bitfield insns.  */
+/* Compile using bit-field insns.  */
 #define TARGET_BITFIELD ((target_flags & MASK_NO_BITFIELD) == 0)
 
 #define TARGET_IEEE_COMPARE (target_flags & MASK_IEEE_COMPARE)
@@ -276,7 +276,7 @@ while (0)
 
 /* If bit field type is int, don't let it cross an int,
    and give entire struct the alignment of an int.  */
-/* Required on the 386 since it doesn't have a full set of bitfield insns.
+/* Required on the 386 since it doesn't have a full set of bit-field insns.
    (There is no signed extv insn.)  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md
index ba450012a4a..3929eb95cc1 100644
--- a/gcc/config/ns32k/ns32k.md
+++ b/gcc/config/ns32k/ns32k.md
@@ -2124,7 +2124,7 @@
 }")
 
 ;; extract(base, width, offset)
-;; Signed bitfield extraction is not supported in hardware on the
+;; Signed bit-field extraction is not supported in hardware on the
 ;; NS 32032.  It is therefore better to let GCC figure out a
 ;; good strategy for generating the proper instruction sequence
 ;; and represent it as rtl.
@@ -2169,7 +2169,7 @@
 }")
 
 ;; The exts/ext instructions have the problem that they always access
-;; 32 bits even if the bitfield is smaller. For example the instruction
+;; 32 bits even if the bit-field is smaller. For example the instruction
 ;; 	extsd 7(r1),r0,2,5
 ;; would read not only at address 7(r1) but also at 8(r1) to 10(r1).
 ;; If these addresses are in a different (unmapped) page a memory fault
diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h
index 7813d7c5e64..0f18ff07a6e 100644
--- a/gcc/config/pa/pa.h
+++ b/gcc/config/pa/pa.h
@@ -434,7 +434,7 @@ do {								\
 /* Every structure's size must be a multiple of this.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* No data type wants to be aligned rounder than this.  This is set
diff --git a/gcc/config/romp/romp.h b/gcc/config/romp/romp.h
index c2d1505159f..1e3f6476d76 100644
--- a/gcc/config/romp/romp.h
+++ b/gcc/config/romp/romp.h
@@ -111,7 +111,7 @@ extern int target_flags;
 /* Every structure's size must be a multiple of this.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* Make strings word-aligned so strcpy from constants will be faster.  */
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index b913ff6dd2e..d1d84ef24db 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -632,7 +632,7 @@ extern int rs6000_default_long_calls;
 #define MEMBER_TYPE_FORCES_BLK(FIELD, MODE) \
   (TARGET_SPE && TREE_CODE (TREE_TYPE (FIELD)) == VECTOR_TYPE)
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* Make strings word-aligned so strcpy from constants will be faster.
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 2c0a4750e38..132ca76c242 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -3823,7 +3823,7 @@
   if (which_alternative == 1)
      return \"#\";
 
-  /* If the bitfield being tested fits in the upper or lower half of a
+  /* If the bit-field being tested fits in the upper or lower half of a
      word, it is possible to use andiu. or andil. to test it.  This is
      useful because the condition register set-use delay is smaller for
      andi[ul]. than for rlinm.  This doesn't work when the starting bit
@@ -3883,7 +3883,7 @@
      return \"#\";
 
   /* Since we are using the output value, we can't ignore any need for
-     a shift.  The bitfield must end at the LSB.  */
+     a shift.  The bit-field must end at the LSB.  */
   if (start >= 16 && start + size == 32)
     {
       operands[3] = GEN_INT ((1 << size) - 1);
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 313da6e8e54..b793fd7d71d 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -771,7 +771,7 @@ if (TARGET_ARCH64				\
 /* Every structure's size must be a multiple of this.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS 1
 
 /* No data type wants to be aligned rounder than this.  */
diff --git a/gcc/config/stormy16/stormy-abi b/gcc/config/stormy16/stormy-abi
index fb1a4877150..23eaa7b6321 100644
--- a/gcc/config/stormy16/stormy-abi
+++ b/gcc/config/stormy16/stormy-abi
@@ -149,7 +149,7 @@ the storage unit being relocated.
 
 In the 'Field' column, the first number indicates whether the
 relocation refers to a byte, word or doubleword.  The second number,
-if any, indicates the size of the bitfield into which the relocation
+if any, indicates the size of the bit-field into which the relocation
 is to occur (and also the size for overflow checking).  The third
-number indicates the first bit of the bitfield in the word or
+number indicates the first bit of the bit-field in the word or
 doubleword, counting the LSB as bit 0.
diff --git a/gcc/config/stormy16/stormy16.h b/gcc/config/stormy16/stormy16.h
index 7a30aa77cc2..147da5c47e1 100644
--- a/gcc/config/stormy16/stormy16.h
+++ b/gcc/config/stormy16/stormy16.h
@@ -158,7 +158,7 @@ do {									\
 #undef WCHAR_TYPE_SIZE
 #define WCHAR_TYPE_SIZE 32
 
-/* Define this macro if the type of Objective C selectors should be `int'.
+/* Define this macro if the type of Objective-C selectors should be `int'.
 
    If this macro is not defined, then selectors should have the type `struct
    objc_selector *'.  */
@@ -2004,7 +2004,7 @@ enum reg_class
    C compiler that comes with the system takes care of doing them.  */
 /* #define perform_...  */
 
-/* Define this macro to generate code for Objective C message sending using the
+/* Define this macro to generate code for Objective-C message sending using the
    calling convention of the NeXT system.  This calling convention involves
    passing the object, the selector and the method arguments all at once to the
    method-lookup library function.
@@ -2592,8 +2592,8 @@ do {							\
 /* #define ASM_OUTPUT_SECTION_NAME(STREAM, DECL, NAME) */
 
 /* A C statement to output any assembler statements which are required to
-   precede any Objective C object definitions or message sending.  The
-   statement is executed only when compiling an Objective C program.  */
+   precede any Objective-C object definitions or message sending.  The
+   statement is executed only when compiling an Objective-C program.  */
 /* #define OBJC_PROLOGUE */
 
 
@@ -3764,7 +3764,7 @@ do {									\
    instructions.
 
    If both types of instructions truncate the count (for shifts) and position
-   (for bitfield operations), or if no variable-position bitfield instructions
+   (for bit-field operations), or if no variable-position bit-field instructions
    exist, you should define this macro.
 
    However, on some machines, such as the 80386 and the 680x0, truncation only
diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h
index 6651a0260c5..f4d74ac7707 100644
--- a/gcc/config/vax/vax.h
+++ b/gcc/config/vax/vax.h
@@ -141,7 +141,7 @@ extern int target_flags;
 /* Every structure's size must be a multiple of this.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
-/* A bitfield declared as `int' forces `int' alignment for the struct.  */
+/* A bit-field declared as `int' forces `int' alignment for the struct.  */
 #define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT)
 
 /* No data type wants to be aligned rounder than this.  */