diff options
| author | Eric Botcazou <ebotcazou@adacore.com> | 2012-10-30 23:08:14 +0000 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@adacore.com> | 2012-10-30 23:08:14 +0000 |
| commit | 5c060ef48b1af9b3a84d441cb6a8f5c02cfea323 (patch) | |
| tree | dd92947715fddf642b6231071745df354bf3021a /gcc/cse.c | |
| parent | bcfdf763ba7110bf2cea5acda4a29adc5dd5cad5 (diff) | |
* cse.c (hash_rtx_cb): Replace RTX_UNCHANGING_P with MEM_READONLY_P in
head comment.
(hash_rtx): Likewise.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@193001 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/cse.c')
| -rw-r--r-- | gcc/cse.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/cse.c b/gcc/cse.c index c7a75eae454..b41d47a36a2 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -2547,7 +2547,7 @@ hash_rtx_cb (const_rtx x, enum machine_mode mode, Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains - a MEM rtx which does not have the RTX_UNCHANGING_P bit set. + a MEM rtx which does not have the MEM_READONLY_P flag set. Note that cse_insn knows that the hash code of a MEM expression is just (int) MEM plus the hash code of the address. */ @@ -2563,7 +2563,7 @@ hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p, /* Hash an rtx X for cse via hash_rtx. Stores 1 in do_not_record if any subexpression is volatile. Stores 1 in hash_arg_in_memory if X contains a mem rtx which - does not have the RTX_UNCHANGING_P bit set. */ + does not have the MEM_READONLY_P flag set. */ static inline unsigned canon_hash (rtx x, enum machine_mode mode) |