diff options
| author | Bernd Schmidt <bernds@codesourcery.com> | 2011-07-06 23:16:39 +0000 |
|---|---|---|
| committer | Bernd Schmidt <bernds@codesourcery.com> | 2011-07-06 23:16:39 +0000 |
| commit | a4b5d6c7936752d7c1629630f6e28245bf07bfd6 (patch) | |
| tree | 27c66cbb7f764ab1e0fc7b9262c11b806127fde0 /gcc/cse.c | |
| parent | ce41f5443e0bf3a5ccbed8a4cea1bb401727bb57 (diff) | |
* explow.c (trunc_int_for_mode): Use GET_MODE_PRECISION
instead of GET_MODE_BITSIZE where appropriate.
* rtlanal.c (subreg_lsb_1, subreg_get_info, nonzero_bits1,
num_sign_bit_copies1, canonicalize_condition, low_bitmask_len,
init_num_sign_bit_copies_in_rep): Likewise.
* cse.c (fold_rtx, cse_insn): Likewise.
* loop-doloop.c (doloop_modify, doloop_optimize): Likewise.
* simplify-rtx.c (simplify_unary_operation_1,
simplify_const_unary_operation, simplify_binary_operation_1,
simplify_const_binary_operation, simplify_ternary_operation,
simplify_const_relational_operation, simplify_subreg): Likewise.
* combine.c (try_combine, find_split_point, combine_simplify_rtx,
simplify_if_then_else, simplify_set, expand_compound_operation,
expand_field_assignment, make_extraction, if_then_else_cond,
make_compound_operation, force_to_mode, make_field_assignment,
reg_nonzero_bits_for_combine, reg_num_sign_bit_copies_for_combine,
extended_count, try_widen_shift_mode, simplify_shift_const_1,
simplify_comparison, record_promoted_value, simplify_compare_const,
record_dead_and_set_regs_1): Likewise.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@175946 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/cse.c')
| -rw-r--r-- | gcc/cse.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/gcc/cse.c b/gcc/cse.c index da4b1e1ee47..a078329ac55 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -3650,7 +3650,7 @@ fold_rtx (rtx x, rtx insn) enum rtx_code associate_code; if (is_shift - && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode) + && (INTVAL (const_arg1) >= GET_MODE_PRECISION (mode) || INTVAL (const_arg1) < 0)) { if (SHIFT_COUNT_TRUNCATED) @@ -3699,7 +3699,7 @@ fold_rtx (rtx x, rtx insn) break; if (is_shift - && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode) + && (INTVAL (inner_const) >= GET_MODE_PRECISION (mode) || INTVAL (inner_const) < 0)) { if (SHIFT_COUNT_TRUNCATED) @@ -3729,7 +3729,7 @@ fold_rtx (rtx x, rtx insn) if (is_shift && CONST_INT_P (new_const) - && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) + && INTVAL (new_const) >= GET_MODE_PRECISION (mode)) { /* As an exception, we can turn an ASHIFTRT of this form into a shift of the number of bits - 1. */ @@ -4672,13 +4672,13 @@ cse_insn (rtx insn) if (src_const && src_related == 0 && CONST_INT_P (src_const) && GET_MODE_CLASS (mode) == MODE_INT - && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) + && GET_MODE_PRECISION (mode) < BITS_PER_WORD) { enum machine_mode wider_mode; for (wider_mode = GET_MODE_WIDER_MODE (mode); wider_mode != VOIDmode - && GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD + && GET_MODE_PRECISION (wider_mode) <= BITS_PER_WORD && src_related == 0; wider_mode = GET_MODE_WIDER_MODE (wider_mode)) { @@ -5031,7 +5031,7 @@ cse_insn (rtx insn) && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1)) && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2)) && REG_P (XEXP (SET_DEST (sets[i].rtl), 0)) - && (GET_MODE_BITSIZE (GET_MODE (SET_DEST (sets[i].rtl))) + && (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets[i].rtl))) >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))) && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)) + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2)) @@ -5058,7 +5058,7 @@ cse_insn (rtx insn) HOST_WIDE_INT mask; unsigned int shift; if (BITS_BIG_ENDIAN) - shift = GET_MODE_BITSIZE (GET_MODE (dest_reg)) + shift = GET_MODE_PRECISION (GET_MODE (dest_reg)) - INTVAL (pos) - INTVAL (width); else shift = INTVAL (pos); |