diff options
author | Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> | 2007-05-01 19:34:19 +0000 |
---|---|---|
committer | Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> | 2007-05-01 19:34:19 +0000 |
commit | 4e3c56e8b70c4a51169166d7a5592c884a9f874d (patch) | |
tree | 0704c41a7a2d1d3020f325332c94233cbd1f2dac /gcc/doc | |
parent | 7812c79879a61e804944dbed035b6b9f99cf2e43 (diff) |
2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3
and athlon64-sse3 as improved versions of k8, opteron and athlon64
with SSE3 instruction set support.
* doc/invoke.texi: Likewise.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@124339 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/invoke.texi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index cc5feb9c8fb..9252a4666ae 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -9891,6 +9891,8 @@ instruction set support. @item k8, opteron, athlon64, athlon-fx AMD K8 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.) +@item k8-sse3, opteron-sse3, athlon64-sse3 +Improved versions of k8, opteron and athlon64 with SSE3 instruction set support. @item amdfam10, barcelona AMD Family 10 core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit |