2008-05-12 Diego Novillo <dnovillo@google.com>

	Mainline merge @136136

	* configure.ac (ACX_PKGVERSION): Update revision merge string.
	* confiugre: Regenerate.

2008-05-12  Diego Novillo  <dnovillo@google.com>

	* lto-tree-flags.def (STRUCT_FIELD_TAG): Remove.
	* treestruct.def (STRUCT_FIELD_TAG): Remove.
	Update all users.
	* lto-cgraph-out.c (output_node): Update references to
	inline summary fields.


lto/ChangeLog:

2008-05-12  Diego Novillo  <dnovillo@google.com>

	* lto-cgraph-in.c (overwrite_node): Update references to
	inline summary fields.
	* lto-function-in.c (input_expr_operand): Do not handle
	STRUCT_FIELD_TAG.




git-svn-id: https://gcc.gnu.org/svn/gcc/branches/lto@135224 138bc75d-0d04-0410-961f-82ee72b054a4

6 files changed, 163 insertions, 54 deletions

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 7cae1a4e070..f3c6c574a42 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -7647,13 +7647,13 @@ Generates the @code{movups} machine instruction as a store to memory.
 Generates the @code{movss} machine instruction as a load from memory.
 @item void __builtin_ia32_storess (float *, v4sf)
 Generates the @code{movss} machine instruction as a store to memory.
-@item v4sf __builtin_ia32_loadhps (v4sf, v2si *)
+@item v4sf __builtin_ia32_loadhps (v4sf, const v2sf *)
 Generates the @code{movhps} machine instruction as a load from memory.
-@item v4sf __builtin_ia32_loadlps (v4sf, v2si *)
+@item v4sf __builtin_ia32_loadlps (v4sf, const v2sf *)
 Generates the @code{movlps} machine instruction as a load from memory
-@item void __builtin_ia32_storehps (v4sf, v2si *)
+@item void __builtin_ia32_storehps (v2sf *, v4sf)
 Generates the @code{movhps} machine instruction as a store to memory.
-@item void __builtin_ia32_storelps (v4sf, v2si *)
+@item void __builtin_ia32_storelps (v2sf *, v4sf)
 Generates the @code{movlps} machine instruction as a store to memory.
 @end table
 
@@ -7748,15 +7748,15 @@ v16qi __builtin_ia32_punpcklbw128 (v16qi, v16qi)
 v8hi __builtin_ia32_punpcklwd128 (v8hi, v8hi)
 v4si __builtin_ia32_punpckldq128 (v4si, v4si)
 v2di __builtin_ia32_punpcklqdq128 (v2di, v2di)
-v16qi __builtin_ia32_packsswb128 (v16qi, v16qi)
-v8hi __builtin_ia32_packssdw128 (v8hi, v8hi)
-v16qi __builtin_ia32_packuswb128 (v16qi, v16qi)
+v16qi __builtin_ia32_packsswb128 (v8hi, v8hi)
+v8hi __builtin_ia32_packssdw128 (v4si, v4si)
+v16qi __builtin_ia32_packuswb128 (v8hi, v8hi)
 v8hi __builtin_ia32_pmulhuw128 (v8hi, v8hi)
 void __builtin_ia32_maskmovdqu (v16qi, v16qi)
 v2df __builtin_ia32_loadupd (double *)
 void __builtin_ia32_storeupd (double *, v2df)
-v2df __builtin_ia32_loadhpd (v2df, double *)
-v2df __builtin_ia32_loadlpd (v2df, double *)
+v2df __builtin_ia32_loadhpd (v2df, double const *)
+v2df __builtin_ia32_loadlpd (v2df, double const *)
 int __builtin_ia32_movmskpd (v2df)
 int __builtin_ia32_pmovmskb128 (v16qi)
 void __builtin_ia32_movnti (int *, int)
@@ -7852,13 +7852,13 @@ v4hi __builtin_ia32_phaddsw (v4hi, v4hi)
 v2si __builtin_ia32_phsubd (v2si, v2si)
 v4hi __builtin_ia32_phsubw (v4hi, v4hi)
 v4hi __builtin_ia32_phsubsw (v4hi, v4hi)
-v8qi __builtin_ia32_pmaddubsw (v8qi, v8qi)
+v4hi __builtin_ia32_pmaddubsw (v8qi, v8qi)
 v4hi __builtin_ia32_pmulhrsw (v4hi, v4hi)
 v8qi __builtin_ia32_pshufb (v8qi, v8qi)
 v8qi __builtin_ia32_psignb (v8qi, v8qi)
 v2si __builtin_ia32_psignd (v2si, v2si)
 v4hi __builtin_ia32_psignw (v4hi, v4hi)
-long long __builtin_ia32_palignr (long long, long long, int)
+v1di __builtin_ia32_palignr (v1di, v1di, int)
 v8qi __builtin_ia32_pabsb (v8qi)
 v2si __builtin_ia32_pabsd (v2si)
 v4hi __builtin_ia32_pabsw (v4hi)
@@ -7875,13 +7875,13 @@ v8hi __builtin_ia32_phaddsw128 (v8hi, v8hi)
 v4si __builtin_ia32_phsubd128 (v4si, v4si)
 v8hi __builtin_ia32_phsubw128 (v8hi, v8hi)
 v8hi __builtin_ia32_phsubsw128 (v8hi, v8hi)
-v16qi __builtin_ia32_pmaddubsw128 (v16qi, v16qi)
+v8hi __builtin_ia32_pmaddubsw128 (v16qi, v16qi)
 v8hi __builtin_ia32_pmulhrsw128 (v8hi, v8hi)
 v16qi __builtin_ia32_pshufb128 (v16qi, v16qi)
 v16qi __builtin_ia32_psignb128 (v16qi, v16qi)
 v4si __builtin_ia32_psignd128 (v4si, v4si)
 v8hi __builtin_ia32_psignw128 (v8hi, v8hi)
-v2di __builtin_ia32_palignr (v2di, v2di, int)
+v2di __builtin_ia32_palignr128 (v2di, v2di, int)
 v16qi __builtin_ia32_pabsb128 (v16qi)
 v4si __builtin_ia32_pabsd128 (v4si)
 v8hi __builtin_ia32_pabsw128 (v8hi)
@@ -7997,7 +7997,7 @@ Generates the @code{crc32b} machine instruction.
 Generates the @code{crc32w} machine instruction.
 @item unsigned int __builtin_ia32_crc32si (unsigned int, unsigned int)
 Generates the @code{crc32l} machine instruction.
-@item unsigned long long __builtin_ia32_crc32di (unsigned int, unsigned long long)
+@item unsigned long long __builtin_ia32_crc32di (unsigned long long, unsigned long long)
 @end table
 
 The following built-in functions are changed to generate new SSE4.2
diff --git a/gcc/doc/gty.texi b/gcc/doc/gty.texi
index f776e19a63b..624408fc556 100644
--- a/gcc/doc/gty.texi
+++ b/gcc/doc/gty.texi
@@ -316,8 +316,10 @@ escape.
 
 @findex chain_next
 @findex chain_prev
+@findex chain_circular
 @item chain_next ("@var{expression}")
 @itemx chain_prev ("@var{expression}")
+@itemx chain_circular ("@var{expression}")
 
 It's helpful for the type machinery to know if objects are often
 chained together in long lists; this lets it generate code that uses
@@ -326,7 +328,8 @@ it.  @code{chain_next} is an expression for the next item in the list,
 @code{chain_prev} is an expression for the previous item.  For singly
 linked lists, use only @code{chain_next}; for doubly linked lists, use
 both.  The machinery requires that taking the next item of the
-previous item gives the original item.
+previous item gives the original item.  @code{chain_circular} is similar
+to @code{chain_next}, but can be used for circular single linked lists.
 
 @findex reorder
 @item reorder ("@var{function name}")
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 027b1692bd9..0391ec86b7d 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -1201,7 +1201,8 @@ powerpc-linux for powerpc64-linux, only generates 32-bit code.  This
 option enables the 32-bit target to be a bi-arch compiler, which is
 useful when you want a bi-arch compiler that defaults to 32-bit, and
 you are building a bi-arch or multi-arch binutils in a combined tree.
-Currently, this option only affects powerpc-linux and x86-linux.
+Currently, this option only affects sparc-linux, powerpc-linux and
+x86-linux.
 
 @item --enable-secureplt
 This option enables @option{-msecure-plt} by default for powerpc-linux.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 59b7c822d23..c9fa4584f1c 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -164,7 +164,7 @@ in the following sections.
 @xref{Overall Options,,Options Controlling the Kind of Output}.
 @gccoptlist{-c  -S  -E  -o @var{file}  -combine  -pipe  -pass-exit-codes  @gol
 -x @var{language}  -v  -###  --help@r{[}=@var{class}@r{]}  --target-help  @gol
---version @@@var{file}}
+--version -wrapper@@@var{file}}
 
 @item C Language Options
 @xref{C Dialect Options,,Options Controlling C Dialect}.
@@ -292,7 +292,6 @@ Objective-C and Objective-C++ Dialects}.
 -fdump-tree-nrv -fdump-tree-vect @gol
 -fdump-tree-sink @gol
 -fdump-tree-sra@r{[}-@var{n}@r{]} @gol
--fdump-tree-salias @gol
 -fdump-tree-fre@r{[}-@var{n}@r{]} @gol
 -fdump-tree-vrp@r{[}-@var{n}@r{]} @gol
 -ftree-vectorizer-verbose=@var{n} @gol
@@ -357,7 +356,7 @@ Objective-C and Objective-C++ Dialects}.
 -ftree-dominator-opts -ftree-dse -ftree-fre -ftree-loop-im @gol
 -ftree-loop-distribution @gol
 -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol
--ftree-parallelize-loops=@var{n} -ftree-pre -ftree-reassoc -ftree-salias @gol
+-ftree-parallelize-loops=@var{n} -ftree-pre -ftree-reassoc @gol
 -ftree-sink -ftree-sra -ftree-store-ccp -ftree-ter @gol
 -ftree-vect-loop-version -ftree-vectorize -ftree-vrp -funit-at-a-time @gol
 -funroll-all-loops -funroll-loops -funsafe-loop-optimizations @gol
@@ -1251,6 +1250,19 @@ diff /tmp/O2-opts /tmp/O3-opts | grep enabled
 @opindex version
 Display the version number and copyrights of the invoked GCC@.
 
+@item -wrapper
+@opindex wrapper
+Invoke all subcommands under a wrapper program. It takes a single
+comma separated list as an argument, which will be used to invoke
+the wrapper:
+
+@smallexample
+gcc -c t.c -wrapper gdb,--args
+@end smallexample
+
+This will invoke all subprograms of gcc under "gdb --args",
+thus cc1 invocation will be "gdb --args cc1 ...".
+
 @include @value{srcdir}/../libiberty/at-file.texi
 @end table
 
@@ -3539,7 +3551,14 @@ Warn whenever an object of larger than @var{len} bytes is defined.
 
 @item -Wframe-larger-than=@var{len}
 @opindex Wframe-larger-than
-Warn whenever the size of a function frame is larger than @var{len} bytes.
+Warn if the size of a function frame is larger than @var{len} bytes.
+The computation done to determine the stack frame size is approximate
+and not conservative.
+The actual requirements may be somewhat greater than @var{len}
+even if you do not get a warning.  In addition, any space allocated
+via @code{alloca}, variable-length arrays, or related constructs
+is not included by the compiler when determining
+whether or not to issue a warning.
 
 @item -Wunsafe-loop-optimizations
 @opindex Wunsafe-loop-optimizations
@@ -4786,11 +4805,6 @@ appending @file{.ch} to the source file name.
 Dump SSA related information to a file.  The file name is made by appending
 @file{.ssa} to the source file name.
 
-@item salias
-@opindex fdump-tree-salias
-Dump structure aliasing variable information to a file.  This file name
-is made by appending @file{.salias} to the source file name.
-
 @item alias
 @opindex fdump-tree-alias
 Dump aliasing information for each function.  The file name is made by
@@ -5774,11 +5788,6 @@ Perform copy propagation on trees.  This pass eliminates unnecessary
 copy operations.  This flag is enabled by default at @option{-O} and
 higher.
 
-@item -ftree-salias
-@opindex ftree-salias
-Perform structural alias analysis on trees.  This flag
-is enabled by default at @option{-O} and higher.
-
 @item -fipa-pure-const
 @opindex fipa-pure-const
 Discover which functions are pure or constant.
@@ -6782,15 +6791,6 @@ In each case, the @var{value} is an integer.  The allowable choices for
 @var{name} are given in the following table:
 
 @table @gcctabopt
-@item salias-max-implicit-fields
-The maximum number of fields in a variable without direct
-structure accesses for which structure aliasing will consider trying
-to track each field.  The default is 5
-
-@item salias-max-array-elements
-The maximum number of elements an array can have and its elements
-still be tracked individually by structure aliasing. The default is 4
-
 @item sra-max-structure-size
 The maximum structure size, in bytes, at which the scalar replacement
 of aggregates (SRA) optimization will perform block copies.  The
@@ -7209,10 +7209,6 @@ The maximum number of memory locations cselib should take into account.
 Increasing values mean more aggressive optimization, making the compile time
 increase with probably slightly better performance.  The default value is 500.
 
-@item max-flow-memory-locations
-Similar as @option{max-cselib-memory-locations} but for dataflow liveness.
-The default value is 100.
-
 @item reorder-blocks-duplicate
 @itemx reorder-blocks-duplicate-feedback
 
diff --git a/gcc/doc/rtl.texi b/gcc/doc/rtl.texi
index e99b381a9ae..d698ceede61 100644
--- a/gcc/doc/rtl.texi
+++ b/gcc/doc/rtl.texi
@@ -559,13 +559,36 @@ In either case GCC assumes these addresses can be addressed directly,
 perhaps with the help of base registers.
 Stored in the @code{unchanging} field and printed as @samp{/u}.
 
-@findex CONST_OR_PURE_CALL_P
+@findex RTL_CONST_CALL_P
 @cindex @code{call_insn} and @samp{/u}
 @cindex @code{unchanging}, in @code{call_insn}
-@item CONST_OR_PURE_CALL_P (@var{x})
-In a @code{call_insn}, @code{note}, or an @code{expr_list} for notes,
-indicates that the insn represents a call to a const or pure function.
-Stored in the @code{unchanging} field and printed as @samp{/u}.
+@item RTLCONST_OR_PURE_CALL_P (@var{x})
+In a @code{call_insn} indicates that the insn represents a call to a
+const function.  Stored in the @code{unchanging} field and printed as
+@samp{/u}.
+
+@findex RTL_PURE_CALL_P
+@cindex @code{call_insn} and @samp{/i}
+@cindex @code{return_val}, in @code{call_insn}
+@item RTLCONST_OR_PURE_CALL_P (@var{x})
+In a @code{call_insn} indicates that the insn represents a call to a
+pure function.  Stored in the @code{return_val} field and printed as
+@samp{/i}.
+
+@findex RTL_CONST_OR_PURE_CALL_P
+@cindex @code{call_insn} and @samp{/u} or @samp{/i}
+@item RTL_CONST_OR_PURE_CALL_P (@var{x})
+In a @code{call_insn}, true if @code{RTL_CONST_CALL_P} or
+@code{RTL_PURE_CALL_P} is true.
+
+@findex RTL_LOOPING_CONST_OR_PURE_CALL_P
+@cindex @code{call_insn} and @samp{/c}
+@cindex @code{call}, in @code{call_insn}
+@item RTL_LOOPING_CONST_OR_PURE_CALL_P (@var{x})
+In a @code{call_insn} indicates that the insn represents a possibly
+infinite looping call to a const or pure function.  Stored in the
+@code{call} field and printed as @samp{/c}.  Only true if one of
+@code{RTL_CONST_CALL_P} or @code{RTL_PURE_CALL_P} is true.
 
 @findex INSN_ANNULLED_BRANCH_P
 @cindex @code{jump_insn} and @samp{/u}
@@ -869,6 +892,9 @@ These are the fields to which the above macros refer:
 @item call
 In a @code{mem}, 1 means that the memory reference will not trap.
 
+In a @code{call}, 1 means that this pure or const call may possibly
+infinite loop.
+
 In an RTL dump, this flag is represented as @samp{/c}.
 
 @findex frame_related
@@ -938,6 +964,8 @@ known not to be a member of a structure, union, or array.
 
 In @code{symbol_ref} expressions, 1 means the referenced symbol is weak.
 
+In @code{call} expressions, 1 means the call is pure.
+
 In an RTL dump, this flag is represented as @samp{/i}.
 
 @findex jump
@@ -967,8 +995,8 @@ instruction, 1 means an annulling branch should be used.
 In a @code{symbol_ref} expression, 1 means that this symbol addresses
 something in the per-function constant pool.
 
-In a @code{call_insn}, @code{note}, or an @code{expr_list} of notes,
-1 means that this instruction is a call to a const or pure function.
+In a @code{call_insn} 1 means that this instruction is a call to a const
+function.
 
 In an RTL dump, this flag is represented as @samp{/u}.
 
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 869bb1b6a0a..91448a71a42 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -50,6 +50,7 @@ through the macros defined in the @file{.h} file.
 * Floating Point::      Handling floating point for cross-compilers.
 * Mode Switching::      Insertion of mode-switching instructions.
 * Target Attributes::   Defining target-specific uses of @code{__attribute__}.
+* Emulated TLS::        Emulated TLS support.
 * MIPS Coprocessors::   MIPS coprocessor support and how to customize it.
 * PCH Target::          Validity checking for precompiled headers.
 * C++ ABI::             Controlling C++ ABI changes.
@@ -3170,7 +3171,7 @@ frame, or the frame pointer of the @var{count} @minus{} 1 frame if
 @code{RETURN_ADDR_IN_PREVIOUS_FRAME} is defined.
 
 The value of the expression must always be the correct address when
-@var{count} is zero, but may be @code{NULL_RTX} if there is not way to
+@var{count} is zero, but may be @code{NULL_RTX} if there is no way to
 determine the return address of other frames.
 @end defmac
 
@@ -3818,9 +3819,11 @@ which.
 @c above is overfull.  not sure what to do.  --mew 5feb93  did
 @c something, not sure if it looks good.  --mew 10feb93
 
-@defmac OUTGOING_REG_PARM_STACK_SPACE
-Define this to a nonzero value if it is the responsibility of the caller
-to allocate the area reserved for arguments passed in registers.
+@defmac OUTGOING_REG_PARM_STACK_SPACE (@var{fntype})
+Define this to a nonzero value if it is the responsibility of the
+caller to allocate the area reserved for arguments passed in registers
+when calling a function of @var{fntype}.  @var{fntype} may be NULL
+if the function called is a library function.
 
 If @code{ACCUMULATE_OUTGOING_ARGS} is defined, this macro controls
 whether the space for these arguments counts in the value of
@@ -9192,6 +9195,84 @@ attributes, @code{false} otherwise.  By default, if a function has a
 target specific attribute attached to it, it will not be inlined.
 @end deftypefn
 
+@node Emulated TLS
+@section Emulating TLS
+@cindex Emulated TLS
+
+For targets whose psABI does not provide Thread Local Storage via
+specific relocations and instruction sequences, an emulation layer is
+used.  A set of target hooks allows this emulation layer to be
+configured for the requirements of a particular target.  For instance
+the psABI may infact specify TLS support in terms of an emulation
+layer.
+
+The emulation layer works by creating a control object for every TLS
+object.  To access the TLS object, a lookup function is provided
+which, when given the address of the control object, will return the
+address of the current thread's instance of the TLS object.
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_GET_ADDRESS
+Contains the name of the helper function that uses a TLS control
+object to locate a TLS instance.  The default causes libgcc's
+emulated TLS helper function to be used.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_REGISTER_COMMON
+Contains the name of the helper function that should be used at
+program startup to register TLS objects that are implicitly
+initialized to zero.  If this is @code{NULL}, all TLS objects will
+have explicit initializers.  The default causes libgcc's emulated TLS
+registration function to be used.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_VAR_SECTION
+Contains the name of the section in which TLS control variables should
+be placed.  The default of @code{NULL} allows these to be placed in
+any section.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_TMPL_SECTION
+Contains the name of the section in which TLS initializers should be
+placed.  The default of @code{NULL} allows these to be placed in any
+section.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_VAR_PREFIX
+Contains the prefix to be prepended to TLS control variable names.
+The default of @code{NULL} uses a target-specific prefix.
+@end deftypevr
+
+@deftypevr {Target Hook} {const char *} TARGET_EMUTLS_TMPL_PREFIX
+Contains the prefix to be prepended to TLS initializer objects.  The
+default of @code{NULL} uses a target-specific prefix.
+@end deftypevr
+
+@deftypefn {Target Hook} tree TARGET_EMUTLS_VAR_FIELDS (tree @var{type}, tree *@var{name})
+Specifies a function that generates the FIELD_DECLs for a TLS control
+object type.  @var{type} is the RECORD_TYPE the fields are for and
+@var{name} should be filled with the structure tag, if the default of
+@code{__emutls_object} is unsuitable.  The default creates a type suitable
+for libgcc's emulated TLS function.
+@end deftypefn
+
+@deftypefn {Target Hook} tree TARGET_EMUTLS_VAR_INIT (tree @var{var}, tree @var{decl}, tree @var{tmpl_addr})
+Specifies a function that generates the CONSTRUCTOR to initialize a
+TLS control object.  @var{var} is the TLS control object, @var{decl}
+is the TLS object and @var{tmpl_addr} is the address of the
+initializer.  The default initializes libgcc's emulated TLS control object.
+@end deftypefn
+
+@deftypevr {Target Hook} {bool} TARGET_EMUTLS_VAR_ALIGN_FIXED
+Specifies whether the alignment of TLS control variable objects is
+fixed and should not be increased as some backends may do to optimize
+single objects.  The default is false.
+@end deftypevr
+
+@deftypevr {Target Hook} {bool} TARGET_EMUTLS_DEBUG_FORM_TLS_ADDRESS
+Specifies whether a DWARF @code{DW_OP_form_tls_address} location descriptor
+may be used to describe emulated TLS control objects.
+@end deftypevr
+
 @node MIPS Coprocessors
 @section Defining coprocessor specifics for MIPS targets.
 @cindex MIPS coprocessor-definition macros