diff options
author | Chao-ying Fu <fu@mips.com> | 2007-05-08 22:51:14 +0000 |
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committer | Chao-ying Fu <fu@mips.com> | 2007-05-08 22:51:14 +0000 |
commit | c411293659422015dd92fb5266780c43c535b1e8 (patch) | |
tree | 4f99bbafe98aff39b7f5885c910746129d4e95e8 /gcc/doc | |
parent | 39046fb71ba87bf9690e343ad135c88143ae5087 (diff) |
* doc/md.texi (msub@var{m}@var{n}4, usub@var{m}@var{n}4): Document.
* optabs.h (OTI_smsub_widen, OTI_umsub_widen): New optab_indexes.
(smsub_widen_optab, umsub_widen_optab): Define.
* optabs.c (init_optabs): Initialize smsub_widen_optab and
umsub_widen_optab.
* genopinit.c (optabs): Fill in smsub_widen_optab and
umsub_widen_optab.
* expr.c (expand_expr_real_1): Try to use smsub_widen_optab
and umsub_widen_optab to implement multiply-subtract sequences.
* config/mips/mips.md (*msac<u>_di): Rename to...
(<u>msubsidi4): ...this. Extend condition to include
GENERATE_MADD_MSUB and TARGET_DSPR2. Change the constraint
of operand 0 to "ka" and use the three-operand form of msub<u>
for TARGET_DSPR2.
* config/mips/mips-dspr2.md (mips_msub, mips_msubu): Convert
to define_expands.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@124558 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
-rw-r--r-- | gcc/doc/md.texi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index 56cc60f2e1e..53c5769f788 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3687,6 +3687,25 @@ These instructions are not allowed to @code{FAIL}. Like @code{madd@var{m}@var{n}4}, but zero-extend the multiplication operands instead of sign-extending them. +@cindex @code{msub@var{m}@var{n}4} instruction pattern +@item @samp{msub@var{m}@var{n}4} +Multiply operands 1 and 2, sign-extend them to mode @var{n}, subtract the +result from operand 3, and store the result in operand 0. Operands 1 and 2 +have mode @var{m} and operands 0 and 3 have mode @var{n}. +Both modes must be integer modes and @var{n} must be twice +the size of @var{m}. + +In other words, @code{msub@var{m}@var{n}4} is like +@code{mul@var{m}@var{n}3} except that it also subtracts the result +from operand 3. + +These instructions are not allowed to @code{FAIL}. + +@cindex @code{umsub@var{m}@var{n}4} instruction pattern +@item @samp{umsub@var{m}@var{n}4} +Like @code{msub@var{m}@var{n}4}, but zero-extend the multiplication +operands instead of sign-extending them. + @cindex @code{divmod@var{m}4} instruction pattern @item @samp{divmod@var{m}4} Signed division that produces both a quotient and a remainder. |