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| author | Edward Smith-Rowland <3dw4rd@verizon.net> | 2017-08-12 19:09:40 +0000 |
|---|---|---|
| committer | Edward Smith-Rowland <3dw4rd@verizon.net> | 2017-08-12 19:09:40 +0000 |
| commit | 40fa8ee5f9da161462fde48776ef6262366f9a13 (patch) | |
| tree | d3c3bf913950c59ef83b8d9ede50b0978ec0c12f /gcc/testsuite/gcc.target/aarch64/int_mov_immediate_1.c | |
| parent | 3acaf2e51caf356a9afc763cfd70b91d1ab094b5 (diff) | |
Merged revisions r232323 through r251067 to the branchtr29124
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/tr29124@251068 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/aarch64/int_mov_immediate_1.c')
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/int_mov_immediate_1.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/int_mov_immediate_1.c b/gcc/testsuite/gcc.target/aarch64/int_mov_immediate_1.c new file mode 100644 index 00000000000..6ac9065037f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/int_mov_immediate_1.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O3" } */ + +long long f1(void) +{ + return 0xffff6666; +} + +int f3(void) +{ + return 0xffff6666; +} + + +long f2(void) +{ + return 0x11110000ffff6666; +} + +long f4(void) +{ + return 0x11110001ffff6666; +} + +long f5(void) +{ + return 0x111100001ff6666; +} + +long f6(void) +{ + return 0x00001111ffff6666; +} + +long f7(void) +{ + return 0x000011116666ffff; +} + +long f8(void) +{ + return 0x0f0011116666ffff; +} + +/* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, -39322" 1 } } */ +/* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, 4294927974" 3 } } */ +/* { dg-final { scan-assembler-times "mov\tw\[0-9\]+, 1718026239" 1 } } */ +/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, -2576941057" 1 } } */ +/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, -39322" 1 } } */ +/* { dg-final { scan-assembler-times "mov\tx\[0-9\]+, 26214" 1 } } */ +/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0xf00, lsl 48" 1 } } */ +/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x1111, lsl 48" 2 } } */ +/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x1000, lsl 32" 1 } } */ +/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x1111, lsl 32" 3 } } */ +/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x111, lsl 48" 1 } } */ +/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x1ff, lsl 16" 1 } } */ +/* { dg-final { scan-assembler-times "movk\tx\[0-9\]+, 0x1, lsl 32" 1 } } */ + |