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| author | Eric Botcazou <ebotcazou@adacore.com> | 2015-12-04 14:52:09 +0000 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@adacore.com> | 2015-12-04 14:52:09 +0000 |
| commit | 62dd1863abd65ada3d0929db1789c617ff34e1a6 (patch) | |
| tree | 94204ba776de500b6dc0fc54682d443fd0755f6d /gcc/testsuite/gcc.target/s390/zvector/vec-splat-2.c | |
| parent | c672cad4aff4f9923eab0995cc327a0cb7fc8e2a (diff) | |
Merge from trunk @231250.scalar-storage-order
git-svn-id: https://gcc.gnu.org/svn/gcc/branches/scalar-storage-order@231274 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite/gcc.target/s390/zvector/vec-splat-2.c')
| -rw-r--r-- | gcc/testsuite/gcc.target/s390/zvector/vec-splat-2.c | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-splat-2.c b/gcc/testsuite/gcc.target/s390/zvector/vec-splat-2.c new file mode 100644 index 00000000000..7ad090b2d5e --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/zvector/vec-splat-2.c @@ -0,0 +1,42 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=z13 -mzvector" } */ + +#include <vecintrin.h> + +vector signed char v16qi; +vector short v8hi; +vector int v4si; +vector long long v2di; + +vector unsigned char uv16qi; +vector unsigned short uv8hi; +vector unsigned int uv4si; +vector unsigned long long uv2di; + +int +foo () +{ + v16qi = vec_splat_s8 (-112); + uv16qi = vec_splat_u8 (215); + + v8hi = vec_splat_s16 (-32000); + uv8hi = vec_splat_u16 (64000); + + v4si = vec_splat_s32 (-32000); + uv4si = vec_splat_u32 (64000); + + v2di = vec_splat_s64 (-32000); + uv2di = vec_splat_u64 (64000); +} + +/* { dg-final { scan-assembler-times "vrepib\t%v.*,-112" 1 } } */ +/* { dg-final { scan-assembler-times "vrepib\t%v.*,-41" 1 } } */ + +/* { dg-final { scan-assembler-times "vrepih\t%v.*,-32000" 1 } } */ +/* { dg-final { scan-assembler-times "vrepih\t%v.*,-1536" 1 } } */ + +/* { dg-final { scan-assembler-times "vrepif\t%v.*,-32000" 1 } } */ +/* { dg-final { scan-assembler-times "vrepif\t%v.*,-1536" 1 } } */ + +/* { dg-final { scan-assembler-times "vrepig\t%v.*,-32000" 1 } } */ +/* { dg-final { scan-assembler-times "vrepig\t%v.*,-1536" 1 } } */ |