diff options
| author | Richard Earnshaw <rearnsha@arm.com> | 2019-10-18 19:03:11 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2019-10-18 19:03:11 +0000 |
| commit | 471605b885b8dc9682061b6d660364548086de67 (patch) | |
| tree | f7fb49934234207a982110dc635c074c39ae023e /gcc/testsuite | |
| parent | 42c12291104cc2664cbc4bd43b4e88cf10167dff (diff) | |
[arm] Implement negscc using SBC when appropriate.
When the carry flag is appropriately set by a comprison, negscc
patterns can expand into a simple SBC of a register with itself. This
means we can convert two conditional instructions into a single
non-conditional instruction. Furthermore, in Thumb2 we can avoid the
need for an IT instruction as well. This patch also fixes the remaining
testcase that we initially XFAILed in the first patch of this series.
gcc:
* config/arm/arm.md (negscc_borrow): New pattern.
(mov_negscc): Don't split if the insn would match negscc_borrow.
* config/arm/thumb2.md (thumb2_mov_negscc): Likewise.
(thumb2_mov_negscc_strict_it): Likewise.
testsuite:
* gcc.target/arm/negdi-3.c: Remove XFAIL markers.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@277175 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/negdi-3.c | 8 |
2 files changed, 8 insertions, 4 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ae9d216e1e3..d5d934d1b86 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2019-10-18 Richard Earnshaw <rearnsha@arm.com> + * gcc.target/arm/negdi-3.c: Remove XFAIL markers. + +2019-10-18 Richard Earnshaw <rearnsha@arm.com> + * gcc.target/arm/pr53447-1.c: Remove XFAIL. * gcc.target/arm/pr53447-3.c: Remove XFAIL. * gcc.target/arm/pr53447-4.c: Remove XFAIL. diff --git a/gcc/testsuite/gcc.target/arm/negdi-3.c b/gcc/testsuite/gcc.target/arm/negdi-3.c index 3f6f2d1c2bb..76ddf49fc0d 100644 --- a/gcc/testsuite/gcc.target/arm/negdi-3.c +++ b/gcc/testsuite/gcc.target/arm/negdi-3.c @@ -11,7 +11,7 @@ Expected output: rsbs r0, r0, #0 sbc r1, r1, r1 */ -/* { dg-final { scan-assembler-times "rsb" 1 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times "sbc" 1 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times "mov" 0 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times "rsc" 0 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times "rsb" 1 } } */ +/* { dg-final { scan-assembler-times "sbc" 1 } } */ +/* { dg-final { scan-assembler-times "mov" 0 } } */ +/* { dg-final { scan-assembler-times "rsc" 0 } } */ |