diff options
| author | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2019-10-24 13:34:54 +0000 |
|---|---|---|
| committer | Jozef Lawrynowicz <jozef.l@mittosystems.com> | 2019-10-24 13:34:54 +0000 |
| commit | 6eef08622a20311db99da73fe910c0895d9619cb (patch) | |
| tree | fec8c1d2bee587326f0b7a7a35bb9c5849a0469f /gcc/testsuite | |
| parent | f5ef46c9c926ccd9ba7e93f362e91f7e78fb1ce4 (diff) | |
MSP430: Tweaks to generation of 430X instructions
gcc/ChangeLog:
2019-10-24 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/constraints.md: Allow post_inc for "Ya" constraint.
* config/msp430/msp430.md (430x_shift_left): Use RLAM when the constant
shift amount is between 1 and 4.
(430x_arithmetic_shift_right): Use RRAM when the constant shift amount
is between 1 and 4.
gcc/testsuite/ChangeLog:
2019-10-24 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc.target/msp430/emulate-slli.c: Skip for -mcpu=msp430.
Add shift by a constant 5 bits.
Update scan-assembler directives.
* gcc.target/msp430/emulate-srai.c: Likewise.
* gcc.target/msp430/emulate-srli.c: Skip for -mcpu=msp430.
git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@277394 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/testsuite')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/msp430/emulate-slli.c | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/msp430/emulate-srai.c | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/msp430/emulate-srli.c | 1 |
4 files changed, 19 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2742e10bb6f..ee43703ea54 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2019-10-24 Jozef Lawrynowicz <jozef.l@mittosystems.com> + + * gcc.target/msp430/emulate-slli.c: Skip for -mcpu=msp430. + Add shift by a constant 5 bits. + Update scan-assembler directives. + * gcc.target/msp430/emulate-srai.c: Likewise. + * gcc.target/msp430/emulate-srli.c: Skip for -mcpu=msp430. + 2019-10-24 Richard Biener <rguenther@suse.de> PR tree-optimization/92205 diff --git a/gcc/testsuite/gcc.target/msp430/emulate-slli.c b/gcc/testsuite/gcc.target/msp430/emulate-slli.c index 0ed09d55d8c..1c8459cfec5 100644 --- a/gcc/testsuite/gcc.target/msp430/emulate-slli.c +++ b/gcc/testsuite/gcc.target/msp430/emulate-slli.c @@ -1,15 +1,19 @@ /* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-mcpu=msp430" } { "" } } */ /* { dg-options "-Os" } */ /* { dg-final { scan-assembler-not "mspabi_slli" } } */ -/* { dg-final { scan-assembler "rlax" } } */ +/* { dg-final { scan-assembler "RLAM.W\t#4" } } */ +/* { dg-final { scan-assembler "RPT\t#5 \{ RLAX.W" } } */ /* Ensure that HImode shifts with source operand in memory are emulated with a rotate instructions. */ int a; +int b; void foo (void) { a = a << 4; + b = b << 5; } diff --git a/gcc/testsuite/gcc.target/msp430/emulate-srai.c b/gcc/testsuite/gcc.target/msp430/emulate-srai.c index 66291717a02..f3f6dae94ea 100644 --- a/gcc/testsuite/gcc.target/msp430/emulate-srai.c +++ b/gcc/testsuite/gcc.target/msp430/emulate-srai.c @@ -1,15 +1,19 @@ /* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-mcpu=msp430" } { "" } } */ /* { dg-options "-Os" } */ /* { dg-final { scan-assembler-not "mspabi_srai" } } */ -/* { dg-final { scan-assembler "rrax" } } */ +/* { dg-final { scan-assembler "RRAM.W\t#4" } } */ +/* { dg-final { scan-assembler "RPT\t#5 \{ RRAX.W" } } */ /* Ensure that HImode shifts with source operand in memory are emulated with a rotate instructions. */ int a; +int b; void foo (void) { a = a >> 4; + b = b >> 5; } diff --git a/gcc/testsuite/gcc.target/msp430/emulate-srli.c b/gcc/testsuite/gcc.target/msp430/emulate-srli.c index c10f30b2779..f870d13f86b 100644 --- a/gcc/testsuite/gcc.target/msp430/emulate-srli.c +++ b/gcc/testsuite/gcc.target/msp430/emulate-srli.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "" { *-*-* } { "-mcpu=msp430" } { "" } } */ /* { dg-options "-Os" } */ /* { dg-final { scan-assembler-not "mspabi_srli" } } */ /* { dg-final { scan-assembler "rrum" } } */ |