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authorRainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>2011-06-03 18:30:39 +0000
committerRainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>2011-06-03 18:30:39 +0000
commita44f7342e547c42ba9db8057e93ad6df02ce08fb (patch)
treef430fed8dbe1ebf2c96bc2f167ea68cb1e504948 /libgcc/config/pa
parent264833b3c430f452c3590e5855b887365c7611d5 (diff)
gcc:
* config/alpha/linux.h (MD_UNWIND_SUPPORT): Remove. * config/alpha/osf5.h (MD_UNWIND_SUPPORT): Remove. * config/alpha/vms.h (MD_UNWIND_SUPPORT): Remove. * config/bfin/linux.h (MD_UNWIND_SUPPORT): Remove. * config/bfin/uclinux.h (MD_UNWIND_SUPPORT): Remove. * config/i386/linux.h (MD_UNWIND_SUPPORT): Remove. * config/i386/linux64.h (MD_UNWIND_SUPPORT): Remove. * config/i386/sol2.h (MD_UNWIND_SUPPORT): Remove. * config/i386/mingw32.h (MD_UNWIND_SUPPORT): Remove. * config/ia64/linux.h (MD_UNWIND_SUPPORT): Remove. * config/ia64/vms.h (MD_UNWIND_SUPPORT): Remove. * config/m68k/linux.h (MD_UNWIND_SUPPORT): Remove. * config/mips/linux.h (MD_UNWIND_SUPPORT): Remove. * config/pa/pa-hpux.h (MD_UNWIND_SUPPORT): Remove. * config/pa/pa32-linux.h (MD_UNWIND_SUPPORT): Remove. * config/rs6000/darwin.h (MD_UNWIND_SUPPORT): Remove. * config/rs6000/linux.h (MD_UNWIND_SUPPORT): Remove. * config/rs6000/linux64.h (MD_UNWIND_SUPPORT): Remove. * config/s390/linux.h (MD_UNWIND_SUPPORT): Remove. * config/s390/tpf.h (MD_UNWIND_SUPPORT): Remove. * config/sh/linux.h (MD_UNWIND_SUPPORT): Remove. * config/sparc/linux.h (MD_UNWIND_SUPPORT): Remove. * config/sparc/linux64.h (MD_UNWIND_SUPPORT): Remove. * config/sparc/sol2.h (MD_UNWIND_SUPPORT): Remove. * config/xtensa/linux.h (MD_UNWIND_SUPPORT): Remove. * config/alpha/linux-unwind.h: Move to ../libgcc/config/alpha. * config/alpha/osf5-unwind.h: Move to ../libgcc/config/alpha. * config/alpha/vms-unwind.h: Move to ../libgcc/config/alpha. * config/bfin/linux-unwind.h: Move to ../libgcc/config/bfin. * config/i386/linux-unwind.h: Move to ../libgcc/config/i386. * config/i386/sol2-unwind.h: Move to ../libgcc/config/i386. * config/i386/w32-unwind.h: Move to ../libgcc/config/i386. * config/ia64/linux-unwind.h: Move to ../libgcc/config/ia64. * config/ia64/vms-unwind.h: Move to ../libgcc/config/ia64. * config/m68k/linux-unwind.h: Move to ../libgcc/config/m68k. * config/mips/linux-unwind.h: Move to ../libgcc/config/mips. * config/pa/hpux-unwind.h: Move to ../libgcc/config/pa. * config/pa/linux-unwind.h: Move to ../libgcc/config/pa. * config/rs6000/darwin-unwind.h: Move to ../libgcc/config/rs6000. * config/rs6000/linux-unwind.h: Move to ../libgcc/config/rs6000. * config/s390/linux-unwind.h: Move to ../libgcc/config/s390. * config/s390/tpf-unwind.h: Move to ../libgcc/config/s390. * config/sh/linux-unwind.h: Move to ../libgcc/config/sh. * config/sparc/linux-unwind.h: Move to ../libgcc/config/sparc. * config/sparc/sol2-unwind.h: Move to ../libgcc/config/sparc. * config/xtensa/linux-unwind.h: Move to ../libgcc/config/xtensa. * config/darwin9.h (DARWIN_LIBSYSTEM_HAS_UNWIND): Remove. * system.h (MD_UNWIND_SUPPORT): Poison. * doc/tm.texi.in (Exception Handling, MD_UNWIND_SUPPORT): Remove. * doc/tm.texi: Regenerate. * unwind-dw2.c: Include md-unwind-support.h instead of MD_UNWIND_SUPPORT. * config/ia64/unwind-ia64.c: Likewise. * config/xtensa/unwind-dw2-xtensa.c: Likewise. libgcc: * config/alpha/linux-unwind.h: Move from ../gcc/config/alpha. * config/alpha/osf5-unwind.h: Move from ../gcc/config/alpha. * config/alpha/vms-unwind.h: Move from ../gcc/config/alpha. * config/bfin/linux-unwind.h: Move from ../gcc/config/bfin. * config/i386/linux-unwind.h: Move from ../gcc/config/i386. * config/i386/sol2-unwind.h: Move from ../gcc/config/i386. * config/i386/w32-unwind.h: Move from ../gcc/config/i386. Wrap in !__MINGW64__. * config/ia64/linux-unwind.h: Move from ../gcc/config/ia64. * config/ia64/vms-unwind.h: Move from ../gcc/config/ia64. * config/m68k/linux-unwind.h: Move from ../gcc/config/m68k. * config/mips/linux-unwind.h: Move from ../gcc/config/mips. * config/pa/hpux-unwind.h: Move from ../gcc/config/pa. * config/pa/linux-unwind.h: Move from ../gcc/config/pa. * config/rs6000/darwin-unwind.h: Move from ../gcc/config/rs6000. Wrap in !__LP64__. * config/rs6000/linux-unwind.h: Move from ../gcc/config/rs6000. * config/s390/linux-unwind.h: Move from ../gcc/config/s390. * config/s390/tpf-unwind.h: Move from ../gcc/config/s390. * config/sh/linux-unwind.h: Move from ../gcc/config/sh. * config/sparc/linux-unwind.h: Move from ../gcc/config/sparc. * config/sparc/sol2-unwind.h: Move from ../gcc/config/sparc. * config/xtensa/linux-unwind.h: Move from ../gcc/config/xtensa. * config/no-unwind.h: New file. * config.host (md_unwind_header): Document. Define. (alpha*-*-linux*, alpha*-dec-osf5.1*, alpha64-dec-*vms*, alpha*-dec-*vms*, bfin*-uclinux*, bfin*-linux-uclibc*, hppa*-*-linux*, hppa[12]*-*-hpux10*, hppa*64*-*-hpux11*, hppa[12]*-*-hpux11*): Set md_unwind_header. (i[34567]86-*-linux*): Handle i[34567]86-*-kopensolaris*-gnu. Set md_unwind_header. (x86_64-*-linux*, i[34567]86-*-solaris2*): Set md_unwind_header. (i[34567]86-*-cygwin*): Split from i[34567]86-*-mingw*. (i[34567]86-*-mingw*, ia64*-*-linux*, ia64-hp-*vms*, m68k-*-uclinux*, m68k-*-linux*, mips64*-*-linux*, mips*-*-linux*, powerpc-*-darwin*, powerpc-*-linux*, s390-*-linux*, s390x-*-linux*, s390x-ibm-tpf*, sh*-*-linux*, sparc-*-linux*, sparc*-*-solaris2*, sparc64-*-linux*, xtensa*-*-linux*): Set md_unwind_header. * configure.ac: Link md-unwind-support.h to $md_unwind_header. * configure: Regenerate. git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@174613 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libgcc/config/pa')
-rw-r--r--libgcc/config/pa/hpux-unwind.h361
-rw-r--r--libgcc/config/pa/linux-unwind.h141
2 files changed, 502 insertions, 0 deletions
diff --git a/libgcc/config/pa/hpux-unwind.h b/libgcc/config/pa/hpux-unwind.h
new file mode 100644
index 00000000000..92061ec3677
--- /dev/null
+++ b/libgcc/config/pa/hpux-unwind.h
@@ -0,0 +1,361 @@
+/* DWARF2 EH unwinding support for PA HP-UX.
+ Copyright (C) 2005, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+/* Do code reading to identify a signal frame, and set the frame
+ state data appropriately. See unwind-dw2.c for the structs. */
+
+/* Don't use this if inhibit_libc is set.
+ The build for this target will fail trying to include missing headers. */
+#ifndef inhibit_libc
+#include <signal.h>
+#include <sys/ucontext.h>
+#include <unistd.h>
+
+/* FIXME: We currently ignore the high halves of general, space and
+ control registers on PA 2.0 machines for applications using the
+ 32-bit runtime. We don't restore space registers or the floating
+ point status registers. */
+
+#define MD_FALLBACK_FRAME_STATE_FOR pa_fallback_frame_state
+
+/* HP-UX 10.X doesn't define GetSSReg. */
+#ifndef GetSSReg
+#define GetSSReg(ssp, ss_reg) \
+ ((UseWideRegs (ssp)) \
+ ? (ssp)->ss_wide.ss_32.ss_reg ## _lo \
+ : (ssp)->ss_narrow.ss_reg)
+#endif
+
+#if TARGET_64BIT
+#define GetSSRegAddr(ssp, ss_reg) ((long) &((ssp)->ss_wide.ss_64.ss_reg))
+#else
+#define GetSSRegAddr(ssp, ss_reg) \
+ ((UseWideRegs (ssp)) \
+ ? (long) &((ssp)->ss_wide.ss_32.ss_reg ## _lo) \
+ : (long) &((ssp)->ss_narrow.ss_reg))
+#endif
+
+#define UPDATE_FS_FOR_SAR(FS, N) \
+ (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \
+ (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_cr11) - new_cfa
+
+#define UPDATE_FS_FOR_GR(FS, GRN, N) \
+ (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \
+ (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_gr##GRN) - new_cfa
+
+#define UPDATE_FS_FOR_FR(FS, FRN, N) \
+ (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \
+ (FS)->regs.reg[N].loc.offset = (long) &(mc->ss_fr##FRN) - new_cfa;
+
+#define UPDATE_FS_FOR_PC(FS, N) \
+ (FS)->regs.reg[N].how = REG_SAVED_OFFSET; \
+ (FS)->regs.reg[N].loc.offset = GetSSRegAddr (mc, ss_pcoq_head) - new_cfa
+
+/* Extract bit field from word using HP's numbering (MSB = 0). */
+#define GET_FIELD(X, FROM, TO) \
+ ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
+
+static inline int
+sign_extend (int x, int len)
+{
+ int signbit = (1 << (len - 1));
+ int mask = (signbit << 1) - 1;
+ return ((x & mask) ^ signbit) - signbit;
+}
+
+/* Extract a 17-bit signed constant from branch instructions. */
+static inline int
+extract_17 (unsigned word)
+{
+ return sign_extend (GET_FIELD (word, 19, 28)
+ | GET_FIELD (word, 29, 29) << 10
+ | GET_FIELD (word, 11, 15) << 11
+ | (word & 0x1) << 16, 17);
+}
+
+/* Extract a 22-bit signed constant from branch instructions. */
+static inline int
+extract_22 (unsigned word)
+{
+ return sign_extend (GET_FIELD (word, 19, 28)
+ | GET_FIELD (word, 29, 29) << 10
+ | GET_FIELD (word, 11, 15) << 11
+ | GET_FIELD (word, 6, 10) << 16
+ | (word & 0x1) << 21, 22);
+}
+
+static _Unwind_Reason_Code
+pa_fallback_frame_state (struct _Unwind_Context *context,
+ _Unwind_FrameState *fs)
+{
+ static long cpu;
+ unsigned int *pc = (unsigned int *) context->ra;
+
+ if (pc == 0)
+ return _URC_END_OF_STACK;
+
+ /* Check for relocation of the return value. */
+ if (!TARGET_64BIT
+ && *(pc + 0) == 0x2fd01224 /* fstd,ma fr4,8(sp) */
+ && *(pc + 1) == 0x0fd9109d /* ldw -4(sp),ret1 */
+ && *(pc + 2) == 0x0fd130bc) /* ldw,mb -8(sp),ret0 */
+ pc += 3;
+ else if (!TARGET_64BIT
+ && *(pc + 0) == 0x27d01224 /* fstw,ma fr4,8(sp) */
+ && *(pc + 1) == 0x0fd130bc) /* ldw,mb -8(sp),ret0 */
+ pc += 2;
+ else if (!TARGET_64BIT
+ && *(pc + 0) == 0x0fdc12b0 /* stw,ma ret0,8(sp) */
+ && *(pc + 1) == 0x0fdd1299 /* stw ret1,-4(sp) */
+ && *(pc + 2) == 0x2fd13024) /* fldd,mb -8(sp),fr4 */
+ pc += 3;
+ else if (!TARGET_64BIT
+ && *(pc + 0) == 0x0fdc12b0 /* stw,ma ret0,8(sp) */
+ && *(pc + 1) == 0x27d13024) /* fldw,mb -8(sp),fr4 */
+ pc += 2;
+
+ /* Check if the return address points to an export stub (PA 1.1 or 2.0). */
+ if ((!TARGET_64BIT
+ && *(pc + 0) == 0x4bc23fd1 /* ldw -18(sp),rp */
+ && *(pc + 1) == 0x004010a1 /* ldsid (rp),r1 */
+ && *(pc + 2) == 0x00011820 /* mtsp r1,sr0 */
+ && *(pc + 3) == 0xe0400002) /* be,n 0(sr0,rp) */
+ ||
+ (!TARGET_64BIT
+ && *(pc + 0) == 0x4bc23fd1 /* ldw -18(sp),rp */
+ && *(pc + 1) == 0xe840d002)) /* bve,n (rp) */
+ {
+ fs->regs.cfa_how = CFA_REG_OFFSET;
+ fs->regs.cfa_reg = 30;
+ fs->regs.cfa_offset = 0;
+
+ fs->retaddr_column = 0;
+ fs->regs.reg[0].how = REG_SAVED_OFFSET;
+ fs->regs.reg[0].loc.offset = -24;
+
+ /* Update context to describe the stub frame. */
+ uw_update_context (context, fs);
+
+ /* Set up fs to describe the FDE for the caller of this stub. */
+ return uw_frame_state_for (context, fs);
+ }
+ /* Check if the return address points to a relocation stub. */
+ else if (!TARGET_64BIT
+ && *(pc + 0) == 0x0fd11082 /* ldw -8(sp),rp */
+ && (*(pc + 1) == 0xe840c002 /* bv,n r0(rp) */
+ || *(pc + 1) == 0xe840d002)) /* bve,n (rp) */
+ {
+ fs->regs.cfa_how = CFA_REG_OFFSET;
+ fs->regs.cfa_reg = 30;
+ fs->regs.cfa_offset = 0;
+
+ fs->retaddr_column = 0;
+ fs->regs.reg[0].how = REG_SAVED_OFFSET;
+ fs->regs.reg[0].loc.offset = -8;
+
+ /* Update context to describe the stub frame. */
+ uw_update_context (context, fs);
+
+ /* Set up fs to describe the FDE for the caller of this stub. */
+ return uw_frame_state_for (context, fs);
+ }
+
+ /* Check if the return address is an export stub as signal handlers
+ may return via an export stub. */
+ if (!TARGET_64BIT
+ && (*pc & 0xffe0e002) == 0xe8400000 /* bl x,r2 */
+ && *(pc + 1) == 0x08000240 /* nop */
+ && *(pc + 2) == 0x4bc23fd1 /* ldw -18(sp),rp */
+ && *(pc + 3) == 0x004010a1 /* ldsid (rp),r1 */
+ && *(pc + 4) == 0x00011820 /* mtsp r1,sr0 */
+ && *(pc + 5) == 0xe0400002) /* be,n 0(sr0,rp) */
+ /* Extract target address from PA 1.x 17-bit branch. */
+ pc += extract_17 (*pc) + 2;
+ else if (!TARGET_64BIT
+ && (*pc & 0xfc00e002) == 0xe800a000 /* b,l x,r2 */
+ && *(pc + 1) == 0x08000240 /* nop */
+ && *(pc + 2) == 0x4bc23fd1 /* ldw -18(sp),rp */
+ && *(pc + 3) == 0xe840d002) /* bve,n (rp) */
+ /* Extract target address from PA 2.0 22-bit branch. */
+ pc += extract_22 (*pc) + 2;
+
+ /* Now check if the return address is one of the signal handler
+ returns, _sigreturn or _sigsetreturn. */
+ if ((TARGET_64BIT
+ && *(pc + 0) == 0x53db3f51 /* ldd -58(sp),dp */
+ && *(pc + 8) == 0x34160116 /* ldi 8b,r22 */
+ && *(pc + 9) == 0x08360ac1 /* shladd,l r22,3,r1,r1 */
+ && *(pc + 10) == 0x0c2010c1 /* ldd 0(r1),r1 */
+ && *(pc + 11) == 0xe4202000) /* be,l 0(sr4,r1) */
+ ||
+ (TARGET_64BIT
+ && *(pc + 0) == 0x36dc0000 /* ldo 0(r22),ret0 */
+ && *(pc + 6) == 0x341601c0 /* ldi e0,r22 */
+ && *(pc + 7) == 0x08360ac1 /* shladd,l r22,3,r1,r1 */
+ && *(pc + 8) == 0x0c2010c1 /* ldd 0(r1),r1 */
+ && *(pc + 9) == 0xe4202000) /* be,l 0(sr4,r1) */
+ ||
+ (!TARGET_64BIT
+ && *(pc + 0) == 0x379a0000 /* ldo 0(ret0),r26 */
+ && *(pc + 1) == 0x6bd33fc9 /* stw r19,-1c(sp) */
+ && *(pc + 2) == 0x20200801 /* ldil L%-40000000,r1 */
+ && *(pc + 3) == 0xe420e008 /* be,l 4(sr7,r1) */
+ && *(pc + 4) == 0x34160116) /* ldi 8b,r22 */
+ ||
+ (!TARGET_64BIT
+ && *(pc + 0) == 0x6bd33fc9 /* stw r19,-1c(sp) */
+ && *(pc + 1) == 0x20200801 /* ldil L%-40000000,r1 */
+ && *(pc + 2) == 0xe420e008 /* be,l 4(sr7,r1) */
+ && *(pc + 3) == 0x341601c0)) /* ldi e0,r22 */
+ {
+ /* The previous stack pointer is saved at (long *)SP - 1. The
+ ucontext structure is offset from the start of the previous
+ frame by the siglocal_misc structure. */
+ struct siglocalx *sl = (struct siglocalx *)
+ (*((long *) context->cfa - 1));
+ mcontext_t *mc = &(sl->sl_uc.uc_mcontext);
+
+ long new_cfa = GetSSReg (mc, ss_sp);
+
+ fs->regs.cfa_how = CFA_REG_OFFSET;
+ fs->regs.cfa_reg = 30;
+ fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+
+ UPDATE_FS_FOR_GR (fs, 1, 1);
+ UPDATE_FS_FOR_GR (fs, 2, 2);
+ UPDATE_FS_FOR_GR (fs, 3, 3);
+ UPDATE_FS_FOR_GR (fs, 4, 4);
+ UPDATE_FS_FOR_GR (fs, 5, 5);
+ UPDATE_FS_FOR_GR (fs, 6, 6);
+ UPDATE_FS_FOR_GR (fs, 7, 7);
+ UPDATE_FS_FOR_GR (fs, 8, 8);
+ UPDATE_FS_FOR_GR (fs, 9, 9);
+ UPDATE_FS_FOR_GR (fs, 10, 10);
+ UPDATE_FS_FOR_GR (fs, 11, 11);
+ UPDATE_FS_FOR_GR (fs, 12, 12);
+ UPDATE_FS_FOR_GR (fs, 13, 13);
+ UPDATE_FS_FOR_GR (fs, 14, 14);
+ UPDATE_FS_FOR_GR (fs, 15, 15);
+ UPDATE_FS_FOR_GR (fs, 16, 16);
+ UPDATE_FS_FOR_GR (fs, 17, 17);
+ UPDATE_FS_FOR_GR (fs, 18, 18);
+ UPDATE_FS_FOR_GR (fs, 19, 19);
+ UPDATE_FS_FOR_GR (fs, 20, 20);
+ UPDATE_FS_FOR_GR (fs, 21, 21);
+ UPDATE_FS_FOR_GR (fs, 22, 22);
+ UPDATE_FS_FOR_GR (fs, 23, 23);
+ UPDATE_FS_FOR_GR (fs, 24, 24);
+ UPDATE_FS_FOR_GR (fs, 25, 25);
+ UPDATE_FS_FOR_GR (fs, 26, 26);
+ UPDATE_FS_FOR_GR (fs, 27, 27);
+ UPDATE_FS_FOR_GR (fs, 28, 28);
+ UPDATE_FS_FOR_GR (fs, 29, 29);
+ UPDATE_FS_FOR_GR (fs, 30, 30);
+ UPDATE_FS_FOR_GR (fs, 31, 31);
+
+ if (TARGET_64BIT)
+ {
+ UPDATE_FS_FOR_FR (fs, 4, 32);
+ UPDATE_FS_FOR_FR (fs, 5, 33);
+ UPDATE_FS_FOR_FR (fs, 6, 34);
+ UPDATE_FS_FOR_FR (fs, 7, 35);
+ UPDATE_FS_FOR_FR (fs, 8, 36);
+ UPDATE_FS_FOR_FR (fs, 9, 37);
+ UPDATE_FS_FOR_FR (fs, 10, 38);
+ UPDATE_FS_FOR_FR (fs, 11, 39);
+ UPDATE_FS_FOR_FR (fs, 12, 40);
+ UPDATE_FS_FOR_FR (fs, 13, 41);
+ UPDATE_FS_FOR_FR (fs, 14, 42);
+ UPDATE_FS_FOR_FR (fs, 15, 43);
+ UPDATE_FS_FOR_FR (fs, 16, 44);
+ UPDATE_FS_FOR_FR (fs, 17, 45);
+ UPDATE_FS_FOR_FR (fs, 18, 46);
+ UPDATE_FS_FOR_FR (fs, 19, 47);
+ UPDATE_FS_FOR_FR (fs, 20, 48);
+ UPDATE_FS_FOR_FR (fs, 21, 49);
+ UPDATE_FS_FOR_FR (fs, 22, 50);
+ UPDATE_FS_FOR_FR (fs, 23, 51);
+ UPDATE_FS_FOR_FR (fs, 24, 52);
+ UPDATE_FS_FOR_FR (fs, 25, 53);
+ UPDATE_FS_FOR_FR (fs, 26, 54);
+ UPDATE_FS_FOR_FR (fs, 27, 55);
+ UPDATE_FS_FOR_FR (fs, 28, 56);
+ UPDATE_FS_FOR_FR (fs, 29, 57);
+ UPDATE_FS_FOR_FR (fs, 30, 58);
+ UPDATE_FS_FOR_FR (fs, 31, 59);
+
+ UPDATE_FS_FOR_SAR (fs, 60);
+ }
+ else
+ {
+ UPDATE_FS_FOR_FR (fs, 4, 32);
+ UPDATE_FS_FOR_FR (fs, 5, 34);
+ UPDATE_FS_FOR_FR (fs, 6, 36);
+ UPDATE_FS_FOR_FR (fs, 7, 38);
+ UPDATE_FS_FOR_FR (fs, 8, 40);
+ UPDATE_FS_FOR_FR (fs, 9, 44);
+ UPDATE_FS_FOR_FR (fs, 10, 44);
+ UPDATE_FS_FOR_FR (fs, 11, 46);
+ UPDATE_FS_FOR_FR (fs, 12, 48);
+ UPDATE_FS_FOR_FR (fs, 13, 50);
+ UPDATE_FS_FOR_FR (fs, 14, 52);
+ UPDATE_FS_FOR_FR (fs, 15, 54);
+
+ if (!cpu)
+ cpu = sysconf (_SC_CPU_VERSION);
+
+ /* PA-RISC 1.0 only has 16 floating point registers. */
+ if (cpu != CPU_PA_RISC1_0)
+ {
+ UPDATE_FS_FOR_FR (fs, 16, 56);
+ UPDATE_FS_FOR_FR (fs, 17, 58);
+ UPDATE_FS_FOR_FR (fs, 18, 60);
+ UPDATE_FS_FOR_FR (fs, 19, 62);
+ UPDATE_FS_FOR_FR (fs, 20, 64);
+ UPDATE_FS_FOR_FR (fs, 21, 66);
+ UPDATE_FS_FOR_FR (fs, 22, 68);
+ UPDATE_FS_FOR_FR (fs, 23, 70);
+ UPDATE_FS_FOR_FR (fs, 24, 72);
+ UPDATE_FS_FOR_FR (fs, 25, 74);
+ UPDATE_FS_FOR_FR (fs, 26, 76);
+ UPDATE_FS_FOR_FR (fs, 27, 78);
+ UPDATE_FS_FOR_FR (fs, 28, 80);
+ UPDATE_FS_FOR_FR (fs, 29, 82);
+ UPDATE_FS_FOR_FR (fs, 30, 84);
+ UPDATE_FS_FOR_FR (fs, 31, 86);
+ }
+
+ UPDATE_FS_FOR_SAR (fs, 88);
+ }
+
+ fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
+ UPDATE_FS_FOR_PC (fs, DWARF_ALT_FRAME_RETURN_COLUMN);
+ fs->signal_frame = 1;
+
+ return _URC_NO_REASON;
+ }
+
+ return _URC_END_OF_STACK;
+}
+#endif /* inhibit_libc */
diff --git a/libgcc/config/pa/linux-unwind.h b/libgcc/config/pa/linux-unwind.h
new file mode 100644
index 00000000000..a0560e97445
--- /dev/null
+++ b/libgcc/config/pa/linux-unwind.h
@@ -0,0 +1,141 @@
+/* DWARF2 EH unwinding support for PA Linux.
+ Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+
+/* Do code reading to identify a signal frame, and set the frame
+ state data appropriately. See unwind-dw2.c for the structs. */
+
+/* Don't use this if inhibit_libc is set.
+ The build for this target will fail trying to include missing headers. */
+#ifndef inhibit_libc
+#include <signal.h>
+#include <sys/ucontext.h>
+
+/* Unfortunately, because of various bugs and changes to the kernel,
+ we have several cases to deal with.
+
+ In 2.4, the signal trampoline is 4 words, and (CONTEXT)->ra should
+ point directly at the beginning of the trampoline and struct rt_sigframe.
+
+ In <= 2.6.5-rc2-pa3, the signal trampoline is 9 words, and
+ (CONTEXT)->ra points at the 4th word in the trampoline structure. This
+ is wrong, it should point at the 5th word. This is fixed in 2.6.5-rc2-pa4.
+
+ To detect these cases, we first take (CONTEXT)->ra, align it to 64-bytes
+ to get the beginning of the signal frame, and then check offsets 0, 4
+ and 5 to see if we found the beginning of the trampoline. This will
+ tell us how to locate the sigcontext structure.
+
+ Note that with a 2.4 64-bit kernel, the signal context is not properly
+ passed back to userspace so the unwind will not work correctly. */
+
+#define MD_FALLBACK_FRAME_STATE_FOR pa32_fallback_frame_state
+
+static _Unwind_Reason_Code
+pa32_fallback_frame_state (struct _Unwind_Context *context,
+ _Unwind_FrameState *fs)
+{
+ unsigned long sp = (unsigned long)context->ra & ~63;
+ unsigned int *pc = (unsigned int *)sp;
+ unsigned long off;
+ _Unwind_Ptr new_cfa;
+ int i;
+ struct sigcontext *sc;
+ struct rt_sigframe {
+ struct siginfo info;
+ struct ucontext uc;
+ } *frame;
+
+ /* rt_sigreturn trampoline:
+ 3419000x ldi 0, %r25 or ldi 1, %r25 (x = 0 or 2)
+ 3414015a ldi __NR_rt_sigreturn, %r20
+ e4008200 be,l 0x100(%sr2, %r0), %sr0, %r31
+ 08000240 nop */
+
+ if (pc[0] == 0x34190000 || pc[0] == 0x34190002)
+ off = 4*4;
+ else if (pc[4] == 0x34190000 || pc[4] == 0x34190002)
+ {
+ pc += 4;
+ off = 10 * 4;
+ }
+ else if (pc[5] == 0x34190000 || pc[5] == 0x34190002)
+ {
+ pc += 5;
+ off = 10 * 4;
+ }
+ else
+ {
+ /* We may have to unwind through an alternate signal stack.
+ We assume that the alignment of the alternate signal stack
+ is BIGGEST_ALIGNMENT (i.e., that it has been allocated using
+ malloc). As a result, we can't distinguish trampolines
+ used prior to 2.6.5-rc2-pa4. However after 2.6.5-rc2-pa4,
+ the return address of a signal trampoline will be on an odd
+ word boundary and we can then determine the frame offset. */
+ sp = (unsigned long)context->ra;
+ pc = (unsigned int *)sp;
+ if ((pc[0] == 0x34190000 || pc[0] == 0x34190002) && (sp & 4))
+ off = 5 * 4;
+ else
+ return _URC_END_OF_STACK;
+ }
+
+ if (pc[1] != 0x3414015a
+ || pc[2] != 0xe4008200
+ || pc[3] != 0x08000240)
+ return _URC_END_OF_STACK;
+
+ frame = (struct rt_sigframe *)(sp + off);
+ sc = &frame->uc.uc_mcontext;
+
+ new_cfa = sc->sc_gr[30];
+ fs->regs.cfa_how = CFA_REG_OFFSET;
+ fs->regs.cfa_reg = 30;
+ fs->regs.cfa_offset = new_cfa - (long) context->cfa;
+ for (i = 1; i <= 31; i++)
+ {
+ fs->regs.reg[i].how = REG_SAVED_OFFSET;
+ fs->regs.reg[i].loc.offset = (long)&sc->sc_gr[i] - new_cfa;
+ }
+ for (i = 4; i <= 31; i++)
+ {
+ /* FP regs have left and right halves */
+ fs->regs.reg[2*i+24].how = REG_SAVED_OFFSET;
+ fs->regs.reg[2*i+24].loc.offset
+ = (long)&sc->sc_fr[i] - new_cfa;
+ fs->regs.reg[2*i+24+1].how = REG_SAVED_OFFSET;
+ fs->regs.reg[2*i+24+1].loc.offset
+ = (long)&sc->sc_fr[i] + 4 - new_cfa;
+ }
+ fs->regs.reg[88].how = REG_SAVED_OFFSET;
+ fs->regs.reg[88].loc.offset = (long) &sc->sc_sar - new_cfa;
+ fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_OFFSET;
+ fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset
+ = (long) &sc->sc_iaoq[0] - new_cfa;
+ fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
+ fs->signal_frame = 1;
+ return _URC_NO_REASON;
+}
+#endif /* inhibit_libc */