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authorSandra Loosemore <sandra@codesourcery.com>2015-02-17 17:39:22 +0000
committerSandra Loosemore <sandra@codesourcery.com>2015-02-17 17:39:22 +0000
commite7110394531e343ed8275d3995457744a1ab285b (patch)
tree9a2dd51186f5320995ccbaf23c8ab8afe5c540e6 /libgcc
parent974010fd7c03a8dc224515fba548b27f1ffe8f3f (diff)
2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
libgcc/ * config/arm/bpabi.S (test_div_by_zero): Make label names consistent between thumb2 and arm mode cases. Separate the signed comparison on the high word of the numerator from the unsigned comparison on the low word. * config/arm/bpabi-v6m.S (test_div_by_zero): Similarly separate signed comparison. gcc/testsuite/ * gcc.target/arm/divzero.c: New test case. git-svn-id: https://gcc.gnu.org/svn/gcc/trunk@220765 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libgcc')
-rw-r--r--libgcc/ChangeLog9
-rw-r--r--libgcc/config/arm/bpabi-v6m.S8
-rw-r--r--libgcc/config/arm/bpabi.S36
3 files changed, 35 insertions, 18 deletions
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 0bff7ef3b06..e05ba785f06 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,12 @@
+2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
+
+ * config/arm/bpabi.S (test_div_by_zero): Make label names
+ consistent between thumb2 and arm mode cases. Separate the
+ signed comparison on the high word of the numerator from the
+ unsigned comparison on the low word.
+ * config/arm/bpabi-v6m.S (test_div_by_zero): Similarly separate
+ signed comparison.
+
2015-02-17 Joseph Myers <joseph@codesourcery.com>
* config/nvptx/realloc.c: Include <stddef.h> instead of <stdlib.h>
diff --git a/libgcc/config/arm/bpabi-v6m.S b/libgcc/config/arm/bpabi-v6m.S
index 0a3289367df..a1e164032a0 100644
--- a/libgcc/config/arm/bpabi-v6m.S
+++ b/libgcc/config/arm/bpabi-v6m.S
@@ -85,19 +85,21 @@ FUNC_START aeabi_ulcmp
cmp yyl, #0
bne 7f
cmp xxh, #0
+ .ifc \signed, unsigned
bne 2f
cmp xxl, #0
2:
- .ifc \signed, unsigned
beq 3f
mov xxh, #0
mvn xxh, xxh @ 0xffffffff
mov xxl, xxh
3:
.else
- beq 5f
blt 6f
- mov xxl, #0
+ bgt 4f
+ cmp xxl, #0
+ beq 5f
+4: mov xxl, #0
mvn xxl, xxl @ 0xffffffff
lsr xxh, xxl, #1 @ 0x7fffffff
b 5f
diff --git a/libgcc/config/arm/bpabi.S b/libgcc/config/arm/bpabi.S
index 4cb3d1728b9..f2d990d9a7b 100644
--- a/libgcc/config/arm/bpabi.S
+++ b/libgcc/config/arm/bpabi.S
@@ -80,26 +80,29 @@ ARM_FUNC_START aeabi_ulcmp
/* Tail-call to divide-by-zero handlers which may be overridden by the user,
so unwinding works properly. */
#if defined(__thumb2__)
- cbnz yyh, 1f
- cbnz yyl, 1f
+ cbnz yyh, 2f
+ cbnz yyl, 2f
cmp xxh, #0
+ .ifc \signed, unsigned
do_it eq
cmpeq xxl, #0
- .ifc \signed, unsigned
- beq 2f
- mov xxh, #0xffffffff
- mov xxl, xxh
-2:
+ do_it ne, t
+ movne xxh, #0xffffffff
+ movne xxl, #0xffffffff
.else
- do_it lt, t
+ do_it lt, tt
movlt xxl, #0
movlt xxh, #0x80000000
- do_it gt, t
- movgt xxh, #0x7fffffff
- movgt xxl, #0xffffffff
+ blt 1f
+ do_it eq
+ cmpeq xxl, #0
+ do_it ne, t
+ movne xxh, #0x7fffffff
+ movne xxl, #0xffffffff
.endif
+1:
b SYM (__aeabi_ldiv0) __PLT__
-1:
+2:
#else
/* Note: Thumb-1 code calls via an ARM shim on processors which
support ARM mode. */
@@ -107,16 +110,19 @@ ARM_FUNC_START aeabi_ulcmp
cmpeq yyl, #0
bne 2f
cmp xxh, #0
- cmpeq xxl, #0
.ifc \signed, unsigned
+ cmpeq xxl, #0
movne xxh, #0xffffffff
movne xxl, #0xffffffff
.else
movlt xxh, #0x80000000
movlt xxl, #0
- movgt xxh, #0x7fffffff
- movgt xxl, #0xffffffff
+ blt 1f
+ cmpeq xxl, #0
+ movne xxh, #0x7fffffff
+ movne xxl, #0xffffffff
.endif
+1:
b SYM (__aeabi_ldiv0) __PLT__
2:
#endif