diff options
| -rw-r--r-- | gcc/ChangeLog.linaro | 13 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog.linaro | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c | 2 |
4 files changed, 26 insertions, 6 deletions
diff --git a/gcc/ChangeLog.linaro b/gcc/ChangeLog.linaro index 57435009c0d..b43d5fbf141 100644 --- a/gcc/ChangeLog.linaro +++ b/gcc/ChangeLog.linaro @@ -1,5 +1,18 @@ 2014-07-17 Yvan Roux <yvan.roux@linaro.org> + Backport from trunk r211887, r211899. + 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to + "yes" where needed. + + 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in + vector registers. + +2014-07-17 Yvan Roux <yvan.roux@linaro.org> + Backport from trunk r211440. 2014-06-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 16f230a209e..91721a576ed 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1109,16 +1109,18 @@ (define_insn "*addsi3_aarch64" [(set - (match_operand:SI 0 "register_operand" "=rk,rk,rk") + (match_operand:SI 0 "register_operand" "=rk,rk,w,rk") (plus:SI - (match_operand:SI 1 "register_operand" "%rk,rk,rk") - (match_operand:SI 2 "aarch64_plus_operand" "I,r,J")))] + (match_operand:SI 1 "register_operand" "%rk,rk,w,rk") + (match_operand:SI 2 "aarch64_plus_operand" "I,r,w,J")))] "" "@ add\\t%w0, %w1, %2 add\\t%w0, %w1, %w2 + add\\t%0.2s, %1.2s, %2.2s sub\\t%w0, %w1, #%n2" - [(set_attr "type" "alu_imm,alu_reg,alu_imm")] + [(set_attr "type" "alu_imm,alu_reg,neon_add,alu_imm") + (set_attr "simd" "*,*,yes,*")] ) ;; zero_extend version of above diff --git a/gcc/testsuite/ChangeLog.linaro b/gcc/testsuite/ChangeLog.linaro index 04b19fbace2..2b079582f7d 100644 --- a/gcc/testsuite/ChangeLog.linaro +++ b/gcc/testsuite/ChangeLog.linaro @@ -1,5 +1,12 @@ 2014-07-17 Yvan Roux <yvan.roux@linaro.org> + Backport from trunk r211887. + 2014-06-23 James Greenhalgh <james.greenhalgh@arm.com> + + * gcc.target/aarch64/scalar_shift_1.c: Fix expected assembler. + +2014-07-17 Yvan Roux <yvan.roux@linaro.org> + Backport from trunk r211441. 2014-06-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> diff --git a/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c b/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c index 7cb17f89c51..826bafcb574 100644 --- a/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c +++ b/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c @@ -193,7 +193,6 @@ test_corners_sisd_di (Int64x1 b) return b; } /* { dg-final { scan-assembler "sshr\td\[0-9\]+,\ d\[0-9\]+,\ 63" } } */ -/* { dg-final { scan-assembler "shl\td\[0-9\]+,\ d\[0-9\]+,\ 1" } } */ Int32x1 test_corners_sisd_si (Int32x1 b) @@ -207,7 +206,6 @@ test_corners_sisd_si (Int32x1 b) return b; } /* { dg-final { scan-assembler "sshr\tv\[0-9\]+\.2s,\ v\[0-9\]+\.2s,\ 31" } } */ -/* { dg-final { scan-assembler "shl\tv\[0-9\]+\.2s,\ v\[0-9\]+\.2s,\ 1" } } */ |