2559 files changed, 23714 insertions, 59056 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1ec8955cdb6..0453adaf9ac 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,821 @@
+2016-07-11  Alan Modra  <amodra@gmail.com>
+
+	* config/rs6000/rs6000.md (UNSPEC_DOLOOP): New unspec.
+	(ctr<mode>): Add unspec.
+	(ctr<mode>_internal*): Likewise.
+
+2016-07-08  James Bowman  <james.bowman@ftdichip.com>
+
+	* config/ft32/ft32.c (ft32_elf_encode_section_info): New function.
+	* config/ft32/ft32.h (ASM_OUTPUT_SYMBOL_REF): New function.
+
+2016-07-08  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/71621
+	* lra-constraints.c (process_alt_operands): Check combination of
+	reg class and mode.
+
+2016-06-25  Jason Merrill  <jason@redhat.com>
+	    Richard Biener  <rguenther@suse.de>
+
+	P0145: Refining Expression Order for C++.
+	* gimplify.c (initial_rhs_predicate_for): New.
+	(gimplfy_modify_expr): Gimplify RHS before LHS.
+
+2016-07-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	PR target/71297
+	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
+	Allow standard error handling to take over when a wrong number
+	of arguments is presented to __builtin_vec_ld () or
+	__builtin_vec_st ().
+
+2016-07-08  Jiong Wang  <jiong.wang@arm.com>
+
+	* config/aarch64/aarch64-simd-builtins.def (smax): Remove float
+	variants.
+	(smin): Likewise.
+	(fmax): New entry.
+	(fmin): Likewise.
+	* config/aarch64/arm_neon.h (vmaxnm_f32): Use
+	__builtin_aarch64_fmaxv2sf.
+	(vmaxnmq_f32): Likewise.
+	(vmaxnmq_f64): Likewise.
+	(vminnm_f32): Likewise.
+	(vminnmq_f32): Likewise.
+	(vminnmq_f64): Likewise.
+
+2016-07-08  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/71806
+	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Do not
+	enable -mfloat128-hardware by default.
+	(ISA_3_0_MASKS_IEEE): New macro to give all of the VSX options
+	that IEEE 128-bit hardware support needs.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): If
+	-mcpu=power9 -mfloat128, enable -mfloat128-hardware by default.
+	Use ISA_3_0_MASKS_IEEE as the set of options that IEEE 128-bit
+	floating point requires.
+	* doc/invoke.texi (RS/6000 and PowerPC Options): Document
+	-mfloat128 and -mfloat128-hardware changes.
+
+2016-07-08  Alan Hayward  <alan.hayward@arm.com>
+
+	PR tree-optimization/71667
+	* tree-vect-loop.c (vectorizable_live_operation): ignore DEBUG stmts
+
+2016-07-08  Martin Liska  <mliska@suse.cz>
+
+	PR middle-end/71606
+	* fold-const.c (fold_convertible_p): As COMPLEX_TYPE
+	folding produces SAVE_EXPRs, thus return false for the type.
+
+2016-07-07  Martin Liska  <mliska@suse.cz>
+
+	* file-find.c (remove_prefix): New function.
+	* file-find.h (remove_prefix): Declare the function.
+	* gcc-ar.c (main): Skip a folder of the wrapper if
+	a wrapped binary would point to the same file.
+
+2016-07-07  Jan Hubicka  <jh@suse.cz>
+
+	* tree-scalar-evolution.c (iv_can_overflow_p): export.
+	* tree-scalar-evolution.h (iv_can_overflow_p): Declare.
+	* tree-ssa-loop-ivopts.c (alloc_iv): Use it.
+
+2016-07-07  Ilya Enkovich  <ilya.enkovich@intel.com>
+
+	PR ipa/71624
+	* ipa-inline-analysis.c (compute_inline_parameters): Set
+	local.can_change_signature to false for intrumentation
+	thunk callees.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability
+	with TARGET_HAVE_MOVT.
+	(TARGET_HAVE_MOVT): Define.
+	* config/arm/arm.c (const_ok_for_op): Check MOVT/MOVW
+	availability with TARGET_HAVE_MOVT.
+	* config/arm/arm.md (arm_movt): Use TARGET_HAVE_MOVT to check MOVT
+	availability.
+	(addsi splitter): Use TARGET_THUMB && TARGET_HAVE_MOVT rather than
+	TARGET_THUMB2.
+	(symbol_refs movsi splitter): Remove TARGET_32BIT check.
+	(arm_movtas_ze): Use TARGET_HAVE_MOVT to check MOVT availability.
+	* config/arm/constraints.md (define_constraint "j"): Use
+	TARGET_HAVE_MOVT to check MOVT availability.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
+	(armv8-m.main): Likewise.
+	(armv8-m.main+dsp): Likewise.
+	* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
+	(FL_FOR_ARCH8M_MAIN): Likewise.
+	* config/arm/arm-tables.opt: Regenerate.
+	* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
+	armv8-m.main+dsp to BE8_LINK_SPEC.
+	* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
+	(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
+	* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
+	Baseline and Mainline.
+	(arm_option_override_internal): Also disable arm_restrict_it when
+	!arm_arch_notm.  Update comment for -munaligned-access to also cover
+	ARMv8-M Baseline.
+	(arm_file_start): Increase buffer size for printing architecture name.
+	* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
+	and armv8-m.main+dsp.
+	(mno-unaligned-access): Clarify that this is disabled by default for
+	ARMv8-M Baseline architectures as well.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
+	decide whether to prevent some libgcc routines being included for some
+	multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
+	link between this condition and the one in
+	libgcc/config/arm/lib1func.S.
+
+2016-07-07  Richard Biener  <rguenther@suse.de>
+
+	* tree-ssa-pre.c: Include alias.h.
+	(compute_avail): If we have multiple VN_REFERENCEs with the
+	same hashtable entry adjust that to make it a valid replacement
+	for all of them with respect to alignment and aliasing
+	when doing insertion.
+	* tree-ssa-sccvn.h (vn_reference_operands_for_lookup): Declare.
+	* tree-ssa-sccvn.c (vn_reference_operands_for_lookup): New function.
+
+2016-07-06  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	PR target/70098
+	PR target/71763
+	* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
+	*ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
+	constraint.
+
+2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>
+
+	* var-tracking.c (struct adjust_mem_data): Make side_effects a vector.
+	(adjust_mems): Adjust.
+	(adjust_insn): Likewise.
+	(prepare_call_arguments): Likewise.
+
+2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>
+
+	* gcse.c (struct ls_expr): Make stores field a vector.
+	(ldst_entry): Adjust.
+	(free_ldst_entry): Likewise.
+	(print_ldst_list): Likewise.
+	(compute_ld_motion_mems): Likewise.
+	(update_ld_motion_stores): Likewise.
+
+2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>
+
+	* gcse.c (struct ls_expr): Remove loads field.
+	(ldst_entry): Adjust.
+	(free_ldst_entry): Likewise.
+	(print_ldst_list): Likewise.
+	(compute_ld_motion_mems): Likewise.
+
+2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>
+
+	* store-motion.c (struct st_expr): Make antic_stores a vector.
+	(st_expr_entry): Adjust.
+	(free_st_expr_entry): Likewise.
+	(print_store_motion_mems): Likewise.
+	(find_moveable_store): Likewise.
+	(compute_store_table): Likewise.
+	(remove_reachable_equiv_notes): Likewise.
+	(replace_store_insn): Likewise.
+	(build_store_vectors): Likewise.
+
+2016-07-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/arm/driver-arm.c (arm_cpu_table): Add entries for cortex-a32,
+	cortex-a35, cortex-a53, cortex-a57, cortex-a72, cortex-a73.
+
+2016-07-06  Yuri Rumyantsev  <ysrumyan@gmail.com>
+
+	PR tree-optimization/71518
+	* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Adjust
+	misalign also for outer loops with negative step.
+
+2016-07-06  Wilco Dijkstra  <wdijkstr@arm.com>
+
+	* config/arm/cortex-a53.md: Use final_presence_set for in-order.
+	(cortex_a53_shift): Add mov_shift.
+	(cortex_a53_shift_reg): Add new reservation for register shifts.
+	(cortex_a53_alu): Remove bfm.
+	(cortex_a53_alu_shift): Add bfm, remove mov_shift.
+	(cortex_a53_alu_extr): Add new reservation for EXTR.
+	(bypasses): Improve bypass modelling.
+
+2016-07-06  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR target/50739	
+	* config/avr/avr.c (avr_asm_select_section): Strip off
+	SECTION_DECLARED from flags when calling get_section.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vectorizer.h (vect_memory_access_type): Add
+	VMAT_INVARIANT, VMAT_CONTIGUOUS_DOWN and VMAT_CONTIGUOUS_REVERSED.
+	* tree-vect-stmts.c (compare_step_with_zero): New function.
+	(perm_mask_for_reverse): Move further up file.
+	(get_group_load_store_type): Stick to VMAT_ELEMENTWISE if the
+	step is negative.
+	(get_negative_load_store_type): New function.
+	(get_load_store_type): Call it.  Add an ncopies argument.
+	(vectorizable_mask_load_store): Update call accordingly and
+	remove tests for negative steps.
+	(vectorizable_store, vectorizable_load): Likewise.  Handle new
+	memory_access_types.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vectorizer.h (vect_memory_access_type): New enum.
+	(_stmt_vec_info): Add a memory_access_type field.
+	(STMT_VINFO_MEMORY_ACCESS_TYPE): New macro.
+	(vect_model_store_cost): Take an access type instead of a boolean.
+	(vect_model_load_cost): Likewise.
+	* tree-vect-slp.c (vect_analyze_slp_cost_1): Update calls to
+	vect_model_store_cost and vect_model_load_cost.
+	* tree-vect-stmts.c (vec_load_store_type): New enum.
+	(vect_model_store_cost): Take an access type instead of a
+	store_lanes_p boolean.  Simplify tests.
+	(vect_model_load_cost): Likewise, but for load_lanes_p.
+	(get_group_load_store_type, get_load_store_type): New functions.
+	(vectorizable_store): Use get_load_store_type.  Record the access
+	type in STMT_VINFO_MEMORY_ACCESS_TYPE.
+	(vectorizable_load): Likewise.
+	(vectorizable_mask_load_store): Likewise.  Replace is_store
+	variable with vls_type.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vectorizer.h (vect_grouped_load_supported): Add a
+	single_element_p parameter.
+	* tree-vect-data-refs.c (vect_grouped_load_supported): Likewise.
+	Check the PR65518 case here rather than in vectorizable_load.
+	* tree-vect-loop.c (vect_analyze_loop_2): Update call accordignly.
+	* tree-vect-stmts.c (vectorizable_load): Likewise.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vectorizer.h (gather_scatter_info): New structure.
+	(vect_check_gather_scatter): Return a bool rather than a decl.
+	Replace return-by-pointer arguments with a single
+	gather_scatter_info *.
+	* tree-vect-data-refs.c (vect_check_gather_scatter): Likewise.
+	(vect_analyze_data_refs): Update call accordingly.
+	* tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Likewise.
+	(vectorizable_mask_load_store): Likewise.  Also record the
+	offset dt and vectype in the gather_scatter_info.
+	(vectorizable_store): Likewise.
+	(vectorizable_load): Likewise.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vect-stmts.c (vect_model_store_cost): For non-SLP
+	strided groups, use the cost of N scalar accesses instead
+	of ncopies vector accesses.
+	(vect_model_load_cost): Likewise.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vect-stmts.c (vect_cost_group_size): Delete.
+	(vect_model_store_cost): Avoid calling it.  Use first_stmt_p
+	variable to indicate when once-per-group costs are being used.
+	(vect_model_load_cost): Likewise.  Fix comment and misindented code.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vect-stmts.c (vectorizable_load): Remove unnecessary
+	peeling-for-gaps condition.
+
+2016-07-06  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+	* config/s390/s390.c (s390_expand_vec_init): Force initializer
+	element to register if it doesn't match general_operand.
+
+2016-07-05  Michael Meissner  <meissner@linux.vnet.ibm.com>
+	    Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	* config/rs6000/rs6000-protos.h (rs6000_split_signbit): New
+	prototype.
+	* config/rs6000/rs6000.c (rs6000_split_signbit): New function.
+	* config/rs6000/rs6000.md (UNSPEC_SIGNBIT): New constant.
+	(SIGNBIT): New mode iterator.
+	(Fsignbit): New mode attribute.
+	(signbit<mode>2): Change operand1 to match FLOAT128 instead of
+	IBM128; dispatch to gen_signbit{kf,tf}2_dm for __float128
+	when direct moves are available.
+	(signbit<mode>2_dm): New define_insn_and_split).
+	(signbit<mode>2_dm2): New define_insn.
+
+2016-07-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	PR rtl-optimization/71594
+	* ifcvt.c (noce_convert_multiple_sets): Wrap new_val or old_val
+	into subregs of appropriate mode before trying to emit a conditional
+	move.
+
+2016-07-05  Jan Hubicka  <jh@suse.cz>
+
+	* tree-scalar-evolution.c (iv_can_overflow_p): New function.
+	(simple_iv): Use it.
+
+2016-07-05  Jan Hubicka  <jh@suse.cz>
+
+	* tree-ssa-loop-niter.c (nowrap_type_p): Use ANY_INTEGRAL_TYPE_P.
+
+2016-07-05  Jiong Wang  <jiong.wang@arm.com>
+
+	* lra-constraints.c (process_alt_operands): Don't add spilling cost for
+	"offmemok".
+
+2016-07-05  Jan Hubicka  <jh@suse.cz>
+
+	* tree-scalar-evoluiton.c (simple_iv): Use nowrap_type to check if
+	IV can overflow.
+
+2016-07-05  Richard Biener  <rguenther@suse.de>
+
+	* gimple-ssa-split-paths.c (find_block_to_duplicate_for_splitting_pa):
+	Handle empty else block.
+	(is_feasible_trace): Likewise.
+	(split_paths): Likewise.
+
+2016-07-05  Richard Biener  <rguenther@suse.de>
+
+	* tree-loop-distribution.c (distribute_loop): Fix issue with
+	the cost model loop.
+
+2016-07-05  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* config/arm/neon-testgen.ml: Delete.
+	* config/arm/neon.ml: Delete.
+
+2016-07-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/71739
+	* tree.c (attribute_value_equal): Use get_attribute_name instead of
+	directly using TREE_PURPOSE.
+
+2016-07-04  Jiong Wang  <jiong.wang@arm.com>
+
+	* config/aarch64/aarch64.h: Rename "ARMv8.1" to "ARMv8.1-A".
+	* config/aarch64/aarch64_neon.h: Likewise.
+	* config/aarch64/arm_neon.h: Likewise.
+	* config/aarch64/atomics.md: Likewise.
+	* config/aarch64/aarch64-simd-builtins.def: Likewise.
+	* doc/invoke.texi: Likewise.
+
+2016-07-04  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+	* config/s390/s390.md: Add "z13" cpu_facility.
+	("*mov<mode>cc"): Add support for z13 instructions lochi and locghi.
+	* config/s390/predicates.md ("loc_operand"): New predicate for "load on
+	condition" type instructions.
+
+2016-07-04  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+	    Jeff Law  <law@redhat.com>
+
+	* explow.c (allocate_dynamic_stack_space): Simplify knowing that
+	MUST_ALIGN was always true and extra_align ist always BITS_PER_UNIT.
+
+2016-07-04  Yuri Rumyantsev  <ysrumyan@gmail.com>
+
+	* config/i386/i386.c (ix86_expand_vec_perm): Add handle one-operand
+	permutation for TARGET_AVX512F.
+	(ix86_expand_vec_one_operand_perm_avx512): New function.
+	(expand_vec_perm_1): Invoke introduced function.
+	* tree-vect-loop.c (vect_transform_loop): Clear-up safelen value since
+	it may be not valid after vectorization.
+
+2016-07-04  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	PR target/63874
+	* config/aarch64/aarch64.c (aarch64_classify_symbol): Fix
+	typo in comment.  Only force to memory if it is a weak
+	external reference.
+
+2016-07-04  Matthew Wahab  <matthew.wahab@arm.com>
+	    Jiong Wang  <jiong.wang@arm.com>
+
+	* config/aarch64/aarch64-arches.def: Add "armv8.2-a".
+	* config/aarch64/aarch64.h (AARCH64_FL_V8_2): New.
+	(AARCH64_FL_F16): New.
+	(AARCH64_FL_FOR_ARCH8_2): New.
+	(AARCH64_ISA_8_2): New.
+	(AARCH64_ISA_F16): New.
+	(TARGET_FP_F16INST): New.
+	(TARGET_SIMD_F16INST): New.
+	* config/aarch64/aarch64-option-extensions.def ("fp16"): New entry.
+	("fp"): Disabling "fp" also disables "fp16".
+	* config/aarch64/aarch64-c.c (arch64_update_cpp_builtins): Conditionally define
+	__ARM_FEATURE_FP16_SCALAR_ARITHMETIC and __ARM_FEATURE_FP16_VECTOR_ARITHMETIC.
+	* doc/invoke.texi (AArch64 Options): Document "armv8.2-a" and "fp16".
+
+2016-07-04  Jan Beulich  <jbeulich@suse.com>
+
+	* gcc.c (default_compilers["@c-header"]): Conditionalize "-o".
+
+2016-07-01  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/71720
+	* config/rs6000/vsx.md (vsx_splat_v4sf_internal): When splitting
+	the insns, use an insn form that does not adjust the offset on
+	little endian systems.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* varasm.c (get_variable_section): Validate initializer in
+	named .bss-like sections.
+
+2016-07-01  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	* config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
+	Exchange the order of the second and third operands in the vpermr
+	instruction tmeplate.
+
+2016-07-01  Peter Bergner  <bergner@vnet.ibm.com>
+
+	PR target/71698
+	* config/rs6000/rs6000.c (rs6000_secondary_reload_simple_move): Disallow
+	TDmode values.
+
+2016-07-01  Alan Modra  <amodra@gmail.com>
+
+	PR rtl-optimization/71709
+	* ira-lives.c (find_call_crossed_cheap_reg): Exit loop on arg reg
+	being set, not referenced.
+
+2016-07-01  Yuri Rumyantsev  <ysrumyan@gmail.com>
+
+	PR tree-optimization/70729
+	* tree-vectorizer.c (adjust_simduid_builtins): Nullify safelen field
+	of loop since it can be not valid after transformation.
+
+2016-07-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/arm/arm.c (thumb_reload_in_hi): Delete.
+	* config/arm/arm-protos.h (thumb_reload_in_hi): Delete prototype.
+
+2016-07-01  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* config/arm/arm.c (arm_function_ok_for_sibcall): Add another check
+	for NULL decl.
+
+2016-06-30  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/71677
+	* config/rs6000/constraints.md (wY constraint): New constraint to
+	match the requirements for the LXSD and STXSD instructions.
+	* config/rs6000/predicates.md (offsettable_mem_14bit_operand): New
+	predicate to match the requirements for the LXSD and STXSD
+	instructions.
+	* config/rs6000/rs6000.md (mov<mode>_hardfloat32, FMOVE64 case):
+	Use constaint wY for LXSD/STXSD instructions instead of 'o' or 'Y'
+	to make sure that the bottom 2 bits of offset are 0, the address
+	form is offsettable, and no updating is done in the address mode.
+	(mov<mode>_hardfloat64, FMOVE64 case): Likewise.
+	(movdi_internal32): Likewise
+	(movdi_internal64): Likewise.
+
+2016-06-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/71707
+	* tree-ssa-strlen.c (get_stridx_plus_constant): Handle already present
+	strinfo even for ADDR_EXPR ptr.
+
+2016-06-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	* config/rs6000/altivec.md (darn_32): Change the condition to
+	TARGET_P9_MISC instead of TARGET_MODULO.
+	(darn_raw): Replace TARGET_MODULO with TARGET_P9_MISC in the
+	condition expression.
+	(darn): Replace TARGET_MODULO with TARGET_P9_MISC in the
+	condition expression.
+	* config/rs6000/dfp.md (UNSPEC_DTSTSFI): New unspec constant.
+	(DFP_TEST): New code iterator.
+	(dfptstsfi_<code>_mode>): New define_expand.
+	(*dfp_sgnfcnc_<mode>): New define_insn.
+	* config/rs6000/rs6000-builtin.def (BU_P9_MISC_0): Move this macro
+	definition next to BU_P9_MISC_1 definition and change the MASK
+	value to RS6000_BTM_P9_MISC.
+	(BU_P9_MISC_1): Change the MASK value to RS6000_BTM_P9_MISC.
+	(BU_P9_64BIT_MISC_0): Likewise.
+	(BU_P9_DFP_MISC_0): New macro definition.
+	(BU_P9_DFP_MISC_1): New macro definition.
+	(BU_P9_DFP_MISC_2): New macro definition.
+	(BU_P9_DFP_OVERLOAD_1): New macro definition.
+	(BU_P9_DFP_OVERLOAD_2): New macro definition.
+	(BU_P9_DFP_OVERLOAD_3): New macro definition.
+	(TSTSFI_LT_DD): New BU_P9_DFP_MISC_2.
+	(TSTSFI_LT_TD): Likewise.
+	(TSTSFI_EQ_DD): Likewise.
+	(TSTSFI_EQ_TD): Likewise.
+	(TSTSFI_GT_DD): Likewise.
+	(TSTSFI_GT_TD): Likewise.
+	(TSTSFI_OV_DD): Likewise.
+	(TSTSFI_OV_TD): Likewise.
+	(TSTSFI_LT): New BU_P9_DFP_OVERLOAD_2.
+	(TSTSFI_LT_DD): Likewise.
+	(TSTSFI_LT_TD): Likewise.
+	(TSTSFI_EQ): Likewise.
+	(TSTSFI_EQ_DD): Likewise.
+	(TSTSFI_EQ_TD): Likewise.
+	(TSTSFI_GT): Likewise.
+	(TSTSFI_GT_DD): Likewise.
+	(TSTSFI_GT_TD): Likewise.
+	(TSTSFI_OV): Likewise.
+	(TSTSFI_OV_DD): Likewise.
+	(TSTSFI_OV_TD): Likewise.
+	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
+	overloaded test significance functions.
+	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
+	OPTION_MASK_P9_MISC into the representation of this mask.
+	(POWERPC_MASKS): Add OPTION_MASK_P9_MISC into the representation
+	of this mask.
+	* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Set the
+	RS6000_BTM_P9_MISC flag in the return value if TARGET_P9_MISC is
+	non-zero.
+	(rs6000_expand_binop_builtin): Enforce that argument 0 of the exp
+	argument is a 6-bit unsigned literal value if the icode argument
+	represents a DFP test significance built-in call.
+	(rs6000_invalid_builtin): Add support for the RS6000_BTM_P9_MISC
+	flag used independently and in combination with the
+	RS6000_BTM_64BIT flag.
+	(rs6000_opt_masks): Add entry for power9-misc command-line option.
+	(rs6000_builtin_mask_names): Add entry for power9-misc
+	command-line option.
+	* config/rs6000/rs6000.h: Redefine TARGET_P9_MISC as 0 if
+	HAVE_AS_POWER9 is not a defined macro.  Define MASK_P9_MISC and
+	RS6000_BTM_P9_MISC macros.
+	* config/rs6000/rs6000.opt: Add support for the -mpower9-misc
+	option and change the description of the -mpower9-vector option to
+	enable only vector instructions, removing its erroneously claimed
+	support for scalar instructions.
+	* doc/extend.texi (PowerPC AltiVec Built-in Functions): Document
+	the ISA 3.0 digital floating point test significance built-in
+	functions.
+
+2016-06-30  Wilco Dijkstra  <wdijkstr@arm.com>
+
+	* config/aarch64/aarch64.c (cortexa35_tunings):
+	Enable AES fusion.  Use cortexa57_branch_cost.
+	(cortexa53_tunings): Use cortexa57_branch_cost.
+	(cortexa72_tunings): Use cortexa57_branch_cost.
+	Use AUTOPREFETCHER_WEAK.
+	(cortexa73_tunings): Use cortexa57_branch_cost.
+
+2016-06-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+            James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/arm_neon.h (vcopyq_lane_f32, vcopyq_lane_f64,
+	vcopyq_lane_p8, vcopyq_lane_p16, vcopyq_lane_s8, vcopyq_lane_s16,
+	vcopyq_lane_s32, vcopyq_lane_s64, vcopyq_lane_u8, vcopyq_lane_u16,
+	vcopyq_lane_u32, vcopyq_lane_u64): Reimplement in C.
+	(vcopy_lane_f32, vcopy_lane_f64, vcopy_lane_p8, vcopy_lane_p16,
+	vcopy_lane_s8, vcopy_lane_s16, vcopy_lane_s32, vcopy_lane_s64,
+	vcopy_lane_u8, vcopy_lane_u16, vcopy_lane_u32, vcopy_lane_u64,
+	vcopy_laneq_f32, vcopy_laneq_f64, vcopy_laneq_p8, vcopy_laneq_p16,
+	vcopy_laneq_s8, vcopy_laneq_s16, vcopy_laneq_s32, vcopy_laneq_s64,
+	vcopy_laneq_u8, vcopy_laneq_u16, vcopy_laneq_u32, vcopy_laneq_u64,
+	vcopyq_laneq_f32, vcopyq_laneq_f64, vcopyq_laneq_p8, vcopyq_laneq_p16,
+	vcopyq_laneq_s8, vcopyq_laneq_s16, vcopyq_laneq_s32, vcopyq_laneq_s64,
+	vcopyq_laneq_u8, vcopyq_laneq_u16, vcopyq_laneq_u32, vcopyq_laneq_u64):
+	New intrinsics.
+
+2016-06-30  James Greenhalgh  <james.greenhalgh@arm.com>
+            Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/aarch64-simd.md (*aarch64_simd_vec_copy_lane<mode>):
+	New define_insn.
+	(*aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
+
+2016-06-30  David Malcolm  <dmalcolm@redhat.com>
+
+	PR driver/71651
+	* gcc.c (driver::build_option_suggestions): Pass "option" to
+	add_misspelling_candidates.
+	* opts-common.c (add_misspelling_candidates): Add "option" param;
+	use it to avoid adding negated forms for options marked with
+	RejectNegative.
+	* opts.h (add_misspelling_candidates): Add "option" param.
+
+2016-06-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/71693
+	* fold-const.c (fold_binary_loc) <case RROTATE_EXPR>: Cast
+	TREE_OPERAND (arg0, 0) and TREE_OPERAND (arg0, 1) to type
+	first when permuting bitwise operation with rotate.  Cast
+	TREE_OPERAND (arg0, 0) to type when cancelling two rotations.
+
+2016-06-29  David Malcolm  <dmalcolm@redhat.com>
+
+	* opts.c (handle_param): Use find_param_fuzzy to offer suggestions
+	for misspelled param names.
+	* params.c: Include spellcheck.h.
+	(find_param_fuzzy): New function.
+	* params.h (find_param_fuzzy): New prototype.
+	* spellcheck.c (struct edit_distance_traits<const char *>): Move
+	to...
+	* spellcheck.h (struct edit_distance_traits<const char *>):
+	...here.
+
+2016-06-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	* config/rs6000/predicates.md (const_0_to_7_operand): New
+	predicate, recognize 0..7.
+	* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add
+	support for doing extracts from V16QImode, V8HImode, V4SImode
+	under ISA 3.0.
+	* config/rs6000/vsx.md (VSX_EXTRACT_I): Mode iterator for ISA 3.0
+	vector extract support.
+	(VSX_EXTRACT_PREDICATE): Mode attribute to validate element number
+	for ISA 3.0 vector extract.
+	(VSX_EX): Constraints to use for ISA 3.0 vector extract.
+	(vsx_extract_<mode>, VSX_EXTRACT_I): Add support for doing
+	extracts of a constant element number from small integer vectors
+	on 64-bit ISA 3.0 systems.
+	(vsx_extract_<mode>_di): Likewise.
+	* config/rs6000/rs6000.h (TARGET_VEXTRACTUB): New target macro to
+	say when we can do ISA 3.0 vector extracts.
+	* config/rs6000/rs6000.md (stfiwx): Allow DImode in Altivec
+	registers, using the stxsiwx instruction.
+
+2016-06-29  Jim Wilson  <jim.wilson@linaro.org>
+
+	* config/aarch64/aarch64-cores.def (qdf24xx): Use qdf24xx tuning.
+	* config/aarch64/aarch64.c (qdf24xx_addrcost_table,
+	qdf24xx_regmove_cost, qdf24xx_tunings): New.
+	* config/arm/aarch64-cost-tables.h (qdf24xx_extra_costs): New.
+	* config/arm/arm-cores.def (qdf24xx): Use qdf24xx tuning.
+	* config/arm/arm.c (arm_qdf24xx_tune): New.
+
+2016-06-29  Wilco Dijkstra  <wdijkstr@arm.com>
+
+	* config/aarch64/aarch64.c (cortexa53_tunings):
+	Increase loop alignment to 8.  Set function alignment to 16.
+	(cortexa35_tunings): Likewise.
+	(cortexa57_tunings): Increase loop alignment to 8.
+	(cortexa72_tunings): Likewise.
+	(cortexa73_tunings): Likewise.
+
+2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* doc/sourcebuild.texi (Effective-Target keywords): Add entries
+	for arm_fp16_ok and arm_fp16_hw.
+	(Add Options): Add entries for arm_fp16, arm_fp16_ieee and
+	arm_fp16_alternative.
+
+2016-06-29  Ilya Enkovich  <ilya.enkovich@intel.com>
+
+	PR tree-optimization/71655
+	* tree-vect-stmts.c (vectorizable_comparison): Swap definition
+	types when swapping operands.
+
+2016-06-29  Martin Liska  <mliska@suse.cz>
+
+	PR middle-end/71585
+	* common.opt (flag_stack_protect): Mark the flag as optimization
+	flag.
+	* ipa-inline-transform.c (inline_call): Remove unnecessary call
+	of build_optimization_node.
+
+2016-06-29  Yuri Rumyantsev  <ysrumyan@gmail.com>
+
+	PR tree-optimization/70729
+	* tree-ssa-loop-im.c (ref_indep_loop_p_1): Consider memory reference as
+	independent in loops having positive safelen value.
+	* tree-vect-loop.c (vect_transform_loop): Clear-up safelen value since
+	it may be not valid after vectorization.
+
+2016-06-29  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/71625
+	* tree-ssa-strlen.c (get_addr_stridx): Add PTR argument.  Assume list
+	is sorted by ascending list->offset.  If PTR is non-NULL and there is
+	previous strinfo, call get_stridx_plus_constant.
+	(get_stridx): Pass exp as second argument to get_addr_stridx.
+	(addr_stridxptr): Add missing list = list->next, so that there can be
+	more than one entries in the list.  Bump limit from 16 to 32.  Ensure
+	the list is sorted by ascending list->offset.
+	(get_stridx_plus_constant): Adjust so that it can be also called with
+	ADDR_EXPR instead of SSA_NAME as PTR.
+	(handle_char_store): Pass NULL_TREE as second argument to
+	get_addr_stridx.
+
+2016-06-29  Richard Biener  <rguenther@suse.de>
+
+	PR rtl-optimization/68961
+	* simplify-rtx.c (simplify_subreg): Handle VEC_CONCAT like CONCAT.
+
+2016-06-29  Richard Biener  <rguenther@suse.de>
+
+	PR middle-end/71002
+	* alias.c (component_uses_parent_alias_set_from): Handle
+	type punning through union accesses by using the union alias set.
+	* gimple.c (gimple_get_alias_set): Remove union type punning case.
+
+2016-07-29  Richard Biener  <rguenther@suse.de>
+
+	* match.pd ((T)(T2)x -> (T)x): Remove restriction on final
+	precision not matching mode precision.
+
+2016-06-28  John David Anglin  <danglin@gcc.gnu.org>
+
+	* config/pa/pa.md (call_symref_64bit_post_reload): Don't call
+	pa_output_arg_descriptor.
+	(call_val_symref_64bit_post_reload): Likewise.
+	(call_val_powf_64bit_post_reload): Likewise.
+	(sibcall_internal_symref_64bit): Likewise.
+	(sibcall_value_internal_symref_64bit): Likewise.
+
+2016-06-28  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/71626
+	* config/i386/i386.c (ix86_expand_vector_move): For SUBREG of
+	a constant, force its SUBREG_REG into memory or register instead
+	of whole op1.
+
+2016-06-28  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
+
+	PR target/58655
+	* config/avr/avr.opt (-mfract-convert-truncate): Update description.
+	* doc/invoke.texi (AVR Options): Document it.
+
+2016-06-28  Walter Lee  <walt@tilera.com>
+
+	* config/tilegx/linux.h: Do not include arch/icache.h
+	(CLEAR_INSN_CACHE): Provide inlined definition directly.
+	* config/tilepro/linux.h: Do not include arch/icache.h
+	(CLEAR_INSN_CACHE): Provide inlined definition directly.
+
+2016-06-28  Wilco Dijkstra  <wdijkstr@arm.com>
+
+	* tree-ssa-math-opts.c (find_bswap_or_nop_1): Adjust bitnumbering
+	for big-endian BIT_FIELD_REF.
+
+2016-06-28  Pat Haugen  <pthaugen@us.ibm.com>
+
+	* config/rs6000/rs6000.md ('type' attribute): Add htmsimple/dfp types.
+	('size' attribute): Add '128'.
+	Include power9.md.
+	(*mov<mode>_hardfloat32, *mov<mode>_hardfloat64, *movdi_internal32,
+	*movdi_internal64, *movdf_update1): Set size attribute to '64'.
+	(add<mode>3, sub<mode>3, mul<mode>3, div<mode>3, sqrt<mode>2,
+	copysign<mode>3, neg<mode>2_hw, abs<mode>2_hw, *nabs<mode>2_hw,
+	*fma<mode>4_hw, *fms<mode>4_hw, *nfma<mode>4_hw, *nfms<mode>4_hw,
+	extend<SFDF:mode><IEEE128:mode>2_hw, trunc<mode>df2_hw,
+	*xscvqp<su>wz_<mode>, *xscvqp<su>dz_<mode>, *xscv<su>dqp_<mode>,
+	*trunc<mode>df2_odd): Set size attribute to '128'.
+	(*cmp<mode>_hw): Change type to veccmp and set size attribute to '128'.
+	* config/rs6000/power6.md (power6-fp): Include dfp type.
+	* config/rs6000/power7.md (power7-fp): Likewise.
+	* config/rs6000/power8.md (power8-fp): Likewise.
+	* config/rs6000/power9.md: New file.
+	* config/rs6000/t-rs6000 (MD_INCLUDES): Add power9.md.
+	* config/rs6000/htm.md (*tabort, *tabort<wd>c, *tabort<wd>ci,
+	*trechkpt, *treclaim, *tsr, *ttest): Change type attribute to
+	htmsimple.
+	* config/rs6000/dfp.md (extendsddd2, truncddsd2, extendddtd2,
+	trunctddd2, adddd3, addtd3, subdd3, subtd3, muldd3, multd3, divdd3,
+	divtd3, *cmpdd_internal1, *cmptd_internal1, floatdidd2, floatditd2,
+	ftruncdd2, fixdddi2, ftrunctd2, fixtddi2, dfp_ddedpd_<mode>,
+	dfp_denbcd_<mode>, dfp_dxex_<mode>, dfp_diex_<mode>, dfp_dscli_<mode>,
+	dfp_dscri_<mode>): Change type attribute to dfp.
+	* config/rs6000/crypto.md (crypto_vshasigma<CR_char>): Change type
+	attribute to vecsimple.
+	* config/rs6000/rs6000.c (power9_cost): Update costs, cache size
+	and prefetch streams.
+	(rs6000_option_override_internal): Remove temporary code setting
+	tuning to power8.  Don't set rs6000_sched_groups for power9.
+	(last_scheduled_insn): Change to rtx_insn *.
+	(divide_cnt, vec_load_pendulum): New variables.
+	(rs6000_adjust_cost): Add Power9 to test for store->load separation.
+	(rs6000_issue_rate): Set issue rate for Power9.
+	(is_power9_pairable_vec_type): New.
+	(power9_sched_reorder2): New.
+	(rs6000_sched_reorder2): Call new function for Power9 specific
+	reordering.
+	(insn_must_be_first_in_group): Remove Power9.
+	(insn_must_be_last_in_group): Likewise.
+	(force_new_group): Likewise.
+	(rs6000_sched_init): Fix initialization of last_scheduled_insn.
+	Initialize divide_cnt/vec_load_pendulum.
+	(_rs6000_sched_context, rs6000_init_sched_context,
+	rs6000_set_sched_context): Handle context save/restore of new
+	variables.
+
 2016-06-28  Richard Biener  <rguenther@suse.de>
 
 	* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index fe0e4ad5b10..94b6ca0377f 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20160628
+20160711
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index c24cc040c4c..24756a3d570 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,693 @@
+2016-07-11  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/trans.c (add_decl_expr): Minor tweak.
+	* gcc-interface/utils.c (create_var_decl): For an external variable,
+	also clear TREE_READONLY in LTO mode if the initializer is not a valid
+	constant and set DECL_READONLY_ONCE_ELAB instead.
+
+2016-07-11  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/71817
+	* adaint.c (__gnat_is_read_accessible_file): Add parentheses.
+	(__gnat_is_write_accessible_file): Likewise.
+
+2016-07-07  Ed Schonberg  <schonberg@adacore.com>
+
+	* exp_ch6.adb (Expand_Internal_Init_Call): Subsidiary procedure
+	to Expand_Protected_ Subprogram_Call, to handle properly a
+	call to a protected function that provides the initialization
+	expression for a private component of the same protected type.
+	* sem_ch9.adb (Analyze_Protected_Definition): Layout must be
+	applied to itypes generated for a private operation of a protected
+	type that has a formal of an anonymous access to subprogram,
+	because these itypes have no freeze nodes and are frozen in place.
+	* sem_ch4.adb (Analyze_Selected_Component): If prefix is a
+	protected type and it is not a current instance, do not examine
+	the first private component of the type.
+
+2016-07-07  Arnaud Charlet  <charlet@adacore.com>
+
+	* exp_imgv.adb, g-dynhta.adb, s-regexp.adb, s-fatgen.adb, s-poosiz.adb:
+	Minor removal of extra whitespace.
+	* einfo.ads: minor removal of repeated "as" in comment
+
+2016-07-07  Vadim Godunko  <godunko@adacore.com>
+
+	* adaint.c: Complete previous change.
+
+2016-07-07  Vadim Godunko  <godunko@adacore.com>
+
+	* adainit.h, adainit.c (__gnat_is_read_accessible_file): New
+	subprogram.
+	(__gnat_is_write_accessible_file): New subprogram.
+	* s-os_lib.ads, s-os_lib.adb (Is_Read_Accessible_File): New subprogram.
+	(Is_Write_Accessible_File): New subprogram.
+
+2016-07-07  Justin Squirek  <squirek@adacore.com>
+
+	* sem_ch12.adb (Install_Body): Minor refactoring in the order
+	of local functions.
+	(In_Same_Scope): Change loop condition to be more expressive.
+
+2016-07-07  Gary Dismukes  <dismukes@adacore.com>
+
+	* sem_ch3.adb, sem_prag.adb, sem_prag.ads, prj-ext.adb, freeze.adb,
+	sem_attr.adb: Minor reformatting, fix typos.
+
+2016-07-07  Justin Squirek  <squirek@adacore.com>
+
+	* sem_ch12.adb (In_Same_Scope): Created this function to check
+	a generic package definition against an instantiation for scope
+	dependancies.
+	(Install_Body): Add function In_Same_Scope and
+	amend conditional in charge of delaying the package instance.
+	(Is_In_Main_Unit): Add guard to check if parent is present in
+	assignment of Current_Unit.
+
+2016-07-07  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Remove redundant test,
+	adjust comments and formatting.
+	* sem_prag.adb (Inlining_Not_Possible): Do not test Front_End_Inlining
+	here but...
+	(Make_Inline): ...here before calling Inlining_Not_Possible instead.
+	(Set_Inline_Flags): Remove useless test.
+	(Analyze_Pragma) <Pragma_Inline>: Add comment about -gnatn switch.
+
+2016-07-07  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_prag.ads, sem_prag.adb (Build_Classwide_Expression): Include
+	overridden operation as parameter, in order to map formals of
+	the overridden and overring operation properly prior to rewriting
+	the inherited condition.
+	* freeze.adb (Check_Inherited_Cnonditions): Change call to
+	Build_Class_Wide_Expression accordingly.  In Spark_Mode, add
+	call to analyze the contract of the parent operation, prior to
+	mapping formals between operations.
+
+2016-07-07  Arnaud Charlet  <charlet@adacore.com>
+
+	* adabkend.adb (Scan_Back_End_Switches): Ignore -o/-G switches
+	as done in back_end.adb.
+	(Scan_Compiler_Args): Remove special case for CodePeer/SPARK, no longer
+	needed, and prevents proper handling of multi-unit sources.
+
+2016-07-07  Thomas Quinot  <quinot@adacore.com>
+
+	* g-sechas.adb, g-sechas.ads (GNAT.Secure_Hashes.H): Add Hash_Stream
+	type with Write primitive calling Update on the underlying context
+	(and dummy Read primitive raising P_E).
+
+2016-07-07  Thomas Quinot  <quinot@adacore.com>
+
+	* sem_ch13.adb: Minor reformatting.
+
+2016-07-07  Thomas Quinot  <quinot@adacore.com>
+
+	* g-socket.ads: Document performance consideration for stream
+	wrapper.
+
+2016-07-07  Arnaud Charlet  <charlet@adacore.com>
+
+	* osint-c.ads (Set_File_Name): Clarify spec.
+
+2016-07-07  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* freeze.adb: Reenable code.
+
+2016-07-07  Yannick Moy  <moy@adacore.com>
+
+	* sem_ch6.adb (Process_Formals): Set ghost flag
+	on formal entities of ghost subprograms.
+	* ghost.adb (Check_Ghost_Context.Is_OK_Ghost_Context): Accept ghost
+	entities in use type clauses.
+
+2016-07-06  Javier Miranda  <miranda@adacore.com>
+
+	* sem_ch6.adb (Check_Inline_Pragma): if the subprogram has no spec
+	then move its aspects to the internally built subprogram spec.
+
+2016-07-06  Yannick Moy  <moy@adacore.com>
+
+	* sem_ch6.adb (Analyze_Expression_Function): Mark body of
+	expression function as ghost if needed when created.
+	* sem_prag.adb (Analyze_Pragma.Process_Inline.Set_Inline_Flags):
+	Remove special case.
+
+2016-07-06  Arnaud Charlet  <charlet@adacore.com>
+
+	* lib.adb (Check_Same_Extended_Unit): Complete previous change.
+	* sem_intr.adb (Errint): New parameter Relaxed. Refine previous
+	change to only disable errors selectively.
+	* sem_util.adb: minor style fix in object declaration
+
+2016-07-06  Yannick Moy  <moy@adacore.com>
+
+	* sem_warn.adb (Check_Infinite_Loop_Warning.Find_Var): Special case a
+	call to a volatile function, so that it does not lead to a warning in
+	that case.
+
+2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* sem_ch12.adb, sem_ch4.adb, sem_ch6.adb: Minor reformatting.
+
+2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* gnat1drv.adb: Code clean up. Do not emit any
+	code generation errors when the unit is ignored Ghost.
+
+2016-07-06  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_eval.adb (Check_Non_Static_Context): If the expression
+	is a real literal of a floating point type that is part of a
+	larger expression and is not a static expression, transform it
+	into a machine number now so that the rest of the computation,
+	even if other components are static, is not evaluated with
+	extra precision.
+
+2016-07-06  Javier Miranda  <miranda@adacore.com>
+
+	* sem_ch13.adb (Freeze_Entity_Checks): Undo previous patch and move the
+	needed functionality to Analyze_Freeze_Generic_Entity.
+	(Analyze_Freeze_Generic_Entity): If the entity is not already frozen
+	and has delayed aspects then analyze them.
+
+2016-07-06  Yannick Moy  <moy@adacore.com>
+
+	* sem_prag.adb (Analyze_Pragma.Process_Inline.Set_Inline_Flags):
+	Special case for unanalyzed body entity of ghost expression function.
+
+2016-07-06  Javier Miranda  <miranda@adacore.com>
+
+	* sem_ch7.adb (Analyze_Package_Specification): Insert its
+	freezing nodes after the last declaration. Needed to ensure
+	that global entities referenced in aspects of frozen types are
+	properly handled.
+	* freeze.adb (Freeze_Entity): Minor code reorganization to ensure
+	that freezing nodes of generic packages are handled.
+	* sem_ch13.adb (Freeze_Entity_Checks): Handle N_Freeze_Generic nodes.
+	* sem_ch12.adb (Save_References_In_Identifier): Handle selected
+	components which denote a named number that is constant folded
+	in the analyzed copy of the tree.
+
+2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* exp_aggr.adb Remove with and use clauses for Exp_Ch11 and Inline.
+	(Initialize_Array_Component): Protect the initialization
+	statements in an abort defer / undefer block when the associated
+	component is controlled.
+	(Initialize_Record_Component): Protect the initialization statements
+	in an abort defer / undefer block when the associated component is
+	controlled.
+	(Process_Transient_Component_Completion): Use Build_Abort_Undefer_Block
+	to create an abort defer / undefer block.
+	* exp_ch3.adb Remove with and use clauses for Exp_ch11 and Inline.
+	(Default_Initialize_Object): Use Build_Abort_Undefer_Block to
+	create an abort defer / undefer block.
+	* exp_ch5.adb (Expand_N_Assignment_Statement): Mark an abort
+	defer / undefer block as such.
+	* exp_ch9.adb (Find_Enclosing_Context): Do not consider an abort
+	defer / undefer block as a suitable context for an activation
+	chain or a master.
+	* exp_util.adb Add with and use clauses for Exp_Ch11.
+	(Build_Abort_Undefer_Block): New routine.
+	* exp_util.ads (Build_Abort_Undefer_Block): New routine.
+	* sinfo.adb (Is_Abort_Block): New routine.
+	(Set_Is_Abort_Block): New routine.
+	* sinfo.ads New attribute Is_Abort_Block along with occurrences
+	in nodes.
+	(Is_Abort_Block): New routine along with pragma Inline.
+	(Set_Is_Abort_Block): New routine along with pragma Inline.
+
+2016-07-06  Justin Squirek  <squirek@adacore.com>
+
+	* sem_ch4.adb (Analyze_One_Call): Add a conditional to handle
+	disambiguation.
+
+2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* einfo.adb Flag252 is now used as Is_Finalized_Transient. Flag295
+	is now used as Is_Ignored_Transient.
+	(Is_Finalized_Transient): New routine.
+	(Is_Ignored_Transient): New routine.
+	(Is_Processed_Transient): Removed.
+	(Set_Is_Finalized_Transient): New routine.
+	(Set_Is_Ignored_Transient): New routine.
+	(Set_Is_Processed_Transient): Removed.
+	(Write_Entity_Flags): Output Flag252 and Flag295.
+	* einfo.ads: New attributes Is_Finalized_Transient
+	and Is_Ignored_Transient along with occurrences in
+	entities. Remove attribute Is_Processed_Transient.
+	(Is_Finalized_Transient): New routine along with pragma Inline.
+	(Is_Ignored_Transient): New routine along with pragma Inline.
+	(Is_Processed_Transient): Removed along with pragma Inline.
+	(Set_Is_Finalized_Transient): New routine along with pragma Inline.
+	(Set_Is_Ignored_Transient): New routine along with pragma Inline.
+	(Set_Is_Processed_Transient): Removed along with pragma Inline.
+	* exp_aggr.adb Add with and use clauses for Exp_Ch11 and Inline.
+	(Build_Record_Aggr_Code): Change the handling
+	of controlled record components.
+	(Ctrl_Init_Expression): Removed.
+	(Gen_Assign): Add new formal parameter In_Loop
+	along with comment on usage.  Remove local variables Stmt and
+	Stmt_Expr. Change the handling of controlled array components.
+	(Gen_Loop): Update the call to Gen_Assign.
+	(Gen_While): Update the call to Gen_Assign.
+	(Initialize_Array_Component): New routine.
+	(Initialize_Ctrl_Array_Component): New routine.
+	(Initialize_Ctrl_Record_Component): New routine.
+	(Initialize_Record_Component): New routine.
+	(Process_Transient_Component): New routine.
+	(Process_Transient_Component_Completion): New routine.
+	* exp_ch4.adb (Process_Transient_In_Expression): New routine.
+	(Process_Transient_Object): Removed. Replace all existing calls
+	to this routine with calls to Process_Transient_In_Expression.
+	* exp_ch6.adb (Expand_Ctrl_Function_Call): Remove local constant
+	Is_Elem_Ref. Update the comment on ignoring transients.
+	* exp_ch7.adb (Process_Declarations): Do not process ignored
+	or finalized transient objects.
+	(Process_Transient_In_Scope): New routine.
+	(Process_Transients_In_Scope): New routine.
+	(Process_Transient_Objects): Removed. Replace all existing calls
+	to this routine with calls to Process_Transients_In_Scope.
+	* exp_util.adb (Build_Transient_Object_Statements): New routine.
+	(Is_Finalizable_Transient): Do not consider a transient object
+	which has been finalized.
+	(Requires_Cleanup_Actions): Do not consider ignored or finalized
+	transient objects.
+	* exp_util.ads (Build_Transient_Object_Statements): New routine.
+	* sem_aggr.adb: Major code clean up.
+	* sem_res.adb: Update documentation.
+
+2016-07-06  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch3.adb (Analyze_Subtype_Declaration): For generated
+	subtypes, such as actual subtypes of unconstrained formals,
+	inherit predicate functions, if any, from the parent type rather
+	than creating redundant new ones.
+
+2016-07-06  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* exp_attr.adb, sem_attr.adb, sem_ch13.adb: Minor reformatting.
+
+2016-07-06  Arnaud Charlet  <charlet@adacore.com>
+
+	* lib.adb (Check_Same_Extended_Unit): Prevent looping forever.
+	* gnatbind.adb: Disable some consistency checks in codepeer mode,
+	which are not needed.
+
+2016-07-06  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch12.adb (Check_Fixed_Point_Actual): Add a warning when
+	a formal fixed point type is instantiated with a type that has
+	a user-defined arithmetic operations, but the generic has no
+	corresponding formal functions. This is worth a warning because
+	of the special semantics of fixed-point operators.
+
+2016-07-06  Bob Duff  <duff@adacore.com>
+
+	* sem_attr.adb (Analyze_Attribute): Allow any expression of
+	discrete type.
+	* exp_attr.adb (Expand_N_Attribute_Reference): Change the
+	constant-folding code to correctly handle cases newly allowed
+	by Analyze_Attribute.
+
+2016-07-05  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/decl.c (gnat_to_gnu_entity): Invoke global_bindings_p
+	last when possible.  Do not call elaborate_expression_2 on offsets in
+	local record types and avoid useless processing for constant offsets.
+
+2016-07-04  Arnaud Charlet  <charlet@adacore.com>
+
+	* gnat_rm.texi, gnat_ugn.texi,
+	doc/gnat_ugn/gnat_project_manager.rst,
+	doc/gnat_ugn/building_executable_programs_with_gnat.rst,
+	doc/gnat_ugn/elaboration_order_handling_in_gnat.rst,
+	doc/gnat_ugn/about_this_guide.rst,
+	doc/gnat_ugn/platform_specific_information.rst,
+	doc/gnat_ugn/tools_supporting_project_files.rst,
+	doc/gnat_ugn/gnat_and_program_execution.rst,
+	doc/gnat_ugn/gnat_utility_programs.rst,
+	doc/gnat_ugn/the_gnat_compilation_model.rst,
+	doc/gnat_rm/implementation_defined_attributes.rst,
+	doc/gnat_rm/implementation_defined_pragmas.rst,
+	doc/gnat_rm/representation_clauses_and_pragmas.rst,
+	doc/gnat_rm/standard_and_implementation_defined_restrictions.rst,
+	doc/gnat_ugn.rst: Update documentation.
+
+2016-07-04  Arnaud Charlet  <charlet@adacore.com>
+
+	* gcc-interface/Makefile.in: Cleanups.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_attr.adb (Analyze_Attribute_Old_Result): The attributes can
+	appear in the postcondition of a subprogram renaming declaration,
+	when the renamed entity is an attribute reference that is a
+	function (such as 'Value).
+	* sem_attr.adb (Eval_Attribute): It doesn't
+	need to be static, just known at compile time, so use
+	Compile_Time_Known_Value instead of Is_Static_Expression.
+	This is an efficiency improvement over the previous bug fix.
+	* sem_ch13.adb (Analyze_One_Aspect): Use Original_Node to detect
+	illegal aspects on subprogram renaming declarations that may
+	have been rewritten as bodies.
+
+2016-07-04  Arnaud Charlet  <charlet@adacore.com>
+
+	* sem_intr.adb (Errint): Do not emit error message in
+	Relaxed_RM_Semantics mode.
+
+2016-07-04  Bob Duff  <duff@adacore.com>
+
+	* sem_attr.adb (Eval_Attribute): The code was assuming
+	that X'Enum_Rep, where X denotes a constant, can be constant
+	folded. Fix it so it makes that assumption only when X denotes
+	a STATIC constant.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch4.adb (Compatible_Types_In_Predicate): New function
+	to handle cases where a formal of a predicate function and the
+	corresponding actual have different views of the same type.
+
+2016-07-04  Philippe Gil  <gil@adacore.com>
+
+	* g-debpoo.adb (Free_Blocks) free blocks also until
+	Logically_Deallocated less than Maximum_Logically_Freed_Memory
+	(Dump) add dump of number of traceback & validity elements
+	already allocated.
+
+2016-07-04  Justin Squirek  <squirek@adacore.com>
+
+	* sem_ch12.adb (Instantiate_Package_Body): Add
+	a guard to ignore Itypes which fail when installing primitives.
+
+2016-07-04  Bob Duff  <duff@adacore.com>
+
+	* sem_eval.adb (Decompose_Expr): Set 'out' parameters
+	Kind and Cons to valid values, to avoid use of uninit vars.
+	(Extract_Length): Reorder the check to make it clearer that
+	we're depending on BOTH Ent1 and Ent2 to be Present.
+	* sem_aggr.adb (Resolve_Aggregate): Remove dead code.
+	(Check_Misspelled_Component): Remove exit statement, because
+	it's covered by the 'while' condition.
+	* checks.adb (Apply_Selected_Range_Checks): Remove useless
+	condition "or else not Checks_On".
+	(Selected_Range_Checks):
+	Initialize Known_LB and Known_HB to False, because they are
+	tested unconditionally; avoid use of uninit vars.
+	* frontend.adb (Frontend): Removed useless condition
+	"Operating_Mode = Check_Semantics and then", and added an Assert
+	to clarify why it was useless.
+	* prep.adb (Preprocess): Remove redundant condition. Add an
+	assertion.
+	* sem_ch10.adb (Analyze_Proper_Body): Moved redundant condition
+	"Original_Operating_Mode = Generate_Code" to an Assert.
+	(Process_Spec_Clauses, Process_Body_Clauses): Change parameters
+	from 'in out' to 'out', and don't initialize actuals.
+	* sem_ch12.adb (Is_In_Main_Unit): Removed useless condition
+	"Unum = Main_Unit or else".
+	(Save_Global_Descendant): Moved
+	redundant condition "D = Union_Id (No_List)" to an Assert.
+	* sem_ch4.adb (Check_Misspelled_Selector): Remove exit
+	statement, because it's covered by the 'while' condition.
+	(Analyze_Case_Expression): Initialize Wrong_Alt to Empty,
+	because it looks like it is used uninitialized otherwise.
+	* sem_ch6.adb (Check_Return_Subtype_Indication): Moved redundant
+	condition "not R_Type_Is_Anon_Access" to an Assert.
+	* sem_elim.adb (Line_Num_Match): Moved redundant condition
+	"Sloc_Trace (Idx) = '['" to an Assert.
+	* sem_util.adb (Compile_Time_Constraint_Error): Change "J" to
+	"J - 1". This code is trying to replace "?" with "<", but not if
+	the "?" is quoted, as in "'?", so we want to check the PREVIOUS
+	character for '''.
+	* snames.adb-tmpl (Is_Pragma_Name): Remove useless condition
+	"or else N = Name_Relative_Deadline". It's useless because
+	Name_Relative_Deadline is in the range First_Pragma_Name
+	.. Last_Pragma_Name.
+	* treepr.adb (Visit_Node): Moved redundant condition "D =
+	Union_Id (No_List)" to an Assert.
+	* sem_ch3.adb (Derive_Subprogram, Derive_Subprograms): Change
+	parameters from 'in out' to 'out'.
+	* errout.adb (Error_Msg_Internal): Replace redundant test with Assert.
+	* inline.adb (Add_Inlined_Body): Code cleanup.
+
+2016-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* g-sercom-mingw.adb, sem_ch6.adb: Minor reformatting.
+
+2016-07-04  Olivier Hainque  <hainque@adacore.com>
+
+	* g-sercom-mingw.adb (Set): Fix port configuration for the
+	non-blocking + null-timeout case, request of immediate return.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch6.adb (Is_Non_Overriding_Operation): Add guard to test
+	of generic parent type when operation is a parameterless function
+	that may dispatch on result.
+
+2016-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* freeze.adb, ghost.adb, sem_ch13.adb: Minor reformatting.
+
+2016-07-04  Pascal Obry  <obry@adacore.com>
+
+	* g-forstr.ads: More documentation for the Formatted_String
+	support.
+
+2016-07-04  Justin Squirek  <squirek@adacore.com>
+
+	* sem_ch7.adb (Install_Parent_Private_Declarations): When
+	instantiating a child unit, do not install private declaration of
+	a non-generic ancestor of the generic that is also an ancestor
+	of the current unit: its private part will be installed when
+	private part of ancestor itself is analyzed.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch12.adb (Instantiate_Object): In SPARK mode add a guard
+	to verify that the actual is an object reference before checking
+	for volatility.
+	(Check_Generic_Child_Unit): Prevent cascaded errors when prefix
+	is illegal.
+
+2016-07-04  Gary Dismukes  <dismukes@adacore.com>
+
+	* sem_ch12.ads, freeze.adb: Minor reformatting and typo fixes.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch13.adb (New_Stream_Subprogram): If the attribute
+	definition clause comes from an aspect specification, place the
+	generated subprogram renaming in the freeze actions of the type.
+
+2016-07-04  Philippe Gil  <gil@adacore.com>
+
+	* g-debpoo.adb (Dump.Do_Report) - add space prefix to backtrace
+	address dump - avoid new line sent directly to stdout.
+
+2016-07-04  Arnaud Charlet  <charlet@adacore.com>
+
+	* gnat1drv.adb, sem_ch12.adb, sem_elab.adb, sem_prag.adb, sem_res.adb:
+	Relax elaboration checks in SPARK_Mode so that we rely on the
+	static elaboration model (if used). We'll have a more precise
+	check performed in flow analysis of gnat2why.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* ghost.adb (Prune_Node): A freeze node for an ignored ghost
+	entity must be pruned as well.
+
+2016-07-04  Gary Dismukes  <dismukes@adacore.com>
+
+	* sem_type.adb, einfo.ads, freeze.adb, exp_ch6.adb: Minor reformatting
+	and typo fix.
+
+2016-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* sem_ch3.adb, sem_type.adb, sem_ch12.adb, xref_lib.adb,
+	freeze.adb, sinput-l.adb, sinput-l.ads, sem_ch4.adb, sem_ch8.adb:
+	Minor reformatting.
+
+2016-07-04  Justin Squirek  <squirek@adacore.com>
+
+	* sem_prag.adb (Analyze_Unmodified_Or_Unused and
+	Analyze_Unreferenced_Or_Unused): Change warning message to be
+	more clear about pragma duplicates.
+
+2016-07-04  Yannick Moy  <moy@adacore.com>
+
+	* sinput-l.adb (Create_Instantiation_Source): Set component
+	Inlined_Call for inherited pragma case.
+	* sinput.adb, sinput.ads (Instantiation): Return component
+	Inlined_Call for inherited pragma case.
+
+2016-07-04  Bob Duff  <duff@adacore.com>
+
+	* sem_type.adb (Remove_Conversions): Protect
+	the call to Left_Opnd by checking for Nkind in N_Unary_Op --
+	unary operators do not have a left operand.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch3.adb (Analyze_Object_Declaration): A declaration of a
+	constant in a protected operation may be a homonym of a private
+	component of the enclosing protected type. This declaration hides
+	the component renaming constructed within the protected operation.
+
+2016-07-04  Bob Duff  <duff@adacore.com>
+
+	* xref_lib.adb (Parse_X_Filename, Parse_Identifier_Info): Ignore
+	unknown files. Check that File_Nr is in the range of files we
+	know about. The previous code was checking the lower bound,
+	but not the upper bound.
+
+2016-07-04  Arnaud Charlet  <charlet@adacore.com>
+
+	* tracebak.c: Minor reformatting.
+
+2016-07-04  Yannick Moy  <moy@adacore.com>
+
+	* sem_ch12.adb, sem_ch12.ads Update calls to
+	Create_Instantiation_Source to use default argument.
+	(Adjust_Inherited_Pragma_Sloc): New function to adjust sloc
+	of inherited pragma.
+	(Set_Copied_Sloc_For_Inherited_Pragma):
+	New function that wraps call to Create_Instantiation_Source for
+	copying an inherited pragma.
+	(Set_Copied_Sloc_For_Inlined_Body): Update call to
+	Create_Instantiation_Source with new arguments.
+	* sem_prag.adb (Build_Pragma_Check_Equivalent): In the case
+	of inherited pragmas, use the generic machinery to get chained
+	locations for the pragma and its sub-expressions.
+	* sinput-c.adb: Adapt to new type Source_File_Record.
+	* sinput-l.adb, sinput-l.ads (Create_Instantiation_Source):
+	Add parameter Inherited_Pragma and make parameter Inlined_Body
+	optional.
+	* sinput.adb, sinput.ads (Comes_From_Inherited_Pragma): New
+	function to return when a location comes from an inherited pragma.
+	(Inherited_Pragma): New function to detect when a location comes
+	from an inherited pragma.
+	(Source_File_Record): New component Inherited_Pragma.
+
+2016-07-04  Yannick Moy  <moy@adacore.com>
+
+	* sem_elab.adb: Register existence of quickfix for error message.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* sem_ch4.adb (Resolve_One_Call): In the context of a predicate
+	function the formal and the actual in a call may have different
+	views of the same type, because of the delayed analysis of
+	predicates aspects. Extend the patch that handles this potential
+	discrepancy to handle private and full views as well.
+	* sem_ch8.adb (Find_Selected_Component): Refine predicate that
+	produces additional error when an illegal selected component
+	looks like a prefixed call whose first formal is untagged.
+
+2016-07-04  Justin Squirek  <squirek@adacore.com>
+
+	* einfo.adb (Has_Pragma_Unused): Create this function as a setter
+	for a new flag294 (Set_Has_Pragma_Unused): Create this procedure
+	as a getter for flag294 (Write_Entity_Flags): Register the new
+	flag with an alias
+	* einfo.ads Add comment documenting Has_Pragma_Unused (flag294)
+	and subsequent getter and setter declarations.
+	* lib-xref.adb (Generate_Reference): Recognize Has_Pragma_Unused
+	flag to print appropriate warning messages.
+	* par-prag.adb (Prag): Classify Pragma_Unused into "All Other
+	Pragmas."
+	* snames.ads-tmpl Add a new name to the name constants and a
+	new pramga to Pragma_Id for pramga Unused.
+	* sem_prag.adb (Analyze_Pragma): Create case for Pragma_Unused
+	and move the block for Pragma_Unmodified and Pragma_Unreferenced
+	out and into local subprograms.
+	(Analyze_Unmodified, Analyze_Unreferenced): From the old pragma blocks
+	that have been separated in to local subprograms add a parameter to
+	indicate the if they are being called in the context of Pragma_Unused
+	and handle it accordingly.
+	(Is_Non_Significant_Pragma_Reference): Add an entry for Pragma_Unused
+	and correct the position of Pragma_Unevaluated_Use_Of_Old.
+	* sem_util.adb (Note_Possible_Modification): Recognize
+	Has_Pragma_Unused flag to print appropriate warning messages.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* freeze.adb (Check_Inherited_Conditions): Perform two passes over
+	the primitive operations of the type: one over source overridings
+	to build the primitives mapping, and one over inherited operations
+	to check for the need to create wrappers, and to check legality
+	of inherited condition in SPARK.
+	* sem_prag.ads (Update_Primitive_Mapping): Make public, for use
+	in freeze actions.
+	* sem_prag.adb (Build_Pragma_Check_Equivalent): Refine error
+	message in the case of an inherited condition in SPARK that
+	includes a call to some other overriding primitive.
+
+2016-07-04  Hristian Kirtchev  <kirtchev@adacore.com>
+
+	* exp_aggr.adb (Ctrl_Init_Expression): New routine.
+	(Gen_Assign): Code cleanup. Perform in-place side effect removal when
+	the expression denotes a controlled function call.
+	* exp_util.adb (Remove_Side_Effects): Do not remove side effects
+	on a function call which has this behavior suppressed.
+	* sem_aggr.adb Code cleanup.
+	* sinfo.adb (No_Side_Effect_Removal): New routine.
+	(Set_Side_Effect_Removal): New routine.
+	* sinfo.ads New attribute No_Side_Effect_Removal along with
+	occurences in nodes.
+	(No_Side_Effect_Removal): New routine along with pragma Inline.
+	(Set_Side_Effect_Removal): New routine along with pragma Inline.
+
+2016-07-04  Arnaud Charlet  <charlet@adacore.com>
+
+	* opt.ads, sem_prag.adb (Universal_Addressing_On_AAMP): Removed.
+	Remove support for pragma No_Run_Time. Update comments.
+
+2016-07-04  Pascal Obry  <obry@adacore.com>
+
+	* g-forstr.ads: More documentation for the Formatted_String
+	support.
+
+2016-07-04  Ed Schonberg  <schonberg@adacore.com>
+
+	* exp_ch13.adb (Expand_N_Attribute_Definition_Clause, case
+	'Address): If the address comes from an aspect specification
+	and not a source attribute definition clause, do not remove
+	side effects from the expression, because the expression must
+	be elaborated at the freeze point of the object and not at the
+	object declaration, because of the delayed analysis of aspect
+	specifications.
+
+2016-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR ada/48835
+	PR ada/61954
+	* gcc-interface/gigi.h (enum standard_datatypes): Add ADT_realloc_decl
+	(realloc_decl): New macro.
+	* gcc-interface/decl.c (gnat_to_gnu_entity) <E_Variable>: Use local
+	variable for the entity type and translate it as void pointer if the
+	entity has convention C.
+	(gnat_to_gnu_entity) <E_Function>: If this is not a definition and the
+	external name matches that of malloc_decl or realloc_decl, return the
+	correspoding node directly.
+	(gnat_to_gnu_subprog_type): Likewise for parameter and return types.
+	* gcc-interface/trans.c (gigi): Initialize void_list_node here, not...
+	Initialize realloc_decl.
+	* gcc-interface/utils.c (install_builtin_elementary_types): ...here.
+	(build_void_list_node): Delete.
+	* gcc-interface/utils2.c (known_alignment) <CALL_EXPR>: Return the
+	alignment of the system allocator for malloc_decl and realloc_decl.
+	Do not take alignment from void pointer types either.
+
+2016-06-29  Eric Botcazou  <ebotcazou@adacore.com>
+
+	* gcc-interface/misc.c (LANG_HOOKS_WARN_UNUSED_GLOBAL_DECL): Reorder.
+	(LANG_HOOKS_INIT_TS): Likewise.
+
 2016-06-22  Arnaud Charlet  <charlet@adacore.com>
 
 	* sem_prag.adb: Revert unwanted change in previous commit,
diff --git a/gcc/ada/adabkend.adb b/gcc/ada/adabkend.adb
index e8509239c3b..7eee8879019 100644
--- a/gcc/ada/adabkend.adb
+++ b/gcc/ada/adabkend.adb
@@ -98,31 +98,15 @@ package body Adabkend is
          --  affect code generation or falling through if it does, so the
          --  switch will get stored.
 
-         if Is_Internal_GCC_Switch (Switch_Chars) then
+         --  Skip -o, -G or internal GCC switches together with their argument.
+
+         if Switch_Chars (First .. Last) = "o"
+           or else Switch_Chars (First .. Last) = "G"
+           or else Is_Internal_GCC_Switch (Switch_Chars)
+         then
             Next_Arg := Next_Arg + 1;
             return; -- ignore this switch
 
-         --  Record that an object file name has been specified. The actual
-         --  file name argument is picked up and saved below by the main body
-         --  of Scan_Compiler_Arguments.
-
-         elsif Switch_Chars (First .. Last) = "o" then
-            if First = Last then
-               if Opt.Output_File_Name_Present then
-
-                  --  Ignore extra -o when -gnatO has already been specified
-
-                  Next_Arg := Next_Arg + 1;
-
-               else
-                  Opt.Output_File_Name_Present := True;
-               end if;
-
-               return;
-            else
-               Fail ("invalid switch: " & Switch_Chars);
-            end if;
-
          --  Set optimization indicators appropriately. In gcc-based GNAT this
          --  is picked up from imported variables set by the gcc driver, but
          --  for compilers with non-gcc back ends we do it here to allow use
@@ -244,16 +228,6 @@ package body Adabkend is
             then
                if Is_Switch (Argv) then
                   Fail ("Object file name missing after -gnatO");
-
-               --  In GNATprove_Mode, such an object file is never written, and
-               --  the call to Set_Output_Object_File_Name may fail (e.g. when
-               --  the object file name does not have the expected suffix).
-               --  So we skip that call when GNATprove_Mode is set. Same for
-               --  CodePeer_Mode.
-
-               elsif GNATprove_Mode or CodePeer_Mode then
-                  Output_File_Name_Seen := True;
-
                else
                   Set_Output_Object_File_Name (Argv);
                   Output_File_Name_Seen := True;
diff --git a/gcc/ada/adaint.c b/gcc/ada/adaint.c
index 2c47f006e9c..e011fef46bd 100644
--- a/gcc/ada/adaint.c
+++ b/gcc/ada/adaint.c
@@ -1912,6 +1912,29 @@ __gnat_is_readable_file_attr (char* name, struct file_attributes* attr)
 }
 
 int
+__gnat_is_read_accessible_file (char *name)
+{
+#if defined (_WIN32)
+   TCHAR wname [GNAT_MAX_PATH_LEN + 2];
+
+   S2WSC (wname, name, GNAT_MAX_PATH_LEN + 2);
+
+   return !_waccess (wname, 4);
+
+#elif defined (__vxworks)
+   int fd;
+
+   if ((fd = open (name, O_RDONLY, 0)) < 0)
+     return 0;
+   close (fd);
+   return 1;
+
+#else
+   return !access (name, R_OK);
+#endif
+}
+
+int
 __gnat_is_readable_file (char *name)
 {
    struct file_attributes attr;
@@ -1962,6 +1985,29 @@ __gnat_is_writable_file (char *name)
 }
 
 int
+__gnat_is_write_accessible_file (char *name)
+{
+#if defined (_WIN32)
+   TCHAR wname [GNAT_MAX_PATH_LEN + 2];
+
+   S2WSC (wname, name, GNAT_MAX_PATH_LEN + 2);
+
+   return !_waccess (wname, 2);
+
+#elif defined (__vxworks)
+   int fd;
+
+   if ((fd = open (name, O_WRONLY, 0)) < 0)
+     return 0;
+   close (fd);
+   return 1;
+
+#else
+   return !access (name, W_OK);
+#endif
+}
+
+int
 __gnat_is_executable_file_attr (char* name, struct file_attributes* attr)
 {
    if (attr->executable == ATTR_UNSET)
@@ -3263,7 +3309,6 @@ __gnat_kill (int pid, int sig, int close ATTRIBUTE_UNUSED)
 void __gnat_killprocesstree (int pid, int sig_num)
 {
 #if defined(_WIN32)
-  HANDLE hWnd;
   PROCESSENTRY32 pe;
 
   memset(&pe, 0, sizeof(PROCESSENTRY32));
@@ -3287,7 +3332,7 @@ void __gnat_killprocesstree (int pid, int sig_num)
 
       while (bContinue)
         {
-          if (pe.th32ParentProcessID == (int)pid)
+          if (pe.th32ParentProcessID == (DWORD)pid)
             __gnat_killprocesstree (pe.th32ProcessID, sig_num);
 
           bContinue = Process32Next (hSnap, &pe);
diff --git a/gcc/ada/adaint.h b/gcc/ada/adaint.h
index 2559a31ea84..338b2ef70e0 100644
--- a/gcc/ada/adaint.h
+++ b/gcc/ada/adaint.h
@@ -6,7 +6,7 @@
  *                                                                          *
  *                              C Header File                               *
  *                                                                          *
- *          Copyright (C) 1992-2015, Free Software Foundation, Inc.         *
+ *          Copyright (C) 1992-2016, Free Software Foundation, Inc.         *
  *                                                                          *
  * GNAT is free software;  you can  redistribute it  and/or modify it under *
  * terms of the  GNU General Public License as published  by the Free Soft- *
@@ -207,6 +207,8 @@ extern int    __gnat_is_directory		      (char *);
 extern int    __gnat_is_writable_file		   (char *);
 extern int    __gnat_is_readable_file		   (char *name);
 extern int    __gnat_is_executable_file      (char *name);
+extern int    __gnat_is_write_accessible_file	(char *name);
+extern int    __gnat_is_read_accessible_file	(char *name);
 
 extern void   __gnat_reset_attributes (struct file_attributes *);
 extern int    __gnat_error_attributes (struct file_attributes *);
diff --git a/gcc/ada/checks.adb b/gcc/ada/checks.adb
index 961e4b5a5f6..d91d64b0ffb 100644
--- a/gcc/ada/checks.adb
+++ b/gcc/ada/checks.adb
@@ -3243,9 +3243,7 @@ package body Checks is
             --  on, then we want to delete the check, since it is not needed.
             --  We do this by replacing the if statement by a null statement
 
-            --  Why are we even generating checks if checks are turned off ???
-
-            elsif Do_Static or else not Checks_On then
+            elsif Do_Static then
                Remove_Warning_Messages (R_Cno);
                Rewrite (R_Cno, Make_Null_Statement (Loc));
             end if;
@@ -9650,8 +9648,8 @@ package body Checks is
 
             LB         : Node_Id := Low_Bound (Ck_Node);
             HB         : Node_Id := High_Bound (Ck_Node);
-            Known_LB   : Boolean;
-            Known_HB   : Boolean;
+            Known_LB   : Boolean := False;
+            Known_HB   : Boolean := False;
 
             Null_Range     : Boolean;
             Out_Of_Range_L : Boolean;
@@ -9673,9 +9671,6 @@ package body Checks is
                then
                   LB := T_LB;
                   Known_LB := True;
-
-               else
-                  Known_LB := False;
                end if;
 
                --  Likewise for the high bound
@@ -9688,8 +9683,6 @@ package body Checks is
                then
                   HB := T_HB;
                   Known_HB := True;
-               else
-                  Known_HB := False;
                end if;
             end if;
 
diff --git a/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst b/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst
index 958ab2413f7..5c7f8012104 100644
--- a/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst
+++ b/gcc/ada/doc/gnat_rm/implementation_defined_attributes.rst
@@ -966,9 +966,6 @@ types. This may be overridden for the derived type by giving an explicit scalar
 storage order for the derived type. For a record extension, the derived type
 must have the same scalar storage order as the parent type.
 
-If a component of `T` is of a record or array type, then that type must
-also have a `Scalar_Storage_Order` attribute definition clause.
-
 A component of a record or array type that is a bit-packed array, or that
 does not start on a byte boundary, must have the same scalar storage order
 as the enclosing record or array type.
@@ -1005,6 +1002,11 @@ inheritance in the case of a derived type), then the default is normally
 the native ordering of the target, but this default can be overridden using
 pragma `Default_Scalar_Storage_Order`.
 
+Note that if a component of `T` is itself of a record or array type,
+the specfied `Scalar_Storage_Order` does *not* apply to that nested type:
+an explicit attribute definition clause must be provided for the component
+type as well if desired.
+
 Note that the scalar storage order only affects the in-memory data
 representation. It has no effect on the representation used by stream
 attributes.
diff --git a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
index b2cb149a252..78ee2f65d04 100644
--- a/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
+++ b/gcc/ada/doc/gnat_rm/implementation_defined_pragmas.rst
@@ -196,7 +196,7 @@ Ada 83, Ada 95, or Ada 2005 programs.
 The one argument form, which is not a configuration pragma,
 is used for managing the transition from Ada
 2005 to Ada 2012 in the run-time library. If an entity is marked
-as Ada_201 only, then referencing the entity in any pre-Ada_2012
+as Ada_2012 only, then referencing the entity in any pre-Ada_2012
 mode will generate a warning. In addition, in any pre-Ada_2012
 mode, a preference rule is established which does not choose
 such an entity unless it is unambiguously specified. This avoids
@@ -6821,6 +6821,40 @@ the handling of existing code which depends on the interpretation of Size
 as implemented in the VADS compiler.  See description of the VADS_Size
 attribute for further details.
 
+.. _Pragma-Unused:
+
+Pragma Unused
+=============
+.. index:: Warnings, unused
+
+Syntax:
+
+
+::
+
+  pragma Unused (LOCAL_NAME {, LOCAL_NAME});
+
+
+This pragma signals that the assignable entities (variables,
+`out` parameters, and `in out` parameters) whose names are listed
+deliberately do not get assigned or referenced in the current source unit
+after the occurrence of the pragma in the current source unit. This
+suppresses warnings about the entities that are unreferenced and/or not
+assigned, and, in addition, a warning will be generated if one of these
+entities gets assigned or subsequently referenced in the same unit as the
+pragma (in the corresponding body or one of its subunits).
+
+This is particularly useful for clearly signaling that a particular
+parameter is not modified or referenced, even though the spec suggests
+that it might be.
+
+For the variable case, warnings are never given for unreferenced
+variables whose name contains one of the substrings
+`DISCARD, DUMMY, IGNORE, JUNK, UNUSED` in any casing. Such names
+are typically to be used in cases where such warnings are expected.
+Thus it is never necessary to use `pragma Unmodified` for such
+variables, though it is harmless to do so. 
+
 Pragma Validity_Checks
 ======================
 
diff --git a/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst b/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst
index 0a3dd4a9112..0af4ce74ccb 100644
--- a/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst
+++ b/gcc/ada/doc/gnat_rm/representation_clauses_and_pragmas.rst
@@ -53,9 +53,9 @@ values are as follows:
   For arrays, the alignment is equal to the alignment of the component type
   for the normal case where no packing or component size is given.  If the
   array is packed, and the packing is effective (see separate section on
-  packed arrays), then the alignment will be either 4, 2 or 1 for long packed
+  packed arrays), then the alignment will be either 4, 2, or 1 for long packed
   arrays or arrays whose length is not known at compile time, depending on
-  whether the component size is divisible by 4, 2 or is odd.  For short packed
+  whether the component size is divisible by 4, 2, or is odd.  For short packed
   arrays, which are handled internally as modular types, the alignment
   will be as described for elementary types, e.g. a packed array of length
   31 bits will have an object size of four bytes, and an alignment of 4.
@@ -490,7 +490,7 @@ discrete types are as follows:
   The `Object_Size` for base subtypes reflect the natural hardware
   size in bits (run the compiler with *-gnatS* to find those values
   for numeric types). Enumeration types and fixed-point base subtypes have
-  8, 16, 32 or 64 bits for this size, depending on the range of values
+  8, 16, 32, or 64 bits for this size, depending on the range of values
   to be stored.
 
 *
@@ -1187,7 +1187,7 @@ taken by components.  We distinguish between *packable* components and
 Components of the following types are considered packable:
 
 * Components of an elementary type are packable unless they are aliased,
-  independent or of an atomic type.
+  independent, or of an atomic type.
 
 * Small packed arrays, where the size is statically known, are represented
   internally as modular integers, and so they are also packable.
diff --git a/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst b/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst
index 6288ebfa70b..da49056d4f1 100644
--- a/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst
+++ b/gcc/ada/doc/gnat_rm/standard_and_implementation_defined_restrictions.rst
@@ -445,20 +445,6 @@ No_Implicit_Heap_Allocations
 
 [RM D.7] No constructs are allowed to cause implicit heap allocation.
 
-No_Implicit_Loops
------------------
-.. index:: No_Implicit_Loops
-
-[GNAT] This restriction ensures that the generated code does not contain any
-implicit `for` loops, either by modifying
-the generated code where possible,
-or by rejecting any construct that would otherwise generate an implicit
-`for` loop. If this restriction is active, it is possible to build
-large array aggregates with all static components without generating an
-intermediate temporary, and without generating a loop to initialize individual
-components. Otherwise, a loop is created for arrays larger than about 5000
-scalar components.
-
 No_Implicit_Protected_Object_Allocations
 ----------------------------------------
 .. index:: No_Implicit_Protected_Object_Allocations
@@ -969,6 +955,20 @@ Unrestricted_Access is forbidden is that it would require the prefix
 to be aliased, and in such cases, it can always be replaced by
 the standard attribute Unchecked_Access which is preferable.
 
+No_Implicit_Loops
+-----------------
+.. index:: No_Implicit_Loops
+
+[GNAT] This restriction ensures that the generated code of the unit marked
+with this restriction does not contain any implicit `for` loops, either by
+modifying the generated code where possible, or by rejecting any construct
+that would otherwise generate an implicit `for` loop. If this restriction is
+active, it is possible to build large array aggregates with all static
+components without generating an intermediate temporary, and without generating
+a loop to initialize individual components. Otherwise, a loop is created for
+arrays larger than about 5000 scalar components. Note that if this restriction
+is set in the spec of a package, it will not apply to its body.
+
 No_Obsolescent_Features
 -----------------------
 .. index:: No_Obsolescent_Features
diff --git a/gcc/ada/doc/gnat_ugn.rst b/gcc/ada/doc/gnat_ugn.rst
index 7892160b477..d6d2ba9756b 100644
--- a/gcc/ada/doc/gnat_ugn.rst
+++ b/gcc/ada/doc/gnat_ugn.rst
@@ -42,8 +42,6 @@ included in the section entitled :ref:`gnu_fdl`.
    gnat_ugn/getting_started_with_gnat
    gnat_ugn/the_gnat_compilation_model
    gnat_ugn/building_executable_programs_with_gnat
-   gnat_ugn/gnat_project_manager
-   gnat_ugn/tools_supporting_project_files
    gnat_ugn/gnat_utility_programs
    gnat_ugn/gnat_and_program_execution
 
diff --git a/gcc/ada/doc/gnat_ugn/about_this_guide.rst b/gcc/ada/doc/gnat_ugn/about_this_guide.rst
index 467d3366b66..308a1e6ee58 100644
--- a/gcc/ada/doc/gnat_ugn/about_this_guide.rst
+++ b/gcc/ada/doc/gnat_ugn/about_this_guide.rst
@@ -37,12 +37,6 @@ This guide contains the following chapters:
   main GNAT tools to build executable programs, and it also gives examples of
   using the GNU make utility with GNAT.
 
-* :ref:`GNAT_Project_Manager` describes how to use project files
-  to organize large projects.
-  
-* :ref:`Tools_Supporting_Project_Files` described how to use the project
-  facility in conjunction with various GNAT tools.
-
 * :ref:`GNAT_Utility_Programs` explains the various utility programs that
   are included in the GNAT environment
 
diff --git a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
index 6952ee37701..d981f467057 100644
--- a/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
+++ b/gcc/ada/doc/gnat_ugn/building_executable_programs_with_gnat.rst
@@ -27,6 +27,15 @@ Finally, this chapter provides examples of
 how to make use of the general GNU make mechanism
 in a GNAT context (see :ref:`Using_the_GNU_make_Utility`).
 
+.. only:: PRO or GPL
+  
+   For building large systems with components possibly written
+   in different languages (such as Ada, C, C++ and Fortran)
+   and organized into subsystems and libraries, the GPRbuild
+   tool can be used. This tool, and the Project Manager
+   facility that it is based upon, is described in
+   *GPRbuild and GPR Companion Tools User's Guide*.
+	  
 
 .. _The_GNAT_Make_Program_gnatmake:
 
@@ -67,8 +76,9 @@ changes to the source program cause corresponding changes in
 dependencies, they will always be tracked exactly correctly by
 *gnatmake*.
 
-Note that for advanced description of project structure, we recommend creating
-a project file as explained in :ref:`GNAT_Project_Manager` and use the
+Note that for advanced forms of project structure, we recommend creating
+a project file as explained in the *GNAT_Project_Manager* chapter in the
+*GPRbuild User's Guide*, and using the
 *gprbuild* tool which supports building with project files and works similarly
 to *gnatmake*.
 
@@ -516,6 +526,8 @@ You may specify any of the following switches to *gnatmake*:
 
 :samp:`-P{project}`
   Use project file `project`. Only one such switch can be used.
+
+.. -- Comment:  
   :ref:`gnatmake_and_Project_Files`.
 
 
@@ -545,8 +557,10 @@ You may specify any of the following switches to *gnatmake*:
 :samp:`-u`
   Unique. Recompile at most the main files. It implies -c. Combined with
   -f, it is equivalent to calling the compiler directly. Note that using
-  -u with a project file and no main has a special meaning
-  (:ref:`Project_Files_and_Main_Subprograms`).
+  -u with a project file and no main has a special meaning.
+
+.. --Comment:
+  (See :ref:`Project_Files_and_Main_Subprograms`.)
 
 
 .. index:: -U  (gnatmake)
diff --git a/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst b/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst
index 90b64a7f17a..4f0c3752dbf 100644
--- a/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst
+++ b/gcc/ada/doc/gnat_ugn/elaboration_order_handling_in_gnat.rst
@@ -75,7 +75,7 @@ of that unit before elaborating the unit doing the |withing|:
 
      with Unit_1;
      package Unit_2 is ...
-  
+
 would require that both the body and spec of `Unit_1` be elaborated
 before the spec of `Unit_2`. However, a rule like that would be far too
 restrictive. In particular, it would make it impossible to have routines
@@ -94,7 +94,7 @@ of the body of `Unit_1`:
 .. code-block:: ada
 
      Sqrt_1 : Float := Sqrt (0.1);
-  
+
 The elaboration code of the body of `Unit_1` also contains:
 
 .. code-block:: ada
@@ -111,7 +111,7 @@ the body `Unit_2`:
 .. code-block:: ada
 
       Sqrt_2 : Float := Sqrt (0.1);
-  
+
 The elaboration code of the body of `Unit_2` also contains:
 
 .. code-block:: ada
@@ -119,7 +119,7 @@ The elaboration code of the body of `Unit_2` also contains:
      if expression_2 = 2 then
         Q := Unit_1.Func_1;
      end if;
-  
+
 Now the question is, which of the following orders of elaboration is
 acceptable:
 
@@ -129,7 +129,7 @@ acceptable:
      Spec of Unit_2
      Body of Unit_1
      Body of Unit_2
-  
+
 or
 
 ::
@@ -138,7 +138,7 @@ or
      Spec of Unit_1
      Body of Unit_2
      Body of Unit_1
-  
+
 If you carefully analyze the flow here, you will see that you cannot tell
 at compile time the answer to this question.
 If `expression_1` is not equal to 1,
@@ -378,7 +378,7 @@ order of elaboration of the servers on which they depend:
 
         Unit A |withs| unit B and calls B.Func in elab code
         Unit B |withs| unit C, and B.Func calls C.Func
-    
+
 
   Now if we put a pragma `Elaborate (B)`
   in unit `A`, this ensures that the
@@ -481,14 +481,14 @@ example writing:
 .. code-block:: ada
 
      function One return Float;
- 
+
      Q : Float := One;
-  
+
      function One return Float is
      begin
           return 1.0;
      end One;
-  
+
 will obviously raise `Program_Error` at run time, because function
 One will be called before its body is elaborated. In this case GNAT will
 generate a warning that the call will raise `Program_Error`::
@@ -510,7 +510,7 @@ generate a warning that the call will raise `Program_Error`::
     11. begin
     12.    null;
     13. end;
-  
+
 
 Note that in this particular case, it is likely that the call is safe, because
 the function `One` does not access any global variables.
@@ -527,7 +527,7 @@ would prevent this reordering, and if we write:
 .. code-block:: ada
 
      function One return Float;
- 
+
      function One return Float is
      begin
           return 1.0;
@@ -586,7 +586,7 @@ raised at the point of the call. Let's look at the warning::
     13. begin
     14.    null;
     15. end;
-  
+
 
 Note that the message here says 'may raise', instead of the direct case,
 where the message says 'will be raised'. That's because whether
@@ -677,7 +677,7 @@ Consider the following:
       begin
          ...
       end Main;
-  
+
 where `Main` is the main program. When this program is executed, the
 elaboration code must first be executed, and one of the jobs of the
 binder is to determine the order in which the units of a program are
@@ -813,7 +813,7 @@ switch, then the compiler outputs an information message::
                           |
         >>> info: call to "r" may raise Program_Error
         >>> info: missing pragma Elaborate_All for "k"
-   
+
      4. end;
 
 and these messages can be used as a guide for supplying manually
@@ -840,7 +840,7 @@ the *-gnatE* switch on the compiler (*gcc* or
 .. code-block:: ada
 
       pragma Elaboration_Checks (DYNAMIC);
-  
+
 Either approach will cause the unit affected to be compiled using the
 standard dynamic run-time elaboration checks described in the Ada
 Reference Manual. The static model is generally preferable, since it
@@ -976,7 +976,7 @@ the following example
       begin
          Decls.Lib_Task.Start;
       end;
-  
+
 If the above example is compiled in the default static elaboration
 mode, then a circularity occurs. The circularity comes from the call
 `Utils.Put_Val` in the task body of `Decls.Lib_Task`. Since
@@ -1112,7 +1112,7 @@ We have four possible answers to this question:
       begin
          Decls1.Lib_Task.Start;
       end;
-    
+
 
   All we have done is to split `Decls` into two packages, one
   containing the library task, and one containing everything else. Now
@@ -1179,7 +1179,7 @@ We have four possible answers to this question:
       begin
          Declst.Lib_Task.Start;
       end;
-    
+
 
   What we have done here is to replace the `task` declaration in
   package `Decls` with a `task type` declaration. Then we
@@ -1227,7 +1227,7 @@ We have four possible answers to this question:
   .. code-block:: ada
 
       pragma Restrictions (No_Entry_Calls_In_Elaboration_Code);
-    
+
   This pragma can be placed in the :file:`gnat.adc` file in the usual
   manner. If we take our original unmodified program and compile it
   in the presence of a :file:`gnat.adc` containing the above pragma,
@@ -1288,7 +1288,7 @@ similar to that in the following example::
 
      warning: "x.ads" has dynamic elaboration checks and with's
      warning:   "y.ads" which has static elaboration checks
- 
+
 These warnings indicate that the rule has been violated, and that as a result
 elaboration checks may be missed in the resulting executable file.
 This warning may be suppressed using the *-ws* binder switch
@@ -1456,7 +1456,7 @@ Faced with a circularity of this kind, you have three different options.
         begin
           Ada.Text_IO.Put_Line(Pack1.X1'Img); -- 101
         end Proc3;
-    
+
   In the absence of any pragmas, an attempt to bind this program produces
   the following diagnostics::
 
@@ -1473,7 +1473,7 @@ Faced with a circularity of this kind, you have three different options.
        info:          "pack2 (spec)"
        info:             which is withed by:
        info:          "pack1 (body)"
-    
+
   The sources of the circularity are the two calls to `Pack2.Pure` and
   `Pack2.F2` in the body of `Pack1`. We can see that the call to
   F2 is safe, even though F2 calls F1, because the call appears after the
@@ -1541,19 +1541,24 @@ fall back to run-time checks; premature calls to any primitive
 operation of a tagged type before the body of the operation has been
 elaborated will raise `Program_Error`.
 
-Access-to-subprogram types, however, are handled conservatively, and
-do not require run-time checks. This was not true in earlier versions
-of the compiler; you can use the *-gnatd.U* debug switch to
-revert to the old behavior if the new conservative behavior causes
-elaboration cycles. Here, 'conservative' means that if you do
-`P'Access` during elaboration, the compiler will assume that you
-might call `P` indirectly during elaboration, so it adds an
-implicit `pragma Elaborate_All` on the library unit containing
-`P`. The *-gnatd.U* switch is safe if you know there are
-no such calls. If the program worked before, it will continue to work
-with *-gnatd.U*. But beware that code modifications such as
-adding an indirect call can cause erroneous behavior in the presence
-of *-gnatd.U*.
+Access-to-subprogram types, however, are handled conservatively in many
+cases. This was not true in earlier versions of the compiler; you can use
+the *-gnatd.U* debug switch to revert to the old behavior if the new
+conservative behavior causes elaboration cycles. Here, 'conservative' means
+that if you do `P'Access` during elaboration, the compiler will normally
+assume that you might call `P` indirectly during elaboration, so it adds an
+implicit `pragma Elaborate_All` on the library unit containing `P`. The
+*-gnatd.U* switch is safe if you know there are no such calls. If the
+program worked before, it will continue to work with *-gnatd.U*. But beware
+that code modifications such as adding an indirect call can cause erroneous
+behavior in the presence of *-gnatd.U*.
+
+These implicit Elaborate_All pragmas are not added in all cases, because
+they cause elaboration cycles in certain common code patterns. If you want
+even more conservative handling of P'Access, you can use the *-gnatd.o*
+switch.
+
+See `debug.adb` for documentation on the *-gnatd...* debug switches.
 
 
 .. _Summary_of_Procedures_for_Elaboration_Control:
@@ -1564,7 +1569,7 @@ Summary of Procedures for Elaboration Control
 .. index:: Elaboration control
 
 First, compile your program with the default options, using none of
-the special elaboration control switches. If the binder successfully
+the special elaboration-control switches. If the binder successfully
 binds your program, then you can be confident that, apart from issues
 raised by the use of access-to-subprogram types and dynamic dispatching,
 the program is free of elaboration errors. If it is important that the
@@ -1621,7 +1626,7 @@ requirements. Consider this example:
      package Init_Constants is
         procedure P; --* require a body*
      end Init_Constants;
- 
+
      with Constants;
      package body Init_Constants is
         procedure P is begin null; end;
@@ -1641,7 +1646,7 @@ requirements. Consider this example:
      begin
         Put_Line (Calc.Z'Img);
      end Main;
-  
+
 In this example, there is more than one valid order of elaboration. For
 example both the following are correct orders::
 
@@ -1654,13 +1659,13 @@ example both the following are correct orders::
 and
 
 ::
-  
+
     Init_Constants spec
     Init_Constants body
     Constants spec
     Calc spec
     Main body
-  
+
 There is no language rule to prefer one or the other, both are correct
 from an order of elaboration point of view. But the programmatic effects
 of the two orders are very different. In the first, the elaboration routine
@@ -1684,7 +1689,7 @@ case, that could have been achieved by adding to the spec of Calc:
 .. code-block:: ada
 
      pragma Elaborate_All (Constants);
-  
+
 which requires that the body (if any) and spec of `Constants`,
 as well as the body and spec of any unit |withed| by
 `Constants` be elaborated before `Calc` is elaborated.
@@ -1719,7 +1724,7 @@ following output:
      $ gnatmake -f -q main -bargs -p
      $ main
       0
-  
+
 It is of course quite unlikely that both these results are correct, so
 it is up to you in a case like this to investigate the source of the
 difference, by looking at the two elaboration orders that are chosen,
@@ -1768,7 +1773,7 @@ the last part of the file:`b~xxx.adb` binder output file. Here is an example::
      Ada.Text_Io'Elab_Spec;
      Ada.Text_Io'Elab_Body;
      E07 := True;
-  
+
 Here Elab_Spec elaborates the spec
 and Elab_Body elaborates the body. The assignments to the :samp:`E{xx}` flags
 flag that the corresponding body is now elaborated.
diff --git a/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst b/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst
index 6cf6c6c39ab..ddce9218b36 100644
--- a/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst
+++ b/gcc/ada/doc/gnat_ugn/gnat_and_program_execution.rst
@@ -2605,6 +2605,14 @@ appropriate options.
   subprograms and helps the compiler to create a smaller executable for your
   program.
 
+  *gnatelim* is a project-aware tool.
+  (See :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
+  the project-related switches but note that *gnatelim* does not support
+  the :samp:`-U`, :samp:`-U {main_unit}`, :samp:`--subdirs={dir}`, or
+  :samp:`--no_objects_dir` switches.)
+  The project file package that can specify
+  *gnatelim* switches is named ``Eliminate``.
+
   .. _About_gnatelim:
 
   About `gnatelim`
diff --git a/gcc/ada/doc/gnat_ugn/gnat_project_manager.rst b/gcc/ada/doc/gnat_ugn/gnat_project_manager.rst
deleted file mode 100644
index 95f6ebd7183..00000000000
--- a/gcc/ada/doc/gnat_ugn/gnat_project_manager.rst
+++ /dev/null
@@ -1,4887 +0,0 @@
-.. |with| replace:: *with*
-.. |withs| replace:: *with*\ s
-.. |withed| replace:: *with*\ ed
-.. |withing| replace:: *with*\ ing
-
-.. -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
-
-
-.. _GNAT_Project_Manager:
-
-********************
-GNAT Project Manager
-********************
-
-
-.. _GNAT_Project_Manager_Introduction:
-
-Introduction
-============
-
-This chapter describes GNAT's *Project Manager*, a facility that allows
-you to manage complex builds involving a number of source files, directories,
-and options for different system configurations. In particular,
-project files allow you to specify:
-
-* The directory or set of directories containing the source files, and/or the
-  names of the specific source files themselves
-* The directory in which the compiler's output
-  (:file:`ALI` files, object files, tree files, etc.) is to be placed
-* The directory in which the executable programs are to be placed
-* Switch settings for any of the project-enabled tools;
-  you can apply these settings either globally or to individual compilation units.
-* The source files containing the main subprogram(s) to be built
-* The source programming language(s)
-* Source file naming conventions; you can specify these either globally or for
-  individual compilation units (see :ref:`Naming_Schemes`).
-* Change any of the above settings depending on external values, thus enabling
-  the reuse of the projects in various **scenarios** (see :ref:`Scenarios_in_Projects`).
-* Automatically build libraries as part of the build process
-  (see :ref:`Library_Projects`).
-
-
-Project files are written in a syntax close to that of Ada, using familiar
-notions such as packages, context clauses, declarations, default values,
-assignments, and inheritance (see :ref:`Project_File_Reference`).
-
-Project files can be built hierarchically from other project files, simplifying
-complex system integration and project reuse (see :ref:`Organizing_Projects_into_Subsystems`).
-
-* One project can import other projects containing needed source files.
-  More generally, the Project Manager lets you structure large development
-  efforts into hierarchical subsystems, where build decisions are delegated
-  to the subsystem level, and thus different compilation environments
-  (switch settings) used for different subsystems.
-* You can organize GNAT projects in a hierarchy: a child project
-  can extend a parent project, inheriting the parent's source files and
-  optionally overriding any of them with alternative versions
-  (see :ref:`Project_Extension`).
-
-
-Several tools support project files, generally in addition to specifying
-the information on the command line itself). They share common switches
-to control the loading of the project (in particular
-:samp:`-P{projectfile}` and
-:samp:`-X{vbl}={value}`).
-
-The Project Manager supports a wide range of development strategies,
-for systems of all sizes.  Here are some typical practices that are
-easily handled:
-
-* Using a common set of source files and generating object files in different
-  directories via different switch settings. It can be used for instance, for
-  generating separate sets of object files for debugging and for production.
-* Using a mostly-shared set of source files with different versions of
-  some units or subunits. It can be used for instance, for grouping and hiding
-  all OS dependencies in a small number of implementation units.
-
-Project files can be used to achieve some of the effects of a source
-versioning system (for example, defining separate projects for
-the different sets of sources that comprise different releases) but the
-Project Manager is independent of any source configuration management tool
-that might be used by the developers.
-
-The various sections below introduce the different concepts related to
-projects. Each section starts with examples and use cases, and then goes into
-the details of related project file capabilities.
-
-.. _Building_With_Projects:
-
-Building With Projects
-======================
-
-In its simplest form, a unique project is used to build a single executable.
-This section concentrates on such a simple setup. Later sections will extend
-this basic model to more complex setups.
-
-The following concepts are the foundation of project files, and will be further
-detailed later in this documentation. They are summarized here as a reference.
-
-**Project file**:
-  A text file using an Ada-like syntax, generally using the :file:`.gpr`
-  extension. It defines build-related characteristics of an application.
-  The characteristics include the list of sources, the location of those
-  sources, the location for the generated object files, the name of
-  the main program, and the options for the various tools involved in the
-  build process.
-
-
-**Project attribute**:
-  A specific project characteristic is defined by an attribute clause. Its
-  value is a string or a sequence of strings. All settings in a project
-  are defined through a list of predefined attributes with precise
-  semantics. See :ref:`Attributes`.
-
-
-**Package in a project**:
-  Global attributes are defined at the top level of a project.
-  Attributes affecting specific tools are grouped in a
-  package whose name is related to tool's function. The most common
-  packages are `Builder`, `Compiler`, `Binder`,
-  and `Linker`. See :ref:`Packages`.
-
-
-**Project variables**:
-  In addition to attributes, a project can use variables to store intermediate
-  values and avoid duplication in complex expressions. It can be initialized
-  with a value coming from the environment.
-  A frequent use of variables is to define scenarios.
-  See :ref:`External_Values`, :ref:`Scenarios_in_Projects`, and :ref:`Variables`.
-
-
-**Source files** and **source directories**:
-  A source file is associated with a language through a naming convention. For
-  instance, `foo.c` is typically the name of a C source file;
-  `bar.ads` or `bar.1.ada` are two common naming conventions for a
-  file containing an Ada spec. A compilation unit is often composed of a main
-  source file and potentially several auxiliary ones, such as header files in C.
-  The naming conventions can be user defined :ref:`Naming_Schemes`, and will
-  drive the builder to call the appropriate compiler for the given source file.
-  Source files are searched for in the source directories associated with the
-  project through the **Source_Dirs** attribute. By default, all the files (in
-  these source directories) following the naming conventions associated with the
-  declared languages are considered to be part of the project. It is also
-  possible to limit the list of source files using the **Source_Files** or
-  **Source_List_File** attributes. Note that those last two attributes only
-  accept basenames with no directory information.
-
-
-**Object files** and **object directory**:
-  An object file is an intermediate file produced by the compiler from a
-  compilation unit. It is used by post-compilation tools to produce
-  final executables or libraries. Object files produced in the context of
-  a given project are stored in a single directory that can be specified by the
-  **Object_Dir** attribute. In order to store objects in
-  two or more object directories, the system must be split into
-  distinct subsystems with their own project file.
-
-
-The following subsections introduce gradually all the attributes of interest
-for simple build needs. Here is the simple setup that will be used in the
-following examples.
-
-The Ada source files :file:`pack.ads`, :file:`pack.adb`, and :file:`proc.adb` are in
-the :file:`common/` directory. The file :file:`proc.adb` contains an Ada main
-subprogram `Proc` that |withs| package `Pack`. We want to compile
-these source files with the switch
-*-O2*, and put the resulting files in
-the directory :file:`obj/`.
-
-::
-
-    common/
-      pack.ads
-      pack.adb
-      proc.adb
-    common/obj/
-      proc.ali, proc.o pack.ali, pack.o
-
-
-Our project is to be called *Build*. The name of the
-file is the name of the project (case-insensitive) with the
-:file:`.gpr` extension, therefore the project file name is :file:`build.gpr`. This
-is not mandatory, but a warning is issued when this convention is not followed.
-
-This is a very simple example, and as stated above, a single project
-file is enough for it. We will thus create a new file, that for now
-should contain the following code:
-
-.. code-block:: gpr
-
-      project Build is
-      end Build;
-
-
-.. _Source_Files_and_Directories:
-
-Source Files and Directories
-----------------------------
-
-When you create a new project, the first thing to describe is how to find the
-corresponding source files. These are the only settings that are needed by all
-the tools that will use this project (builder, compiler, binder and linker for
-the compilation, IDEs to edit the source files,...).
-
-.. index:: Source directories (GNAT Project Manager)
-
-The first step is to declare the source directories, which are the directories
-to be searched to find source files. In the case of the example,
-the :file:`common` directory is the only source directory.
-
-.. index:: Source_Dirs (GNAT Project Manager)
-
-There are several ways of defining source directories:
-
-* When the attribute **Source_Dirs** is not used, a project contains a
-  single source directory which is the one where the project file itself
-  resides. In our example, if :file:`build.gpr` is placed in the :file:`common`
-  directory, the project has the needed implicit source directory.
-
-* The attribute **Source_Dirs** can be set to a list of path names, one
-  for each of the source directories. Such paths can either be absolute
-  names (for instance :file:`"/usr/local/common/"` on UNIX), or relative to the
-  directory in which the project file resides (for instance "." if
-  :file:`build.gpr` is inside :file:`common/`, or "common" if it is one level up).
-  Each of the source directories must exist and be readable.
-
-  .. index:: portability of path names (GNAT Project Manager)
-
-  The syntax for directories is platform specific. For portability, however,
-  the project manager will always properly translate UNIX-like path names to
-  the native format of the specific platform. For instance, when the same
-  project file is to be used both on Unix and Windows, "/" should be used as
-  the directory separator rather than "\\".
-
-* The attribute **Source_Dirs** can automatically include subdirectories
-  using a special syntax inspired by some UNIX shells. If any of the paths in
-  the list ends with ":file:`**`", then that path and all its subdirectories
-  (recursively) are included in the list of source directories. For instance,
-  :file:`**` and :file:`./**` represent the complete directory tree rooted at
-  the directory in which the project file resides.
-
-  .. index:: Source directories (GNAT Project Manager)
-
-  .. index:: Excluded_Source_Dirs (GNAT Project Manager)
-
-  When using that construct, it can sometimes be convenient to also use the
-  attribute **Excluded_Source_Dirs**, which is also a list of paths. Each entry
-  specifies a directory whose immediate content, not including subdirs, is to
-  be excluded. It is also possible to exclude a complete directory subtree
-  using the "**" notation.
-
-  .. index:: Ignore_Source_Sub_Dirs (GNAT Project Manager)
-
-  It is often desirable to remove, from the source directories, directory
-  subtrees rooted at some subdirectories. An example is the subdirectories
-  created by a Version Control System such as Subversion that creates directory
-  subtrees rooted at subdirectories ".svn". To do that, attribute
-  **Ignore_Source_Sub_Dirs** can be used. It specifies the list of simple
-  file names for the roots of these undesirable directory subtrees.
-
-
-  .. code-block:: gpr
-
-        for Source_Dirs use ("./**");
-        for Ignore_Source_Sub_Dirs use (".svn");
-
-
-When applied to the simple example, and because we generally prefer to have
-the project file at the toplevel directory rather than mixed with the sources,
-we will create the following file
-
-
-.. code-block:: gpr
-
-     build.gpr
-     project Build is
-        for Source_Dirs use ("common");  --  <<<<
-     end Build;
-
-
-Once source directories have been specified, one may need to indicate
-source files of interest. By default, all source files present in the source
-directories are considered by the project manager. When this is not desired,
-it is possible to specify the list of sources to consider explicitly.
-In such a case, only source file base names are indicated and not
-their absolute or relative path names. The project manager is in charge of
-locating the specified source files in the specified source directories.
-
-* By default, the project manager searches for all source files of all
-  specified languages in all the source directories.
-
-  Since the project manager was initially developed for Ada environments, the
-  default language is usually Ada and the above project file is complete: it
-  defines without ambiguity the sources composing the project: that is to say,
-  all the sources in subdirectory "common" for the default language (Ada) using
-  the default naming convention.
-
-  .. index:: Languages (GNAT Project Manager)
-
-  However, when compiling a multi-language application, or a pure C
-  application, the project manager must be told which languages are of
-  interest, which is done by setting the **Languages** attribute to a list of
-  strings, each of which is the name of a language.
-
-  .. index:: Naming scheme (GNAT Project Manager)
-
-  Even when using only Ada, the default naming might not be suitable. Indeed,
-  how does the project manager recognizes an "Ada file" from any other
-  file? Project files can describe the naming scheme used for source files,
-  and override the default (see :ref:`Naming_Schemes`). The default is the
-  standard GNAT extension (:file:`.adb` for bodies and :file:`.ads` for
-  specs), which is what is used in our example, explaining why no naming scheme
-  is explicitly specified.
-  See :ref:`Naming_Schemes`.
-
-  .. index:: Source_Files (GNAT Project Manager)
-
-* `Source_Files`.
-  In some cases, source directories might contain files that should not be
-  included in a project. One can specify the explicit list of file names to
-  be considered through the **Source_Files** attribute.
-  When this attribute is defined, instead of looking at every file in the
-  source directories, the project manager takes only those names into
-  consideration  reports  errors if they cannot be found in the source
-  directories or does not correspond to the naming scheme.
-
-* For various reasons, it is sometimes useful to have a project with no
-  sources (most of the time because the attributes defined in the project
-  file will be reused in other projects, as explained in
-  :ref:`Organizing_Projects_into_Subsystems`. To do this, the attribute
-  *Source_Files* is set to the empty list, i.e. `()`. Alternatively,
-  *Source_Dirs* can be set to the empty list, with the same
-  result.
-
-  .. index:: Source_List_File (GNAT Project Manager)
-
-* `Source_List_File`.
-  If there is a great number of files, it might be more convenient to use
-  the attribute **Source_List_File**, which specifies the full path of a file.
-  This file must contain a list of source file names (one per line, no
-  directory information) that are searched as if they had been defined
-  through *Source_Files*. Such a file can easily be created through
-  external tools.
-
-  A warning is issued if both attributes `Source_Files` and
-  `Source_List_File` are given explicit values. In this case, the
-  attribute `Source_Files` prevails.
-
-  .. index:: Excluded_Source_Files (GNAT Project Manager)
-  .. index:: Locally_Removed_Files (GNAT Project Manager)
-  .. index:: Excluded_Source_List_File (GNAT Project Manager)
-
-* `Excluded_Source_Files`.
-  Specifying an explicit list of files is not always convenient.It might be
-  more convenient to use the default search rules with specific exceptions.
-  This can be done thanks to the attribute **Excluded_Source_Files**
-  (or its synonym **Locally_Removed_Files**).
-  Its value is the list of file names that should not be taken into account.
-  This attribute is often used when extending a project,
-  see :ref:`Project_Extension`. A similar attribute
-  **Excluded_Source_List_File** plays the same
-  role but takes the name of file containing file names similarly to
-  `Source_List_File`.
-
-
-In most simple cases, such as the above example, the default source file search
-behavior provides the expected result, and we do not need to add anything after
-setting `Source_Dirs`. The project manager automatically finds
-:file:`pack.ads`, :file:`pack.adb`, and :file:`proc.adb` as source files of the
-project.
-
-Note that by default a warning is issued when a project has no sources attached
-to it and this is not explicitly indicated in the project file.
-
-.. _Duplicate_Sources_in_Projects:
-
-Duplicate Sources in Projects
------------------------------
-
-If the order of the source directories is known statically, that is if
-`"/**"` is not used in the string list `Source_Dirs`, then there may
-be several files with the same name sitting in different directories of the
-project. In this case, only the file in the first directory is considered as a
-source of the project and the others are hidden. If `"/**"` is used in the
-string list `Source_Dirs`, it is an error to have several files with the
-same name in the same directory `"/**"` subtree, since there would be an
-ambiguity as to which one should be used. However, two files with the same name
-may exist in two single directories or directory subtrees. In this case, the
-one in the first directory or directory subtree is a source of the project.
-
-If there are two sources in different directories of the same `"/**"`
-subtree, one way to resolve the problem is to exclude the directory of the
-file that should not be used as a source of the project.
-
-.. _Object_and_Exec_Directory:
-
-Object and Exec Directory
--------------------------
-
-The next step when writing a project is to indicate where the compiler should
-put the object files. In fact, the compiler and other tools might create
-several different kind of files (for GNAT, there is the object file and the ALI
-file for instance). One of the important concepts in projects is that most
-tools may consider source directories as read-only and do not attempt to create
-new or temporary files there. Instead, all files are created in the object
-directory. It is of course not true for project-aware IDEs, whose purpose it is
-to create the source files.
-
-.. index:: Object_Dir (GNAT Project Manager)
-
-The object directory is specified through the **Object_Dir** attribute.
-Its value is the path to the object directory, either absolute or
-relative to the directory containing the project file. This
-directory must already exist and be readable and writable, although
-some tools have a switch to create the directory if needed (See
-the switch `-p` for *gprbuild*).
-
-If the attribute `Object_Dir` is not specified, it defaults to
-the project directory, that is the directory containing the project file.
-
-For our example, we can specify the object dir in this way:
-
-.. code-block:: gpr
-
-       project Build is
-          for Source_Dirs use ("common");
-          for Object_Dir use "obj";   --  <<<<
-       end Build;
-
-As mentioned earlier, there is a single object directory per project. As a
-result, if you have an existing system where the object files are spread across
-several directories, you can either move all of them into the same directory if
-you want to build it with a single project file, or study the section on
-subsystems (see :ref:`Organizing_Projects_into_Subsystems`) to see how each
-separate object directory can be associated with one of the subsystems
-constituting the application.
-
-When the *linker* is called, it usually creates an executable. By
-default, this executable is placed in the object directory of the project. It
-might be convenient to store it in its own directory.
-
-.. index:: Exec_Dir (GNAT Project Manager)
-
-This can be done through the `Exec_Dir` attribute, which, like
-*Object_Dir* contains a single absolute or relative path and must point to
-an existing and writable directory, unless you ask the tool to create it on
-your behalf. When not specified, It defaults to the object directory and
-therefore to the project file's directory if neither *Object_Dir* nor
-*Exec_Dir* was specified.
-
-In the case of the example, let's place the executable in the root
-of the hierarchy, ie the same directory as :file:`build.gpr`. Hence
-the project file is now
-
-.. code-block:: gpr
-
-       project Build is
-          for Source_Dirs use ("common");
-          for Object_Dir use "obj";
-          for Exec_Dir use ".";  --   <<<<
-       end Build;
-
-
-.. _Main_Subprograms:
-
-Main Subprograms
-----------------
-
-In the previous section, executables were mentioned. The project manager needs
-to be taught what they are. In a project file, an executable is indicated by
-pointing to the source file of a main subprogram. In C this is the file that
-contains the `main` function, and in Ada the file that contains the main
-unit.
-
-There can be any number of such main files within a given project, and thus
-several executables can be built in the context of a single project file. Of
-course, one given executable might not (and in fact will not) need all the
-source files referenced by the project. As opposed to other build environments
-such as *makefile*, one does not need to specify the list of
-dependencies of each executable, the project-aware builder knows enough of the
-semantics of the languages to build and link only the necessary elements.
-
-.. index:: Main (GNAT Project Manager)
-
-The list of main files is specified via the **Main** attribute. It contains
-a list of file names (no directories). If a project defines this
-attribute, it is not necessary to identify  main files on the
-command line when invoking a builder, and editors like
-*GPS* will be able to create extra menus to spawn or debug the
-corresponding executables.
-
-.. code-block:: gpr
-
-       project Build is
-          for Source_Dirs use ("common");
-          for Object_Dir use "obj";
-          for Exec_Dir use ".";
-          for Main use ("proc.adb");  --   <<<<
-       end Build;
-
-
-If this attribute is defined in the project, then spawning the builder
-with a command such as
-
-.. code-block:: sh
-
-     gprbuild -Pbuild
-
-
-automatically builds all the executables corresponding to the files
-listed in the *Main* attribute. It is possible to specify one
-or more executables on the command line to build a subset of them.
-
-.. _Tools_Options_in_Project_Files:
-
-Tools Options in Project Files
-------------------------------
-
-We now have a project file that fully describes our environment, and can be
-used to build the application with a simple *gprbuild* command as seen
-in the previous section. In fact, the empty project we showed immediately at
-the beginning (with no attribute at all) could already fulfill that need if it
-was put in the :file:`common` directory.
-
-Of course, we might want more control. This section shows you how to specify
-the compilation switches that the various tools involved in the building of the
-executable should use.
-
-.. index:: command line length (GNAT Project Manager)
-
-Since source names and locations are described in the project file, it is not
-necessary to use switches on the command line for this purpose (switches such
-as -I for gcc). This removes a major source of command line length overflow.
-Clearly, the builders will have to communicate this information one way or
-another to the underlying compilers and tools they call but they usually use
-response files for this and thus are not subject to command line overflows.
-
-Several tools participate to the creation of an executable: the compiler
-produces object files from the source files; the binder (in the Ada case)
-creates a "source" file that takes care, among other things, of elaboration
-issues and global variable initialization; and the linker gathers everything
-into a single executable that users can execute. All these tools are known to
-the project manager and will be called with user defined switches from the
-project files. However, we need to introduce a new project file concept to
-express the switches to be used for any of the tools involved in the build.
-
-.. index:: project file packages (GNAT Project Manager)
-
-A project file is subdivided into zero or more **packages**, each of which
-contains the attributes specific to one tool (or one set of tools). Project
-files use an Ada-like syntax for packages. Package names permitted in project
-files are restricted to a predefined set (see :ref:`Packages`), and the contents
-of packages are limited to a small set of constructs and attributes
-(see :ref:`Attributes`).
-
-Our example project file can be extended with the following empty packages. At
-this stage, they could all be omitted since they are empty, but they show which
-packages would be involved in the build process.
-
-.. code-block:: gpr
-
-       project Build is
-          for Source_Dirs use ("common");
-          for Object_Dir use "obj";
-          for Exec_Dir use ".";
-          for Main use ("proc.adb");
-
-          package Builder is  --<<<  for gprbuild
-          end Builder;
-
-          package Compiler is --<<<  for the compiler
-          end Compiler;
-
-          package Binder is   --<<<  for the binder
-          end Binder;
-
-          package Linker is   --<<<  for the linker
-          end Linker;
-       end Build;
-
-Let's first examine the compiler switches. As stated in the initial description
-of the example, we want to compile all files with *-O2*. This is a
-compiler switch, although it is usual, on the command line, to pass it to the
-builder which then passes it to the compiler. It is recommended to use directly
-the right package, which will make the setup easier to understand for other
-people.
-
-Several attributes can be used to specify the switches:
-
-.. index:: Default_Switches (GNAT Project Manager)
-
-**Default_Switches**:
-
-  This is the first mention in this manual of an **indexed attribute**. When
-  this attribute is defined, one must supply an *index* in the form of a
-  literal string.
-  In the case of *Default_Switches*, the index is the name of the
-  language to which the switches apply (since a different compiler will
-  likely be used for each language, and each compiler has its own set of
-  switches). The value of the attribute is a list of switches.
-
-  In this example, we want to compile all Ada source files with the switch
-  *-O2*, and the resulting project file is as follows
-  (only the `Compiler` package is shown):
-
-  .. code-block:: gpr
-
-       package Compiler is
-         for Default_Switches ("Ada") use ("-O2");
-       end Compiler;
-
-.. index:: Switches (GNAT Project Manager)
-
-**Switches**:
-
-  In some cases, we might want to use specific switches
-  for one or more files. For instance, compiling :file:`proc.adb` might not be
-  possible at high level of optimization because of a compiler issue.
-  In such a case, the *Switches*
-  attribute (indexed on the file name) can be used and will override the
-  switches defined by *Default_Switches*. Our project file would
-  become:
-
-  .. code-block:: gpr
-
-
-      package Compiler is
-         for Default_Switches ("Ada")
-             use ("-O2");
-         for Switches ("proc.adb")
-             use ("-O0");
-      end Compiler;
-
-
-  `Switches` may take a pattern as an index, such as in:
-
-  .. code-block:: gpr
-
-      package Compiler is
-        for Default_Switches ("Ada")
-            use ("-O2");
-        for Switches ("pkg*")
-            use ("-O0");
-      end Compiler;
-
-  Sources :file:`pkg.adb` and :file:`pkg-child.adb` would be compiled with -O0,
-  not -O2.
-
-  `Switches` can also be given a language name as index instead of a file
-  name in which case it has the same semantics as *Default_Switches*.
-  However, indexes with wild cards are never valid for language name.
-
-
-.. index:: Local_Configuration_Pragmas (GNAT Project Manager)
-
-**Local_Configuration_Pragmas**:
-
-  This attribute may specify the path
-  of a file containing configuration pragmas for use by the Ada compiler,
-  such as `pragma Restrictions (No_Tasking)`. These pragmas will be
-  used for all the sources of the project.
-
-
-The switches for the other tools are defined in a similar manner through the
-**Default_Switches** and **Switches** attributes, respectively in the
-*Builder* package (for *gprbuild*),
-the *Binder* package (binding Ada executables) and the *Linker*
-package (for linking executables).
-
-
-.. _Compiling_with_Project_Files:
-
-Compiling with Project Files
-----------------------------
-
-Now that our project files are written, let's build our executable.
-Here is the command we would use from the command line:
-
-.. code-block:: sh
-
-     gprbuild -Pbuild
-
-This will automatically build the executables specified through the
-*Main* attribute: for each, it will compile or recompile the
-sources for which the object file does not exist or is not up-to-date; it
-will then run the binder; and finally run the linker to create the
-executable itself.
-
-The *gprbuild* builder, can automatically manage C files the
-same way: create the file :file:`utils.c` in the :file:`common` directory,
-set the attribute *Languages* to `"(Ada, C)"`, and re-run
-
-.. code-block:: sh
-
-     gprbuild -Pbuild
-
-Gprbuild knows how to recompile the C files and will
-recompile them only if one of their dependencies has changed. No direct
-indication on how to build the various elements is given in the
-project file, which describes the project properties rather than a
-set of actions to be executed. Here is the invocation of
-*gprbuild* when building a multi-language program:
-
-.. code-block:: sh
-
-    $ gprbuild -Pbuild
-    gcc -c proc.adb
-    gcc -c pack.adb
-    gcc -c utils.c
-    gprbind proc
-    ...
-    gcc proc.o -o proc
-
-Notice the three steps described earlier:
-
-* The first three gcc commands correspond to the compilation phase.
-* The gprbind command corresponds to the post-compilation phase.
-* The last gcc command corresponds to the final link.
-
-
-.. index:: -v option (for GPRbuild)
-
-The default output of GPRbuild's execution is kept reasonably simple and easy
-to understand. In particular, some of the less frequently used commands are not
-shown, and some parameters are abbreviated. So it is not possible to rerun the
-effect of the *gprbuild* command by cut-and-pasting its output.
-GPRbuild's option `-v` provides a much more verbose output which includes,
-among other information, more complete compilation, post-compilation and link
-commands.
-
-
-.. _Executable_File_Names:
-
-Executable File Names
----------------------
-
-.. index:: Executable (GNAT Project Manager)
-
-By default, the executable name corresponding to a main file is
-computed from the main source file name. Through the attribute
-**Builder.Executable**, it is possible to change this default.
-
-For instance, instead of building *proc* (or *proc.exe*
-on Windows), we could configure our project file to build "proc1"
-(resp proc1.exe) with the following addition:
-
-.. code-block:: gpr
-
-       project Build is
-          ...  --  same as before
-          package Builder is
-             for Executable ("proc.adb") use "proc1";
-          end Builder
-       end Build;
-
-.. index:: Executable_Suffix (GNAT Project Manager)
-
-Attribute **Executable_Suffix**, when specified, may change the suffix
-of the executable files, when no attribute `Executable` applies:
-its value replaces the platform-specific executable suffix.
-The default executable suffix is empty on UNIX and ".exe" on Windows.
-
-It is also possible to change the name of the produced executable by using the
-command line switch *-o*. When several mains are defined in the project,
-it is not possible to use the *-o* switch and the only way to change the
-names of the executable is provided by Attributes `Executable` and
-`Executable_Suffix`.
-
-
-.. _Avoid_Duplication_With_Variables:
-
-Avoid Duplication With Variables
---------------------------------
-
-To illustrate some other project capabilities, here is a slightly more complex
-project using similar sources and a main program in C:
-
-
-.. code-block:: gpr
-
-    project C_Main is
-       for Languages    use ("Ada", "C");
-       for Source_Dirs  use ("common");
-       for Object_Dir   use  "obj";
-       for Main         use ("main.c");
-       package Compiler is
-          C_Switches := ("-pedantic");
-          for Default_Switches ("C")   use C_Switches;
-          for Default_Switches ("Ada") use ("-gnaty");
-          for Switches ("main.c") use C_Switches & ("-g");
-       end Compiler;
-    end C_Main;
-
-This project has many similarities with the previous one.
-As expected, its `Main` attribute now refers to a C source.
-The attribute *Exec_Dir* is now omitted, thus the resulting
-executable will be put in the directory :file:`obj`.
-
-The most noticeable difference is the use of a variable in the
-*Compiler* package to store settings used in several attributes.
-This avoids text duplication, and eases maintenance (a single place to
-modify if we want to add new switches for C files). We will revisit
-the use of variables in the context of scenarios (see :ref:`Scenarios_in_Projects`).
-
-In this example, we see how the file :file:`main.c` can be compiled with
-the switches used for all the other C files, plus *-g*.
-In this specific situation the use of a variable could have been
-replaced by a reference to the `Default_Switches` attribute:
-
-.. code-block:: gpr
-
-       for Switches ("c_main.c") use Compiler'Default_Switches ("C") & ("-g");
-
-Note the tick (*'*) used to refer to attributes defined in a package.
-
-Here is the output of the GPRbuild command using this project:
-
-.. code-block:: sh
-
-    $ gprbuild -Pc_main
-    gcc -c -pedantic -g main.c
-    gcc -c -gnaty proc.adb
-    gcc -c -gnaty pack.adb
-    gcc -c -pedantic utils.c
-    gprbind main.bexch
-    ...
-    gcc main.o -o main
-
-The default switches for Ada sources,
-the default switches for C sources (in the compilation of :file:`lib.c`),
-and the specific switches for :file:`main.c` have all been taken into
-account.
-
-
-.. _Naming_Schemes:
-
-Naming Schemes
---------------
-
-Sometimes an Ada software system is ported from one compilation environment to
-another (say GNAT), and the file are not named using the default GNAT
-conventions. Instead of changing all the file names, which for a variety of
-reasons might not be possible, you can define the relevant file naming scheme
-in the **Naming** package of your project file.
-
-The naming scheme has two distinct goals for the project manager: it
-allows finding of source files when searching in the source
-directories, and given a source file name it makes it possible to guess
-the associated language, and thus the compiler to use.
-
-Note that the use by the Ada compiler of pragmas Source_File_Name is not
-supported when using project files. You must use the features described in this
-paragraph. You can however specify other configuration pragmas.
-
-The following attributes can be defined in package `Naming`:
-
-.. index:: Casing (GNAT Project Manager)
-
-**Casing**:
-
-  Its value must be one of `"lowercase"` (the default if
-  unspecified), `"uppercase"` or `"mixedcase"`. It describes the
-  casing of file names with regards to the Ada unit name. Given an Ada unit
-  My_Unit, the file name will respectively be :file:`my_unit.adb` (lowercase),
-  :file:`MY_UNIT.ADB` (uppercase) or :file:`My_Unit.adb` (mixedcase).
-  On Windows, file names are case insensitive, so this attribute is
-  irrelevant.
-
-
-.. index:: Dot_Replacement (GNAT Project Manager)
-
-**Dot_Replacement**:
-
-  This attribute specifies the string that should replace the "." in unit
-  names. Its default value is `"-"` so that a unit
-  `Parent.Child` is expected to be found in the file
-  :file:`parent-child.adb`. The replacement string must satisfy the following
-  requirements to avoid ambiguities in the naming scheme:
-
-  * It must not be empty
-
-  * It cannot start or end with an alphanumeric character
-
-  * It cannot be a single underscore
-
-  * It cannot start with an underscore followed by an alphanumeric
-
-  * It cannot contain a dot `'.'` except if the entire string is `"."`
-
-.. index:: Spec_Suffix (GNAT Project Manager)
-.. index:: Specification_Suffix (GNAT Project Manager)
-
-**Spec_Suffix** and **Specification_Suffix**:
-
-  For Ada, these attributes give the suffix used in file names that contain
-  specifications. For other languages, they give the extension for files
-  that contain declaration (header files in C for instance). The attribute
-  is indexed on the language.
-  The two attributes are equivalent, but the latter is obsolescent.
-
-  If the value of the attribute is the empty string, it indicates to the
-  Project Manager that the only specifications/header files for the language
-  are those specified with attributes `Spec` or
-  `Specification_Exceptions`.
-
-  If `Spec_Suffix ("Ada")` is not specified, then the default is
-  `".ads"`.
-
-  A non empty value must satisfy the following requirements:
-
-  * It must include at least one dot
-
-  * If `Dot_Replacement` is a single dot, then it cannot include
-    more than one dot.
-
-.. index:: Body_Suffix (GNAT Project Manager)
-.. index:: Implementation_Suffix (GNAT Project Manager)
-
-**Body_Suffix** and **Implementation_Suffix**:
-
-  These attributes give the extension used for file names that contain
-  code (bodies in Ada). They are indexed on the language. The second
-  version is obsolescent and fully replaced by the first attribute.
-
-  For each language of a project, one of these two attributes need to be
-  specified, either in the project itself or in the configuration project file.
-
-  If the value of the attribute is the empty string, it indicates to the
-  Project Manager that the only source files for the language
-  are those specified with attributes `Body` or
-  `Implementation_Exceptions`.
-
-  These attributes must satisfy the same requirements as `Spec_Suffix`.
-  In addition, they must be different from any of the values in
-  `Spec_Suffix`.
-  If `Body_Suffix ("Ada")` is not specified, then the default is
-  `".adb"`.
-
-  If `Body_Suffix ("Ada")` and `Spec_Suffix ("Ada")` end with the
-  same string, then a file name that ends with the longest of these two
-  suffixes will be a body if the longest suffix is `Body_Suffix ("Ada")`
-  or a spec if the longest suffix is `Spec_Suffix ("Ada")`.
-
-  If the suffix does not start with a '.', a file with a name exactly equal to
-  the suffix will also be part of the project (for instance if you define the
-  suffix as `Makefile.in`, a file called :file:`Makefile.in` will be part
-  of the project. This capability is usually not interesting when building.
-  However, it might become useful when a project is also used to
-  find the list of source files in an editor, like the GNAT Programming System
-  (GPS).
-
-.. index:: Separate_Suffix (GNAT Project Manager)
-
-**Separate_Suffix**:
-
-  This attribute is specific to Ada. It denotes the suffix used in file names
-  that contain separate bodies. If it is not specified, then it defaults to
-  same value as `Body_Suffix ("Ada")`.
-
-  The value of this attribute cannot be the empty string.
-
-  Otherwise, the same rules apply as for the
-  `Body_Suffix` attribute. The only accepted index is "Ada".
-
-
-**Spec** or **Specification**:
-
-  .. index:: Spec (GNAT Project Manager)
-
-  .. index:: Specification (GNAT Project Manager)
-
-  This attribute `Spec` can be used to define the source file name for a
-  given Ada compilation unit's spec. The index is the literal name of the Ada
-  unit (case insensitive). The value is the literal base name of the file that
-  contains this unit's spec (case sensitive or insensitive depending on the
-  operating system). This attribute allows the definition of exceptions to the
-  general naming scheme, in case some files do not follow the usual
-  convention.
-
-  When a source file contains several units, the relative position of the unit
-  can be indicated. The first unit in the file is at position 1
-
-
-  .. code-block:: gpr
-
-       for Spec ("MyPack.MyChild") use "mypack.mychild.spec";
-       for Spec ("top") use "foo.a" at 1;
-       for Spec ("foo") use "foo.a" at 2;
-
-
-.. index:: Body (GNAT Project Manager)
-
-.. index:: Implementation (GNAT Project Manager)
-
-**Body** or **Implementation**:
-
-  These attribute play the same role as *Spec* for Ada bodies.
-
-
-.. index:: Specification_Exceptions (GNAT Project Manager)
-
-.. index:: Implementation_Exceptions (GNAT Project Manager)
-
-**Specification_Exceptions** and **Implementation_Exceptions**:
-
-  These attributes define exceptions to the naming scheme for languages
-  other than Ada. They are indexed on the language name, and contain
-  a list of file names respectively for headers and source code.
-
-
-For example, the following package models the Apex file naming rules:
-
-.. code-block:: gpr
-
-     package Naming is
-       for Casing               use "lowercase";
-       for Dot_Replacement      use ".";
-       for Spec_Suffix ("Ada")  use ".1.ada";
-       for Body_Suffix ("Ada")  use ".2.ada";
-     end Naming;
-
-
-.. _Installation:
-
-Installation
-------------
-
-After building an application or a library it is often required to
-install it into the development environment. For instance this step is
-required if the library is to be used by another application.
-The *gprinstall* tool provides an easy way to install
-libraries, executable or object code generated during the build. The
-**Install** package can be used to change the default locations.
-
-The following attributes can be defined in package `Install`:
-
-.. index:: Active (GNAT Project Manager)
-
-**Active**
-  Whether the project is to be installed, values are `true`
-  (default) or `false`.
-
-
-.. index:: Artifacts (GNAT Project Manager)
-
-**Artifacts**
-
-  An array attribute to declare a set of files not part of the sources
-  to be installed. The array discriminant is the directory where the
-  file is to be installed. If a relative directory then Prefix (see
-  below) is prepended. Note also that if the same file name occurs
-  multiple time in the attribute list, the last one will be the one
-  installed.
-
-
-.. index:: Prefix (GNAT Project Manager)
-
-**Prefix**:
-
-  Root directory for the installation.
-
-
-**Exec_Subdir**
-
-  Subdirectory of **Prefix** where executables are to be
-  installed. Default is **bin**.
-
-
-**Lib_Subdir**
-
-  Subdirectory of **Prefix** where directory with the library or object
-  files is to be installed. Default is **lib**.
-
-
-**Sources_Subdir**
-
-  Subdirectory of **Prefix** where directory with sources is to be
-  installed. Default is **include**.
-
-
-**Project_Subdir**
-
-  Subdirectory of **Prefix** where the generated project file is to be
-  installed. Default is **share/gpr**.
-
-
-**Mode**
-
-  The installation mode, it is either **dev** (default) or **usage**.
-  See **gprbuild** user's guide for details.
-
-
-**Install_Name**
-
-  Specify the name to use for recording the installation. The default is
-  the project name without the extension.
-
-
-.. _Distributed_support:
-
-Distributed support
--------------------
-
-For large projects the compilation time can become a limitation in
-the development cycle. To cope with that, GPRbuild supports
-distributed compilation.
-
-The following attributes can be defined in package `Remote`:
-
-.. index:: Root_Dir (GNAT Project Manager)
-
-**Root_Dir**:
-
-  Root directory of the project's sources. The default value is the
-  project's directory.
-
-
-.. _Organizing_Projects_into_Subsystems:
-
-Organizing Projects into Subsystems
-===================================
-
-A **subsystem** is a coherent part of the complete system to be built. It is
-represented by a set of sources and one single object directory. A system can
-be composed of a single subsystem when it is simple as we have seen in the
-first section. Complex systems are usually composed of several interdependent
-subsystems. A subsystem is dependent on another subsystem if knowledge of the
-other one is required to build it, and in particular if visibility on some of
-the sources of this other subsystem is required. Each subsystem is usually
-represented by its own project file.
-
-In this section, the previous example is being extended. Let's assume some
-sources of our `Build` project depend on other sources.
-For instance, when building a graphical interface, it is usual to depend upon
-a graphical library toolkit such as GtkAda. Furthermore, we also need
-sources from a logging module we had previously written.
-
-.. _Project_Dependencies:
-
-Project Dependencies
---------------------
-
-GtkAda comes with its own project file (appropriately called
-:file:`gtkada.gpr`), and we will assume we have already built a project
-called :file:`logging.gpr` for the logging module. With the information provided
-so far in :file:`build.gpr`, building the application would fail with an error
-indicating that the gtkada and logging units that are relied upon by the sources
-of this project cannot be found.
-
-This is solved by adding the following **with** clauses at the beginning of our
-project:
-
-.. code-block:: gpr
-
-     with "gtkada.gpr";
-     with "a/b/logging.gpr";
-     project Build is
-       ...  --  as before
-     end Build;
-
-
-.. index:: Externally_Built (GNAT Project Manager)
-
-When such a project is compiled, *gprbuild* will automatically check
-the other projects and recompile their sources when needed. It will also
-recompile the sources from `Build` when needed, and finally create the
-executable. In some cases, the implementation units needed to recompile a
-project are not available, or come from some third party and you do not want to
-recompile it yourself. In this case, set the attribute **Externally_Built** to
-"true", indicating to the builder that this project can be assumed to be
-up-to-date, and should not be considered for recompilation. In Ada, if the
-sources of this externally built project were compiled with another version of
-the compiler or with incompatible options, the binder will issue an error.
-
-The project's |with| clause has several effects. It provides source
-visibility between projects during the compilation process. It also guarantees
-that the necessary object files from `Logging` and `GtkAda` are
-available when linking `Build`.
-
-As can be seen in this example, the syntax for importing projects is similar
-to the syntax for importing compilation units in Ada. However, project files
-use literal strings instead of names, and the |with| clause identifies
-project files rather than packages.
-
-Each literal string after |with| is the path
-(absolute or relative) to a project file. The `.gpr` extension is
-optional, although we recommend adding it. If no extension is specified,
-and no project file with the :file:`.gpr` extension is found, then
-the file is searched for exactly as written in the |with| clause,
-that is with no extension.
-
-As mentioned above, the path after a |with| has to be a literal
-string, and you cannot use concatenation, or lookup the value of external
-variables to change the directories from which a project is loaded.
-A solution if you need something like this is to use aggregate projects
-(see :ref:`Aggregate_Projects`).
-
-.. index:: project path (GNAT Project Manager)
-
-When a relative path or a base name is used, the
-project files are searched relative to each of the directories in the
-**project path**. This path includes all the directories found with the
-following algorithm, in this order; the first matching file is used:
-
-* First, the file is searched relative to the directory that contains the
-  current project file.
-
-  .. index:: GPR_PROJECT_PATH_FILE (GNAT Project Manager)
-  .. index:: GPR_PROJECT_PATH (GNAT Project Manager)
-  .. index:: ADA_PROJECT_PATH (GNAT Project Manager)
-
-* Then it is searched relative to all the directories specified in the
-  environment variables **GPR_PROJECT_PATH_FILE**,
-  **GPR_PROJECT_PATH** and **ADA_PROJECT_PATH** (in that order) if they exist.
-  The value of **GPR_PROJECT_PATH_FILE**, when defined, is the path name of
-  a text file that contains project directory path names, one per line.
-  **GPR_PROJECT_PATH** and **ADA_PROJECT_PATH**, when defined, contain
-  project directory path names separated by directory separators.
-  **ADA_PROJECT_PATH** is used for compatibility, it is recommended to
-  use **GPR_PROJECT_PATH_FILE** or **GPR_PROJECT_PATH**.
-
-* Finally, it is searched relative to the default project directories.
-  Such directories depend on the tool used. The locations searched in the
-  specified order are:
-
-  * :file:`<prefix>/<target>/lib/gnat` if option *--target* is specified
-  * :file:`<prefix>/<target>/share/gpr` if option *--target* is specified
-  * :file:`<prefix>/share/gpr/`
-  * :file:`<prefix>/lib/gnat/`
-
-  In our example, :file:`gtkada.gpr` is found in the predefined directory if
-  it was installed at the same root as GNAT.
-
-Some tools also support extending the project path from the command line,
-generally through the *-aP*. You can see the value of the project
-path by using the *gnatls -v* command.
-
-Any symbolic link will be fully resolved in the directory of the
-importing project file before the imported project file is examined.
-
-Any source file in the imported project can be used by the sources of the
-importing project, transitively.
-Thus if `A` imports `B`, which imports `C`, the sources of
-`A` may depend on the sources of `C`, even if `A` does not
-import `C` explicitly. However, this is not recommended, because if
-and when `B` ceases to import `C`, some sources in `A` will
-no longer compile. *gprbuild* has a switch *--no-indirect-imports*
-that will report such indirect dependencies.
-
-.. note::
-
-   One very important aspect of a project hierarchy is that
-   **a given source can only belong to one project** (otherwise the project manager
-   would not know which settings apply to it and when to recompile it). It means
-   that different project files do not usually share source directories or
-   when they do, they need to specify precisely which project owns which sources
-   using attribute `Source_Files` or equivalent. By contrast, 2 projects
-   can each own a source with the same base file name as long as they live in
-   different directories. The latter is not true for Ada Sources because of the
-   correlation between source files and Ada units.
-
-.. _Cyclic_Project_Dependencies:
-
-Cyclic Project Dependencies
----------------------------
-
-Cyclic dependencies are mostly forbidden:
-if `A` imports `B` (directly or indirectly) then `B`
-is not allowed to import `A`. However, there are cases when cyclic
-dependencies would be beneficial. For these cases, another form of import
-between projects exists: the **limited with**.  A project `A` that
-imports a project `B` with a straight |with| may also be imported,
-directly or indirectly, by `B` through a `limited with`.
-
-The difference between straight |with| and `limited with` is that
-the name of a project imported with a `limited with` cannot be used in the
-project importing it. In particular, its packages cannot be renamed and
-its variables cannot be referred to.
-
-.. code-block:: gpr
-
-     with "b.gpr";
-     with "c.gpr";
-     project A is
-         for Exec_Dir use B'Exec_Dir; -- ok
-     end A;
-
-     limited with "a.gpr";   --  Cyclic dependency: A -> B -> A
-     project B is
-        for Exec_Dir use A'Exec_Dir; -- not ok
-     end B;
-
-     with "d.gpr";
-     project C is
-     end C;
-
-     limited with "a.gpr";  --  Cyclic dependency: A -> C -> D -> A
-     project D is
-        for Exec_Dir use A'Exec_Dir; -- not ok
-     end D;
-
-
-.. _Sharing_Between_Projects:
-
-Sharing Between Projects
-------------------------
-
-When building an application, it is common to have similar needs in several of
-the projects corresponding to the subsystems under construction. For instance,
-they will all have the same compilation switches.
-
-As seen before (see :ref:`Tools_Options_in_Project_Files`), setting compilation
-switches for all sources of a subsystem is simple: it is just a matter of
-adding a `Compiler.Default_Switches` attribute to each project files with
-the same value. Of course, that means duplication of data, and both places need
-to be changed in order to recompile the whole application with different
-switches. It can become a real problem if there are many subsystems and thus
-many project files to edit.
-
-There are two main approaches to avoiding this duplication:
-
-* Since :file:`build.gpr` imports :file:`logging.gpr`, we could change it
-  to reference the attribute in Logging, either through a package renaming,
-  or by referencing the attribute. The following example shows both cases:
-
-  .. code-block:: gpr
-
-      project Logging is
-         package Compiler is
-            for Switches ("Ada")
-                use ("-O2");
-         end Compiler;
-         package Binder is
-            for Switches ("Ada")
-                use ("-E");
-         end Binder;
-      end Logging;
-
-      with "logging.gpr";
-      project Build is
-         package Compiler renames Logging.Compiler;
-         package Binder is
-            for Switches ("Ada") use Logging.Binder'Switches ("Ada");
-         end Binder;
-      end Build;
-
-  The solution used for `Compiler` gets the same value for all
-  attributes of the package, but you cannot modify anything from the
-  package (adding extra switches or some exceptions). The second
-  version is more flexible, but more verbose.
-
-  If you need to refer to the value of a variable in an imported
-  project, rather than an attribute, the syntax is similar but uses
-  a "." rather than an apostrophe. For instance:
-
-  .. code-block:: gpr
-
-      with "imported";
-      project Main is
-         Var1 := Imported.Var;
-      end Main;
-
-* The second approach is to define the switches in a third project.
-  That project is set up without any sources (so that, as opposed to
-  the first example, none of the project plays a special role), and
-  will only be used to define the attributes. Such a project is
-  typically called :file:`shared.gpr`.
-
-  .. code-block:: gpr
-
-      abstract project Shared is
-         for Source_Files use ();   --  no sources
-         package Compiler is
-            for Switches ("Ada")
-                use ("-O2");
-         end Compiler;
-      end Shared;
-
-      with "shared.gpr";
-      project Logging is
-         package Compiler renames Shared.Compiler;
-      end Logging;
-
-      with "shared.gpr";
-      project Build is
-         package Compiler renames Shared.Compiler;
-      end Build;
-
-  As for the first example, we could have chosen to set the attributes
-  one by one rather than to rename a package. The reason we explicitly
-  indicate that `Shared` has no sources is so that it can be created
-  in any directory and we are sure it shares no sources with `Build`
-  or `Logging`, which of course would be invalid.
-
-  .. index:: project qualifier (GNAT Project Manager)
-
-  Note the additional use of the **abstract** qualifier in :file:`shared.gpr`.
-  This qualifier is optional, but helps convey the message that we do not
-  intend this project to have sources (see :ref:`Qualified_Projects` for
-  more qualifiers).
-
-
-.. _Global_Attributes:
-
-Global Attributes
------------------
-
-We have already seen many examples of attributes used to specify a special
-option of one of the tools involved in the build process. Most of those
-attributes are project specific. That it to say, they only affect the invocation
-of tools on the sources of the project where they are defined.
-
-There are a few additional attributes that apply to all projects in a
-hierarchy as long as they are defined on the "main" project.
-The main project is the project explicitly mentioned on the command-line.
-The project hierarchy is the "with"-closure of the main project.
-
-Here is a list of commonly used global attributes:
-
-.. index:: Global_Configuration_Pragmas (GNAT Project Manager)
-
-**Builder.Global_Configuration_Pragmas**:
-
-  This attribute points to a file that contains configuration pragmas
-  to use when building executables. These pragmas apply for all
-  executables built from this project hierarchy. As we have seen before,
-  additional pragmas can be specified on a per-project basis by setting the
-  `Compiler.Local_Configuration_Pragmas` attribute.
-
-.. index:: Global_Compilation_Switches (GNAT Project Manager)
-
-**Builder.Global_Compilation_Switches**:
-
-  This attribute is a list of compiler switches to use when compiling any
-  source file in the project hierarchy. These switches are used in addition
-  to the ones defined in the `Compiler` package, which only apply to
-  the sources of the corresponding project. This attribute is indexed on
-  the name of the language.
-
-Using such global capabilities is convenient. It can also lead to unexpected
-behavior. Especially when several subsystems are shared among different main
-projects and the different global attributes are not
-compatible. Note that using aggregate projects can be a safer and more powerful
-replacement to global attributes.
-
-.. _Scenarios_in_Projects:
-
-Scenarios in Projects
-=====================
-
-Various aspects of the projects can be modified based on **scenarios**. These
-are user-defined modes that change the behavior of a project. Typical
-examples are the setup of platform-specific compiler options, or the use of
-a debug and a release mode (the former would activate the generation of debug
-information, while the second will focus on improving code optimization).
-
-Let's enhance our example to support debug and release modes. The issue is to
-let the user choose what kind of system he is building: use *-g* as
-compiler switches in debug mode and *-O2* in release mode. We will also
-set up the projects so that we do not share the same object directory in both
-modes; otherwise switching from one to the other might trigger more
-recompilations than needed or mix objects from the two modes.
-
-One naive approach is to create two different project files, say
-:file:`build_debug.gpr` and :file:`build_release.gpr`, that set the appropriate
-attributes as explained in previous sections. This solution does not scale
-well, because in the presence of multiple projects depending on each other, you
-will also have to duplicate the complete hierarchy and adapt the project files
-to point to the right copies.
-
-.. index:: scenarios (GNAT Project Manager)
-
-Instead, project files support the notion of scenarios controlled
-by external values. Such values can come from several sources (in decreasing
-order of priority):
-
-.. index:: -X (usage with GNAT Project Manager)
-
-**Command line**:
-  When launching *gprbuild*, the user can pass
-  extra *-X* switches to define the external value. In
-  our case, the command line might look like
-
-  .. code-block:: sh
-
-         gprbuild -Pbuild.gpr -Xmode=release
-
-
-**Environment variables**:
-  When the external value does not come from the command line, it can come from
-  the value of environment variables of the appropriate name.
-  In our case, if an environment variable called "mode"
-  exists, its value will be taken into account.
-
-
-
-.. index:: external (GNAT Project Manager)
-
-**External function second parameter**.
-
-We now need to get that value in the project. The general form is to use
-the predefined function **external** which returns the current value of
-the external. For instance, we could set up the object directory to point to
-either :file:`obj/debug` or :file:`obj/release` by changing our project to
-
-.. code-block:: gpr
-
-     project Build is
-         for Object_Dir use "obj/" & external ("mode", "debug");
-         ... --  as before
-     end Build;
-
-The second parameter to `external` is optional, and is the default
-value to use if "mode" is not set from the command line or the environment.
-
-In order to set the switches according to the different scenarios, other
-constructs have to be introduced such as typed variables and case constructions.
-
-.. index:: typed variable (GNAT Project Manager)
-.. index:: case construction (GNAT Project Manager)
-
-A **typed variable** is a variable that
-can take only a limited number of values, similar to an enumeration in Ada.
-Such a variable can then be used in a **case construction** and create conditional
-sections in the project. The following example shows how this can be done:
-
-.. code-block:: gpr
-
-     project Build is
-        type Mode_Type is ("debug", "release");  --  all possible values
-        Mode : Mode_Type := external ("mode", "debug"); -- a typed variable
-
-        package Compiler is
-           case Mode is
-              when "debug" =>
-                 for Switches ("Ada")
-                     use ("-g");
-              when "release" =>
-                 for Switches ("Ada")
-                     use ("-O2");
-           end case;
-        end Compiler;
-     end Build;
-
-The project has suddenly grown in size, but has become much more flexible.
-`Mode_Type` defines the only valid values for the `mode` variable. If
-any other value is read from the environment, an error is reported and the
-project is considered as invalid.
-
-The `Mode` variable is initialized with an external value
-defaulting to `"debug"`. This default could be omitted and that would
-force the user to define the value. Finally, we can use a case construction to set the
-switches depending on the scenario the user has chosen.
-
-Most aspects of the projects can depend on scenarios. The notable exception
-are project dependencies (|with| clauses), which cannot depend on a scenario.
-
-Scenarios work the same way with **project hierarchies**: you can either
-duplicate a variable similar to `Mode` in each of the project (as long
-as the first argument to `external` is always the same and the type is
-the same), or simply set the variable in the :file:`shared.gpr` project
-(see :ref:`Sharing_Between_Projects`).
-
-
-.. _Library_Projects:
-
-Library Projects
-================
-
-So far, we have seen examples of projects that create executables. However,
-it is also possible to create libraries instead. A **library** is a specific
-type of subsystem where, for convenience, objects are grouped together
-using system-specific means such as archives or windows DLLs.
-
-Library projects provide a system- and language-independent way of building
-both **static** and **dynamic** libraries. They also support the concept of
-**standalone libraries** (SAL) which offer two significant properties: the
-elaboration (e.g. initialization) of the library is either automatic or
-very simple; a change in the
-implementation part of the library implies minimal post-compilation actions on
-the complete system and potentially no action at all for the rest of the
-system in the case of dynamic SALs.
-
-There is a restriction on shared library projects: by default, they are only
-allowed to import other shared library projects. They are not allowed to
-import non library projects or static library projects.
-
-The GNAT Project Manager takes complete care of the library build, rebuild and
-installation tasks, including recompilation of the source files for which
-objects do not exist or are not up to date, assembly of the library archive, and
-installation of the library (i.e., copying associated source, object and
-:file:`ALI` files to the specified location).
-
-
-.. _Building_Libraries:
-
-Building Libraries
-------------------
-
-Let's enhance our example and transform the `logging` subsystem into a
-library.  In order to do so, a few changes need to be made to
-:file:`logging.gpr`.  Some attributes need to be defined: at least
-`Library_Name` and `Library_Dir`; in addition, some other attributes
-can be used to specify specific aspects of the library. For readability, it is
-also recommended (although not mandatory), to use the qualifier `library`
-in front of the `project` keyword.
-
-.. index:: Library_Name (GNAT Project Manager)
-
-**Library_Name**:
-
-  This attribute is the name of the library to be built. There is no
-  restriction on the name of a library imposed by the project manager, except
-  for stand-alone libraries whose names must follow the syntax of Ada
-  identifiers; however, there may be system-specific restrictions on the name.
-  In general, it is recommended to stick to alphanumeric characters (and
-  possibly single underscores) to help portability.
-
-.. index:: Library_Dir (GNAT Project Manager)
-
-**Library_Dir**:
-
-  This attribute  is the path (absolute or relative) of the directory where
-  the library is to be installed. In the process of building a library,
-  the sources are compiled, the object files end up  in the explicit or
-  implicit `Object_Dir` directory. When all sources of a library
-  are compiled, some of the compilation artifacts, including the library itself,
-  are copied to the library_dir directory. This directory must exist and be
-  writable. It must also be different from the object directory so that cleanup
-  activities in the Library_Dir do not affect recompilation needs.
-
-Here is the new version of :file:`logging.gpr` that makes it a library:
-
-.. code-block:: gpr
-
-     library project Logging is          --  "library" is optional
-        for Library_Name use "logging";  --  will create "liblogging.a" on Unix
-        for Object_Dir   use "obj";
-        for Library_Dir  use "lib";      --  different from object_dir
-     end Logging;
-
-Once the above two attributes are defined, the library project is valid and
-is enough for building a library with default characteristics.
-Other library-related attributes can be used to change the defaults:
-
-.. index:: Library_Kind (GNAT Project Manager)
-
-**Library_Kind**:
-
-  The value of this attribute must be either `"static"`, `"dynamic"` or
-  `"relocatable"` (the latter is a synonym for dynamic). It indicates
-  which kind of library should be built (the default is to build a
-  static library, that is an archive of object files that can potentially
-  be linked into a static executable). When the library is set to be dynamic,
-  a separate image is created that will be loaded independently, usually
-  at the start of the main program execution. Support for dynamic libraries is
-  very platform specific, for instance on Windows it takes the form of a DLL
-  while on GNU/Linux, it is a dynamic elf image whose suffix is usually
-  :file:`.so`. Library project files, on the other hand, can be written in
-  a platform independent way so that the same project file can be used to build
-  a library on different operating systems.
-
-  If you need to build both a static and a dynamic library, it is recommended
-  to use two different object directories, since in some cases some extra code
-  needs to be generated for the latter. For such cases, one can either define
-  two different project files, or a single one that uses scenarios to indicate
-  the various kinds of library to be built and their corresponding object_dir.
-
-.. index:: Library_ALI_Dir (GNAT Project Manager)
-
-**Library_ALI_Dir**:
-
-  This attribute may be specified to indicate the directory where the ALI
-  files of the library are installed. By default, they are copied into the
-  `Library_Dir` directory, but as for the executables where we have a
-  separate `Exec_Dir` attribute, you might want to put them in a separate
-  directory since there can be hundreds of them. The same restrictions as for
-  the `Library_Dir` attribute apply.
-
-.. index:: Library_Version (GNAT Project Manager)
-
-**Library_Version**:
-
-  This attribute is platform dependent, and has no effect on Windows.
-  On Unix, it is used only for dynamic libraries as the internal
-  name of the library (the `"soname"`). If the library file name (built
-  from the `Library_Name`) is different from the `Library_Version`,
-  then the library file will be a symbolic link to the actual file whose name
-  will be `Library_Version`. This follows the usual installation schemes
-  for dynamic libraries on many Unix systems.
-
-  .. code-block:: gpr
-
-      project Logging is
-         Version := "1";
-         for Library_Dir use "lib";
-         for Library_Name use "logging";
-         for Library_Kind use "dynamic";
-         for Library_Version use "liblogging.so." & Version;
-      end Logging;
-
-
-  After the compilation, the directory :file:`lib` will contain both a
-  :file:`libdummy.so.1` library and a symbolic link to it called
-  :file:`libdummy.so`.
-
-.. index:: Library_GCC (GNAT Project Manager)
-
-**Library_GCC**:
-
-  This attribute is the name of the tool to use instead of "gcc" to link shared
-  libraries. A common use of this attribute is to define a wrapper script that
-  accomplishes specific actions before calling gcc (which itself calls the
-  linker to build the library image).
-
-.. index:: Library_Options (GNAT Project Manager)
-
-**Library_Options**:
-
-  This attribute may be used to specify additional switches (last switches)
-  when linking a shared library.
-
-  It may also be used to add foreign object files to a static library.
-  Each string in Library_Options is an absolute or relative path of an object
-  file. When a relative path, it is relative to the object directory.
-
-.. index:: Leading_Library_Options (GNAT Project Manager)
-
-**Leading_Library_Options**:
-
-  This attribute, that is taken into account only by *gprbuild*, may be
-  used to specified leading options (first switches) when linking a shared
-  library.
-
-.. index:: Linker_Options (GNAT Project Manager)
-
-**Linker.Linker_Options**:
-
-  This attribute specifies additional switches to be given to the linker when
-  linking an executable. It is ignored when defined in the main project and
-  taken into account in all other projects that are imported directly or
-  indirectly. These switches complement the `Linker.Switches`
-  defined in the main project. This is useful when a particular subsystem
-  depends on an external library: adding this dependency as a
-  `Linker_Options` in the project of the subsystem is more convenient than
-  adding it to all the `Linker.Switches` of the main projects that depend
-  upon this subsystem.
-
-
-.. _Using_Library_Projects:
-
-Using Library Projects
-----------------------
-
-When the builder detects that a project file is a library project file, it
-recompiles all sources of the project that need recompilation and rebuild the
-library if any of the sources have been recompiled. It then groups all object
-files into a single file, which is a shared or a static library. This library
-can later on be linked with multiple executables. Note that the use
-of shard libraries reduces the size of the final executable and can also reduce
-the memory footprint at execution time when the library is shared among several
-executables.
-
-*gprbuild also allows to build **multi-language libraries** when specifying
-sources from multiple languages.
-
-A non-library project can import a library project. When the builder is invoked
-on the former, the library of the latter is only rebuilt when absolutely
-necessary. For instance, if a unit of the library is not up-to-date but none of
-the executables need this unit, then the unit is not recompiled and the library
-is not reassembled.  For instance, let's assume in our example that logging has
-the following sources: :file:`log1.ads`, :file:`log1.adb`, :file:`log2.ads` and
-:file:`log2.adb`. If :file:`log1.adb` has been modified, then the library
-:file:`liblogging` will be rebuilt when compiling all the sources of
-`Build` only if :file:`proc.ads`, :file:`pack.ads` or :file:`pack.adb`
-include a `"with Log1"`.
-
-To ensure that all the sources in the `Logging` library are
-up to date, and that all the sources of `Build` are also up to date,
-the following two commands need to be used:
-
-.. code-block:: sh
-
-     gprbuild -Plogging.gpr
-     gprbuild -Pbuild.gpr
-
-All :file:`ALI` files will also be copied from the object directory to the
-library directory. To build executables, *gprbuild* will use the
-library rather than the individual object files.
-
-Library projects can also be useful to describe a library that needs to be used
-but, for some reason, cannot be rebuilt. For instance, it is the case when some
-of the library sources are not available. Such library projects need to use the
-`Externally_Built` attribute as in the example below:
-
-.. code-block:: gpr
-
-     library project Extern_Lib is
-        for Languages    use ("Ada", "C");
-        for Source_Dirs  use ("lib_src");
-        for Library_Dir  use "lib2";
-        for Library_Kind use "dynamic";
-        for Library_Name use "l2";
-        for Externally_Built use "true";  --  <<<<
-     end Extern_Lib;
-
-In the case of externally built libraries, the `Object_Dir`
-attribute does not need to be specified because it will never be
-used.
-
-The main effect of using such an externally built library project is mostly to
-affect the linker command in order to reference the desired library. It can
-also be achieved by using `Linker.Linker_Options` or `Linker.Switches`
-in the project corresponding to the subsystem needing this external library.
-This latter method is more straightforward in simple cases but when several
-subsystems depend upon the same external library, finding the proper place
-for the `Linker.Linker_Options` might not be easy and if it is
-not placed properly, the final link command is likely to present ordering issues.
-In such a situation, it is better to use the externally built library project
-so that all other subsystems depending on it can declare this dependency thanks
-to a project |with| clause, which in turn will trigger the builder to find
-the proper order of libraries in the final link command.
-
-
-.. _Stand-alone_Library_Projects:
-
-Stand-alone Library Projects
-----------------------------
-
-.. index:: standalone libraries (usage with GNAT Project Manager)
-
-A **stand-alone library** is a library that contains the necessary code to
-elaborate the Ada units that are included in the library. A stand-alone
-library is a convenient way to add an Ada subsystem to a more global system
-whose main is not in Ada since it makes the elaboration of the Ada part mostly
-transparent. However, stand-alone libraries are also useful when the main is in
-Ada: they provide a means for minimizing relinking & redeployment of complex
-systems when localized changes are made.
-
-The name of a stand-alone library, specified with attribute
-`Library_Name`, must have the syntax of an Ada identifier.
-
-The most prominent characteristic of a stand-alone library is that it offers a
-distinction between interface units and implementation units. Only the former
-are visible to units outside the library. A stand-alone library project is thus
-characterised by a third attribute, usually **Library_Interface**, in addition
-to the two attributes that make a project a Library Project
-(`Library_Name` and `Library_Dir`). This third attribute may also be
-**Interfaces**. **Library_Interface** only works when the interface is in Ada
-and takes a list of units as parameter. **Interfaces** works for any supported
-language and takes a list of sources as parameter.
-
-.. index:: Library_Interface (GNAT Project Manager)
-
-**Library_Interface**:
-
-  This attribute defines an explicit subset of the units of the project. Units
-  from projects importing this library project may only "with" units whose
-  sources are listed in the `Library_Interface`. Other sources are
-  considered implementation units.
-
-  .. code-block:: gpr
-
-     for Library_Dir use "lib";
-     for Library_Name use "logging";
-     for Library_Interface use ("lib1", "lib2");  --  unit names
-
-**Interfaces**
-
-  This attribute defines an explicit subset of the source files of a project.
-  Sources from projects importing this project, can only depend on sources from
-  this subset. This attribute can be used on non library projects. It can also
-  be used as a replacement for attribute `Library_Interface`, in which
-  case, units have to be replaced by source files. For multi-language library
-  projects, it is the only way to make the project a Stand-Alone Library project
-  whose interface is not purely Ada.
-
-
-.. index:: Library_Standalone (GNAT Project Manager)
-
-**Library_Standalone**:
-
-  This attribute defines the kind of standalone library to
-  build. Values are either `standard` (the default), `no` or
-  `encapsulated`. When `standard` is used the code to elaborate and
-  finalize the library is embedded, when `encapsulated` is used the
-  library can furthermore depend only on static libraries (including
-  the GNAT runtime). This attribute can be set to `no` to make it clear
-  that the library should not be standalone in which case the
-  `Library_Interface` should not defined. Note that this attribute
-  only applies to shared libraries, so `Library_Kind` must be set
-  to `dynamic`.
-
-  .. code-block:: gpr
-
-     for Library_Dir use "lib";
-     for Library_Name use "logging";
-     for Library_Kind use "dynamic";
-     for Library_Interface use ("lib1", "lib2");  --  unit names
-     for Library_Standalone use "encapsulated";
-
-In order to include the elaboration code in the stand-alone library, the binder
-is invoked on the closure of the library units creating a package whose name
-depends on the library name (b~logging.ads/b in the example).
-This binder-generated package includes **initialization** and **finalization**
-procedures whose names depend on the library name (`logginginit` and
-`loggingfinal` in the example). The object corresponding to this package is
-included in the library.
-
-.. index:: Library_Auto_Init (GNAT Project Manager)
-
-**Library_Auto_Init**:
-
-  A dynamic stand-alone Library is automatically initialized
-  if automatic initialization of Stand-alone Libraries is supported on the
-  platform and if attribute **Library_Auto_Init** is not specified or
-  is specified with the value "true". A static Stand-alone Library is never
-  automatically initialized. Specifying "false" for this attribute
-  prevents automatic initialization.
-
-  When a non-automatically initialized stand-alone library is used in an
-  executable, its initialization procedure must be called before any service of
-  the library is used. When the main subprogram is in Ada, it may mean that the
-  initialization procedure has to be called during elaboration of another
-  package.
-
-
-.. index:: Library_Dir (GNAT Project Manager)
-
-**Library_Dir**:
-
-  For a stand-alone library, only the :file:`ALI` files of the interface units
-  (those that are listed in attribute `Library_Interface`) are copied to
-  the library directory. As a consequence, only the interface units may be
-  imported from Ada units outside of the library. If other units are imported,
-  the binding phase will fail.
-
-
-**Binder.Default_Switches**:
-
-  When a stand-alone library is bound, the switches that are specified in
-  the attribute **Binder.Default_Switches ("Ada")** are
-  used in the call to *gnatbind*.
-
-
-.. index:: Library_Src_Dir (GNAT Project Manager)
-
-**Library_Src_Dir**:
-
-  This attribute defines the location (absolute or relative to the project
-  directory) where the sources of the interface units are copied at
-  installation time.
-  These sources includes the specs of the interface units along with the
-  closure of sources necessary to compile them successfully. That may include
-  bodies and subunits, when pragmas `Inline` are used, or when there are
-  generic units in specs. This directory cannot point to the object directory
-  or one of the source directories, but it can point to the library directory,
-  which is the default value for this attribute.
-
-
-.. index:: Library_Symbol_Policy (GNAT Project Manager)
-
-**Library_Symbol_Policy**:
-
-  This attribute controls the export of symbols and, on some platforms (like
-  VMS) that have the notions of major and minor IDs built in the library
-  files, it controls the setting of these IDs. It is not supported on all
-  platforms (where it will just have no effect). It may have one of the
-  following values:
-
-  *  `"autonomous"` or `"default"`: exported symbols are not controlled
-
-  * `"compliant"`: if attribute **Library_Reference_Symbol_File**
-    is not defined, then it is equivalent to policy "autonomous". If there
-    are exported symbols in the reference symbol file that are not in the
-    object files of the interfaces, the major ID of the library is increased.
-    If there are symbols in the object files of the interfaces that are not
-    in the reference symbol file, these symbols are put at the end of the list
-    in the newly created symbol file and the minor ID is increased.
-
-  * `"controlled"`: the attribute **Library_Reference_Symbol_File** must be
-    defined. The library will fail to build if the exported symbols in the
-    object files of the interfaces do not match exactly the symbol in the
-    symbol file.
-
-  * `"restricted"`: The attribute **Library_Symbol_File** must be defined.
-    The library will fail to build if there are symbols in the symbol file that
-    are not in the exported symbols of the object files of the interfaces.
-    Additional symbols in the object files are not added to the symbol file.
-
-  * `"direct"`: The attribute **Library_Symbol_File** must be defined and
-    must designate an existing file in the object directory. This symbol file
-    is passed directly to the underlying linker without any symbol processing.
-
-
-.. index:: Library_Reference_Symbol_File (GNAT Project Manager)
-
-**Library_Reference_Symbol_File**
-
-  This attribute may define the path name of a reference symbol file that is
-  read when the symbol policy is either "compliant" or "controlled", on
-  platforms that support symbol control, such as VMS, when building a
-  stand-alone library. The path may be an absolute path or a path relative
-  to the project directory.
-
-
-.. index:: Library_Symbol_File (GNAT Project Manager)
-
-**Library_Symbol_File**
-
-  This attribute may define the name of the symbol file to be created when
-  building a stand-alone library when the symbol policy is either "compliant",
-  "controlled" or "restricted", on platforms that support symbol control,
-  such as VMS. When symbol policy is "direct", then a file with this name
-  must exist in the object directory.
-
-
-.. _Installing_a_library_with_project_files:
-
-Installing a library with project files
----------------------------------------
-
-When using project files, a usable version of the library is created in the
-directory specified by the `Library_Dir` attribute of the library
-project file. Thus no further action is needed in order to make use of
-the libraries that are built as part of the general application build.
-
-You may want to install a library in a context different from where the library
-is built. This situation arises with third party suppliers, who may want
-to distribute a library in binary form where the user is not expected to be
-able to recompile the library. The simplest option in this case is to provide
-a project file slightly different from the one used to build the library, by
-using the `externally_built` attribute. See :ref:`Using_Library_Projects`
-
-Another option is to use *gprinstall* to install the library in a
-different context than the build location. *gprinstall* automatically
-generates a project to use this library, and also copies the minimum set of
-sources needed to use the library to the install location.
-:ref:`Installation`
-
-
-.. _Project_Extension:
-
-Project Extension
-=================
-
-During development of a large system, it is sometimes necessary to use
-modified versions of some of the source files, without changing the original
-sources. This can be achieved through the **project extension** facility.
-
-Suppose for instance that our example `Build` project is built every night
-for the whole team, in some shared directory. A developer usually needs to work
-on a small part of the system, and might not want to have a copy of all the
-sources and all the object files (mostly because that would require too much
-disk space, time to recompile everything). He prefers to be able to override
-some of the source files in his directory, while taking advantage of all the
-object files generated at night.
-
-Another example can be taken from large software systems, where it is common to have
-multiple implementations of a common interface; in Ada terms, multiple
-versions of a package body for the same spec.  For example, one implementation
-might be safe for use in tasking programs, while another might be used only
-in sequential applications.  This can be modeled in GNAT using the concept
-of *project extension*.  If one project (the 'child') *extends*
-another project (the 'parent') then by default all source files of the
-parent project are inherited by the child, but the child project can
-override any of the parent's source files with new versions, and can also
-add new files or remove unnecessary ones.
-This facility is the project analog of a type extension in
-object-oriented programming.  Project hierarchies are permitted (an extending
-project may itself be extended), and a project that
-extends a project can also import other projects.
-
-A third example is that of using project extensions to provide different
-versions of the same system. For instance, assume that a `Common`
-project is used by two development branches. One of the branches has now
-been frozen, and no further change can be done to it or to `Common`.
-However, the other development branch still needs evolution of `Common`.
-Project extensions provide a flexible solution to create a new version
-of a subsystem while sharing and reusing as much as possible from the original
-one.
-
-A project extension implicitly inherits all the sources and objects from the
-project it extends. It is possible to create a new version of some of the
-sources in one of the additional source directories of the extending
-project. Those new versions hide the original versions. Adding new sources or
-removing existing ones is also possible. Here is an example on how to extend
-the project `Build` from previous examples:
-
-.. code-block:: gpr
-
-     project Work extends "../bld/build.gpr" is
-     end Work;
-
-The project after **extends** is the one being extended. As usual, it can be
-specified using an absolute path, or a path relative to any of the directories
-in the project path (see :ref:`Project_Dependencies`). This project does not
-specify source or object directories, so the default values for these
-attributes will be used that is to say the current directory (where project
-`Work` is placed). We can compile that project with
-
-.. code-block:: sh
-
-     gprbuild -Pwork
-
-If no sources have been placed in the current directory, this command
-won't do anything, since this project does not change the
-sources it inherited from `Build`, therefore all the object files
-in `Build` and its dependencies are still valid and are reused
-automatically.
-
-Suppose we now want to supply an alternate version of :file:`pack.adb` but use
-the existing versions of :file:`pack.ads` and :file:`proc.adb`.  We can create
-the new file in Work's current directory (likely by copying the one from the
-`Build` project and making changes to it. If new packages are needed at
-the same time, we simply create new files in the source directory of the
-extending project.
-
-When we recompile, *gprbuild* will now automatically recompile
-this file (thus creating :file:`pack.o` in the current directory) and
-any file that depends on it (thus creating :file:`proc.o`). Finally, the
-executable is also linked locally.
-
-Note that we could have obtained the desired behavior using project import
-rather than project inheritance. A `base` project would contain the
-sources for :file:`pack.ads` and :file:`proc.adb`, and `Work` would
-import `base` and add :file:`pack.adb`. In this scenario,  `base`
-cannot contain the original version of :file:`pack.adb` otherwise there would be
-2 versions of the same unit in the closure of the project and this is not
-allowed. Generally speaking, it is not recommended to put the spec and the
-body of a unit in different projects since this affects their autonomy and
-reusability.
-
-In a project file that extends another project, it is possible to
-indicate that an inherited source is **not part** of the sources of the
-extending project. This is necessary sometimes when a package spec has
-been overridden and no longer requires a body: in this case, it is
-necessary to indicate that the inherited body is not part of the sources
-of the project, otherwise there will be a compilation error
-when compiling the spec.
-
-.. index:: Excluded_Source_Files (GNAT Project Manager)
-
-.. index:: Excluded_Source_List_File (GNAT Project Manager)
-
-For that purpose, the attribute **Excluded_Source_Files** is used.
-Its value is a list of file names.
-It is also possible to use attribute `Excluded_Source_List_File`.
-Its value is the path of a text file containing one file name per
-line.
-
-.. code-block:: gpr
-
-     project Work extends "../bld/build.gpr" is
-        for Source_Files use ("pack.ads");
-        --  New spec of Pkg does not need a completion
-        for Excluded_Source_Files use ("pack.adb");
-     end Work;
-
-
-All packages that are not declared in the extending project are inherited from
-the project being extended, with their attributes, with the exception of
-`Linker'Linker_Options` which is never inherited. In particular, an
-extending project retains all the switches specified in the project being
-extended.
-
-At the project level, if they are not declared in the extending project, some
-attributes are inherited from the project being extended. They are:
-`Languages`, `Main` (for a root non library project) and
-`Library_Name` (for a project extending a library project).
-
-.. _Project_Hierarchy_Extension:
-
-Project Hierarchy Extension
----------------------------
-
-One of the fundamental restrictions in project extension is the following:
-**A project is not allowed to import directly or indirectly at the same time an extending project and one of its ancestors**.
-
-For example, consider the following hierarchy of projects.
-
-::
-
-     a.gpr  contains package A1
-     b.gpr, imports a.gpr and contains B1, which depends on A1
-     c.gpr, imports b.gpr and contains C1, which depends on B1
-
-If we want to locally extend the packages `A1` and `C1`, we need to
-create several extending projects:
-
-::
-
-     a_ext.gpr which extends a.gpr, and overrides A1
-     b_ext.gpr which extends b.gpr and imports a_ext.gpr
-     c_ext.gpr which extends c.gpr, imports b_ext.gpr and overrides C1
-
-.. code-block:: gpr
-
-     project A_Ext extends "a.gpr" is
-        for Source_Files use ("a1.adb", "a1.ads");
-     end A_Ext;
-
-     with "a_ext.gpr";
-     project B_Ext extends "b.gpr" is
-     end B_Ext;
-
-     with "b_ext.gpr";
-     project C_Ext extends "c.gpr" is
-        for Source_Files use ("c1.adb");
-     end C_Ext;
-
-The extension :file:`b_ext.gpr` is required, even though we are not overriding
-any of the sources of :file:`b.gpr` because otherwise :file:`c_expr.gpr` would
-import :file:`b.gpr` which itself knows nothing about :file:`a_ext.gpr`.
-
-.. index:: extends all (GNAT Project Manager)
-
-When extending a large system spanning multiple projects, it is often
-inconvenient to extend every project in the hierarchy that is impacted by a
-small change introduced in a low layer. In such cases, it is possible to create
-an **implicit extension** of an entire hierarchy using **extends all**
-relationship.
-
-When the project is extended using `extends all` inheritance, all projects
-that are imported by it, both directly and indirectly, are considered virtually
-extended. That is, the project manager creates implicit projects
-that extend every project in the hierarchy; all these implicit projects do not
-control sources on their own and use the object directory of
-the "extending all" project.
-
-It is possible to explicitly extend one or more projects in the hierarchy
-in order to modify the sources. These extending projects must be imported by
-the "extending all" project, which will replace the corresponding virtual
-projects with the explicit ones.
-
-When building such a project hierarchy extension, the project manager will
-ensure that both modified sources and sources in implicit extending projects
-that depend on them are recompiled.
-
-Thus, in our example we could create the following projects instead:
-
-::
-
-     a_ext.gpr, extends a.gpr and overrides A1
-     c_ext.gpr, "extends all" c.gpr, imports a_ext.gpr and overrides C1
-
-.. code-block:: gpr
-
-     project A_Ext extends "a.gpr" is
-        for Source_Files use ("a1.adb", "a1.ads");
-     end A_Ext;
-
-     with "a_ext.gpr";
-     project C_Ext extends all "c.gpr" is
-       for Source_Files use ("c1.adb");
-     end C_Ext;
-
-
-When building project :file:`c_ext.gpr`, the entire modified project space is
-considered for recompilation, including the sources of :file:`b.gpr` that are
-impacted by the changes in `A1` and `C1`.
-
-
-.. _Aggregate_Projects:
-
-Aggregate Projects
-==================
-
-Aggregate projects are an extension of the project paradigm, and are
-meant to solve a few specific use cases that cannot be solved directly
-using standard projects. This section will go over a few of these use
-cases to try to explain what you can use aggregate projects for.
-
-
-.. _Building_all_main_programs_from_a_single_project_tree:
-
-Building all main programs from a single project tree
------------------------------------------------------
-
-Most often, an application is organized into modules and submodules,
-which are very conveniently represented as a project tree or graph
-(the root project A |withs| the projects for each modules (say B and C),
-which in turn |with| projects for submodules.
-
-Very often, modules will build their own executables (for testing
-purposes for instance), or libraries (for easier reuse in various
-contexts).
-
-However, if you build your project through *gprbuild*, using a syntax similar to
-
-::
-
-     gprbuild -PA.gpr
-
-this will only rebuild the main programs of project A, not those of the
-imported projects B and C. Therefore you have to spawn several
-*gprbuild* commands, one per project, to build all executables.
-This is a little inconvenient, but more importantly is inefficient
-because *gprbuild* needs to do duplicate work to ensure that sources are
-up-to-date, and cannot easily compile things in parallel when using
-the -j switch.
-
-Also libraries are always rebuilt when building a project.
-
-You could therefore define an aggregate project Agg that groups A, B
-and C. Then, when you build with
-
-::
-
-      gprbuild -PAgg.gpr
-
-this will build all mains from A, B and C.
-
-.. code-block:: gpr
-
-     aggregate project Agg is
-        for Project_Files use ("a.gpr", "b.gpr", "c.gpr");
-     end Agg;
-
-If B or C do not define any main program (through their Main
-attribute), all their sources are built. When you do not group them
-in the aggregate project, only those sources that are needed by A
-will be built.
-
-If you add a main to a project P not already explicitly referenced in the
-aggregate project, you will need to add "p.gpr" in the list of project
-files for the aggregate project, or the main will not be built when
-building the aggregate project.
-
-.. _Building_a_set_of_projects_with_a_single_command:
-
-Building a set of projects with a single command
-------------------------------------------------
-
-One other case is when you have multiple applications and libraries
-that are built independently from each other (but can be built in
-parallel). For instance, you have a project tree rooted at A, and
-another one (which might share some subprojects) rooted at B.
-
-Using only *gprbuild*, you could do
-
-.. code-block:: sh
-
-    gprbuild -PA.gpr
-    gprbuild -PB.gpr
-
-to build both. But again, *gprbuild* has to do some duplicate work for
-those files that are shared between the two, and cannot truly build
-things in parallel efficiently.
-
-If the two projects are really independent, share no sources other
-than through a common subproject, and have no source files with a
-common basename, you could create a project C that imports A and
-B. But these restrictions are often too strong, and one has to build
-them independently. An aggregate project does not have these
-limitations and can aggregate two project trees that have common
-sources.
-
-This scenario is particularly useful in environments like VxWorks 653
-where the applications running in the multiple partitions can be built
-in parallel through a single *gprbuild* command. This also works nicely
-with Annex E.
-
-
-.. _Define_a_build_environment:
-
-Define a build environment
---------------------------
-
-The environment variables at the time you launch *gprbuild*
-will influence the view these tools have of the project
-(PATH to find the compiler, ADA_PROJECT_PATH or GPR_PROJECT_PATH to find the
-projects, environment variables that are referenced in project files
-through the "external" built-in function, ...). Several command line switches
-can be used to override those (-X or -aP), but on some systems and
-with some projects, this might make the command line too long, and on
-all systems often make it hard to read.
-
-An aggregate project can be used to set the environment for all
-projects built through that aggregate. One of the nice aspects is that
-you can put the aggregate project under configuration management, and
-make sure all your user have a consistent environment when
-building. The syntax looks like
-
-.. code-block:: gpr
-
-     aggregate project Agg is
-        for Project_Files use ("A.gpr", "B.gpr");
-        for Project_Path use ("../dir1", "../dir1/dir2");
-        for External ("BUILD") use "PRODUCTION";
-
-        package Builder is
-           for Global_Compilation_Switches ("Ada") use ("-g");
-        end Builder;
-     end Agg;
-
-One of the often requested features in projects is to be able to
-reference external variables in |with| declarations, as in
-
-.. code-block:: gpr
-
-     with external("SETUP") & "path/prj.gpr";   --  ILLEGAL
-     project MyProject is
-        ...
-     end MyProject;
-
-For various reasons, this is not allowed. But using aggregate projects provide
-an elegant solution. For instance, you could use a project file like:
-
-.. code-block:: gpr
-
-     aggregate project Agg is
-         for Project_Path use (external("SETUP") & "path");
-         for Project_Files use ("myproject.gpr");
-     end Agg;
-
-     with "prj.gpr";  --  searched on Agg'Project_Path
-     project MyProject is
-        ...
-     end MyProject;
-
-
-.. _Performance_improvements_in_builder:
-
-Performance improvements in builder
------------------------------------
-
-The loading of aggregate projects is optimized in *gprbuild*,
-so that all files are searched for only once on the disk
-(thus reducing the number of system calls and contributing to faster
-compilation times, especially on systems with sources on remote
-servers). As part of the loading, *gprbuild*
-computes how and where a source file should be compiled, and even if it is
-found several times in the aggregated projects it will be compiled only
-once.
-
-Since there is no ambiguity as to which switches should be used, files
-can be compiled in parallel (through the usual -j switch) and this can
-be done while maximizing the use of CPUs (compared to launching
-multiple *gprbuild* commands in parallel).
-
-
-.. _Syntax_of_aggregate_projects:
-
-Syntax of aggregate projects
-----------------------------
-
-An aggregate project follows the general syntax of project files. The
-recommended extension is still :file:`.gpr`. However, a special
-`aggregate` qualifier must be put before the keyword
-`project`.
-
-An aggregate project cannot |with| any other project (standard or
-aggregate), except an abstract project which can be used to share attribute
-values. Also, aggregate projects cannot be extended or imported though a
-|with| clause by any other project. Building other aggregate projects from
-an aggregate project is done through the Project_Files attribute (see below).
-
-An aggregate project does not have any source files directly (only
-through other standard projects). Therefore a number of the standard
-attributes and packages are forbidden in an aggregate project. Here is the
-(non exhaustive) list:
-
-* Languages
-* Source_Files, Source_List_File and other attributes dealing with
-  list of sources.
-* Source_Dirs, Exec_Dir and Object_Dir
-* Library_Dir, Library_Name and other library-related attributes
-* Main
-* Roots
-* Externally_Built
-* Inherit_Source_Path
-* Excluded_Source_Dirs
-* Locally_Removed_Files
-* Excluded_Source_Files
-* Excluded_Source_List_File
-* Interfaces
-
-The only package that is authorized (albeit optional) is
-Builder. Other packages (in particular Compiler, Binder and Linker)
-are forbidden.
-
-The following three attributes can be used only in an aggregate project:
-
-.. index:: Project_Files (GNAT Project Manager)
-
-**Project_Files**:
-
-  This attribute is compulsory (or else we are not aggregating any project,
-  and thus not doing anything). It specifies a list of :file:`.gpr` files
-  that are grouped in the aggregate. The list may be empty. The project
-  files can be either other aggregate projects, or standard projects. When
-  grouping standard projects, you can have both the root of a project tree
-  (and you do not need to specify all its imported projects), and any project
-  within the tree.
-
-  Basically, the idea is to specify all those projects that have
-  main programs you want to build and link, or libraries you want to
-  build. You can even specify projects that do not use the Main
-  attribute nor the `Library_*` attributes, and the result will be to
-  build all their source files (not just the ones needed by other
-  projects).
-
-  The file can include paths (absolute or relative). Paths are relative to
-  the location of the aggregate project file itself (if you use a base name,
-  we expect to find the .gpr file in the same directory as the aggregate
-  project file). The environment variables `ADA_PROJECT_PATH`,
-  `GPR_PROJECT_PATH` and `GPR_PROJECT_PATH_FILE` are not used to find
-  the project files. The extension :file:`.gpr` is mandatory, since this attribute
-  contains file names, not project names.
-
-  Paths can also include the `"*"` and `"**"` globbing patterns. The
-  latter indicates that any subdirectory (recursively) will be
-  searched for matching files. The latter (`"**"`) can only occur at the
-  last position in the directory part (ie `"a/**/*.gpr"` is supported, but
-  not `"**/a/*.gpr"`). Starting the pattern with `"**"` is equivalent
-  to starting with `"./**"`.
-
-  For now, the pattern `"*"` is only allowed in the filename part, not
-  in the directory part. This is mostly for efficiency reasons to limit the
-  number of system calls that are needed.
-
-  Here are a few valid examples:
-
-  .. code-block:: gpr
-
-     for Project_Files use ("a.gpr", "subdir/b.gpr");
-     --  two specific projects relative to the directory of agg.gpr
-
-     for Project_Files use ("/.gpr");
-     --  all projects recursively
-
-
-.. index:: Project_Path (GNAT Project Manager)
-
-**Project_Path**:
-
-  This attribute can be used to specify a list of directories in
-  which to look for project files in |with| declarations.
-
-  When you specify a project in Project_Files (say `x/y/a.gpr`), and
-  `a.gpr` imports a project `b.gpr`, only `b.gpr` is searched in
-  the project path. `a.gpr` must be exactly at
-  `<dir of the aggregate>/x/y/a.gpr`.
-
-  This attribute, however, does not affect the search for the aggregated
-  project files specified with `Project_Files`.
-
-  Each aggregate project has its own `Project_Path` (that is if
-  `agg1.gpr` includes `agg2.gpr`, they can potentially both have a
-  different `Project_Path`).
-
-  This project path is defined as the concatenation, in that order, of:
-
-  * the current directory;
-
-  * followed by the command line -aP switches;
-
-  * then the directories from the GPR_PROJECT_PATH and ADA_PROJECT_PATH environment
-    variables;
-
-  * then the directories from the Project_Path attribute;
-
-  * and finally the predefined directories.
-
-  In the example above, agg2.gpr's project path is not influenced by
-  the attribute agg1'Project_Path, nor is agg1 influenced by
-  agg2'Project_Path.
-
-  This can potentially lead to errors. Consider the following example::
-
-     --
-     --  +---------------+                  +----------------+
-     --  | Agg1.gpr      |-=--includes--=-->| Agg2.gpr       |
-     --  |  'project_path|                  |  'project_path |
-     --  |               |                  |                |
-     --  +---------------+                  +----------------+
-     --        :                                   :
-     --        includes                        includes
-     --        :                                   :
-     --        v                                   v
-     --    +-------+                          +---------+
-     --    | P.gpr |<---------- withs --------|  Q.gpr  |
-     --    +-------+---------\                +---------+
-     --        |             |
-     --        withs         |
-     --        |             |
-     --        v             v
-     --    +-------+      +---------+
-     --    | R.gpr |      | R'.gpr  |
-     --    +-------+      +---------+
-
-  When looking for p.gpr, both aggregates find the same physical file on
-  the disk. However, it might happen that with their different project
-  paths, both aggregate projects would in fact find a different r.gpr.
-  Since we have a common project (p.gpr) "with"ing two different r.gpr,
-  this will be reported as an error by the builder.
-
-  Directories are relative to the location of the aggregate project file.
-
-  Example:
-
-  .. code-block:: gpr
-
-     for Project_Path use ("/usr/local/gpr", "gpr/");
-
-.. index:: External (GNAT Project Manager)
-
-**External**:
-
-  This attribute can be used to set the value of environment
-  variables as retrieved through the `external` function
-  in projects. It does not affect the environment variables
-  themselves (so for instance you cannot use it to change the value
-  of your PATH as seen from the spawned compiler).
-
-  This attribute affects the external values as seen in the rest of
-  the aggregate project, and in the aggregated projects.
-
-  The exact value of external a variable comes from one of three
-  sources (each level overrides the previous levels):
-
-  * An External attribute in aggregate project, for instance
-    `for External ("BUILD_MODE") use "DEBUG"`;
-
-  * Environment variables.
-    These override the value given by the attribute, so that
-    users can override the value set in the (presumably shared
-    with others team members) aggregate project.
-
-  * The -X command line switch to *gprbuild*.
-    This always takes precedence.
-
-  This attribute is only taken into account in the main aggregate
-  project (i.e. the one specified on the command line to *gprbuild*),
-  and ignored in other aggregate projects. It is invalid
-  in standard projects.
-  The goal is to have a consistent value in all
-  projects that are built through the aggregate, which would not
-  be the case in the diamond case: A groups the aggregate
-  projects B and C, which both (either directly or indirectly)
-  build the project P. If B and C could set different values for
-  the environment variables, we would have two different views of
-  P, which in particular might impact the list of source files in P.
-
-
-.. _package_Builder_in_aggregate_projects:
-
-package Builder in aggregate projects
--------------------------------------
-
-As mentioned above, only the package Builder can be specified in
-an aggregate project. In this package, only the following attributes
-are valid:
-
-.. index:: Switches (GNAT Project Manager)
-
-**Switches**:
-
-  This attribute gives the list of switches to use for *gprbuild*.
-  Because no mains can be specified for aggregate projects, the only possible
-  index for attribute `Switches` is `others`. All other indexes will
-  be ignored.
-
-  Example:
-
-  .. code-block:: gpr
-
-     for Switches (others) use ("-v", "-k", "-j8");
-
-  These switches are only read from the main aggregate project (the
-  one passed on the command line), and ignored in all other aggregate
-  projects or projects.
-
-  It can only contain builder switches, not compiler switches.
-
-.. index:: Global_Compilation_Switches (GNAT Project Manager)
-
-**Global_Compilation_Switches**
-
-  This attribute gives the list of compiler switches for the various
-  languages. For instance,
-
-  .. code-block:: gpr
-
-    for Global_Compilation_Switches ("Ada") use ("O1", "-g");
-    for Global_Compilation_Switches ("C")   use ("-O2");
-
-  This attribute is only taken into account in the aggregate project
-  specified on the command line, not in other aggregate projects.
-
-  In the projects grouped by that aggregate, the attribute
-  Builder.Global_Compilation_Switches is also ignored. However, the
-  attribute Compiler.Default_Switches will be taken into account (but
-  that of the aggregate have higher priority). The attribute
-  Compiler.Switches is also taken into account and can be used to
-  override the switches for a specific file. As a result, it always
-  has priority.
-
-  The rules are meant to avoid ambiguities when compiling. For
-  instance, aggregate project Agg groups the projects A and B, that
-  both depend on C. Here is an extra for all of these projects:
-
-
-  .. code-block:: gpr
-
-     aggregate project Agg is
-         for Project_Files use ("a.gpr", "b.gpr");
-         package Builder is
-            for Global_Compilation_Switches ("Ada") use ("-O2");
-         end Builder;
-     end Agg;
-
-     with "c.gpr";
-     project A is
-         package Builder is
-            for Global_Compilation_Switches ("Ada") use ("-O1");
-            --  ignored
-         end Builder;
-
-         package Compiler is
-            for Default_Switches ("Ada")
-                use ("-O1", "-g");
-            for Switches ("a_file1.adb")
-                use ("-O0");
-         end Compiler;
-     end A;
-
-     with "c.gpr";
-     project B is
-         package Compiler is
-            for Default_Switches ("Ada") use ("-O0");
-         end Compiler;
-     end B;
-
-     project C is
-         package Compiler is
-            for Default_Switches ("Ada")
-                use ("-O3",
-                     "-gnatn");
-            for Switches ("c_file1.adb")
-                use ("-O0", "-g");
-         end Compiler;
-     end C;
-
-
-  then the following switches are used:
-
-  * all files from project A except a_file1.adb are compiled
-    with "-O2 -g", since the aggregate project has priority.
-
-  * the file a_file1.adb is compiled with
-    "-O0", since the Compiler.Switches has priority
-
-  * all files from project B are compiled with
-    "-O2", since the aggregate project has priority
-
-  * all files from C are compiled with "-O2 -gnatn", except for
-    c_file1.adb which is compiled with "-O0 -g"
-
-  Even though C is seen through two paths (through A and through
-  B), the switches used by the compiler are unambiguous.
-
-
-.. index:: Global_Configuration_Pragmas (GNAT Project Manager)
-
-**Global_Configuration_Pragmas**
-
-  This attribute can be used to specify a file containing
-  configuration pragmas, to be passed to the Ada compiler.  Since we
-  ignore the package Builder in other aggregate projects and projects,
-  only those pragmas defined in the main aggregate project will be
-  taken into account.
-
-  Projects can locally add to those by using the
-  `Compiler.Local_Configuration_Pragmas` attribute if they need.
-
-
-.. index:: Global_Config_File (GNAT Project Manager)
-
-**Global_Config_File**
-
-  This attribute, indexed with a language name, can be used to specify a config
-  when compiling sources of the language. For Ada, these files are configuration
-  pragmas files.
-
-For projects that are built through the aggregate, the package Builder
-is ignored, except for the Executable attribute which specifies the
-name of the executables resulting from the link of the main programs, and
-for the Executable_Suffix.
-
-
-.. _Aggregate_Library_Projects:
-
-Aggregate Library Projects
-==========================
-
-Aggregate library projects make it possible to build a single library
-using object files built using other standard or library
-projects. This gives the flexibility to describe an application as
-having multiple modules (a GUI, database access, ...) using different
-project files (so possibly built with different compiler options) and
-yet create a single library (static or relocatable) out of the
-corresponding object files.
-
-.. _Building_aggregate_library_projects:
-
-Building aggregate library projects
------------------------------------
-
-For example, we can define an aggregate project Agg that groups A, B
-and C:
-
-.. code-block:: gpr
-
-     aggregate library project Agg is
-        for Project_Files use ("a.gpr", "b.gpr", "c.gpr");
-        for Library_Name use ("agg");
-        for Library_Dir use ("lagg");
-     end Agg;
-
-Then, when you build with:
-
-.. code-block:: sh
-
-      gprbuild agg.gpr
-
-This will build all units from projects A, B and C and will create a
-static library named :file:`libagg.a` in the :file:`lagg`
-directory. An aggregate library project has the same set of
-restriction as a standard library project.
-
-Note that a shared aggregate library project cannot aggregate a
-static library project. In platforms where a compiler option is
-required to create relocatable object files, a Builder package in the
-aggregate library project may be used:
-
-.. code-block:: gpr
-
-     aggregate library project Agg is
-        for Project_Files use ("a.gpr", "b.gpr", "c.gpr");
-        for Library_Name use ("agg");
-        for Library_Dir use ("lagg");
-        for Library_Kind use "relocatable";
-
-        package Builder is
-           for Global_Compilation_Switches ("Ada") use ("-fPIC");
-        end Builder;
-     end Agg;
-
-With the above aggregate library Builder package, the `-fPIC`
-option will be passed to the compiler when building any source code
-from projects :file:`a.gpr`, :file:`b.gpr` and :file:`c.gpr`.
-
-
-.. _Syntax_of_aggregate_library_projects:
-
-Syntax of aggregate library projects
-------------------------------------
-
-An aggregate library project follows the general syntax of project
-files. The recommended extension is still :file:`.gpr`. However, a special
-`aggregate library` qualifier must be put before the keyword
-`project`.
-
-An aggregate library project cannot |with| any other project
-(standard or aggregate), except an abstract project which can be used
-to share attribute values.
-
-An aggregate library project does not have any source files directly (only
-through other standard projects). Therefore a number of the standard
-attributes and packages are forbidden in an aggregate library
-project. Here is the (non exhaustive) list:
-
-* Languages
-* Source_Files, Source_List_File and other attributes dealing with
-  list of sources.
-* Source_Dirs, Exec_Dir and Object_Dir
-* Main
-* Roots
-* Externally_Built
-* Inherit_Source_Path
-* Excluded_Source_Dirs
-* Locally_Removed_Files
-* Excluded_Source_Files
-* Excluded_Source_List_File
-* Interfaces
-
-The only package that is authorized (albeit optional) is Builder.
-
-The Project_Files attribute (See :ref:`Aggregate_Projects`) is used to
-described the aggregated projects whose object files have to be
-included into the aggregate library. The environment variables
-`ADA_PROJECT_PATH`, `GPR_PROJECT_PATH` and
-`GPR_PROJECT_PATH_FILE` are not used to find the project files.
-
-
-.. _Project_File_Reference:
-
-Project File Reference
-======================
-
-This section describes the syntactic structure of project files, the various
-constructs that can be used. Finally, it ends with a summary of all available
-attributes.
-
-
-.. _Project_Declaration:
-
-Project Declaration
--------------------
-
-Project files have an Ada-like syntax. The minimal project file is:
-
-.. code-block:: gpr
-
-     project Empty is
-     end Empty;
-
-The identifier `Empty` is the name of the project.
-This project name must be present after the reserved
-word `end` at the end of the project file, followed by a semi-colon.
-
-**Identifiers** (i.e., the user-defined names such as project or variable names)
-have the same syntax as Ada identifiers: they must start with a letter,
-and be followed by zero or more letters, digits or underscore characters;
-it is also illegal to have two underscores next to each other. Identifiers
-are always case-insensitive ("Name" is the same as "name").
-
-::
-
-    simple_name ::= identifier
-    name        ::= simple_name { . simple_name }
-
-**Strings** are used for values of attributes or as indexes for these
-attributes. They are in general case sensitive, except when noted
-otherwise (in particular, strings representing file names will be case
-insensitive on some systems, so that "file.adb" and "File.adb" both
-represent the same file).
-
-**Reserved words** are the same as for standard Ada 95, and cannot
-be used for identifiers. In particular, the following words are currently
-used in project files, but others could be added later on. In bold are the
-extra reserved words in project files:
-``all``, ``at``, ``case``, ``end``, ``for``, ``is``, ``limited``,
-``null``, ``others``, ``package``, ``renames``, ``type``, ``use``, ``when``,
-``with``, **extends**, **external**, **project**.
-
-**Comments** in project files have the same syntax as in Ada, two consecutive
-hyphens through the end of the line.
-
-A project may be an **independent project**, entirely defined by a single
-project file. Any source file in an independent project depends only
-on the predefined library and other source files in the same project.
-But a project may also depend on other projects, either by importing them
-through **with clauses**, or by **extending** at most one other project. Both
-types of dependency can be used in the same project.
-
-A path name denotes a project file. It can be absolute or relative.
-An absolute path name includes a sequence of directories, in the syntax of
-the host operating system, that identifies uniquely the project file in the
-file system. A relative path name identifies the project file, relative
-to the directory that contains the current project, or relative to a
-directory listed in the environment variables ADA_PROJECT_PATH and
-GPR_PROJECT_PATH. Path names are case sensitive if file names in the host
-operating system are case sensitive. As a special case, the directory
-separator can always be "/" even on Windows systems, so that project files
-can be made portable across architectures.
-The syntax of the environment variables ADA_PROJECT_PATH and
-GPR_PROJECT_PATH is a list of directory names separated by colons on UNIX and
-semicolons on Windows.
-
-A given project name can appear only once in a context clause.
-
-It is illegal for a project imported by a context clause to refer, directly
-or indirectly, to the project in which this context clause appears (the
-dependency graph cannot contain cycles), except when one of the with clauses
-in the cycle is a **limited with**.
-
-.. code-block:: gpr
-
-     with "other_project.gpr";
-     project My_Project extends "extended.gpr" is
-     end My_Project;
-
-These dependencies form a **directed graph**, potentially cyclic when using
-**limited with**. The subgraph reflecting the **extends** relations is a tree.
-
-A project's **immediate sources** are the source files directly defined by
-that project, either implicitly by residing in the project source directories,
-or explicitly through any of the source-related attributes.
-More generally, a project's **sources** are the immediate sources of the
-project together with the immediate sources (unless overridden) of any project
-on which it depends directly or indirectly.
-
-A **project hierarchy** can be created, where projects are children of
-other projects. The name of such a child project must be `Parent.Child`,
-where `Parent` is the name of the parent project. In particular, this
-makes all |with| clauses of the parent project automatically visible
-in the child project.
-
-::
-
-      project        ::= context_clause project_declaration
-
-      context_clause ::= {with_clause}
-      with_clause    ::= *with* path_name { , path_name } ;
-      path_name      ::= string_literal
-
-      project_declaration ::= simple_project_declaration | project_extension
-      simple_project_declaration ::=
-        project <project_>name is
-          {declarative_item}
-        end <project_>simple_name;
-
-
-.. _Qualified_Projects:
-
-Qualified Projects
-------------------
-
-Before the reserved `project`, there may be one or two **qualifiers**, that
-is identifiers or reserved words, to qualify the project.
-The current list of qualifiers is:
-
-**abstract**:
-  Qualifies a project with no sources.
-  Such a   project must either have no declaration of attributes `Source_Dirs`,
-  `Source_Files`, `Languages` or `Source_List_File`, or one of
-  `Source_Dirs`, `Source_Files`, or `Languages` must be declared
-  as empty. If it extends another project, the project it extends must also be a
-  qualified abstract project.
-
-**standard**:
-  A standard project is a non library project with sources.
-  This is the default (implicit) qualifier.
-
-**aggregate**:
-  A project whose sources are aggregated from other project files.
-
-**aggregate library**:
-  A library whose sources are aggregated from other project
-  or library project files.
-
-**library**:
-  A library project must declare both attributes
-  Library_Name` and `Library_Dir`.
-
-**configuration**:
-  A configuration project cannot be in a project tree.
-  It describes compilers and other tools to *gprbuild*.
-
-
-.. _Declarations:
-
-Declarations
-------------
-
-Declarations introduce new entities that denote types, variables, attributes,
-and packages. Some declarations can only appear immediately within a project
-declaration. Others can appear within a project or within a package.
-
-::
-
-    declarative_item ::= simple_declarative_item
-      | typed_string_declaration
-      | package_declaration
-
-    simple_declarative_item ::= variable_declaration
-      | typed_variable_declaration
-      | attribute_declaration
-      | case_construction
-      | empty_declaration
-
-    empty_declaration ::= *null* ;
-
-An empty declaration is allowed anywhere a declaration is allowed. It has
-no effect.
-
-
-.. _Packages:
-
-Packages
---------
-
-A project file may contain **packages**, that group attributes (typically
-all the attributes that are used by one of the GNAT tools).
-
-A package with a given name may only appear once in a project file.
-The following packages are currently supported in project files
-(See :ref:`Attributes` for the list of attributes that each can contain).
-
-*Binder*
-  This package specifies characteristics useful when invoking the binder either
-  directly via the *gnat* driver or when using *gprbuild*.
-  See :ref:`Main_Subprograms`.
-
-*Builder*
-  This package specifies the compilation options used when building an
-  executable or a library for a project. Most of the options should be
-  set in one of `Compiler`, `Binder` or `Linker` packages,
-  but there are some general options that should be defined in this
-  package. See :ref:`Main_Subprograms`, and :ref:`Executable_File_Names` in
-  particular.
-
-.. only:: PRO or GPL
-
-  *Check*
-    This package specifies the options used when calling the checking tool
-    *gnatcheck* via the *gnat* driver. Its attribute
-    **Default_Switches** has the same semantics as for the package
-    `Builder`. The first string should always be `-rules` to specify
-    that all the other options belong to the `-rules` section of the
-    parameters to *gnatcheck*.
-
-*Clean*
-  This package specifies the options used when cleaning a project or a project
-  tree using the tools *gnatclean* or *gprclean*.
-
-*Compiler*
-  This package specifies the compilation options used by the compiler for
-  each languages. See :ref:`Tools_Options_in_Project_Files`.
-
-*Cross_Reference*
-  This package specifies the options used when calling the library tool
-  *gnatxref* via the *gnat* driver. Its attributes
-  **Default_Switches** and **Switches** have the same semantics as for the
-  package `Builder`.
-
-.. only:: PRO or GPL
-
-  *Eliminate*
-    This package specifies the options used when calling the tool
-    *gnatelim* via the *gnat* driver. Its attributes
-    **Default_Switches** and **Switches** have the same semantics as for the
-    package `Builder`.
-
-*Finder*
-  This package specifies the options used when calling the search tool
-  *gnatfind* via the *gnat* driver. Its attributes
-  **Default_Switches** and **Switches** have the same semantics as for the
-  package `Builder`.
-
-*Gnatls*
-  This package specifies the options to use when invoking *gnatls*
-  via the *gnat* driver.
-
-.. only:: PRO or GPL
-
-  *Gnatstub*
-    This package specifies the options used when calling the tool
-    *gnatstub* via the *gnat* driver. Its attributes
-    **Default_Switches** and **Switches** have the same semantics as for the
-    package `Builder`.
-
-*IDE*
-  This package specifies the options used when starting an integrated
-  development environment, for instance *GPS* or *Gnatbench*.
-
-*Install*
-  This package specifies the options used when installing a project
-  with *gprinstall*. See :ref:`Installation`.
-
-*Linker*
-  This package specifies the options used by the linker.
-  See :ref:`Main_Subprograms`.
-
-.. only:: PRO or GPL
-
-  *Metrics*
-    This package specifies the options used when calling the tool
-    *gnatmetric* via the *gnat* driver. Its attributes
-    **Default_Switches** and **Switches** have the same semantics as for the
-    package `Builder`.
-
-*Naming*
-  This package specifies the naming conventions that apply
-  to the source files in a project. In particular, these conventions are
-  used to automatically find all source files in the source directories,
-  or given a file name to find out its language for proper processing.
-  See :ref:`Naming_Schemes`.
-
- .. only:: PRO or GPL
-
-  *Pretty_Printer*
-    This package specifies the options used when calling the formatting tool
-    *gnatpp* via the *gnat* driver. Its attributes
-    **Default_Switches** and **Switches** have the same semantics as for the
-    package `Builder`.
-
-*Remote*
-  This package is used by *gprbuild* to describe how distributed
-  compilation should be done.
-
-*Stack*
-  This package specifies the options used when calling the tool
-  *gnatstack* via the *gnat* driver. Its attributes
-  **Default_Switches** and **Switches** have the same semantics as for the
-  package `Builder`.
-
-*Synchronize*
-  This package specifies the options used when calling the tool
-  *gnatsync* via the *gnat* driver.
-
-In its simplest form, a package may be empty:
-
-.. code-block:: gpr
-
-     project Simple is
-       package Builder is
-       end Builder;
-     end Simple;
-
-A package may contain **attribute declarations**,
-**variable declarations** and **case constructions**, as will be
-described below.
-
-When there is ambiguity between a project name and a package name,
-the name always designates the project. To avoid possible confusion, it is
-always a good idea to avoid naming a project with one of the
-names allowed for packages or any name that starts with `gnat`.
-
-A package can also be defined by a **renaming declaration**. The new package
-renames a package declared in a different project file, and has the same
-attributes as the package it renames. The name of the renamed package
-must be the same as the name of the renaming package. The project must
-contain a package declaration with this name, and the project
-must appear in the context clause of the current project, or be its parent
-project. It is not possible to add or override attributes to the renaming
-project. If you need to do so, you should use an **extending declaration**
-(see below).
-
-Packages that are renamed in other project files often come from project files
-that have no sources: they are just used as templates. Any modification in the
-template will be reflected automatically in all the project files that rename
-a package from the template. This is a very common way to share settings
-between projects.
-
-Finally, a package can also be defined by an **extending declaration**. This is
-similar to a **renaming declaration**, except that it is possible to add or
-override attributes.
-
-::
-
-      package_declaration ::= package_spec | package_renaming | package_extension
-      package_spec ::=
-        package <package_>simple_name is
-          {simple_declarative_item}
-        end package_identifier ;
-      package_renaming ::==
-        package <package_>simple_name renames <project_>simple_name.package_identifier ;
-      package_extension ::==
-        package <package_>simple_name extends <project_>simple_name.package_identifier is
-          {simple_declarative_item}
-        end package_identifier ;
-
-
-.. _Expressions:
-
-Expressions
------------
-
-An expression is any value that can be assigned to an attribute or a
-variable. It is either a literal value, or a construct requiring runtime
-computation by the project manager. In a project file, the computed value of
-an expression is either a string or a list of strings.
-
-A string value is one of:
-
-* A literal string, for instance `"comm/my_proj.gpr"`
-* The name of a variable that evaluates to a string (see :ref:`Variables`)
-* The name of an attribute that evaluates to a string (see :ref:`Attributes`)
-* An external reference (see :ref:`External_Values`)
-* A concatenation of the above, as in `"prefix_" & Var`.
-
-A list of strings is one of the following:
-
-* A parenthesized comma-separated list of zero or more string expressions, for
-  instance `(File_Name, "gnat.adc", File_Name & ".orig")` or `()`.
-* The name of a variable that evaluates to a list of strings
-* The name of an attribute that evaluates to a list of strings
-* A concatenation of a list of strings and a string (as defined above), for
-  instance `("A", "B") & "C"`
-* A concatenation of two lists of strings
-
-The following is the grammar for expressions
-
-::
-
-      string_literal ::= "{string_element}"  --  Same as Ada
-      string_expression ::= string_literal
-          | *variable_*name
-          | external_value
-          | attribute_reference
-          | ( string_expression { & string_expression } )
-      string_list  ::= ( string_expression { , string_expression } )
-         | *string_variable*_name
-         | *string_*attribute_reference
-      term ::= string_expression | string_list
-      expression ::= term { & term }     --  Concatenation
-
-Concatenation involves strings and list of strings. As soon as a list of
-strings is involved, the result of the concatenation is a list of strings. The
-following Ada declarations show the existing operators:
-
-.. code-block:: ada
-
-     function "&" (X : String;      Y : String)      return String;
-     function "&" (X : String_List; Y : String)      return String_List;
-     function "&" (X : String_List; Y : String_List) return String_List;
-
-
-Here are some specific examples:
-
-.. code-block:: ada
-
-     List := () & File_Name; --  One string in this list
-     List2 := List & (File_Name & ".orig"); -- Two strings
-     Big_List := List & Lists2;  --  Three strings
-     Illegal := "gnat.adc" & List2;  --  Illegal, must start with list
-
-
-.. _External_Values:
-
-External Values
----------------
-
-An external value is an expression whose value is obtained from the command
-that invoked the processing of the current project file (typically a
-*gprbuild* command).
-
-There are two kinds of external values, one that returns a single string, and
-one that returns a string list.
-
-The syntax of a single string external value is::
-
-    external_value ::= *external* ( string_literal [, string_literal] )
-
-
-The first string_literal is the string to be used on the command line or
-in the environment to specify the external value. The second string_literal,
-if present, is the default to use if there is no specification for this
-external value either on the command line or in the environment.
-
-Typically, the external value will either exist in the
-environment variables
-or be specified on the command line through the
-:samp:`-X{vbl}={value}` switch. If both
-are specified, then the command line value is used, so that a user can more
-easily override the value.
-
-The function `external` always returns a string. It is an error if the
-value was not found in the environment and no default was specified in the
-call to `external`.
-
-An external reference may be part of a string expression or of a string
-list expression, and can therefore appear in a variable declaration or
-an attribute declaration.
-
-Most of the time, this construct is used to initialize typed variables, which
-are then used in **case** constructions to control the value assigned to
-attributes in various scenarios. Thus such variables are often called
-**scenario variables**.
-
-The syntax for a string list external value is::
-
-    external_value ::= *external_as_list* ( string_literal , string_literal )
-
-
-The first string_literal is the string to be used on the command line or
-in the environment to specify the external value. The second string_literal is
-the separator between each component of the string list.
-
-If the external value does not exist in the environment or on the command line,
-the result is an empty list. This is also the case, if the separator is an
-empty string or if the external value is only one separator.
-
-Any separator at the beginning or at the end of the external value is
-discarded. Then, if there is no separator in the external value, the result is
-a string list with only one string. Otherwise, any string between the beginning
-and the first separator, between two consecutive separators and between the
-last separator and the end are components of the string list.
-
-::
-
-     *external_as_list* ("SWITCHES", ",")
-
-If the external value is "-O2,-g",
-the result is ("-O2", "-g").
-
-If the external value is ",-O2,-g,",
-the result is also ("-O2", "-g").
-
-if the external value is "-gnatv",
-the result is ("-gnatv").
-
-If the external value is ",,", the result is ("").
-
-If the external value is ",", the result is (), the empty string list.
-
-
-.. _Typed_String_Declaration:
-
-Typed String Declaration
-------------------------
-
-A **type declaration** introduces a discrete set of string literals.
-If a string variable is declared to have this type, its value
-is restricted to the given set of literals. These are the only named
-types in project files. A string type may only be declared at the project
-level, not inside a package.
-
-::
-
-     typed_string_declaration ::=
-       *type* *<typed_string_>*_simple_name *is* ( string_literal {, string_literal} );
-
-The string literals in the list are case sensitive and must all be different.
-They may include any graphic characters allowed in Ada, including spaces.
-Here is an example of a string type declaration:
-
-.. code-block:: ada
-
-     type OS is ("NT", "nt", "Unix", "GNU/Linux", "other OS");
-
-Variables of a string type are called **typed variables**; all other
-variables are called **untyped variables**. Typed variables are
-particularly useful in `case` constructions, to support conditional
-attribute declarations. (See :ref:`Case_Constructions`).
-
-A string type may be referenced by its name if it has been declared in the same
-project file, or by an expanded name whose prefix is the name of the project
-in which it is declared.
-
-
-.. _Variables:
-
-Variables
----------
-
-**Variables** store values (strings or list of strings) and can appear
-as part of an expression. The declaration of a variable creates the
-variable and assigns the value of the expression to it. The name of the
-variable is available immediately after the assignment symbol, if you
-need to reuse its old value to compute the new value. Before the completion
-of its first declaration, the value of a variable defaults to the empty
-string ("").
-
-A **typed** variable can be used as part of a **case** expression to
-compute the value, but it can only be declared once in the project file,
-so that all case constructions see the same value for the variable. This
-provides more consistency and makes the project easier to understand.
-The syntax for its declaration is identical to the Ada syntax for an
-object declaration. In effect, a typed variable acts as a constant.
-
-An **untyped** variable can be declared and overridden multiple times
-within the same project. It is declared implicitly through an Ada
-assignment. The first declaration establishes the kind of the variable
-(string or list of strings) and successive declarations must respect
-the initial kind. Assignments are executed in the order in which they
-appear, so the new value replaces the old one and any subsequent reference
-to the variable uses the new value.
-
-A variable may be declared at the project file level, or within a package.
-
-::
-
-     typed_variable_declaration ::=
-       *<typed_variable_>*simple_name : *<typed_string_>*name := string_expression;
-
-     variable_declaration ::= *<variable_>*simple_name := expression;
-
-Here are some examples of variable declarations:
-
-.. code-block:: gpr
-
-     This_OS : OS := external ("OS"); --  a typed variable declaration
-     That_OS := "GNU/Linux";          --  an untyped variable declaration
-
-     Name      := "readme.txt";
-     Save_Name := Name & ".saved";
-
-     Empty_List := ();
-     List_With_One_Element := ("-gnaty");
-     List_With_Two_Elements := List_With_One_Element & "-gnatg";
-     Long_List := ("main.ada", "pack1_.ada", "pack1.ada", "pack2_.ada");
-
-A **variable reference** may take several forms:
-
-* The simple variable name, for a variable in the current package (if any)
-  or in the current project
-* An expanded name, whose prefix is a context name.
-
-A **context** may be one of the following:
-
-* The name of an existing package in the current project
-* The name of an imported project of the current project
-* The name of an ancestor project (i.e., a project extended by the current
-  project, either directly or indirectly)
-* An expanded name whose prefix is an imported/parent project name, and
-  whose selector is a package name in that project.
-
-
-.. _Case_Constructions:
-
-Case Constructions
-------------------
-
-A **case** construction is used in a project file to effect conditional
-behavior. Through this construction, you can set the value of attributes
-and variables depending on the value previously assigned to a typed
-variable.
-
-All choices in a choice list must be distinct. Unlike Ada, the choice
-lists of all alternatives do not need to include all values of the type.
-An `others` choice must appear last in the list of alternatives.
-
-The syntax of a `case` construction is based on the Ada case construction
-(although the `null` declaration for empty alternatives is optional).
-
-The case expression must be a string variable, either typed or not, whose value
-is often given by an external reference (see :ref:`External_Values`).
-
-Each alternative starts with the reserved word `when`, either a list of
-literal strings separated by the `"|"` character or the reserved word
-`others`, and the `"=>"` token.
-When the case expression is a typed string variable, each literal string must
-belong to the string type that is the type of the case variable.
-After each `=>`, there are zero or more declarations.  The only
-declarations allowed in a case construction are other case constructions,
-attribute declarations and variable declarations. String type declarations and
-package declarations are not allowed. Variable declarations are restricted to
-variables that have already been declared before the case construction.
-
-::
-
-     case_construction ::=
-       *case* *<variable_>*name *is* {case_item} *end case* ;
-
-     case_item ::=
-       *when* discrete_choice_list =>
-         {case_declaration
-           | attribute_declaration
-           | variable_declaration
-           | empty_declaration}
-
-     discrete_choice_list ::= string_literal {| string_literal} | *others*
-
-Here is a typical example, with a typed string variable:
-
-.. code-block:: gpr
-
-     project MyProj is
-        type OS_Type is ("GNU/Linux", "Unix", "NT", "VMS");
-        OS : OS_Type := external ("OS", "GNU/Linux");
-
-        package Compiler is
-          case OS is
-            when "GNU/Linux" | "Unix" =>
-              for Switches ("Ada")
-                  use ("-gnath");
-            when "NT" =>
-              for Switches ("Ada")
-                  use ("-gnatP");
-            when others =>
-              null;
-          end case;
-        end Compiler;
-     end MyProj;
-
-
-.. _Attributes:
-
-Attributes
-----------
-
-A project (and its packages) may have **attributes** that define
-the project's properties.  Some attributes have values that are strings;
-others have values that are string lists.
-
-::
-
-     attribute_declaration ::=
-        simple_attribute_declaration | indexed_attribute_declaration
-
-     simple_attribute_declaration ::= *for* attribute_designator *use* expression ;
-
-     indexed_attribute_declaration ::=
-       *for* *<indexed_attribute_>*simple_name ( string_literal) *use* expression ;
-
-     attribute_designator ::=
-       *<simple_attribute_>*simple_name
-       | *<indexed_attribute_>*simple_name ( string_literal )
-
-There are two categories of attributes: **simple attributes**
-and **indexed attributes**.
-Each simple attribute has a default value: the empty string (for string
-attributes) and the empty list (for string list attributes).
-An attribute declaration defines a new value for an attribute, and overrides
-the previous value. The syntax of a simple attribute declaration is similar to
-that of an attribute definition clause in Ada.
-
-Some attributes are indexed. These attributes are mappings whose
-domain is a set of strings. They are declared one association
-at a time, by specifying a point in the domain and the corresponding image
-of the attribute.
-Like untyped variables and simple attributes, indexed attributes
-may be declared several times. Each declaration supplies a new value for the
-attribute, and replaces the previous setting.
-
-Here are some examples of attribute declarations:
-
-.. code-block:: gpr
-
-     --  simple attributes
-     for Object_Dir use "objects";
-     for Source_Dirs use ("units", "test/drivers");
-
-     --  indexed attributes
-     for Body ("main") use "Main.ada";
-     for Switches ("main.ada")
-         use ("-v", "-gnatv");
-     for Switches ("main.ada") use Builder'Switches ("main.ada") & "-g";
-
-     --  indexed attributes copy (from package Builder in project Default)
-     --  The package name must always be specified, even if it is the current
-     --  package.
-     for Default_Switches use Default.Builder'Default_Switches;
-
-Attributes references may appear anywhere in expressions, and are used
-to retrieve the value previously assigned to the attribute. If an attribute
-has not been set in a given package or project, its value defaults to the
-empty string or the empty list, with some exceptions.
-
-::
-
-    attribute_reference ::=
-      attribute_prefix ' *<simple_attribute>_*simple_name [ (string_literal) ]
-    attribute_prefix ::= *project*
-      | *<project_>*simple_name
-      | package_identifier
-      | *<project_>*simple_name . package_identifier
-
-Examples are::
-
-     <project>'Object_Dir
-     Naming'Dot_Replacement
-     Imported_Project'Source_Dirs
-     Imported_Project.Naming'Casing
-     Builder'Default_Switches ("Ada")
-
-The exceptions to the empty defaults are:
-
-* Object_Dir: default is "."
-* Exec_Dir: default is 'Object_Dir, that is the value of attribute
-  Object_Dir in the same project, declared or defaulted.
-* Source_Dirs: default is (".")
-
-The prefix of an attribute may be:
-
-* `project` for an attribute of the current project
-* The name of an existing package of the current project
-* The name of an imported project
-* The name of a parent project that is extended by the current project
-* An expanded name whose prefix is imported/parent project name,
-  and whose selector is a package name
-
-In the following sections, all predefined attributes are succinctly described,
-first the project level attributes, that is those attributes that are not in a
-package, then the attributes in the different packages.
-
-It is possible for different tools to dynamically create new packages with
-attributes, or new attributes in predefined packages. These attributes are
-not documented here.
-
-The attributes under Configuration headings are usually found only in
-configuration project files.
-
-The characteristics of each attribute are indicated as follows:
-
-* **Type of value**
-
-  The value of an attribute may be a single string, indicated by the word
-  "single", or a string list, indicated by the word "list".
-
-* **Read-only**
-
-  When the attribute is read-only, that is when it is not allowed to declare
-  the attribute, this is indicated by the words "read-only".
-
-* **Optional index**
-
-  If it is allowed in the value of the attribute (both single and list) to have
-  an optional index, this is indicated by the words "optional index".
-
-* **Indexed attribute**
-
-  When it is an indexed attribute, this is indicated by the word "indexed".
-
-* **Case-sensitivity of the index**
-
-  For an indexed attribute, if the index is case-insensitive, this is indicated
-  by the words "case-insensitive index".
-
-* **File name index**
-
-  For an indexed attribute, when the index is a file name, this is indicated by
-  the words "file name index". The index may or may not be case-sensitive,
-  depending on the platform.
-
-* **others allowed in index**
-
-  For an indexed attribute, if it is allowed to use **others** as the index,
-  this is indicated by the words "others allowed".
-
-  When **others** is used as the index of an indexed attribute, the value of
-  the attribute indexed by **others** is used when no other index would apply.
-
-
-.. _Project_Level_Attributes:
-
-Project Level Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^
-
-
-* **General**
-
-  * **Name**: single, read-only
-
-    The name of the project.
-
-  * **Project_Dir**: single, read-only
-
-    The path name of the project directory.
-
-  * **Main**: list, optional index
-
-    The list of main sources for the executables.
-
-  * **Languages**: list
-
-    The list of languages of the sources of the project.
-
-  * **Roots**: list, indexed, file name index
-
-    The index is the file name of an executable source. Indicates the list of units
-    from the main project that need to be bound and linked with their closures
-    with the executable. The index is either a file name, a language name or "*".
-    The roots for an executable source are those in **Roots** with an index that
-    is the executable source file name, if declared. Otherwise, they are those in
-    **Roots** with an index that is the language name of the executable source,
-    if present. Otherwise, they are those in **Roots ("*")**, if declared. If none
-    of these three possibilities are declared, then there are no roots for the
-    executable source.
-
-  * **Externally_Built**: single
-
-    Indicates if the project is externally built.
-    Only case-insensitive values allowed are "true" and "false", the default.
-
-* **Directories**
-
-  * **Object_Dir**: single
-
-    Indicates the object directory for the project.
-
-  * **Exec_Dir**: single
-
-    Indicates the exec directory for the project, that is the directory where the
-    executables are.
-
-  * **Source_Dirs**: list
-
-    The list of source directories of the project.
-
-  * **Inherit_Source_Path**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of language names. Indicates that
-    in the source search path of the index language the source directories of
-    the languages in the list should be included.
-
-    Example:
-
-    .. code-block:: gpr
-
-       for Inherit_Source_Path ("C++") use ("C");
-
-  * **Exclude_Source_Dirs**: list
-
-    The list of directories that are included in Source_Dirs but are not source
-    directories of the project.
-
-  * **Ignore_Source_Sub_Dirs**: list
-
-    Value is a list of simple names for subdirectories that are removed from the
-    list of source directories, including theur subdirectories.
-
-* **Source Files**
-
-  * **Source_Files**: list
-
-    Value is a list of source file simple names.
-
-  * **Locally_Removed_Files**: list
-
-    Obsolescent. Equivalent to Excluded_Source_Files.
-
-  * **Excluded_Source_Files**: list
-
-    Value is a list of simple file names that are not sources of the project.
-    Allows to remove sources that are inherited or found in the source directories
-    and that match the naming scheme.
-
-  * **Source_List_File**: single
-
-    Value is a text file name that contains a list of source file simple names,
-    one on each line.
-
-  * **Excluded_Source_List_File**: single
-
-    Value is a text file name that contains a list of file simple names that
-    are not sources of the project.
-
-  * **Interfaces**: list
-
-    Value is a list of file names that constitutes the interfaces of the project.
-
-* **Aggregate Projects**
-
-  * **Project_Files**: list
-
-    Value is the list of aggregated projects.
-
-  * **Project_Path**: list
-
-    Value is a list of directories that are added to the project search path when
-    looking for the aggregated projects.
-
-  * **External**: single, indexed
-
-    Index is the name of an external reference. Value is the value of the
-    external reference to be used when parsing the aggregated projects.
-
-* **Libraries**
-
-  * **Library_Dir**: single
-
-    Value is the name of the library directory. This attribute needs to be
-    declared for each library project.
-
-  * **Library_Name**: single
-
-    Value is the name of the library. This attribute needs to be declared or
-    inherited for each library project.
-
-  * **Library_Kind**: single
-
-    Specifies the kind of library: static library (archive) or shared library.
-    Case-insensitive values must be one of "static" for archives (the default) or
-    "dynamic" or "relocatable" for shared libraries.
-
-  * **Library_Version**: single
-
-    Value is the name of the library file.
-
-  * **Library_Interface**: list
-
-    Value is the list of unit names that constitutes the interfaces
-    of a Stand-Alone Library project.
-
-  * **Library_Standalone**: single
-
-    Specifies if a Stand-Alone Library (SAL) is encapsulated or not.
-    Only authorized case-insensitive values are "standard" for non encapsulated
-    SALs, "encapsulated" for encapsulated SALs or "no" for non SAL library project.
-
-  * **Library_Encapsulated_Options**: list
-
-    Value is a list of options that need to be used when linking an encapsulated
-    Stand-Alone Library.
-
-  * **Library_Encapsulated_Supported**: single
-
-    Indicates if encapsulated Stand-Alone Libraries are supported. Only
-    authorized case-insensitive values are "true" and "false" (the default).
-
-  * **Library_Auto_Init**: single
-
-    Indicates if a Stand-Alone Library is auto-initialized. Only authorized
-    case-insentive values are "true" and "false".
-
-  * **Leading_Library_Options**: list
-
-    Value is a list of options that are to be used at the beginning of
-    the command line when linking a shared library.
-
-  * **Library_Options**: list
-
-    Value is a list of options that are to be used when linking a shared library.
-
-  * **Library_Rpath_Options**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of options for an invocation of the
-    compiler of the language. This invocation is done for a shared library project
-    with sources of the language. The output of the invocation is the path name
-    of a shared library file. The directory name is to be put in the run path
-    option switch when linking the shared library for the project.
-
-  * **Library_Src_Dir**: single
-
-    Value is the name of the directory where copies of the sources of the
-    interfaces of a Stand-Alone Library are to be copied.
-
-  * **Library_ALI_Dir**: single
-
-    Value is the name of the directory where the ALI files of the interfaces
-    of a Stand-Alone Library are to be copied. When this attribute is not declared,
-    the directory is the library directory.
-
-  * **Library_gcc**: single
-
-    Obsolescent attribute. Specify the linker driver used to link a shared library.
-    Use instead attribute Linker'Driver.
-
-  * **Library_Symbol_File**: single
-
-    Value is the name of the library symbol file.
-
-  * **Library_Symbol_Policy**: single
-
-    Indicates the symbol policy kind. Only authorized case-insensitive values are
-    "autonomous", "default", "compliant", "controlled" or "direct".
-
-  * **Library_Reference_Symbol_File**: single
-
-    Value is the name of the reference symbol file.
-
-* **Configuration - General**
-
-  * **Default_Language**: single
-
-    Value is the case-insensitive name of the language of a project when attribute
-    Languages is not specified.
-
-  * **Run_Path_Option**: list
-
-    Value is the list of switches to be used when specifying the run path option
-    in an executable.
-
-  * **Run_Path_Origin**: single
-
-    Value is the the string that may replace the path name of the executable
-    directory in the run path options.
-
-  * **Separate_Run_Path_Options**: single
-
-    Indicates if there may be several run path options specified when linking an
-    executable. Only authorized case-insensitive values are "true" or "false" (the
-    default).
-
-  * **Toolchain_Version**: single, indexed, case-insensitive index
-
-    Index is a language name. Specify the version of a toolchain for a language.
-
-  * **Toolchain_Description**: single, indexed, case-insensitive index
-
-    Obsolescent. No longer used.
-
-  * **Object_Generated**: single, indexed, case-insensitive index
-
-    Index is a language name. Indicates if invoking the compiler for a language
-    produces an object file. Only authorized case-insensitive values are "false"
-    and "true" (the default).
-
-  * **Objects_Linked**: single, indexed, case-insensitive index
-
-    Index is a language name. Indicates if the object files created by the compiler
-    for a language need to be linked in the executable. Only authorized
-    case-insensitive values are "false" and "true" (the default).
-
-  * **Target**: single
-
-    Value is the name of the target platform. Taken into account only in the main
-    project.
-
-    Note that when the target is specified on the command line (usually with
-    a switch --target=), the value of attribute reference 'Target is the one
-    specified on the command line.
-
-  * **Runtime**: single, indexed, case-insensitive index
-
-    Index is a language name. Indicates the runtime directory that is to be used
-    when using the compiler of the language. Taken into account only in the main
-    project.
-
-    Note that when the runtime is specified for a language on the command line
-    (usually with a switch --RTS), the value of attribute reference 'Runtime
-    for this language is the one specified on the command line.
-
-* **Configuration - Libraries**
-
-  * **Library_Builder**: single
-
-    Value is the path name of the application that is to be used to build
-    libraries. Usually the path name of "gprlib".
-
-  * **Library_Support**: single
-
-    Indicates the level of support of libraries. Only authorized case-insensitive
-    values are "static_only", "full" or "none" (the default).
-
-* **Configuration - Archives**
-
-  * **Archive_Builder**: list
-
-    Value is the name of the application to be used to create a static library
-    (archive), followed by the options to be used.
-
-  * **Archive_Builder_Append_Option**: list
-
-    Value is the list of options to be used when invoking the archive builder
-    to add project files into an archive.
-
-  * **Archive_Indexer**: list
-
-    Value is the name of the archive indexer, followed by the required options.
-
-  * **Archive_Suffix**: single
-
-    Value is the extension of archives. When not declared, the extension is ".a".
-
-  * **Library_Partial_Linker**: list
-
-    Value is the name of the partial linker executable, followed by the required
-    options.
-
-* **Configuration - Shared Libraries**
-
-  * **Shared_Library_Prefix**: single
-
-    Value is the prefix in the name of shared library files. When not declared,
-    the prefix is "lib".
-
-  * **Shared_Library_Suffix**: single
-
-    Value is the the extension of the name of shared library files. When not
-    declared, the extension is ".so".
-
-  * **Symbolic_Link_Supported**: single
-
-    Indicates if symbolic links are supported on the platform. Only authorized
-    case-insensitive values are "true" and "false" (the default).
-
-  * **Library_Major_Minor_Id_Supported**: single
-
-    Indicates if major and minor ids for shared library names are supported on
-    the platform. Only authorized case-insensitive values are "true" and "false"
-    (the default).
-
-  * **Library_Auto_Init_Supported**: single
-
-    Indicates if auto-initialization of Stand-Alone Libraries is supported. Only
-    authorized case-insensitive values are "true" and "false" (the default).
-
-  * **Shared_Library_Minimum_Switches**: list
-
-    Value is the list of required switches when linking a shared library.
-
-  * **Library_Version_Switches**: list
-
-    Value is the list of switches to specify a internal name for a shared library.
-
-  * **Library_Install_Name_Option**: single
-
-    Value is the name of the option that needs to be used, concatenated with the
-    path name of the library file, when linking a shared library.
-
-  * **Runtime_Library_Dir**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the path name of the directory where the
-    runtime libraries are located.
-
-  * **Runtime_Source_Dir**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the path name of the directory where the
-    sources of runtime libraries are located.
-
-
-.. _Package_Binder_Attributes:
-
-Package Binder Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **General**
-
-  * **Default_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to be used when binding
-    code of the language, if there is no applicable attribute Switches.
-
-  * **Switches**: list, optional index, indexed,
-    case-insensitive index, others allowed
-
-    Index is either a language name or a source file name. Value is the list of
-    switches to be used when binding code. Index is either the source file name
-    of the executable to be bound or the language name of the code to be bound.
-
-* **Configuration - Binding**
-
-  * **Driver**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the name of the application to be used when
-    binding code of the language.
-
-  * **Required_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of the required switches to be
-    used when binding code of the language.
-
-  * **Prefix**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is a prefix to be used for the binder exchange
-    file name for the language. Used to have different binder exchange file names
-    when binding different languages.
-
-  * **Objects_Path**: single,indexed, case-insensitive index
-
-    Index is a language name. Value is the name of the environment variable that
-    contains the path for the object directories.
-
-  * **Object_Path_File**: single,indexed, case-insensitive index
-
-    Index is a language name. Value is the name of the environment variable. The
-    value of the environment variable is the path name of a text file that
-    contains the list of object directories.
-
-
-.. _Package_Builder_Attributes:
-
-Package Builder Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Default_Switches**: list, indexed, case-insensitive index
-
-  Index is a language name. Value is the list of builder switches to be used when
-  building an executable of the language, if there is no applicable attribute
-  Switches.
-
-* **Switches**: list, optional index, indexed, case-insensitive index,
-  others allowed
-
-  Index is either a language name or a source file name. Value is the list of
-  builder switches to be used when building an executable. Index is either the
-  source file name of the executable to be built or its language name.
-
-* **Global_Compilation_Switches**: list, optional index, indexed,
-  case-insensitive index
-
-  Index is a language name. Value is the list of compilation switches to be
-  used when building an executable. Index is either the source file name of
-  the executable to be built or its language name.
-
-* **Executable**: single, indexed, case-insensitive index
-
-  Index is an executable source file name. Value is the simple file name of the
-  executable to be built.
-
-* **Executable_Suffix**: single
-
-  Value is the extension of the file names of executable. When not specified,
-  the extension is the default extension of executables on the platform.
-
-* **Global_Configuration_Pragmas**: single
-
-  Value is the file name of a configuration pragmas file that is specified to
-  the Ada compiler when compiling any Ada source in the project tree.
-
-* **Global_Config_File**: single, indexed, case-insensitive index
-
-  Index is a language name. Value is the file name of a configuration file that
-  is specified to the compiler when compiling any source of the language in the
-  project tree.
-
-
-.. only:: PRO and GPL
-
-   .. _Package_Check_Attributes:
-
-   Package Check Attributes
-   ^^^^^^^^^^^^^^^^^^^^^^^^
-
-   * **Default_Switches**: list, indexed, case-insensitive index
-
-     Index is a language name. Value is a list of switches to be used when invoking
-     `gnatcheck` for a source of the language, if there is no applicable
-     attribute Switches.
-
-   * **Switches**: list, optional index, indexed, case-insensitive index,
-     others allowed
-
-     Index is a source file name. Value is the list of switches to be used when
-     invoking `gnatcheck` for the source.
-
-.. _Package_Clean_Attributes:
-
-Package Clean Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Switches**: list
-
-  Value is a list of switches to be used by the cleaning application.
-
-* **Source_Artifact_Extensions**: list, indexed, case-insensitive index
-
-  Index is a language names. Value is the list of extensions for file names
-  derived from object file names that need to be cleaned in the object
-  directory of the project.
-
-* **Object_Artifact_Extensions**: list, indexed, case-insensitive index
-
-  Index is a language names. Value is the list of extensions for file names
-  derived from source file names that need to be cleaned in the object
-  directory of the project.
-
-* **Artifacts_In_Object_Dir**: single
-
-  Value is a list of file names expressed as regular expressions that are to be
-  deleted by gprclean in the object directory of the project.
-
-* **Artifacts_In_Exec_Dir**: single
-
-  Value is list of file names expressed as regular expressions that are to be
-  deleted by gprclean in the exec directory of the main project.
-
-.. _Package_Compiler_Attributes:
-
-Package Compiler Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **General**
-
-  * **Default_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of switches to be used when invoking
-    the compiler for the language for a source of the project, if there is no
-    applicable attribute Switches.
-
-  * **Switches**: list, optional index, indexed, case-insensitive index,
-    others allowed
-
-    Index is a source file name or a language name. Value is the list of switches
-    to be used when invoking the compiler for the source or for its language.
-
-  * **Local_Configuration_Pragmas**: single
-
-    Value is the file name of a configuration pragmas file that is specified to
-    the Ada compiler when compiling any Ada source in the project.
-
-  * **Local_Config_File**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the file name of a configuration file that
-    is specified to the compiler when compiling any source of the language in the
-    project.
-
-* **Configuration - Compiling**
-
-  * **Driver**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the name of the executable for the compiler
-    of the language.
-
-  * **Language_Kind**: single, indexed, case-insensitive index
-
-    Index is a language name. Indicates the kind of the language, either file based
-    or unit based. Only authorized case-insensitive values are "unit_based" and
-    "file_based" (the default).
-
-  * **Dependency_Kind**: single, indexed, case-insensitive index
-
-    Index is a language name. Indicates how the dependencies are handled for the
-    language. Only authorized case-insensitive values are "makefile", "ali_file",
-    "ali_closure" or "none" (the default).
-
-  * **Required_Switches**: list, indexed, case-insensitive index
-
-    Equivalent to attribute Leading_Required_Switches.
-
-  * **Leading_Required_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of the minimum switches to be used
-    at the beginning of the command line when invoking the compiler for the
-    language.
-
-  * **Trailing_Required_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of the minimum switches to be used
-    at the end of the command line when invoking the compiler for the language.
-
-  * **PIC_Option**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to be used when
-    compiling a source of the language when the project is a shared library
-    project.
-
-  * **Path_Syntax**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the kind of path syntax to be used when
-    invoking the compiler for the language. Only authorized case-insensitive
-    values are "canonical" and "host" (the default).
-
-  * **Source_File_Switches**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of switches to be used just before
-    the path name of the source to compile when invoking the compiler for a source
-    of the language.
-
-  * **Object_File_Suffix**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the extension of the object files created
-    by the compiler of the language. When not specified, the extension is the
-    default one for the platform.
-
-  * **Object_File_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to be used by the
-    compiler of the language to specify the path name of the object file. When not
-    specified, the switch used is "-o".
-
-  * **Multi_Unit_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to be used to compile
-    a unit in a multi unit source of the language. The index of the unit in the
-    source is concatenated with the last switches in the list.
-
-  * **Multi_Unit_Object_Separator**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the string to be used in the object file
-    name before the index of the unit, when compiling a unit in a multi unit source
-    of the language.
-
-* **Configuration - Mapping Files**
-
-  * **Mapping_File_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to be used to specify
-    a mapping file when invoking the compiler for a source of the language.
-
-  * **Mapping_Spec_Suffix**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the suffix to be used in a mapping file
-    to indicate that the source is a spec.
-
-  * **Mapping_Body_Suffix**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the suffix to be used in a mapping file
-    to indicate that the source is a body.
-
-* **Configuration - Config Files**
-
-  * **Config_File_Switches**: list: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to specify to the
-    compiler of the language a configuration file.
-
-  * **Config_Body_File_Name**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the template to be used to indicate a
-    configuration specific to a body of the language in a configuration
-    file.
-
-  * **Config_Body_File_Name_Index**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the template to be used to indicate a
-    configuration specific to the body a unit in a multi unit source of the
-    language in a configuration file.
-
-  * **Config_Body_File_Name_Pattern**: single, indexed,
-    case-insensitive index
-
-    Index is a language name. Value is the template to be used to indicate a
-    configuration for all bodies of the languages in a configuration file.
-
-  * **Config_Spec_File_Name**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the template to be used to indicate a
-    configuration specific to a spec of the language in a configuration
-    file.
-
-  * **Config_Spec_File_Name_Index**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the template to be used to indicate a
-    configuration specific to the spec a unit in a multi unit source of the
-    language in a configuration file.
-
-  * **Config_Spec_File_Name_Pattern**: single, indexed,
-    case-insensitive index
-
-    Index is a language name. Value is the template to be used to indicate a
-    configuration for all specs of the languages in a configuration file.
-
-  * **Config_File_Unique**: single, indexed, case-insensitive index
-
-    Index is a language name. Indicates if there should be only one configuration
-    file specified to the compiler of the language. Only authorized
-    case-insensitive values are "true" and "false" (the default).
-
-* **Configuration - Dependencies**
-
-  * **Dependency_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to be used to specify
-    to the compiler the dependency file when the dependency kind of the language is
-    file based, and when Dependency_Driver is not specified for the language.
-
-  * **Dependency_Driver**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the name of the executable to be used to
-    create the dependency file for a source of the language, followed by the
-    required switches.
-
-* **Configuration - Search Paths**
-
-  * **Include_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to specify to the
-    compiler of the language to indicate a directory to look for sources.
-
-  * **Include_Path**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the name of an environment variable that
-    contains the path of all the directories that the compiler of the language
-    may search for sources.
-
-  * **Include_Path_File**: single, indexed, case-insensitive index
-
-    Index is a language name. Value is the name of an environment variable the
-    value of which is the path name of a text file that contains the directories
-    that the compiler of the language may search for sources.
-
-  * **Object_Path_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is the list of switches to specify to the
-    compiler of the language the name of a text file that contains the list of
-    object directories. When this attribute is not declared, the text file is
-    not created.
-
-
-.. _Package_Cross_Reference_Attributes:
-
-Package Cross_Reference Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Default_Switches**: list, indexed, case-insensitive index
-
-  Index is a language name. Value is a list of switches to be used when invoking
-  `gnatxref` for a source of the language, if there is no applicable
-  attribute Switches.
-
-* **Switches**: list, optional index, indexed, case-insensitive index,
-  others allowed
-
-  Index is a source file name. Value is the list of switches to be used when
-  invoking `gnatxref` for the source.
-
-
-.. only:: PRO or GPL
-
-  .. _Package_Eliminate_Attributes:
-
-  Package Eliminate Attributes
-  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-  * **Default_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of switches to be used when invoking
-    `gnatelim` for a source of the language, if there is no applicable
-    attribute Switches.
-
-  * **Switches**: list, optional index, indexed, case-insensitive index,
-    others allowed
-
-    Index is a source file name. Value is the list of switches to be used when
-    invoking `gnatelim` for the source.
-
-.. _Package_Finder_Attributes:
-
-Package Finder Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Default_Switches**: list, indexed, case-insensitive index
-
-  Index is a language name. Value is a list of switches to be used when invoking
-  `gnatfind` for a source of the language, if there is no applicable
-  attribute Switches.
-
-* **Switches**: list, optional index, indexed, case-insensitive index,
-  others allowed
-
-  Index is a source file name. Value is the list of switches to be used when
-  invoking `gnatfind` for the source.
-
-
-.. _Package_gnatls_Attributes:
-
-Package gnatls Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Switches**: list
-
-  Value is a list of switches to be used when invoking `gnatls`.
-
-
-.. only:: PRO or GPL
-
-  Package gnatstub Attributes
-  ^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-  * **Default_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of switches to be used when invoking
-    `gnatstub` for a source of the language, if there is no applicable
-    attribute Switches.
-
-  * **Switches**: list, optional index, indexed, case-insensitive index,
-    others allowed
-
-    Index is a source file name. Value is the list of switches to be used when
-    invoking `gnatstub` for the source.
-
-
-.. _Package_IDE_Attributes:
-
-Package IDE Attributes
-^^^^^^^^^^^^^^^^^^^^^^
-
-* **Default_Switches**: list, indexed
-
-  Index is the name of an external tool that the GNAT Programming System (GPS)
-  is supporting. Value is a list of switches to use when invoking that tool.
-
-* **Remote_Host**: single
-
-  Value is a string that designates the remote host in a cross-compilation
-  environment, to be used for remote compilation and debugging. This attribute
-  should not be specified when running on the local machine.
-
-* **Program_Host**: single
-
-  Value is a string that specifies the name of IP address of the embedded target
-  in a cross-compilation environment, on which the program should execute.
-
-* **Communication_Protocol**: single
-
-  Value is the name of the protocol to use to communicate with the target
-  in a cross-compilation environment, for example `"wtx"` or
-  `"vxworks"`.
-
-* **Compiler_Command**: single, indexed, case-insensitive index
-
-  Index is a language Name. Value is a string that denotes the command to be
-  used to invoke the compiler. For historical reasons, the value of
-  `Compiler_Command ("Ada")` is expected to be a reference to *gnatmake* or
-  *cross-gnatmake*.
-
-* **Debugger_Command**: single
-
-  Value is a string that specifies the name of the debugger to be used, such as
-  gdb, powerpc-wrs-vxworks-gdb or gdb-4.
-
-* **gnatlist**: single
-
-  Value is a string that specifies the name of the *gnatls* utility
-  to be used to retrieve information about the predefined path; for example,
-  `"gnatls"`, `"powerpc-wrs-vxworks-gnatls"`.
-
-* **VCS_Kind**: single
-
-  Value is a string used to specify the Version Control System (VCS) to be used
-  for this project, for example "Subversion", "ClearCase". If the
-  value is set to "Auto", the IDE will try to detect the actual VCS used
-  on the list of supported ones.
-
-* **VCS_File_Check**: single
-
-  Value is a string that specifies the command used by the VCS to check
-  the validity of a file, either when the user explicitly asks for a check,
-  or as a sanity check before doing the check-in.
-
-* **VCS_Log_Check**: single
-
-  Value is a string that specifies the command used by the VCS to check
-  the validity of a log file.
-
-* **Documentation_Dir**: single
-
-  Value is the directory used to generate the documentation of source code.
-
-
-.. _Package_Install_Attributes:
-
-Package Install Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Artifacts**: list, indexed
-
-  An array attribute to declare a set of files not part of the sources
-  to be installed. The array discriminant is the directory where the
-  file is to be installed. If a relative directory then Prefix (see
-  below) is prepended. Note also that if the same file name occurs
-  multiple time in the attribute list, the last one will be the one
-  installed.
-
-* **Prefix**: single
-
-  Value is the install destination directory.
-
-* **Sources_Subdir**: single
-
-  Value is the sources directory or subdirectory of Prefix.
-
-* **Exec_Subdir**: single
-
-  Value is the executables directory or subdirectory of Prefix.
-
-* **Lib_Subdir**: single
-
-  Value is library directory or subdirectory of Prefix.
-
-* **Project_Subdir**: single
-
-  Value is the project directory or subdirectory of Prefix.
-
-* **Active**: single
-
-  Indicates that the project is to be installed or not. Case-insensitive value
-  "false" means that the project is not to be installed, all other values mean
-  that the project is to be installed.
-
-* **Mode**: single
-
-  Value is the installation mode, it is either **dev** (default) or **usage**.
-
-* **Install_Name**: single
-
-  Specify the name to use for recording the installation. The default is
-  the project name without the extension.
-
-
-.. _Package_Linker_Attributes:
-
-Package Linker Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **General**
-
-  * **Required_Switches**: list
-
-    Value is a list of switches that are required when invoking the linker to link
-    an executable.
-
-  * **Default_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of switches for the linker when
-    linking an executable for a main source of the language, when there is no
-    applicable Switches.
-
-  * **Leading_Switches**: list, optional index, indexed,
-    case-insensitive index, others allowed
-
-    Index is a source file name or a language name. Value is the list of switches
-    to be used at the beginning of the command line when invoking the linker to
-    build an executable for the source or for its language.
-
-  * **Switches**: list, optional index, indexed, case-insensitive index,
-    others allowed
-
-    Index is a source file name or a language name. Value is the list of switches
-    to be used when invoking the linker to build an executable for the source or
-    for its language.
-
-  * **Trailing_Switches**: list, optional index, indexed,
-    case-insensitive index, others allowed
-
-    Index is a source file name or a language name. Value is the list of switches
-    to be used at the end of the command line when invoking the linker to
-    build an executable for the source or for its language. These switches may
-    override the Required_Switches.
-
-  * **Linker_Options**: list
-
-    Value is a list of switches/options that are to be added when linking an
-    executable from a project importing the current project directly or indirectly.
-    Linker_Options are not used when linking an executable from the current
-    project.
-
-  * **Map_File_Option**: single
-
-    Value is the switch to specify the map file name that the linker needs to
-    create.
-
-* **Configuration - Linking**
-
-  * **Driver**: single
-
-    Value is the name of the linker executable.
-
-* **Configuration - Response Files**
-
-  * **Max_Command_Line_Length**: single
-
-    Value is the maximum number of character in the command line when invoking
-    the linker to link an executable.
-
-  * **Response_File_Format**: single
-
-    Indicates the kind of response file to create when the length of the linking
-    command line is too large. Only authorized case-insensitive values are "none",
-    "gnu", "object_list", "gcc_gnu", "gcc_option_list" and "gcc_object_list".
-
-  * **Response_File_Switches**: list
-
-    Value is the list of switches to specify a response file to the linker.
-
-
-
-.. only PRO or GPL
-
-  .. _Package_Metrics_Attribute:
-
-  Package Metrics Attribute
-  ^^^^^^^^^^^^^^^^^^^^^^^^^
-
-  * **Default_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of switches to be used when invoking
-    `gnatmetric` for a source of the language, if there is no applicable
-    attribute Switches.
-
-  * **Switches**: list, optional index, indexed, case-insensitive index,
-    others allowed
-
-    Index is a source file name. Value is the list of switches to be used when
-    invoking `gnatmetric` for the source.
-
-
-.. _Package_Naming_Attributes:
-
-Package Naming Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Specification_Suffix**: single, indexed, case-insensitive index
-
-  Equivalent to attribute Spec_Suffix.
-
-* **Spec_Suffix**: single, indexed, case-insensitive index
-
-  Index is a language name. Value is the extension of file names for specs of
-  the language.
-
-* **Implementation_Suffix**: single, indexed, case-insensitive index
-
-  Equivalent to attribute Body_Suffix.
-
-* **Body_Suffix**: single, indexed, case-insensitive index
-
-  Index is a language name. Value is the extension of file names for bodies of
-  the language.
-
-* **Separate_Suffix**: single
-
-  Value is the extension of file names for subunits of Ada.
-
-* **Casing**: single
-
-  Indicates the casing of sources of the Ada language. Only authorized
-  case-insensitive values are "lowercase", "uppercase" and "mixedcase".
-
-* **Dot_Replacement**: single
-
-  Value is the string that replace the dot of unit names in the source file names
-  of the Ada language.
-
-* **Specification**: single, optional index, indexed,
-  case-insensitive index
-
-  Equivalent to attribute Spec.
-
-* **Spec**: single, optional index, indexed, case-insensitive index
-
-  Index is a unit name. Value is the file name of the spec of the unit.
-
-* **Implementation**: single, optional index, indexed,
-  case-insensitive index
-
-  Equivalent to attribute Body.
-
-* **Body**: single, optional index, indexed, case-insensitive index
-
-  Index is a unit name. Value is the file name of the body of the unit.
-
-* **Specification_Exceptions**: list, indexed, case-insensitive index
-
-  Index is a language name. Value is a list of specs for the language that do not
-  necessarily follow the naming scheme for the language and that may or may not
-  be found in the source directories of the project.
-
-* **Implementation_Exceptions**: list, indexed, case-insensitive index
-
-  Index is a language name. Value is a list of bodies for the language that do not
-  necessarily follow the naming scheme for the language and that may or may not
-  be found in the source directories of the project.
-
-
-.. only:: PRO or GPL
-
-  .. _Package_Pretty_Printer_Attributes:
-
-  Package Pretty_Printer Attributes
-  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-  * **Default_Switches**: list, indexed, case-insensitive index
-
-    Index is a language name. Value is a list of switches to be used when invoking
-    `gnatpp` for a source of the language, if there is no applicable
-    attribute Switches.
-
-  * **Switches**: list, optional index, indexed, case-insensitive index,
-    others allowed
-
-    Index is a source file name. Value is the list of switches to be used when
-    invoking `gnatpp` for the source.
-
-
-.. _Package_Remote_Attributes:
-
-Package Remote Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Included_Patterns**: list
-
-  If this attribute is defined it sets the patterns to
-  synchronized from the master to the slaves. It is exclusive
-  with Excluded_Patterns, that is it is an error to define
-  both.
-
-* **Included_Artifact_Patterns**: list
-
-  If this attribute is defined it sets the patterns of compilation
-  artifacts to synchronized from the slaves to the build master.
-  This attribute replace the default hard-coded patterns.
-
-* **Excluded_Patterns**: list
-
-  Set of patterns to ignore when synchronizing sources from the build
-  master to the slaves. A set of predefined patterns are supported
-  (e.g. \*.o, \*.ali, \*.exe, etc.), this attributes make it possible to
-  add some more patterns.
-
-* **Root_Dir**: single
-
-  Value is the root directory used by the slave machines.
-
-
-.. _Package_Stack_Attributes:
-
-Package Stack Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Switches**: list
-
-  Value is the list of switches to be used when invoking `gnatstack`.
-
-
-Package Synchronize Attributes
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-* **Default_Switches**: list, indexed, case-insensitive index
-
-  Index is a language name. Value is a list of switches to be used when invoking
-  `gnatsync` for a source of the language, if there is no applicable
-  attribute Switches.
-
-* **Switches**: list, optional index, indexed, case-insensitive index,
-  others allowed
-
-  Index is a source file name. Value is the list of switches to be used when
-  invoking `gnatsync` for the source.
diff --git a/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst b/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst
index 792d698c52f..1d22d17e935 100644
--- a/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst
+++ b/gcc/ada/doc/gnat_ugn/gnat_utility_programs.rst
@@ -19,6 +19,9 @@ This chapter describes a number of utility programs:
   * :ref:`The_Body_Stub_Generator_gnatstub`
   * :ref:`The_Unit_Test_Generator_gnattest`
 
+  It also describes how several of these tools can be used in conjunction
+  with project files: :ref:`Using_Project_Files_with_GNAT_Tools`
+
 .. only:: FSF
 
   * :ref:`The_File_Cleanup_Utility_gnatclean`
@@ -629,7 +632,8 @@ The following switches are available for *gnatxref*:
 .. index:: -pFILE (gnatxref)
 
 :samp:`p{FILE}`
-  Specify a project file to use :ref:`GNAT_Project_Manager`.
+  Specify a project file to use (see the *GNAT_Project_Manager*
+  chapter in the *GPRbuild User's Guide*).
   If you need to use the :file:`.gpr`
   project files, you should use gnatxref through the GNAT driver
   (*gnat xref -Pproject*).
@@ -832,7 +836,8 @@ The following switches are available:
 .. index:: -pFILE (gnatfind)
 
 :samp:`p{FILE}`
-  Specify a project file (:ref:`GNAT_Project_Manager`) to use.
+  Specify a project file (see the *GNAT_Project_Manager* chapter in the
+  *GPRbuild User's Guide*).
   By default, `gnatxref` and `gnatfind` will try to locate a
   project file in the current directory.
 
@@ -1379,6 +1384,11 @@ Alternatively, you may run the script using the following command line:
   The *gnat2xml* tool is an ASIS-based utility that converts
   Ada source code into XML.
 
+  *gnat2xml* is a project-aware tool
+  (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
+  the project-related switches).  The project file package that can specify
+  *gnat2xml* switches is named ``gnat2xml``.
+
   .. _Switches_for_*gnat2xml*:
 
   Switches for *gnat2xml*
@@ -1823,15 +1833,12 @@ Alternatively, you may run the script using the following command line:
   The *gnatcheck* tool is an ASIS-based utility that checks properties
   of Ada source files according to a given set of semantic rules.
 
-  In order to check compliance with a given rule, *gnatcheck* has to
-  semantically analyze the Ada sources.
-  Therefore, checks can only be performed on
-  legal Ada units. Moreover, when a unit depends semantically upon units located
-  outside the current directory, the source search path has to be provided when
-  calling *gnatcheck*, either through a specified project file or
-  through *gnatcheck* switches.
+  *gnatcheck* is a project-aware tool
+  (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
+  the project-related switches).  The project file package that can specify
+  *gnatcheck* switches is named ``Check``.
 
-  For full details, refer to :title:`GNATcheck Reference Manual`.
+  For full details, plese refer to :title:`GNATcheck Reference Manual`.
 
 
 
@@ -1851,6 +1858,11 @@ Alternatively, you may run the script using the following command line:
   metrics data as output. Various switches control which
   metrics are computed and output.
 
+  *gnatmetric* is a project-aware tool
+  (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
+  the project-related switches).  The project file package that can specify
+  *gnatmetric* switches is named ``Metrics``.
+
   To compute program metrics, *gnatmetric* invokes the Ada
   compiler and generates and uses the ASIS tree for the input source;
   thus the input must be legal Ada code, and the tool should have all the
@@ -2095,71 +2107,71 @@ Alternatively, you may run the script using the following command line:
   .. index:: --no-lines (gnatmetric)
 
 
-  :samp:`-lines-all`
+  :samp:`--lines-all`
     Report all the line metrics
 
 
-  :samp:`-no-lines-all`
+  :samp:`--no-lines-all`
     Do not report any of line metrics
 
 
-  :samp:`-lines`
+  :samp:`--lines`
     Report the number of all lines
 
 
-  :samp:`-no-lines`
+  :samp:`--no-lines`
     Do not report the number of all lines
 
 
-  :samp:`-lines-code`
+  :samp:`--lines-code`
     Report the number of code lines
 
 
-  :samp:`-no-lines-code`
+  :samp:`--no-lines-code`
     Do not report the number of code lines
 
 
-  :samp:`-lines-comment`
+  :samp:`--lines-comment`
     Report the number of comment lines
 
 
-  :samp:`-no-lines-comment`
+  :samp:`--no-lines-comment`
     Do not report the number of comment lines
 
 
-  :samp:`-lines-eol-comment`
+  :samp:`--lines-eol-comment`
     Report the number of code lines containing
     end-of-line comments
 
 
-  :samp:`-no-lines-eol-comment`
+  :samp:`--no-lines-eol-comment`
     Do not report the number of code lines containing
     end-of-line comments
 
 
-  :samp:`-lines-ratio`
+  :samp:`--lines-ratio`
     Report the comment percentage in the program text
 
 
-  :samp:`-no-lines-ratio`
+  :samp:`--no-lines-ratio`
     Do not report the comment percentage in the program text
 
 
-  :samp:`-lines-blank`
+  :samp:`--lines-blank`
     Report the number of blank lines
 
 
-  :samp:`-no-lines-blank`
+  :samp:`--no-lines-blank`
     Do not report the number of blank lines
 
 
-  :samp:`-lines-average`
+  :samp:`--lines-average`
     Report the average number of code lines in subprogram bodies, task bodies,
     entry bodies and statement sequences in package bodies. The metric is computed
     and reported for the whole set of processed Ada sources only.
 
 
-  :samp:`-no-lines-average`
+  :samp:`--no-lines-average`
     Do not report the average number of code lines in subprogram bodies,
     task bodies, entry bodies and statement sequences in package bodies.
 
@@ -2204,6 +2216,15 @@ Alternatively, you may run the script using the following command line:
       maximum nesting level in the GNAT built-in style checks
       (see :ref:`Style_Checking`)
 
+  * *Number of formal parameters*
+      Number of formal parameters of a subprogram; if a subprogram does have
+      parameters, then numbers of "in", "out" and "in out" parameters are also
+      reported. This metric is reported for subprogram specifications and for
+      subprogram instantiations. For subprogram bodies, expression functions
+      and null procedures this metric is reported if the construct acts as a
+      subprogram declaration but is not a completion of previous declaration.
+      This metric is not reported for generic and formal subprograms.
+
   For the outermost unit in the file, *gnatmetric* additionally computes
   the following metrics:
 
@@ -2263,77 +2284,84 @@ Alternatively, you may run the script using the following command line:
   .. index:: --no-syntax (gnatmetric)
 
 
-  :samp:`-syntax-all`
+  :samp:`--syntax-all`
     Report all the syntax metrics
 
 
-  :samp:`-no-syntax-all`
+  :samp:`--no-syntax-all`
     Do not report any of syntax metrics
 
 
-  :samp:`-declarations`
+  :samp:`--declarations`
     Report the total number of declarations
 
 
-  :samp:`-no-declarations`
+  :samp:`--no-declarations`
     Do not report the total number of declarations
 
 
-  :samp:`-statements`
+  :samp:`--statements`
     Report the total number of statements
 
 
-  :samp:`-no-statements`
+  :samp:`--no-statements`
     Do not report the total number of statements
 
 
-  :samp:`-public-subprograms`
+  :samp:`--public-subprograms`
     Report the number of public subprograms in a compilation unit
 
 
-  :samp:`-no-public-subprograms`
+  :samp:`--no-public-subprograms`
     Do not report the number of public subprograms in a compilation unit
 
 
-  :samp:`-all-subprograms`
+  :samp:`--all-subprograms`
     Report the number of all the subprograms in a compilation unit
 
 
-  :samp:`-no-all-subprograms`
+  :samp:`--no-all-subprograms`
     Do not report the number of all the subprograms in a compilation unit
 
 
-  :samp:`-public-types`
+  :samp:`--public-types`
     Report the number of public types in a compilation unit
 
 
-  :samp:`-no-public-types`
+  :samp:`--no-public-types`
     Do not report the number of public types in a compilation unit
 
 
-  :samp:`-all-types`
+  :samp:`--all-types`
     Report the number of all the types in a compilation unit
 
 
-  :samp:`-no-all-types`
+  :samp:`--no-all-types`
     Do not report the number of all the types in a compilation unit
 
 
-  :samp:`-unit-nesting`
+  :samp:`--unit-nesting`
     Report the maximal program unit nesting level
 
 
-  :samp:`-no-unit-nesting`
+  :samp:`--no-unit-nesting`
     Do not report the maximal program unit nesting level
 
 
-  :samp:`-construct-nesting`
+  :samp:`--construct-nesting`
     Report the maximal construct nesting level
 
 
-  :samp:`-no-construct-nesting`
+  :samp:`--no-construct-nesting`
     Do not report the maximal construct nesting level
 
+  :samp:`--param-number`
+    Report the number of subprogram parameters
+
+
+  :samp:`--no-param-number`
+    Do not report the number of subprogram parameters
+
 
   .. _Complexity_Metrics_Control:
 
@@ -2420,31 +2448,31 @@ Alternatively, you may run the script using the following command line:
   .. index:: --no-complexity (gnatmetric)
 
 
-  :samp:`-complexity-all`
+  :samp:`--complexity-all`
     Report all the complexity metrics
 
 
-  :samp:`-no-complexity-all`
+  :samp:`--no-complexity-all`
     Do not report any of complexity metrics
 
 
-  :samp:`-complexity-cyclomatic`
+  :samp:`--complexity-cyclomatic`
     Report the McCabe Cyclomatic Complexity
 
 
-  :samp:`-no-complexity-cyclomatic`
+  :samp:`--no-complexity-cyclomatic`
     Do not report the McCabe Cyclomatic Complexity
 
 
-  :samp:`-complexity-essential`
+  :samp:`--complexity-essential`
     Report the Essential Complexity
 
 
-  :samp:`-no-complexity-essential`
+  :samp:`--no-complexity-essential`
     Do not report the Essential Complexity
 
 
-  :samp:`-loop-nesting`
+  :samp:`--loop-nesting`
     Report maximal loop nesting level
 
 
@@ -2452,14 +2480,14 @@ Alternatively, you may run the script using the following command line:
     Do not report maximal loop nesting level
 
 
-  :samp:`-complexity-average`
+  :samp:`--complexity-average`
     Report the average McCabe Cyclomatic Complexity for all the subprogram bodies,
     task bodies, entry bodies and statement sequences in package bodies.
     The metric is computed and reported for whole set of processed Ada sources
     only.
 
 
-  :samp:`-no-complexity-average`
+  :samp:`--no-complexity-average`
     Do not report the average McCabe Cyclomatic Complexity for all the subprogram
     bodies, task bodies, entry bodies and statement sequences in package bodies
 
@@ -2473,11 +2501,11 @@ Alternatively, you may run the script using the following command line:
   .. index:: --no-static-loop (gnatmetric)
 
 
-  :samp:`-no-static-loop`
+  :samp:`--no-static-loop`
     Do not consider static loops when computing cyclomatic complexity
 
 
-  :samp:`-extra-exit-points`
+  :samp:`--extra-exit-points`
     Report the extra exit points for subprogram bodies. As an exit point, this
     metric counts `return` statements and raise statements in case when the
     raised exception is not handled in the same body. In case of a function this
@@ -2485,7 +2513,7 @@ Alternatively, you may run the script using the following command line:
     must contain at least one `return` statement.
 
 
-  :samp:`-no-extra-exit-points`
+  :samp:`--no-extra-exit-points`
     Do not report the extra exit points for subprogram bodies
 
 
@@ -2678,39 +2706,39 @@ Alternatively, you may run the script using the following command line:
   .. index:: --unit-coupling (gnatmetric)
   .. index:: --control-coupling (gnatmetric)
 
-  :samp:`-coupling-all`
+  :samp:`--coupling-all`
     Report all the coupling metrics
 
 
-  :samp:`-tagged-coupling-out`
+  :samp:`--tagged-coupling-out`
     Report tagged (class) fan-out coupling
 
 
-  :samp:`-tagged-coupling-in`
+  :samp:`--tagged-coupling-in`
     Report tagged (class) fan-in coupling
 
 
-  :samp:`-hierarchy-coupling-out`
+  :samp:`--hierarchy-coupling-out`
     Report hierarchy (category) fan-out coupling
 
 
-  :samp:`-hierarchy-coupling-in`
+  :samp:`--hierarchy-coupling-in`
     Report hierarchy (category) fan-in coupling
 
 
-  :samp:`-unit-coupling-out`
+  :samp:`--unit-coupling-out`
     Report unit fan-out coupling
 
 
-  :samp:`-unit-coupling-in`
+  :samp:`--unit-coupling-in`
     Report unit fan-in coupling
 
 
-  :samp:`-control-coupling-out`
+  :samp:`--control-coupling-out`
     Report control fan-out coupling
 
 
-  :samp:`-control-coupling-in`
+  :samp:`--control-coupling-in`
     Report control fan-in coupling
 
 
@@ -2724,13 +2752,13 @@ Alternatively, you may run the script using the following command line:
 
   .. index:: --version (gnatmetric)
 
-  :samp:`-version`
+  :samp:`--version`
     Display Copyright and version, then exit disregarding all other options.
 
 
   .. index:: --help (gnatmetric)
 
-  :samp:`-help`
+  :samp:`--help`
     Display usage, then exit disregarding all other options.
 
 
@@ -2768,14 +2796,14 @@ Alternatively, you may run the script using the following command line:
 
   .. index:: --RTS (gnatmetric)
 
-  :samp:`-RTS={rts-path}`
+  :samp:`--RTS={rts-path}`
     Specifies the default location of the runtime library. Same meaning as the
     equivalent *gnatmake* flag (see :ref:`Switches_for_gnatmake`).
 
 
   .. index:: --subdirs=dir (gnatmetric)
 
-  :samp:`-subdirs={dir}`
+  :samp:`--subdirs={dir}`
     Use the specified subdirectory of the project objects file (or of the
     project file directory if the project does not specify an object directory)
     for tool output files. Has no effect if no project is specified as
@@ -2784,7 +2812,7 @@ Alternatively, you may run the script using the following command line:
 
   .. index:: --no_objects_dir (gnatmetric)
 
-  :samp:`-no_objects_dir`
+  :samp:`--no_objects_dir`
     Place all the result files into the current directory instead of
     project objects directory. This corresponds to the *gnatcheck*
     behavior when it is called with the project file from the
@@ -2852,6 +2880,11 @@ Alternatively, you may run the script using the following command line:
    You can specify various style directives via switches; e.g.,
    identifier case conventions, rules of indentation, and comment layout.
 
+   *gnatpp* is a project-aware tool
+   (see :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
+   the project-related switches).  The project file package that can specify
+   *gnatpp* switches is named ``Pretty_Printer``.
+
    To produce a reformatted file, *gnatpp* invokes the Ada
    compiler and generates and uses the ASIS tree for the input source;
    thus the input must be legal Ada code, and the tool should have all the
@@ -3143,6 +3176,13 @@ Alternatively, you may run the script using the following command line:
    :samp:`--comments-only`
      Format just the comments.
 
+   .. index:: --no-end-id (gnatpp)
+
+
+   :samp:`--no-end-id`
+     Do not insert the name of a unit after `end`; leave whatever comes
+     after `end`, if anything, alone.
+
    .. index:: --no-separate-is (gnatpp)
 
 
@@ -3849,6 +3889,15 @@ Alternatively, you may run the script using the following command line:
   for library unit declarations, and empty but compilable
   subunit for body stubs.
 
+  *gnatstub* is a project-aware tool.
+  (See :ref:`Using_Project_Files_with_GNAT_Tools` for a description of
+  the project-related switches but note that *gnatstub* does not support
+  the :samp:`-U`, :samp:`-U {main_unit}`, :samp:`--subdirs={dir}`, or
+  :samp:`--no_objects_dir` switches.)
+  The project file package that can specify
+  *gnatstub* switches is named ``gnatstub``.
+
+
   To create a body or a subunit, *gnatstub* invokes the Ada
   compiler and generates and uses the ASIS tree for the input source;
   thus the input must be legal Ada code, and the tool should have all the
@@ -4336,9 +4385,10 @@ Alternatively, you may run the script using the following command line:
 
     .. index:: --separate-drivers (gnattest)
 
-  :samp:`--separate-drivers`
-    Generates a separate test driver for each test, rather than a single
-    executable incorporating all tests.
+  :samp:`--separate-drivers[={val}]`
+    Generates a separate test driver for each test or unit under test, rather
+    than a single executable incorporating all tests. `val` can be "unit" or
+    "test", or may be omitted, which defaults to "unit".
 
 
     .. index:: --stub (gnattest)
@@ -4401,6 +4451,16 @@ Alternatively, you may run the script using the following command line:
     placed accordingly.
 
 
+    .. index:: --exclude-from-stubbing (gnattest)
+
+  :samp:`--exclude-from-stubbing={filename}`
+    Disables stubbing of units listed in `filename`. The file should contain
+    corresponding spec files, one per line.
+
+  :samp:`--exclude-from-stubbing:{unit}={filename}`
+    Same as above, but corresponding units will not be stubbed only when testing
+    specified `unit`.
+
     .. index:: --validate-type-extensions (gnattest)
 
   :samp:`--validate-type-extensions`
@@ -4531,6 +4591,15 @@ Alternatively, you may run the script using the following command line:
        specified by ``--skeleton-default`` option. The value of this attribute
        should be either ``pass`` or ``fail``.
 
+  * ``Default_Stub_Exclusion_List``
+       is used to specify the file with list of units whose bodies should not
+       be stubbed, otherwise specified by ``--exclude-from-stubbing=filename``.
+
+  * ``Stub_Exclusion_List ("unit")``
+       is used to specify the file with list of units whose bodies should not
+       be stubbed when testing "unit", otherwise specified by
+       ``--exclude-from-stubbing:unit=filename``.
+
   Each of those attributes can be overridden from the command line if needed.
   Other *gnattest* switches can also be passed via the project
   file as an attribute list called *Gnattest_Switches*.
@@ -4877,12 +4946,12 @@ Alternatively, you may run the script using the following command line:
 
   By default, *gnattest* generates a monolithic test driver that
   aggregates the individual tests into a single executable. It is also possible
-  to generate separate executables for each test, by passing the switch
-  ``--separate-drivers``. This approach scales better for large testing
-  campaigns, especially involving target architectures with limited resources
-  typical for embedded development. It can also provide a major performance
-  benefit on multi-core systems by allowing simultaneous execution of multiple
-  tests.
+  to generate separate executables for each test or each unit under test, by
+  passing the switch ``--separate-drivers`` with corresponding parameter. This
+  approach scales better for large testing campaigns, especially involving target
+  architectures with limited resources typical for embedded development. It can
+  also provide a major performance benefit on multi-core systems by allowing
+  simultaneous execution of multiple tests.
 
   *gnattest* can take charge of executing the individual tests; for this,
   instead of passing a project file, a text file containing the list of
@@ -4923,7 +4992,8 @@ Alternatively, you may run the script using the following command line:
 
   Due to the nature of stubbing process, this mode implies the switch
   ``--separate-drivers``, i.e. an individual test driver (with the
-  corresponding hierarchy of extending projects) is generated for each test.
+  corresponding hierarchy of extending projects) is generated for each unit under
+  test.
 
   .. note::
 
@@ -4965,5 +5035,90 @@ Alternatively, you may run the script using the following command line:
   * pragma *No_Secondary_Stack* is not supported;
   * if pragmas for interfacing with foreign languages are used, manual
     adjustments might be necessary to make the test harness compilable;
-  * use of elaboration control pragmas may result in elaboration circularities
-    in the generated harness.
+  * use of some constructs, such as elaboration-control pragmas, Type_Invariant
+    aspects, and complex variable initializations that use Subprogram'Access,
+    may result in elaboration circularities in the generated harness.
+
+.. only:: PRO or GPL
+
+   .. _Using_Project_Files_with_GNAT_Tools:
+
+   Using Project Files with GNAT Tools
+   ===================================
+
+   This section describes how project files can be used in conjunction
+   with a number of GNAT tools.
+   For a comprehensive description of project files and the overall
+   GNAT Project Manager facility, please refer to the
+   *GNAT Project Manager* chapter in the 
+   *GPRbuild and GPR Companion Tools User's Guide*.
+
+   .. index:: Project-aware tool
+
+   If a tool can take a project file as an option and extract the needed
+   information, such a tool is called a *project-aware* tool.
+
+   .. _Switches_Related_to_Project_Files:
+
+   Switches Related to Project Files
+   ---------------------------------
+
+   The following switches are used by the project-aware GNAT tools:
+
+   :samp:`-P{project_file}`
+      Indicates the name of the project file whose source files are to
+      be processed. The exact set of sources depends on other options
+      specified, see below.
+
+   :samp:`-U`
+      If a project file is supplied, say for project ``proj``,
+      but no sources are specified for ``proj`` (either by a 
+      project attribute or through a tool option that provides a list
+      of the files to be used), process all the source files
+      from projects imported either directly or indirectly by ``proj``.
+      Otherwise this option has no effect.
+
+   :samp:`-U {main_unit}`
+      Similar to :samp:`-U`, but if no sources are specified then
+      process only those source files for units in the closure of
+      `main_unit`.
+
+   :samp:`-X{name}={val}`
+      Indicates that the external variable ``name`` in the project has the
+      value ``val``. Has no effect if no project has been specified.
+
+   :samp:`--subdirs={dir}`
+      Use the `dir` subdirectory of the project's object directory (or the `dir`
+      subdirectory of the project file directory if the project does not specify
+      an object directory) for tool output files. Has no effect if no project
+      has been specified or if :samp:`--no_objects_dir` is specified.
+
+   :samp:`--no_objects_dir`
+      Place all the result files into the current directory (i.e., the directory
+      from which the tool invocation command is issued) instead of the project's
+      object directory. Has no effect if no project has been specified.
+
+   :samp:`-eL`
+      Follow all symbolic links when processing project files.
+
+   If a project file is specified and there is neither a :samp:`-U` option,
+   nor a :samp:`-U {main_unit}` option, nor some other explicit option to
+   specify the source files, then the sources to be processed are the
+   immediate sources of the specified project (i.e., the source files directly
+   defined by that project, either implicitly by residing in the project
+   source directories, or explicitly through any of the source-related
+   attributes).
+  
+   .. _Tool-specific_packages_in_project files:
+
+   Tool-specific packages in project files
+   ---------------------------------------
+
+   Each project-aware tool may have a corresponding package in a project file;
+   the package names are given elsewhere in this manual, in the sections that describe
+   the respective tools.
+
+   A tool-specific package in a project file may define the ``Default_Switches``
+   attribute indexed by "ada" (as language name). The value of this attribute
+   is a list of switches that will be supplied at tool invocation.
+   Project-specific switches cannot be specified through this attribute. 
diff --git a/gcc/ada/doc/gnat_ugn/platform_specific_information.rst b/gcc/ada/doc/gnat_ugn/platform_specific_information.rst
index 694e37baeed..d6f36c29058 100644
--- a/gcc/ada/doc/gnat_ugn/platform_specific_information.rst
+++ b/gcc/ada/doc/gnat_ugn/platform_specific_information.rst
@@ -156,6 +156,31 @@ For example on x86-linux::
    --           |
    --           +--- adalib
 
+.. only:: html or latex
+
+  .. image:: rtlibrary-structure.png
+
+.. only:: not (html or latex) 
+
+   ::
+
+                      $(target-dir)
+                     __/ /      \ \___
+             _______/   /        \    \_________________
+            /          /          \                     \
+           /          /            \                     \
+       ADAINCLUDE  ADALIB      rts-native             rts-sjlj
+          :          :            /    \                 /   \
+          :          :           /      \               /     \
+          :          :          /        \             /       \
+          :          :         /          \           /         \
+          +-------------> adainclude     adalib   adainclude   adalib
+                     :                     ^
+                     :                     :
+                     +---------------------+
+
+                     Run-Time Library Directory Structure
+          (Upper-case names and dotted/dashed arrows represent soft links)
 
 If the *rts-sjlj* library is to be selected on a permanent basis,
 these soft links can be modified with the following commands:
@@ -486,7 +511,58 @@ file will be created. This is particularly useful in networked
 environments where you may not have write access to some
 directories.
 
+Disabling Command Line Argument Expansion
+-----------------------------------------
+
+.. index:: Command Line Argument Expansion
+
+By default, an executable compiled for the **Windows** platform will do
+the following postprocessing on the arguments passed on the command
+line:
+
+* If the argument contains the characters ``*`` and/or ``?``, then
+  file expansion will be attempted. For example, if the current directory
+  contains :file:`a.txt` and :file:`b.txt`, then when calling::
+
+      $ my_ada_program *.txt
+
+  The following arguments will effectively be passed to the main program
+  (for example when using ``Ada.Command_Line.Argument``)::
+
+      Ada.Command_Line.Argument (1) -> "a.txt"
+      Ada.Command_Line.Argument (2) -> "b.txt"
+
+* Filename expansion can be disabled for a given argument by using single
+  quotes. Thus, calling::
 
+      $ my_ada_program '*.txt'
+
+  will result in::
+
+      Ada.Command_Line.Argument (1) -> "*.txt"
+
+Note that if the program is launched from a shell such as **Cygwin** **Bash**
+then quote removal might be performed by the shell.
+
+In some contexts it might be useful to disable this feature (for example if
+the program performs its own argument expansion). In order to do this, a C
+symbol needs to be defined and set to ``0``. You can do this by
+adding the following code fragment in one of your **Ada** units:
+
+.. code-block:: ada
+
+   Do_Argv_Expansion : Integer := 0;
+   pragma Export (C, Do_Argv_Expansion, "__gnat_do_argv_expansion");
+
+The results of previous examples will be respectively::
+
+   Ada.Command_Line.Argument (1) -> "*.txt"
+
+and::
+
+   Ada.Command_Line.Argument (1) -> "'*.txt'"
+
+   
 .. _Mixed-Language_Programming_on_Windows:
 
 Mixed-Language Programming on Windows
@@ -1033,7 +1109,8 @@ Building DLLs with GNAT Project files
 .. index:: DLLs, building
 
 There is nothing specific to Windows in the build process.
-:ref:`Library_Projects`.
+See the *Library Projects* section in the *GNAT Project Manager*
+chapter of the *GPRbuild User's Guide*.
 
 Due to a system limitation, it is not possible under Windows to create threads
 when inside the `DllMain` routine which is used for auto-initialization
@@ -1149,7 +1226,9 @@ Note that a relocatable DLL stripped using the `strip`
 binutils tool will not be relocatable anymore. To build a DLL without
 debug information pass `-largs -s` to `gnatdll`. This
 restriction does not apply to a DLL built using a Library Project.
-See :ref:`Library_Projects`.
+See the *Library Projects* section in the *GNAT Project Manager*
+chapter of the *GPRbuild User's Guide*.
+
 
 .. Limitations_When_Using_Ada_DLLs_from Ada:
 
diff --git a/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst b/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst
index 0304a536411..32d3417e0ff 100644
--- a/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst
+++ b/gcc/ada/doc/gnat_ugn/the_gnat_compilation_model.rst
@@ -872,7 +872,7 @@ File Name Krunching with `gnatkr`
 
 .. index:: ! gnatkr
 
-This chapter discusses the method used by the compiler to shorten
+This section discusses the method used by the compiler to shorten
 the default file names chosen for Ada units so that they do not
 exceed the maximum length permitted. It also describes the
 `gnatkr` utility that can be used to determine the result of
@@ -1052,7 +1052,7 @@ Renaming Files with `gnatchop`
 
 .. index:: ! gnatchop
 
-This chapter discusses how to handle files with multiple units by using
+This section discusses how to handle files with multiple units by using
 the `gnatchop` utility. This utility is also useful in renaming
 files to meet the standard GNAT default file naming conventions.
 
@@ -1550,8 +1550,10 @@ depend on a file that no longer exists. Such tools include
 *gprbuild*, *gnatmake*, and *gnatcheck*.
 
 If you are using project file, a separate mechanism is provided using
-project attributes, see :ref:`Specifying_Configuration_Pragmas` for more
-details.
+project attributes.
+
+.. --Comment:
+   See :ref:`Specifying_Configuration_Pragmas` for more details.
 
 
 .. _Generating_Object_Files:
@@ -1788,10 +1790,10 @@ GNAT and Libraries
 
 .. index:: Library building and using
 
-This chapter describes how to build and use libraries with GNAT, and also shows
+This section describes how to build and use libraries with GNAT, and also shows
 how to recompile the GNAT run-time library. You should be familiar with the
-Project Manager facility (:ref:`GNAT_Project_Manager`) before reading this
-chapter.
+Project Manager facility (see the *GNAT_Project_Manager* chapter of the
+*GPRbuild User's Guide*) before reading this chapter.
 
 .. _Introduction_to_Libraries_in_GNAT:
 
@@ -1849,7 +1851,8 @@ Building a library
 
 The easiest way to build a library is to use the Project Manager,
 which supports a special type of project called a *Library Project*
-(see :ref:`Library_Projects`).
+(see the *Library Projects* section in the *GNAT Project Manager*
+chapter of the *GPRbuild User's Guide*).
 
 A project is considered a library project, when two project-level attributes
 are defined in it: `Library_Name` and `Library_Dir`. In order to
@@ -1961,7 +1964,8 @@ Installing a library
 .. index:: GPR_PROJECT_PATH
 
 If you use project files, library installation is part of the library build
-process (:ref:`Installing_a_library_with_project_files`).
+process (see the *Installing a Library with Project Files* section of the
+*GNAT Project Manager* chapter of the *GPRbuild User's Guide*).
 
 When project files are not an option, it is also possible, but not recommended,
 to install the library so that the sources needed to use the library are on the
@@ -2137,11 +2141,13 @@ Building a Stand-alone Library
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 GNAT's Project facility provides a simple way of building and installing
-stand-alone libraries; see :ref:`Stand-alone_Library_Projects`.
+stand-alone libraries; see the *Stand-alone Library Projects* section
+in the *GNAT Project Manager* chapter of the *GPRbuild User's Guide*.
 To be a Stand-alone Library Project, in addition to the two attributes
 that make a project a Library Project (`Library_Name` and
-`Library_Dir`; see :ref:`Library_Projects`), the attribute
-`Library_Interface` must be defined.  For example:
+`Library_Dir`; see the *Library Projects* section in the
+*GNAT Project Manager* chapter of the *GPRbuild User's Guide*),
+the attribute `Library_Interface` must be defined.  For example:
 
 .. code-block:: gpr
  
diff --git a/gcc/ada/doc/gnat_ugn/tools_supporting_project_files.rst b/gcc/ada/doc/gnat_ugn/tools_supporting_project_files.rst
deleted file mode 100644
index 7360acb0b8a..00000000000
--- a/gcc/ada/doc/gnat_ugn/tools_supporting_project_files.rst
+++ /dev/null
@@ -1,745 +0,0 @@
-.. _Tools_Supporting_Project_Files:
-
-Tools Supporting Project Files
-==============================
-
-This section describes how project files can be used in conjunction with a number of
-GNAT tools.
-
-.. _gnatmake_and_Project_Files:
-
-gnatmake and Project Files
---------------------------
-
-This section covers several topics related to *gnatmake* and
-project files: defining switches for *gnatmake*
-and for the tools that it invokes; specifying configuration pragmas;
-the use of the `Main` attribute; building and rebuilding library project
-files.
-
-.. _Switches_Related_to_Project_Files:
-
-Switches Related to Project Files
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-The following switches are used by GNAT tools that support project files:
-
-
-  .. index:: -P (any project-aware tool)
-
-:samp:`-P{project}`
-  Indicates the name of a project file. This project file will be parsed with
-  the verbosity indicated by *-vP*x**,
-  if any, and using the external references indicated
-  by *-X* switches, if any.
-  There may zero, one or more spaces between *-P* and `project`.
-
-  There must be only one *-P* switch on the command line.
-
-  Since the Project Manager parses the project file only after all the switches
-  on the command line are checked, the order of the switches
-  *-P*,
-  *-vP*x**
-  or *-X* is not significant.
-
-
-  .. index:: -X (any project-aware tool)
-
-:samp:`-X{name}={value}`
-  Indicates that external variable `name` has the value `value`.
-  The Project Manager will use this value for occurrences of
-  `external(name)` when parsing the project file.
-
-  If `name` or `value` includes a space, then `name=value` should be
-  put between quotes.
-
-  ::
-
-      -XOS=NT
-      -X"user=John Doe"
-    
-  Several *-X* switches can be used simultaneously.
-  If several *-X* switches specify the same
-  `name`, only the last one is used.
-
-  An external variable specified with a *-X* switch
-  takes precedence over the value of the same name in the environment.
-
-
-  .. index:: -vP (any project-aware tool)
-
-:samp:`-vP{x}`
-  Indicates the verbosity of the parsing of GNAT project files.
-
-  *-vP0* means Default;
-  *-vP1* means Medium;
-  *-vP2* means High.
-
-  The default is Default: no output for syntactically correct
-  project files.
-  If several *-vP*x** switches are present,
-  only the last one is used.
-
-
-  .. index:: -aP (any project-aware tool)
-
-:samp:`-aP{dir}`
-  Add directory `dir` at the beginning of the project search path, in order,
-  after the current working directory.
-
-
-  .. index:: -eL (any project-aware tool)
-
-:samp:`-eL`
-  Follow all symbolic links when processing project files.
-
-
-  .. index:: --subdirs= (gnatmake and gnatclean)
-
-:samp:`--subdirs={subdir}`
-  This switch is recognized by *gnatmake* and *gnatclean*. It
-  indicate that the real directories (except the source directories) are the
-  subdirectories `subdir` of the directories specified in the project files.
-  This applies in particular to object directories, library directories and
-  exec directories. If the subdirectories do not exist, they are created
-  automatically.
-
-
-.. _Switches_and_Project_Files:
-
-Switches and Project Files
-^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-For each of the packages `Builder`, `Compiler`, `Binder`, and
-`Linker`, you can specify a `Default_Switches`
-attribute, a `Switches` attribute, or both;
-as their names imply, these switch-related
-attributes affect the switches that are used for each of these GNAT
-components when
-*gnatmake* is invoked.  As will be explained below, these
-component-specific switches precede
-the switches provided on the *gnatmake* command line.
-
-The `Default_Switches` attribute is an attribute
-indexed by language name (case insensitive) whose value is a string list.
-For example:
-
-  .. code-block:: gpr
-
-     package Compiler is
-       for Default_Switches ("Ada")
-           use ("-gnaty",
-                "-v");
-     end Compiler;
-
-The `Switches` attribute is indexed on a file name (which may or may
-not be case sensitive, depending
-on the operating system) whose value is a string list.  For example:
-
-  .. code-block:: gpr
-
-     package Builder is
-        for Switches ("main1.adb")
-            use ("-O2");
-        for Switches ("main2.adb")
-            use ("-g");
-     end Builder;
-
-For the `Builder` package, the file names must designate source files
-for main subprograms.  For the `Binder` and `Linker` packages, the
-file names must designate :file:`ALI` or source files for main subprograms.
-In each case just the file name without an explicit extension is acceptable.
-
-For each tool used in a program build (*gnatmake*, the compiler, the
-binder, and the linker), the corresponding package @dfn{contributes} a set of
-switches for each file on which the tool is invoked, based on the
-switch-related attributes defined in the package.
-In particular, the switches
-that each of these packages contributes for a given file `f` comprise:
-
-* the value of attribute `Switches (`f`)`,
-  if it is specified in the package for the given file,
-* otherwise, the value of `Default_Switches ("Ada")`,
-  if it is specified in the package.
-
-If neither of these attributes is defined in the package, then the package does
-not contribute any switches for the given file.
-
-When *gnatmake* is invoked on a file, the switches comprise
-two sets, in the following order: those contributed for the file
-by the `Builder` package;
-and the switches passed on the command line.
-
-When *gnatmake* invokes a tool (compiler, binder, linker) on a file,
-the switches passed to the tool comprise three sets,
-in the following order:
-
-* the applicable switches contributed for the file
-  by the `Builder` package in the project file supplied on the command line;
-
-* those contributed for the file by the package (in the relevant project file --
-  see below) corresponding to the tool; and
-
-* the applicable switches passed on the command line.
-
-The term *applicable switches* reflects the fact that
-*gnatmake* switches may or may not be passed to individual
-tools, depending on the individual switch.
-
-*gnatmake* may invoke the compiler on source files from different
-projects. The Project Manager will use the appropriate project file to
-determine the `Compiler` package for each source file being compiled.
-Likewise for the `Binder` and `Linker` packages.
-
-As an example, consider the following package in a project file:
-
-
-  .. code-block:: gpr
-
-     project Proj1 is
-        package Compiler is
-           for Default_Switches ("Ada")
-               use ("-g");
-           for Switches ("a.adb")
-               use ("-O1");
-           for Switches ("b.adb")
-               use ("-O2",
-                    "-gnaty");
-        end Compiler;
-     end Proj1;
-  
-If *gnatmake* is invoked with this project file, and it needs to
-compile, say, the files :file:`a.adb`, :file:`b.adb`, and :file:`c.adb`, then
-:file:`a.adb` will be compiled with the switch *-O1*,
-:file:`b.adb` with switches *-O2* and *-gnaty*,
-and :file:`c.adb` with *-g*.
-
-The following example illustrates the ordering of the switches
-contributed by different packages:
-
-  .. code-block:: gpr
-
-     project Proj2 is
-        package Builder is
-           for Switches ("main.adb")
-               use ("-g",
-                    "-O1",
-                    "-f");
-        end Builder;
-
-        package Compiler is
-           for Switches ("main.adb")
-               use ("-O2");
-        end Compiler;
-     end Proj2;
-
-If you issue the command:
-
-  ::
-
-      $ gnatmake -Pproj2 -O0 main
-  
-then the compiler will be invoked on :file:`main.adb` with the following
-sequence of switches
-
-  ::
-
-      -g -O1 -O2 -O0
-  
-with the last *-O*
-switch having precedence over the earlier ones;
-several other switches
-(such as *-c*) are added implicitly.
-
-The switches *-g*
-and *-O1* are contributed by package
-`Builder`,  *-O2* is contributed
-by the package `Compiler`
-and *-O0* comes from the command line.
-
-The *-g* switch will also be passed in the invocation of
-*Gnatlink.*
-
-A final example illustrates switch contributions from packages in different
-project files:
-
-  .. code-block:: gpr
-  
-     project Proj3 is
-        for Source_Files use ("pack.ads", "pack.adb");
-        package Compiler is
-           for Default_Switches ("Ada")
-               use ("-gnata");
-        end Compiler;
-     end Proj3;
-
-     with "Proj3";
-     project Proj4 is
-        for Source_Files use ("foo_main.adb", "bar_main.adb");
-        package Builder is
-           for Switches ("foo_main.adb")
-               use ("-s",
-                    "-g");
-        end Builder;
-     end Proj4;
-
-  .. code-block:: ada
-
-     -- Ada source file:
-     with Pack;
-     procedure Foo_Main is
-        ...
-     end Foo_Main;
-  
-If the command is
-
-  ::
-
-     $ gnatmake -PProj4 foo_main.adb -cargs -gnato
-  
-then the switches passed to the compiler for :file:`foo_main.adb` are
-*-g* (contributed by the package `Proj4.Builder`) and
-*-gnato* (passed on the command line).
-When the imported package `Pack` is compiled, the switches used
-are *-g* from `Proj4.Builder`,
-*-gnata* (contributed from package `Proj3.Compiler`,
-and *-gnato* from the command line.
-
-When using *gnatmake* with project files, some switches or
-arguments may be expressed as relative paths. As the working directory where
-compilation occurs may change, these relative paths are converted to absolute
-paths. For the switches found in a project file, the relative paths
-are relative to the project file directory, for the switches on the command
-line, they are relative to the directory where *gnatmake* is invoked.
-The switches for which this occurs are:
--I,
--A,
--L,
--aO,
--aL,
--aI, as well as all arguments that are not switches (arguments to
-switch
--o, object files specified in package `Linker` or after
--largs on the command line). The exception to this rule is the switch
---RTS= for which a relative path argument is never converted.
-
-.. _Specifying_Configuration_Pragmas:
-
-Specifying Configuration Pragmas
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-When using *gnatmake* with project files, if there exists a file
-:file:`gnat.adc` that contains configuration pragmas, this file will be
-ignored.
-
-Configuration pragmas can be defined by means of the following attributes in
-project files: `Global_Configuration_Pragmas` in package `Builder`
-and `Local_Configuration_Pragmas` in package `Compiler`.
-
-Both these attributes are single string attributes. Their values is the path
-name of a file containing configuration pragmas. If a path name is relative,
-then it is relative to the project directory of the project file where the
-attribute is defined.
-
-When compiling a source, the configuration pragmas used are, in order,
-those listed in the file designated by attribute
-`Global_Configuration_Pragmas` in package `Builder` of the main
-project file, if it is specified, and those listed in the file designated by
-attribute `Local_Configuration_Pragmas` in package `Compiler` of
-the project file of the source, if it exists.
-
-.. _Project_Files_and_Main_Subprograms:
-
-Project Files and Main Subprograms
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-When using a project file, you can invoke *gnatmake*
-with one or several main subprograms, by specifying their source files on the
-command line.
-
-  ::
-
-      $ gnatmake -Pprj main1.adb main2.adb main3.adb
-
-Each of these needs to be a source file of the same project, except
-when the switch `-u` is used.
-
-When `-u` is not used, all the mains need to be sources of the
-same project, one of the project in the tree rooted at the project specified
-on the command line. The package `Builder` of this common project, the
-"main project" is the one that is considered by *gnatmake*.
-
-When `-u` is used, the specified source files may be in projects
-imported directly or indirectly by the project specified on the command line.
-Note that if such a source file is not part of the project specified on the
-command line, the switches found in package `Builder` of the
-project specified on the command line, if any, that are transmitted
-to the compiler will still be used, not those found in the project file of
-the source file.
-
-When using a project file, you can also invoke *gnatmake* without
-explicitly specifying any main, and the effect depends on whether you have
-defined the `Main` attribute.  This attribute has a string list value,
-where each element in the list is the name of a source file (the file
-extension is optional) that contains a unit that can be a main subprogram.
-
-If the `Main` attribute is defined in a project file as a non-empty
-string list and the switch *-u* is not used on the command
-line, then invoking *gnatmake* with this project file but without any
-main on the command line is equivalent to invoking *gnatmake* with all
-the file names in the `Main` attribute on the command line.
-
-Example:
-
-  .. code-block:: gpr
-
-     project Prj is
-        for Main use ("main1.adb", "main2.adb", "main3.adb");
-     end Prj;
-
-With this project file, `"gnatmake -Pprj"`
-is equivalent to
-`"gnatmake -Pprj main1.adb main2.adb main3.adb"`.
-
-When the project attribute `Main` is not specified, or is specified
-as an empty string list, or when the switch *-u* is used on the command
-line, then invoking *gnatmake* with no main on the command line will
-result in all immediate sources of the project file being checked, and
-potentially recompiled. Depending on the presence of the switch *-u*,
-sources from other project files on which the immediate sources of the main
-project file depend are also checked and potentially recompiled. In other
-words, the *-u* switch is applied to all of the immediate sources of the
-main project file.
-
-When no main is specified on the command line and attribute `Main` exists
-and includes several mains, or when several mains are specified on the
-command line, the default switches in package `Builder` will
-be used for all mains, even if there are specific switches
-specified for one or several mains.
-
-But the switches from package `Binder` or `Linker` will be
-the specific switches for each main, if they are specified.
-
-.. _Library_Project_Files:
-
-Library Project Files
-^^^^^^^^^^^^^^^^^^^^^
-
-When *gnatmake* is invoked with a main project file that is a library
-project file, it is not allowed to specify one or more mains on the command
-line.
-
-When a library project file is specified, switches `-b` and
-`-l` have special meanings.
-
-* `-b` is only allowed for stand-alone libraries. It indicates
-  to *gnatmake* that *gnatbind* should be invoked for the
-  library.
-
-* `-l` may be used for all library projects. It indicates
-  to *gnatmake* that the binder generated file should be compiled
-  (in the case of a stand-alone library) and that the library should be built.
-
-
-.. _The_GNAT_Driver_and_Project_Files:
-
-The GNAT Driver and Project Files
----------------------------------
-
-A number of GNAT tools beyond *gnatmake*
-can benefit from project files:
-
-.. only:: PRO or GPL
-
-  * *gnatbind*
-  * *gnatcheck*
-  * *gnatclean*
-  * *gnatelim*
-  * *gnatfind*
-  * *gnatlink*
-  * *gnatls*
-  * *gnatmetric*
-  * *gnatpp*
-  * *gnatstub*
-  * *gnatxref*
-
-.. only:: FSF
-
-  * *gnatbind*
-  * *gnatclean*
-  * *gnatfind*
-  * *gnatlink*
-  * *gnatls*
-  * *gnatxref*
-
-However, none of these tools can be invoked
-directly with a project file switch (*-P*).
-They must be invoked through the *gnat* driver.
-
-The *gnat* driver is a wrapper that accepts a number of commands and
-calls the corresponding tool. It was designed initially for VMS platforms (to
-convert VMS qualifiers to Unix-style switches), but it is now available on all
-GNAT platforms.
-
-On non-VMS platforms, the *gnat* driver accepts the following commands
-(case insensitive):
-
-.. only:: PRO or GPL
-
-  * BIND to invoke *gnatbind*
-  * CHOP to invoke *gnatchop*
-  * CLEAN to invoke *gnatclean*
-  * COMP or COMPILE to invoke the compiler
-  * ELIM to invoke *gnatelim*
-  * FIND to invoke *gnatfind*
-  * KR or KRUNCH to invoke *gnatkr*
-  * LINK to invoke *gnatlink*
-  * LS or LIST to invoke *gnatls*
-  * MAKE to invoke *gnatmake*
-  * METRIC to invoke *gnatmetric*
-  * NAME to invoke *gnatname*
-  * PP or PRETTY to invoke *gnatpp*
-  * PREP or PREPROCESS to invoke *gnatprep*
-  * STUB to invoke *gnatstub*
-  * XREF to invoke *gnatxref*
-
-.. only:: FSF
-
-  * BIND to invoke *gnatbind*
-  * CHOP to invoke *gnatchop*
-  * CLEAN to invoke *gnatclean*
-  * COMP or COMPILE to invoke the compiler
-  * FIND to invoke *gnatfind*
-  * KR or KRUNCH to invoke *gnatkr*
-  * LINK to invoke *gnatlink*
-  * LS or LIST to invoke *gnatls*
-  * MAKE to invoke *gnatmake*
-  * NAME to invoke *gnatname*
-  * PREP or PREPROCESS to invoke *gnatprep*
-  * XREF to invoke *gnatxref*
-
-Note that the command
-*gnatmake -c -f -u* is used to invoke the compiler.
-
-On non-VMS platforms, between *gnat* and the command, two
-special switches may be used:
-
-* *-v* to display the invocation of the tool.
-* *-dn* to prevent the *gnat* driver from removing
-  the temporary files it has created. These temporary files are
-  configuration files and temporary file list files.
-
-The command may be followed by switches and arguments for the invoked
-tool.
-
-  ::
-
-     $ gnat bind -C main.ali
-     $ gnat ls -a main
-     $ gnat chop foo.txt
-  
-Switches may also be put in text files, one switch per line, and the text
-files may be specified with their path name preceded by '@'.
-
-  ::
-
-     $ gnat bind @args.txt main.ali
-  
-In addition, for the following commands the project file related switches
-(*-P*, *-X* and *-vPx*) may be used in addition to
-the switches of the invoking tool:
-
-.. only:: PRO or GPL
-
-   * BIND
-   * COMP or COMPILE 
-   * FIND
-   * ELIM
-   * LS or LIST
-   * LINK
-   * METRIC
-   * PP or PRETTY
-   * STUB
-   * XREF
-
-.. only:: FSF
-
-   * BIND
-   * COMP or COMPILE 
-   * FIND
-   * LS or LIST
-   * LINK
-   * XREF
-
-.. only:: PRO or GPL
-
-   When GNAT PP or GNAT PRETTY is used with a project file, but with no source
-   specified on the command line, it invokes *gnatpp* with all
-   the immediate sources of the specified project file.
-
-   When GNAT METRIC is used with a project file, but with no source
-   specified on the command line, it invokes *gnatmetric*
-   with all the immediate sources of the specified project file and with
-   *-d* with the parameter pointing to the object directory
-   of the project.
-
-   In addition, when GNAT PP, GNAT PRETTY or GNAT METRIC is used with
-   a project file, no source is specified on the command line and
-   switch -U is specified on the command line, then
-   the underlying tool (gnatpp or
-   gnatmetric) is invoked for all sources of all projects,
-   not only for the immediate sources of the main project.
-   (-U stands for Universal or Union of the project files of the project tree)
-
-For each of the following commands, there is optionally a corresponding
-package in the main project.
-
-.. only:: PRO or GPL
-
-   * package `Binder` for command BIND (invoking `gnatbind`)
-   * package `Check` for command CHECK (invoking `gnatcheck`)
-   * package `Compiler` for command COMP or COMPILE (invoking the compiler)
-   * package `Cross_Reference` for command XREF (invoking `gnatxref`)
-   * package `Eliminate` for command ELIM (invoking `gnatelim`)
-   * package `Finder` for command FIND (invoking `gnatfind`)
-   * package `Gnatls` for command LS or LIST (invoking `gnatls`)
-   * package `Gnatstub` for command STUB (invoking `gnatstub`)
-   * package `Linker` for command LINK (invoking `gnatlink`)
-   * package `Metrics` for command METRIC (invoking `gnatmetric`)
-   * package `Pretty_Printer` for command PP or PRETTY (invoking `gnatpp`)
-
-.. only:: FSF
-
-   * package `Binder` for command BIND (invoking `gnatbind`)
-   * package `Compiler` for command COMP or COMPILE (invoking the compiler)
-   * package `Cross_Reference` for command XREF (invoking `gnatxref`)
-   * package `Finder` for command FIND (invoking `gnatfind`)
-   * package `Gnatls` for command LS or LIST (invoking `gnatls`)
-   * package `Linker` for command LINK (invoking `gnatlink`)
-
-Package `Gnatls` has a unique attribute `Switches`,
-a simple variable with a string list value. It contains switches
-for the invocation of `gnatls`.
-
-  .. code-block:: gpr
-
-     project Proj1 is
-        package gnatls is
-           for Switches
-               use ("-a",
-                    "-v");
-        end gnatls;
-     end Proj1;
-
-All other packages have two attribute `Switches` and
-`Default_Switches`.
-
-`Switches` is an indexed attribute, indexed by the
-source file name, that has a string list value: the switches to be
-used when the tool corresponding to the package is invoked for the specific
-source file.
-
-`Default_Switches` is an attribute,
-indexed by  the programming language that has a string list value.
-`Default_Switches ("Ada")` contains the
-switches for the invocation of the tool corresponding
-to the package, except if a specific `Switches` attribute
-is specified for the source file.
-
-  .. code-block:: gpr
-
-     project Proj is
-
-        for Source_Dirs use ("");
-
-        package gnatls is
-           for Switches use
-               ("-a",
-                "-v");
-        end gnatls;
-
-        package Compiler is
-           for Default_Switches ("Ada")
-               use ("-gnatv",
-                    "-gnatwa");
-        end Binder;
-
-        package Binder is
-           for Default_Switches ("Ada")
-               use ("-C",
-                    "-e");
-        end Binder;
-
-        package Linker is
-           for Default_Switches ("Ada")
-               use ("-C");
-           for Switches ("main.adb")
-               use ("-C",
-                    "-v",
-                    "-v");
-        end Linker;
-
-        package Finder is
-           for Default_Switches ("Ada")
-                use ("-a",
-                     "-f");
-        end Finder;
-
-        package Cross_Reference is
-           for Default_Switches ("Ada")
-               use ("-a",
-                    "-f",
-                    "-d",
-                    "-u");
-        end Cross_Reference;
-     end Proj;
-  
-With the above project file, commands such as
-
-  ::
-
-     $ gnat comp -Pproj main
-     $ gnat ls -Pproj main
-     $ gnat xref -Pproj main
-     $ gnat bind -Pproj main.ali
-     $ gnat link -Pproj main.ali
-
-will set up the environment properly and invoke the tool with the switches
-found in the package corresponding to the tool:
-`Default_Switches ("Ada")` for all tools,
-except `Switches ("main.adb")`
-for `gnatlink`.
-
-.. only:: PRO or GPL
-
-   It is also possible to invoke some of the tools,
-   (`gnatcheck`,
-   `gnatmetric`,
-   and `gnatpp`)
-   on a set of project units thanks to the combination of the switches
-   *-P*, *-U* and possibly the main unit when one is interested
-   in its closure. For instance,
-
-     ::
-
-        $ gnat metric -Pproj
- 
-   will compute the metrics for all the immediate units of project `proj`.
-
-     ::
-
-        $ gnat metric -Pproj -U
-  
-   will compute the metrics for all the units of the closure of projects
-   rooted at `proj`.
-
-     ::
-
-        $ gnat metric -Pproj -U main_unit
-
-   will compute the metrics for the closure of units rooted at
-   `main_unit`. This last possibility relies implicitly
-   on *gnatbind*'s option *-R*. But if the argument files for the
-   tool invoked by the *gnat* driver are explicitly  specified
-   either directly or through the tool *-files* option, then the tool
-   is called only for these explicitly specified files.
diff --git a/gcc/ada/einfo.adb b/gcc/ada/einfo.adb
index fd01315215e..1748efd0b66 100644
--- a/gcc/ada/einfo.adb
+++ b/gcc/ada/einfo.adb
@@ -561,7 +561,7 @@ package body Einfo is
    --    Has_Predicates                  Flag250
 
    --    Has_Implicit_Dereference        Flag251
-   --    Is_Processed_Transient          Flag252
+   --    Is_Finalized_Transient          Flag252
    --    Disable_Controlled              Flag253
    --    Is_Implementation_Defined       Flag254
    --    Is_Predicate_Function           Flag255
@@ -608,9 +608,9 @@ package body Einfo is
    --    Has_Inherited_Invariants        Flag291
    --    Is_Partial_Invariant_Procedure  Flag292
    --    Is_Actual_Subtype               Flag293
+   --    Has_Pragma_Unused               Flag294
+   --    Is_Ignored_Transient            Flag295
 
-   --    (unused)                        Flag294
-   --    (unused)                        Flag295
    --    (unused)                        Flag296
    --    (unused)                        Flag297
    --    (unused)                        Flag298
@@ -1761,6 +1761,11 @@ package body Einfo is
       return Flag212 (Id);
    end Has_Pragma_Unreferenced_Objects;
 
+   function Has_Pragma_Unused (Id : E) return B is
+   begin
+      return Flag294 (Id);
+   end Has_Pragma_Unused;
+
    function Has_Predicates (Id : E) return B is
    begin
       pragma Assert (Is_Type (Id));
@@ -2180,6 +2185,12 @@ package body Einfo is
       return Flag99 (Id);
    end Is_Exported;
 
+   function Is_Finalized_Transient (Id : E) return B is
+   begin
+      pragma Assert (Ekind_In (Id, E_Constant, E_Loop_Parameter, E_Variable));
+      return Flag252 (Id);
+   end Is_Finalized_Transient;
+
    function Is_First_Subtype (Id : E) return B is
    begin
       return Flag70 (Id);
@@ -2245,6 +2256,12 @@ package body Einfo is
       return Flag278 (Id);
    end Is_Ignored_Ghost_Entity;
 
+   function Is_Ignored_Transient (Id : E) return B is
+   begin
+      pragma Assert (Ekind_In (Id, E_Constant, E_Loop_Parameter, E_Variable));
+      return Flag295 (Id);
+   end Is_Ignored_Transient;
+
    function Is_Immediately_Visible (Id : E) return B is
    begin
       pragma Assert (Nkind (Id) in N_Entity);
@@ -2461,12 +2478,6 @@ package body Einfo is
       return Flag245 (Id);
    end Is_Private_Primitive;
 
-   function Is_Processed_Transient (Id : E) return B is
-   begin
-      pragma Assert (Ekind_In (Id, E_Constant, E_Loop_Parameter, E_Variable));
-      return Flag252 (Id);
-   end Is_Processed_Transient;
-
    function Is_Public (Id : E) return B is
    begin
       pragma Assert (Nkind (Id) in N_Entity);
@@ -4768,6 +4779,11 @@ package body Einfo is
       Set_Flag212 (Id, V);
    end Set_Has_Pragma_Unreferenced_Objects;
 
+   procedure Set_Has_Pragma_Unused (Id : E; V : B := True) is
+   begin
+      Set_Flag294 (Id, V);
+   end Set_Has_Pragma_Unused;
+
    procedure Set_Has_Predicates (Id : E; V : B := True) is
    begin
       pragma Assert (Is_Type (Id) or else Ekind (Id) = E_Void);
@@ -5238,6 +5254,12 @@ package body Einfo is
       Set_Flag99 (Id, V);
    end Set_Is_Exported;
 
+   procedure Set_Is_Finalized_Transient (Id : E; V : B := True) is
+   begin
+      pragma Assert (Ekind_In (Id, E_Constant, E_Loop_Parameter, E_Variable));
+      Set_Flag252 (Id, V);
+   end Set_Is_Finalized_Transient;
+
    procedure Set_Is_First_Subtype (Id : E; V : B := True) is
    begin
       Set_Flag70 (Id, V);
@@ -5319,6 +5341,12 @@ package body Einfo is
       Set_Flag278 (Id, V);
    end Set_Is_Ignored_Ghost_Entity;
 
+   procedure Set_Is_Ignored_Transient (Id : E; V : B := True) is
+   begin
+      pragma Assert (Ekind_In (Id, E_Constant, E_Loop_Parameter, E_Variable));
+      Set_Flag295 (Id, V);
+   end Set_Is_Ignored_Transient;
+
    procedure Set_Is_Immediately_Visible (Id : E; V : B := True) is
    begin
       pragma Assert (Nkind (Id) in N_Entity);
@@ -5533,12 +5561,6 @@ package body Einfo is
       Set_Flag245 (Id, V);
    end Set_Is_Private_Primitive;
 
-   procedure Set_Is_Processed_Transient (Id : E; V : B := True) is
-   begin
-      pragma Assert (Ekind_In (Id, E_Constant, E_Loop_Parameter, E_Variable));
-      Set_Flag252 (Id, V);
-   end Set_Is_Processed_Transient;
-
    procedure Set_Is_Public (Id : E; V : B := True) is
    begin
       pragma Assert (Nkind (Id) in N_Entity);
@@ -9162,6 +9184,7 @@ package body Einfo is
       W ("Has_Pragma_Unmodified",           Flag233 (Id));
       W ("Has_Pragma_Unreferenced",         Flag180 (Id));
       W ("Has_Pragma_Unreferenced_Objects", Flag212 (Id));
+      W ("Has_Pragma_Unused",               Flag294 (Id));
       W ("Has_Predicates",                  Flag250 (Id));
       W ("Has_Primitive_Operations",        Flag120 (Id));
       W ("Has_Private_Ancestor",            Flag151 (Id));
@@ -9230,6 +9253,7 @@ package body Einfo is
       W ("Is_Entry_Formal",                 Flag52  (Id));
       W ("Is_Exception_Handler",            Flag286 (Id));
       W ("Is_Exported",                     Flag99  (Id));
+      W ("Is_Finalized_Transient",          Flag252 (Id));
       W ("Is_First_Subtype",                Flag70  (Id));
       W ("Is_For_Access_Subtype",           Flag118 (Id));
       W ("Is_Formal_Subprogram",            Flag111 (Id));
@@ -9242,6 +9266,7 @@ package body Einfo is
       W ("Is_Hidden_Non_Overridden_Subpgm", Flag2   (Id));
       W ("Is_Hidden_Open_Scope",            Flag171 (Id));
       W ("Is_Ignored_Ghost_Entity",         Flag278 (Id));
+      W ("Is_Ignored_Transient",            Flag295 (Id));
       W ("Is_Immediately_Visible",          Flag7   (Id));
       W ("Is_Implementation_Defined",       Flag254 (Id));
       W ("Is_Imported",                     Flag24  (Id));
@@ -9281,7 +9306,6 @@ package body Einfo is
       W ("Is_Private_Composite",            Flag107 (Id));
       W ("Is_Private_Descendant",           Flag53  (Id));
       W ("Is_Private_Primitive",            Flag245 (Id));
-      W ("Is_Processed_Transient",          Flag252 (Id));
       W ("Is_Public",                       Flag10  (Id));
       W ("Is_Pure",                         Flag44  (Id));
       W ("Is_Pure_Unit_Access_Type",        Flag189 (Id));
diff --git a/gcc/ada/einfo.ads b/gcc/ada/einfo.ads
index 683c281e24f..1085862f9b6 100644
--- a/gcc/ada/einfo.ads
+++ b/gcc/ada/einfo.ads
@@ -535,7 +535,7 @@ package Einfo is
 --       a build-in-place function call. Contains the relocated build-in-place
 --       call after the expansion has decoupled the call from the object. This
 --       attribute is used by the finalization machinery to insert cleanup code
---       for all additional transient variables found in the transient block.
+--       for all additional transient objects found in the transient block.
 
 --    C_Pass_By_Copy (Flag125) [implementation base type only]
 --       Defined in record types. Set if a pragma Convention for the record
@@ -1902,12 +1902,19 @@ package Einfo is
 --       that clients should generally not test this flag directly, but instead
 --       use function Has_Unreferenced.
 
+--  ??? this real description was clobbered
+
 --    Has_Pragma_Unreferenced_Objects (Flag212)
---       Defined in type and subtype entities. Set if a valid pragma
---       Unreferenced_Objects applies to the type, indicating that no warning
---       should be given for objects of such a type for being unreferenced
---       (but unlike the case with pragma Unreferenced, it is ok to reference
---       such an object and no warning is generated.
+--       Defined in all entities. Set if a valid pragma Unused applies to an
+--       entity, indicating that warnings should be given if the entity is
+--       modified or referenced. This pragma is equivalent to a pair of
+--       Unmodified and Unreferenced pragmas.
+
+--    Has_Pragma_Unused (Flag294)
+--       Defined in all entries. Set if a valid pragma Unused applies to a
+--       variable or entity, indicating that warnings should not be given if
+--       it is never modified or referenced. Note: This pragma is exactly
+--       equivalent Unmodified and Unreference combined.
 
 --    Has_Predicates (Flag250)
 --       Defined in type and subtype entities. Set if a pragma Predicate or
@@ -2281,7 +2288,7 @@ package Einfo is
 
 --    Is_Bit_Packed_Array (Flag122) [implementation base type only]
 --       Defined in all entities. This flag is set for a packed array type that
---       is bit packed (i.e. the component size is known by the front end and
+--       is bit-packed (i.e. the component size is known by the front end and
 --       is in the range 1-7, 9-15, 17-31, or 33-63). Is_Packed is always set
 --       if Is_Bit_Packed_Array is set, but it is possible for Is_Packed to be
 --       set without Is_Bit_Packed_Array if the component size is not known by
@@ -2477,6 +2484,12 @@ package Einfo is
 --       Applies to all entities, true for abstract states that are subject to
 --       option External.
 
+--    Is_Finalized_Transient (Flag252)
+--       Defined in constants, loop parameters of generalized iterators, and
+--       variables. Set when a transient object has been finalized by one of
+--       the transient finalization mechanisms. The flag prevents the double
+--       finalization of the object.
+
 --    Is_Finalizer (synthesized)
 --       Applies to all entities, true for procedures containing finalization
 --       code to process local or library level objects.
@@ -2588,6 +2601,13 @@ package Einfo is
 --       pragma Ghost or inherit "ghostness" from an enclosing construct, and
 --       subject to Assertion_Policy Ghost => Ignore.
 
+--    Is_Ignored_Transient (Flag295)
+--       Defined in constants, loop parameters of generalized iterators, and
+--       variables. Set when a transient object must be processed by one of
+--       the transient finalization mechanisms. Once marked, a transient is
+--       intentionally ignored by the general finalization mechanism because
+--       its clean up actions are context specific.
+
 --    Is_Immediately_Visible (Flag7)
 --       Defined in all entities. Set if entity is immediately visible, i.e.
 --       is defined in some currently open scope (RM 8.3(4)).
@@ -2900,7 +2920,7 @@ package Einfo is
 --       out that the component size doesn't require packing, the Is_Packed
 --       flag gets turned off.
 
---       In the bit packed array case (i.e. component size is known at compile
+--       In the bit-packed array case (i.e. component size is known at compile
 --       time and is 1-7, 9-15, 17-31 or 33-63), Is_Bit_Packed_Array will be
 --       set once the array type is frozen.
 --
@@ -2910,7 +2930,7 @@ package Einfo is
 --    Is_Packed_Array_Impl_Type (Flag138)
 --       Defined in all entities. This flag is set on the entity for the type
 --       used to implement a packed array (either a modular type or a subtype
---       of Packed_Bytes{1,2,4} in the bit packed array case, a regular array
+--       of Packed_Bytes{1,2,4} in the bit-packed array case, a regular array
 --       in the non-standard enumeration index case). It is set if and only
 --       if the type appears in the Packed_Array_Impl_Type field of some other
 --       entity. It is used by the back end to activate the special processing
@@ -2990,13 +3010,6 @@ package Einfo is
 --       Applies to all entities, true for private types and subtypes,
 --       as well as for record with private types as subtypes.
 
---    Is_Processed_Transient (Flag252)
---       Defined in variables, loop parameters, and constants, including the
---       loop parameters of generalized iterators. Set when a transient object
---       needs to be finalized and has already been processed by the transient
---       scope machinery. This flag signals the general finalization mechanism
---       to ignore the transient object.
-
 --    Is_Protected_Component (synthesized)
 --       Applicable to all entities, true if the entity denotes a private
 --       component of a protected type.
@@ -3724,10 +3737,10 @@ package Einfo is
 --    Packed_Array_Impl_Type (Node23)
 --       Defined in array types and subtypes, except for the string literal
 --       subtype case, if the corresponding type is packed and implemented
---       specially (either bit packed or packed to eliminate holes in the
+--       specially (either bit-packed or packed to eliminate holes in the
 --       non-contiguous enumeration index types). References the type used to
 --       represent the packed array, which is either a modular type for short
---       static arrays or an array of System.Unsigned in the bit packed case,
+--       static arrays or an array of System.Unsigned in the bit-packed case,
 --       or a regular array in the non-standard enumeration index case). Note
 --       that in some situations (internal types and references to fields of
 --       variant records), it is not always possible to construct this type in
@@ -5397,6 +5410,7 @@ package Einfo is
    --    Has_Pragma_Thread_Local_Storage     (Flag169)
    --    Has_Pragma_Unmodified               (Flag233)
    --    Has_Pragma_Unreferenced             (Flag180)
+   --    Has_Pragma_Unused                   (Flag294)
    --    Has_Private_Declaration             (Flag155)
    --    Has_Qualified_Name                  (Flag161)
    --    Has_Stream_Size_Clause              (Flag184)
@@ -5488,7 +5502,7 @@ package Einfo is
 
    --  The following list of access functions applies to all entities for
    --  types and subtypes. References to this list appear subsequently as
-   --  as "(plus type attributes)" for each appropriate Entity_Kind.
+   --  "(plus type attributes)" for each appropriate Entity_Kind.
 
    --    Associated_Node_For_Itype           (Node8)
    --    Class_Wide_Type                     (Node9)
@@ -5778,8 +5792,9 @@ package Einfo is
    --    Has_Volatile_Components             (Flag87)
    --    Is_Atomic                           (Flag85)
    --    Is_Eliminated                       (Flag124)
+   --    Is_Finalized_Transient              (Flag252)
+   --    Is_Ignored_Transient                (Flag295)
    --    Is_Independent                      (Flag268)
-   --    Is_Processed_Transient              (Flag252)  (constants only)
    --    Is_Return_Object                    (Flag209)
    --    Is_True_Constant                    (Flag163)
    --    Is_Uplevel_Referenced_Entity        (Flag283)
@@ -6544,8 +6559,9 @@ package Einfo is
    --    Has_Volatile_Components             (Flag87)
    --    Is_Atomic                           (Flag85)
    --    Is_Eliminated                       (Flag124)
+   --    Is_Finalized_Transient              (Flag252)
+   --    Is_Ignored_Transient                (Flag295)
    --    Is_Independent                      (Flag268)
-   --    Is_Processed_Transient              (Flag252)
    --    Is_Return_Object                    (Flag209)
    --    Is_Safe_To_Reevaluate               (Flag249)
    --    Is_Shared_Passive                   (Flag60)
@@ -6976,6 +6992,7 @@ package Einfo is
    function Has_Pragma_Unmodified               (Id : E) return B;
    function Has_Pragma_Unreferenced             (Id : E) return B;
    function Has_Pragma_Unreferenced_Objects     (Id : E) return B;
+   function Has_Pragma_Unused                   (Id : E) return B;
    function Has_Predicates                      (Id : E) return B;
    function Has_Primitive_Operations            (Id : E) return B;
    function Has_Private_Ancestor                (Id : E) return B;
@@ -7053,6 +7070,7 @@ package Einfo is
    function Is_Entry_Formal                     (Id : E) return B;
    function Is_Exception_Handler                (Id : E) return B;
    function Is_Exported                         (Id : E) return B;
+   function Is_Finalized_Transient              (Id : E) return B;
    function Is_First_Subtype                    (Id : E) return B;
    function Is_For_Access_Subtype               (Id : E) return B;
    function Is_Frozen                           (Id : E) return B;
@@ -7061,6 +7079,7 @@ package Einfo is
    function Is_Hidden_Non_Overridden_Subpgm     (Id : E) return B;
    function Is_Hidden_Open_Scope                (Id : E) return B;
    function Is_Ignored_Ghost_Entity             (Id : E) return B;
+   function Is_Ignored_Transient                (Id : E) return B;
    function Is_Immediately_Visible              (Id : E) return B;
    function Is_Implementation_Defined           (Id : E) return B;
    function Is_Imported                         (Id : E) return B;
@@ -7099,7 +7118,6 @@ package Einfo is
    function Is_Private_Composite                (Id : E) return B;
    function Is_Private_Descendant               (Id : E) return B;
    function Is_Private_Primitive                (Id : E) return B;
-   function Is_Processed_Transient              (Id : E) return B;
    function Is_Public                           (Id : E) return B;
    function Is_Pure                             (Id : E) return B;
    function Is_Pure_Unit_Access_Type            (Id : E) return B;
@@ -7649,6 +7667,7 @@ package Einfo is
    procedure Set_Has_Pragma_Unmodified           (Id : E; V : B := True);
    procedure Set_Has_Pragma_Unreferenced         (Id : E; V : B := True);
    procedure Set_Has_Pragma_Unreferenced_Objects (Id : E; V : B := True);
+   procedure Set_Has_Pragma_Unused               (Id : E; V : B := True);
    procedure Set_Has_Predicates                  (Id : E; V : B := True);
    procedure Set_Has_Primitive_Operations        (Id : E; V : B := True);
    procedure Set_Has_Private_Ancestor            (Id : E; V : B := True);
@@ -7726,6 +7745,7 @@ package Einfo is
    procedure Set_Is_Entry_Formal                 (Id : E; V : B := True);
    procedure Set_Is_Exception_Handler            (Id : E; V : B := True);
    procedure Set_Is_Exported                     (Id : E; V : B := True);
+   procedure Set_Is_Finalized_Transient          (Id : E; V : B := True);
    procedure Set_Is_First_Subtype                (Id : E; V : B := True);
    procedure Set_Is_For_Access_Subtype           (Id : E; V : B := True);
    procedure Set_Is_Formal_Subprogram            (Id : E; V : B := True);
@@ -7738,6 +7758,7 @@ package Einfo is
    procedure Set_Is_Hidden_Non_Overridden_Subpgm (Id : E; V : B := True);
    procedure Set_Is_Hidden_Open_Scope            (Id : E; V : B := True);
    procedure Set_Is_Ignored_Ghost_Entity         (Id : E; V : B := True);
+   procedure Set_Is_Ignored_Transient            (Id : E; V : B := True);
    procedure Set_Is_Immediately_Visible          (Id : E; V : B := True);
    procedure Set_Is_Implementation_Defined       (Id : E; V : B := True);
    procedure Set_Is_Imported                     (Id : E; V : B := True);
@@ -7777,7 +7798,6 @@ package Einfo is
    procedure Set_Is_Private_Composite            (Id : E; V : B := True);
    procedure Set_Is_Private_Descendant           (Id : E; V : B := True);
    procedure Set_Is_Private_Primitive            (Id : E; V : B := True);
-   procedure Set_Is_Processed_Transient          (Id : E; V : B := True);
    procedure Set_Is_Public                       (Id : E; V : B := True);
    procedure Set_Is_Pure                         (Id : E; V : B := True);
    procedure Set_Is_Pure_Unit_Access_Type        (Id : E; V : B := True);
@@ -8439,6 +8459,7 @@ package Einfo is
    pragma Inline (Has_Pragma_Unmodified);
    pragma Inline (Has_Pragma_Unreferenced);
    pragma Inline (Has_Pragma_Unreferenced_Objects);
+   pragma Inline (Has_Pragma_Unused);
    pragma Inline (Has_Predicates);
    pragma Inline (Has_Primitive_Operations);
    pragma Inline (Has_Private_Ancestor);
@@ -8533,6 +8554,7 @@ package Einfo is
    pragma Inline (Is_Enumeration_Type);
    pragma Inline (Is_Exception_Handler);
    pragma Inline (Is_Exported);
+   pragma Inline (Is_Finalized_Transient);
    pragma Inline (Is_First_Subtype);
    pragma Inline (Is_Fixed_Point_Type);
    pragma Inline (Is_Floating_Point_Type);
@@ -8552,6 +8574,7 @@ package Einfo is
    pragma Inline (Is_Hidden_Non_Overridden_Subpgm);
    pragma Inline (Is_Hidden_Open_Scope);
    pragma Inline (Is_Ignored_Ghost_Entity);
+   pragma Inline (Is_Ignored_Transient);
    pragma Inline (Is_Immediately_Visible);
    pragma Inline (Is_Implementation_Defined);
    pragma Inline (Is_Imported);
@@ -8601,7 +8624,6 @@ package Einfo is
    pragma Inline (Is_Private_Descendant);
    pragma Inline (Is_Private_Primitive);
    pragma Inline (Is_Private_Type);
-   pragma Inline (Is_Processed_Transient);
    pragma Inline (Is_Protected_Type);
    pragma Inline (Is_Public);
    pragma Inline (Is_Pure);
@@ -9028,6 +9050,7 @@ package Einfo is
    pragma Inline (Set_Is_Entry_Formal);
    pragma Inline (Set_Is_Exception_Handler);
    pragma Inline (Set_Is_Exported);
+   pragma Inline (Set_Is_Finalized_Transient);
    pragma Inline (Set_Is_First_Subtype);
    pragma Inline (Set_Is_For_Access_Subtype);
    pragma Inline (Set_Is_Formal_Subprogram);
@@ -9040,6 +9063,7 @@ package Einfo is
    pragma Inline (Set_Is_Hidden_Non_Overridden_Subpgm);
    pragma Inline (Set_Is_Hidden_Open_Scope);
    pragma Inline (Set_Is_Ignored_Ghost_Entity);
+   pragma Inline (Set_Is_Ignored_Transient);
    pragma Inline (Set_Is_Immediately_Visible);
    pragma Inline (Set_Is_Implementation_Defined);
    pragma Inline (Set_Is_Imported);
@@ -9079,7 +9103,6 @@ package Einfo is
    pragma Inline (Set_Is_Private_Composite);
    pragma Inline (Set_Is_Private_Descendant);
    pragma Inline (Set_Is_Private_Primitive);
-   pragma Inline (Set_Is_Processed_Transient);
    pragma Inline (Set_Is_Public);
    pragma Inline (Set_Is_Pure);
    pragma Inline (Set_Is_Pure_Unit_Access_Type);
diff --git a/gcc/ada/errout.adb b/gcc/ada/errout.adb
index 1c794de3c9b..09e8e591f15 100644
--- a/gcc/ada/errout.adb
+++ b/gcc/ada/errout.adb
@@ -1082,8 +1082,7 @@ package body Errout is
             end loop;
          end if;
 
-         --  Now we insert the new message in the error chain. The insertion
-         --  point for the message is after Prev_Msg and before Next_Msg.
+         --  Now we insert the new message in the error chain.
 
          --  The possible insertion point for the new message is after Prev_Msg
          --  and before Next_Msg. However, this is where we do a special check
@@ -1101,7 +1100,7 @@ package body Errout is
            and then not All_Errors_Mode
          then
             --  Don't delete unconditional messages and at this stage, don't
-            --  delete continuation lines (we attempted to delete those earlier
+            --  delete continuation lines; we attempted to delete those earlier
             --  if the parent message was deleted.
 
             if not Errors.Table (Cur_Msg).Uncond
@@ -1125,10 +1124,9 @@ package body Errout is
                   --  All tests passed, delete the message by simply returning
                   --  without any further processing.
 
-                  if not Continuation then
-                     Last_Killed := True;
-                  end if;
+                  pragma Assert (not Continuation);
 
+                  Last_Killed := True;
                   return;
                end if;
             end if;
diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index c3949dfa7f0..33374d35882 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -95,6 +95,25 @@ package body Exp_Aggr is
    --  Returns true if N is an aggregate used to initialize the components
    --  of a statically allocated dispatch table.
 
+   function Late_Expansion
+     (N      : Node_Id;
+      Typ    : Entity_Id;
+      Target : Node_Id) return List_Id;
+   --  This routine implements top-down expansion of nested aggregates. In
+   --  doing so, it avoids the generation of temporaries at each level. N is
+   --  a nested record or array aggregate with the Expansion_Delayed flag.
+   --  Typ is the expected type of the aggregate. Target is a (duplicatable)
+   --  expression that will hold the result of the aggregate expansion.
+
+   function Make_OK_Assignment_Statement
+     (Sloc       : Source_Ptr;
+      Name       : Node_Id;
+      Expression : Node_Id) return Node_Id;
+   --  This is like Make_Assignment_Statement, except that Assignment_OK
+   --  is set in the left operand. All assignments built by this unit use
+   --  this routine. This is needed to deal with assignments to initialized
+   --  constants that are done in place.
+
    function Must_Slide
      (Obj_Type : Entity_Id;
       Typ      : Entity_Id) return Boolean;
@@ -109,6 +128,41 @@ package body Exp_Aggr is
    --  when a component may be given with bounds that differ from those of the
    --  component type.
 
+   function Number_Of_Choices (N : Node_Id) return Nat;
+   --  Returns the number of discrete choices (not including the others choice
+   --  if present) contained in (sub-)aggregate N.
+
+   procedure Process_Transient_Component
+     (Loc        : Source_Ptr;
+      Comp_Typ   : Entity_Id;
+      Init_Expr  : Node_Id;
+      Fin_Call   : out Node_Id;
+      Hook_Clear : out Node_Id;
+      Aggr       : Node_Id := Empty;
+      Stmts      : List_Id := No_List);
+   --  Subsidiary to the expansion of array and record aggregates. Generate
+   --  part of the necessary code to finalize a transient component. Comp_Typ
+   --  is the component type. Init_Expr is the initialization expression of the
+   --  component which is always a function call. Fin_Call is the finalization
+   --  call used to clean up the transient function result. Hook_Clear is the
+   --  hook reset statement. Aggr and Stmts both control the placement of the
+   --  generated code. Aggr is the related aggregate. If present, all code is
+   --  inserted prior to Aggr using Insert_Action. Stmts is the initialization
+   --  statements of the component. If present, all code is added to Stmts.
+
+   procedure Process_Transient_Component_Completion
+     (Loc        : Source_Ptr;
+      Aggr       : Node_Id;
+      Fin_Call   : Node_Id;
+      Hook_Clear : Node_Id;
+      Stmts      : List_Id);
+   --  Subsidiary to the expansion of array and record aggregates. Generate
+   --  part of the necessary code to finalize a transient component. Aggr is
+   --  the related aggregate. Fin_Clear is the finalization call used to clean
+   --  up the transient component. Hook_Clear is the hook reset statment. Stmts
+   --  is the initialization statement list for the component. All generated
+   --  code is added to Stmts.
+
    procedure Sort_Case_Table (Case_Table : in out Case_Table_Type);
    --  Sort the Case Table using the Lower Bound of each Choice as the key.
    --  A simple insertion sort is used since the number of choices in a case
@@ -260,29 +314,6 @@ package body Exp_Aggr is
    --  an array that is suitable for this optimization: it returns True if Typ
    --  is a two dimensional bit packed array with component size 1, 2, or 4.
 
-   function Late_Expansion
-     (N      : Node_Id;
-      Typ    : Entity_Id;
-      Target : Node_Id) return List_Id;
-   --  This routine implements top-down expansion of nested aggregates. In
-   --  doing so, it avoids the generation of temporaries at each level. N is
-   --  a nested record or array aggregate with the Expansion_Delayed flag.
-   --  Typ is the expected type of the aggregate. Target is a (duplicatable)
-   --  expression that will hold the result of the aggregate expansion.
-
-   function Make_OK_Assignment_Statement
-     (Sloc       : Source_Ptr;
-      Name       : Node_Id;
-      Expression : Node_Id) return Node_Id;
-   --  This is like Make_Assignment_Statement, except that Assignment_OK
-   --  is set in the left operand. All assignments built by this unit use
-   --  this routine. This is needed to deal with assignments to initialized
-   --  constants that are done in place.
-
-   function Number_Of_Choices (N : Node_Id) return Nat;
-   --  Returns the number of discrete choices (not including the others choice
-   --  if present) contained in (sub-)aggregate N.
-
    function Packed_Array_Aggregate_Handled (N : Node_Id) return Boolean;
    --  Given an array aggregate, this function handles the case of a packed
    --  array aggregate with all constant values, where the aggregate can be
@@ -794,14 +825,18 @@ package body Exp_Aggr is
       function Index_Base_Name return Node_Id;
       --  Returns a new reference to the index type name
 
-      function Gen_Assign (Ind : Node_Id; Expr : Node_Id) return List_Id;
+      function Gen_Assign
+        (Ind     : Node_Id;
+         Expr    : Node_Id;
+         In_Loop : Boolean := False) return List_Id;
       --  Ind must be a side-effect-free expression. If the input aggregate N
       --  to Build_Loop contains no subaggregates, then this function returns
       --  the assignment statement:
       --
       --     Into (Indexes, Ind) := Expr;
       --
-      --  Otherwise we call Build_Code recursively
+      --  Otherwise we call Build_Code recursively. Flag In_Loop should be set
+      --  when the assignment appears within a generated loop.
       --
       --  Ada 2005 (AI-287): In case of default initialized component, Expr
       --  is empty and we generate a call to the corresponding IP subprogram.
@@ -815,9 +850,9 @@ package body Exp_Aggr is
       --        Into (Indexes, J) := Expr;
       --     end loop;
       --
-      --  Otherwise we call Build_Code recursively.
-      --  As an optimization if the loop covers 3 or fewer scalar elements we
-      --  generate a sequence of assignments.
+      --  Otherwise we call Build_Code recursively. As an optimization if the
+      --  loop covers 3 or fewer scalar elements we generate a sequence of
+      --  assignments.
 
       function Gen_While (L, H : Node_Id; Expr : Node_Id) return List_Id;
       --  Nodes L and H must be side-effect-free expressions. If the input
@@ -1016,19 +1051,36 @@ package body Exp_Aggr is
       -- Gen_Assign --
       ----------------
 
-      function Gen_Assign (Ind : Node_Id; Expr : Node_Id) return List_Id is
-         L : constant List_Id := New_List;
-         A : Node_Id;
-
-         New_Indexes  : List_Id;
-         Indexed_Comp : Node_Id;
-         Expr_Q       : Node_Id;
-         Comp_Type    : Entity_Id := Empty;
-
+      function Gen_Assign
+        (Ind     : Node_Id;
+         Expr    : Node_Id;
+         In_Loop : Boolean := False) return List_Id
+       is
          function Add_Loop_Actions (Lis : List_Id) return List_Id;
-         --  Collect insert_actions generated in the construction of a
-         --  loop, and prepend them to the sequence of assignments to
-         --  complete the eventual body of the loop.
+         --  Collect insert_actions generated in the construction of a loop,
+         --  and prepend them to the sequence of assignments to complete the
+         --  eventual body of the loop.
+
+         procedure Initialize_Array_Component
+           (Arr_Comp  : Node_Id;
+            Comp_Typ  : Node_Id;
+            Init_Expr : Node_Id;
+            Stmts     : List_Id);
+         --  Perform the initialization of array component Arr_Comp with
+         --  expected type Comp_Typ. Init_Expr denotes the initialization
+         --  expression of the array component. All generated code is added
+         --  to list Stmts.
+
+         procedure Initialize_Ctrl_Array_Component
+           (Arr_Comp  : Node_Id;
+            Comp_Typ  : Entity_Id;
+            Init_Expr : Node_Id;
+            Stmts     : List_Id);
+         --  Perform the initialization of array component Arr_Comp when its
+         --  expected type Comp_Typ needs finalization actions. Init_Expr is
+         --  the initialization expression of the array component. All hook-
+         --  related declarations are inserted prior to aggregate N. Remaining
+         --  code is added to list Stmts.
 
          ----------------------
          -- Add_Loop_Actions --
@@ -1057,6 +1109,279 @@ package body Exp_Aggr is
             end if;
          end Add_Loop_Actions;
 
+         --------------------------------
+         -- Initialize_Array_Component --
+         --------------------------------
+
+         procedure Initialize_Array_Component
+           (Arr_Comp  : Node_Id;
+            Comp_Typ  : Node_Id;
+            Init_Expr : Node_Id;
+            Stmts     : List_Id)
+         is
+            Exceptions_OK : constant Boolean :=
+                              not Restriction_Active
+                                    (No_Exception_Propagation);
+
+            Finalization_OK : constant Boolean :=
+                                Present (Comp_Typ)
+                                  and then Needs_Finalization (Comp_Typ);
+
+            Full_Typ  : constant Entity_Id := Underlying_Type (Comp_Typ);
+            Blk_Stmts : List_Id;
+            Init_Stmt : Node_Id;
+
+         begin
+            --  Protect the initialization statements from aborts. Generate:
+
+            --    Abort_Defer;
+
+            if Finalization_OK and Abort_Allowed then
+               if Exceptions_OK then
+                  Blk_Stmts := New_List;
+               else
+                  Blk_Stmts := Stmts;
+               end if;
+
+               Append_To (Blk_Stmts, Build_Runtime_Call (Loc, RE_Abort_Defer));
+
+            --  Otherwise aborts are not allowed. All generated code is added
+            --  directly to the input list.
+
+            else
+               Blk_Stmts := Stmts;
+            end if;
+
+            --  Initialize the array element. Generate:
+
+            --    Arr_Comp := Init_Expr;
+
+            --  Note that the initialization expression is replicated because
+            --  it has to be reevaluated within a generated loop.
+
+            Init_Stmt :=
+              Make_OK_Assignment_Statement (Loc,
+                Name       => New_Copy_Tree (Arr_Comp),
+                Expression => New_Copy_Tree (Init_Expr));
+            Set_No_Ctrl_Actions (Init_Stmt);
+
+            --  If this is an aggregate for an array of arrays, each
+            --  subaggregate will be expanded as well, and even with
+            --  No_Ctrl_Actions the assignments of inner components will
+            --  require attachment in their assignments to temporaries. These
+            --  temporaries must be finalized for each subaggregate. Generate:
+
+            --    begin
+            --       Arr_Comp := Init_Expr;
+            --    end;
+
+            if Finalization_OK and then Is_Array_Type (Comp_Typ) then
+               Init_Stmt :=
+                 Make_Block_Statement (Loc,
+                   Handled_Statement_Sequence =>
+                     Make_Handled_Sequence_Of_Statements (Loc,
+                       Statements => New_List (Init_Stmt)));
+            end if;
+
+            Append_To (Blk_Stmts, Init_Stmt);
+
+            --  Adjust the tag due to a possible view conversion. Generate:
+
+            --    Arr_Comp._tag := Full_TypP;
+
+            if Tagged_Type_Expansion
+              and then Present (Comp_Typ)
+              and then Is_Tagged_Type (Comp_Typ)
+            then
+               Append_To (Blk_Stmts,
+                 Make_OK_Assignment_Statement (Loc,
+                   Name       =>
+                     Make_Selected_Component (Loc,
+                       Prefix        => New_Copy_Tree (Arr_Comp),
+                       Selector_Name =>
+                         New_Occurrence_Of
+                           (First_Tag_Component (Full_Typ), Loc)),
+
+                   Expression =>
+                     Unchecked_Convert_To (RTE (RE_Tag),
+                       New_Occurrence_Of
+                         (Node (First_Elmt (Access_Disp_Table (Full_Typ))),
+                          Loc))));
+            end if;
+
+            --  Adjust the array component. Controlled subaggregates are not
+            --  considered because each of their individual elements will
+            --  receive an adjustment of its own. Generate:
+
+            --    [Deep_]Adjust (Arr_Comp);
+
+            if Finalization_OK
+              and then not Is_Limited_Type (Comp_Typ)
+              and then not
+                (Is_Array_Type (Comp_Typ)
+                  and then Is_Controlled (Component_Type (Comp_Typ))
+                  and then Nkind (Expr) = N_Aggregate)
+            then
+               Append_To (Blk_Stmts,
+                 Make_Adjust_Call
+                   (Obj_Ref => New_Copy_Tree (Arr_Comp),
+                    Typ     => Comp_Typ));
+            end if;
+
+            --  Complete the protection of the initialization statements
+
+            if Finalization_OK and Abort_Allowed then
+
+               --  Wrap the initialization statements in a block to catch a
+               --  potential exception. Generate:
+
+               --    begin
+               --       Abort_Defer;
+               --       Arr_Comp := Init_Expr;
+               --       Arr_Comp._tag := Full_TypP;
+               --       [Deep_]Adjust (Arr_Comp);
+               --    at end
+               --       Abort_Undefer_Direct;
+               --    end;
+
+               if Exceptions_OK then
+                  Append_To (Stmts,
+                    Build_Abort_Undefer_Block (Loc,
+                      Stmts   => Blk_Stmts,
+                      Context => N));
+
+               --  Otherwise exceptions are not propagated. Generate:
+
+               --    Abort_Defer;
+               --    Arr_Comp := Init_Expr;
+               --    Arr_Comp._tag := Full_TypP;
+               --    [Deep_]Adjust (Arr_Comp);
+               --    Abort_Undefer;
+
+               else
+                  Append_To (Blk_Stmts,
+                    Build_Runtime_Call (Loc, RE_Abort_Undefer));
+               end if;
+            end if;
+         end Initialize_Array_Component;
+
+         -------------------------------------
+         -- Initialize_Ctrl_Array_Component --
+         -------------------------------------
+
+         procedure Initialize_Ctrl_Array_Component
+           (Arr_Comp  : Node_Id;
+            Comp_Typ  : Entity_Id;
+            Init_Expr : Node_Id;
+            Stmts     : List_Id)
+         is
+            Act_Aggr   : Node_Id;
+            Act_Stmts  : List_Id;
+            Fin_Call   : Node_Id;
+            Hook_Clear : Node_Id;
+
+            In_Place_Expansion : Boolean;
+            --  Flag set when a nonlimited controlled function call requires
+            --  in-place expansion.
+
+         begin
+            --  Perform a preliminary analysis and resolution to determine what
+            --  the initialization expression denotes. An unanalyzed function
+            --  call may appear as an identifier or an indexed component.
+
+            if Nkind_In (Init_Expr, N_Function_Call,
+                                    N_Identifier,
+                                    N_Indexed_Component)
+              and then not Analyzed (Init_Expr)
+            then
+               Preanalyze_And_Resolve (Init_Expr, Comp_Typ);
+            end if;
+
+            In_Place_Expansion :=
+              Nkind (Init_Expr) = N_Function_Call
+                and then not Is_Limited_Type (Comp_Typ);
+
+            --  The initialization expression is a controlled function call.
+            --  Perform in-place removal of side effects to avoid creating a
+            --  transient scope, which leads to premature finalization.
+
+            --  This in-place expansion is not performed for limited transient
+            --  objects because the initialization is already done in-place.
+
+            if In_Place_Expansion then
+
+               --  Suppress the removal of side effects by general analysis
+               --  because this behavior is emulated here. This avoids the
+               --  generation of a transient scope, which leads to out-of-order
+               --  adjustment and finalization.
+
+               Set_No_Side_Effect_Removal (Init_Expr);
+
+               --  When the transient component initialization is related to a
+               --  range or an "others", keep all generated statements within
+               --  the enclosing loop. This way the controlled function call
+               --  will be evaluated at each iteration, and its result will be
+               --  finalized at the end of each iteration.
+
+               if In_Loop then
+                  Act_Aggr  := Empty;
+                  Act_Stmts := Stmts;
+
+               --  Otherwise this is a single component initialization. Hook-
+               --  related statements are inserted prior to the aggregate.
+
+               else
+                  Act_Aggr  := N;
+                  Act_Stmts := No_List;
+               end if;
+
+               --  Install all hook-related declarations and prepare the clean
+               --  up statements.
+
+               Process_Transient_Component
+                 (Loc        => Loc,
+                  Comp_Typ   => Comp_Typ,
+                  Init_Expr  => Init_Expr,
+                  Fin_Call   => Fin_Call,
+                  Hook_Clear => Hook_Clear,
+                  Aggr       => Act_Aggr,
+                  Stmts      => Act_Stmts);
+            end if;
+
+            --  Use the noncontrolled component initialization circuitry to
+            --  assign the result of the function call to the array element.
+            --  This also performs subaggregate wrapping, tag adjustment, and
+            --  [deep] adjustment of the array element.
+
+            Initialize_Array_Component
+              (Arr_Comp  => Arr_Comp,
+               Comp_Typ  => Comp_Typ,
+               Init_Expr => Init_Expr,
+               Stmts     => Stmts);
+
+            --  At this point the array element is fully initialized. Complete
+            --  the processing of the controlled array component by finalizing
+            --  the transient function result.
+
+            if In_Place_Expansion then
+               Process_Transient_Component_Completion
+                 (Loc        => Loc,
+                  Aggr       => N,
+                  Fin_Call   => Fin_Call,
+                  Hook_Clear => Hook_Clear,
+                  Stmts      => Stmts);
+            end if;
+         end Initialize_Ctrl_Array_Component;
+
+         --  Local variables
+
+         Stmts : constant List_Id := New_List;
+
+         Comp_Typ     : Entity_Id := Empty;
+         Expr_Q       : Node_Id;
+         Indexed_Comp : Node_Id;
+         New_Indexes  : List_Id;
+
       --  Start of processing for Gen_Assign
 
       begin
@@ -1102,8 +1427,8 @@ package body Exp_Aggr is
          end if;
 
          if Present (Etype (N)) and then Etype (N) /= Any_Composite then
-            Comp_Type := Component_Type (Etype (N));
-            pragma Assert (Comp_Type = Ctype); --  AI-287
+            Comp_Typ := Component_Type (Etype (N));
+            pragma Assert (Comp_Typ = Ctype); --  AI-287
 
          elsif Present (Next (First (New_Indexes))) then
 
@@ -1129,7 +1454,7 @@ package body Exp_Aggr is
                      if Nkind (P) = N_Aggregate
                        and then Present (Etype (P))
                      then
-                        Comp_Type := Component_Type (Etype (P));
+                        Comp_Typ := Component_Type (Etype (P));
                         exit;
 
                      else
@@ -1137,7 +1462,7 @@ package body Exp_Aggr is
                      end if;
                   end loop;
 
-                  pragma Assert (Comp_Type = Ctype); --  AI-287
+                  pragma Assert (Comp_Typ = Ctype); --  AI-287
                end;
             end if;
          end if;
@@ -1155,8 +1480,8 @@ package body Exp_Aggr is
             --  the analysis of non-array aggregates now in order to get the
             --  value of Expansion_Delayed flag for the inner aggregate ???
 
-            if Present (Comp_Type) and then not Is_Array_Type (Comp_Type) then
-               Analyze_And_Resolve (Expr_Q, Comp_Type);
+            if Present (Comp_Typ) and then not Is_Array_Type (Comp_Typ) then
+               Analyze_And_Resolve (Expr_Q, Comp_Typ);
             end if;
 
             if Is_Delayed_Aggregate (Expr_Q) then
@@ -1167,13 +1492,13 @@ package body Exp_Aggr is
                --  component associations that provide different bounds from
                --  those of the component type, and sliding must occur. Instead
                --  of decomposing the current aggregate assignment, force the
-               --  re-analysis of the assignment, so that a temporary will be
+               --  reanalysis of the assignment, so that a temporary will be
                --  generated in the usual fashion, and sliding will take place.
 
                if Nkind (Parent (N)) = N_Assignment_Statement
-                 and then Is_Array_Type (Comp_Type)
+                 and then Is_Array_Type (Comp_Typ)
                  and then Present (Component_Associations (Expr_Q))
-                 and then Must_Slide (Comp_Type, Etype (Expr_Q))
+                 and then Must_Slide (Comp_Typ, Etype (Expr_Q))
                then
                   Set_Expansion_Delayed (Expr_Q, False);
                   Set_Analyzed (Expr_Q, False);
@@ -1186,6 +1511,59 @@ package body Exp_Aggr is
             end if;
          end if;
 
+         if Present (Expr) then
+
+            --  Handle an initialization expression of a controlled type in
+            --  case it denotes a function call. In general such a scenario
+            --  will produce a transient scope, but this will lead to wrong
+            --  order of initialization, adjustment, and finalization in the
+            --  context of aggregates.
+
+            --    Target (1) := Ctrl_Func_Call;
+
+            --    begin                                  --  scope
+            --       Trans_Obj : ... := Ctrl_Func_Call;  --  object
+            --       Target (1) := Trans_Obj;
+            --       Finalize (Trans_Obj);
+            --    end;
+            --    Target (1)._tag := ...;
+            --    Adjust (Target (1));
+
+            --  In the example above, the call to Finalize occurs too early
+            --  and as a result it may leave the array component in a bad
+            --  state. Finalization of the transient object should really
+            --  happen after adjustment.
+
+            --  To avoid this scenario, perform in-place side-effect removal
+            --  of the function call. This eliminates the transient property
+            --  of the function result and ensures correct order of actions.
+
+            --    Res : ... := Ctrl_Func_Call;
+            --    Target (1) := Res;
+            --    Target (1)._tag := ...;
+            --    Adjust (Target (1));
+            --    Finalize (Res);
+
+            if Present (Comp_Typ)
+              and then Needs_Finalization (Comp_Typ)
+              and then Nkind (Expr) /= N_Aggregate
+            then
+               Initialize_Ctrl_Array_Component
+                 (Arr_Comp  => Indexed_Comp,
+                  Comp_Typ  => Comp_Typ,
+                  Init_Expr => Expr,
+                  Stmts     => Stmts);
+
+            --  Otherwise perform simple component initialization
+
+            else
+               Initialize_Array_Component
+                 (Arr_Comp  => Indexed_Comp,
+                  Comp_Typ  => Comp_Typ,
+                  Init_Expr => Expr,
+                  Stmts     => Stmts);
+            end if;
+
          --  Ada 2005 (AI-287): In case of default initialized component, call
          --  the initialization subprogram associated with the component type.
          --  If the component type is an access type, add an explicit null
@@ -1197,11 +1575,11 @@ package body Exp_Aggr is
          --  its Initialize procedure explicitly, because there is no explicit
          --  object creation that will invoke it otherwise.
 
-         if No (Expr) then
+         else
             if Present (Base_Init_Proc (Base_Type (Ctype)))
               or else Has_Task (Base_Type (Ctype))
             then
-               Append_List_To (L,
+               Append_List_To (Stmts,
                  Build_Initialization_Call (Loc,
                    Id_Ref            => Indexed_Comp,
                    Typ               => Ctype,
@@ -1214,124 +1592,25 @@ package body Exp_Aggr is
 
                if Has_Invariants (Ctype) then
                   Set_Etype (Indexed_Comp, Ctype);
-                  Append_To (L, Make_Invariant_Call (Indexed_Comp));
+                  Append_To (Stmts, Make_Invariant_Call (Indexed_Comp));
                end if;
 
             elsif Is_Access_Type (Ctype) then
-               Append_To (L,
+               Append_To (Stmts,
                  Make_Assignment_Statement (Loc,
-                   Name       => Indexed_Comp,
+                   Name       => New_Copy_Tree (Indexed_Comp),
                    Expression => Make_Null (Loc)));
             end if;
 
             if Needs_Finalization (Ctype) then
-               Append_To (L,
+               Append_To (Stmts,
                  Make_Init_Call
                    (Obj_Ref => New_Copy_Tree (Indexed_Comp),
                     Typ     => Ctype));
             end if;
-
-         else
-            A :=
-              Make_OK_Assignment_Statement (Loc,
-                Name       => Indexed_Comp,
-                Expression => New_Copy_Tree (Expr));
-
-            --  The target of the assignment may not have been initialized,
-            --  so it is not possible to call Finalize as expected in normal
-            --  controlled assignments. We must also avoid using the primitive
-            --  _assign (which depends on a valid target, and may for example
-            --  perform discriminant checks on it).
-
-            --  Both Finalize and usage of _assign are disabled by setting
-            --  No_Ctrl_Actions on the assignment. The rest of the controlled
-            --  actions are done manually with the proper finalization list
-            --  coming from the context.
-
-            Set_No_Ctrl_Actions (A);
-
-            --  If this is an aggregate for an array of arrays, each
-            --  subaggregate will be expanded as well, and even with
-            --  No_Ctrl_Actions the assignments of inner components will
-            --  require attachment in their assignments to temporaries. These
-            --  temporaries must be finalized for each subaggregate, to prevent
-            --  multiple attachments of the same temporary location to same
-            --  finalization chain (and consequently circular lists). To ensure
-            --  that finalization takes place for each subaggregate we wrap the
-            --  assignment in a block.
-
-            if Present (Comp_Type)
-              and then Needs_Finalization (Comp_Type)
-              and then Is_Array_Type (Comp_Type)
-              and then Present (Expr)
-            then
-               A :=
-                 Make_Block_Statement (Loc,
-                   Handled_Statement_Sequence =>
-                     Make_Handled_Sequence_Of_Statements (Loc,
-                       Statements => New_List (A)));
-            end if;
-
-            Append_To (L, A);
-
-            --  Adjust the tag if tagged (because of possible view
-            --  conversions), unless compiling for a VM where tags
-            --  are implicit.
-
-            if Present (Comp_Type)
-              and then Is_Tagged_Type (Comp_Type)
-              and then Tagged_Type_Expansion
-            then
-               declare
-                  Full_Typ : constant Entity_Id := Underlying_Type (Comp_Type);
-
-               begin
-                  A :=
-                    Make_OK_Assignment_Statement (Loc,
-                      Name       =>
-                        Make_Selected_Component (Loc,
-                          Prefix        =>  New_Copy_Tree (Indexed_Comp),
-                          Selector_Name =>
-                            New_Occurrence_Of
-                              (First_Tag_Component (Full_Typ), Loc)),
-
-                      Expression =>
-                        Unchecked_Convert_To (RTE (RE_Tag),
-                          New_Occurrence_Of
-                            (Node (First_Elmt (Access_Disp_Table (Full_Typ))),
-                             Loc)));
-
-                  Append_To (L, A);
-               end;
-            end if;
-
-            --  Adjust and attach the component to the proper final list, which
-            --  can be the controller of the outer record object or the final
-            --  list associated with the scope.
-
-            --  If the component is itself an array of controlled types, whose
-            --  value is given by a subaggregate, then the attach calls have
-            --  been generated when individual subcomponent are assigned, and
-            --  must not be done again to prevent malformed finalization chains
-            --  (see comments above, concerning the creation of a block to hold
-            --  inner finalization actions).
-
-            if Present (Comp_Type)
-              and then Needs_Finalization (Comp_Type)
-              and then not Is_Limited_Type (Comp_Type)
-              and then not
-                (Is_Array_Type (Comp_Type)
-                  and then Is_Controlled (Component_Type (Comp_Type))
-                  and then Nkind (Expr) = N_Aggregate)
-            then
-               Append_To (L,
-                 Make_Adjust_Call
-                   (Obj_Ref => New_Copy_Tree (Indexed_Comp),
-                    Typ     => Comp_Type));
-            end if;
          end if;
 
-         return Add_Loop_Actions (L);
+         return Add_Loop_Actions (Stmts);
       end Gen_Assign;
 
       --------------
@@ -1410,7 +1689,6 @@ package body Exp_Aggr is
            and then Local_Compile_Time_Known_Value (H)
            and then Local_Expr_Value (H) - Local_Expr_Value (L) <= 2
          then
-
             Append_List_To (S, Gen_Assign (New_Copy_Tree (L), Expr));
             Append_List_To (S, Gen_Assign (Add (1, To => L), Expr));
 
@@ -1465,7 +1743,8 @@ package body Exp_Aggr is
 
          --  Construct the statements to execute in the loop body
 
-         L_Body := Gen_Assign (New_Occurrence_Of (L_J, Loc), Expr);
+         L_Body :=
+           Gen_Assign (New_Occurrence_Of (L_J, Loc), Expr, In_Loop => True);
 
          --  Construct the final loop
 
@@ -1572,8 +1851,9 @@ package body Exp_Aggr is
               Expression => W_Index_Succ);
 
          Append_To (W_Body, W_Increment);
+
          Append_List_To (W_Body,
-           Gen_Assign (New_Occurrence_Of (W_J, Loc), Expr));
+           Gen_Assign (New_Occurrence_Of (W_J, Loc), Expr, In_Loop => True));
 
          --  Construct the final loop
 
@@ -1649,14 +1929,9 @@ package body Exp_Aggr is
          end if;
       end Local_Expr_Value;
 
-      --  Build_Array_Aggr_Code Variables
-
-      Assoc  : Node_Id;
-      Choice : Node_Id;
-      Expr   : Node_Id;
-      Typ    : Entity_Id;
+      --  Local variables
 
-      Others_Assoc        : Node_Id := Empty;
+      New_Code : constant List_Id := New_List;
 
       Aggr_L : constant Node_Id := Low_Bound (Aggregate_Bounds (N));
       Aggr_H : constant Node_Id := High_Bound (Aggregate_Bounds (N));
@@ -1668,8 +1943,12 @@ package body Exp_Aggr is
       Aggr_High : constant Node_Id := Duplicate_Subexpr_No_Checks (Aggr_H);
       --  After Duplicate_Subexpr these are side-effect free
 
-      Low        : Node_Id;
-      High       : Node_Id;
+      Assoc  : Node_Id;
+      Choice : Node_Id;
+      Expr   : Node_Id;
+      High   : Node_Id;
+      Low    : Node_Id;
+      Typ    : Entity_Id;
 
       Nb_Choices : Nat := 0;
       Table      : Case_Table_Type (1 .. Number_Of_Choices (N));
@@ -1678,7 +1957,7 @@ package body Exp_Aggr is
       Nb_Elements : Int;
       --  Number of elements in the positional aggregate
 
-      New_Code : constant List_Id := New_List;
+      Others_Assoc : Node_Id := Empty;
 
    --  Start of processing for Build_Array_Aggr_Code
 
@@ -1941,10 +2220,39 @@ package body Exp_Aggr is
       --  The type of the aggregate is a subtype created ealier using the
       --  given values of the discriminant components of the aggregate.
 
+      procedure Initialize_Ctrl_Record_Component
+        (Rec_Comp  : Node_Id;
+         Comp_Typ  : Entity_Id;
+         Init_Expr : Node_Id;
+         Stmts     : List_Id);
+      --  Perform the initialization of controlled record component Rec_Comp.
+      --  Comp_Typ is the component type. Init_Expr is the initialization
+      --  expression for the record component. Hook-related declarations are
+      --  inserted prior to aggregate N using Insert_Action. All remaining
+      --  generated code is added to list Stmts.
+
+      procedure Initialize_Record_Component
+        (Rec_Comp  : Node_Id;
+         Comp_Typ  : Entity_Id;
+         Init_Expr : Node_Id;
+         Stmts     : List_Id);
+      --  Perform the initialization of record component Rec_Comp. Comp_Typ
+      --  is the component type. Init_Expr is the initialization expression
+      --  of the record component. All generated code is added to list Stmts.
+
       function Is_Int_Range_Bounds (Bounds : Node_Id) return Boolean;
       --  Check whether Bounds is a range node and its lower and higher bounds
       --  are integers literals.
 
+      function Replace_Type (Expr : Node_Id) return Traverse_Result;
+      --  If the aggregate contains a self-reference, traverse each expression
+      --  to replace a possible self-reference with a reference to the proper
+      --  component of the target of the assignment.
+
+      function Rewrite_Discriminant (Expr : Node_Id) return Traverse_Result;
+      --  If default expression of a component mentions a discriminant of the
+      --  type, it must be rewritten as the discriminant of the target object.
+
       ---------------------------------
       -- Ancestor_Discriminant_Value --
       ---------------------------------
@@ -2124,6 +2432,39 @@ package body Exp_Aggr is
          return Typ_Lo <= Agg_Lo and then Agg_Hi <= Typ_Hi;
       end Compatible_Int_Bounds;
 
+      -----------------------------------
+      -- Generate_Finalization_Actions --
+      -----------------------------------
+
+      procedure Generate_Finalization_Actions is
+      begin
+         --  Do the work only the first time this is called
+
+         if Finalization_Done then
+            return;
+         end if;
+
+         Finalization_Done := True;
+
+         --  Determine the external finalization list. It is either the
+         --  finalization list of the outer scope or the one coming from an
+         --  outer aggregate. When the target is not a temporary, the proper
+         --  scope is the scope of the target rather than the potentially
+         --  transient current scope.
+
+         if Is_Controlled (Typ) and then Ancestor_Is_Subtype_Mark then
+            Ref := Convert_To (Init_Typ, New_Copy_Tree (Target));
+            Set_Assignment_OK (Ref);
+
+            Append_To (L,
+              Make_Procedure_Call_Statement (Loc,
+                Name                   =>
+                  New_Occurrence_Of
+                    (Find_Prim_Op (Init_Typ, Name_Initialize), Loc),
+                Parameter_Associations => New_List (New_Copy_Tree (Ref))));
+         end if;
+      end Generate_Finalization_Actions;
+
       --------------------------------
       -- Get_Constraint_Association --
       --------------------------------
@@ -2393,80 +2734,227 @@ package body Exp_Aggr is
          end loop;
       end Init_Stored_Discriminants;
 
-      -------------------------
-      -- Is_Int_Range_Bounds --
-      -------------------------
+      --------------------------------------
+      -- Initialize_Ctrl_Record_Component --
+      --------------------------------------
+
+      procedure Initialize_Ctrl_Record_Component
+        (Rec_Comp  : Node_Id;
+         Comp_Typ  : Entity_Id;
+         Init_Expr : Node_Id;
+         Stmts     : List_Id)
+      is
+         Fin_Call   : Node_Id;
+         Hook_Clear : Node_Id;
+
+         In_Place_Expansion : Boolean;
+         --  Flag set when a nonlimited controlled function call requires
+         --  in-place expansion.
 
-      function Is_Int_Range_Bounds (Bounds : Node_Id) return Boolean is
       begin
-         return Nkind (Bounds) = N_Range
-           and then Nkind (Low_Bound  (Bounds)) = N_Integer_Literal
-           and then Nkind (High_Bound (Bounds)) = N_Integer_Literal;
-      end Is_Int_Range_Bounds;
+         --  Perform a preliminary analysis and resolution to determine what
+         --  the initialization expression denotes. Unanalyzed function calls
+         --  may appear as identifiers or indexed components.
+
+         if Nkind_In (Init_Expr, N_Function_Call,
+                                 N_Identifier,
+                                 N_Indexed_Component)
+           and then not Analyzed (Init_Expr)
+         then
+            Preanalyze_And_Resolve (Init_Expr, Comp_Typ);
+         end if;
 
-      -----------------------------------
-      -- Generate_Finalization_Actions --
-      -----------------------------------
+         In_Place_Expansion :=
+           Nkind (Init_Expr) = N_Function_Call
+             and then not Is_Limited_Type (Comp_Typ);
+
+         --  The initialization expression is a controlled function call.
+         --  Perform in-place removal of side effects to avoid creating a
+         --  transient scope.
+
+         --  This in-place expansion is not performed for limited transient
+         --  objects because the initialization is already done in place.
+
+         if In_Place_Expansion then
+
+            --  Suppress the removal of side effects by general analysis
+            --  because this behavior is emulated here. This avoids the
+            --  generation of a transient scope, which leads to out-of-order
+            --  adjustment and finalization.
+
+            Set_No_Side_Effect_Removal (Init_Expr);
+
+            --  Install all hook-related declarations and prepare the clean up
+            --  statements.
+
+            Process_Transient_Component
+              (Loc        => Loc,
+               Comp_Typ   => Comp_Typ,
+               Init_Expr  => Init_Expr,
+               Fin_Call   => Fin_Call,
+               Hook_Clear => Hook_Clear,
+               Aggr       => N);
+         end if;
+
+         --  Use the noncontrolled component initialization circuitry to
+         --  assign the result of the function call to the record component.
+         --  This also performs tag adjustment and [deep] adjustment of the
+         --  record component.
+
+         Initialize_Record_Component
+           (Rec_Comp  => Rec_Comp,
+            Comp_Typ  => Comp_Typ,
+            Init_Expr => Init_Expr,
+            Stmts     => Stmts);
+
+         --  At this point the record component is fully initialized. Complete
+         --  the processing of the controlled record component by finalizing
+         --  the transient function result.
+
+         if In_Place_Expansion then
+            Process_Transient_Component_Completion
+              (Loc        => Loc,
+               Aggr       => N,
+               Fin_Call   => Fin_Call,
+               Hook_Clear => Hook_Clear,
+               Stmts      => Stmts);
+         end if;
+      end Initialize_Ctrl_Record_Component;
+
+      ---------------------------------
+      -- Initialize_Record_Component --
+      ---------------------------------
+
+      procedure Initialize_Record_Component
+        (Rec_Comp  : Node_Id;
+         Comp_Typ  : Entity_Id;
+         Init_Expr : Node_Id;
+         Stmts     : List_Id)
+      is
+         Exceptions_OK : constant Boolean :=
+                           not Restriction_Active (No_Exception_Propagation);
+
+         Finalization_OK : constant Boolean := Needs_Finalization (Comp_Typ);
+
+         Full_Typ  : constant Entity_Id := Underlying_Type (Comp_Typ);
+         Blk_Stmts : List_Id;
+         Init_Stmt : Node_Id;
 
-      procedure Generate_Finalization_Actions is
       begin
-         --  Do the work only the first time this is called
+         --  Protect the initialization statements from aborts. Generate:
 
-         if Finalization_Done then
-            return;
+         --    Abort_Defer;
+
+         if Finalization_OK and Abort_Allowed then
+            if Exceptions_OK then
+               Blk_Stmts := New_List;
+            else
+               Blk_Stmts := Stmts;
+            end if;
+
+            Append_To (Blk_Stmts, Build_Runtime_Call (Loc, RE_Abort_Defer));
+
+         --  Otherwise aborts are not allowed. All generated code is added
+         --  directly to the input list.
+
+         else
+            Blk_Stmts := Stmts;
          end if;
 
-         Finalization_Done := True;
+         --  Initialize the record component. Generate:
 
-         --  Determine the external finalization list. It is either the
-         --  finalization list of the outer-scope or the one coming from an
-         --  outer aggregate. When the target is not a temporary, the proper
-         --  scope is the scope of the target rather than the potentially
-         --  transient current scope.
+         --    Rec_Comp := Init_Expr;
 
-         if Is_Controlled (Typ) and then Ancestor_Is_Subtype_Mark then
-            Ref := Convert_To (Init_Typ, New_Copy_Tree (Target));
-            Set_Assignment_OK (Ref);
+         --  Note that the initialization expression is NOT replicated because
+         --  only a single component may be initialized by it.
 
-            Append_To (L,
-              Make_Procedure_Call_Statement (Loc,
-                Name                   =>
-                  New_Occurrence_Of
-                    (Find_Prim_Op (Init_Typ, Name_Initialize), Loc),
-                Parameter_Associations => New_List (New_Copy_Tree (Ref))));
+         Init_Stmt :=
+           Make_OK_Assignment_Statement (Loc,
+             Name       => New_Copy_Tree (Rec_Comp),
+             Expression => Init_Expr);
+         Set_No_Ctrl_Actions (Init_Stmt);
+
+         Append_To (Blk_Stmts, Init_Stmt);
+
+         --  Adjust the tag due to a possible view conversion. Generate:
+
+         --    Rec_Comp._tag := Full_TypeP;
+
+         if Tagged_Type_Expansion and then Is_Tagged_Type (Comp_Typ) then
+            Append_To (Blk_Stmts,
+              Make_OK_Assignment_Statement (Loc,
+                Name       =>
+                  Make_Selected_Component (Loc,
+                    Prefix        => New_Copy_Tree (Rec_Comp),
+                    Selector_Name =>
+                      New_Occurrence_Of
+                        (First_Tag_Component (Full_Typ), Loc)),
+
+                Expression =>
+                  Unchecked_Convert_To (RTE (RE_Tag),
+                    New_Occurrence_Of
+                      (Node (First_Elmt (Access_Disp_Table (Full_Typ))),
+                       Loc))));
          end if;
-      end Generate_Finalization_Actions;
 
-      function Rewrite_Discriminant (Expr : Node_Id) return Traverse_Result;
-      --  If default expression of a component mentions a discriminant of the
-      --  type, it must be rewritten as the discriminant of the target object.
+         --  Adjust the component. Generate:
 
-      function Replace_Type (Expr : Node_Id) return Traverse_Result;
-      --  If the aggregate contains a self-reference, traverse each expression
-      --  to replace a possible self-reference with a reference to the proper
-      --  component of the target of the assignment.
+         --    [Deep_]Adjust (Rec_Comp);
 
-      --------------------------
-      -- Rewrite_Discriminant --
-      --------------------------
+         if Finalization_OK and then not Is_Limited_Type (Comp_Typ) then
+            Append_To (Blk_Stmts,
+              Make_Adjust_Call
+                (Obj_Ref => New_Copy_Tree (Rec_Comp),
+                 Typ     => Comp_Typ));
+         end if;
 
-      function Rewrite_Discriminant (Expr : Node_Id) return Traverse_Result is
-      begin
-         if Is_Entity_Name (Expr)
-           and then Present (Entity (Expr))
-           and then Ekind (Entity (Expr)) = E_In_Parameter
-           and then Present (Discriminal_Link (Entity (Expr)))
-           and then Scope (Discriminal_Link (Entity (Expr))) =
-                                                       Base_Type (Etype (N))
-         then
-            Rewrite (Expr,
-              Make_Selected_Component (Loc,
-                Prefix        => New_Copy_Tree (Lhs),
-                Selector_Name => Make_Identifier (Loc, Chars (Expr))));
+         --  Complete the protection of the initialization statements
+
+         if Finalization_OK and Abort_Allowed then
+
+            --  Wrap the initialization statements in a block to catch a
+            --  potential exception. Generate:
+
+            --    begin
+            --       Abort_Defer;
+            --       Rec_Comp := Init_Expr;
+            --       Rec_Comp._tag := Full_TypP;
+            --       [Deep_]Adjust (Rec_Comp);
+            --    at end
+            --       Abort_Undefer_Direct;
+            --    end;
+
+            if Exceptions_OK then
+               Append_To (Stmts,
+                 Build_Abort_Undefer_Block (Loc,
+                   Stmts   => Blk_Stmts,
+                   Context => N));
+
+            --  Otherwise exceptions are not propagated. Generate:
+
+            --    Abort_Defer;
+            --    Rec_Comp := Init_Expr;
+            --    Rec_Comp._tag := Full_TypP;
+            --    [Deep_]Adjust (Rec_Comp);
+            --    Abort_Undefer;
+
+            else
+               Append_To (Blk_Stmts,
+                 Build_Runtime_Call (Loc, RE_Abort_Undefer));
+            end if;
          end if;
+      end Initialize_Record_Component;
 
-         return OK;
-      end Rewrite_Discriminant;
+      -------------------------
+      -- Is_Int_Range_Bounds --
+      -------------------------
+
+      function Is_Int_Range_Bounds (Bounds : Node_Id) return Boolean is
+      begin
+         return Nkind (Bounds) = N_Range
+           and then Nkind (Low_Bound  (Bounds)) = N_Integer_Literal
+           and then Nkind (High_Bound (Bounds)) = N_Integer_Literal;
+      end Is_Int_Range_Bounds;
 
       ------------------
       -- Replace_Type --
@@ -2511,12 +2999,34 @@ package body Exp_Aggr is
          return OK;
       end Replace_Type;
 
-      procedure Replace_Self_Reference is
-        new Traverse_Proc (Replace_Type);
+      --------------------------
+      -- Rewrite_Discriminant --
+      --------------------------
+
+      function Rewrite_Discriminant (Expr : Node_Id) return Traverse_Result is
+      begin
+         if Is_Entity_Name (Expr)
+           and then Present (Entity (Expr))
+           and then Ekind (Entity (Expr)) = E_In_Parameter
+           and then Present (Discriminal_Link (Entity (Expr)))
+           and then Scope (Discriminal_Link (Entity (Expr))) =
+                                                       Base_Type (Etype (N))
+         then
+            Rewrite (Expr,
+              Make_Selected_Component (Loc,
+                Prefix        => New_Copy_Tree (Lhs),
+                Selector_Name => Make_Identifier (Loc, Chars (Expr))));
+         end if;
+
+         return OK;
+      end Rewrite_Discriminant;
 
       procedure Replace_Discriminants is
         new Traverse_Proc (Rewrite_Discriminant);
 
+      procedure Replace_Self_Reference is
+        new Traverse_Proc (Replace_Type);
+
    --  Start of processing for Build_Record_Aggr_Code
 
    begin
@@ -3103,57 +3613,61 @@ package body Exp_Aggr is
                           Ctype       => Component_Type (Expr_Q_Type),
                           Index       => First_Index (Expr_Q_Type),
                           Into        => Comp_Expr,
-                          Scalar_Comp => Is_Scalar_Type
-                                           (Component_Type (Expr_Q_Type))));
+                          Scalar_Comp =>
+                            Is_Scalar_Type (Component_Type (Expr_Q_Type))));
                   end;
 
                else
-                  Instr :=
-                    Make_OK_Assignment_Statement (Loc,
-                      Name       => Comp_Expr,
-                      Expression => Expr_Q);
-
-                  Set_No_Ctrl_Actions (Instr);
-                  Append_To (L, Instr);
-               end if;
-
-               --  Adjust the tag if tagged (because of possible view
-               --  conversions), unless compiling for a VM where tags are
-               --  implicit.
-
-               --    tmp.comp._tag := comp_typ'tag;
-
-               if Is_Tagged_Type (Comp_Type)
-                 and then Tagged_Type_Expansion
-               then
-                  Instr :=
-                    Make_OK_Assignment_Statement (Loc,
-                      Name =>
-                        Make_Selected_Component (Loc,
-                          Prefix =>  New_Copy_Tree (Comp_Expr),
-                          Selector_Name =>
-                            New_Occurrence_Of
-                              (First_Tag_Component (Comp_Type), Loc)),
-
-                      Expression =>
-                        Unchecked_Convert_To (RTE (RE_Tag),
-                          New_Occurrence_Of
-                            (Node (First_Elmt (Access_Disp_Table (Comp_Type))),
-                             Loc)));
-
-                  Append_To (L, Instr);
-               end if;
+                  --  Handle an initialization expression of a controlled type
+                  --  in case it denotes a function call. In general such a
+                  --  scenario will produce a transient scope, but this will
+                  --  lead to wrong order of initialization, adjustment, and
+                  --  finalization in the context of aggregates.
+
+                  --    Target.Comp := Ctrl_Func_Call;
+
+                  --    begin                                  --  scope
+                  --       Trans_Obj : ... := Ctrl_Func_Call;  --  object
+                  --       Target.Comp := Trans_Obj;
+                  --       Finalize (Trans_Obj);
+                  --    end
+                  --    Target.Comp._tag := ...;
+                  --    Adjust (Target.Comp);
+
+                  --  In the example above, the call to Finalize occurs too
+                  --  early and as a result it may leave the record component
+                  --  in a bad state. Finalization of the transient object
+                  --  should really happen after adjustment.
+
+                  --  To avoid this scenario, perform in-place side-effect
+                  --  removal of the function call. This eliminates the
+                  --  transient property of the function result and ensures
+                  --  correct order of actions.
+
+                  --    Res : ... := Ctrl_Func_Call;
+                  --    Target.Comp := Res;
+                  --    Target.Comp._tag := ...;
+                  --    Adjust (Target.Comp);
+                  --    Finalize (Res);
+
+                  if Needs_Finalization (Comp_Type)
+                    and then Nkind (Expr_Q) /= N_Aggregate
+                  then
+                     Initialize_Ctrl_Record_Component
+                       (Rec_Comp   => Comp_Expr,
+                        Comp_Typ   => Etype (Selector),
+                        Init_Expr  => Expr_Q,
+                        Stmts      => L);
 
-               --  Generate:
-               --    Adjust (tmp.comp);
+                  --  Otherwise perform single component initialization
 
-               if Needs_Finalization (Comp_Type)
-                 and then not Is_Limited_Type (Comp_Type)
-               then
-                  Append_To (L,
-                    Make_Adjust_Call
-                      (Obj_Ref => New_Copy_Tree (Comp_Expr),
-                       Typ     => Comp_Type));
+                  else
+                     Initialize_Record_Component
+                       (Rec_Comp  => Comp_Expr,
+                        Comp_Typ  => Etype (Selector),
+                        Init_Expr => Expr_Q,
+                        Stmts     => L);
+                  end if;
                end if;
             end if;
 
@@ -3557,19 +4071,17 @@ package body Exp_Aggr is
          --  case the current delayed expansion mechanism doesn't work when
          --  the declared object size depend on the initializing expr.
 
-         begin
-            Parent_Node := Parent (Parent_Node);
-            Parent_Kind := Nkind (Parent_Node);
+         Parent_Node := Parent (Parent_Node);
+         Parent_Kind := Nkind (Parent_Node);
 
-            if Parent_Kind = N_Object_Declaration then
-               Unc_Decl :=
-                 not Is_Entity_Name (Object_Definition (Parent_Node))
-                   or else Has_Discriminants
-                             (Entity (Object_Definition (Parent_Node)))
-                   or else Is_Class_Wide_Type
-                             (Entity (Object_Definition (Parent_Node)));
-            end if;
-         end;
+         if Parent_Kind = N_Object_Declaration then
+            Unc_Decl :=
+              not Is_Entity_Name (Object_Definition (Parent_Node))
+                or else Has_Discriminants
+                          (Entity (Object_Definition (Parent_Node)))
+                or else Is_Class_Wide_Type
+                          (Entity (Object_Definition (Parent_Node)));
+         end if;
       end if;
 
       --  Just set the Delay flag in the cases where the transformation will be
@@ -3623,13 +4135,14 @@ package body Exp_Aggr is
       --  the target of the assignment must not be declared within a local
       --  block, and because cleanup will take place on return from the
       --  initialization procedure.
+
       --  Should the condition be more restrictive ???
 
       if Requires_Transient_Scope (Typ) and then not Inside_Init_Proc then
          Establish_Transient_Scope (N, Sec_Stack => Needs_Finalization (Typ));
       end if;
 
-      --  If the aggregate is non-limited, create a temporary. If it is limited
+      --  If the aggregate is nonlimited, create a temporary. If it is limited
       --  and context is an assignment, this is a subaggregate for an enclosing
       --  aggregate being expanded. It must be built in place, so use target of
       --  the current assignment.
@@ -7160,176 +7673,284 @@ package body Exp_Aggr is
       end if;
    end Must_Slide;
 
-   ----------------------------------
-   -- Two_Dim_Packed_Array_Handled --
-   ----------------------------------
+   ---------------------------------
+   -- Process_Transient_Component --
+   ---------------------------------
 
-   function Two_Dim_Packed_Array_Handled (N : Node_Id) return Boolean is
-      Loc          : constant Source_Ptr := Sloc (N);
-      Typ          : constant Entity_Id  := Etype (N);
-      Ctyp         : constant Entity_Id  := Component_Type (Typ);
-      Comp_Size    : constant Int        := UI_To_Int (Component_Size (Typ));
-      Packed_Array : constant Entity_Id  :=
-                       Packed_Array_Impl_Type (Base_Type (Typ));
+   procedure Process_Transient_Component
+     (Loc        : Source_Ptr;
+      Comp_Typ   : Entity_Id;
+      Init_Expr  : Node_Id;
+      Fin_Call   : out Node_Id;
+      Hook_Clear : out Node_Id;
+      Aggr       : Node_Id := Empty;
+      Stmts      : List_Id := No_List)
+   is
+      procedure Add_Item (Item : Node_Id);
+      --  Insert arbitrary node Item into the tree depending on the values of
+      --  Aggr and Stmts.
 
-      One_Comp : Node_Id;
-      --  Expression in original aggregate
+      --------------
+      -- Add_Item --
+      --------------
 
-      One_Dim : Node_Id;
-      --  One-dimensional subaggregate
+      procedure Add_Item (Item : Node_Id) is
+      begin
+         if Present (Aggr) then
+            Insert_Action (Aggr, Item);
+         else
+            pragma Assert (Present (Stmts));
+            Append_To (Stmts, Item);
+         end if;
+      end Add_Item;
+
+      --  Local variables
+
+      Hook_Assign : Node_Id;
+      Hook_Decl   : Node_Id;
+      Ptr_Decl    : Node_Id;
+      Res_Decl    : Node_Id;
+      Res_Id      : Entity_Id;
+      Res_Typ     : Entity_Id;
+
+   --  Start of processing for Process_Transient_Component
 
    begin
+      --  Add the access type, which provides a reference to the function
+      --  result. Generate:
 
-      --  For now, only deal with cases where an integral number of elements
-      --  fit in a single byte. This includes the most common boolean case.
+      --    type Res_Typ is access all Comp_Typ;
 
-      if not (Comp_Size = 1 or else
-              Comp_Size = 2 or else
-              Comp_Size = 4)
-      then
-         return False;
-      end if;
+      Res_Typ := Make_Temporary (Loc, 'A');
+      Set_Ekind (Res_Typ, E_General_Access_Type);
+      Set_Directly_Designated_Type (Res_Typ, Comp_Typ);
 
-      Convert_To_Positional
-        (N, Max_Others_Replicate => 64, Handle_Bit_Packed => True);
+      Add_Item
+        (Make_Full_Type_Declaration (Loc,
+           Defining_Identifier => Res_Typ,
+           Type_Definition     =>
+             Make_Access_To_Object_Definition (Loc,
+               All_Present        => True,
+               Subtype_Indication => New_Occurrence_Of (Comp_Typ, Loc))));
 
-      --  Verify that all components are static
+      --  Add the temporary which captures the result of the function call.
+      --  Generate:
 
-      if Nkind (N) = N_Aggregate
-        and then Compile_Time_Known_Aggregate (N)
-      then
-         null;
+      --    Res : constant Res_Typ := Init_Expr'Reference;
 
-      --  The aggregate may have been re-analyzed and converted already
+      --  Note that this temporary is effectively a transient object because
+      --  its lifetime is bounded by the current array or record component.
 
-      elsif Nkind (N) /= N_Aggregate then
-         return True;
+      Res_Id := Make_Temporary (Loc, 'R');
+      Set_Ekind (Res_Id, E_Constant);
+      Set_Etype (Res_Id, Res_Typ);
 
-      --  If component associations remain, the aggregate is not static
+      --  Mark the transient object as successfully processed to avoid double
+      --  finalization.
 
-      elsif Present (Component_Associations (N)) then
-         return False;
+      Set_Is_Finalized_Transient (Res_Id);
 
-      else
-         One_Dim := First (Expressions (N));
-         while Present (One_Dim) loop
-            if Present (Component_Associations (One_Dim)) then
-               return False;
-            end if;
+      --  Signal the general finalization machinery that this transient object
+      --  should not be considered for finalization actions because its cleanup
+      --  will be performed by Process_Transient_Component_Completion.
 
-            One_Comp := First (Expressions (One_Dim));
-            while Present (One_Comp) loop
-               if not Is_OK_Static_Expression (One_Comp) then
-                  return False;
-               end if;
+      Set_Is_Ignored_Transient (Res_Id);
 
-               Next (One_Comp);
-            end loop;
+      Res_Decl :=
+        Make_Object_Declaration (Loc,
+          Defining_Identifier => Res_Id,
+          Constant_Present    => True,
+          Object_Definition   => New_Occurrence_Of (Res_Typ, Loc),
+          Expression          =>
+            Make_Reference (Loc, New_Copy_Tree (Init_Expr)));
 
-            Next (One_Dim);
-         end loop;
-      end if;
+      Add_Item (Res_Decl);
 
-      --  Two-dimensional aggregate is now fully positional so pack one
-      --  dimension to create a static one-dimensional array, and rewrite
-      --  as an unchecked conversion to the original type.
+      --  Construct all pieces necessary to hook and finalize the transient
+      --  result.
 
-      declare
-         Byte_Size : constant Int := UI_To_Int (Component_Size (Packed_Array));
-         --  The packed array type is a byte array
+      Build_Transient_Object_Statements
+        (Obj_Decl    => Res_Decl,
+         Fin_Call    => Fin_Call,
+         Hook_Assign => Hook_Assign,
+         Hook_Clear  => Hook_Clear,
+         Hook_Decl   => Hook_Decl,
+         Ptr_Decl    => Ptr_Decl);
 
-         Packed_Num : Nat;
-         --  Number of components accumulated in current byte
+      --  Add the access type which provides a reference to the transient
+      --  result. Generate:
 
-         Comps : List_Id;
-         --  Assembled list of packed values for equivalent aggregate
+      --    type Ptr_Typ is access all Comp_Typ;
 
-         Comp_Val : Uint;
-         --  integer value of component
+      Add_Item (Ptr_Decl);
 
-         Incr : Int;
-         --  Step size for packing
+      --  Add the temporary which acts as a hook to the transient result.
+      --  Generate:
 
-         Init_Shift : Int;
-         --  Endian-dependent start position for packing
+      --    Hook : Ptr_Typ := null;
 
-         Shift : Int;
-         --  Current insertion position
+      Add_Item (Hook_Decl);
 
-         Val : Int;
-         --  Component of packed array being assembled.
+      --  Attach the transient result to the hook. Generate:
 
-      begin
-         Comps := New_List;
-         Val   := 0;
-         Packed_Num := 0;
+      --    Hook := Ptr_Typ (Res);
 
-         --  Account for endianness.  See corresponding comment in
-         --  Packed_Array_Aggregate_Handled concerning the following.
+      Add_Item (Hook_Assign);
 
-         if Bytes_Big_Endian
-           xor Debug_Flag_8
-           xor Reverse_Storage_Order (Base_Type (Typ))
-         then
-            Init_Shift := Byte_Size - Comp_Size;
-            Incr := -Comp_Size;
-         else
-            Init_Shift := 0;
-            Incr := +Comp_Size;
-         end if;
+      --  The original initialization expression now references the value of
+      --  the temporary function result. Generate:
 
-         --  Iterate over each subaggregate
+      --    Res.all
 
-         Shift := Init_Shift;
-         One_Dim := First (Expressions (N));
-         while Present (One_Dim) loop
-            One_Comp := First (Expressions (One_Dim));
-            while Present (One_Comp) loop
-               if Packed_Num = Byte_Size / Comp_Size then
+      Rewrite (Init_Expr,
+        Make_Explicit_Dereference (Loc,
+          Prefix => New_Occurrence_Of (Res_Id, Loc)));
+   end Process_Transient_Component;
 
-                  --  Byte is complete, add to list of expressions
+   --------------------------------------------
+   -- Process_Transient_Component_Completion --
+   --------------------------------------------
 
-                  Append (Make_Integer_Literal (Sloc (One_Dim), Val), Comps);
-                  Val := 0;
-                  Shift := Init_Shift;
-                  Packed_Num := 0;
+   procedure Process_Transient_Component_Completion
+     (Loc        : Source_Ptr;
+      Aggr       : Node_Id;
+      Fin_Call   : Node_Id;
+      Hook_Clear : Node_Id;
+      Stmts      : List_Id)
+   is
+      Exceptions_OK : constant Boolean :=
+                        not Restriction_Active (No_Exception_Propagation);
 
-               else
-                  Comp_Val := Expr_Rep_Value (One_Comp);
+   begin
+      pragma Assert (Present (Fin_Call));
+      pragma Assert (Present (Hook_Clear));
 
-                  --  Adjust for bias, and strip proper number of bits
+      --  Generate the following code if exception propagation is allowed:
 
-                  if Has_Biased_Representation (Ctyp) then
-                     Comp_Val := Comp_Val - Expr_Value (Type_Low_Bound (Ctyp));
-                  end if;
+      --    declare
+      --       Abort : constant Boolean := Triggered_By_Abort;
+      --         <or>
+      --       Abort : constant Boolean := False;  --  no abort
 
-                  Comp_Val := Comp_Val mod Uint_2 ** Comp_Size;
-                  Val := UI_To_Int (Val + Comp_Val * Uint_2 ** Shift);
-                  Shift := Shift + Incr;
-                  One_Comp := Next (One_Comp);
-                  Packed_Num := Packed_Num + 1;
-               end if;
-            end loop;
+      --       E      : Exception_Occurrence;
+      --       Raised : Boolean := False;
 
-            One_Dim := Next (One_Dim);
-         end loop;
+      --    begin
+      --       [Abort_Defer;]
 
-         if Packed_Num > 0 then
+      --       begin
+      --          Hook := null;
+      --          [Deep_]Finalize (Res.all);
 
-            --  Add final incomplete byte if present
+      --       exception
+      --          when others =>
+      --             if not Raised then
+      --                Raised := True;
+      --                Save_Occurrence (E,
+      --                  Get_Curent_Excep.all.all);
+      --             end if;
+      --       end;
 
-            Append (Make_Integer_Literal (Sloc (One_Dim), Val), Comps);
-         end if;
+      --       [Abort_Undefer;]
 
-         Rewrite (N,
-             Unchecked_Convert_To (Typ,
-               Make_Qualified_Expression (Loc,
-                 Subtype_Mark => New_Occurrence_Of (Packed_Array, Loc),
-                 Expression   => Make_Aggregate (Loc, Expressions => Comps))));
-         Analyze_And_Resolve (N);
-         return True;
-      end;
-   end Two_Dim_Packed_Array_Handled;
+      --       if Raised and then not Abort then
+      --          Raise_From_Controlled_Operation (E);
+      --       end if;
+      --    end;
+
+      if Exceptions_OK then
+         Abort_And_Exception : declare
+            Blk_Decls : constant List_Id := New_List;
+            Blk_Stmts : constant List_Id := New_List;
+
+            Fin_Data : Finalization_Exception_Data;
+
+         begin
+            --  Create the declarations of the two flags and the exception
+            --  occurrence.
+
+            Build_Object_Declarations (Fin_Data, Blk_Decls, Loc);
+
+            --  Generate:
+            --    Abort_Defer;
+
+            if Abort_Allowed then
+               Append_To (Blk_Stmts,
+                 Build_Runtime_Call (Loc, RE_Abort_Defer));
+            end if;
+
+            --  Wrap the hook clear and the finalization call in order to trap
+            --  a potential exception.
+
+            Append_To (Blk_Stmts,
+              Make_Block_Statement (Loc,
+                Handled_Statement_Sequence =>
+                  Make_Handled_Sequence_Of_Statements (Loc,
+                    Statements         => New_List (
+                      Hook_Clear,
+                      Fin_Call),
+                    Exception_Handlers => New_List (
+                      Build_Exception_Handler (Fin_Data)))));
+
+            --  Generate:
+            --    Abort_Undefer;
+
+            if Abort_Allowed then
+               Append_To (Blk_Stmts,
+                 Build_Runtime_Call (Loc, RE_Abort_Undefer));
+            end if;
+
+            --  Reraise the potential exception with a proper "upgrade" to
+            --  Program_Error if needed.
+
+            Append_To (Blk_Stmts, Build_Raise_Statement (Fin_Data));
+
+            --  Wrap everything in a block
+
+            Append_To (Stmts,
+              Make_Block_Statement (Loc,
+                Declarations               => Blk_Decls,
+                Handled_Statement_Sequence =>
+                  Make_Handled_Sequence_Of_Statements (Loc,
+                    Statements => Blk_Stmts)));
+         end Abort_And_Exception;
+
+      --  Generate the following code if exception propagation is not allowed
+      --  and aborts are allowed:
+
+      --    begin
+      --       Abort_Defer;
+      --       Hook := null;
+      --       [Deep_]Finalize (Res.all);
+      --    at end
+      --       Abort_Undefer_Direct;
+      --    end;
+
+      elsif Abort_Allowed then
+         Abort_Only : declare
+            Blk_Stmts : constant List_Id := New_List;
+
+         begin
+            Append_To (Blk_Stmts, Build_Runtime_Call (Loc, RE_Abort_Defer));
+            Append_To (Blk_Stmts, Hook_Clear);
+            Append_To (Blk_Stmts, Fin_Call);
+
+            Append_To (Stmts,
+              Build_Abort_Undefer_Block (Loc,
+                Stmts   => Blk_Stmts,
+                Context => Aggr));
+         end Abort_Only;
+
+      --  Otherwise generate:
+
+      --    Hook := null;
+      --    [Deep_]Finalize (Res.all);
+
+      else
+         Append_To (Stmts, Hook_Clear);
+         Append_To (Stmts, Fin_Call);
+      end if;
+   end Process_Transient_Component_Completion;
 
    ---------------------
    -- Sort_Case_Table --
@@ -7477,4 +8098,175 @@ package body Exp_Aggr is
       end if;
    end Static_Array_Aggregate;
 
+   ----------------------------------
+   -- Two_Dim_Packed_Array_Handled --
+   ----------------------------------
+
+   function Two_Dim_Packed_Array_Handled (N : Node_Id) return Boolean is
+      Loc          : constant Source_Ptr := Sloc (N);
+      Typ          : constant Entity_Id  := Etype (N);
+      Ctyp         : constant Entity_Id  := Component_Type (Typ);
+      Comp_Size    : constant Int        := UI_To_Int (Component_Size (Typ));
+      Packed_Array : constant Entity_Id  :=
+                       Packed_Array_Impl_Type (Base_Type (Typ));
+
+      One_Comp : Node_Id;
+      --  Expression in original aggregate
+
+      One_Dim : Node_Id;
+      --  One-dimensional subaggregate
+
+   begin
+
+      --  For now, only deal with cases where an integral number of elements
+      --  fit in a single byte. This includes the most common boolean case.
+
+      if not (Comp_Size = 1 or else
+              Comp_Size = 2 or else
+              Comp_Size = 4)
+      then
+         return False;
+      end if;
+
+      Convert_To_Positional
+        (N, Max_Others_Replicate => 64, Handle_Bit_Packed => True);
+
+      --  Verify that all components are static
+
+      if Nkind (N) = N_Aggregate
+        and then Compile_Time_Known_Aggregate (N)
+      then
+         null;
+
+      --  The aggregate may have been reanalyzed and converted already
+
+      elsif Nkind (N) /= N_Aggregate then
+         return True;
+
+      --  If component associations remain, the aggregate is not static
+
+      elsif Present (Component_Associations (N)) then
+         return False;
+
+      else
+         One_Dim := First (Expressions (N));
+         while Present (One_Dim) loop
+            if Present (Component_Associations (One_Dim)) then
+               return False;
+            end if;
+
+            One_Comp := First (Expressions (One_Dim));
+            while Present (One_Comp) loop
+               if not Is_OK_Static_Expression (One_Comp) then
+                  return False;
+               end if;
+
+               Next (One_Comp);
+            end loop;
+
+            Next (One_Dim);
+         end loop;
+      end if;
+
+      --  Two-dimensional aggregate is now fully positional so pack one
+      --  dimension to create a static one-dimensional array, and rewrite
+      --  as an unchecked conversion to the original type.
+
+      declare
+         Byte_Size : constant Int := UI_To_Int (Component_Size (Packed_Array));
+         --  The packed array type is a byte array
+
+         Packed_Num : Nat;
+         --  Number of components accumulated in current byte
+
+         Comps : List_Id;
+         --  Assembled list of packed values for equivalent aggregate
+
+         Comp_Val : Uint;
+         --  Integer value of component
+
+         Incr : Int;
+         --  Step size for packing
+
+         Init_Shift : Int;
+         --  Endian-dependent start position for packing
+
+         Shift : Int;
+         --  Current insertion position
+
+         Val : Int;
+         --  Component of packed array being assembled
+
+      begin
+         Comps := New_List;
+         Val   := 0;
+         Packed_Num := 0;
+
+         --  Account for endianness.  See corresponding comment in
+         --  Packed_Array_Aggregate_Handled concerning the following.
+
+         if Bytes_Big_Endian
+           xor Debug_Flag_8
+           xor Reverse_Storage_Order (Base_Type (Typ))
+         then
+            Init_Shift := Byte_Size - Comp_Size;
+            Incr := -Comp_Size;
+         else
+            Init_Shift := 0;
+            Incr := +Comp_Size;
+         end if;
+
+         --  Iterate over each subaggregate
+
+         Shift := Init_Shift;
+         One_Dim := First (Expressions (N));
+         while Present (One_Dim) loop
+            One_Comp := First (Expressions (One_Dim));
+            while Present (One_Comp) loop
+               if Packed_Num = Byte_Size / Comp_Size then
+
+                  --  Byte is complete, add to list of expressions
+
+                  Append (Make_Integer_Literal (Sloc (One_Dim), Val), Comps);
+                  Val := 0;
+                  Shift := Init_Shift;
+                  Packed_Num := 0;
+
+               else
+                  Comp_Val := Expr_Rep_Value (One_Comp);
+
+                  --  Adjust for bias, and strip proper number of bits
+
+                  if Has_Biased_Representation (Ctyp) then
+                     Comp_Val := Comp_Val - Expr_Value (Type_Low_Bound (Ctyp));
+                  end if;
+
+                  Comp_Val := Comp_Val mod Uint_2 ** Comp_Size;
+                  Val := UI_To_Int (Val + Comp_Val * Uint_2 ** Shift);
+                  Shift := Shift + Incr;
+                  One_Comp := Next (One_Comp);
+                  Packed_Num := Packed_Num + 1;
+               end if;
+            end loop;
+
+            One_Dim := Next (One_Dim);
+         end loop;
+
+         if Packed_Num > 0 then
+
+            --  Add final incomplete byte if present
+
+            Append (Make_Integer_Literal (Sloc (One_Dim), Val), Comps);
+         end if;
+
+         Rewrite (N,
+             Unchecked_Convert_To (Typ,
+               Make_Qualified_Expression (Loc,
+                 Subtype_Mark => New_Occurrence_Of (Packed_Array, Loc),
+                 Expression   => Make_Aggregate (Loc, Expressions => Comps))));
+         Analyze_And_Resolve (N);
+         return True;
+      end;
+   end Two_Dim_Packed_Array_Handled;
+
 end Exp_Aggr;
diff --git a/gcc/ada/exp_attr.adb b/gcc/ada/exp_attr.adb
index 6c5f3b5e7c5..04929b5aa57 100644
--- a/gcc/ada/exp_attr.adb
+++ b/gcc/ada/exp_attr.adb
@@ -3007,50 +3007,57 @@ package body Exp_Attr is
       -- Enum_Rep --
       --------------
 
-      when Attribute_Enum_Rep => Enum_Rep :
-      begin
-         --  X'Enum_Rep (Y) expands to
-
-         --    target-type (Y)
+      when Attribute_Enum_Rep => Enum_Rep : declare
+         Expr : Node_Id;
 
-         --  This is simply a direct conversion from the enumeration type to
-         --  the target integer type, which is treated by the back end as a
-         --  normal integer conversion, treating the enumeration type as an
-         --  integer, which is exactly what we want. We set Conversion_OK to
-         --  make sure that the analyzer does not complain about what otherwise
-         --  might be an illegal conversion.
+      begin
+         --  Get the expression, which is X for Enum_Type'Enum_Rep (X) or
+         --  X'Enum_Rep.
 
          if Is_Non_Empty_List (Exprs) then
-            Rewrite (N,
-              OK_Convert_To (Typ, Relocate_Node (First (Exprs))));
+            Expr := First (Exprs);
+         else
+            Expr := Pref;
+         end if;
 
-         --  X'Enum_Rep where X is an enumeration literal is replaced by
-         --  the literal value.
+         --  If the expression is an enumeration literal, it is replaced by the
+         --  literal value.
 
-         elsif Ekind (Entity (Pref)) = E_Enumeration_Literal then
+         if Nkind (Expr) in N_Has_Entity
+           and then Ekind (Entity (Expr)) = E_Enumeration_Literal
+         then
             Rewrite (N,
-              Make_Integer_Literal (Loc, Enumeration_Rep (Entity (Pref))));
+              Make_Integer_Literal (Loc, Enumeration_Rep (Entity (Expr))));
 
          --  If this is a renaming of a literal, recover the representation
-         --  of the original. If it renames an expression there is nothing
-         --  to fold.
-
-         elsif Ekind (Entity (Pref)) = E_Constant
-           and then Present (Renamed_Object (Entity (Pref)))
-           and then Is_Entity_Name (Renamed_Object (Entity (Pref)))
-           and then Ekind (Entity (Renamed_Object (Entity (Pref)))) =
+         --  of the original. If it renames an expression there is nothing to
+         --  fold.
+
+         elsif Nkind (Expr) in N_Has_Entity
+           and then Ekind (Entity (Expr)) = E_Constant
+           and then Present (Renamed_Object (Entity (Expr)))
+           and then Is_Entity_Name (Renamed_Object (Entity (Expr)))
+           and then Ekind (Entity (Renamed_Object (Entity (Expr)))) =
                       E_Enumeration_Literal
          then
             Rewrite (N,
               Make_Integer_Literal (Loc,
-                Enumeration_Rep (Entity (Renamed_Object (Entity (Pref))))));
+                Enumeration_Rep (Entity (Renamed_Object (Entity (Expr))))));
 
-         --  X'Enum_Rep where X is an object does a direct unchecked conversion
-         --  of the object value, as described for the type case above.
+         --  If not constant-folded above, Enum_Type'Enum_Rep (X) or
+         --  X'Enum_Rep expands to
+
+         --    target-type (X)
+
+         --  This is simply a direct conversion from the enumeration type to
+         --  the target integer type, which is treated by the back end as a
+         --  normal integer conversion, treating the enumeration type as an
+         --  integer, which is exactly what we want. We set Conversion_OK to
+         --  make sure that the analyzer does not complain about what otherwise
+         --  might be an illegal conversion.
 
          else
-            Rewrite (N,
-              OK_Convert_To (Typ, Relocate_Node (Pref)));
+            Rewrite (N, OK_Convert_To (Typ, Relocate_Node (Expr)));
          end if;
 
          Set_Etype (N, Typ);
diff --git a/gcc/ada/exp_ch13.adb b/gcc/ada/exp_ch13.adb
index 11e75f37b8b..dd004a0991f 100644
--- a/gcc/ada/exp_ch13.adb
+++ b/gcc/ada/exp_ch13.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -136,9 +136,16 @@ package body Exp_Ch13 is
                --  has a delayed freeze, but the address expression itself
                --  must be elaborated at the point it appears. If the object
                --  is controlled, additional checks apply elsewhere.
+               --  If the attribute comes from an aspect specification it
+               --  is being elaborated at the freeze point and side effects
+               --  need not be removed (and shouldn't, if the expression
+               --  depends on other entities that have delayed freeze).
+               --  This is another consequence of the delayed analysis of
+               --  aspects, and a real semantic difference.
 
                elsif Nkind (Decl) = N_Object_Declaration
                  and then not Needs_Constant_Address (Decl, Typ)
+                 and then not From_Aspect_Specification (N)
                then
                   Remove_Side_Effects (Exp);
                end if;
diff --git a/gcc/ada/exp_ch3.adb b/gcc/ada/exp_ch3.adb
index 923eca373a7..6f7ae0a002b 100644
--- a/gcc/ada/exp_ch3.adb
+++ b/gcc/ada/exp_ch3.adb
@@ -34,7 +34,6 @@ with Exp_Ch4;  use Exp_Ch4;
 with Exp_Ch6;  use Exp_Ch6;
 with Exp_Ch7;  use Exp_Ch7;
 with Exp_Ch9;  use Exp_Ch9;
-with Exp_Ch11; use Exp_Ch11;
 with Exp_Dbug; use Exp_Dbug;
 with Exp_Disp; use Exp_Disp;
 with Exp_Dist; use Exp_Dist;
@@ -44,7 +43,6 @@ with Exp_Tss;  use Exp_Tss;
 with Exp_Util; use Exp_Util;
 with Freeze;   use Freeze;
 with Ghost;    use Ghost;
-with Inline;   use Inline;
 with Namet;    use Namet;
 with Nlists;   use Nlists;
 with Nmake;    use Nmake;
@@ -5519,16 +5517,12 @@ package body Exp_Ch3 is
          Exceptions_OK : constant Boolean :=
                            not Restriction_Active (No_Exception_Propagation);
 
-         Abrt_Blk    : Node_Id;
-         Abrt_Blk_Id : Entity_Id;
-         Abrt_HSS    : Node_Id;
-         Aggr_Init   : Node_Id;
-         AUD         : Entity_Id;
-         Comp_Init   : List_Id := No_List;
-         Fin_Call    : Node_Id;
-         Init_Stmts  : List_Id := No_List;
-         Obj_Init    : Node_Id := Empty;
-         Obj_Ref     : Node_Id;
+         Aggr_Init  : Node_Id;
+         Comp_Init  : List_Id := No_List;
+         Fin_Call   : Node_Id;
+         Init_Stmts : List_Id := No_List;
+         Obj_Init   : Node_Id := Empty;
+         Obj_Ref    : Node_Id;
 
       --  Start of processing for Default_Initialize_Object
 
@@ -5726,26 +5720,10 @@ package body Exp_Ch3 is
             --    end;
 
             if Exceptions_OK then
-               AUD := RTE (RE_Abort_Undefer_Direct);
-
-               Abrt_HSS :=
-                 Make_Handled_Sequence_Of_Statements (Loc,
-                   Statements  => Init_Stmts,
-                   At_End_Proc => New_Occurrence_Of (AUD, Loc));
-
-               Abrt_Blk :=
-                 Make_Block_Statement (Loc,
-                   Handled_Statement_Sequence => Abrt_HSS);
-
-               Add_Block_Identifier  (Abrt_Blk, Abrt_Blk_Id);
-               Expand_At_End_Handler (Abrt_HSS, Abrt_Blk_Id);
-
-               --  Present the Abort_Undefer_Direct function to the backend so
-               --  that it can inline the call to the function.
-
-               Add_Inlined_Body (AUD, N);
-
-               Init_Stmts := New_List (Abrt_Blk);
+               Init_Stmts := New_List (
+                 Build_Abort_Undefer_Block (Loc,
+                   Stmts   => Init_Stmts,
+                   Context => N));
 
             --  Otherwise exceptions are not propagated. Generate:
 
diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index 1cdfa1ac880..f6a5c2c9067 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -226,22 +226,21 @@ package body Exp_Ch4 is
 
    procedure Process_If_Case_Statements (N : Node_Id; Stmts : List_Id);
    --  Inspect and process statement list Stmt of if or case expression N for
-   --  transient controlled objects. If such objects are found, the routine
-   --  generates code to clean them up when the context of the expression is
-   --  evaluated or elaborated.
-
-   procedure Process_Transient_Object
-     (Decl  : Node_Id;
-      N     : Node_Id;
-      Stmts : List_Id);
+   --  transient objects. If such objects are found, the routine generates code
+   --  to clean them up when the context of the expression is evaluated.
+
+   procedure Process_Transient_In_Expression
+     (Obj_Decl : Node_Id;
+      Expr     : Node_Id;
+      Stmts    : List_Id);
    --  Subsidiary routine to the expansion of expression_with_actions, if and
    --  case expressions. Generate all necessary code to finalize a transient
-   --  controlled object when the enclosing context is elaborated or evaluated.
-   --  Decl denotes the declaration of the transient controlled object which is
-   --  usually the result of a controlled function call. N denotes the related
-   --  expression_with_actions, if expression, or case expression node. Stmts
-   --  denotes the statement list which contains Decl, either at the top level
-   --  or within a nested construct.
+   --  object when the enclosing context is elaborated or evaluated. Obj_Decl
+   --  denotes the declaration of the transient object, which is usually the
+   --  result of a controlled function call. Expr denotes the expression with
+   --  actions, if expression, or case expression node. Stmts denotes the
+   --  statement list which contains Decl, either at the top level or within a
+   --  nested construct.
 
    procedure Rewrite_Comparison (N : Node_Id);
    --  If N is the node for a comparison whose outcome can be determined at
@@ -4866,11 +4865,10 @@ package body Exp_Ch4 is
                Prepend_List (Actions (Alt), Stmts);
             end if;
 
-            --  Finalize any transient controlled objects on exit from the
-            --  alternative. This is done only in the return optimization case
-            --  because otherwise the case expression is converted into an
-            --  expression with actions which already contains this form of
-            --  processing.
+            --  Finalize any transient objects on exit from the alternative.
+            --  This is done only in the return optimization case because
+            --  otherwise the case expression is converted into an expression
+            --  with actions which already contains this form of processing.
 
             if Optimize_Return_Stmt then
                Process_If_Case_Statements (N, Stmts);
@@ -4952,9 +4950,9 @@ package body Exp_Ch4 is
 
       function Process_Action (Act : Node_Id) return Traverse_Result;
       --  Inspect and process a single action of an expression_with_actions for
-      --  transient controlled objects. If such objects are found, the routine
-      --  generates code to clean them up when the context of the expression is
-      --  evaluated or elaborated.
+      --  transient objects. If such objects are found, the routine generates
+      --  code to clean them up when the context of the expression is evaluated
+      --  or elaborated.
 
       ------------------------------
       -- Force_Boolean_Evaluation --
@@ -4997,7 +4995,7 @@ package body Exp_Ch4 is
          if Nkind (Act) = N_Object_Declaration
            and then Is_Finalizable_Transient (Act, N)
          then
-            Process_Transient_Object (Act, N, Acts);
+            Process_Transient_In_Expression (Act, N, Acts);
             return Abandon;
 
          --  Avoid processing temporary function results multiple times when
@@ -5038,8 +5036,8 @@ package body Exp_Ch4 is
          null;
 
       --  Force the evaluation of the expression by capturing its value in a
-      --  temporary. This ensures that aliases of transient controlled objects
-      --  do not leak to the expression of the expression_with_actions node:
+      --  temporary. This ensures that aliases of transient objects do not leak
+      --  to the expression of the expression_with_actions node:
 
       --    do
       --       Trans_Id : Ctrl_Typ := ...;
@@ -5059,12 +5057,12 @@ package body Exp_Ch4 is
       --    in Val end;
 
       --  Once this transformation is performed, it is safe to finalize the
-      --  transient controlled object at the end of the actions list.
+      --  transient object at the end of the actions list.
 
       --  Note that Force_Evaluation does not remove side effects in operators
       --  because it assumes that all operands are evaluated and side effect
       --  free. This is not the case when an operand depends implicitly on the
-      --  transient controlled object through the use of access types.
+      --  transient object through the use of access types.
 
       elsif Is_Boolean_Type (Etype (Expression (N))) then
          Force_Boolean_Evaluation (Expression (N));
@@ -5077,8 +5075,8 @@ package body Exp_Ch4 is
          Force_Evaluation (Expression (N));
       end if;
 
-      --  Process all transient controlled objects found within the actions of
-      --  the EWA node.
+      --  Process all transient objects found within the actions of the EWA
+      --  node.
 
       Act := First (Acts);
       while Present (Act) loop
@@ -12956,44 +12954,44 @@ package body Exp_Ch4 is
          if Nkind (Decl) = N_Object_Declaration
            and then Is_Finalizable_Transient (Decl, N)
          then
-            Process_Transient_Object (Decl, N, Stmts);
+            Process_Transient_In_Expression (Decl, N, Stmts);
          end if;
 
          Next (Decl);
       end loop;
    end Process_If_Case_Statements;
 
-   ------------------------------
-   -- Process_Transient_Object --
-   ------------------------------
+   -------------------------------------
+   -- Process_Transient_In_Expression --
+   -------------------------------------
 
-   procedure Process_Transient_Object
-     (Decl  : Node_Id;
-      N     : Node_Id;
-      Stmts : List_Id)
+   procedure Process_Transient_In_Expression
+     (Obj_Decl : Node_Id;
+      Expr     : Node_Id;
+      Stmts    : List_Id)
    is
-      Loc     : constant Source_Ptr := Sloc (Decl);
-      Obj_Id  : constant Entity_Id  := Defining_Identifier (Decl);
-      Obj_Typ : constant Node_Id    := Etype (Obj_Id);
+      Loc    : constant Source_Ptr := Sloc (Obj_Decl);
+      Obj_Id : constant Entity_Id  := Defining_Identifier (Obj_Decl);
 
-      Desig_Typ   : Entity_Id;
-      Expr        : Node_Id;
-      Hook_Id     : Entity_Id;
-      Hook_Insert : Node_Id;
-      Ptr_Id      : Entity_Id;
-
-      Hook_Context : constant Node_Id := Find_Hook_Context (N);
+      Hook_Context : constant Node_Id := Find_Hook_Context (Expr);
       --  The node on which to insert the hook as an action. This is usually
       --  the innermost enclosing non-transient construct.
 
+      Fin_Call    : Node_Id;
+      Hook_Assign : Node_Id;
+      Hook_Clear  : Node_Id;
+      Hook_Decl   : Node_Id;
+      Hook_Insert : Node_Id;
+      Ptr_Decl    : Node_Id;
+
       Fin_Context : Node_Id;
       --  The node after which to insert the finalization actions of the
-      --  transient controlled object.
+      --  transient object.
 
    begin
-      pragma Assert (Nkind_In (N, N_Case_Expression,
-                                  N_Expression_With_Actions,
-                                  N_If_Expression));
+      pragma Assert (Nkind_In (Expr, N_Case_Expression,
+                                     N_Expression_With_Actions,
+                                     N_If_Expression));
 
       --  When the context is a Boolean evaluation, all three nodes capture the
       --  result of their computation in a local temporary:
@@ -13004,102 +13002,63 @@ package body Exp_Ch4 is
       --       <finalize Trans_Id>
       --    in Result end;
 
-      --  As a result, the finalization of any transient controlled objects can
-      --  safely take place after the result capture.
+      --  As a result, the finalization of any transient objects can safely
+      --  take place after the result capture.
 
       --  ??? could this be extended to elementary types?
 
-      if Is_Boolean_Type (Etype (N)) then
+      if Is_Boolean_Type (Etype (Expr)) then
          Fin_Context := Last (Stmts);
 
-      --  Otherwise the immediate context may not be safe enough to carry out
-      --  transient controlled object finalization due to aliasing and nesting
-      --  of constructs. Insert calls to [Deep_]Finalize after the innermost
+      --  Otherwise the immediate context may not be safe enough to carry
+      --  out transient object finalization due to aliasing and nesting of
+      --  constructs. Insert calls to [Deep_]Finalize after the innermost
       --  enclosing non-transient construct.
 
       else
          Fin_Context := Hook_Context;
       end if;
 
-      --  Step 1: Create the access type which provides a reference to the
-      --  transient controlled object.
+      --  Mark the transient object as successfully processed to avoid double
+      --  finalization.
 
-      if Is_Access_Type (Obj_Typ) then
-         Desig_Typ := Directly_Designated_Type (Obj_Typ);
-      else
-         Desig_Typ := Obj_Typ;
-      end if;
+      Set_Is_Finalized_Transient (Obj_Id);
 
-      Desig_Typ := Base_Type (Desig_Typ);
+      --  Construct all the pieces necessary to hook and finalize a transient
+      --  object.
 
-      --  Generate:
-      --    Ann : access [all] <Desig_Typ>;
+      Build_Transient_Object_Statements
+        (Obj_Decl     => Obj_Decl,
+         Fin_Call     => Fin_Call,
+         Hook_Assign  => Hook_Assign,
+         Hook_Clear   => Hook_Clear,
+         Hook_Decl    => Hook_Decl,
+         Ptr_Decl     => Ptr_Decl,
+         Finalize_Obj => False);
 
-      Ptr_Id := Make_Temporary (Loc, 'A');
+      --  Add the access type which provides a reference to the transient
+      --  object. Generate:
 
-      Insert_Action (Hook_Context,
-        Make_Full_Type_Declaration (Loc,
-          Defining_Identifier => Ptr_Id,
-          Type_Definition     =>
-            Make_Access_To_Object_Definition (Loc,
-              All_Present        => Ekind (Obj_Typ) = E_General_Access_Type,
-              Subtype_Indication => New_Occurrence_Of (Desig_Typ, Loc))));
+      --    type Ptr_Typ is access all Desig_Typ;
 
-      --  Step 2: Create a temporary which acts as a hook to the transient
-      --  controlled object. Generate:
+      Insert_Action (Hook_Context, Ptr_Decl);
+
+      --  Add the temporary which acts as a hook to the transient object.
+      --  Generate:
 
       --    Hook : Ptr_Id := null;
 
-      Hook_Id := Make_Temporary (Loc, 'T');
+      Insert_Action (Hook_Context, Hook_Decl);
 
-      Insert_Action (Hook_Context,
-        Make_Object_Declaration (Loc,
-          Defining_Identifier => Hook_Id,
-          Object_Definition   => New_Occurrence_Of (Ptr_Id, Loc)));
-
-      --  Mark the hook as created for the purposes of exporting the transient
-      --  controlled object out of the expression_with_action or if expression.
-      --  This signals the machinery in Build_Finalizer to treat this case in
-      --  a special manner.
-
-      Set_Status_Flag_Or_Transient_Decl (Hook_Id, Decl);
-
-      --  Step 3: Associate the transient object to the hook
-
-      --  This must be inserted right after the object declaration, so that
-      --  the assignment is executed if, and only if, the object is actually
-      --  created (whereas the declaration of the hook pointer, and the
-      --  finalization call, may be inserted at an outer level, and may
-      --  remain unused for some executions, if the actual creation of
-      --  the object is conditional).
-
-      --  The use of unchecked conversion / unrestricted access is needed to
-      --  avoid an accessibility violation. Note that the finalization code is
-      --  structured in such a way that the "hook" is processed only when it
-      --  points to an existing object.
-
-      if Is_Access_Type (Obj_Typ) then
-         Expr :=
-           Unchecked_Convert_To
-             (Typ  => Ptr_Id,
-              Expr => New_Occurrence_Of (Obj_Id, Loc));
-      else
-         Expr :=
-           Make_Attribute_Reference (Loc,
-             Prefix         => New_Occurrence_Of (Obj_Id, Loc),
-             Attribute_Name => Name_Unrestricted_Access);
-      end if;
+      --  When the transient object is initialized by an aggregate, the hook
+      --  must capture the object after the last aggregate assignment takes
+      --  place. Only then is the object considered initialized. Generate:
 
-      --  Generate:
-      --    Hook := Ptr_Id (Obj_Id);
+      --    Hook := Ptr_Typ (Obj_Id);
       --      <or>
       --    Hook := Obj_Id'Unrestricted_Access;
 
-      --  When the transient object is initialized by an aggregate, the hook
-      --  must capture the object after the last component assignment takes
-      --  place. Only then is the object fully initialized.
-
-      if Ekind (Obj_Id) = E_Variable
+      if Ekind_In (Obj_Id, E_Constant, E_Variable)
         and then Present (Last_Aggregate_Assignment (Obj_Id))
       then
          Hook_Insert := Last_Aggregate_Assignment (Obj_Id);
@@ -13107,54 +13066,42 @@ package body Exp_Ch4 is
       --  Otherwise the hook seizes the related object immediately
 
       else
-         Hook_Insert := Decl;
+         Hook_Insert := Obj_Decl;
       end if;
 
-      Insert_After_And_Analyze (Hook_Insert,
-        Make_Assignment_Statement (Loc,
-          Name       => New_Occurrence_Of (Hook_Id, Loc),
-          Expression => Expr));
-
-      --  Step 4: Finalize the hook after the context has been evaluated or
-      --  elaborated. Generate:
-
-      --    if Hook /= null then
-      --       [Deep_]Finalize (Hook.all);
-      --       Hook := null;
-      --    end if;
+      Insert_After_And_Analyze (Hook_Insert, Hook_Assign);
 
       --  When the node is part of a return statement, there is no need to
       --  insert a finalization call, as the general finalization mechanism
-      --  (see Build_Finalizer) would take care of the transient controlled
-      --  object on subprogram exit. Note that it would also be impossible to
-      --  insert the finalization code after the return statement as this will
-      --  render it unreachable.
+      --  (see Build_Finalizer) would take care of the transient object on
+      --  subprogram exit. Note that it would also be impossible to insert the
+      --  finalization code after the return statement as this will render it
+      --  unreachable.
 
       if Nkind (Fin_Context) = N_Simple_Return_Statement then
          null;
 
-      --  Otherwise finalize the hook
+      --  Finalize the hook after the context has been evaluated. Generate:
+
+      --    if Hook /= null then
+      --       [Deep_]Finalize (Hook.all);
+      --       Hook := null;
+      --    end if;
 
       else
          Insert_Action_After (Fin_Context,
-           Make_Implicit_If_Statement (Decl,
+           Make_Implicit_If_Statement (Obj_Decl,
              Condition =>
                Make_Op_Ne (Loc,
-                 Left_Opnd  => New_Occurrence_Of (Hook_Id, Loc),
+                 Left_Opnd  =>
+                   New_Occurrence_Of (Defining_Entity (Hook_Decl), Loc),
                  Right_Opnd => Make_Null (Loc)),
 
              Then_Statements => New_List (
-               Make_Final_Call
-                 (Obj_Ref =>
-                    Make_Explicit_Dereference (Loc,
-                      Prefix => New_Occurrence_Of (Hook_Id, Loc)),
-                  Typ     => Desig_Typ),
-
-               Make_Assignment_Statement (Loc,
-                 Name       => New_Occurrence_Of (Hook_Id, Loc),
-                 Expression => Make_Null (Loc)))));
+               Fin_Call,
+               Hook_Clear)));
       end if;
-   end Process_Transient_Object;
+   end Process_Transient_In_Expression;
 
    ------------------------
    -- Rewrite_Comparison --
diff --git a/gcc/ada/exp_ch5.adb b/gcc/ada/exp_ch5.adb
index 2a3ecbfe39b..77342299e82 100644
--- a/gcc/ada/exp_ch5.adb
+++ b/gcc/ada/exp_ch5.adb
@@ -2371,6 +2371,8 @@ package body Exp_Ch5 is
                   AUD : constant Entity_Id := RTE (RE_Abort_Undefer_Direct);
 
                begin
+                  Set_Is_Abort_Block (N);
+
                   Set_Scope (Blk, Current_Scope);
                   Set_Etype (Blk, Standard_Void_Type);
                   Set_Identifier (N, New_Occurrence_Of (Blk, Sloc (N)));
diff --git a/gcc/ada/exp_ch6.adb b/gcc/ada/exp_ch6.adb
index f481fa954df..a14274c4a98 100644
--- a/gcc/ada/exp_ch6.adb
+++ b/gcc/ada/exp_ch6.adb
@@ -1834,7 +1834,7 @@ package body Exp_Ch6 is
             then
                Add_Call_By_Copy_Code;
 
-            --  References to components of bit packed arrays are expanded
+            --  References to components of bit-packed arrays are expanded
             --  at this point, rather than at the point of analysis of the
             --  actuals, to handle the expansion of the assignment to
             --  [in] out parameters.
@@ -1858,7 +1858,7 @@ package body Exp_Ch6 is
             then
                Add_Simple_Call_By_Copy_Code;
 
-            --  References to slices of bit packed arrays are expanded
+            --  References to slices of bit-packed arrays are expanded
 
             elsif Is_Ref_To_Bit_Packed_Slice (Actual) then
                Add_Call_By_Copy_Code;
@@ -2038,7 +2038,7 @@ package body Exp_Ch6 is
          --  Processing for IN parameters
 
          else
-            --  For IN parameters in the bit packed array case, we expand an
+            --  For IN parameters in the bit-packed array case, we expand an
             --  indexed component (the circuit in Exp_Ch4 deliberately left
             --  indexed components appearing as actuals untouched, so that
             --  the special processing above for the OUT and IN OUT cases
@@ -2052,7 +2052,7 @@ package body Exp_Ch6 is
                Reset_Packed_Prefix;
                Expand_Packed_Element_Reference (Actual);
 
-            --  If we have a reference to a bit packed array, we copy it, since
+            --  If we have a reference to a bit-packed array, we copy it, since
             --  the actual must be byte aligned.
 
             --  Is this really necessary in all cases???
@@ -4115,10 +4115,6 @@ package body Exp_Ch6 is
              and then Present (Generalized_Indexing (Ref));
       end Is_Element_Reference;
 
-      --  Local variables
-
-      Is_Elem_Ref : constant Boolean := Is_Element_Reference (N);
-
    --  Start of processing for Expand_Ctrl_Function_Call
 
    begin
@@ -4142,20 +4138,24 @@ package body Exp_Ch6 is
 
       Remove_Side_Effects (N);
 
-      --  When the temporary function result appears inside a case expression
-      --  or an if expression, its lifetime must be extended to match that of
-      --  the context. If not, the function result will be finalized too early
-      --  and the evaluation of the expression could yield incorrect result. An
-      --  exception to this rule are references to Ada 2012 container elements.
+      --  The side effect removal of the function call produced a temporary.
+      --  When the context is a case expression, if expression, or expression
+      --  with actions, the lifetime of the temporary must be extended to match
+      --  that of the context. Otherwise the function result will be finalized
+      --  too early and affect the result of the expression. To prevent this
+      --  unwanted effect, the temporary should not be considered for clean up
+      --  actions by the general finalization machinery.
+
+      --  Exception to this rule are references to Ada 2012 container elements.
       --  Such references must be finalized at the end of each iteration of the
       --  related quantified expression, otherwise the container will remain
       --  busy.
 
-      if not Is_Elem_Ref
+      if Nkind (N) = N_Explicit_Dereference
         and then Within_Case_Or_If_Expression (N)
-        and then Nkind (N) = N_Explicit_Dereference
+        and then not Is_Element_Reference (N)
       then
-         Set_Is_Processed_Transient (Entity (Prefix (N)));
+         Set_Is_Ignored_Transient (Entity (Prefix (N)));
       end if;
    end Expand_Ctrl_Function_Call;
 
@@ -5945,6 +5945,12 @@ package body Exp_Ch6 is
    is
       Rec   : Node_Id;
 
+      procedure Expand_Internal_Init_Call;
+      --  A call to an operation of the type may occur in the initialization
+      --  of a private component. In that case the prefix of the call is an
+      --  entity name and the call is treated as internal even though it
+      --  appears in code outside of the protected type.
+
       procedure Freeze_Called_Function;
       --  If it is a function call it can appear in elaboration code and
       --  the called entity must be frozen before the call. This must be
@@ -5952,6 +5958,31 @@ package body Exp_Ch6 is
       --  to something other than a call (e.g. a temporary initialized in a
       --  transient block).
 
+      -------------------------------
+      -- Expand_Internal_Init_Call --
+      -------------------------------
+
+      procedure Expand_Internal_Init_Call is
+      begin
+         --  If the context is a protected object (rather than a protected
+         --  type) the call itself is bound to raise program_error because
+         --  the protected body will not have been elaborated yet. This is
+         --  diagnosed subsequently in Sem_Elab.
+
+         Freeze_Called_Function;
+
+         --  The target of the internal call is the first formal of the
+         --  enclosing initialization procedure.
+
+         Rec := New_Occurrence_Of (First_Formal (Current_Scope), Sloc (N));
+         Build_Protected_Subprogram_Call (N,
+           Name     => Name (N),
+           Rec      => Rec,
+           External => False);
+         Analyze (N);
+         Resolve (N, Etype (Subp));
+      end Expand_Internal_Init_Call;
+
       ----------------------------
       -- Freeze_Called_Function --
       ----------------------------
@@ -5975,14 +6006,24 @@ package body Exp_Ch6 is
       --  case this must be handled as an inter-object call.
 
       if not In_Open_Scopes (Scop)
-        or else not Is_Entity_Name (Name (N))
+          or else (not Is_Entity_Name (Name (N)))
       then
          if Nkind (Name (N)) = N_Selected_Component then
             Rec := Prefix (Name (N));
 
-         else
-            pragma Assert (Nkind (Name (N)) = N_Indexed_Component);
+         elsif Nkind (Name (N)) = N_Indexed_Component then
             Rec := Prefix (Prefix (Name (N)));
+
+         else
+            --  If the context is the initialization procedure for a protected
+            --  type, the call is legal because the called entity must be a
+            --  function of that enclosing type, and this is treated as an
+            --  internal call.
+
+            pragma Assert (Is_Entity_Name (Name (N))
+                             and then Inside_Init_Proc);
+            Expand_Internal_Init_Call;
+            return;
          end if;
 
          Freeze_Called_Function;
diff --git a/gcc/ada/exp_ch7.adb b/gcc/ada/exp_ch7.adb
index f46f57ec321..2338deb675f 100644
--- a/gcc/ada/exp_ch7.adb
+++ b/gcc/ada/exp_ch7.adb
@@ -2080,11 +2080,19 @@ package body Exp_Ch7 is
                if For_Package and then Finalize_Storage_Only (Obj_Typ) then
                   null;
 
-               --  Transient variables are treated separately in order to
-               --  minimize the size of the generated code. For details, see
-               --  Process_Transient_Objects.
+               --  Finalization of transient objects are treated separately in
+               --  order to handle sensitive cases. These include:
 
-               elsif Is_Processed_Transient (Obj_Id) then
+               --    * Aggregate expansion
+               --    * If, case, and expression with actions expansion
+               --    * Transient scopes
+
+               --  If one of those contexts has marked the transient object as
+               --  ignored, do not generate finalization actions for it.
+
+               elsif Is_Finalized_Transient (Obj_Id)
+                 or else Is_Ignored_Transient (Obj_Id)
+               then
                   null;
 
                --  Ignored Ghost objects do not need any cleanup actions
@@ -2139,8 +2147,8 @@ package body Exp_Ch7 is
                then
                   Processing_Actions (Has_No_Init => True);
 
-               --  Processing for "hook" objects generated for controlled
-               --  transients declared inside an Expression_With_Actions.
+               --  Processing for "hook" objects generated for transient
+               --  objects declared inside an Expression_With_Actions.
 
                elsif Is_Access_Type (Obj_Typ)
                  and then Present (Status_Flag_Or_Transient_Decl (Obj_Id))
@@ -2353,7 +2361,7 @@ package body Exp_Ch7 is
                   end if;
                end if;
 
-            --  Handle a rare case caused by a controlled transient variable
+            --  Handle a rare case caused by a controlled transient object
             --  created as part of a record init proc. The variable is wrapped
             --  in a block, but the block is not associated with a transient
             --  scope.
@@ -3124,7 +3132,7 @@ package body Exp_Ch7 is
               and then Present (Status_Flag_Or_Transient_Decl (Obj_Id))
             then
                --  Temporaries created for the purpose of "exporting" a
-               --  controlled transient out of an Expression_With_Actions (EWA)
+               --  transient object out of an Expression_With_Actions (EWA)
                --  need guards. The following illustrates the usage of such
                --  temporaries.
 
@@ -6392,30 +6400,31 @@ package body Exp_Ch7 is
       Act_Cleanup : constant List_Id :=
         Scope_Stack.Table (Scope_Stack.Last).Actions_To_Be_Wrapped (Cleanup);
       --  Note: We used to use renamings of Scope_Stack.Table (Scope_Stack.
-      --  Last), but this was incorrect as Process_Transient_Object may
+      --  Last), but this was incorrect as Process_Transients_In_Scope may
       --  introduce new scopes and cause a reallocation of Scope_Stack.Table.
 
-      procedure Process_Transient_Objects
+      procedure Process_Transients_In_Scope
         (First_Object : Node_Id;
          Last_Object  : Node_Id;
          Related_Node : Node_Id);
-      --  First_Object and Last_Object define a list which contains potential
-      --  controlled transient objects. Finalization flags are inserted before
-      --  First_Object and finalization calls are inserted after Last_Object.
-      --  Related_Node is the node for which transient objects have been
-      --  created.
+      --  Find all transient objects in the list First_Object .. Last_Object
+      --  and generate finalization actions for them. Related_Node denotes the
+      --  node which created all transient objects.
 
-      -------------------------------
-      -- Process_Transient_Objects --
-      -------------------------------
+      ---------------------------------
+      -- Process_Transients_In_Scope --
+      ---------------------------------
 
-      procedure Process_Transient_Objects
+      procedure Process_Transients_In_Scope
         (First_Object : Node_Id;
          Last_Object  : Node_Id;
          Related_Node : Node_Id)
       is
+         Exceptions_OK : constant Boolean :=
+                           not Restriction_Active (No_Exception_Propagation);
+
          Must_Hook : Boolean := False;
-         --  Flag denoting whether the context requires transient variable
+         --  Flag denoting whether the context requires transient object
          --  export to the outer finalizer.
 
          function Is_Subprogram_Call (N : Node_Id) return Traverse_Result;
@@ -6424,6 +6433,15 @@ package body Exp_Ch7 is
          procedure Detect_Subprogram_Call is
            new Traverse_Proc (Is_Subprogram_Call);
 
+         procedure Process_Transient_In_Scope
+           (Obj_Decl  : Node_Id;
+            Blk_Data  : Finalization_Exception_Data;
+            Blk_Stmts : List_Id);
+         --  Generate finalization actions for a single transient object
+         --  denoted by object declaration Obj_Decl. Blk_Data is the
+         --  exception data of the enclosing block. Blk_Stmts denotes the
+         --  statements of the enclosing block.
+
          ------------------------
          -- Is_Subprogram_Call --
          ------------------------
@@ -6466,32 +6484,149 @@ package body Exp_Ch7 is
             end if;
          end Is_Subprogram_Call;
 
-         --  Local variables
+         --------------------------------
+         -- Process_Transient_In_Scope --
+         --------------------------------
 
-         Exceptions_OK : constant Boolean :=
-                           not Restriction_Active (No_Exception_Propagation);
+         procedure Process_Transient_In_Scope
+           (Obj_Decl  : Node_Id;
+            Blk_Data  : Finalization_Exception_Data;
+            Blk_Stmts : List_Id)
+         is
+            Loc         : constant Source_Ptr := Sloc (Obj_Decl);
+            Obj_Id      : constant Entity_Id  := Defining_Entity (Obj_Decl);
+            Fin_Call    : Node_Id;
+            Fin_Stmts   : List_Id;
+            Hook_Assign : Node_Id;
+            Hook_Clear  : Node_Id;
+            Hook_Decl   : Node_Id;
+            Hook_Insert : Node_Id;
+            Ptr_Decl    : Node_Id;
+
+         begin
+            --  Mark the transient object as successfully processed to avoid
+            --  double finalization.
+
+            Set_Is_Finalized_Transient (Obj_Id);
+
+            --  Construct all the pieces necessary to hook and finalize the
+            --  transient object.
+
+            Build_Transient_Object_Statements
+              (Obj_Decl    => Obj_Decl,
+               Fin_Call    => Fin_Call,
+               Hook_Assign => Hook_Assign,
+               Hook_Clear  => Hook_Clear,
+               Hook_Decl   => Hook_Decl,
+               Ptr_Decl    => Ptr_Decl);
+
+            --  The context contains at least one subprogram call which may
+            --  raise an exception. This scenario employs "hooking" to pass
+            --  transient objects to the enclosing finalizer in case of an
+            --  exception.
+
+            if Must_Hook then
+
+               --  Add the access type which provides a reference to the
+               --  transient object. Generate:
+
+               --    type Ptr_Typ is access all Desig_Typ;
+
+               Insert_Action (Obj_Decl, Ptr_Decl);
+
+               --  Add the temporary which acts as a hook to the transient
+               --  object. Generate:
+
+               --    Hook : Ptr_Typ := null;
+
+               Insert_Action (Obj_Decl, Hook_Decl);
+
+               --  When the transient object is initialized by an aggregate,
+               --  the hook must capture the object after the last aggregate
+               --  assignment takes place. Only then is the object considered
+               --  fully initialized. Generate:
+
+               --    Hook := Ptr_Typ (Obj_Id);
+               --      <or>
+               --    Hook := Obj_Id'Unrestricted_Access;
+
+               if Ekind_In (Obj_Id, E_Constant, E_Variable)
+                 and then Present (Last_Aggregate_Assignment (Obj_Id))
+               then
+                  Hook_Insert := Last_Aggregate_Assignment (Obj_Id);
+
+               --  Otherwise the hook seizes the related object immediately
+
+               else
+                  Hook_Insert := Obj_Decl;
+               end if;
+
+               Insert_After_And_Analyze (Hook_Insert, Hook_Assign);
+            end if;
+
+            --  When exception propagation is enabled wrap the hook clear
+            --  statement and the finalization call into a block to catch
+            --  potential exceptions raised during finalization. Generate:
+
+            --    begin
+            --       [Hook := null;]
+            --       [Deep_]Finalize (Obj_Ref);
+
+            --    exception
+            --       when others =>
+            --          if not Raised then
+            --             Raised := True;
+            --             Save_Occurrence
+            --               (Enn, Get_Current_Excep.all.all);
+            --          end if;
+            --    end;
+
+            if Exceptions_OK then
+               Fin_Stmts := New_List;
+
+               if Must_Hook then
+                  Append_To (Fin_Stmts, Hook_Clear);
+               end if;
+
+               Append_To (Fin_Stmts, Fin_Call);
+
+               Prepend_To (Blk_Stmts,
+                 Make_Block_Statement (Loc,
+                   Handled_Statement_Sequence =>
+                     Make_Handled_Sequence_Of_Statements (Loc,
+                       Statements         => Fin_Stmts,
+                       Exception_Handlers => New_List (
+                         Build_Exception_Handler (Blk_Data)))));
+
+            --  Otherwise generate:
+
+            --    [Hook := null;]
+            --    [Deep_]Finalize (Obj_Ref);
+
+            --  Note that the statements are inserted in reverse order to
+            --  achieve the desired final order outlined above.
+
+            else
+               Prepend_To (Blk_Stmts, Fin_Call);
+
+               if Must_Hook then
+                  Prepend_To (Blk_Stmts, Hook_Clear);
+               end if;
+            end if;
+         end Process_Transient_In_Scope;
+
+         --  Local variables
 
          Built     : Boolean := False;
+         Blk_Data  : Finalization_Exception_Data;
          Blk_Decl  : Node_Id := Empty;
          Blk_Decls : List_Id := No_List;
          Blk_Ins   : Node_Id;
          Blk_Stmts : List_Id;
-         Desig_Typ : Entity_Id;
-         Fin_Call  : Node_Id;
-         Fin_Data  : Finalization_Exception_Data;
-         Fin_Stmts : List_Id;
-         Hook_Clr  : Node_Id := Empty;
-         Hook_Id   : Entity_Id;
-         Hook_Ins  : Node_Id;
-         Init_Expr : Node_Id;
          Loc       : Source_Ptr;
          Obj_Decl  : Node_Id;
-         Obj_Id    : Entity_Id;
-         Obj_Ref   : Node_Id;
-         Obj_Typ   : Entity_Id;
-         Ptr_Typ   : Entity_Id;
 
-      --  Start of processing for Process_Transient_Objects
+      --  Start of processing for Process_Transients_In_Scope
 
       begin
          --  The expansion performed by this routine is as follows:
@@ -6536,11 +6671,11 @@ package body Exp_Ch7 is
          --                Save_Occurrence (Ex, Get_Current_Excep.all.all);
          --       end;
 
+         --       Abort_Undefer;
+
          --       if Raised and not Abrt then
          --          Raise_From_Controlled_Operation (Ex);
          --       end if;
-
-         --       Abort_Undefer_Direct;
          --    end;
 
          --  Recognize a scenario where the transient context is an object
@@ -6554,8 +6689,8 @@ package body Exp_Ch7 is
          --    Obj  : ...;
          --    Res  : ... := BIP_Func_Call (..., Obj, ...);
 
-         --  The finalization of any controlled transient must happen after
-         --  the build-in-place function call is executed.
+         --  The finalization of any transient object must happen after the
+         --  build-in-place function call is executed.
 
          if Nkind (N) = N_Object_Declaration
            and then Present (BIP_Initialization_Call (Defining_Identifier (N)))
@@ -6589,114 +6724,7 @@ package body Exp_Ch7 is
 
               and then Obj_Decl /= Related_Node
             then
-               Loc       := Sloc (Obj_Decl);
-               Obj_Id    := Defining_Identifier (Obj_Decl);
-               Obj_Typ   := Base_Type (Etype (Obj_Id));
-               Desig_Typ := Obj_Typ;
-
-               Set_Is_Processed_Transient (Obj_Id);
-
-               --  Handle access types
-
-               if Is_Access_Type (Desig_Typ) then
-                  Desig_Typ := Available_View (Designated_Type (Desig_Typ));
-               end if;
-
-               --  Transient objects associated with subprogram calls need
-               --  extra processing. These objects are usually created right
-               --  before the call and finalized immediately after the call.
-               --  If an exception occurs during the call, the clean up code
-               --  is skipped due to the sudden change in control and the
-               --  transient is never finalized.
-
-               --  To handle this case, such variables are "exported" to the
-               --  enclosing sequence of statements where their corresponding
-               --  "hooks" are picked up by the finalization machinery.
-
-               if Must_Hook then
-
-                  --  Create an access type which provides a reference to the
-                  --  transient object. Generate:
-                  --    type Ptr_Typ is access [all] Desig_Typ;
-
-                  Ptr_Typ := Make_Temporary (Loc, 'A');
-
-                  Insert_Action (Obj_Decl,
-                    Make_Full_Type_Declaration (Loc,
-                      Defining_Identifier => Ptr_Typ,
-                      Type_Definition     =>
-                        Make_Access_To_Object_Definition (Loc,
-                          All_Present        =>
-                            Ekind (Obj_Typ) = E_General_Access_Type,
-                          Subtype_Indication =>
-                            New_Occurrence_Of (Desig_Typ, Loc))));
-
-                  --  Create a temporary which acts as a hook to the transient
-                  --  object. Generate:
-                  --    Hook : Ptr_Typ := null;
-
-                  Hook_Id := Make_Temporary (Loc, 'T');
-
-                  Insert_Action (Obj_Decl,
-                    Make_Object_Declaration (Loc,
-                      Defining_Identifier => Hook_Id,
-                      Object_Definition   =>
-                        New_Occurrence_Of (Ptr_Typ, Loc)));
-
-                  --  Mark the temporary as a hook. This signals the machinery
-                  --  in Build_Finalizer to recognize this special case.
-
-                  Set_Status_Flag_Or_Transient_Decl (Hook_Id, Obj_Decl);
-
-                  --  Hook the transient object to the temporary. Generate:
-                  --    Hook := Ptr_Typ (Obj_Id);
-                  --      <or>
-                  --    Hook := Obj_Id'Unrestricted_Access;
-
-                  if Is_Access_Type (Obj_Typ) then
-                     Init_Expr :=
-                       Convert_To (Ptr_Typ, New_Occurrence_Of (Obj_Id, Loc));
-
-                  else
-                     Init_Expr :=
-                       Make_Attribute_Reference (Loc,
-                         Prefix         => New_Occurrence_Of (Obj_Id, Loc),
-                         Attribute_Name => Name_Unrestricted_Access);
-                  end if;
-
-                  --  When the transient object is initialized by an aggregate,
-                  --  the hook must capture the object after the last component
-                  --  assignment takes place. Only then is the object fully
-                  --  initialized.
-
-                  if Ekind (Obj_Id) = E_Variable
-                    and then Present (Last_Aggregate_Assignment (Obj_Id))
-                  then
-                     Hook_Ins := Last_Aggregate_Assignment (Obj_Id);
-
-                  --  Otherwise the hook seizes the related object immediately
-
-                  else
-                     Hook_Ins := Obj_Decl;
-                  end if;
-
-                  Insert_After_And_Analyze (Hook_Ins,
-                    Make_Assignment_Statement (Loc,
-                      Name       => New_Occurrence_Of (Hook_Id, Loc),
-                      Expression => Init_Expr));
-
-                  --  The transient object is about to be finalized by the
-                  --  clean up code following the subprogram call. In order
-                  --  to avoid double finalization, clear the hook.
-
-                  --  Generate:
-                  --    Hook := null;
-
-                  Hook_Clr :=
-                    Make_Assignment_Statement (Loc,
-                      Name       => New_Occurrence_Of (Hook_Id, Loc),
-                      Expression => Make_Null (Loc));
-               end if;
+               Loc := Sloc (Obj_Decl);
 
                --  Before generating the clean up code for the first transient
                --  object, create a wrapper block which houses all hook clear
@@ -6707,25 +6735,14 @@ package body Exp_Ch7 is
                   Built     := True;
                   Blk_Stmts := New_List;
 
-                  --  Create the declarations of all entities that participate
-                  --  in exception detection and propagation.
+                  --  Generate:
+                  --    Abrt   : constant Boolean := ...;
+                  --    Ex     : Exception_Occurrence;
+                  --    Raised : Boolean := False;
 
                   if Exceptions_OK then
                      Blk_Decls := New_List;
-
-                     --  Generate:
-                     --    Abrt   : constant Boolean := ...;
-                     --    Ex     : Exception_Occurrence;
-                     --    Raised : Boolean := False;
-
-                     Build_Object_Declarations (Fin_Data, Blk_Decls, Loc);
-
-                     --  Generate:
-                     --    if Raised and then not Abrt then
-                     --       Raise_From_Controlled_Operation (Ex);
-                     --    end if;
-
-                     Append_To (Blk_Stmts, Build_Raise_Statement (Fin_Data));
+                     Build_Object_Declarations (Blk_Data, Blk_Decls, Loc);
                   end if;
 
                   Blk_Decl :=
@@ -6736,64 +6753,13 @@ package body Exp_Ch7 is
                           Statements => Blk_Stmts));
                end if;
 
-               --  Generate:
-               --    [Deep_]Finalize (Obj_Ref);
-
-               Obj_Ref := New_Occurrence_Of (Obj_Id, Loc);
-
-               if Is_Access_Type (Obj_Typ) then
-                  Obj_Ref := Make_Explicit_Dereference (Loc, Obj_Ref);
-                  Set_Etype (Obj_Ref, Desig_Typ);
-               end if;
-
-               Fin_Call :=
-                 Make_Final_Call (Obj_Ref => Obj_Ref, Typ => Desig_Typ);
-
-               --  When exception propagation is enabled wrap the hook clear
-               --  statement and the finalization call into a block to catch
-               --  potential exceptions raised during finalization. Generate:
-
-               --    begin
-               --       [Temp := null;]
-               --       [Deep_]Finalize (Obj_Ref);
-
-               --    exception
-               --       when others =>
-               --          if not Raised then
-               --             Raised := True;
-               --             Save_Occurrence
-               --               (Enn, Get_Current_Excep.all.all);
-               --          end if;
-               --    end;
-
-               if Exceptions_OK then
-                  Fin_Stmts := New_List;
+               --  Construct all necessary circuitry to hook and finalize a
+               --  single transient object.
 
-                  if Present (Hook_Clr) then
-                     Append_To (Fin_Stmts, Hook_Clr);
-                  end if;
-
-                  Append_To (Fin_Stmts, Fin_Call);
-
-                  Prepend_To (Blk_Stmts,
-                    Make_Block_Statement (Loc,
-                      Handled_Statement_Sequence =>
-                        Make_Handled_Sequence_Of_Statements (Loc,
-                          Statements         => Fin_Stmts,
-                          Exception_Handlers => New_List (
-                            Build_Exception_Handler (Fin_Data)))));
-
-               --  Otherwise generate:
-               --    [Temp := null;]
-               --    [Deep_]Finalize (Obj_Ref);
-
-               else
-                  Prepend_To (Blk_Stmts, Fin_Call);
-
-                  if Present (Hook_Clr) then
-                     Prepend_To (Blk_Stmts, Hook_Clr);
-                  end if;
-               end if;
+               Process_Transient_In_Scope
+                 (Obj_Decl  => Obj_Decl,
+                  Blk_Data  => Blk_Data,
+                  Blk_Stmts => Blk_Stmts);
             end if;
 
             --  Terminate the scan after the last object has been processed to
@@ -6806,12 +6772,15 @@ package body Exp_Ch7 is
             Next (Obj_Decl);
          end loop;
 
+         --  Complete the decoration of the enclosing finalization block and
+         --  insert it into the tree.
+
          if Present (Blk_Decl) then
 
-            --  Note that the abort defer / undefer pair does not require an
-            --  extra block because each finalization exception is caught in
-            --  its corresponding finalization block. As a result, the call to
-            --  Abort_Defer always takes place.
+            --  Note that this Abort_Undefer does not require a extra block or
+            --  an AT_END handler because each finalization exception is caught
+            --  in its own corresponding finalization block. As a result, the
+            --  call to Abort_Defer always takes place.
 
             if Abort_Allowed then
                Prepend_To (Blk_Stmts,
@@ -6821,9 +6790,18 @@ package body Exp_Ch7 is
                  Build_Runtime_Call (Loc, RE_Abort_Undefer));
             end if;
 
+            --  Generate:
+            --    if Raised and then not Abrt then
+            --       Raise_From_Controlled_Operation (Ex);
+            --    end if;
+
+            if Exceptions_OK then
+               Append_To (Blk_Stmts, Build_Raise_Statement (Blk_Data));
+            end if;
+
             Insert_After_And_Analyze (Blk_Ins, Blk_Decl);
          end if;
-      end Process_Transient_Objects;
+      end Process_Transients_In_Scope;
 
       --  Local variables
 
@@ -6901,10 +6879,10 @@ package body Exp_Ch7 is
            (Last_Obj, Build_SS_Release_Call (Loc, Mark_Id));
       end if;
 
-      --  Check for transient controlled objects associated with Target and
-      --  generate the appropriate finalization actions for them.
+      --  Check for transient objects associated with Target and generate the
+      --  appropriate finalization actions for them.
 
-      Process_Transient_Objects
+      Process_Transients_In_Scope
         (First_Object => First_Obj,
          Last_Object  => Last_Obj,
          Related_Node => Target);
diff --git a/gcc/ada/exp_ch9.adb b/gcc/ada/exp_ch9.adb
index 34f2150b37d..6c572cef3ea 100644
--- a/gcc/ada/exp_ch9.adb
+++ b/gcc/ada/exp_ch9.adb
@@ -6219,16 +6219,17 @@ package body Exp_Ch9 is
 
    procedure Expand_Access_Protected_Subprogram_Type (N : Node_Id) is
       Loc    : constant Source_Ptr := Sloc (N);
-      Comps  : List_Id;
       T      : constant Entity_Id  := Defining_Identifier (N);
       D_T    : constant Entity_Id  := Designated_Type (T);
       D_T2   : constant Entity_Id  := Make_Temporary (Loc, 'D');
       E_T    : constant Entity_Id  := Make_Temporary (Loc, 'E');
-      P_List : constant List_Id    := Build_Protected_Spec
-                                        (N, RTE (RE_Address), D_T, False);
-      Decl1  : Node_Id;
-      Decl2  : Node_Id;
-      Def1   : Node_Id;
+      P_List : constant List_Id    :=
+                 Build_Protected_Spec (N, RTE (RE_Address), D_T, False);
+
+      Comps : List_Id;
+      Decl1 : Node_Id;
+      Decl2 : Node_Id;
+      Def1  : Node_Id;
 
    begin
       --  Create access to subprogram with full signature
@@ -13217,17 +13218,30 @@ package body Exp_Ch9 is
       --  package or return statement.
 
       Context := Parent (N);
-      while not Nkind_In (Context, N_Block_Statement,
-                                   N_Entry_Body,
-                                   N_Extended_Return_Statement,
-                                   N_Package_Body,
-                                   N_Package_Declaration,
-                                   N_Subprogram_Body,
-                                   N_Task_Body)
-      loop
+      while Present (Context) loop
+         if Nkind_In (Context, N_Entry_Body,
+                               N_Extended_Return_Statement,
+                               N_Package_Body,
+                               N_Package_Declaration,
+                               N_Subprogram_Body,
+                               N_Task_Body)
+         then
+            exit;
+
+         --  Do not consider block created to protect a list of statements with
+         --  an Abort_Defer / Abort_Undefer_Direct pair.
+
+         elsif Nkind (Context) = N_Block_Statement
+           and then not Is_Abort_Block (Context)
+         then
+            exit;
+         end if;
+
          Context := Parent (Context);
       end loop;
 
+      pragma Assert (Present (Context));
+
       --  Extract the constituents of the context
 
       if Nkind (Context) = N_Extended_Return_Statement then
@@ -13258,8 +13272,6 @@ package body Exp_Ch9 is
          end if;
 
       else
-         Context_Decls := Declarations (Context);
-
          if Nkind (Context) = N_Block_Statement then
             Context_Id := Entity (Identifier (Context));
 
@@ -13283,9 +13295,10 @@ package body Exp_Ch9 is
          else
             raise Program_Error;
          end if;
+
+         Context_Decls := Declarations (Context);
       end if;
 
-      pragma Assert (Present (Context));
       pragma Assert (Present (Context_Id));
       pragma Assert (Present (Context_Decls));
    end Find_Enclosing_Context;
diff --git a/gcc/ada/exp_imgv.adb b/gcc/ada/exp_imgv.adb
index f249afe0f8c..e4a07f7074e 100644
--- a/gcc/ada/exp_imgv.adb
+++ b/gcc/ada/exp_imgv.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 2001-2014, Free Software Foundation, Inc.         --
+--          Copyright (C) 2001-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -694,7 +694,7 @@ package body Exp_Imgv is
 
             if Ttyp = Standard_Integer_8 then
                Func := RE_Value_Enumeration_8;
-            elsif Ttyp = Standard_Integer_16  then
+            elsif Ttyp = Standard_Integer_16 then
                Func := RE_Value_Enumeration_16;
             else
                Func := RE_Value_Enumeration_32;
@@ -1278,7 +1278,7 @@ package body Exp_Imgv is
             when Normal =>
                if Ttyp = Standard_Integer_8 then
                   XX := RE_Width_Enumeration_8;
-               elsif Ttyp = Standard_Integer_16  then
+               elsif Ttyp = Standard_Integer_16 then
                   XX := RE_Width_Enumeration_16;
                else
                   XX := RE_Width_Enumeration_32;
@@ -1287,7 +1287,7 @@ package body Exp_Imgv is
             when Wide =>
                if Ttyp = Standard_Integer_8 then
                   XX := RE_Wide_Width_Enumeration_8;
-               elsif Ttyp = Standard_Integer_16  then
+               elsif Ttyp = Standard_Integer_16 then
                   XX := RE_Wide_Width_Enumeration_16;
                else
                   XX := RE_Wide_Width_Enumeration_32;
@@ -1296,7 +1296,7 @@ package body Exp_Imgv is
             when Wide_Wide =>
                if Ttyp = Standard_Integer_8 then
                   XX := RE_Wide_Wide_Width_Enumeration_8;
-               elsif Ttyp = Standard_Integer_16  then
+               elsif Ttyp = Standard_Integer_16 then
                   XX := RE_Wide_Wide_Width_Enumeration_16;
                else
                   XX := RE_Wide_Wide_Width_Enumeration_32;
diff --git a/gcc/ada/exp_util.adb b/gcc/ada/exp_util.adb
index b52fcccbdb4..6d6d7546597 100644
--- a/gcc/ada/exp_util.adb
+++ b/gcc/ada/exp_util.adb
@@ -34,6 +34,7 @@ with Errout;   use Errout;
 with Exp_Aggr; use Exp_Aggr;
 with Exp_Ch6;  use Exp_Ch6;
 with Exp_Ch7;  use Exp_Ch7;
+with Exp_Ch11; use Exp_Ch11;
 with Ghost;    use Ghost;
 with Inline;   use Inline;
 with Itypes;   use Itypes;
@@ -724,7 +725,7 @@ package body Exp_Util is
          --  For deallocation of class-wide types we obtain the value of
          --  alignment from the Type Specific Record of the deallocated object.
          --  This is needed because the frontend expansion of class-wide types
-         --  into equivalent types confuses the backend.
+         --  into equivalent types confuses the back end.
 
          else
             --  Generate:
@@ -930,6 +931,59 @@ package body Exp_Util is
       end;
    end Build_Allocate_Deallocate_Proc;
 
+   -------------------------------
+   -- Build_Abort_Undefer_Block --
+   -------------------------------
+
+   function Build_Abort_Undefer_Block
+     (Loc     : Source_Ptr;
+      Stmts   : List_Id;
+      Context : Node_Id) return Node_Id
+   is
+      Exceptions_OK : constant Boolean :=
+                        not Restriction_Active (No_Exception_Propagation);
+
+      AUD    : Entity_Id;
+      Blk    : Node_Id;
+      Blk_Id : Entity_Id;
+      HSS    : Node_Id;
+
+   begin
+      --  The block should be generated only when undeferring abort in the
+      --  context of a potential exception.
+
+      pragma Assert (Abort_Allowed and Exceptions_OK);
+
+      --  Generate:
+      --    begin
+      --       <Stmts>
+      --    at end
+      --       Abort_Undefer_Direct;
+      --    end;
+
+      AUD := RTE (RE_Abort_Undefer_Direct);
+
+      HSS :=
+        Make_Handled_Sequence_Of_Statements (Loc,
+          Statements  => Stmts,
+          At_End_Proc => New_Occurrence_Of (AUD, Loc));
+
+      Blk :=
+        Make_Block_Statement (Loc,
+          Handled_Statement_Sequence => HSS);
+      Set_Is_Abort_Block (Blk);
+
+      Add_Block_Identifier  (Blk, Blk_Id);
+      Expand_At_End_Handler (HSS, Blk_Id);
+
+      --  Present the Abort_Undefer_Direct function to the back end to inline
+      --  the call to the routine.
+
+      Add_Inlined_Body (AUD, Context);
+
+      return Blk;
+   end Build_Abort_Undefer_Block;
+
    --------------------------
    -- Build_Procedure_Form --
    --------------------------
@@ -1653,6 +1707,133 @@ package body Exp_Util is
       return Build_Task_Image_Function (Loc, Decls, Stats, Res);
    end Build_Task_Record_Image;
 
+   ---------------------------------------
+   -- Build_Transient_Object_Statements --
+   ---------------------------------------
+
+   procedure Build_Transient_Object_Statements
+     (Obj_Decl     : Node_Id;
+      Fin_Call     : out Node_Id;
+      Hook_Assign  : out Node_Id;
+      Hook_Clear   : out Node_Id;
+      Hook_Decl    : out Node_Id;
+      Ptr_Decl     : out Node_Id;
+      Finalize_Obj : Boolean := True)
+   is
+      Loc     : constant Source_Ptr := Sloc (Obj_Decl);
+      Obj_Id  : constant Entity_Id  := Defining_Entity (Obj_Decl);
+      Obj_Typ : constant Entity_Id  := Base_Type (Etype (Obj_Id));
+
+      Desig_Typ : Entity_Id;
+      Hook_Expr : Node_Id;
+      Hook_Id   : Entity_Id;
+      Obj_Ref   : Node_Id;
+      Ptr_Typ   : Entity_Id;
+
+   begin
+      --  Recover the type of the object
+
+      Desig_Typ := Obj_Typ;
+
+      if Is_Access_Type (Desig_Typ) then
+         Desig_Typ := Available_View (Designated_Type (Desig_Typ));
+      end if;
+
+      --  Create an access type which provides a reference to the transient
+      --  object. Generate:
+
+      --    type Ptr_Typ is access all Desig_Typ;
+
+      Ptr_Typ := Make_Temporary (Loc, 'A');
+      Set_Ekind (Ptr_Typ, E_General_Access_Type);
+      Set_Directly_Designated_Type (Ptr_Typ, Desig_Typ);
+
+      Ptr_Decl :=
+        Make_Full_Type_Declaration (Loc,
+          Defining_Identifier => Ptr_Typ,
+          Type_Definition     =>
+            Make_Access_To_Object_Definition (Loc,
+              All_Present        => True,
+              Subtype_Indication => New_Occurrence_Of (Desig_Typ, Loc)));
+
+      --  Create a temporary check which acts as a hook to the transient
+      --  object. Generate:
+
+      --    Hook : Ptr_Typ := null;
+
+      Hook_Id := Make_Temporary (Loc, 'T');
+      Set_Ekind (Hook_Id, E_Variable);
+      Set_Etype (Hook_Id, Ptr_Typ);
+
+      Hook_Decl :=
+        Make_Object_Declaration (Loc,
+          Defining_Identifier => Hook_Id,
+          Object_Definition   => New_Occurrence_Of (Ptr_Typ, Loc),
+          Expression          => Make_Null (Loc));
+
+      --  Mark the temporary as a hook. This signals the machinery in
+      --  Build_Finalizer to recognize this special case.
+
+      Set_Status_Flag_Or_Transient_Decl (Hook_Id, Obj_Decl);
+
+      --  Hook the transient object to the temporary. Generate:
+
+      --    Hook := Ptr_Typ (Obj_Id);
+      --      <or>
+      --    Hool := Obj_Id'Unrestricted_Access;
+
+      if Is_Access_Type (Obj_Typ) then
+         Hook_Expr :=
+           Unchecked_Convert_To (Ptr_Typ, New_Occurrence_Of (Obj_Id, Loc));
+      else
+         Hook_Expr :=
+           Make_Attribute_Reference (Loc,
+             Prefix         => New_Occurrence_Of (Obj_Id, Loc),
+             Attribute_Name => Name_Unrestricted_Access);
+      end if;
+
+      Hook_Assign :=
+        Make_Assignment_Statement (Loc,
+          Name       => New_Occurrence_Of (Hook_Id, Loc),
+          Expression => Hook_Expr);
+
+      --  Crear the hook prior to finalizing the object. Generate:
+
+      --    Hook := null;
+
+      Hook_Clear :=
+        Make_Assignment_Statement (Loc,
+          Name       => New_Occurrence_Of (Hook_Id, Loc),
+          Expression => Make_Null (Loc));
+
+      --  Finalize the object. Generate:
+
+      --    [Deep_]Finalize (Obj_Ref[.all]);
+
+      if Finalize_Obj then
+         Obj_Ref := New_Occurrence_Of (Obj_Id, Loc);
+
+         if Is_Access_Type (Obj_Typ) then
+            Obj_Ref := Make_Explicit_Dereference (Loc, Obj_Ref);
+            Set_Etype (Obj_Ref, Desig_Typ);
+         end if;
+
+         Fin_Call := Make_Final_Call (Obj_Ref, Desig_Typ);
+
+      --  Otherwise finalize the hook. Generate:
+
+      --    [Deep_]Finalize (Hook.all);
+
+      else
+         Fin_Call :=
+           Make_Final_Call (
+             Obj_Ref =>
+               Make_Explicit_Dereference (Loc,
+                 Prefix => New_Occurrence_Of (Hook_Id, Loc)),
+             Typ     => Desig_Typ);
+      end if;
+   end Build_Transient_Object_Statements;
+
    -----------------------------
    -- Check_Float_Op_Overflow --
    -----------------------------
@@ -2314,7 +2495,7 @@ package body Exp_Util is
       --  If the type of the expression is an internally generated type it
       --  may not be necessary to create a new subtype. However there are two
       --  exceptions: references to the current instances, and aliased array
-      --  object declarations for which the backend needs to create a template.
+      --  object declarations for which the back end has to create a template.
 
       elsif Is_Constrained (Exp_Typ)
         and then not Is_Class_Wide_Type (Unc_Type)
@@ -5067,7 +5248,7 @@ package body Exp_Util is
          --  explicit aliases of it:
 
          --    do
-         --       Trans_Id : Ctrl_Typ ...;  --  controlled transient object
+         --       Trans_Id : Ctrl_Typ ...;  --  transient object
          --       Alias : ... := Trans_Id;  --  object is aliased
          --       Val : constant Boolean :=
          --               ... Alias ...;    --  aliasing ends
@@ -5236,6 +5417,10 @@ package body Exp_Util is
           and then Requires_Transient_Scope (Desig)
           and then Nkind (Rel_Node) /= N_Simple_Return_Statement
 
+          --  Do not consider a transient object that was already processed
+
+          and then not Is_Finalized_Transient (Obj_Id)
+
           --  Do not consider renamed or 'reference-d transient objects because
           --  the act of renaming extends the object's lifetime.
 
@@ -7693,14 +7878,23 @@ package body Exp_Util is
         and (Inside_A_Generic or not Full_Analysis or not GNATprove_Mode)
       then
          return;
-      end if;
 
       --  Cannot generate temporaries if the invocation to remove side effects
       --  was issued too early and the type of the expression is not resolved
       --  (this happens because routines Duplicate_Subexpr_XX implicitly invoke
       --  Remove_Side_Effects).
 
-      if No (Exp_Type) or else Ekind (Exp_Type) = E_Access_Attribute_Type then
+      elsif No (Exp_Type)
+        or else Ekind (Exp_Type) = E_Access_Attribute_Type
+      then
+         return;
+
+      --  Nothing to do if prior expansion determined that a function call does
+      --  not require side effect removal.
+
+      elsif Nkind (Exp) = N_Function_Call
+        and then No_Side_Effect_Removal (Exp)
+      then
          return;
 
       --  No action needed for side-effect free expressions
@@ -8246,11 +8440,19 @@ package body Exp_Util is
             if Lib_Level and then Finalize_Storage_Only (Obj_Typ) then
                null;
 
-            --  Transient variables are treated separately in order to minimize
-            --  the size of the generated code. See Exp_Ch7.Process_Transient_
-            --  Objects.
+            --  Finalization of transient objects are treated separately in
+            --  order to handle sensitive cases. These include:
+
+            --    * Aggregate expansion
+            --    * If, case, and expression with actions expansion
+            --    * Transient scopes
 
-            elsif Is_Processed_Transient (Obj_Id) then
+            --  If one of those contexts has marked the transient object as
+            --  ignored, do not generate finalization actions for it.
+
+            elsif Is_Finalized_Transient (Obj_Id)
+              or else Is_Ignored_Transient (Obj_Id)
+            then
                null;
 
             --  Ignored Ghost objects do not need any cleanup actions because
@@ -8306,8 +8508,8 @@ package body Exp_Util is
             then
                return True;
 
-            --  Processing for "hook" objects generated for controlled
-            --  transients declared inside an Expression_With_Actions.
+            --  Processing for "hook" objects generated for transient objects
+            --  declared inside an Expression_With_Actions.
 
             elsif Is_Access_Type (Obj_Typ)
               and then Present (Status_Flag_Or_Transient_Decl (Obj_Id))
@@ -8455,7 +8657,7 @@ package body Exp_Util is
          elsif Nkind (Decl) = N_Block_Statement
            and then
 
-           --  Handle a rare case caused by a controlled transient variable
+           --  Handle a rare case caused by a controlled transient object
            --  created as part of a record init proc. The variable is wrapped
            --  in a block, but the block is not associated with a transient
            --  scope.
@@ -9079,7 +9281,7 @@ package body Exp_Util is
       --  Note on checks that could raise Constraint_Error. Strictly, if we
       --  take advantage of 11.6, these checks do not count as side effects.
       --  However, we would prefer to consider that they are side effects,
-      --  since the backend CSE does not work very well on expressions which
+      --  since the back end CSE does not work very well on expressions which
       --  can raise Constraint_Error. On the other hand if we don't consider
       --  them to be side effect free, then we get some awkward expansions
       --  in -gnato mode, resulting in code insertions at a point where we
diff --git a/gcc/ada/exp_util.ads b/gcc/ada/exp_util.ads
index 86136458667..b82d40869b1 100644
--- a/gcc/ada/exp_util.ads
+++ b/gcc/ada/exp_util.ads
@@ -238,6 +238,15 @@ package Exp_Util is
    --  must be a free statement. If flag Is_Allocate is set, the generated
    --  routine is allocate, deallocate otherwise.
 
+   function Build_Abort_Undefer_Block
+     (Loc     : Source_Ptr;
+      Stmts   : List_Id;
+      Context : Node_Id) return Node_Id;
+   --  Wrap statements Stmts in a block where the AT END handler contains a
+   --  call to Abort_Undefer_Direct. Context is the node which prompted the
+   --  inlining of the abort undefer routine. Note that this routine does
+   --  not install a call to Abort_Defer.
+
    procedure Build_Procedure_Form (N : Node_Id);
    --  Create a procedure declaration which emulates the behavior of a function
    --  that returns an array type, for C-compatible generation.
@@ -280,6 +289,35 @@ package Exp_Util is
    --  is false, the call is for a stand-alone object, and the generated
    --  function itself must do its own cleanups.
 
+   procedure Build_Transient_Object_Statements
+     (Obj_Decl     : Node_Id;
+      Fin_Call     : out Node_Id;
+      Hook_Assign  : out Node_Id;
+      Hook_Clear   : out Node_Id;
+      Hook_Decl    : out Node_Id;
+      Ptr_Decl     : out Node_Id;
+      Finalize_Obj : Boolean := True);
+   --  Subsidiary to the processing of transient objects in transient scopes,
+   --  if expressions, case expressions, expression_with_action nodes, array
+   --  aggregates, and record aggregates. Obj_Decl denotes the declaration of
+   --  the transient object. Generate the following nodes:
+   --
+   --    * Fin_Call - the call to [Deep_]Finalize which cleans up the transient
+   --    object if flag Finalize_Obj is set to True, or finalizes the hook when
+   --    the flag is False.
+   --
+   --    * Hook_Assign - the assignment statement which captures a reference to
+   --    the transient object in the hook.
+   --
+   --    * Hook_Clear - the assignment statement which resets the hook to null
+   --
+   --    * Hook_Decl - the declaration of the hook object
+   --
+   --    * Ptr_Decl - the full type declaration of the hook type
+   --
+   --  These nodes are inserted in specific places depending on the context by
+   --  the various Process_Transient_xxx routines.
+
    procedure Check_Float_Op_Overflow (N : Node_Id);
    --  Called where we could have a floating-point binary operator where we
    --  must check for infinities if we are operating in Check_Float_Overflow
diff --git a/gcc/ada/freeze.adb b/gcc/ada/freeze.adb
index 31c77394949..d5e8540c0c6 100644
--- a/gcc/ada/freeze.adb
+++ b/gcc/ada/freeze.adb
@@ -23,51 +23,52 @@
 --                                                                          --
 ------------------------------------------------------------------------------
 
-with Aspects;  use Aspects;
-with Atree;    use Atree;
-with Checks;   use Checks;
-with Debug;    use Debug;
-with Einfo;    use Einfo;
-with Elists;   use Elists;
-with Errout;   use Errout;
-with Exp_Ch3;  use Exp_Ch3;
-with Exp_Ch7;  use Exp_Ch7;
-with Exp_Disp; use Exp_Disp;
-with Exp_Pakd; use Exp_Pakd;
-with Exp_Util; use Exp_Util;
-with Exp_Tss;  use Exp_Tss;
-with Fname;    use Fname;
-with Ghost;    use Ghost;
-with Layout;   use Layout;
-with Lib;      use Lib;
-with Namet;    use Namet;
-with Nlists;   use Nlists;
-with Nmake;    use Nmake;
-with Opt;      use Opt;
-with Restrict; use Restrict;
-with Rident;   use Rident;
-with Rtsfind;  use Rtsfind;
-with Sem;      use Sem;
-with Sem_Aux;  use Sem_Aux;
-with Sem_Cat;  use Sem_Cat;
-with Sem_Ch6;  use Sem_Ch6;
-with Sem_Ch7;  use Sem_Ch7;
-with Sem_Ch8;  use Sem_Ch8;
-with Sem_Ch13; use Sem_Ch13;
-with Sem_Eval; use Sem_Eval;
-with Sem_Mech; use Sem_Mech;
-with Sem_Prag; use Sem_Prag;
-with Sem_Res;  use Sem_Res;
-with Sem_Util; use Sem_Util;
-with Sinfo;    use Sinfo;
-with Snames;   use Snames;
-with Stand;    use Stand;
-with Targparm; use Targparm;
-with Tbuild;   use Tbuild;
-with Ttypes;   use Ttypes;
-with Uintp;    use Uintp;
-with Urealp;   use Urealp;
-with Warnsw;   use Warnsw;
+with Aspects;   use Aspects;
+with Atree;     use Atree;
+with Checks;    use Checks;
+with Contracts; use Contracts;
+with Debug;     use Debug;
+with Einfo;     use Einfo;
+with Elists;    use Elists;
+with Errout;    use Errout;
+with Exp_Ch3;   use Exp_Ch3;
+with Exp_Ch7;   use Exp_Ch7;
+with Exp_Disp;  use Exp_Disp;
+with Exp_Pakd;  use Exp_Pakd;
+with Exp_Util;  use Exp_Util;
+with Exp_Tss;   use Exp_Tss;
+with Fname;     use Fname;
+with Ghost;     use Ghost;
+with Layout;    use Layout;
+with Lib;       use Lib;
+with Namet;     use Namet;
+with Nlists;    use Nlists;
+with Nmake;     use Nmake;
+with Opt;       use Opt;
+with Restrict;  use Restrict;
+with Rident;    use Rident;
+with Rtsfind;   use Rtsfind;
+with Sem;       use Sem;
+with Sem_Aux;   use Sem_Aux;
+with Sem_Cat;   use Sem_Cat;
+with Sem_Ch6;   use Sem_Ch6;
+with Sem_Ch7;   use Sem_Ch7;
+with Sem_Ch8;   use Sem_Ch8;
+with Sem_Ch13;  use Sem_Ch13;
+with Sem_Eval;  use Sem_Eval;
+with Sem_Mech;  use Sem_Mech;
+with Sem_Prag;  use Sem_Prag;
+with Sem_Res;   use Sem_Res;
+with Sem_Util;  use Sem_Util;
+with Sinfo;     use Sinfo;
+with Snames;    use Snames;
+with Stand;     use Stand;
+with Targparm;  use Targparm;
+with Tbuild;    use Tbuild;
+with Ttypes;    use Ttypes;
+with Uintp;     use Uintp;
+with Urealp;    use Urealp;
+with Warnsw;    use Warnsw;
 
 package body Freeze is
 
@@ -129,7 +130,7 @@ package body Freeze is
 
    procedure Check_Inherited_Conditions (R : Entity_Id);
    --  For a tagged derived type, create wrappers for inherited operations
-   --  that have a classwide condition, so it can be properly rewritten if
+   --  that have a class-wide condition, so it can be properly rewritten if
    --  it involves calls to other overriding primitives.
 
    procedure Check_Strict_Alignment (E : Entity_Id);
@@ -1403,35 +1404,62 @@ package body Freeze is
       while Present (Op_Node) loop
          Prim := Node (Op_Node);
 
-         --  In SPARK mode this is where we can collect the inherited
-         --  conditions, because we do not create the Check pragmas that
-         --  normally convey the modified classwide conditions on overriding
-         --  operations.
+         --  Map the overridden primitive to the overriding one. This takes
+         --  care of all overridings and is done only once.
 
-         if SPARK_Mode = On
-           and then Comes_From_Source (Prim)
-           and then Present (Overridden_Operation (Prim))
+         if Present (Overridden_Operation (Prim))
+            and then Comes_From_Source (Prim)
          then
-            Collect_Inherited_Class_Wide_Conditions (Prim);
+            Update_Primitives_Mapping (Overridden_Operation (Prim), Prim);
+
+            --  In SPARK mode this is where we can collect the inherited
+            --  conditions, because we do not create the Check pragmas that
+            --  normally convey the the modified class-wide conditions on
+            --  overriding operations.
+
+            if SPARK_Mode = On then
+
+               --  Analyze the contract items of the parent operation, before
+               --  they are rewritten when inherited.
+
+               Analyze_Entry_Or_Subprogram_Contract
+                 (Overridden_Operation (Prim));
+
+               --  Now verify the legality of inherited contracts for LSP
+               --  conformance.
+
+               Collect_Inherited_Class_Wide_Conditions (Prim);
+            end if;
          end if;
 
-         --  In normal mode, we examine inherited operations to check whether
-         --  they require a wrapper to handle inherited conditions that call
-         --  other primitives.
-         --  Wrapper construction TBD.
+         Next_Elmt (Op_Node);
+      end loop;
+
+      --  In all cases, we examine inherited operations to check whether they
+      --  require a wrapper to handle inherited conditions that call other
+      --  primitives, so that LSP can be verified/enforced.
 
-         if not Comes_From_Source (Prim) and then Present (Alias (Prim)) then
+      --  Wrapper construction TBD.
+
+      Op_Node := First_Elmt (Prim_Ops);
+      while Present (Op_Node) loop
+         Prim := Node (Op_Node);
+         if not Comes_From_Source (Prim)
+           and then Present (Alias (Prim))
+         then
             Par_Prim := Alias (Prim);
             A_Pre    := Find_Aspect (Par_Prim, Aspect_Pre);
 
             if Present (A_Pre) and then Class_Present (A_Pre) then
-               Build_Classwide_Expression (Expression (A_Pre), Prim);
+               Build_Class_Wide_Expression
+                 (Expression (A_Pre), Prim, Par_Prim, Adjust_Sloc => False);
             end if;
 
             A_Post := Find_Aspect (Par_Prim, Aspect_Post);
 
             if Present (A_Post) and then Class_Present (A_Post) then
-               Build_Classwide_Expression (Expression (A_Post), Prim);
+               Build_Class_Wide_Expression
+                 (Expression (A_Post), Prim, Par_Prim, Adjust_Sloc => False);
             end if;
          end if;
 
@@ -2762,7 +2790,7 @@ package body Freeze is
 
          if Is_Bit_Packed_Array (Arr) then
 
-            --  Check number of elements for bit packed arrays that come from
+            --  Check number of elements for bit-packed arrays that come from
             --  source and have compile time known ranges. The bit-packed
             --  arrays circuitry does not support arrays with more than
             --  Integer'Last + 1 elements, and when this restriction is
@@ -2844,7 +2872,7 @@ package body Freeze is
 
          --  If any of the index types was an enumeration type with a non-
          --  standard rep clause, then we indicate that the array type is
-         --  always packed (even if it is not bit packed).
+         --  always packed (even if it is not bit-packed).
 
          if Non_Standard_Enum then
             Set_Has_Non_Standard_Rep (Base_Type (Arr));
@@ -2853,7 +2881,7 @@ package body Freeze is
 
          Set_Component_Alignment_If_Not_Set (Arr);
 
-         --  If the array is packed and bit packed or packed to eliminate holes
+         --  If the array is packed and bit-packed or packed to eliminate holes
          --  in the non-contiguous enumeration index types, we must create the
          --  packed array type to be used to actually implement the type. This
          --  is only needed for real array types (not for string literal types,
@@ -3544,32 +3572,11 @@ package body Freeze is
          Junk : Boolean;
          pragma Warnings (Off, Junk);
 
-         Rec_Pushed : Boolean := False;
-         --  Set True if the record type scope Rec has been pushed on the scope
-         --  stack. Needed for the analysis of delayed aspects specified to the
-         --  components of Rec.
-
-         SSO_ADC : Node_Id;
-         --  Scalar_Storage_Order attribute definition clause for the record
-
-         Unplaced_Component : Boolean := False;
-         --  Set True if we find at least one component with no component
-         --  clause (used to warn about useless Pack pragmas).
-
-         Placed_Component : Boolean := False;
-         --  Set True if we find at least one component with a component
-         --  clause (used to warn about useless Bit_Order pragmas, and also
-         --  to detect cases where Implicit_Packing may have an effect).
-
          Aliased_Component : Boolean := False;
          --  Set True if we find at least one component which is aliased. This
          --  is used to prevent Implicit_Packing of the record, since packing
          --  cannot modify the size of alignment of an aliased component.
 
-         SSO_ADC_Component : Boolean := False;
-         --  Set True if we find at least one component whose type has a
-         --  Scalar_Storage_Order attribute definition clause.
-
          All_Elem_Components : Boolean := True;
          --  Set False if we encounter a component of a composite type
 
@@ -3584,10 +3591,31 @@ package body Freeze is
          --  Accumulates total Esize values of all elementary components. Used
          --  for processing of Implicit_Packing.
 
+         Placed_Component : Boolean := False;
+         --  Set True if we find at least one component with a component
+         --  clause (used to warn about useless Bit_Order pragmas, and also
+         --  to detect cases where Implicit_Packing may have an effect).
+
+         Rec_Pushed : Boolean := False;
+         --  Set True if the record type scope Rec has been pushed on the scope
+         --  stack. Needed for the analysis of delayed aspects specified to the
+         --  components of Rec.
+
          Sized_Component_Total_RM_Size : Uint := Uint_0;
          --  Accumulates total RM_Size values of all sized components. Used
          --  for processing of Implicit_Packing.
 
+         SSO_ADC : Node_Id;
+         --  Scalar_Storage_Order attribute definition clause for the record
+
+         SSO_ADC_Component : Boolean := False;
+         --  Set True if we find at least one component whose type has a
+         --  Scalar_Storage_Order attribute definition clause.
+
+         Unplaced_Component : Boolean := False;
+         --  Set True if we find at least one component with no component
+         --  clause (used to warn about useless Pack pragmas).
+
          function Check_Allocator (N : Node_Id) return Node_Id;
          --  If N is an allocator, possibly wrapped in one or more level of
          --  qualified expression(s), return the inner allocator node, else
@@ -4312,7 +4340,7 @@ package body Freeze is
          --  component clauses, where we must check the size. This is not done
          --  till the freeze point since for fixed-point types, we do not know
          --  the size until the type is frozen. Similar processing applies to
-         --  bit packed arrays.
+         --  bit-packed arrays.
 
          if Is_First_Subtype (Rec) then
             Comp := First_Component (Rec);
@@ -4396,16 +4424,18 @@ package body Freeze is
 
            --  We want to implicitly pack if the specified size of the record
            --  is less than the sum of the object sizes (no point in packing
-           --  if this is not the case) if we can compute it, i.e. if we have
+           --  if this is not the case), if we can compute it, i.e. if we have
            --  only elementary components. Otherwise, we have at least one
-           --  composite component and we want to implicit pack only if bit
+           --  composite component and we want to implicitly pack only if bit
            --  packing is required for it, as we are sure in this case that
            --  the back end cannot do the expected layout without packing.
 
-           and then ((All_Elem_Components
-                       and then RM_Size (Rec) < Elem_Component_Total_Esize)
-                     or else (not All_Elem_Components
-                               and then not All_Storage_Unit_Components))
+           and then
+              ((All_Elem_Components
+                 and then RM_Size (Rec) < Elem_Component_Total_Esize)
+             or else
+               (not All_Elem_Components
+                 and then not All_Storage_Unit_Components))
 
            --  And the total RM size cannot be greater than the specified size
            --  since otherwise packing will not get us where we have to be.
@@ -4633,7 +4663,7 @@ package body Freeze is
          end if;
 
          --  For a derived tagged type, check whether inherited primitives
-         --  might require a wrapper to handle classwide conditions.
+         --  might require a wrapper to handle class-wide conditions.
 
          if Is_Tagged_Type (Rec) and then Is_Derived_Type (Rec) then
             Check_Inherited_Conditions (Rec);
@@ -4926,6 +4956,12 @@ package body Freeze is
          Ghost_Mode := Save_Ghost_Mode;
          return No_List;
 
+      elsif Ekind (E) = E_Generic_Package then
+         Result := Freeze_Generic_Entities (E);
+
+         Ghost_Mode := Save_Ghost_Mode;
+         return Result;
+
       --  It is improper to freeze an external entity within a generic because
       --  its freeze node will appear in a non-valid context. The entity will
       --  be frozen in the proper scope after the current generic is analyzed.
@@ -5035,12 +5071,6 @@ package body Freeze is
                return No_List;
             end if;
          end;
-
-      elsif Ekind (E) = E_Generic_Package then
-         Result := Freeze_Generic_Entities (E);
-
-         Ghost_Mode := Save_Ghost_Mode;
-         return Result;
       end if;
 
       --  Add checks to detect proper initialization of scalars that may appear
@@ -5121,13 +5151,7 @@ package body Freeze is
 
             --  This processing doesn't apply to internal entities (see below)
 
-            --  Disable this mechanism for now, to fix regressions in ASIS and
-            --  various ACATS tests. Implementation of AI05-019 remains
-            --  unsolved ???
-
-            if not Is_Internal (E)
-              and then (Do_Freeze_Profile or else True)
-            then
+            if not Is_Internal (E) and then Do_Freeze_Profile then
                if not Freeze_Profile (E) then
                   Ghost_Mode := Save_Ghost_Mode;
                   return Result;
@@ -5444,20 +5468,21 @@ package body Freeze is
                      --  the RM_Size of the component type.
 
                      if RM_Size (E) = Num_Elmts * Rsiz then
+
                         --  For implicit packing mode, just set the component
                         --  size and Freeze_Array_Type will do the rest.
 
                         if Implicit_Packing then
                            Set_Component_Size (Btyp, Rsiz);
 
-                           --  Otherwise give an error message
+                        --  Otherwise give an error message
 
                         else
                            Error_Msg_NE
                              ("size given for& too small", SZ, E);
                            Error_Msg_N -- CODEFIX
-                             ("\use explicit pragma Pack "
-                              & "or use pragma Implicit_Packing", SZ);
+                             ("\use explicit pragma Pack or use pragma "
+                              & "Implicit_Packing", SZ);
                         end if;
                      end if;
                   end if;
diff --git a/gcc/ada/frontend.adb b/gcc/ada/frontend.adb
index 38619035761..ff5418a1340 100644
--- a/gcc/ada/frontend.adb
+++ b/gcc/ada/frontend.adb
@@ -410,9 +410,12 @@ begin
 
          --  Comment needed for ASIS mode test and GNATprove mode test???
 
+         pragma Assert
+           (Operating_Mode = Generate_Code
+             or else Operating_Mode = Check_Semantics);
+
          if Operating_Mode = Generate_Code
-           or else (Operating_Mode = Check_Semantics
-                     and then (ASIS_Mode or GNATprove_Mode))
+           or else (ASIS_Mode or GNATprove_Mode)
          then
             Instantiate_Bodies;
          end if;
diff --git a/gcc/ada/g-debpoo.adb b/gcc/ada/g-debpoo.adb
index c5664a9939d..f7d3c2df70e 100644
--- a/gcc/ada/g-debpoo.adb
+++ b/gcc/ada/g-debpoo.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -101,6 +101,9 @@ package body GNAT.Debug_Pools is
    --  If True, protects Deallocate against releasing memory allocated before
    --  System_Memory_Debug_Pool_Enabled was set.
 
+   Traceback_Count : Byte_Count := 0;
+   --  Total number of traceback elements
+
    ---------------------------
    -- Back Trace Hash Table --
    ---------------------------
@@ -332,6 +335,10 @@ package body GNAT.Debug_Pools is
       pragma Inline (Set_Valid);
       --  Mark the address Storage as being under control of the memory pool
       --  (if Value is True), or not (if Value is False).
+
+      Validity_Count : Byte_Count := 0;
+      --  Total number of validity elements
+
    end Validity;
 
    use Validity;
@@ -630,6 +637,7 @@ package body GNAT.Debug_Pools is
                      Frees       => 0,
                      Total_Frees => 0,
                      Next        => null);
+            Traceback_Count := Traceback_Count + 1;
             Backtrace_Htable.Set (Elem);
 
          else
@@ -845,6 +853,7 @@ package body GNAT.Debug_Pools is
 
             if Value then
                Ptr := new Validity_Bits;
+               Validity_Count := Validity_Count + 1;
                Ptr.Valid :=
                  To_Pointer (Alloc (size_t (Max_Validity_Byte_Index)));
                Validy_Htable.Set (Block_Number, Ptr);
@@ -1180,7 +1189,10 @@ package body GNAT.Debug_Pools is
 
       begin
          while Tmp /= System.Null_Address
-           and then Total_Freed < Pool.Minimum_To_Free
+           and then
+             not (Total_Freed > Pool.Minimum_To_Free
+                   and Pool.Logically_Deallocated <
+                         Byte_Count (Pool.Maximum_Logically_Freed_Memory))
          loop
             Header := Header_Of (Tmp);
 
@@ -1188,12 +1200,12 @@ package body GNAT.Debug_Pools is
             --  referenced anywhere, we can free it physically.
 
             if Ignore_Marks or else not Marked (Tmp) then
-
                declare
                   pragma Suppress (All_Checks);
                   --  Suppress the checks on this section. If they are overflow
                   --  errors, it isn't critical, and we'd rather avoid a
                   --  Constraint_Error in that case.
+
                begin
                   --  Note that block_size < zero for freed blocks
 
@@ -1238,7 +1250,7 @@ package body GNAT.Debug_Pools is
                   Header_Of (Previous).Next := Next;
                end if;
 
-               Tmp  := Next;
+               Tmp := Next;
 
             else
                Previous := Tmp;
@@ -1908,7 +1920,7 @@ package body GNAT.Debug_Pools is
          --  Sorted array for the biggest memory users
 
       begin
-         New_Line;
+         Put_Line ("");
          case Sort is
             when Memory_Usage | All_Reports  =>
                Put_Line (Size'Img & " biggest memory users at this time:");
@@ -2010,14 +2022,17 @@ package body GNAT.Debug_Pools is
             end;
 
             for J in Max (M).Traceback'Range loop
-               Put (Image_C (PC_For (Max (M).Traceback (J))));
+               Put (" " & Image_C (PC_For (Max (M).Traceback (J))));
             end loop;
 
-            New_Line;
+            Put_Line ("");
          end loop;
       end Do_Report;
 
    begin
+      Put_Line ("Traceback elements allocated: " & Traceback_Count'Img);
+      Put_Line ("Validity elements allocated: " & Validity_Count'Img);
+      Put_Line ("");
 
       Put_Line ("Ada Allocs:" & Pool.Allocated'Img
                 & " bytes in" & Pool.Alloc_Count'Img & " chunks");
diff --git a/gcc/ada/g-dynhta.adb b/gcc/ada/g-dynhta.adb
index 449ac17dec4..10931cc7d25 100644
--- a/gcc/ada/g-dynhta.adb
+++ b/gcc/ada/g-dynhta.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---                     Copyright (C) 2002-2015, AdaCore                     --
+--                     Copyright (C) 2002-2016, AdaCore                     --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -57,8 +57,8 @@ package body GNAT.Dynamic_HTables is
       -- Get --
       ---------
 
-      function  Get (T : Instance; K : Key) return Elmt_Ptr is
-         Elmt  : Elmt_Ptr;
+      function Get (T : Instance; K : Key) return Elmt_Ptr is
+         Elmt : Elmt_Ptr;
 
       begin
          if T = null then
@@ -224,7 +224,7 @@ package body GNAT.Dynamic_HTables is
       -- Get --
       ---------
 
-      function  Get (T : Instance; K : Key) return Element is
+      function Get (T : Instance; K : Key) return Element is
          Tmp : Elmt_Ptr;
 
       begin
diff --git a/gcc/ada/g-forstr.ads b/gcc/ada/g-forstr.ads
index 94c295c7251..88856a35b3a 100644
--- a/gcc/ada/g-forstr.ads
+++ b/gcc/ada/g-forstr.ads
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 S p e c                                  --
 --                                                                          --
---             Copyright (C) 2014, Free Software Foundation, Inc.           --
+--           Copyright (C) 2014-2016, Free Software Foundation, Inc.        --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -29,10 +29,22 @@
 --                                                                          --
 ------------------------------------------------------------------------------
 
---  This package add support for formatted string as supported by C printf().
+--  This package add support for formatted string as supported by C printf()
 
 --  A simple usage is:
-
+--
+--     Put_Line (-(+"%s" & "a string"));
+--
+--  or with a constant for the format:
+--
+--     declare
+--       Format : constant Formatted_String := +"%s";
+--     begin
+--       Put_Line (-(Format & "a string"));
+--     end;
+--
+--  Finally a more complex example:
+--
 --     declare
 --        F : Formatted_String := +"['%c' ; %10d]";
 --        C : Character := 'v';
@@ -132,7 +144,12 @@ package GNAT.Formatted_String is
    use Ada;
 
    type Formatted_String (<>) is private;
-   --  A format string as defined for printf routine
+   --  A format string as defined for printf routine. This string is the
+   --  actual format for all the parameters added with the "&" routines below.
+   --  Note that a Formatted_String object can't be reused as it serves as
+   --  recipient for the final result. That is, each use of "&" will build
+   --  incrementally the final result string which can be retrieved with
+   --  the "-" routine below.
 
    Format_Error : exception;
    --  Raised for every mismatch between the parameter and the expected format
diff --git a/gcc/ada/g-sechas.adb b/gcc/ada/g-sechas.adb
index 0e70b5dd48f..f2e8d5d1a06 100644
--- a/gcc/ada/g-sechas.adb
+++ b/gcc/ada/g-sechas.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 2009-2014, Free Software Foundation, Inc.         --
+--          Copyright (C) 2009-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -341,6 +341,20 @@ package body GNAT.Secure_Hashes is
          end return;
       end HMAC_Initial_Context;
 
+      ----------
+      -- Read --
+      ----------
+
+      procedure Read
+        (Stream : in out Hash_Stream;
+         Item   : out Stream_Element_Array;
+         Last   : out Stream_Element_Offset)
+      is
+         pragma Unreferenced (Stream, Item, Last);
+      begin
+         raise Program_Error with "Hash_Stream is write-only";
+      end Read;
+
       ------------
       -- Update --
       ------------
@@ -364,7 +378,6 @@ package body GNAT.Secure_Hashes is
                C.M_State.Last := 0;
             end if;
          end loop;
-
       end Update;
 
       ------------
@@ -422,6 +435,18 @@ package body GNAT.Secure_Hashes is
          return Digest (C);
       end Wide_Digest;
 
+      -----------
+      -- Write --
+      -----------
+
+      procedure Write
+         (Stream : in out Hash_Stream;
+          Item   : Stream_Element_Array)
+      is
+      begin
+         Update (Stream.C.all, Item);
+      end Write;
+
    end H;
 
    -------------------------
diff --git a/gcc/ada/g-sechas.ads b/gcc/ada/g-sechas.ads
index c00150e17ba..33e635ce544 100644
--- a/gcc/ada/g-sechas.ads
+++ b/gcc/ada/g-sechas.ads
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 S p e c                                  --
 --                                                                          --
---          Copyright (C) 2009-2014, Free Software Foundation, Inc.         --
+--          Copyright (C) 2009-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -191,6 +191,12 @@ package GNAT.Secure_Hashes is
       --  Wide_Update) on a default initialized Context, followed by Digest
       --  on the resulting Context.
 
+      type Hash_Stream (C : access Context) is
+        new Root_Stream_Type with private;
+      --  Stream wrapper converting Write calls to Update calls on C.
+      --  Arbitrary data structures can thus be conveniently hashed using
+      --  their stream attributes.
+
    private
 
       Block_Length : constant Natural := Block_Words * Word_Length;
@@ -215,6 +221,20 @@ package GNAT.Secure_Hashes is
       Initial_Context : constant Context (KL => 0) := (others => <>);
       --  Initial values are provided by default initialization of Context
 
+      type Hash_Stream (C : access Context) is
+        new Root_Stream_Type with null record;
+
+      procedure Read
+        (Stream : in out Hash_Stream;
+         Item   : out Stream_Element_Array;
+         Last   : out Stream_Element_Offset);
+      --  Raise Program_Error: hash streams are write-only
+
+      procedure Write
+         (Stream : in out Hash_Stream;
+          Item   : Stream_Element_Array);
+      --  Call Update
+
    end H;
 
 end GNAT.Secure_Hashes;
diff --git a/gcc/ada/g-sercom-mingw.adb b/gcc/ada/g-sercom-mingw.adb
index 292ca8f563e..dabbfcfd405 100644
--- a/gcc/ada/g-sercom-mingw.adb
+++ b/gcc/ada/g-sercom-mingw.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---                    Copyright (C) 2007-2013, AdaCore                      --
+--                    Copyright (C) 2007-2016, AdaCore                      --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -248,10 +248,24 @@ package body GNAT.Serial_Communications is
          Raise_Error ("cannot set comm state");
       end if;
 
-      --  Set the timeout status
+      --  Set the timeout status, to honor our spec with respect to read
+      --  timeouts. Always disconnect write timeouts.
+
+      --  Blocking reads - no timeout at all
 
       if Block then
          Com_Time_Out := (others => 0);
+
+      --  Non-blocking reads and null timeout - immediate return with what we
+      --  have - set ReadIntervalTimeout to MAXDWORD.
+
+      elsif Timeout = 0.0 then
+         Com_Time_Out :=
+           (ReadIntervalTimeout => DWORD'Last,
+            others              => 0);
+
+      --  Non-blocking reads with timeout - set total read timeout accordingly
+
       else
          Com_Time_Out :=
            (ReadTotalTimeoutConstant => DWORD (1000 * Timeout),
diff --git a/gcc/ada/g-socket.ads b/gcc/ada/g-socket.ads
index 5de70d810dc..9957e2ca49b 100644
--- a/gcc/ada/g-socket.ads
+++ b/gcc/ada/g-socket.ads
@@ -1005,7 +1005,11 @@ package GNAT.Sockets is
    --  Same interface as Ada.Streams.Stream_IO
 
    function Stream (Socket : Socket_Type) return Stream_Access;
-   --  Create a stream associated with an already connected stream-based socket
+   --  Create a stream associated with a connected stream-based socket.
+   --  Note: keep in mind that the default stream attributes for composite
+   --  types perform separate Read/Write operations for each component,
+   --  recursively. If performance is an issue, you may want to consider
+   --  introducing a buffering stage.
 
    function Stream
      (Socket  : Socket_Type;
diff --git a/gcc/ada/gcc-interface/Makefile.in b/gcc/ada/gcc-interface/Makefile.in
index 8996dd1bef1..0df7f899278 100644
--- a/gcc/ada/gcc-interface/Makefile.in
+++ b/gcc/ada/gcc-interface/Makefile.in
@@ -444,6 +444,15 @@ EXTRA_LIBGNAT_OBJS=
 # specific header files required to rebuild the runtime library from sources.
 EXTRA_LIBGNAT_SRCS=
 
+# Subsets of extra libgnat sources that always go together
+VX_SIGTRAMP_EXTRA_SRCS=sigtramp.h sigtramp-vxworks-target.inc
+
+# Additional object files that should go in the same directory as libgnat,
+# aside the library itself. Typically useful for crtbegin/crtend kind of files.
+EXTRA_ADALIB_OBJS=
+
+VX_CRTBE_EXTRA_ADALIB_OBJS=vx_crtbegin.o vx_crtbegin_auto.o vx_crtend.o
+
 # GCC spec files to be installed in $(libsubdir), so --specs=<spec-filename>
 # finds them at runtime. Sequences of alphanum characters prefixed with '_' in
 # the filename are stripped off at installation time. This is used to strip
@@ -571,7 +580,6 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworks vxworks7,$(target_cpu) $(target_
     system.ads<system-vxworks-$(ARCH_STR)-rtp.ads
 
     EH_MECHANISM=-gcc
-    EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o
   else
     ifeq ($(strip $(filter-out rtp-smp,$(THREAD_KIND))),)
       LIBGNAT_TARGET_PAIRS += \
@@ -582,8 +590,7 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworks vxworks7,$(target_cpu) $(target_
       system.ads<$(SVX)-$(ARCH_STR)-rtp-smp.ads
 
       EH_MECHANISM=-gcc
-      EXTRA_LIBGNAT_OBJS+=affinity.o sigtramp-vxworks.o
-      EXTRA_LIBGNAT_SRCS+=sigtramp.h
+      EXTRA_LIBGNAT_OBJS+=affinity.o
     else
       ifeq ($(strip $(filter-out kernel-smp,$(THREAD_KIND))),)
         LIBGNAT_TARGET_PAIRS += \
@@ -613,8 +620,6 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworks vxworks7,$(target_cpu) $(target_
         endif
       endif
       EXTRA_GNATRTL_NONTASKING_OBJS=i-vxwork.o i-vxwoio.o
-      EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o
-      EXTRA_LIBGNAT_SRCS+=sigtramp.h
     endif
   endif
 
@@ -622,8 +627,11 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworks vxworks7,$(target_cpu) $(target_
 
   EXTRA_LIBGNAT_OBJS+=vx_stack_info.o
 
+  EXTRA_ADALIB_OBJS+=$(VX_CRTBE_EXTRA_ADALIB_OBJS)
+  EXTRA_LIBGNAT_SRCS+=vx_crtbegin.inc
+  GCC_SPEC_FILES+=vxworks-gnat-crtbe-link.spec
+
   GCC_SPEC_FILES+=vxworks-$(ARCH_STR)-link.spec
-  GCC_SPEC_FILES+=vxworks-crtbe-link.spec
 endif
 
 # PowerPC and e500v2 VxWorks 653
@@ -661,6 +669,8 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworksae,$(target_cpu) $(target_vendor)
   $(ATOMICS_TARGET_PAIRS) \
   $(ATOMICS_BUILTINS_TARGET_PAIRS)
 
+  EH_MECHANISM=-gcc
+
   TOOLS_TARGET_PAIRS=\
   mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb \
   indepsw.adb<indepsw-gnu.adb
@@ -669,7 +679,7 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworksae,$(target_cpu) $(target_vendor)
   EXTRA_GNATRTL_TASKING_OBJS=s-vxwork.o s-vxwext.o
 
   EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o
-  EXTRA_LIBGNAT_SRCS+=sigtramp.h
+  EXTRA_LIBGNAT_SRCS+=$(VX_SIGTRAMP_EXTRA_SRCS)
 
   # Extra pairs for the vthreads runtime
   ifeq ($(strip $(filter-out vthreads,$(THREAD_KIND))),)
@@ -712,6 +722,7 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworksmils,$(target_cpu) $(target_vendo
   s-osinte.adb<s-osinte-vxworks.adb \
   s-osinte.ads<s-osinte-vxworks.ads \
   s-osprim.adb<s-osprim-vxworks.adb \
+  s-osvers.ads<s-osvers-vxworks-mils.ads \
   s-parame.ads<s-parame-ae653.ads \
   s-parame.adb<s-parame-vxworks.adb \
   s-stchop.adb<s-stchop-vxworks.adb \
@@ -720,7 +731,6 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworksmils,$(target_cpu) $(target_vendo
   s-tasinf.ads<s-tasinf-vxworks.ads \
   s-taspri.ads<s-taspri-vxworks.ads \
   s-thread.adb<s-thread-ae653.adb \
-  s-osvers.ads<s-osvers-vxworks-mils.ads \
   s-tpopsp.adb<s-tpopsp-vxworks.adb \
   s-vxwork.ads<s-vxwork-ppc.ads \
   system.ads<system-vxworks-ppc-mils.ads \
@@ -735,8 +745,11 @@ ifeq ($(strip $(filter-out powerpc% wrs vxworksmils,$(target_cpu) $(target_vendo
   EXTRA_GNATRTL_NONTASKING_OBJS=i-vxwork.o i-vxwoio.o s-thread.o s-osvers.o
   EXTRA_GNATRTL_TASKING_OBJS=s-vxwork.o s-vxwext.o
 
-  EXTRA_LIBGNAT_OBJS+=vx_stack_info.o sigtramp-vxworks.o
-  EXTRA_LIBGNAT_SRCS+=sigtramp.h
+  EXTRA_LIBGNAT_OBJS+=vx_stack_info.o
+
+  EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o
+  EXTRA_LIBGNAT_SRCS+=$(VX_SIGTRAMP_EXTRA_SRCS)
+
   GNATRTL_SOCKETS_OBJS =
 
   ifeq ($(strip $(filter-out yes,$(TRACE))),)
@@ -777,6 +790,8 @@ ifeq ($(strip $(filter-out %86 wrs vxworksae,$(target_cpu) $(target_vendor) $(ta
   $(ATOMICS_TARGET_PAIRS) \
   $(ATOMICS_BUILTINS_TARGET_PAIRS)
 
+  EH_MECHANISM=-gcc
+
   TOOLS_TARGET_PAIRS=\
   mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb \
   indepsw.adb<indepsw-gnu.adb
@@ -865,21 +880,26 @@ ifeq ($(strip $(filter-out sparc% wrs vx%,$(target_cpu) $(target_vendor) $(targe
   EXTRA_LIBGNAT_OBJS+=vx_stack_info.o
 endif
 
-# x86 VxWorks
-ifeq ($(strip $(filter-out %86 wrs vxworks vxworks7,$(target_cpu) $(target_vendor) $(target_os))),)
+# x86/x86_64 VxWorks
+ifeq ($(strip $(filter-out %86 x86_64 wrs vxworks vxworks7,$(target_cpu) $(target_vendor) $(target_os))),)
+
+  EH_MECHANISM=-gcc
 
   ifeq ($(strip $(filter-out vxworks7%, $(target_os))),)
      SVX=system-vxworks7
   else
      SVX=system-vxworks
-     EH_MECHANISM=-gcc
   endif
 
-  EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o sigtramp-vxworks-vxsim.o
-  EXTRA_LIBGNAT_OBJS+=init-vxsim.o
-  EXTRA_LIBGNAT_SRCS+=sigtramp.h sigtramp-vxworks-target.inc
+  ifeq ($(strip $(filter-out x86_64, $(target_cpu))),)
+     X86CPU=x86_64
+     LIBGNAT_TARGET_PAIRS=$(X86_64_TARGET_PAIRS)
+  else
+     X86CPU=x86
+     LIBGNAT_TARGET_PAIRS=$(X86_TARGET_PAIRS)
+  endif
 
-  LIBGNAT_TARGET_PAIRS = \
+  LIBGNAT_TARGET_PAIRS+= \
   a-intnam.ads<a-intnam-vxworks.ads \
   i-vxwork.ads<i-vxwork-x86.ads \
   s-osinte.adb<s-osinte-vxworks.adb \
@@ -900,7 +920,9 @@ ifeq ($(strip $(filter-out %86 wrs vxworks vxworks7,$(target_cpu) $(target_vendo
   g-socthi.adb<g-socthi-vxworks.adb \
   g-stsifd.adb<g-stsifd-sockets.adb \
   $(ATOMICS_TARGET_PAIRS) \
-  $(X86_TARGET_PAIRS)
+  $(CERTMATH_TARGET_PAIRS) \
+  $(CERTMATH_TARGET_PAIRS_SQRT_FPU) \
+  $(CERTMATH_TARGET_PAIRS_X86TRA)
 
   TOOLS_TARGET_PAIRS=\
   mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb \
@@ -933,23 +955,23 @@ ifeq ($(strip $(filter-out %86 wrs vxworks vxworks7,$(target_cpu) $(target_vendo
   # runtime to be called if a program is running on VxSim vs real hardware
   # (due to differences in signal context for unwinding).
 
-  VXSIM_CPU =
-
-  ifeq ($(strip $(filter-out vxworks rtp rtp-smp,$(target_os) $(THREAD_KIND))),)
+  ifneq ($(strip $(filter-out vxworks7, $(target_os))),)
+    ifeq ($(strip $(filter-out vxworks rtp rtp-smp,$(target_os) $(THREAD_KIND))),)
       VXSIM_CPU = SIMPENTIUM
-  else
-    ifeq ($(strip $(filter-out kernel kernel-smp rtp rtp-smp,$(THREAD_KIND))),)
-      ifeq ($(strip $(filter-out linux%,$(host_os))),)
-        # Linux
-        VXSIM_CPU = SIMLINUX
-      else
-        # Windows
-        VXSIM_CPU = SIMNT
+    else
+      ifeq ($(strip $(filter-out kernel kernel-smp rtp rtp-smp,$(THREAD_KIND))),)
+        ifeq ($(strip $(filter-out linux%,$(host_os))),)
+          # Linux
+          VXSIM_CPU = SIMLINUX
+        else
+          # Windows
+          VXSIM_CPU = SIMNT
+        endif
       endif
     endif
-  endif
 
-  GNATLIBCFLAGS_FOR_C := $(GNATLIBCFLAGS_FOR_C) -D__VXSIM_CPU__=$(VXSIM_CPU)
+    GNATLIBCFLAGS_FOR_C := $(GNATLIBCFLAGS_FOR_C) -D__VXSIM_CPU__=$(VXSIM_CPU)
+  endif
 
   ifeq ($(strip $(filter-out rtp,$(THREAD_KIND))),)
     # Runtime N/A for VxWorks7 (non-existent system file)
@@ -957,7 +979,7 @@ ifeq ($(strip $(filter-out %86 wrs vxworks vxworks7,$(target_cpu) $(target_vendo
     s-vxwext.ads<s-vxwext-rtp.ads \
     s-vxwext.adb<s-vxwext-rtp.adb \
     s-tpopsp.adb<s-tpopsp-vxworks-rtp.adb \
-    system.ads<$(SVX)-x86-rtp.ads
+    system.ads<system-vxworks-x86-rtp.ads
   else
     ifeq ($(strip $(filter-out rtp-smp, $(THREAD_KIND))),)
       LIBGNAT_TARGET_PAIRS += \
@@ -965,7 +987,7 @@ ifeq ($(strip $(filter-out %86 wrs vxworks vxworks7,$(target_cpu) $(target_vendo
       s-vxwext.ads<s-vxwext-rtp.ads \
       s-vxwext.adb<s-vxwext-rtp-smp.adb \
       s-tpopsp.adb<s-tpopsp-vxworks-tls.adb \
-      system.ads<$(SVX)-x86-rtp-smp.ads
+      system.ads<$(SVX)-$(X86CPU)-rtp-smp.ads
 
       EXTRA_LIBGNAT_OBJS+=affinity.o
     else
@@ -976,7 +998,7 @@ ifeq ($(strip $(filter-out %86 wrs vxworks vxworks7,$(target_cpu) $(target_vendo
         s-tpopsp.adb<s-tpopsp-vxworks-tls.adb \
         s-vxwext.ads<s-vxwext-kernel.ads \
         s-vxwext.adb<s-vxwext-kernel-smp.adb \
-        system.ads<$(SVX)-x86-kernel.ads
+        system.ads<$(SVX)-$(X86CPU)-kernel.ads
 
         EXTRA_LIBGNAT_OBJS+=affinity.o
       else
@@ -999,12 +1021,21 @@ ifeq ($(strip $(filter-out %86 wrs vxworks vxworks7,$(target_cpu) $(target_vendo
       EXTRA_GNATRTL_NONTASKING_OBJS=i-vxwork.o i-vxwoio.o
     endif
   endif
+
+  EXTRA_GNATRTL_NONTASKING_OBJS += \
+    $(CERTMATH_GNATRTL_OBJS) $(CERTMATH_GNATRTL_X86TRA_OBJS)
   EXTRA_GNATRTL_TASKING_OBJS += s-vxwork.o s-vxwext.o
 
   EXTRA_LIBGNAT_OBJS+=vx_stack_info.o
 
+  EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o
+  EXTRA_LIBGNAT_SRCS+=$(VX_SIGTRAMP_EXTRA_SRCS)
+
+  EXTRA_ADALIB_OBJS+=$(VX_CRTBE_EXTRA_ADALIB_OBJS)
+  EXTRA_LIBGNAT_SRCS+=vx_crtbegin.inc
+  GCC_SPEC_FILES+=vxworks-gnat-crtbe-link.spec
+
   ifneq ($(strip $(filter-out vxworks7%, $(target_os))),)
-    GCC_SPEC_FILES+=vxworks-crtbe-link.spec
     GCC_SPEC_FILES+=vxworks-x86-link.spec
     GCC_SPEC_FILES+=vxworks-cert-x86-link.spec
     GCC_SPEC_FILES+=vxworks-smp-x86-link.spec
@@ -1016,8 +1047,12 @@ ifeq ($(strip $(filter-out arm% coff wrs vx%,$(target_cpu) $(target_vendor) $(ta
 
   ifeq ($(strip $(filter-out vxworks7%, $(target_os))),)
      SVX=system-vxworks7
+     EH_MECHANISM=-arm
+     SIGTRAMP_OBJ=sigtramp-armvxworks.o
   else
      SVX=system-vxworks
+     EH_MECHANISM=-gcc
+     SIGTRAMP_OBJ=sigtramp-vxworks.o
   endif
 
   LIBGNAT_TARGET_PAIRS = \
@@ -1047,8 +1082,6 @@ ifeq ($(strip $(filter-out arm% coff wrs vx%,$(target_cpu) $(target_vendor) $(ta
   indepsw.adb<indepsw-gnu.adb
 
   ifeq ($(strip $(filter-out rtp-smp,$(THREAD_KIND))),)
-    EH_MECHANISM=-gcc
-
     LIBGNAT_TARGET_PAIRS += \
     s-mudido.adb<s-mudido-affinity.adb \
     s-vxwext.ads<s-vxwext-rtp.ads \
@@ -1056,35 +1089,35 @@ ifeq ($(strip $(filter-out arm% coff wrs vx%,$(target_cpu) $(target_vendor) $(ta
     s-tpopsp.adb<s-tpopsp-vxworks-tls.adb \
     system.ads<$(SVX)-arm-rtp-smp.ads
 
-    EXTRA_LIBGNAT_OBJS+=affinity.o sigtramp-vxworks.o
-    EXTRA_LIBGNAT_SRCS+=sigtramp.h
+    EXTRA_LIBGNAT_OBJS+=affinity.o
+
+    EXTRA_LIBGNAT_OBJS+=$(SIGTRAMP_OBJ)
+    EXTRA_LIBGNAT_SRCS+=$(VX_SIGTRAMP_EXTRA_SRCS)
   else
     ifeq ($(strip $(filter-out kernel-smp,$(THREAD_KIND))),)
-      EH_MECHANISM=-gcc
-
       LIBGNAT_TARGET_PAIRS += \
       s-mudido.adb<s-mudido-affinity.adb \
       s-tpopsp.adb<s-tpopsp-vxworks-tls.adb \
       s-vxwext.ads<s-vxwext-kernel.ads \
       s-vxwext.adb<s-vxwext-kernel-smp.adb \
-      system.ads<system-vxworks-arm.ads
+      system.ads<$(SVX)-arm.ads
+
+      EXTRA_LIBGNAT_OBJS+=affinity.o
 
-      EXTRA_LIBGNAT_OBJS+=affinity.o sigtramp-vxworks.o
-      EXTRA_LIBGNAT_SRCS+=sigtramp.h
+      EXTRA_LIBGNAT_OBJS+=$(SIGTRAMP_OBJ)
+      EXTRA_LIBGNAT_SRCS+=$(VX_SIGTRAMP_EXTRA_SRCS)
     else
       LIBGNAT_TARGET_PAIRS += \
       s-tpopsp.adb<s-tpopsp-vxworks.adb \
-      system.ads<system-vxworks-arm.ads
+      system.ads<$(SVX)-arm.ads
 
       ifeq ($(strip $(filter-out kernel,$(THREAD_KIND))),)
-        EH_MECHANISM=-gcc
-
         LIBGNAT_TARGET_PAIRS += \
         s-vxwext.ads<s-vxwext-kernel.ads \
         s-vxwext.adb<s-vxwext-kernel.adb
 
-        EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o
-        EXTRA_LIBGNAT_SRCS+=sigtramp.h
+        EXTRA_LIBGNAT_OBJS+=$(SIGTRAMP_OBJ)
+        EXTRA_LIBGNAT_SRCS+=$(VX_SIGTRAMP_EXTRA_SRCS)
       endif
     endif
   endif
@@ -1094,9 +1127,14 @@ ifeq ($(strip $(filter-out arm% coff wrs vx%,$(target_cpu) $(target_vendor) $(ta
 
   EXTRA_LIBGNAT_OBJS+=vx_stack_info.o
 
-  GCC_SPEC_FILES+=vxworks-crtbe-link.spec
-  GCC_SPEC_FILES+=vxworks-arm-link.spec
-  GCC_SPEC_FILES+=vxworks-smp-arm-link.spec
+  ifneq (-arm,$(EH_MECHANISM))
+    EXTRA_ADALIB_OBJS+=$(VX_CRTBE_EXTRA_ADALIB_OBJS)
+    EXTRA_LIBGNAT_SRCS+=vx_crtbegin.inc
+    GCC_SPEC_FILES+=vxworks-gnat-crtbe-link.spec
+
+    GCC_SPEC_FILES+=vxworks-arm-link.spec
+    GCC_SPEC_FILES+=vxworks-smp-arm-link.spec
+  endif
 endif
 
 # MIPS VxWorks
@@ -1138,7 +1176,10 @@ ifeq ($(strip $(filter-out mips% wrs vx%,$(target_cpu) $(target_vendor) $(target
     s-vxwext.adb<s-vxwext-rtp-smp.adb \
     s-tpopsp.adb<s-tpopsp-vxworks-tls.adb
 
-    EXTRA_LIBGNAT_OBJS+=affinity.o sigtramp-vxworks.o
+    EXTRA_LIBGNAT_OBJS+=affinity.o
+
+    EXTRA_LIBGNAT_OBJS+=sigtramp-vxworks.o
+    EXTRA_LIBGNAT_SRCS+=$(VX_SIGTRAMP_EXTRA_SRCS)
   else
     ifeq ($(strip $(filter-out kernel-smp,$(THREAD_KIND))),)
       LIBGNAT_TARGET_PAIRS += \
@@ -1179,17 +1220,15 @@ ifeq ($(strip $(filter-out arm% linux-androideabi,$(target_cpu) $(target_os))),)
   s-taprop.adb<s-taprop-posix.adb \
   s-taspri.ads<s-taspri-posix.ads \
   s-tpopsp.adb<s-tpopsp-posix-foreign.adb \
-  system.ads<system-linux-armel.ads \
-  a-exexpr.adb<a-exexpr-gcc.adb \
-  s-excmac.ads<s-excmac-arm.ads
+  system.ads<system-linux-armel.ads
 
   TOOLS_TARGET_PAIRS =  \
     mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \
     indepsw.adb<indepsw-gnu.adb
 
   EXTRA_GNATRTL_TASKING_OBJS=s-linux.o
-  EXTRA_LIBGNAT_OBJS+=raise-gcc.o sigtramp-armdroid.o
-  EXTRA_GNATRTL_NONTASKING_OBJS+=g-cppexc.o s-excmac.o
+  EXTRA_LIBGNAT_OBJS+=sigtramp-armdroid.o
+  EXTRA_LIBGNAT_SRCS+=sigtramp.h
   EH_MECHANISM=-arm
   THREADSLIB =
   GNATLIB_SHARED = gnatlib-shared-dual
@@ -1980,9 +2019,7 @@ ifeq ($(strip $(filter-out arm% linux-gnueabi%,$(target_cpu) $(target_os))),)
   else
     EH_MECHANISM=-arm
     LIBGNAT_TARGET_PAIRS += \
-    system.ads<system-linux-armel.ads \
-    a-exexpr.adb<a-exexpr-gcc.adb \
-    s-excmac.ads<s-excmac-arm.ads
+    system.ads<system-linux-armel.ads
   endif
 
   TOOLS_TARGET_PAIRS =  \
@@ -1990,8 +2027,6 @@ ifeq ($(strip $(filter-out arm% linux-gnueabi%,$(target_cpu) $(target_os))),)
     indepsw.adb<indepsw-gnu.adb
 
   EXTRA_GNATRTL_TASKING_OBJS=s-linux.o
-  EXTRA_LIBGNAT_OBJS+=raise-gcc.o
-  EXTRA_GNATRTL_NONTASKING_OBJS+=g-cppexc.o s-excmac.o
   THREADSLIB = -lpthread
   GNATLIB_SHARED = gnatlib-shared-dual
   GMEM_LIB = gmemlib
@@ -2348,6 +2383,8 @@ ifeq ($(strip $(filter-out darwin%,$(target_os))),)
     LIBGNAT_TARGET_PAIRS += \
       s-intman.adb<s-intman-susv3.adb \
       s-osprim.adb<s-osprim-darwin.adb \
+      a-exetim.ads<a-exetim-default.ads \
+      a-exetim.adb<a-exetim-darwin.adb \
       $(ATOMICS_TARGET_PAIRS)
 
     ifeq ($(strip $(MULTISUBDIR)),/i386)
@@ -2362,6 +2399,7 @@ ifeq ($(strip $(filter-out darwin%,$(target_os))),)
     endif
 
     EXTRA_GNATRTL_NONTASKING_OBJS=g-sse.o g-ssvety.o
+    EXTRA_GNATRTL_TASKING_OBJS=a-exetim.o
   endif
 
   ifeq ($(strip $(filter-out powerpc%,$(target_cpu))),)
@@ -2401,6 +2439,8 @@ ifeq ($(strip $(filter-out darwin%,$(target_os))),)
       $(ATOMICS_TARGET_PAIRS) \
       $(ATOMICS_BUILTINS_TARGET_PAIRS)
 
+    EXTRA_LIBGNAT_OBJS+=sigtramp-ios.o
+    EXTRA_LIBGNAT_SRCS+=sigtramp.h
     LIBGNAT_TARGET_PAIRS += \
       system.ads<system-darwin-arm64.ads
   endif
@@ -2425,6 +2465,14 @@ ifeq ($(EH_MECHANISM),-gcc)
   EXTRA_GNATRTL_NONTASKING_OBJS+=g-cppexc.o s-excmac.o
 endif
 
+ifeq ($(EH_MECHANISM),-arm)
+  LIBGNAT_TARGET_PAIRS += \
+    a-exexpr.adb<a-exexpr-gcc.adb \
+    s-excmac.ads<s-excmac-arm.ads
+  EXTRA_LIBGNAT_OBJS+=raise-gcc.o
+  EXTRA_GNATRTL_NONTASKING_OBJS+=g-cppexc.o s-excmac.o
+endif
+
 # Use the Ada 2005 version of Ada.Exceptions by default, unless specified
 # explicitly already. The base files (a-except.ad?) are used only for building
 # the compiler and other basic tools.
@@ -2488,7 +2536,7 @@ ADA_EXCLUDE_SRCS =\
   g-allein.ads g-alleve.adb g-alleve.ads g-altcon.adb g-altcon.ads \
   g-altive.ads g-alveop.adb g-alveop.ads g-alvety.ads g-alvevi.ads \
   g-intpri.ads g-regist.adb g-regist.ads g-sse.ads    g-ssvety.ads \
-  i-vxwoio.adb i-vxwoio.ads i-vxwork.ads \
+  i-vxwoio.adb i-vxwoio.ads i-vxwork.ads i-bit_types.ads \
   s-bb.ads     s-bbbosu.ads s-bbcaco.ads s-bbcppr.ads s-bbexti.adb \
   s-bbexti.ads s-bbinte.adb s-bbinte.ads s-bbprot.adb s-bbprot.ads \
   s-bbsle3.ads s-bbsuer.ads s-bbsule.ads s-bbthqu.adb s-bbthqu.ads \
@@ -2499,8 +2547,8 @@ ADA_EXCLUDE_SRCS =\
   s-init.ads   s-init.adb   s-linux.ads  s-macres.ads \
   s-memcom.adb s-memcom.ads s-memmov.adb s-memmov.ads s-memset.adb \
   s-memset.ads s-mufalo.adb s-mufalo.ads s-musplo.adb s-musplo.ads \
-  s-sopco3.adb s-sopco3.ads s-sopco4.adb s-sopco4.ads \
-  s-sopco5.adb s-sopco5.ads s-stache.adb s-stache.ads \
+  s-sam4.ads   s-sopco3.adb s-sopco3.ads s-sopco4.adb s-sopco4.ads \
+  s-sopco5.adb s-sopco5.ads s-stache.adb s-stache.ads s-stm32.ads \
   s-strcom.adb s-strcom.ads s-thread.ads \
   s-vxwexc.adb s-vxwexc.ads s-vxwext.adb s-vxwext.ads \
   s-win32.ads  s-winext.ads
@@ -2686,7 +2734,7 @@ install-gnatlib: ../stamp-gnatlib-$(RTSDIR) install-gcc-specs
 	    $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \
 	    $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_RTL_OBJ_DIR)/$$file; \
 	done
-	-$(foreach file, $(EXTRA_ADALIB_FILES), \
+	-$(foreach file, $(EXTRA_ADALIB_OBJS), \
 	    $(INSTALL_DATA_DATE) $(RTSDIR)/$(file) $(DESTDIR)$(ADA_RTL_OBJ_DIR) && \
 	) true
 #     Install the shared libraries, if any, using $(INSTALL) instead
@@ -2803,7 +2851,7 @@ gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) $(RTSDIR)/s-osc
                 CFLAGS="$(GNATLIBCFLAGS_FOR_C)" \
 	        FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
 		srcdir=$(fsrcdir) \
-	        -f ../Makefile $(LIBGNAT_OBJS)
+	        -f ../Makefile $(LIBGNAT_OBJS) $(EXTRA_ADALIB_OBJS)
 # Ada files
 	$(MAKE) -C $(RTSDIR) \
 		CC="`echo \"$(GCC_FOR_TARGET)\" \
@@ -2858,6 +2906,16 @@ gnatlib-shared-default:
 	cd $(RTSDIR); $(LN_S) libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \
 		libgnarl$(soext)
 
+	# Create static libgnat and libgnarl compiled with -fPIC
+	$(RM) $(RTSDIR)/libgnat_pic$(arext) $(RTSDIR)/libgnarl_pic$(arext)
+	$(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnat_pic$(arext) \
+	   $(addprefix $(RTSDIR)/,$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS))
+	$(RANLIB_FOR_TARGET) $(RTSDIR)/libgnat_pic$(arext)
+	$(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnarl_pic$(arext) \
+	   $(addprefix $(RTSDIR)/,$(GNATRTL_TASKING_OBJS))
+	$(RANLIB_FOR_TARGET) $(RTSDIR)/libgnarl_pic$(arext)
+
+
 gnatlib-shared-dual:
 	$(MAKE) $(FLAGS_TO_PASS) \
              GNATLIBFLAGS="$(GNATLIBFLAGS)" \
@@ -2867,6 +2925,8 @@ gnatlib-shared-dual:
 	     THREAD_KIND="$(THREAD_KIND)" \
              gnatlib-shared-default
 	$(MV) $(RTSDIR)/libgna*$(soext) .
+	$(MV) $(RTSDIR)/libgnat_pic$(arext) .
+	$(MV) $(RTSDIR)/libgnarl_pic$(arext) .
 	$(RM) ../stamp-gnatlib2-$(RTSDIR)
 	$(MAKE) $(FLAGS_TO_PASS) \
              GNATLIBFLAGS="$(GNATLIBFLAGS)" \
@@ -2876,6 +2936,8 @@ gnatlib-shared-dual:
 	     THREAD_KIND="$(THREAD_KIND)" \
              gnatlib
 	$(MV) libgna*$(soext) $(RTSDIR)
+	$(MV) libgnat_pic$(arext) $(RTSDIR)
+	$(MV) libgnarl_pic$(arext) $(RTSDIR)
 
 gnatlib-shared-dual-win32:
 	$(MAKE) $(FLAGS_TO_PASS) \
@@ -2910,6 +2972,8 @@ gnatlib-shared-win32:
 	     THREAD_KIND="$(THREAD_KIND)" \
              gnatlib
 	$(RM) $(RTSDIR)/libgna*$(soext)
+	$(CP) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnat_pic$(arext)
+	$(CP) $(RTSDIR)/libgnarl$(arext) $(RTSDIR)/libgnarl_pic$(arext)
 	cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \
                 | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared -shared-libgcc \
 		$(PICFLAG_FOR_TARGET) \
@@ -3106,8 +3170,10 @@ socket.o  : socket.c gsocket.h
 sysdep.o  : sysdep.c
 raise.o   : raise.c raise.h
 sigtramp-armdroid.o      : sigtramp-armdroid.c sigtramp.h
-sigtramp-vxworks.o       : sigtramp-vxworks.c sigtramp.h sigtramp-vxworks-target.inc
-sigtramp-vxworks-vxsim.o : sigtramp-vxworks-vxsim.c sigtramp.h sigtramp-vxworks-target.inc
+sigtramp-armvxworks.o    : sigtramp-armvxworks.c sigtramp.h
+sigtramp-ios.o           : sigtramp-ios.c sigtramp.h
+sigtramp-vxworks.o       : sigtramp-vxworks.c $(VX_SIGTRAMP_EXTRA_SRCS)
+sigtramp-vxworks-vxsim.o : sigtramp-vxworks-vxsim.c $(VX_SIGTRAMP_EXTRA_SRCS)
 terminals.o : terminals.c
 vx_stack_info.o : vx_stack_info.c
 
@@ -3124,6 +3190,21 @@ init.o    : init.c adaint.h raise.h
 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ADA_CFLAGS) \
 	         $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION)
 
+vx_crtbegin.o : vx_crtbegin.c vx_crtbegin.inc
+	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ADA_CFLAGS) \
+		 -iquote $(srcdir) -iquote $(ftop_srcdir)/libgcc \
+	         $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION)
+
+vx_crtbegin_auto.o : vx_crtbegin_auto.c vx_crtbegin.inc
+	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ADA_CFLAGS) \
+		 -iquote $(srcdir) -iquote $(ftop_srcdir)/libgcc \
+	         $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION)
+
+vx_crtend.o : vx_crtend.c
+	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ADA_CFLAGS) \
+		 -iquote $(srcdir) -iquote $(ftop_srcdir)/libgcc \
+	         $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION)
+
 init-vxsim.o : init-vxsim.c
 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ADA_CFLAGS) \
 	         $(ALL_CPPFLAGS) $(INCLUDES) $< $(OUTPUT_OPTION)
diff --git a/gcc/ada/gcc-interface/decl.c b/gcc/ada/gcc-interface/decl.c
index 96f48419128..67ba6121c56 100644
--- a/gcc/ada/gcc-interface/decl.c
+++ b/gcc/ada/gcc-interface/decl.c
@@ -603,6 +603,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
     case E_Out_Parameter:
     case E_Variable:
       {
+	const Entity_Id gnat_type = Etype (gnat_entity);
 	/* Always create a variable for volatile objects and variables seen
 	   constant but with a Linker_Section pragma.  */
 	bool const_flag
@@ -643,14 +644,20 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	  }
 
 	/* Get the type after elaborating the renamed object.  */
-	gnu_type = gnat_to_gnu_type (Etype (gnat_entity));
-
-	/* If this is a standard exception definition, then use the standard
-	   exception type.  This is necessary to make sure that imported and
-	   exported views of exceptions are properly merged in LTO mode.  */
-	if (TREE_CODE (TYPE_NAME (gnu_type)) == TYPE_DECL
-	    && DECL_NAME (TYPE_NAME (gnu_type)) == exception_data_name_id)
-	  gnu_type = except_type_node;
+	if (Convention (gnat_entity) == Convention_C
+	    && Is_Descendant_Of_Address (gnat_type))
+	  gnu_type = ptr_type_node;
+	else
+	  {
+	    gnu_type = gnat_to_gnu_type (gnat_type);
+
+	    /* If this is a standard exception definition, use the standard
+	       exception type.  This is necessary to make sure that imported
+	       and exported views of exceptions are merged in LTO mode.  */
+	    if (TREE_CODE (TYPE_NAME (gnu_type)) == TYPE_DECL
+		&& DECL_NAME (TYPE_NAME (gnu_type)) == exception_data_name_id)
+	      gnu_type = except_type_node;
+	  }
 
 	/* For a debug renaming declaration, build a debug-only entity.  */
 	if (Present (Debug_Renaming_Link (gnat_entity)))
@@ -791,10 +798,10 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 		mutable_p = true;
 	      }
 
-	    /* If we are at global level and the size isn't constant, call
+	    /* If the size isn't constant and we are at global level, call
 	       elaborate_expression_1 to make a variable for it rather than
 	       calculating it each time.  */
-	    if (global_bindings_p () && !TREE_CONSTANT (gnu_size))
+	    if (!TREE_CONSTANT (gnu_size) && global_bindings_p ())
 	      gnu_size = elaborate_expression_1 (gnu_size, gnat_entity,
 						 "SIZE", definition, false);
 	  }
@@ -812,7 +819,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	     || (TYPE_SIZE (gnu_type)
 		 && integer_zerop (TYPE_SIZE (gnu_type))
 		 && !TREE_OVERFLOW (TYPE_SIZE (gnu_type))))
-	    && !Is_Constr_Subt_For_UN_Aliased (Etype (gnat_entity))
+	    && !Is_Constr_Subt_For_UN_Aliased (gnat_type)
 	    && No (Renamed_Object (gnat_entity))
 	    && No (Address_Clause (gnat_entity)))
 	  gnu_size = bitsize_unit_node;
@@ -828,8 +835,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 		|| (!Optimize_Alignment_Space (gnat_entity)
 		    && kind != E_Exception
 		    && kind != E_Out_Parameter
-		    && Is_Composite_Type (Etype (gnat_entity))
-		    && !Is_Constr_Subt_For_UN_Aliased (Etype (gnat_entity))
+		    && Is_Composite_Type (gnat_type)
+		    && !Is_Constr_Subt_For_UN_Aliased (gnat_type)
 		    && !Is_Exported (gnat_entity)
 		    && !imported_p
 		    && No (Renamed_Object (gnat_entity))
@@ -895,12 +902,11 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	/* If this is an aliased object with an unconstrained array nominal
 	   subtype, make a type that includes the template.  We will either
 	   allocate or create a variable of that type, see below.  */
-	if (Is_Constr_Subt_For_UN_Aliased (Etype (gnat_entity))
-	    && Is_Array_Type (Underlying_Type (Etype (gnat_entity)))
+	if (Is_Constr_Subt_For_UN_Aliased (gnat_type)
+	    && Is_Array_Type (Underlying_Type (gnat_type))
 	    && !type_annotate_only)
 	  {
-	    tree gnu_array
-	      = gnat_to_gnu_type (Base_Type (Etype (gnat_entity)));
+	    tree gnu_array = gnat_to_gnu_type (Base_Type (gnat_type));
 	    gnu_type
 	      = build_unc_object_type_from_ptr (TREE_TYPE (gnu_array),
 						gnu_type,
@@ -914,7 +920,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	   without pessimizing the allocation.  This is a kludge necessary
 	   because we don't support dynamic alignment.  */
 	if (align == 0
-	    && Ekind (Etype (gnat_entity)) == E_Class_Wide_Subtype
+	    && Ekind (gnat_type) == E_Class_Wide_Subtype
 	    && No (Renamed_Object (gnat_entity))
 	    && No (Address_Clause (gnat_entity)))
 	  align = get_target_system_allocator_alignment () * BITS_PER_UNIT;
@@ -1194,8 +1200,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	    /* If this is an aliased object with an unconstrained array nominal
 	       subtype, then it can overlay only another aliased object with an
 	       unconstrained array nominal subtype and compatible template.  */
-	    if (Is_Constr_Subt_For_UN_Aliased (Etype (gnat_entity))
-		&& Is_Array_Type (Underlying_Type (Etype (gnat_entity)))
+	    if (Is_Constr_Subt_For_UN_Aliased (gnat_type)
+		&& Is_Array_Type (Underlying_Type (gnat_type))
 		&& !type_annotate_only)
 	      {
 		tree rec_type = TREE_TYPE (gnu_type);
@@ -1360,10 +1366,10 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	   than the largest stack alignment the back-end can honor, resort to
 	   a variable of "aligning type".  */
 	if (definition
-	    && !global_bindings_p ()
-	    && !static_flag
+	    && TYPE_ALIGN (gnu_type) > BIGGEST_ALIGNMENT
 	    && !imported_p
-	    && TYPE_ALIGN (gnu_type) > BIGGEST_ALIGNMENT)
+	    && !static_flag
+	    && !global_bindings_p ())
 	  {
 	    /* Create the new variable.  No need for extra room before the
 	       aligned field as this is in automatic storage.  */
@@ -1408,8 +1414,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	   This is aimed to make it easier for the debugger to decode the
 	   object.  Note that we have to do it this late because of the
 	   couple of allocation adjustments that might be made above.  */
-	if (Is_Constr_Subt_For_UN_Aliased (Etype (gnat_entity))
-	    && Is_Array_Type (Underlying_Type (Etype (gnat_entity)))
+	if (Is_Constr_Subt_For_UN_Aliased (gnat_type)
+	    && Is_Array_Type (Underlying_Type (gnat_type))
 	    && !type_annotate_only)
 	  {
 	    /* In case the object with the template has already been allocated
@@ -1436,8 +1442,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 		gnu_size = NULL_TREE;
 	      }
 
-	    tree gnu_array
-	      = gnat_to_gnu_type (Base_Type (Etype (gnat_entity)));
+	    tree gnu_array = gnat_to_gnu_type (Base_Type (gnat_type));
 	    gnu_type
 	      = build_reference_type (TYPE_OBJECT_RECORD_TYPE (gnu_array));
 	  }
@@ -1523,7 +1528,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 		    && No (Address_Clause (gnat_entity)))
 		|| Address_Taken (gnat_entity)
 		|| Is_Aliased (gnat_entity)
-		|| Is_Aliased (Etype (gnat_entity))))
+		|| Is_Aliased (gnat_type)))
 	  {
 	    tree gnu_corr_var
 	      = create_var_decl (gnu_entity_name, gnu_ext_name, gnu_type,
@@ -2674,10 +2679,10 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	  TYPE_STUB_DECL (gnu_type)
 	    = create_type_stub_decl (gnu_entity_name, gnu_type);
 
-	  /* If we are at file level and this is a multi-dimensional array,
+	  /* If this is a multi-dimensional array and we are at global level,
 	     we need to make a variable corresponding to the stride of the
 	     inner dimensions.   */
-	  if (global_bindings_p () && ndim > 1)
+	  if (ndim > 1 && global_bindings_p ())
 	    {
 	      tree gnu_arr_type;
 
@@ -4269,6 +4274,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	    DECL_BY_REF_P (gnu_decl) = 1;
 	  }
 
+	/* If this is a mere subprogram type, just create the declaration.  */
 	else if (kind == E_Subprogram_Type)
 	  {
 	    process_attributes (&gnu_type, &attr_list, false, gnat_entity);
@@ -4278,17 +4284,28 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 				  debug_info_p, gnat_entity);
 	  }
 
+	/* Otherwise create the subprogram declaration with the external name,
+	   the type and the parameter list.  However, if this a reference to
+	   the allocation routines, reuse the canonical declaration nodes as
+	   they come with special properties.  */
 	else
 	  {
-	    gnu_decl
-	      = create_subprog_decl (gnu_entity_name, gnu_ext_name, gnu_type,
-				     gnu_param_list, inline_status,
-				     public_flag, extern_flag,
-				     artificial_p, debug_info_p,
-				     attr_list, gnat_entity);
-
-	    DECL_STUBBED_P (gnu_decl)
-	      = (Convention (gnat_entity) == Convention_Stubbed);
+	    if (extern_flag && gnu_ext_name == DECL_NAME (malloc_decl))
+	      gnu_decl = malloc_decl;
+	    else if (extern_flag && gnu_ext_name == DECL_NAME (realloc_decl))
+	      gnu_decl = realloc_decl;
+	    else
+	      {
+		gnu_decl
+		  = create_subprog_decl (gnu_entity_name, gnu_ext_name,
+					 gnu_type, gnu_param_list,
+					 inline_status, public_flag,
+					 extern_flag, artificial_p,
+					 debug_info_p, attr_list, gnat_entity);
+
+		DECL_STUBBED_P (gnu_decl)
+		  = (Convention (gnat_entity) == Convention_Stubbed);
+	      }
 	  }
       }
       break;
@@ -4570,10 +4587,10 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	 a constant or self-referential, call elaborate_expression_1 to
 	 make a variable for the size rather than calculating it each time.
 	 Handle both the RM size and the actual size.  */
-      if (global_bindings_p ()
-	  && TYPE_SIZE (gnu_type)
+      if (TYPE_SIZE (gnu_type)
 	  && !TREE_CONSTANT (TYPE_SIZE (gnu_type))
-	  && !CONTAINS_PLACEHOLDER_P (TYPE_SIZE (gnu_type)))
+	  && !CONTAINS_PLACEHOLDER_P (TYPE_SIZE (gnu_type))
+	  && global_bindings_p ())
 	{
 	  tree size = TYPE_SIZE (gnu_type);
 
@@ -4655,11 +4672,10 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 	    }
 	}
 
-      /* If this is a record type or subtype, call elaborate_expression_2 on
-	 any field position.  Do this for both global and local types.
-	 Skip any fields that we haven't made trees for to avoid problems with
-	 class wide types.  */
-      if (IN (kind, Record_Kind))
+      /* Similarly, if this is a record type or subtype at global level, call
+	 elaborate_expression_2 on any field position.  Skip any fields that
+	 we haven't made trees for to avoid problems with class-wide types.  */
+      if (IN (kind, Record_Kind) && global_bindings_p ())
 	for (gnat_temp = First_Entity (gnat_entity); Present (gnat_temp);
 	     gnat_temp = Next_Entity (gnat_temp))
 	  if (Ekind (gnat_temp) == E_Component && present_gnu_tree (gnat_temp))
@@ -4668,7 +4684,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 
 	      /* ??? For now, store the offset as a multiple of the alignment
 		 in bytes so that we can see the alignment from the tree.  */
-	      if (!CONTAINS_PLACEHOLDER_P (DECL_FIELD_OFFSET (gnu_field)))
+	      if (!TREE_CONSTANT (DECL_FIELD_OFFSET (gnu_field))
+		  && !CONTAINS_PLACEHOLDER_P (DECL_FIELD_OFFSET (gnu_field)))
 		{
 		  DECL_FIELD_OFFSET (gnu_field)
 		    = elaborate_expression_2 (DECL_FIELD_OFFSET (gnu_field),
@@ -4679,8 +4696,7 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition)
 		  /* ??? The context of gnu_field is not necessarily gnu_type
 		     so the MULT_EXPR node built above may not be marked by
 		     the call to create_type_decl below.  */
-		  if (global_bindings_p ())
-		    MARK_VISITED (DECL_FIELD_OFFSET (gnu_field));
+		  MARK_VISITED (DECL_FIELD_OFFSET (gnu_field));
 		}
 	    }
 
@@ -5754,7 +5770,11 @@ gnat_to_gnu_subprog_type (Entity_Id gnat_subprog, bool definition,
 
   else
     {
-      gnu_return_type = gnat_to_gnu_profile_type (gnat_return_type);
+      if (Convention (gnat_subprog) == Convention_C
+	  && Is_Descendant_Of_Address (gnat_return_type))
+	gnu_return_type = ptr_type_node;
+      else
+	gnu_return_type = gnat_to_gnu_profile_type (gnat_return_type);
 
       /* If this function returns by reference, make the actual return type
 	 the reference type and make a note of that.  */
@@ -5914,7 +5934,12 @@ gnat_to_gnu_subprog_type (Entity_Id gnat_subprog, bool definition,
       else
 	{
 	  Entity_Id gnat_param_type = Etype (gnat_param);
-	  gnu_param_type = gnat_to_gnu_profile_type (gnat_param_type);
+
+	  if (Convention (gnat_subprog) == Convention_C
+	      && Is_Descendant_Of_Address (gnat_param_type))
+	    gnu_param_type = ptr_type_node;
+	  else
+	    gnu_param_type = gnat_to_gnu_profile_type (gnat_param_type);
 
 	  /* If the parameter type is incomplete, there are 2 cases: if it is
 	     passed by reference, then the type is only linked indirectly in
diff --git a/gcc/ada/gcc-interface/gigi.h b/gcc/ada/gcc-interface/gigi.h
index fcd866c37cc..b4fa83f28c2 100644
--- a/gcc/ada/gcc-interface/gigi.h
+++ b/gcc/ada/gcc-interface/gigi.h
@@ -394,13 +394,15 @@ enum standard_datatypes
   /* Value BITS_PER_UNIT in signed bitsizetype.  */
   ADT_sbitsize_unit_node,
 
-  /* Function declaration nodes for run-time functions for allocating memory.
-     Ada allocators cause calls to this function to be generated.  */
+  /* Function declaration node for run-time allocation function.  */
   ADT_malloc_decl,
 
-  /* Likewise for freeing memory.  */
+  /* Function declaration node for run-time freeing function.  */
   ADT_free_decl,
 
+  /* Function declaration node for run-time reallocation function.  */
+  ADT_realloc_decl,
+
   /* Function decl node for 64-bit multiplication with overflow checking.  */
   ADT_mulv64_decl,
 
@@ -471,6 +473,7 @@ extern GTY(()) tree gnat_raise_decls_ext[(int) LAST_REASON_CODE + 1];
 #define sbitsize_unit_node gnat_std_decls[(int) ADT_sbitsize_unit_node]
 #define malloc_decl gnat_std_decls[(int) ADT_malloc_decl]
 #define free_decl gnat_std_decls[(int) ADT_free_decl]
+#define realloc_decl gnat_std_decls[(int) ADT_realloc_decl]
 #define mulv64_decl gnat_std_decls[(int) ADT_mulv64_decl]
 #define parent_name_id gnat_std_decls[(int) ADT_parent_name_id]
 #define exception_data_name_id gnat_std_decls[(int) ADT_exception_data_name_id]
diff --git a/gcc/ada/gcc-interface/misc.c b/gcc/ada/gcc-interface/misc.c
index 279a114e3b8..b240bc5e0f7 100644
--- a/gcc/ada/gcc-interface/misc.c
+++ b/gcc/ada/gcc-interface/misc.c
@@ -1370,6 +1370,8 @@ get_lang_specific (tree node)
 #define LANG_HOOKS_GETDECLS		lhd_return_null_tree_v
 #undef  LANG_HOOKS_PUSHDECL
 #define LANG_HOOKS_PUSHDECL		gnat_return_tree
+#undef  LANG_HOOKS_WARN_UNUSED_GLOBAL_DECL
+#define LANG_HOOKS_WARN_UNUSED_GLOBAL_DECL hook_bool_const_tree_false
 #undef  LANG_HOOKS_GET_ALIAS_SET
 #define LANG_HOOKS_GET_ALIAS_SET	gnat_get_alias_set
 #undef  LANG_HOOKS_PRINT_DECL
@@ -1403,20 +1405,17 @@ get_lang_specific (tree node)
 #undef  LANG_HOOKS_GET_DEBUG_TYPE
 #define LANG_HOOKS_GET_DEBUG_TYPE	gnat_get_debug_type
 #undef  LANG_HOOKS_GET_FIXED_POINT_TYPE_INFO
-#define LANG_HOOKS_GET_FIXED_POINT_TYPE_INFO \
-					gnat_get_fixed_point_type_info
+#define LANG_HOOKS_GET_FIXED_POINT_TYPE_INFO gnat_get_fixed_point_type_info
 #undef  LANG_HOOKS_ATTRIBUTE_TABLE
 #define LANG_HOOKS_ATTRIBUTE_TABLE	gnat_internal_attribute_table
 #undef  LANG_HOOKS_BUILTIN_FUNCTION
 #define LANG_HOOKS_BUILTIN_FUNCTION	gnat_builtin_function
+#undef  LANG_HOOKS_INIT_TS
+#define LANG_HOOKS_INIT_TS		gnat_init_ts
 #undef  LANG_HOOKS_EH_PERSONALITY
 #define LANG_HOOKS_EH_PERSONALITY	gnat_eh_personality
 #undef  LANG_HOOKS_DEEP_UNSHARING
 #define LANG_HOOKS_DEEP_UNSHARING	true
-#undef  LANG_HOOKS_INIT_TS
-#define LANG_HOOKS_INIT_TS		gnat_init_ts
-#undef  LANG_HOOKS_WARN_UNUSED_GLOBAL_DECL
-#define LANG_HOOKS_WARN_UNUSED_GLOBAL_DECL hook_bool_const_tree_false
 
 struct lang_hooks lang_hooks = LANG_HOOKS_INITIALIZER;
 
diff --git a/gcc/ada/gcc-interface/trans.c b/gcc/ada/gcc-interface/trans.c
index f110e928b93..9d76fb94a73 100644
--- a/gcc/ada/gcc-interface/trans.c
+++ b/gcc/ada/gcc-interface/trans.c
@@ -387,14 +387,13 @@ gigi (Node_Id gnat_root,
 		       true, false, NULL, gnat_literal);
   save_gnu_tree (gnat_literal, t, false);
 
+  /* Declare the building blocks of function nodes.  */
+  void_list_node = build_tree_list (NULL_TREE, void_type_node);
   void_ftype = build_function_type_list (void_type_node, NULL_TREE);
   ptr_void_ftype = build_pointer_type (void_ftype);
 
   /* Now declare run-time functions.  */
   ftype = build_function_type_list (ptr_type_node, sizetype, NULL_TREE);
-
-  /* malloc is a function declaration tree for a function to allocate
-     memory.  */
   malloc_decl
     = create_subprog_decl (get_identifier ("__gnat_malloc"), NULL_TREE,
 			   ftype,
@@ -402,12 +401,18 @@ gigi (Node_Id gnat_root,
 			   NULL, Empty);
   DECL_IS_MALLOC (malloc_decl) = 1;
 
-  /* free is a function declaration tree for a function to free memory.  */
+  ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
   free_decl
     = create_subprog_decl (get_identifier ("__gnat_free"), NULL_TREE,
-			   build_function_type_list (void_type_node,
-						     ptr_type_node,
-						     NULL_TREE),
+			   ftype,
+			   NULL_TREE, is_disabled, true, true, true, false,
+			   NULL, Empty);
+
+  ftype = build_function_type_list (ptr_type_node, ptr_type_node, sizetype,
+				    NULL_TREE);
+  realloc_decl
+    = create_subprog_decl (get_identifier ("__gnat_realloc"), NULL_TREE,
+			   ftype,
 			   NULL_TREE, is_disabled, true, true, true, false,
 			   NULL, Empty);
 
@@ -8007,7 +8012,7 @@ void
 add_decl_expr (tree gnu_decl, Entity_Id gnat_entity)
 {
   tree type = TREE_TYPE (gnu_decl);
-  tree gnu_stmt, gnu_init, t;
+  tree gnu_stmt, gnu_init;
 
   /* If this is a variable that Gigi is to ignore, we may have been given
      an ERROR_MARK.  So test for it.  We also might have been given a
@@ -8054,15 +8059,6 @@ add_decl_expr (tree gnu_decl, Entity_Id gnat_entity)
 	      && !initializer_constant_valid_p (gnu_init,
 						TREE_TYPE (gnu_init)))))
     {
-      /* If GNU_DECL has a padded type, convert it to the unpadded
-	 type so the assignment is done properly.  */
-      if (TYPE_IS_PADDING_P (type))
-	t = convert (TREE_TYPE (TYPE_FIELDS (type)), gnu_decl);
-      else
-	t = gnu_decl;
-
-      gnu_stmt = build_binary_op (INIT_EXPR, NULL_TREE, t, gnu_init);
-
       DECL_INITIAL (gnu_decl) = NULL_TREE;
       if (TREE_READONLY (gnu_decl))
 	{
@@ -8070,6 +8066,12 @@ add_decl_expr (tree gnu_decl, Entity_Id gnat_entity)
 	  DECL_READONLY_ONCE_ELAB (gnu_decl) = 1;
 	}
 
+      /* If GNU_DECL has a padded type, convert it to the unpadded
+	 type so the assignment is done properly.  */
+      if (TYPE_IS_PADDING_P (type))
+	gnu_decl = convert (TREE_TYPE (TYPE_FIELDS (type)), gnu_decl);
+
+      gnu_stmt = build_binary_op (INIT_EXPR, NULL_TREE, gnu_decl, gnu_init);
       add_stmt_with_node (gnu_stmt, gnat_entity);
     }
 }
diff --git a/gcc/ada/gcc-interface/utils.c b/gcc/ada/gcc-interface/utils.c
index 8e4f8638258..3a546ff0af6 100644
--- a/gcc/ada/gcc-interface/utils.c
+++ b/gcc/ada/gcc-interface/utils.c
@@ -2430,8 +2430,9 @@ create_var_decl (tree name, tree asm_name, tree type, tree init,
      and may be used for scalars in general but not for aggregates.  */
   tree var_decl
     = build_decl (input_location,
-		  (constant_p && const_decl_allowed_p
-		   && !AGGREGATE_TYPE_P (type)) ? CONST_DECL : VAR_DECL,
+		  (constant_p
+		   && const_decl_allowed_p
+		   && !AGGREGATE_TYPE_P (type) ? CONST_DECL : VAR_DECL),
 		  name, type);
 
   /* Detect constants created by the front-end to hold 'reference to function
@@ -2456,9 +2457,20 @@ create_var_decl (tree name, tree asm_name, tree type, tree init,
      constant initialization and save any variable elaborations for the
      elaboration routine.  If we are just annotating types, throw away the
      initialization if it isn't a constant.  */
-  if ((extern_flag && !constant_p)
+  if ((extern_flag && init && !constant_p)
       || (type_annotate_only && init && !TREE_CONSTANT (init)))
-    init = NULL_TREE;
+    {
+      init = NULL_TREE;
+
+      /* In LTO mode, also clear TREE_READONLY the same way add_decl_expr
+	 would do it if the initializer was not thrown away here, as the
+	 WPA phase requires a consistent view across compilation units.  */
+      if (const_flag && flag_generate_lto)
+	{
+	  const_flag = false;
+	  DECL_READONLY_ONCE_ELAB (var_decl) = 1;
+	}
+    }
 
   /* At the global level, a non-constant initializer generates elaboration
      statements.  Check that such statements are allowed, that is to say,
@@ -5432,15 +5444,6 @@ static tree c_global_trees[CTI_MAX];
 #define intmax_type_node  void_type_node
 #define uintmax_type_node void_type_node
 
-/* Build the void_list_node (void_type_node having been created).  */
-
-static tree
-build_void_list_node (void)
-{
-  tree t = build_tree_list (NULL_TREE, void_type_node);
-  return t;
-}
-
 /* Used to help initialize the builtin-types.def table.  When a type of
    the correct size doesn't exist, use error_mark_node instead of NULL.
    The later results in segfaults even when a decl using the type doesn't
@@ -5461,7 +5464,6 @@ install_builtin_elementary_types (void)
 {
   signed_size_type_node = gnat_signed_type_for (size_type_node);
   pid_type_node = integer_type_node;
-  void_list_node = build_void_list_node ();
 
   string_type_node = build_pointer_type (char_type_node);
   const_string_type_node
diff --git a/gcc/ada/gcc-interface/utils2.c b/gcc/ada/gcc-interface/utils2.c
index aeb6cc3a3f7..638d59b6f9c 100644
--- a/gcc/ada/gcc-interface/utils2.c
+++ b/gcc/ada/gcc-interface/utils2.c
@@ -171,8 +171,8 @@ known_alignment (tree exp)
 
     case CALL_EXPR:
       {
-	tree func = get_callee_fndecl (exp);
-	if (func && DECL_IS_MALLOC (func))
+	tree fndecl = get_callee_fndecl (exp);
+	if (fndecl == malloc_decl || fndecl == realloc_decl)
 	  return get_target_system_allocator_alignment () * BITS_PER_UNIT;
 
 	tree t = maybe_inline_call_in_expr (exp);
@@ -188,7 +188,8 @@ known_alignment (tree exp)
 	 have a dummy type here (e.g. a Taft Amendment type), for which the
 	 alignment is meaningless and should be ignored.  */
       if (POINTER_TYPE_P (TREE_TYPE (exp))
-	  && !TYPE_IS_DUMMY_P (TREE_TYPE (TREE_TYPE (exp))))
+	  && !TYPE_IS_DUMMY_P (TREE_TYPE (TREE_TYPE (exp)))
+	  && !VOID_TYPE_P (TREE_TYPE (TREE_TYPE (exp))))
 	this_alignment = TYPE_ALIGN (TREE_TYPE (TREE_TYPE (exp)));
       else
 	this_alignment = 0;
diff --git a/gcc/ada/ghost.adb b/gcc/ada/ghost.adb
index 2eca5eda474..2a640a2b88c 100644
--- a/gcc/ada/ghost.adb
+++ b/gcc/ada/ghost.adb
@@ -469,6 +469,14 @@ package body Ghost is
          if Ghost_Mode > None then
             return True;
 
+         --  A Ghost type may be referenced in a use_type clause
+         --  (SPARK RM 6.9.10).
+
+         elsif Present (Parent (Context))
+           and then Nkind (Parent (Context)) = N_Use_Type_Clause
+         then
+            return True;
+
          --  Routine Expand_Record_Extension creates a parent subtype without
          --  inserting it into the tree. There is no good way of recognizing
          --  this special case as there is no parent. Try to approximate the
@@ -1174,6 +1182,17 @@ package body Ghost is
                Prune (N);
                return Skip;
 
+            --  A freeze node for an ignored ghost entity must be pruned as
+            --  well, to prevent meaningless references in the back end.
+
+            --  ??? the freeze node itself should be ignored ghost
+
+            elsif Nkind (N) = N_Freeze_Entity
+              and then Is_Ignored_Ghost_Entity (Entity (N))
+            then
+               Prune (N);
+               return Skip;
+
             --  Scoping constructs such as blocks, packages, subprograms and
             --  bodies offer some flexibility with respect to pruning.
 
diff --git a/gcc/ada/gnat1drv.adb b/gcc/ada/gnat1drv.adb
index 702545a1718..acb79a56980 100644
--- a/gcc/ada/gnat1drv.adb
+++ b/gcc/ada/gnat1drv.adb
@@ -89,15 +89,6 @@ with System.OS_Lib;
 --------------
 
 procedure Gnat1drv is
-   Main_Unit_Node : Node_Id;
-   --  Compilation unit node for main unit
-
-   Main_Kind : Node_Kind;
-   --  Kind of main compilation unit node
-
-   Back_End_Mode : Back_End.Back_End_Mode_Type;
-   --  Record back-end mode
-
    procedure Adjust_Global_Switches;
    --  There are various interactions between front-end switch settings,
    --  including debug switch settings and target dependent parameters.
@@ -105,8 +96,9 @@ procedure Gnat1drv is
    --  We do it after scanning out all the switches, so that we are not
    --  depending on the order in which switches appear.
 
-   procedure Check_Bad_Body;
-   --  Called to check if the unit we are compiling has a bad body
+   procedure Check_Bad_Body (Unit_Node : Node_Id; Unit_Kind : Node_Kind);
+   --  Called to check whether a unit described by its compilation unit node
+   --  and kind has a bad body.
 
    procedure Check_Rep_Info;
    --  Called when we are not generating code, to check if -gnatR was requested
@@ -415,11 +407,6 @@ procedure Gnat1drv is
 
          Suppress_Options.Suppress := (others => False);
 
-         --  Turn off dynamic elaboration checks. SPARK mode depends on the
-         --  use of the static elaboration mode.
-
-         Dynamic_Elaboration_Checks := False;
-
          --  Detect overflow on unconstrained floating-point types, such as
          --  the predefined types Float, Long_Float and Long_Long_Float from
          --  package Standard. Not necessary if float overflows are checked
@@ -717,10 +704,8 @@ procedure Gnat1drv is
    -- Check_Bad_Body --
    --------------------
 
-   procedure Check_Bad_Body is
-      Sname   : Unit_Name_Type;
-      Src_Ind : Source_File_Index;
-      Fname   : File_Name_Type;
+   procedure Check_Bad_Body (Unit_Node : Node_Id; Unit_Kind : Node_Kind) is
+      Fname : File_Name_Type;
 
       procedure Bad_Body_Error (Msg : String);
       --  Issue message for bad body found
@@ -731,11 +716,16 @@ procedure Gnat1drv is
 
       procedure Bad_Body_Error (Msg : String) is
       begin
-         Error_Msg_N (Msg, Main_Unit_Node);
+         Error_Msg_N (Msg, Unit_Node);
          Error_Msg_File_1 := Fname;
-         Error_Msg_N ("remove incorrect body in file{!", Main_Unit_Node);
+         Error_Msg_N ("remove incorrect body in file{!", Unit_Node);
       end Bad_Body_Error;
 
+      --  Local variables
+
+      Sname   : Unit_Name_Type;
+      Src_Ind : Source_File_Index;
+
    --  Start of processing for Check_Bad_Body
 
    begin
@@ -748,13 +738,13 @@ procedure Gnat1drv is
 
       --  Check for body not allowed
 
-      if (Main_Kind = N_Package_Declaration
-           and then not Body_Required (Main_Unit_Node))
-        or else (Main_Kind = N_Generic_Package_Declaration
-                  and then not Body_Required (Main_Unit_Node))
-        or else Main_Kind = N_Package_Renaming_Declaration
-        or else Main_Kind = N_Subprogram_Renaming_Declaration
-        or else Nkind (Original_Node (Unit (Main_Unit_Node)))
+      if (Unit_Kind = N_Package_Declaration
+           and then not Body_Required (Unit_Node))
+        or else (Unit_Kind = N_Generic_Package_Declaration
+                  and then not Body_Required (Unit_Node))
+        or else Unit_Kind = N_Package_Renaming_Declaration
+        or else Unit_Kind = N_Subprogram_Renaming_Declaration
+        or else Nkind (Original_Node (Unit (Unit_Node)))
                          in N_Generic_Instantiation
       then
          Sname := Unit_Name (Main_Unit);
@@ -798,16 +788,16 @@ procedure Gnat1drv is
             --  be incorrect (we may have misinterpreted a junk spec as not
             --  needing a body when it really does).
 
-            if Main_Kind = N_Package_Declaration
+            if Unit_Kind = N_Package_Declaration
               and then Ada_Version = Ada_83
               and then Operating_Mode = Generate_Code
               and then Distribution_Stub_Mode /= Generate_Caller_Stub_Body
               and then not Compilation_Errors
             then
                Error_Msg_N
-                 ("package $$ does not require a body??", Main_Unit_Node);
+                 ("package $$ does not require a body??", Unit_Node);
                Error_Msg_File_1 := Fname;
-               Error_Msg_N ("body in file{ will be ignored??", Main_Unit_Node);
+               Error_Msg_N ("body in file{ will be ignored??", Unit_Node);
 
                --  Ada 95 cases of a body file present when no body is
                --  permitted. This we consider to be an error.
@@ -815,15 +805,15 @@ procedure Gnat1drv is
             else
                --  For generic instantiations, we never allow a body
 
-               if Nkind (Original_Node (Unit (Main_Unit_Node))) in
+               if Nkind (Original_Node (Unit (Unit_Node))) in
                                                     N_Generic_Instantiation
                then
                   Bad_Body_Error
                     ("generic instantiation for $$ does not allow a body");
 
-                  --  A library unit that is a renaming never allows a body
+               --  A library unit that is a renaming never allows a body
 
-               elsif Main_Kind in N_Renaming_Declaration then
+               elsif Unit_Kind in N_Renaming_Declaration then
                   Bad_Body_Error
                     ("renaming declaration for $$ does not allow a body!");
 
@@ -834,11 +824,11 @@ procedure Gnat1drv is
                   --  body when in fact it does.
 
                elsif not Compilation_Errors then
-                  if Main_Kind = N_Package_Declaration then
+                  if Unit_Kind = N_Package_Declaration then
                      Bad_Body_Error
                        ("package $$ does not allow a body!");
 
-                  elsif Main_Kind = N_Generic_Package_Declaration then
+                  elsif Unit_Kind = N_Generic_Package_Declaration then
                      Bad_Body_Error
                        ("generic package $$ does not allow a body!");
                   end if;
@@ -898,9 +888,18 @@ procedure Gnat1drv is
       if AAMP_On_Target then
          Sem_Ch13.Validate_Independence;
       end if;
-
    end Post_Compilation_Validation_Checks;
 
+   --  Local variables
+
+   Back_End_Mode : Back_End.Back_End_Mode_Type;
+
+   Main_Unit_Kind : Node_Kind;
+   --  Kind of main compilation unit node
+
+   Main_Unit_Node : Node_Id;
+   --  Compilation unit node for main unit
+
 --  Start of processing for Gnat1drv
 
 begin
@@ -1070,8 +1069,9 @@ begin
       end if;
 
       Main_Unit_Node := Cunit (Main_Unit);
-      Main_Kind := Nkind (Unit (Main_Unit_Node));
-      Check_Bad_Body;
+      Main_Unit_Kind := Nkind (Unit (Main_Unit_Node));
+
+      Check_Bad_Body (Main_Unit_Node, Main_Unit_Kind);
 
       --  In CodePeer mode we always delete old SCIL files before regenerating
       --  new ones, in case of e.g. errors, and also to remove obsolete scilx
@@ -1164,21 +1164,23 @@ begin
       --  subunits. Note that we always generate code for all generic units (a
       --  change from some previous versions of GNAT).
 
-      elsif Main_Kind = N_Subprogram_Body and then not Subunits_Missing then
+      elsif Main_Unit_Kind = N_Subprogram_Body
+        and then not Subunits_Missing
+      then
          Back_End_Mode := Generate_Object;
 
       --  We can generate code for a package body unless there are subunits
       --  missing (note that we always generate code for generic units, which
       --  is a change from some earlier versions of GNAT).
 
-      elsif Main_Kind = N_Package_Body and then not Subunits_Missing then
+      elsif Main_Unit_Kind = N_Package_Body and then not Subunits_Missing then
          Back_End_Mode := Generate_Object;
 
       --  We can generate code for a package declaration or a subprogram
       --  declaration only if it does not required a body.
 
-      elsif Nkind_In (Main_Kind, N_Package_Declaration,
-                                 N_Subprogram_Declaration)
+      elsif Nkind_In (Main_Unit_Kind, N_Package_Declaration,
+                                      N_Subprogram_Declaration)
         and then
           (not Body_Required (Main_Unit_Node)
              or else Distribution_Stub_Mode = Generate_Caller_Stub_Body)
@@ -1188,8 +1190,8 @@ begin
       --  We can generate code for a generic package declaration of a generic
       --  subprogram declaration only if does not require a body.
 
-      elsif Nkind_In (Main_Kind, N_Generic_Package_Declaration,
-                                 N_Generic_Subprogram_Declaration)
+      elsif Nkind_In (Main_Unit_Kind, N_Generic_Package_Declaration,
+                                      N_Generic_Subprogram_Declaration)
         and then not Body_Required (Main_Unit_Node)
       then
          Back_End_Mode := Generate_Object;
@@ -1197,15 +1199,15 @@ begin
       --  Compilation units that are renamings do not require bodies, so we can
       --  generate code for them.
 
-      elsif Nkind_In (Main_Kind, N_Package_Renaming_Declaration,
-                                 N_Subprogram_Renaming_Declaration)
+      elsif Nkind_In (Main_Unit_Kind, N_Package_Renaming_Declaration,
+                                      N_Subprogram_Renaming_Declaration)
       then
          Back_End_Mode := Generate_Object;
 
       --  Compilation units that are generic renamings do not require bodies
       --  so we can generate code for them.
 
-      elsif Main_Kind in N_Generic_Renaming_Declaration then
+      elsif Main_Unit_Kind in N_Generic_Renaming_Declaration then
          Back_End_Mode := Generate_Object;
 
       --  It is not an error to analyze in CodePeer mode a spec which requires
@@ -1245,45 +1247,61 @@ begin
       --  generate code).
 
       if Back_End_Mode = Skip then
-         Set_Standard_Error;
-         Write_Str ("cannot generate code for file ");
-         Write_Name (Unit_File_Name (Main_Unit));
 
-         if Subunits_Missing then
-            Write_Str (" (missing subunits)");
-            Write_Eol;
+         --  An ignored Ghost unit is rewritten into a null statement because
+         --  it must not produce an ALI or object file. Do not emit any errors
+         --  related to code generation because the unit does not exist.
+
+         if Main_Unit_Kind = N_Null_Statement
+           and then Is_Ignored_Ghost_Node
+                      (Original_Node (Unit (Main_Unit_Node)))
+         then
+            null;
+
+         --  Otherwise the unit is missing a crucial piece that prevents code
+         --  generation.
 
-            --  Force generation of ALI file, for backward compatibility
+         else
+            Set_Standard_Error;
+            Write_Str ("cannot generate code for file ");
+            Write_Name (Unit_File_Name (Main_Unit));
 
-            Opt.Force_ALI_Tree_File := True;
+            if Subunits_Missing then
+               Write_Str (" (missing subunits)");
+               Write_Eol;
 
-         elsif Main_Kind = N_Subunit then
-            Write_Str (" (subunit)");
-            Write_Eol;
+               --  Force generation of ALI file, for backward compatibility
 
-            --  Force generation of ALI file, for backward compatibility
+               Opt.Force_ALI_Tree_File := True;
 
-            Opt.Force_ALI_Tree_File := True;
+            elsif Main_Unit_Kind = N_Subunit then
+               Write_Str (" (subunit)");
+               Write_Eol;
 
-         elsif Main_Kind = N_Subprogram_Declaration then
-            Write_Str (" (subprogram spec)");
-            Write_Eol;
+               --  Force generation of ALI file, for backward compatibility
 
-         --  Generic package body in GNAT implementation mode
+               Opt.Force_ALI_Tree_File := True;
 
-         elsif Main_Kind = N_Package_Body and then GNAT_Mode then
-            Write_Str (" (predefined generic)");
-            Write_Eol;
+            elsif Main_Unit_Kind = N_Subprogram_Declaration then
+               Write_Str (" (subprogram spec)");
+               Write_Eol;
 
-            --  Force generation of ALI file, for backward compatibility
+            --  Generic package body in GNAT implementation mode
 
-            Opt.Force_ALI_Tree_File := True;
+            elsif Main_Unit_Kind = N_Package_Body and then GNAT_Mode then
+               Write_Str (" (predefined generic)");
+               Write_Eol;
 
-         --  Only other case is a package spec
+               --  Force generation of ALI file, for backward compatibility
 
-         else
-            Write_Str (" (package spec)");
-            Write_Eol;
+               Opt.Force_ALI_Tree_File := True;
+
+            --  Only other case is a package spec
+
+            else
+               Write_Str (" (package spec)");
+               Write_Eol;
+            end if;
          end if;
 
          Set_Standard_Output;
@@ -1325,7 +1343,7 @@ begin
       if Back_End_Mode = Declarations_Only
         and then
           (not (Back_Annotate_Rep_Info or Generate_SCIL or GNATprove_Mode)
-            or else Main_Kind = N_Subunit
+            or else Main_Unit_Kind = N_Subunit
             or else Frontend_Layout_On_Target
             or else ASIS_GNSA_Mode)
       then
@@ -1470,11 +1488,10 @@ begin
       when Program_Error =>
          Comperr.Compiler_Abort ("Program_Error");
 
-      when Storage_Error =>
-
-         --  Assume this is a bug. If it is real, the message will in any case
-         --  say Storage_Error, giving a strong hint.
+      --  Assume this is a bug. If it is real, the message will in any case
+      --  say Storage_Error, giving a strong hint.
 
+      when Storage_Error =>
          Comperr.Compiler_Abort ("Storage_Error");
 
       when Unrecoverable_Error =>
@@ -1487,7 +1504,7 @@ begin
    <<End_Of_Program>>
    null;
 
-   --  The outer exception handles an unrecoverable error
+--  The outer exception handler handles an unrecoverable error
 
 exception
    when Unrecoverable_Error =>
diff --git a/gcc/ada/gnat_rm.texi b/gcc/ada/gnat_rm.texi
index 665d858d1db..9e95db9351c 100644
--- a/gcc/ada/gnat_rm.texi
+++ b/gcc/ada/gnat_rm.texi
@@ -21,7 +21,7 @@
 
 @copying
 @quotation
-GNAT Reference Manual , April 21, 2016
+GNAT Reference Manual , July 04, 2016
 
 AdaCore
 
@@ -283,6 +283,7 @@ Implementation Defined Pragmas
 * Pragma Unreserve_All_Interrupts:: 
 * Pragma Unsuppress:: 
 * Pragma Use_VADS_Size:: 
+* Pragma Unused:: 
 * Pragma Validity_Checks:: 
 * Pragma Volatile:: 
 * Pragma Volatile_Full_Access:: 
@@ -469,7 +470,6 @@ Partition-Wide Restrictions
 * No_Implicit_Conditionals:: 
 * No_Implicit_Dynamic_Code:: 
 * No_Implicit_Heap_Allocations:: 
-* No_Implicit_Loops:: 
 * No_Implicit_Protected_Object_Allocations:: 
 * No_Implicit_Task_Allocations:: 
 * No_Initialize_Scalars:: 
@@ -522,6 +522,7 @@ Program Unit Level Restrictions
 * No_Implementation_Restrictions:: 
 * No_Implementation_Units:: 
 * No_Implicit_Aliasing:: 
+* No_Implicit_Loops:: 
 * No_Obsolescent_Features:: 
 * No_Wide_Characters:: 
 * SPARK_05:: 
@@ -1335,6 +1336,7 @@ consideration, the use of these pragmas should be minimized.
 * Pragma Unreserve_All_Interrupts:: 
 * Pragma Unsuppress:: 
 * Pragma Use_VADS_Size:: 
+* Pragma Unused:: 
 * Pragma Validity_Checks:: 
 * Pragma Volatile:: 
 * Pragma Volatile_Full_Access:: 
@@ -1529,7 +1531,7 @@ Ada 83, Ada 95, or Ada 2005 programs.
 The one argument form, which is not a configuration pragma,
 is used for managing the transition from Ada
 2005 to Ada 2012 in the run-time library. If an entity is marked
-as Ada_201 only, then referencing the entity in any pre-Ada_2012
+as Ada_2012 only, then referencing the entity in any pre-Ada_2012
 mode will generate a warning. In addition, in any pre-Ada_2012
 mode, a preference rule is established which does not choose
 such an entity unless it is unambiguously specified. This avoids
@@ -8193,7 +8195,7 @@ Note that in addition to the checks defined in the Ada RM, GNAT recogizes a
 number of implementation-defined check names. See the description of pragma
 @cite{Suppress} for full details.
 
-@node Pragma Use_VADS_Size,Pragma Validity_Checks,Pragma Unsuppress,Implementation Defined Pragmas
+@node Pragma Use_VADS_Size,Pragma Unused,Pragma Unsuppress,Implementation Defined Pragmas
 @anchor{gnat_rm/implementation_defined_pragmas pragma-use-vads-size}@anchor{107}
 @section Pragma Use_VADS_Size
 
@@ -8217,8 +8219,42 @@ the handling of existing code which depends on the interpretation of Size
 as implemented in the VADS compiler.  See description of the VADS_Size
 attribute for further details.
 
-@node Pragma Validity_Checks,Pragma Volatile,Pragma Use_VADS_Size,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas pragma-validity-checks}@anchor{108}
+@node Pragma Unused,Pragma Validity_Checks,Pragma Use_VADS_Size,Implementation Defined Pragmas
+@anchor{gnat_rm/implementation_defined_pragmas pragma-unused}@anchor{108}@anchor{gnat_rm/implementation_defined_pragmas id49}@anchor{109}
+@section Pragma Unused
+
+
+@geindex Warnings
+@geindex unused
+
+Syntax:
+
+@example
+pragma Unused (LOCAL_NAME @{, LOCAL_NAME@});
+@end example
+
+This pragma signals that the assignable entities (variables,
+@cite{out} parameters, and @cite{in out} parameters) whose names are listed
+deliberately do not get assigned or referenced in the current source unit
+after the occurrence of the pragma in the current source unit. This
+suppresses warnings about the entities that are unreferenced and/or not
+assigned, and, in addition, a warning will be generated if one of these
+entities gets assigned or subsequently referenced in the same unit as the
+pragma (in the corresponding body or one of its subunits).
+
+This is particularly useful for clearly signaling that a particular
+parameter is not modified or referenced, even though the spec suggests
+that it might be.
+
+For the variable case, warnings are never given for unreferenced
+variables whose name contains one of the substrings
+@cite{DISCARD@comma{} DUMMY@comma{} IGNORE@comma{} JUNK@comma{} UNUSED} in any casing. Such names
+are typically to be used in cases where such warnings are expected.
+Thus it is never necessary to use @cite{pragma Unmodified} for such
+variables, though it is harmless to do so.
+
+@node Pragma Validity_Checks,Pragma Volatile,Pragma Unused,Implementation Defined Pragmas
+@anchor{gnat_rm/implementation_defined_pragmas pragma-validity-checks}@anchor{10a}
 @section Pragma Validity_Checks
 
 
@@ -8275,7 +8311,7 @@ A := C;                       -- C will be validity checked
 @end example
 
 @node Pragma Volatile,Pragma Volatile_Full_Access,Pragma Validity_Checks,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile}@anchor{109}
+@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile}@anchor{10b}
 @section Pragma Volatile
 
 
@@ -8293,7 +8329,7 @@ implementation of pragma Volatile is upwards compatible with the
 implementation in DEC Ada 83.
 
 @node Pragma Volatile_Full_Access,Pragma Volatile_Function,Pragma Volatile,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-full-access}@anchor{10a}@anchor{gnat_rm/implementation_defined_pragmas id49}@anchor{10b}
+@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-full-access}@anchor{10c}@anchor{gnat_rm/implementation_defined_pragmas id50}@anchor{10d}
 @section Pragma Volatile_Full_Access
 
 
@@ -8325,7 +8361,7 @@ It is not permissible to specify @cite{Volatile_Full_Access} for a composite
 (record or array) type or object that has at least one @cite{Aliased} component.
 
 @node Pragma Volatile_Function,Pragma Warning_As_Error,Pragma Volatile_Full_Access,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas id50}@anchor{10c}@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-function}@anchor{10d}
+@anchor{gnat_rm/implementation_defined_pragmas id51}@anchor{10e}@anchor{gnat_rm/implementation_defined_pragmas pragma-volatile-function}@anchor{10f}
 @section Pragma Volatile_Function
 
 
@@ -8339,7 +8375,7 @@ For the semantics of this pragma, see the entry for aspect @cite{Volatile_Functi
 in the SPARK 2014 Reference Manual, section 7.1.2.
 
 @node Pragma Warning_As_Error,Pragma Warnings,Pragma Volatile_Function,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas pragma-warning-as-error}@anchor{10e}
+@anchor{gnat_rm/implementation_defined_pragmas pragma-warning-as-error}@anchor{110}
 @section Pragma Warning_As_Error
 
 
@@ -8374,7 +8410,7 @@ as shown in the example below, to treat a class of warnings as errors.
 
 The above use of patterns to match the message applies only to warning
 messages generated by the front end. This pragma can also be applied to
-warnings provided by the back end and mentioned in @ref{10f,,Pragma Warnings}.
+warnings provided by the back end and mentioned in @ref{111,,Pragma Warnings}.
 By using a single full @emph{-Wxxx} switch in the pragma, such warnings
 can also be treated as errors.
 
@@ -8424,7 +8460,7 @@ the tag is changed from "warning:" to "error:" and the string
 "[warning-as-error]" is appended to the end of the message.
 
 @node Pragma Warnings,Pragma Weak_External,Pragma Warning_As_Error,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas pragma-warnings}@anchor{10f}@anchor{gnat_rm/implementation_defined_pragmas id51}@anchor{110}
+@anchor{gnat_rm/implementation_defined_pragmas pragma-warnings}@anchor{111}@anchor{gnat_rm/implementation_defined_pragmas id52}@anchor{112}
 @section Pragma Warnings
 
 
@@ -8576,7 +8612,7 @@ selectively for each tool, and as a consequence to detect useless pragma
 Warnings with switch @cite{-gnatw.w}.
 
 @node Pragma Weak_External,Pragma Wide_Character_Encoding,Pragma Warnings,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas pragma-weak-external}@anchor{111}
+@anchor{gnat_rm/implementation_defined_pragmas pragma-weak-external}@anchor{113}
 @section Pragma Weak_External
 
 
@@ -8627,7 +8663,7 @@ end External_Module;
 @end example
 
 @node Pragma Wide_Character_Encoding,,Pragma Weak_External,Implementation Defined Pragmas
-@anchor{gnat_rm/implementation_defined_pragmas pragma-wide-character-encoding}@anchor{112}
+@anchor{gnat_rm/implementation_defined_pragmas pragma-wide-character-encoding}@anchor{114}
 @section Pragma Wide_Character_Encoding
 
 
@@ -8654,7 +8690,7 @@ encoding within that file, and does not affect withed units, specs,
 or subunits.
 
 @node Implementation Defined Aspects,Implementation Defined Attributes,Implementation Defined Pragmas,Top
-@anchor{gnat_rm/implementation_defined_aspects implementation-defined-aspects}@anchor{113}@anchor{gnat_rm/implementation_defined_aspects doc}@anchor{114}@anchor{gnat_rm/implementation_defined_aspects id1}@anchor{115}
+@anchor{gnat_rm/implementation_defined_aspects implementation-defined-aspects}@anchor{115}@anchor{gnat_rm/implementation_defined_aspects doc}@anchor{116}@anchor{gnat_rm/implementation_defined_aspects id1}@anchor{117}
 @chapter Implementation Defined Aspects
 
 
@@ -8769,7 +8805,7 @@ or attribute definition clause.
 @end menu
 
 @node Aspect Abstract_State,Annotate,,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-abstract-state}@anchor{116}
+@anchor{gnat_rm/implementation_defined_aspects aspect-abstract-state}@anchor{118}
 @section Aspect Abstract_State
 
 
@@ -8778,7 +8814,7 @@ or attribute definition clause.
 This aspect is equivalent to @ref{1c,,pragma Abstract_State}.
 
 @node Annotate,Aspect Async_Readers,Aspect Abstract_State,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects annotate}@anchor{117}
+@anchor{gnat_rm/implementation_defined_aspects annotate}@anchor{119}
 @section Annotate
 
 
@@ -8805,7 +8841,7 @@ Equivalent to @cite{pragma Annotate (ID@comma{} ID @{@comma{} ARG@}@comma{} Enti
 @end table
 
 @node Aspect Async_Readers,Aspect Async_Writers,Annotate,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-async-readers}@anchor{118}
+@anchor{gnat_rm/implementation_defined_aspects aspect-async-readers}@anchor{11a}
 @section Aspect Async_Readers
 
 
@@ -8814,7 +8850,7 @@ Equivalent to @cite{pragma Annotate (ID@comma{} ID @{@comma{} ARG@}@comma{} Enti
 This boolean aspect is equivalent to @ref{2c,,pragma Async_Readers}.
 
 @node Aspect Async_Writers,Aspect Constant_After_Elaboration,Aspect Async_Readers,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-async-writers}@anchor{119}
+@anchor{gnat_rm/implementation_defined_aspects aspect-async-writers}@anchor{11b}
 @section Aspect Async_Writers
 
 
@@ -8823,7 +8859,7 @@ This boolean aspect is equivalent to @ref{2c,,pragma Async_Readers}.
 This boolean aspect is equivalent to @ref{2f,,pragma Async_Writers}.
 
 @node Aspect Constant_After_Elaboration,Aspect Contract_Cases,Aspect Async_Writers,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-constant-after-elaboration}@anchor{11a}
+@anchor{gnat_rm/implementation_defined_aspects aspect-constant-after-elaboration}@anchor{11c}
 @section Aspect Constant_After_Elaboration
 
 
@@ -8832,7 +8868,7 @@ This boolean aspect is equivalent to @ref{2f,,pragma Async_Writers}.
 This aspect is equivalent to @ref{40,,pragma Constant_After_Elaboration}.
 
 @node Aspect Contract_Cases,Aspect Depends,Aspect Constant_After_Elaboration,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-contract-cases}@anchor{11b}
+@anchor{gnat_rm/implementation_defined_aspects aspect-contract-cases}@anchor{11d}
 @section Aspect Contract_Cases
 
 
@@ -8843,7 +8879,7 @@ of clauses being enclosed in parentheses so that syntactically it is an
 aggregate.
 
 @node Aspect Depends,Aspect Default_Initial_Condition,Aspect Contract_Cases,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-depends}@anchor{11c}
+@anchor{gnat_rm/implementation_defined_aspects aspect-depends}@anchor{11e}
 @section Aspect Depends
 
 
@@ -8852,7 +8888,7 @@ aggregate.
 This aspect is equivalent to @ref{50,,pragma Depends}.
 
 @node Aspect Default_Initial_Condition,Aspect Dimension,Aspect Depends,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-default-initial-condition}@anchor{11d}
+@anchor{gnat_rm/implementation_defined_aspects aspect-default-initial-condition}@anchor{11f}
 @section Aspect Default_Initial_Condition
 
 
@@ -8861,7 +8897,7 @@ This aspect is equivalent to @ref{50,,pragma Depends}.
 This aspect is equivalent to @ref{4b,,pragma Default_Initial_Condition}.
 
 @node Aspect Dimension,Aspect Dimension_System,Aspect Default_Initial_Condition,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-dimension}@anchor{11e}
+@anchor{gnat_rm/implementation_defined_aspects aspect-dimension}@anchor{120}
 @section Aspect Dimension
 
 
@@ -8897,7 +8933,7 @@ Note that when the dimensioned type is an integer type, then any
 dimension value must be an integer literal.
 
 @node Aspect Dimension_System,Aspect Disable_Controlled,Aspect Dimension,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-dimension-system}@anchor{11f}
+@anchor{gnat_rm/implementation_defined_aspects aspect-dimension-system}@anchor{121}
 @section Aspect Dimension_System
 
 
@@ -8957,7 +8993,7 @@ See section 'Performing Dimensionality Analysis in GNAT' in the GNAT Users
 Guide for detailed examples of use of the dimension system.
 
 @node Aspect Disable_Controlled,Aspect Effective_Reads,Aspect Dimension_System,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-disable-controlled}@anchor{120}
+@anchor{gnat_rm/implementation_defined_aspects aspect-disable-controlled}@anchor{122}
 @section Aspect Disable_Controlled
 
 
@@ -8970,7 +9006,7 @@ where for example you might want a record to be controlled or not depending on
 whether some run-time check is enabled or suppressed.
 
 @node Aspect Effective_Reads,Aspect Effective_Writes,Aspect Disable_Controlled,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-effective-reads}@anchor{121}
+@anchor{gnat_rm/implementation_defined_aspects aspect-effective-reads}@anchor{123}
 @section Aspect Effective_Reads
 
 
@@ -8979,7 +9015,7 @@ whether some run-time check is enabled or suppressed.
 This aspect is equivalent to @ref{56,,pragma Effective_Reads}.
 
 @node Aspect Effective_Writes,Aspect Extensions_Visible,Aspect Effective_Reads,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-effective-writes}@anchor{122}
+@anchor{gnat_rm/implementation_defined_aspects aspect-effective-writes}@anchor{124}
 @section Aspect Effective_Writes
 
 
@@ -8988,7 +9024,7 @@ This aspect is equivalent to @ref{56,,pragma Effective_Reads}.
 This aspect is equivalent to @ref{58,,pragma Effective_Writes}.
 
 @node Aspect Extensions_Visible,Aspect Favor_Top_Level,Aspect Effective_Writes,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-extensions-visible}@anchor{123}
+@anchor{gnat_rm/implementation_defined_aspects aspect-extensions-visible}@anchor{125}
 @section Aspect Extensions_Visible
 
 
@@ -8997,7 +9033,7 @@ This aspect is equivalent to @ref{58,,pragma Effective_Writes}.
 This aspect is equivalent to @ref{64,,pragma Extensions_Visible}.
 
 @node Aspect Favor_Top_Level,Aspect Ghost,Aspect Extensions_Visible,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-favor-top-level}@anchor{124}
+@anchor{gnat_rm/implementation_defined_aspects aspect-favor-top-level}@anchor{126}
 @section Aspect Favor_Top_Level
 
 
@@ -9006,7 +9042,7 @@ This aspect is equivalent to @ref{64,,pragma Extensions_Visible}.
 This boolean aspect is equivalent to @ref{69,,pragma Favor_Top_Level}.
 
 @node Aspect Ghost,Aspect Global,Aspect Favor_Top_Level,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-ghost}@anchor{125}
+@anchor{gnat_rm/implementation_defined_aspects aspect-ghost}@anchor{127}
 @section Aspect Ghost
 
 
@@ -9015,7 +9051,7 @@ This boolean aspect is equivalent to @ref{69,,pragma Favor_Top_Level}.
 This aspect is equivalent to @ref{6c,,pragma Ghost}.
 
 @node Aspect Global,Aspect Initial_Condition,Aspect Ghost,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-global}@anchor{126}
+@anchor{gnat_rm/implementation_defined_aspects aspect-global}@anchor{128}
 @section Aspect Global
 
 
@@ -9024,7 +9060,7 @@ This aspect is equivalent to @ref{6c,,pragma Ghost}.
 This aspect is equivalent to @ref{6e,,pragma Global}.
 
 @node Aspect Initial_Condition,Aspect Initializes,Aspect Global,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-initial-condition}@anchor{127}
+@anchor{gnat_rm/implementation_defined_aspects aspect-initial-condition}@anchor{129}
 @section Aspect Initial_Condition
 
 
@@ -9033,7 +9069,7 @@ This aspect is equivalent to @ref{6e,,pragma Global}.
 This aspect is equivalent to @ref{7c,,pragma Initial_Condition}.
 
 @node Aspect Initializes,Aspect Inline_Always,Aspect Initial_Condition,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-initializes}@anchor{128}
+@anchor{gnat_rm/implementation_defined_aspects aspect-initializes}@anchor{12a}
 @section Aspect Initializes
 
 
@@ -9042,7 +9078,7 @@ This aspect is equivalent to @ref{7c,,pragma Initial_Condition}.
 This aspect is equivalent to @ref{7e,,pragma Initializes}.
 
 @node Aspect Inline_Always,Aspect Invariant,Aspect Initializes,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-inline-always}@anchor{129}
+@anchor{gnat_rm/implementation_defined_aspects aspect-inline-always}@anchor{12b}
 @section Aspect Inline_Always
 
 
@@ -9051,7 +9087,7 @@ This aspect is equivalent to @ref{7e,,pragma Initializes}.
 This boolean aspect is equivalent to @ref{81,,pragma Inline_Always}.
 
 @node Aspect Invariant,Aspect Invariant'Class,Aspect Inline_Always,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-invariant}@anchor{12a}
+@anchor{gnat_rm/implementation_defined_aspects aspect-invariant}@anchor{12c}
 @section Aspect Invariant
 
 
@@ -9062,7 +9098,7 @@ synonym for the language defined aspect @cite{Type_Invariant} except
 that it is separately controllable using pragma @cite{Assertion_Policy}.
 
 @node Aspect Invariant'Class,Aspect Iterable,Aspect Invariant,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-invariant-class}@anchor{12b}
+@anchor{gnat_rm/implementation_defined_aspects aspect-invariant-class}@anchor{12d}
 @section Aspect Invariant'Class
 
 
@@ -9073,7 +9109,7 @@ synonym for the language defined aspect @cite{Type_Invariant'Class} except
 that it is separately controllable using pragma @cite{Assertion_Policy}.
 
 @node Aspect Iterable,Aspect Linker_Section,Aspect Invariant'Class,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-iterable}@anchor{12c}
+@anchor{gnat_rm/implementation_defined_aspects aspect-iterable}@anchor{12e}
 @section Aspect Iterable
 
 
@@ -9149,7 +9185,7 @@ function Get_Element (Cont : Container; Position : Cursor) return Element_Type;
 This aspect is used in the GNAT-defined formal container packages.
 
 @node Aspect Linker_Section,Aspect Lock_Free,Aspect Iterable,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-linker-section}@anchor{12d}
+@anchor{gnat_rm/implementation_defined_aspects aspect-linker-section}@anchor{12f}
 @section Aspect Linker_Section
 
 
@@ -9158,7 +9194,7 @@ This aspect is used in the GNAT-defined formal container packages.
 This aspect is equivalent to @ref{90,,pragma Linker_Section}.
 
 @node Aspect Lock_Free,Aspect No_Elaboration_Code_All,Aspect Linker_Section,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-lock-free}@anchor{12e}
+@anchor{gnat_rm/implementation_defined_aspects aspect-lock-free}@anchor{130}
 @section Aspect Lock_Free
 
 
@@ -9167,7 +9203,7 @@ This aspect is equivalent to @ref{90,,pragma Linker_Section}.
 This boolean aspect is equivalent to @ref{92,,pragma Lock_Free}.
 
 @node Aspect No_Elaboration_Code_All,Aspect No_Tagged_Streams,Aspect Lock_Free,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-no-elaboration-code-all}@anchor{12f}
+@anchor{gnat_rm/implementation_defined_aspects aspect-no-elaboration-code-all}@anchor{131}
 @section Aspect No_Elaboration_Code_All
 
 
@@ -9177,7 +9213,7 @@ This aspect is equivalent to @ref{9b,,pragma No_Elaboration_Code_All}
 for a program unit.
 
 @node Aspect No_Tagged_Streams,Aspect Object_Size,Aspect No_Elaboration_Code_All,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-no-tagged-streams}@anchor{130}
+@anchor{gnat_rm/implementation_defined_aspects aspect-no-tagged-streams}@anchor{132}
 @section Aspect No_Tagged_Streams
 
 
@@ -9188,16 +9224,16 @@ argument specifying a root tagged type (thus this aspect can only be
 applied to such a type).
 
 @node Aspect Object_Size,Aspect Obsolescent,Aspect No_Tagged_Streams,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-object-size}@anchor{131}
+@anchor{gnat_rm/implementation_defined_aspects aspect-object-size}@anchor{133}
 @section Aspect Object_Size
 
 
 @geindex Object_Size
 
-This aspect is equivalent to @ref{132,,attribute Object_Size}.
+This aspect is equivalent to @ref{134,,attribute Object_Size}.
 
 @node Aspect Obsolescent,Aspect Part_Of,Aspect Object_Size,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-obsolescent}@anchor{133}
+@anchor{gnat_rm/implementation_defined_aspects aspect-obsolescent}@anchor{135}
 @section Aspect Obsolescent
 
 
@@ -9208,7 +9244,7 @@ evaluation of this aspect happens at the point of occurrence, it is not
 delayed until the freeze point.
 
 @node Aspect Part_Of,Aspect Persistent_BSS,Aspect Obsolescent,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-part-of}@anchor{134}
+@anchor{gnat_rm/implementation_defined_aspects aspect-part-of}@anchor{136}
 @section Aspect Part_Of
 
 
@@ -9217,7 +9253,7 @@ delayed until the freeze point.
 This aspect is equivalent to @ref{ab,,pragma Part_Of}.
 
 @node Aspect Persistent_BSS,Aspect Predicate,Aspect Part_Of,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-persistent-bss}@anchor{135}
+@anchor{gnat_rm/implementation_defined_aspects aspect-persistent-bss}@anchor{137}
 @section Aspect Persistent_BSS
 
 
@@ -9226,7 +9262,7 @@ This aspect is equivalent to @ref{ab,,pragma Part_Of}.
 This boolean aspect is equivalent to @ref{ad,,pragma Persistent_BSS}.
 
 @node Aspect Predicate,Aspect Pure_Function,Aspect Persistent_BSS,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-predicate}@anchor{136}
+@anchor{gnat_rm/implementation_defined_aspects aspect-predicate}@anchor{138}
 @section Aspect Predicate
 
 
@@ -9240,7 +9276,7 @@ expression. It is also separately controllable using pragma
 @cite{Assertion_Policy}.
 
 @node Aspect Pure_Function,Aspect Refined_Depends,Aspect Predicate,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-pure-function}@anchor{137}
+@anchor{gnat_rm/implementation_defined_aspects aspect-pure-function}@anchor{139}
 @section Aspect Pure_Function
 
 
@@ -9249,7 +9285,7 @@ expression. It is also separately controllable using pragma
 This boolean aspect is equivalent to @ref{c1,,pragma Pure_Function}.
 
 @node Aspect Refined_Depends,Aspect Refined_Global,Aspect Pure_Function,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-refined-depends}@anchor{138}
+@anchor{gnat_rm/implementation_defined_aspects aspect-refined-depends}@anchor{13a}
 @section Aspect Refined_Depends
 
 
@@ -9258,7 +9294,7 @@ This boolean aspect is equivalent to @ref{c1,,pragma Pure_Function}.
 This aspect is equivalent to @ref{c6,,pragma Refined_Depends}.
 
 @node Aspect Refined_Global,Aspect Refined_Post,Aspect Refined_Depends,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-refined-global}@anchor{139}
+@anchor{gnat_rm/implementation_defined_aspects aspect-refined-global}@anchor{13b}
 @section Aspect Refined_Global
 
 
@@ -9267,7 +9303,7 @@ This aspect is equivalent to @ref{c6,,pragma Refined_Depends}.
 This aspect is equivalent to @ref{c7,,pragma Refined_Global}.
 
 @node Aspect Refined_Post,Aspect Refined_State,Aspect Refined_Global,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-refined-post}@anchor{13a}
+@anchor{gnat_rm/implementation_defined_aspects aspect-refined-post}@anchor{13c}
 @section Aspect Refined_Post
 
 
@@ -9276,7 +9312,7 @@ This aspect is equivalent to @ref{c7,,pragma Refined_Global}.
 This aspect is equivalent to @ref{c9,,pragma Refined_Post}.
 
 @node Aspect Refined_State,Aspect Remote_Access_Type,Aspect Refined_Post,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-refined-state}@anchor{13b}
+@anchor{gnat_rm/implementation_defined_aspects aspect-refined-state}@anchor{13d}
 @section Aspect Refined_State
 
 
@@ -9285,7 +9321,7 @@ This aspect is equivalent to @ref{c9,,pragma Refined_Post}.
 This aspect is equivalent to @ref{cb,,pragma Refined_State}.
 
 @node Aspect Remote_Access_Type,Aspect Scalar_Storage_Order,Aspect Refined_State,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-remote-access-type}@anchor{13c}
+@anchor{gnat_rm/implementation_defined_aspects aspect-remote-access-type}@anchor{13e}
 @section Aspect Remote_Access_Type
 
 
@@ -9294,16 +9330,16 @@ This aspect is equivalent to @ref{cb,,pragma Refined_State}.
 This aspect is equivalent to @ref{cf,,pragma Remote_Access_Type}.
 
 @node Aspect Scalar_Storage_Order,Aspect Shared,Aspect Remote_Access_Type,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-scalar-storage-order}@anchor{13d}
+@anchor{gnat_rm/implementation_defined_aspects aspect-scalar-storage-order}@anchor{13f}
 @section Aspect Scalar_Storage_Order
 
 
 @geindex Scalar_Storage_Order
 
-This aspect is equivalent to a @ref{13e,,attribute Scalar_Storage_Order}.
+This aspect is equivalent to a @ref{140,,attribute Scalar_Storage_Order}.
 
 @node Aspect Shared,Aspect Simple_Storage_Pool,Aspect Scalar_Storage_Order,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-shared}@anchor{13f}
+@anchor{gnat_rm/implementation_defined_aspects aspect-shared}@anchor{141}
 @section Aspect Shared
 
 
@@ -9313,7 +9349,7 @@ This boolean aspect is equivalent to @ref{d5,,pragma Shared}
 and is thus a synonym for aspect @cite{Atomic}.
 
 @node Aspect Simple_Storage_Pool,Aspect Simple_Storage_Pool_Type,Aspect Shared,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool}@anchor{140}
+@anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool}@anchor{142}
 @section Aspect Simple_Storage_Pool
 
 
@@ -9322,7 +9358,7 @@ and is thus a synonym for aspect @cite{Atomic}.
 This aspect is equivalent to @ref{da,,attribute Simple_Storage_Pool}.
 
 @node Aspect Simple_Storage_Pool_Type,Aspect SPARK_Mode,Aspect Simple_Storage_Pool,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool-type}@anchor{141}
+@anchor{gnat_rm/implementation_defined_aspects aspect-simple-storage-pool-type}@anchor{143}
 @section Aspect Simple_Storage_Pool_Type
 
 
@@ -9331,7 +9367,7 @@ This aspect is equivalent to @ref{da,,attribute Simple_Storage_Pool}.
 This boolean aspect is equivalent to @ref{d8,,pragma Simple_Storage_Pool_Type}.
 
 @node Aspect SPARK_Mode,Aspect Suppress_Debug_Info,Aspect Simple_Storage_Pool_Type,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-spark-mode}@anchor{142}
+@anchor{gnat_rm/implementation_defined_aspects aspect-spark-mode}@anchor{144}
 @section Aspect SPARK_Mode
 
 
@@ -9342,7 +9378,7 @@ may be specified for either or both of the specification and body
 of a subprogram or package.
 
 @node Aspect Suppress_Debug_Info,Aspect Suppress_Initialization,Aspect SPARK_Mode,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-suppress-debug-info}@anchor{143}
+@anchor{gnat_rm/implementation_defined_aspects aspect-suppress-debug-info}@anchor{145}
 @section Aspect Suppress_Debug_Info
 
 
@@ -9351,7 +9387,7 @@ of a subprogram or package.
 This boolean aspect is equivalent to @ref{e8,,pragma Suppress_Debug_Info}.
 
 @node Aspect Suppress_Initialization,Aspect Test_Case,Aspect Suppress_Debug_Info,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-suppress-initialization}@anchor{144}
+@anchor{gnat_rm/implementation_defined_aspects aspect-suppress-initialization}@anchor{146}
 @section Aspect Suppress_Initialization
 
 
@@ -9360,7 +9396,7 @@ This boolean aspect is equivalent to @ref{e8,,pragma Suppress_Debug_Info}.
 This boolean aspect is equivalent to @ref{ec,,pragma Suppress_Initialization}.
 
 @node Aspect Test_Case,Aspect Thread_Local_Storage,Aspect Suppress_Initialization,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-test-case}@anchor{145}
+@anchor{gnat_rm/implementation_defined_aspects aspect-test-case}@anchor{147}
 @section Aspect Test_Case
 
 
@@ -9369,7 +9405,7 @@ This boolean aspect is equivalent to @ref{ec,,pragma Suppress_Initialization}.
 This aspect is equivalent to @ref{ef,,pragma Test_Case}.
 
 @node Aspect Thread_Local_Storage,Aspect Universal_Aliasing,Aspect Test_Case,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-thread-local-storage}@anchor{146}
+@anchor{gnat_rm/implementation_defined_aspects aspect-thread-local-storage}@anchor{148}
 @section Aspect Thread_Local_Storage
 
 
@@ -9378,7 +9414,7 @@ This aspect is equivalent to @ref{ef,,pragma Test_Case}.
 This boolean aspect is equivalent to @ref{f1,,pragma Thread_Local_Storage}.
 
 @node Aspect Universal_Aliasing,Aspect Universal_Data,Aspect Thread_Local_Storage,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-universal-aliasing}@anchor{147}
+@anchor{gnat_rm/implementation_defined_aspects aspect-universal-aliasing}@anchor{149}
 @section Aspect Universal_Aliasing
 
 
@@ -9387,7 +9423,7 @@ This boolean aspect is equivalent to @ref{f1,,pragma Thread_Local_Storage}.
 This boolean aspect is equivalent to @ref{fc,,pragma Universal_Aliasing}.
 
 @node Aspect Universal_Data,Aspect Unmodified,Aspect Universal_Aliasing,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-universal-data}@anchor{148}
+@anchor{gnat_rm/implementation_defined_aspects aspect-universal-data}@anchor{14a}
 @section Aspect Universal_Data
 
 
@@ -9396,7 +9432,7 @@ This boolean aspect is equivalent to @ref{fc,,pragma Universal_Aliasing}.
 This aspect is equivalent to @ref{fd,,pragma Universal_Data}.
 
 @node Aspect Unmodified,Aspect Unreferenced,Aspect Universal_Data,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-unmodified}@anchor{149}
+@anchor{gnat_rm/implementation_defined_aspects aspect-unmodified}@anchor{14b}
 @section Aspect Unmodified
 
 
@@ -9405,7 +9441,7 @@ This aspect is equivalent to @ref{fd,,pragma Universal_Data}.
 This boolean aspect is equivalent to @ref{100,,pragma Unmodified}.
 
 @node Aspect Unreferenced,Aspect Unreferenced_Objects,Aspect Unmodified,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced}@anchor{14a}
+@anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced}@anchor{14c}
 @section Aspect Unreferenced
 
 
@@ -9416,7 +9452,7 @@ in the case of formal parameters, it is not permitted to have aspects for
 a formal parameter, so in this case the pragma form must be used.
 
 @node Aspect Unreferenced_Objects,Aspect Value_Size,Aspect Unreferenced,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced-objects}@anchor{14b}
+@anchor{gnat_rm/implementation_defined_aspects aspect-unreferenced-objects}@anchor{14d}
 @section Aspect Unreferenced_Objects
 
 
@@ -9425,45 +9461,45 @@ a formal parameter, so in this case the pragma form must be used.
 This boolean aspect is equivalent to @ref{103,,pragma Unreferenced_Objects}.
 
 @node Aspect Value_Size,Aspect Volatile_Full_Access,Aspect Unreferenced_Objects,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-value-size}@anchor{14c}
+@anchor{gnat_rm/implementation_defined_aspects aspect-value-size}@anchor{14e}
 @section Aspect Value_Size
 
 
 @geindex Value_Size
 
-This aspect is equivalent to @ref{14d,,attribute Value_Size}.
+This aspect is equivalent to @ref{14f,,attribute Value_Size}.
 
 @node Aspect Volatile_Full_Access,Aspect Volatile_Function,Aspect Value_Size,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-volatile-full-access}@anchor{14e}
+@anchor{gnat_rm/implementation_defined_aspects aspect-volatile-full-access}@anchor{150}
 @section Aspect Volatile_Full_Access
 
 
 @geindex Volatile_Full_Access
 
-This boolean aspect is equivalent to @ref{10a,,pragma Volatile_Full_Access}.
+This boolean aspect is equivalent to @ref{10c,,pragma Volatile_Full_Access}.
 
 @node Aspect Volatile_Function,Aspect Warnings,Aspect Volatile_Full_Access,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-volatile-function}@anchor{14f}
+@anchor{gnat_rm/implementation_defined_aspects aspect-volatile-function}@anchor{151}
 @section Aspect Volatile_Function
 
 
 @geindex Volatile_Function
 
-This boolean aspect is equivalent to @ref{10d,,pragma Volatile_Function}.
+This boolean aspect is equivalent to @ref{10f,,pragma Volatile_Function}.
 
 @node Aspect Warnings,,Aspect Volatile_Function,Implementation Defined Aspects
-@anchor{gnat_rm/implementation_defined_aspects aspect-warnings}@anchor{150}
+@anchor{gnat_rm/implementation_defined_aspects aspect-warnings}@anchor{152}
 @section Aspect Warnings
 
 
 @geindex Warnings
 
-This aspect is equivalent to the two argument form of @ref{10f,,pragma Warnings},
+This aspect is equivalent to the two argument form of @ref{111,,pragma Warnings},
 where the first argument is @cite{ON} or @cite{OFF} and the second argument
 is the entity.
 
 @node Implementation Defined Attributes,Standard and Implementation Defined Restrictions,Implementation Defined Aspects,Top
-@anchor{gnat_rm/implementation_defined_attributes doc}@anchor{151}@anchor{gnat_rm/implementation_defined_attributes implementation-defined-attributes}@anchor{8}@anchor{gnat_rm/implementation_defined_attributes id1}@anchor{152}
+@anchor{gnat_rm/implementation_defined_attributes doc}@anchor{153}@anchor{gnat_rm/implementation_defined_attributes implementation-defined-attributes}@anchor{8}@anchor{gnat_rm/implementation_defined_attributes id1}@anchor{154}
 @chapter Implementation Defined Attributes
 
 
@@ -9563,7 +9599,7 @@ consideration, you should minimize the use of these attributes.
 @end menu
 
 @node Attribute Abort_Signal,Attribute Address_Size,,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-abort-signal}@anchor{153}
+@anchor{gnat_rm/implementation_defined_attributes attribute-abort-signal}@anchor{155}
 @section Attribute Abort_Signal
 
 
@@ -9577,7 +9613,7 @@ completely outside the normal semantics of Ada, for a user program to
 intercept the abort exception).
 
 @node Attribute Address_Size,Attribute Asm_Input,Attribute Abort_Signal,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-address-size}@anchor{154}
+@anchor{gnat_rm/implementation_defined_attributes attribute-address-size}@anchor{156}
 @section Attribute Address_Size
 
 
@@ -9593,7 +9629,7 @@ reference to System.Address'Size is nonstatic because Address
 is a private type.
 
 @node Attribute Asm_Input,Attribute Asm_Output,Attribute Address_Size,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-asm-input}@anchor{155}
+@anchor{gnat_rm/implementation_defined_attributes attribute-asm-input}@anchor{157}
 @section Attribute Asm_Input
 
 
@@ -9607,10 +9643,10 @@ to be a static expression, and is the constraint for the parameter,
 value to be used as the input argument.  The possible values for the
 constant are the same as those used in the RTL, and are dependent on
 the configuration file used to built the GCC back end.
-@ref{156,,Machine Code Insertions}
+@ref{158,,Machine Code Insertions}
 
 @node Attribute Asm_Output,Attribute Atomic_Always_Lock_Free,Attribute Asm_Input,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-asm-output}@anchor{157}
+@anchor{gnat_rm/implementation_defined_attributes attribute-asm-output}@anchor{159}
 @section Attribute Asm_Output
 
 
@@ -9626,10 +9662,10 @@ result.  The possible values for constraint are the same as those used in
 the RTL, and are dependent on the configuration file used to build the
 GCC back end.  If there are no output operands, then this argument may
 either be omitted, or explicitly given as @cite{No_Output_Operands}.
-@ref{156,,Machine Code Insertions}
+@ref{158,,Machine Code Insertions}
 
 @node Attribute Atomic_Always_Lock_Free,Attribute Bit,Attribute Asm_Output,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-atomic-always-lock-free}@anchor{158}
+@anchor{gnat_rm/implementation_defined_attributes attribute-atomic-always-lock-free}@anchor{15a}
 @section Attribute Atomic_Always_Lock_Free
 
 
@@ -9641,7 +9677,7 @@ and False otherwise.  The result indicate whether atomic operations are
 supported by the target for the given type.
 
 @node Attribute Bit,Attribute Bit_Position,Attribute Atomic_Always_Lock_Free,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-bit}@anchor{159}
+@anchor{gnat_rm/implementation_defined_attributes attribute-bit}@anchor{15b}
 @section Attribute Bit
 
 
@@ -9672,7 +9708,7 @@ This attribute is designed to be compatible with the DEC Ada 83 definition
 and implementation of the @cite{Bit} attribute.
 
 @node Attribute Bit_Position,Attribute Code_Address,Attribute Bit,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-bit-position}@anchor{15a}
+@anchor{gnat_rm/implementation_defined_attributes attribute-bit-position}@anchor{15c}
 @section Attribute Bit_Position
 
 
@@ -9687,7 +9723,7 @@ type @cite{Universal_Integer}.  The value depends only on the field
 the containing record @cite{R}.
 
 @node Attribute Code_Address,Attribute Compiler_Version,Attribute Bit_Position,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-code-address}@anchor{15b}
+@anchor{gnat_rm/implementation_defined_attributes attribute-code-address}@anchor{15d}
 @section Attribute Code_Address
 
 
@@ -9730,7 +9766,7 @@ the same value as is returned by the corresponding @cite{'Address}
 attribute.
 
 @node Attribute Compiler_Version,Attribute Constrained,Attribute Code_Address,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-compiler-version}@anchor{15c}
+@anchor{gnat_rm/implementation_defined_attributes attribute-compiler-version}@anchor{15e}
 @section Attribute Compiler_Version
 
 
@@ -9741,7 +9777,7 @@ prefix) yields a static string identifying the version of the compiler
 being used to compile the unit containing the attribute reference.
 
 @node Attribute Constrained,Attribute Default_Bit_Order,Attribute Compiler_Version,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-constrained}@anchor{15d}
+@anchor{gnat_rm/implementation_defined_attributes attribute-constrained}@anchor{15f}
 @section Attribute Constrained
 
 
@@ -9756,7 +9792,7 @@ record type without discriminants is always @cite{True}. This usage is
 compatible with older Ada compilers, including notably DEC Ada.
 
 @node Attribute Default_Bit_Order,Attribute Default_Scalar_Storage_Order,Attribute Constrained,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-default-bit-order}@anchor{15e}
+@anchor{gnat_rm/implementation_defined_attributes attribute-default-bit-order}@anchor{160}
 @section Attribute Default_Bit_Order
 
 
@@ -9773,7 +9809,7 @@ as a @cite{Pos} value (0 for @cite{High_Order_First}, 1 for
 @cite{Default_Bit_Order} in package @cite{System}.
 
 @node Attribute Default_Scalar_Storage_Order,Attribute Deref,Attribute Default_Bit_Order,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-default-scalar-storage-order}@anchor{15f}
+@anchor{gnat_rm/implementation_defined_attributes attribute-default-scalar-storage-order}@anchor{161}
 @section Attribute Default_Scalar_Storage_Order
 
 
@@ -9790,7 +9826,7 @@ equal to @cite{Default_Bit_Order} if unspecified) as a
 @cite{System.Bit_Order} value. This is a static attribute.
 
 @node Attribute Deref,Attribute Descriptor_Size,Attribute Default_Scalar_Storage_Order,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-deref}@anchor{160}
+@anchor{gnat_rm/implementation_defined_attributes attribute-deref}@anchor{162}
 @section Attribute Deref
 
 
@@ -9803,7 +9839,7 @@ a named access-to-@cite{typ} type, except that it yields a variable, so it can b
 used on the left side of an assignment.
 
 @node Attribute Descriptor_Size,Attribute Elaborated,Attribute Deref,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-descriptor-size}@anchor{161}
+@anchor{gnat_rm/implementation_defined_attributes attribute-descriptor-size}@anchor{163}
 @section Attribute Descriptor_Size
 
 
@@ -9830,7 +9866,7 @@ In the example above, the descriptor contains two values of type
 a size of 31 bits and an alignment of 4, the descriptor size is @cite{2 * Positive'Size + 2} or 64 bits.
 
 @node Attribute Elaborated,Attribute Elab_Body,Attribute Descriptor_Size,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-elaborated}@anchor{162}
+@anchor{gnat_rm/implementation_defined_attributes attribute-elaborated}@anchor{164}
 @section Attribute Elaborated
 
 
@@ -9845,7 +9881,7 @@ units has been completed.  An exception is for units which need no
 elaboration, the value is always False for such units.
 
 @node Attribute Elab_Body,Attribute Elab_Spec,Attribute Elaborated,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-elab-body}@anchor{163}
+@anchor{gnat_rm/implementation_defined_attributes attribute-elab-body}@anchor{165}
 @section Attribute Elab_Body
 
 
@@ -9861,7 +9897,7 @@ e.g., if it is necessary to do selective re-elaboration to fix some
 error.
 
 @node Attribute Elab_Spec,Attribute Elab_Subp_Body,Attribute Elab_Body,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-elab-spec}@anchor{164}
+@anchor{gnat_rm/implementation_defined_attributes attribute-elab-spec}@anchor{166}
 @section Attribute Elab_Spec
 
 
@@ -9877,7 +9913,7 @@ Ada code, e.g., if it is necessary to do selective re-elaboration to fix
 some error.
 
 @node Attribute Elab_Subp_Body,Attribute Emax,Attribute Elab_Spec,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-elab-subp-body}@anchor{165}
+@anchor{gnat_rm/implementation_defined_attributes attribute-elab-subp-body}@anchor{167}
 @section Attribute Elab_Subp_Body
 
 
@@ -9891,7 +9927,7 @@ elaboration procedure by the binder in CodePeer mode only and is unrecognized
 otherwise.
 
 @node Attribute Emax,Attribute Enabled,Attribute Elab_Subp_Body,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-emax}@anchor{166}
+@anchor{gnat_rm/implementation_defined_attributes attribute-emax}@anchor{168}
 @section Attribute Emax
 
 
@@ -9904,7 +9940,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute.
 
 @node Attribute Enabled,Attribute Enum_Rep,Attribute Emax,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-enabled}@anchor{167}
+@anchor{gnat_rm/implementation_defined_attributes attribute-enabled}@anchor{169}
 @section Attribute Enabled
 
 
@@ -9928,7 +9964,7 @@ a @cite{pragma Suppress} or @cite{pragma Unsuppress} before instantiating
 the package or subprogram, controlling whether the check will be present.
 
 @node Attribute Enum_Rep,Attribute Enum_Val,Attribute Enabled,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-enum-rep}@anchor{168}
+@anchor{gnat_rm/implementation_defined_attributes attribute-enum-rep}@anchor{16a}
 @section Attribute Enum_Rep
 
 
@@ -9965,7 +10001,7 @@ integer calculation is done at run time, then the call to @cite{Enum_Rep}
 may raise @cite{Constraint_Error}.
 
 @node Attribute Enum_Val,Attribute Epsilon,Attribute Enum_Rep,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-enum-val}@anchor{169}
+@anchor{gnat_rm/implementation_defined_attributes attribute-enum-val}@anchor{16b}
 @section Attribute Enum_Val
 
 
@@ -9988,7 +10024,7 @@ absence of an enumeration representation clause.  This is a static
 attribute (i.e., the result is static if the argument is static).
 
 @node Attribute Epsilon,Attribute Fast_Math,Attribute Enum_Val,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-epsilon}@anchor{16a}
+@anchor{gnat_rm/implementation_defined_attributes attribute-epsilon}@anchor{16c}
 @section Attribute Epsilon
 
 
@@ -10001,7 +10037,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute.
 
 @node Attribute Fast_Math,Attribute Fixed_Value,Attribute Epsilon,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-fast-math}@anchor{16b}
+@anchor{gnat_rm/implementation_defined_attributes attribute-fast-math}@anchor{16d}
 @section Attribute Fast_Math
 
 
@@ -10012,7 +10048,7 @@ prefix) yields a static Boolean value that is True if pragma
 @cite{Fast_Math} is active, and False otherwise.
 
 @node Attribute Fixed_Value,Attribute From_Any,Attribute Fast_Math,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-fixed-value}@anchor{16c}
+@anchor{gnat_rm/implementation_defined_attributes attribute-fixed-value}@anchor{16e}
 @section Attribute Fixed_Value
 
 
@@ -10039,7 +10075,7 @@ This attribute is primarily intended for use in implementation of the
 input-output functions for fixed-point values.
 
 @node Attribute From_Any,Attribute Has_Access_Values,Attribute Fixed_Value,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-from-any}@anchor{16d}
+@anchor{gnat_rm/implementation_defined_attributes attribute-from-any}@anchor{16f}
 @section Attribute From_Any
 
 
@@ -10049,7 +10085,7 @@ This internal attribute is used for the generation of remote subprogram
 stubs in the context of the Distributed Systems Annex.
 
 @node Attribute Has_Access_Values,Attribute Has_Discriminants,Attribute From_Any,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-has-access-values}@anchor{16e}
+@anchor{gnat_rm/implementation_defined_attributes attribute-has-access-values}@anchor{170}
 @section Attribute Has_Access_Values
 
 
@@ -10067,7 +10103,7 @@ definitions.  If the attribute is applied to a generic private type, it
 indicates whether or not the corresponding actual type has access values.
 
 @node Attribute Has_Discriminants,Attribute Img,Attribute Has_Access_Values,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-has-discriminants}@anchor{16f}
+@anchor{gnat_rm/implementation_defined_attributes attribute-has-discriminants}@anchor{171}
 @section Attribute Has_Discriminants
 
 
@@ -10083,7 +10119,7 @@ definitions.  If the attribute is applied to a generic private type, it
 indicates whether or not the corresponding actual type has discriminants.
 
 @node Attribute Img,Attribute Integer_Value,Attribute Has_Discriminants,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-img}@anchor{170}
+@anchor{gnat_rm/implementation_defined_attributes attribute-img}@anchor{172}
 @section Attribute Img
 
 
@@ -10113,7 +10149,7 @@ that returns the appropriate string when called. This means that
 in an instantiation as a function parameter.
 
 @node Attribute Integer_Value,Attribute Invalid_Value,Attribute Img,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-integer-value}@anchor{171}
+@anchor{gnat_rm/implementation_defined_attributes attribute-integer-value}@anchor{173}
 @section Attribute Integer_Value
 
 
@@ -10141,7 +10177,7 @@ This attribute is primarily intended for use in implementation of the
 standard input-output functions for fixed-point values.
 
 @node Attribute Invalid_Value,Attribute Iterable,Attribute Integer_Value,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-invalid-value}@anchor{172}
+@anchor{gnat_rm/implementation_defined_attributes attribute-invalid-value}@anchor{174}
 @section Attribute Invalid_Value
 
 
@@ -10155,7 +10191,7 @@ including the ability to modify the value with the binder -Sxx flag and
 relevant environment variables at run time.
 
 @node Attribute Iterable,Attribute Large,Attribute Invalid_Value,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-iterable}@anchor{173}
+@anchor{gnat_rm/implementation_defined_attributes attribute-iterable}@anchor{175}
 @section Attribute Iterable
 
 
@@ -10164,7 +10200,7 @@ relevant environment variables at run time.
 Equivalent to Aspect Iterable.
 
 @node Attribute Large,Attribute Library_Level,Attribute Iterable,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-large}@anchor{174}
+@anchor{gnat_rm/implementation_defined_attributes attribute-large}@anchor{176}
 @section Attribute Large
 
 
@@ -10177,7 +10213,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute.
 
 @node Attribute Library_Level,Attribute Lock_Free,Attribute Large,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-library-level}@anchor{175}
+@anchor{gnat_rm/implementation_defined_attributes attribute-library-level}@anchor{177}
 @section Attribute Library_Level
 
 
@@ -10203,7 +10239,7 @@ end Gen;
 @end example
 
 @node Attribute Lock_Free,Attribute Loop_Entry,Attribute Library_Level,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-lock-free}@anchor{176}
+@anchor{gnat_rm/implementation_defined_attributes attribute-lock-free}@anchor{178}
 @section Attribute Lock_Free
 
 
@@ -10213,7 +10249,7 @@ end Gen;
 pragma @cite{Lock_Free} applies to P.
 
 @node Attribute Loop_Entry,Attribute Machine_Size,Attribute Lock_Free,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-loop-entry}@anchor{177}
+@anchor{gnat_rm/implementation_defined_attributes attribute-loop-entry}@anchor{179}
 @section Attribute Loop_Entry
 
 
@@ -10243,7 +10279,7 @@ entry. This copy is not performed if the loop is not entered, or if the
 corresponding pragmas are ignored or disabled.
 
 @node Attribute Machine_Size,Attribute Mantissa,Attribute Loop_Entry,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-machine-size}@anchor{178}
+@anchor{gnat_rm/implementation_defined_attributes attribute-machine-size}@anchor{17a}
 @section Attribute Machine_Size
 
 
@@ -10253,7 +10289,7 @@ This attribute is identical to the @cite{Object_Size} attribute.  It is
 provided for compatibility with the DEC Ada 83 attribute of this name.
 
 @node Attribute Mantissa,Attribute Maximum_Alignment,Attribute Machine_Size,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-mantissa}@anchor{179}
+@anchor{gnat_rm/implementation_defined_attributes attribute-mantissa}@anchor{17b}
 @section Attribute Mantissa
 
 
@@ -10266,7 +10302,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute.
 
 @node Attribute Maximum_Alignment,Attribute Mechanism_Code,Attribute Mantissa,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-maximum-alignment}@anchor{17a}@anchor{gnat_rm/implementation_defined_attributes id2}@anchor{17b}
+@anchor{gnat_rm/implementation_defined_attributes attribute-maximum-alignment}@anchor{17c}@anchor{gnat_rm/implementation_defined_attributes id2}@anchor{17d}
 @section Attribute Maximum_Alignment
 
 
@@ -10282,7 +10318,7 @@ for an object, guaranteeing that it is properly aligned in all
 cases.
 
 @node Attribute Mechanism_Code,Attribute Null_Parameter,Attribute Maximum_Alignment,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-mechanism-code}@anchor{17c}
+@anchor{gnat_rm/implementation_defined_attributes attribute-mechanism-code}@anchor{17e}
 @section Attribute Mechanism_Code
 
 
@@ -10313,7 +10349,7 @@ by reference
 @end table
 
 @node Attribute Null_Parameter,Attribute Object_Size,Attribute Mechanism_Code,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-null-parameter}@anchor{17d}
+@anchor{gnat_rm/implementation_defined_attributes attribute-null-parameter}@anchor{17f}
 @section Attribute Null_Parameter
 
 
@@ -10338,7 +10374,7 @@ There is no way of indicating this without the @cite{Null_Parameter}
 attribute.
 
 @node Attribute Object_Size,Attribute Old,Attribute Null_Parameter,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-object-size}@anchor{132}@anchor{gnat_rm/implementation_defined_attributes id3}@anchor{17e}
+@anchor{gnat_rm/implementation_defined_attributes attribute-object-size}@anchor{134}@anchor{gnat_rm/implementation_defined_attributes id3}@anchor{180}
 @section Attribute Object_Size
 
 
@@ -10408,7 +10444,7 @@ Similar additional checks are performed in other contexts requiring
 statically matching subtypes.
 
 @node Attribute Old,Attribute Passed_By_Reference,Attribute Object_Size,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-old}@anchor{17f}
+@anchor{gnat_rm/implementation_defined_attributes attribute-old}@anchor{181}
 @section Attribute Old
 
 
@@ -10423,7 +10459,7 @@ definition are allowed under control of
 implementation defined pragma @cite{Unevaluated_Use_Of_Old}.
 
 @node Attribute Passed_By_Reference,Attribute Pool_Address,Attribute Old,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-passed-by-reference}@anchor{180}
+@anchor{gnat_rm/implementation_defined_attributes attribute-passed-by-reference}@anchor{182}
 @section Attribute Passed_By_Reference
 
 
@@ -10439,7 +10475,7 @@ passed by copy in calls.  For scalar types, the result is always @cite{False}
 and is static.  For non-scalar types, the result is nonstatic.
 
 @node Attribute Pool_Address,Attribute Range_Length,Attribute Passed_By_Reference,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-pool-address}@anchor{181}
+@anchor{gnat_rm/implementation_defined_attributes attribute-pool-address}@anchor{183}
 @section Attribute Pool_Address
 
 
@@ -10464,7 +10500,7 @@ For an object created by @cite{new}, @code{Ptr.all'Pool_Address} is
 what is passed to @cite{Allocate} and returned from @cite{Deallocate}.
 
 @node Attribute Range_Length,Attribute Restriction_Set,Attribute Pool_Address,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-range-length}@anchor{182}
+@anchor{gnat_rm/implementation_defined_attributes attribute-range-length}@anchor{184}
 @section Attribute Range_Length
 
 
@@ -10477,7 +10513,7 @@ applied to the index subtype of a one dimensional array always gives the
 same result as @cite{Length} applied to the array itself.
 
 @node Attribute Restriction_Set,Attribute Result,Attribute Range_Length,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-restriction-set}@anchor{183}
+@anchor{gnat_rm/implementation_defined_attributes attribute-restriction-set}@anchor{185}
 @section Attribute Restriction_Set
 
 
@@ -10547,7 +10583,7 @@ Restrictions pragma, they are not analyzed semantically,
 so they do not have a type.
 
 @node Attribute Result,Attribute Safe_Emax,Attribute Restriction_Set,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-result}@anchor{184}
+@anchor{gnat_rm/implementation_defined_attributes attribute-result}@anchor{186}
 @section Attribute Result
 
 
@@ -10560,7 +10596,7 @@ For a further discussion of the use of this attribute and examples of its use,
 see the description of pragma Postcondition.
 
 @node Attribute Safe_Emax,Attribute Safe_Large,Attribute Result,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-safe-emax}@anchor{185}
+@anchor{gnat_rm/implementation_defined_attributes attribute-safe-emax}@anchor{187}
 @section Attribute Safe_Emax
 
 
@@ -10573,7 +10609,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute.
 
 @node Attribute Safe_Large,Attribute Safe_Small,Attribute Safe_Emax,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-safe-large}@anchor{186}
+@anchor{gnat_rm/implementation_defined_attributes attribute-safe-large}@anchor{188}
 @section Attribute Safe_Large
 
 
@@ -10586,7 +10622,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute.
 
 @node Attribute Safe_Small,Attribute Scalar_Storage_Order,Attribute Safe_Large,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-safe-small}@anchor{187}
+@anchor{gnat_rm/implementation_defined_attributes attribute-safe-small}@anchor{189}
 @section Attribute Safe_Small
 
 
@@ -10599,7 +10635,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute.
 
 @node Attribute Scalar_Storage_Order,Attribute Simple_Storage_Pool,Attribute Safe_Small,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes id4}@anchor{188}@anchor{gnat_rm/implementation_defined_attributes attribute-scalar-storage-order}@anchor{13e}
+@anchor{gnat_rm/implementation_defined_attributes id4}@anchor{18a}@anchor{gnat_rm/implementation_defined_attributes attribute-scalar-storage-order}@anchor{140}
 @section Attribute Scalar_Storage_Order
 
 
@@ -10661,10 +10697,7 @@ types. This may be overridden for the derived type by giving an explicit scalar
 storage order for the derived type. For a record extension, the derived type
 must have the same scalar storage order as the parent type.
 
-If a component of @cite{T} is of a record or array type, then that type must
-also have a @cite{Scalar_Storage_Order} attribute definition clause.
-
-A component of a record or array type that is a packed array, or that
+A component of a record or array type that is a bit-packed array, or that
 does not start on a byte boundary, must have the same scalar storage order
 as the enclosing record or array type.
 
@@ -10711,12 +10744,17 @@ inheritance in the case of a derived type), then the default is normally
 the native ordering of the target, but this default can be overridden using
 pragma @cite{Default_Scalar_Storage_Order}.
 
+Note that if a component of @cite{T} is itself of a record or array type,
+the specfied @cite{Scalar_Storage_Order} does @emph{not} apply to that nested type:
+an explicit attribute definition clause must be provided for the component
+type as well if desired.
+
 Note that the scalar storage order only affects the in-memory data
 representation. It has no effect on the representation used by stream
 attributes.
 
 @node Attribute Simple_Storage_Pool,Attribute Small,Attribute Scalar_Storage_Order,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-simple-storage-pool}@anchor{da}@anchor{gnat_rm/implementation_defined_attributes id5}@anchor{189}
+@anchor{gnat_rm/implementation_defined_attributes attribute-simple-storage-pool}@anchor{da}@anchor{gnat_rm/implementation_defined_attributes id5}@anchor{18b}
 @section Attribute Simple_Storage_Pool
 
 
@@ -10779,7 +10817,7 @@ as defined in section 13.11.2 of the Ada Reference Manual, except that the
 term 'simple storage pool' is substituted for 'storage pool'.
 
 @node Attribute Small,Attribute Storage_Unit,Attribute Simple_Storage_Pool,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-small}@anchor{18a}
+@anchor{gnat_rm/implementation_defined_attributes attribute-small}@anchor{18c}
 @section Attribute Small
 
 
@@ -10795,7 +10833,7 @@ the Ada 83 reference manual for an exact description of the semantics of
 this attribute when applied to floating-point types.
 
 @node Attribute Storage_Unit,Attribute Stub_Type,Attribute Small,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-storage-unit}@anchor{18b}
+@anchor{gnat_rm/implementation_defined_attributes attribute-storage-unit}@anchor{18d}
 @section Attribute Storage_Unit
 
 
@@ -10805,7 +10843,7 @@ this attribute when applied to floating-point types.
 prefix) provides the same value as @cite{System.Storage_Unit}.
 
 @node Attribute Stub_Type,Attribute System_Allocator_Alignment,Attribute Storage_Unit,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-stub-type}@anchor{18c}
+@anchor{gnat_rm/implementation_defined_attributes attribute-stub-type}@anchor{18e}
 @section Attribute Stub_Type
 
 
@@ -10829,7 +10867,7 @@ unit @cite{System.Partition_Interface}. Use of this attribute will create
 an implicit dependency on this unit.
 
 @node Attribute System_Allocator_Alignment,Attribute Target_Name,Attribute Stub_Type,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-system-allocator-alignment}@anchor{18d}
+@anchor{gnat_rm/implementation_defined_attributes attribute-system-allocator-alignment}@anchor{18f}
 @section Attribute System_Allocator_Alignment
 
 
@@ -10846,7 +10884,7 @@ with alignment too large or to enable a realignment circuitry if the
 alignment request is larger than this value.
 
 @node Attribute Target_Name,Attribute To_Address,Attribute System_Allocator_Alignment,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-target-name}@anchor{18e}
+@anchor{gnat_rm/implementation_defined_attributes attribute-target-name}@anchor{190}
 @section Attribute Target_Name
 
 
@@ -10859,7 +10897,7 @@ standard gcc target name without the terminating slash (for
 example, GNAT 5.0 on windows yields "i586-pc-mingw32msv").
 
 @node Attribute To_Address,Attribute To_Any,Attribute Target_Name,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-to-address}@anchor{18f}
+@anchor{gnat_rm/implementation_defined_attributes attribute-to-address}@anchor{191}
 @section Attribute To_Address
 
 
@@ -10882,7 +10920,7 @@ modular manner (e.g., -1 means the same as 16#FFFF_FFFF# on
 a 32 bits machine).
 
 @node Attribute To_Any,Attribute Type_Class,Attribute To_Address,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-to-any}@anchor{190}
+@anchor{gnat_rm/implementation_defined_attributes attribute-to-any}@anchor{192}
 @section Attribute To_Any
 
 
@@ -10892,7 +10930,7 @@ This internal attribute is used for the generation of remote subprogram
 stubs in the context of the Distributed Systems Annex.
 
 @node Attribute Type_Class,Attribute Type_Key,Attribute To_Any,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-type-class}@anchor{191}
+@anchor{gnat_rm/implementation_defined_attributes attribute-type-class}@anchor{193}
 @section Attribute Type_Class
 
 
@@ -10922,7 +10960,7 @@ applies to all concurrent types.  This attribute is designed to
 be compatible with the DEC Ada 83 attribute of the same name.
 
 @node Attribute Type_Key,Attribute TypeCode,Attribute Type_Class,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-type-key}@anchor{192}
+@anchor{gnat_rm/implementation_defined_attributes attribute-type-key}@anchor{194}
 @section Attribute Type_Key
 
 
@@ -10934,7 +10972,7 @@ about the type or subtype. This provides improved compatibility with
 other implementations that support this attribute.
 
 @node Attribute TypeCode,Attribute Unconstrained_Array,Attribute Type_Key,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-typecode}@anchor{193}
+@anchor{gnat_rm/implementation_defined_attributes attribute-typecode}@anchor{195}
 @section Attribute TypeCode
 
 
@@ -10944,7 +10982,7 @@ This internal attribute is used for the generation of remote subprogram
 stubs in the context of the Distributed Systems Annex.
 
 @node Attribute Unconstrained_Array,Attribute Universal_Literal_String,Attribute TypeCode,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-unconstrained-array}@anchor{194}
+@anchor{gnat_rm/implementation_defined_attributes attribute-unconstrained-array}@anchor{196}
 @section Attribute Unconstrained_Array
 
 
@@ -10958,7 +10996,7 @@ still static, and yields the result of applying this test to the
 generic actual.
 
 @node Attribute Universal_Literal_String,Attribute Unrestricted_Access,Attribute Unconstrained_Array,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-universal-literal-string}@anchor{195}
+@anchor{gnat_rm/implementation_defined_attributes attribute-universal-literal-string}@anchor{197}
 @section Attribute Universal_Literal_String
 
 
@@ -10986,7 +11024,7 @@ end;
 @end example
 
 @node Attribute Unrestricted_Access,Attribute Update,Attribute Universal_Literal_String,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-unrestricted-access}@anchor{196}
+@anchor{gnat_rm/implementation_defined_attributes attribute-unrestricted-access}@anchor{198}
 @section Attribute Unrestricted_Access
 
 
@@ -11173,7 +11211,7 @@ In general this is a risky approach. It may appear to "work" but such uses of
 of @cite{GNAT} to another, so are best avoided if possible.
 
 @node Attribute Update,Attribute Valid_Scalars,Attribute Unrestricted_Access,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-update}@anchor{197}
+@anchor{gnat_rm/implementation_defined_attributes attribute-update}@anchor{199}
 @section Attribute Update
 
 
@@ -11254,7 +11292,7 @@ A := A'Update ((1, 2) => 20, (3, 4) => 30);
 which changes element (1,2) to 20 and (3,4) to 30.
 
 @node Attribute Valid_Scalars,Attribute VADS_Size,Attribute Update,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-valid-scalars}@anchor{198}
+@anchor{gnat_rm/implementation_defined_attributes attribute-valid-scalars}@anchor{19a}
 @section Attribute Valid_Scalars
 
 
@@ -11289,7 +11327,7 @@ to write a function with a single use of the attribute, and then call that
 function from multiple places.
 
 @node Attribute VADS_Size,Attribute Value_Size,Attribute Valid_Scalars,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-vads-size}@anchor{199}
+@anchor{gnat_rm/implementation_defined_attributes attribute-vads-size}@anchor{19b}
 @section Attribute VADS_Size
 
 
@@ -11309,7 +11347,7 @@ gives the result that would be obtained by applying the attribute to
 the corresponding type.
 
 @node Attribute Value_Size,Attribute Wchar_T_Size,Attribute VADS_Size,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes id6}@anchor{19a}@anchor{gnat_rm/implementation_defined_attributes attribute-value-size}@anchor{14d}
+@anchor{gnat_rm/implementation_defined_attributes id6}@anchor{19c}@anchor{gnat_rm/implementation_defined_attributes attribute-value-size}@anchor{14f}
 @section Attribute Value_Size
 
 
@@ -11323,7 +11361,7 @@ a value of the given subtype.  It is the same as @code{type'Size},
 but, unlike @cite{Size}, may be set for non-first subtypes.
 
 @node Attribute Wchar_T_Size,Attribute Word_Size,Attribute Value_Size,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-wchar-t-size}@anchor{19b}
+@anchor{gnat_rm/implementation_defined_attributes attribute-wchar-t-size}@anchor{19d}
 @section Attribute Wchar_T_Size
 
 
@@ -11335,7 +11373,7 @@ primarily for constructing the definition of this type in
 package @cite{Interfaces.C}. The result is a static constant.
 
 @node Attribute Word_Size,,Attribute Wchar_T_Size,Implementation Defined Attributes
-@anchor{gnat_rm/implementation_defined_attributes attribute-word-size}@anchor{19c}
+@anchor{gnat_rm/implementation_defined_attributes attribute-word-size}@anchor{19e}
 @section Attribute Word_Size
 
 
@@ -11346,7 +11384,7 @@ prefix) provides the value @cite{System.Word_Size}. The result is
 a static constant.
 
 @node Standard and Implementation Defined Restrictions,Implementation Advice,Implementation Defined Attributes,Top
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions standard-and-implementation-defined-restrictions}@anchor{9}@anchor{gnat_rm/standard_and_implementation_defined_restrictions doc}@anchor{19d}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id1}@anchor{19e}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions standard-and-implementation-defined-restrictions}@anchor{9}@anchor{gnat_rm/standard_and_implementation_defined_restrictions doc}@anchor{19f}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id1}@anchor{1a0}
 @chapter Standard and Implementation Defined Restrictions
 
 
@@ -11375,7 +11413,7 @@ language defined or GNAT-specific, are listed in the following.
 @end menu
 
 @node Partition-Wide Restrictions,Program Unit Level Restrictions,,Standard and Implementation Defined Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions partition-wide-restrictions}@anchor{19f}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id2}@anchor{1a0}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions partition-wide-restrictions}@anchor{1a1}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id2}@anchor{1a2}
 @section Partition-Wide Restrictions
 
 
@@ -11421,7 +11459,6 @@ then all compilation units in the partition must obey the restriction).
 * No_Implicit_Conditionals:: 
 * No_Implicit_Dynamic_Code:: 
 * No_Implicit_Heap_Allocations:: 
-* No_Implicit_Loops:: 
 * No_Implicit_Protected_Object_Allocations:: 
 * No_Implicit_Task_Allocations:: 
 * No_Initialize_Scalars:: 
@@ -11465,7 +11502,7 @@ then all compilation units in the partition must obey the restriction).
 @end menu
 
 @node Immediate_Reclamation,Max_Asynchronous_Select_Nesting,,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions immediate-reclamation}@anchor{1a1}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions immediate-reclamation}@anchor{1a3}
 @subsection Immediate_Reclamation
 
 
@@ -11477,7 +11514,7 @@ deallocation, any storage reserved at run time for an object is
 immediately reclaimed when the object no longer exists.
 
 @node Max_Asynchronous_Select_Nesting,Max_Entry_Queue_Length,Immediate_Reclamation,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-asynchronous-select-nesting}@anchor{1a2}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-asynchronous-select-nesting}@anchor{1a4}
 @subsection Max_Asynchronous_Select_Nesting
 
 
@@ -11489,7 +11526,7 @@ detected at compile time. Violations of this restriction with values
 other than zero cause Storage_Error to be raised.
 
 @node Max_Entry_Queue_Length,Max_Protected_Entries,Max_Asynchronous_Select_Nesting,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-entry-queue-length}@anchor{1a3}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-entry-queue-length}@anchor{1a5}
 @subsection Max_Entry_Queue_Length
 
 
@@ -11510,7 +11547,7 @@ compatibility purposes (and a warning will be generated for its use if
 warnings on obsolescent features are activated).
 
 @node Max_Protected_Entries,Max_Select_Alternatives,Max_Entry_Queue_Length,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-protected-entries}@anchor{1a4}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-protected-entries}@anchor{1a6}
 @subsection Max_Protected_Entries
 
 
@@ -11521,7 +11558,7 @@ bounds of every entry family of a protected unit shall be static, or shall be
 defined by a discriminant of a subtype whose corresponding bound is static.
 
 @node Max_Select_Alternatives,Max_Storage_At_Blocking,Max_Protected_Entries,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-select-alternatives}@anchor{1a5}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-select-alternatives}@anchor{1a7}
 @subsection Max_Select_Alternatives
 
 
@@ -11530,7 +11567,7 @@ defined by a discriminant of a subtype whose corresponding bound is static.
 [RM D.7] Specifies the maximum number of alternatives in a selective accept.
 
 @node Max_Storage_At_Blocking,Max_Task_Entries,Max_Select_Alternatives,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-storage-at-blocking}@anchor{1a6}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-storage-at-blocking}@anchor{1a8}
 @subsection Max_Storage_At_Blocking
 
 
@@ -11541,7 +11578,7 @@ Storage_Size that can be retained by a blocked task. A violation of this
 restriction causes Storage_Error to be raised.
 
 @node Max_Task_Entries,Max_Tasks,Max_Storage_At_Blocking,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-task-entries}@anchor{1a7}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-task-entries}@anchor{1a9}
 @subsection Max_Task_Entries
 
 
@@ -11554,7 +11591,7 @@ defined by a discriminant of a subtype whose
 corresponding bound is static.
 
 @node Max_Tasks,No_Abort_Statements,Max_Task_Entries,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-tasks}@anchor{1a8}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions max-tasks}@anchor{1aa}
 @subsection Max_Tasks
 
 
@@ -11567,7 +11604,7 @@ time. Violations of this restriction with values other than zero cause
 Storage_Error to be raised.
 
 @node No_Abort_Statements,No_Access_Parameter_Allocators,Max_Tasks,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-abort-statements}@anchor{1a9}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-abort-statements}@anchor{1ab}
 @subsection No_Abort_Statements
 
 
@@ -11577,7 +11614,7 @@ Storage_Error to be raised.
 no calls to Task_Identification.Abort_Task.
 
 @node No_Access_Parameter_Allocators,No_Access_Subprograms,No_Abort_Statements,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-parameter-allocators}@anchor{1aa}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-parameter-allocators}@anchor{1ac}
 @subsection No_Access_Parameter_Allocators
 
 
@@ -11588,7 +11625,7 @@ occurrences of an allocator as the actual parameter to an access
 parameter.
 
 @node No_Access_Subprograms,No_Allocators,No_Access_Parameter_Allocators,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-subprograms}@anchor{1ab}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-access-subprograms}@anchor{1ad}
 @subsection No_Access_Subprograms
 
 
@@ -11598,7 +11635,7 @@ parameter.
 declarations of access-to-subprogram types.
 
 @node No_Allocators,No_Anonymous_Allocators,No_Access_Subprograms,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-allocators}@anchor{1ac}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-allocators}@anchor{1ae}
 @subsection No_Allocators
 
 
@@ -11608,7 +11645,7 @@ declarations of access-to-subprogram types.
 occurrences of an allocator.
 
 @node No_Anonymous_Allocators,No_Asynchronous_Control,No_Allocators,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-anonymous-allocators}@anchor{1ad}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-anonymous-allocators}@anchor{1af}
 @subsection No_Anonymous_Allocators
 
 
@@ -11618,7 +11655,7 @@ occurrences of an allocator.
 occurrences of an allocator of anonymous access type.
 
 @node No_Asynchronous_Control,No_Calendar,No_Anonymous_Allocators,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-asynchronous-control}@anchor{1ae}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-asynchronous-control}@anchor{1b0}
 @subsection No_Asynchronous_Control
 
 
@@ -11628,7 +11665,7 @@ occurrences of an allocator of anonymous access type.
 dependences on the predefined package Asynchronous_Task_Control.
 
 @node No_Calendar,No_Coextensions,No_Asynchronous_Control,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-calendar}@anchor{1af}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-calendar}@anchor{1b1}
 @subsection No_Calendar
 
 
@@ -11638,7 +11675,7 @@ dependences on the predefined package Asynchronous_Task_Control.
 dependences on package Calendar.
 
 @node No_Coextensions,No_Default_Initialization,No_Calendar,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-coextensions}@anchor{1b0}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-coextensions}@anchor{1b2}
 @subsection No_Coextensions
 
 
@@ -11648,7 +11685,7 @@ dependences on package Calendar.
 coextensions. See 3.10.2.
 
 @node No_Default_Initialization,No_Delay,No_Coextensions,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-default-initialization}@anchor{1b1}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-default-initialization}@anchor{1b3}
 @subsection No_Default_Initialization
 
 
@@ -11665,7 +11702,7 @@ is to prohibit all cases of variables declared without a specific
 initializer (including the case of OUT scalar parameters).
 
 @node No_Delay,No_Dependence,No_Default_Initialization,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-delay}@anchor{1b2}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-delay}@anchor{1b4}
 @subsection No_Delay
 
 
@@ -11675,7 +11712,7 @@ initializer (including the case of OUT scalar parameters).
 delay statements and no semantic dependences on package Calendar.
 
 @node No_Dependence,No_Direct_Boolean_Operators,No_Delay,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dependence}@anchor{1b3}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dependence}@anchor{1b5}
 @subsection No_Dependence
 
 
@@ -11685,7 +11722,7 @@ delay statements and no semantic dependences on package Calendar.
 dependences on a library unit.
 
 @node No_Direct_Boolean_Operators,No_Dispatch,No_Dependence,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-direct-boolean-operators}@anchor{1b4}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-direct-boolean-operators}@anchor{1b6}
 @subsection No_Direct_Boolean_Operators
 
 
@@ -11698,7 +11735,7 @@ protocol requires the use of short-circuit (and then, or else) forms for all
 composite boolean operations.
 
 @node No_Dispatch,No_Dispatching_Calls,No_Direct_Boolean_Operators,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatch}@anchor{1b5}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatch}@anchor{1b7}
 @subsection No_Dispatch
 
 
@@ -11708,7 +11745,7 @@ composite boolean operations.
 occurrences of @cite{T'Class}, for any (tagged) subtype @cite{T}.
 
 @node No_Dispatching_Calls,No_Dynamic_Attachment,No_Dispatch,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatching-calls}@anchor{1b6}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dispatching-calls}@anchor{1b8}
 @subsection No_Dispatching_Calls
 
 
@@ -11769,7 +11806,7 @@ end Example;
 @end example
 
 @node No_Dynamic_Attachment,No_Dynamic_Priorities,No_Dispatching_Calls,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-attachment}@anchor{1b7}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-attachment}@anchor{1b9}
 @subsection No_Dynamic_Attachment
 
 
@@ -11788,7 +11825,7 @@ compatibility purposes (and a warning will be generated for its use if
 warnings on obsolescent features are activated).
 
 @node No_Dynamic_Priorities,No_Entry_Calls_In_Elaboration_Code,No_Dynamic_Attachment,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-priorities}@anchor{1b8}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-priorities}@anchor{1ba}
 @subsection No_Dynamic_Priorities
 
 
@@ -11797,7 +11834,7 @@ warnings on obsolescent features are activated).
 [RM D.7] There are no semantic dependencies on the package Dynamic_Priorities.
 
 @node No_Entry_Calls_In_Elaboration_Code,No_Enumeration_Maps,No_Dynamic_Priorities,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-calls-in-elaboration-code}@anchor{1b9}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-calls-in-elaboration-code}@anchor{1bb}
 @subsection No_Entry_Calls_In_Elaboration_Code
 
 
@@ -11809,7 +11846,7 @@ restriction, the compiler can assume that no code past an accept statement
 in a task can be executed at elaboration time.
 
 @node No_Enumeration_Maps,No_Exception_Handlers,No_Entry_Calls_In_Elaboration_Code,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-enumeration-maps}@anchor{1ba}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-enumeration-maps}@anchor{1bc}
 @subsection No_Enumeration_Maps
 
 
@@ -11820,7 +11857,7 @@ enumeration maps are used (that is Image and Value attributes applied
 to enumeration types).
 
 @node No_Exception_Handlers,No_Exception_Propagation,No_Enumeration_Maps,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-handlers}@anchor{1bb}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-handlers}@anchor{1bd}
 @subsection No_Exception_Handlers
 
 
@@ -11845,7 +11882,7 @@ statement generated by the compiler). The Line parameter when nonzero
 represents the line number in the source program where the raise occurs.
 
 @node No_Exception_Propagation,No_Exception_Registration,No_Exception_Handlers,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-propagation}@anchor{1bc}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-propagation}@anchor{1be}
 @subsection No_Exception_Propagation
 
 
@@ -11862,7 +11899,7 @@ the package GNAT.Current_Exception is not permitted, and reraise
 statements (raise with no operand) are not permitted.
 
 @node No_Exception_Registration,No_Exceptions,No_Exception_Propagation,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-registration}@anchor{1bd}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exception-registration}@anchor{1bf}
 @subsection No_Exception_Registration
 
 
@@ -11876,7 +11913,7 @@ code is simplified by omitting the otherwise-required global registration
 of exceptions when they are declared.
 
 @node No_Exceptions,No_Finalization,No_Exception_Registration,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exceptions}@anchor{1be}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-exceptions}@anchor{1c0}
 @subsection No_Exceptions
 
 
@@ -11886,7 +11923,7 @@ of exceptions when they are declared.
 raise statements and no exception handlers.
 
 @node No_Finalization,No_Fixed_Point,No_Exceptions,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-finalization}@anchor{1bf}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-finalization}@anchor{1c1}
 @subsection No_Finalization
 
 
@@ -11927,7 +11964,7 @@ object or a nested component, either declared on the stack or on the heap. The
 deallocation of a controlled object no longer finalizes its contents.
 
 @node No_Fixed_Point,No_Floating_Point,No_Finalization,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-fixed-point}@anchor{1c0}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-fixed-point}@anchor{1c2}
 @subsection No_Fixed_Point
 
 
@@ -11937,7 +11974,7 @@ deallocation of a controlled object no longer finalizes its contents.
 occurrences of fixed point types and operations.
 
 @node No_Floating_Point,No_Implicit_Conditionals,No_Fixed_Point,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-floating-point}@anchor{1c1}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-floating-point}@anchor{1c3}
 @subsection No_Floating_Point
 
 
@@ -11947,7 +11984,7 @@ occurrences of fixed point types and operations.
 occurrences of floating point types and operations.
 
 @node No_Implicit_Conditionals,No_Implicit_Dynamic_Code,No_Floating_Point,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-conditionals}@anchor{1c2}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-conditionals}@anchor{1c4}
 @subsection No_Implicit_Conditionals
 
 
@@ -11963,7 +12000,7 @@ normal manner. Constructs generating implicit conditionals include comparisons
 of composite objects and the Max/Min attributes.
 
 @node No_Implicit_Dynamic_Code,No_Implicit_Heap_Allocations,No_Implicit_Conditionals,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-dynamic-code}@anchor{1c3}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-dynamic-code}@anchor{1c5}
 @subsection No_Implicit_Dynamic_Code
 
 
@@ -11992,8 +12029,8 @@ but only if pragma Favor_Top_Level applies, or the access type has a
 foreign-language convention; primitive operations of nested tagged
 types.
 
-@node No_Implicit_Heap_Allocations,No_Implicit_Loops,No_Implicit_Dynamic_Code,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-heap-allocations}@anchor{1c4}
+@node No_Implicit_Heap_Allocations,No_Implicit_Protected_Object_Allocations,No_Implicit_Dynamic_Code,Partition-Wide Restrictions
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-heap-allocations}@anchor{1c6}
 @subsection No_Implicit_Heap_Allocations
 
 
@@ -12001,25 +12038,8 @@ types.
 
 [RM D.7] No constructs are allowed to cause implicit heap allocation.
 
-@node No_Implicit_Loops,No_Implicit_Protected_Object_Allocations,No_Implicit_Heap_Allocations,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-loops}@anchor{1c5}
-@subsection No_Implicit_Loops
-
-
-@geindex No_Implicit_Loops
-
-[GNAT] This restriction ensures that the generated code does not contain any
-implicit @cite{for} loops, either by modifying
-the generated code where possible,
-or by rejecting any construct that would otherwise generate an implicit
-@cite{for} loop. If this restriction is active, it is possible to build
-large array aggregates with all static components without generating an
-intermediate temporary, and without generating a loop to initialize individual
-components. Otherwise, a loop is created for arrays larger than about 5000
-scalar components.
-
-@node No_Implicit_Protected_Object_Allocations,No_Implicit_Task_Allocations,No_Implicit_Loops,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-protected-object-allocations}@anchor{1c6}
+@node No_Implicit_Protected_Object_Allocations,No_Implicit_Task_Allocations,No_Implicit_Heap_Allocations,Partition-Wide Restrictions
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-protected-object-allocations}@anchor{1c7}
 @subsection No_Implicit_Protected_Object_Allocations
 
 
@@ -12029,7 +12049,7 @@ scalar components.
 protected object.
 
 @node No_Implicit_Task_Allocations,No_Initialize_Scalars,No_Implicit_Protected_Object_Allocations,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-task-allocations}@anchor{1c7}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-task-allocations}@anchor{1c8}
 @subsection No_Implicit_Task_Allocations
 
 
@@ -12038,7 +12058,7 @@ protected object.
 [GNAT] No constructs are allowed to cause implicit heap allocation of a task.
 
 @node No_Initialize_Scalars,No_IO,No_Implicit_Task_Allocations,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-initialize-scalars}@anchor{1c8}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-initialize-scalars}@anchor{1c9}
 @subsection No_Initialize_Scalars
 
 
@@ -12050,7 +12070,7 @@ code, and in particular eliminates dummy null initialization routines that
 are otherwise generated for some record and array types.
 
 @node No_IO,No_Local_Allocators,No_Initialize_Scalars,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-io}@anchor{1c9}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-io}@anchor{1ca}
 @subsection No_IO
 
 
@@ -12061,7 +12081,7 @@ dependences on any of the library units Sequential_IO, Direct_IO,
 Text_IO, Wide_Text_IO, Wide_Wide_Text_IO, or Stream_IO.
 
 @node No_Local_Allocators,No_Local_Protected_Objects,No_IO,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-allocators}@anchor{1ca}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-allocators}@anchor{1cb}
 @subsection No_Local_Allocators
 
 
@@ -12072,7 +12092,7 @@ occurrences of an allocator in subprograms, generic subprograms, tasks,
 and entry bodies.
 
 @node No_Local_Protected_Objects,No_Local_Timing_Events,No_Local_Allocators,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-protected-objects}@anchor{1cb}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-protected-objects}@anchor{1cc}
 @subsection No_Local_Protected_Objects
 
 
@@ -12082,7 +12102,7 @@ and entry bodies.
 only declared at the library level.
 
 @node No_Local_Timing_Events,No_Long_Long_Integers,No_Local_Protected_Objects,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-timing-events}@anchor{1cc}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-local-timing-events}@anchor{1cd}
 @subsection No_Local_Timing_Events
 
 
@@ -12092,7 +12112,7 @@ only declared at the library level.
 declared at the library level.
 
 @node No_Long_Long_Integers,No_Multiple_Elaboration,No_Local_Timing_Events,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-long-long-integers}@anchor{1cd}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-long-long-integers}@anchor{1ce}
 @subsection No_Long_Long_Integers
 
 
@@ -12104,7 +12124,7 @@ implicit base type is Long_Long_Integer, and modular types whose size exceeds
 Long_Integer'Size.
 
 @node No_Multiple_Elaboration,No_Nested_Finalization,No_Long_Long_Integers,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-multiple-elaboration}@anchor{1ce}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-multiple-elaboration}@anchor{1cf}
 @subsection No_Multiple_Elaboration
 
 
@@ -12121,7 +12141,7 @@ programs and Stand Alone libraries, are not permitted and will be diagnosed
 by the binder.
 
 @node No_Nested_Finalization,No_Protected_Type_Allocators,No_Multiple_Elaboration,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-nested-finalization}@anchor{1cf}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-nested-finalization}@anchor{1d0}
 @subsection No_Nested_Finalization
 
 
@@ -12130,7 +12150,7 @@ by the binder.
 [RM D.7] All objects requiring finalization are declared at the library level.
 
 @node No_Protected_Type_Allocators,No_Protected_Types,No_Nested_Finalization,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-type-allocators}@anchor{1d0}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-type-allocators}@anchor{1d1}
 @subsection No_Protected_Type_Allocators
 
 
@@ -12140,7 +12160,7 @@ by the binder.
 expressions that attempt to allocate protected objects.
 
 @node No_Protected_Types,No_Recursion,No_Protected_Type_Allocators,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-types}@anchor{1d1}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-protected-types}@anchor{1d2}
 @subsection No_Protected_Types
 
 
@@ -12150,7 +12170,7 @@ expressions that attempt to allocate protected objects.
 declarations of protected types or protected objects.
 
 @node No_Recursion,No_Reentrancy,No_Protected_Types,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-recursion}@anchor{1d2}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-recursion}@anchor{1d3}
 @subsection No_Recursion
 
 
@@ -12160,7 +12180,7 @@ declarations of protected types or protected objects.
 part of its execution.
 
 @node No_Reentrancy,No_Relative_Delay,No_Recursion,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-reentrancy}@anchor{1d3}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-reentrancy}@anchor{1d4}
 @subsection No_Reentrancy
 
 
@@ -12170,7 +12190,7 @@ part of its execution.
 two tasks at the same time.
 
 @node No_Relative_Delay,No_Requeue_Statements,No_Reentrancy,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-relative-delay}@anchor{1d4}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-relative-delay}@anchor{1d5}
 @subsection No_Relative_Delay
 
 
@@ -12181,7 +12201,7 @@ relative statements and prevents expressions such as @cite{delay 1.23;} from
 appearing in source code.
 
 @node No_Requeue_Statements,No_Secondary_Stack,No_Relative_Delay,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-requeue-statements}@anchor{1d5}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-requeue-statements}@anchor{1d6}
 @subsection No_Requeue_Statements
 
 
@@ -12199,7 +12219,7 @@ compatibility purposes (and a warning will be generated for its use if
 warnings on oNobsolescent features are activated).
 
 @node No_Secondary_Stack,No_Select_Statements,No_Requeue_Statements,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-secondary-stack}@anchor{1d6}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-secondary-stack}@anchor{1d7}
 @subsection No_Secondary_Stack
 
 
@@ -12211,7 +12231,7 @@ stack is used to implement functions returning unconstrained objects
 (arrays or records) on some targets.
 
 @node No_Select_Statements,No_Specific_Termination_Handlers,No_Secondary_Stack,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-select-statements}@anchor{1d7}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-select-statements}@anchor{1d8}
 @subsection No_Select_Statements
 
 
@@ -12221,7 +12241,7 @@ stack is used to implement functions returning unconstrained objects
 kind are permitted, that is the keyword @cite{select} may not appear.
 
 @node No_Specific_Termination_Handlers,No_Specification_of_Aspect,No_Select_Statements,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specific-termination-handlers}@anchor{1d8}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specific-termination-handlers}@anchor{1d9}
 @subsection No_Specific_Termination_Handlers
 
 
@@ -12231,7 +12251,7 @@ kind are permitted, that is the keyword @cite{select} may not appear.
 or to Ada.Task_Termination.Specific_Handler.
 
 @node No_Specification_of_Aspect,No_Standard_Allocators_After_Elaboration,No_Specific_Termination_Handlers,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specification-of-aspect}@anchor{1d9}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-specification-of-aspect}@anchor{1da}
 @subsection No_Specification_of_Aspect
 
 
@@ -12242,7 +12262,7 @@ specification, attribute definition clause, or pragma is given for a
 given aspect.
 
 @node No_Standard_Allocators_After_Elaboration,No_Standard_Storage_Pools,No_Specification_of_Aspect,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-allocators-after-elaboration}@anchor{1da}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-allocators-after-elaboration}@anchor{1db}
 @subsection No_Standard_Allocators_After_Elaboration
 
 
@@ -12254,7 +12274,7 @@ library items of the partition has completed. Otherwise, Storage_Error
 is raised.
 
 @node No_Standard_Storage_Pools,No_Stream_Optimizations,No_Standard_Allocators_After_Elaboration,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-storage-pools}@anchor{1db}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-standard-storage-pools}@anchor{1dc}
 @subsection No_Standard_Storage_Pools
 
 
@@ -12266,7 +12286,7 @@ have an explicit Storage_Pool attribute defined specifying a
 user-defined storage pool.
 
 @node No_Stream_Optimizations,No_Streams,No_Standard_Storage_Pools,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-stream-optimizations}@anchor{1dc}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-stream-optimizations}@anchor{1dd}
 @subsection No_Stream_Optimizations
 
 
@@ -12279,7 +12299,7 @@ due to their supperior performance. When this restriction is in effect, the
 compiler performs all IO operations on a per-character basis.
 
 @node No_Streams,No_Task_Allocators,No_Stream_Optimizations,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-streams}@anchor{1dd}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-streams}@anchor{1de}
 @subsection No_Streams
 
 
@@ -12300,7 +12320,7 @@ unit declaring a tagged type should be compiled with the restriction,
 though this is not required.
 
 @node No_Task_Allocators,No_Task_At_Interrupt_Priority,No_Streams,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-allocators}@anchor{1de}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-allocators}@anchor{1df}
 @subsection No_Task_Allocators
 
 
@@ -12310,7 +12330,7 @@ though this is not required.
 or types containing task subcomponents.
 
 @node No_Task_At_Interrupt_Priority,No_Task_Attributes_Package,No_Task_Allocators,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-at-interrupt-priority}@anchor{1df}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-at-interrupt-priority}@anchor{1e0}
 @subsection No_Task_At_Interrupt_Priority
 
 
@@ -12322,7 +12342,7 @@ a consequence, the tasks are always created with a priority below
 that an interrupt priority.
 
 @node No_Task_Attributes_Package,No_Task_Hierarchy,No_Task_At_Interrupt_Priority,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-attributes-package}@anchor{1e0}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-attributes-package}@anchor{1e1}
 @subsection No_Task_Attributes_Package
 
 
@@ -12339,7 +12359,7 @@ compatibility purposes (and a warning will be generated for its use if
 warnings on obsolescent features are activated).
 
 @node No_Task_Hierarchy,No_Task_Termination,No_Task_Attributes_Package,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-hierarchy}@anchor{1e1}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-hierarchy}@anchor{1e2}
 @subsection No_Task_Hierarchy
 
 
@@ -12349,7 +12369,7 @@ warnings on obsolescent features are activated).
 directly on the environment task of the partition.
 
 @node No_Task_Termination,No_Tasking,No_Task_Hierarchy,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-termination}@anchor{1e2}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-task-termination}@anchor{1e3}
 @subsection No_Task_Termination
 
 
@@ -12358,7 +12378,7 @@ directly on the environment task of the partition.
 [RM D.7] Tasks that terminate are erroneous.
 
 @node No_Tasking,No_Terminate_Alternatives,No_Task_Termination,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-tasking}@anchor{1e3}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-tasking}@anchor{1e4}
 @subsection No_Tasking
 
 
@@ -12371,7 +12391,7 @@ and cause an error message to be output either by the compiler or
 binder.
 
 @node No_Terminate_Alternatives,No_Unchecked_Access,No_Tasking,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-terminate-alternatives}@anchor{1e4}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-terminate-alternatives}@anchor{1e5}
 @subsection No_Terminate_Alternatives
 
 
@@ -12380,7 +12400,7 @@ binder.
 [RM D.7] There are no selective accepts with terminate alternatives.
 
 @node No_Unchecked_Access,No_Unchecked_Conversion,No_Terminate_Alternatives,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-access}@anchor{1e5}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-access}@anchor{1e6}
 @subsection No_Unchecked_Access
 
 
@@ -12390,7 +12410,7 @@ binder.
 occurrences of the Unchecked_Access attribute.
 
 @node No_Unchecked_Conversion,No_Unchecked_Deallocation,No_Unchecked_Access,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-conversion}@anchor{1e6}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-conversion}@anchor{1e7}
 @subsection No_Unchecked_Conversion
 
 
@@ -12400,7 +12420,7 @@ occurrences of the Unchecked_Access attribute.
 dependences on the predefined generic function Unchecked_Conversion.
 
 @node No_Unchecked_Deallocation,No_Use_Of_Entity,No_Unchecked_Conversion,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-deallocation}@anchor{1e7}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-unchecked-deallocation}@anchor{1e8}
 @subsection No_Unchecked_Deallocation
 
 
@@ -12410,7 +12430,7 @@ dependences on the predefined generic function Unchecked_Conversion.
 dependences on the predefined generic procedure Unchecked_Deallocation.
 
 @node No_Use_Of_Entity,Pure_Barriers,No_Unchecked_Deallocation,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-use-of-entity}@anchor{1e8}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-use-of-entity}@anchor{1e9}
 @subsection No_Use_Of_Entity
 
 
@@ -12430,7 +12450,7 @@ No_Use_Of_Entity => Ada.Text_IO.Put_Line
 @end example
 
 @node Pure_Barriers,Simple_Barriers,No_Use_Of_Entity,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions pure-barriers}@anchor{1e9}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions pure-barriers}@anchor{1ea}
 @subsection Pure_Barriers
 
 
@@ -12479,7 +12499,7 @@ but still ensures absence of side effects, exceptions, and recursion
 during the evaluation of the barriers.
 
 @node Simple_Barriers,Static_Priorities,Pure_Barriers,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions simple-barriers}@anchor{1ea}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions simple-barriers}@anchor{1eb}
 @subsection Simple_Barriers
 
 
@@ -12498,7 +12518,7 @@ compatibility purposes (and a warning will be generated for its use if
 warnings on obsolescent features are activated).
 
 @node Static_Priorities,Static_Storage_Size,Simple_Barriers,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions static-priorities}@anchor{1eb}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions static-priorities}@anchor{1ec}
 @subsection Static_Priorities
 
 
@@ -12509,7 +12529,7 @@ are static, and that there are no dependences on the package
 @cite{Ada.Dynamic_Priorities}.
 
 @node Static_Storage_Size,,Static_Priorities,Partition-Wide Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions static-storage-size}@anchor{1ec}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions static-storage-size}@anchor{1ed}
 @subsection Static_Storage_Size
 
 
@@ -12519,7 +12539,7 @@ are static, and that there are no dependences on the package
 in a Storage_Size pragma or attribute definition clause is static.
 
 @node Program Unit Level Restrictions,,Partition-Wide Restrictions,Standard and Implementation Defined Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions program-unit-level-restrictions}@anchor{1ed}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id3}@anchor{1ee}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions program-unit-level-restrictions}@anchor{1ee}@anchor{gnat_rm/standard_and_implementation_defined_restrictions id3}@anchor{1ef}
 @section Program Unit Level Restrictions
 
 
@@ -12540,6 +12560,7 @@ other compilation units in the partition.
 * No_Implementation_Restrictions:: 
 * No_Implementation_Units:: 
 * No_Implicit_Aliasing:: 
+* No_Implicit_Loops:: 
 * No_Obsolescent_Features:: 
 * No_Wide_Characters:: 
 * SPARK_05:: 
@@ -12547,7 +12568,7 @@ other compilation units in the partition.
 @end menu
 
 @node No_Elaboration_Code,No_Dynamic_Sized_Objects,,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-elaboration-code}@anchor{1ef}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-elaboration-code}@anchor{1f0}
 @subsection No_Elaboration_Code
 
 
@@ -12603,7 +12624,7 @@ associated with the unit. This counter is typically used to check for access
 before elaboration and to control multiple elaboration attempts.
 
 @node No_Dynamic_Sized_Objects,No_Entry_Queue,No_Elaboration_Code,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-sized-objects}@anchor{1f0}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-dynamic-sized-objects}@anchor{1f1}
 @subsection No_Dynamic_Sized_Objects
 
 
@@ -12621,7 +12642,7 @@ access discriminants. It is often a good idea to combine this restriction
 with No_Secondary_Stack.
 
 @node No_Entry_Queue,No_Implementation_Aspect_Specifications,No_Dynamic_Sized_Objects,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-queue}@anchor{1f1}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-entry-queue}@anchor{1f2}
 @subsection No_Entry_Queue
 
 
@@ -12634,7 +12655,7 @@ checked at compile time.  A program execution is erroneous if an attempt
 is made to queue a second task on such an entry.
 
 @node No_Implementation_Aspect_Specifications,No_Implementation_Attributes,No_Entry_Queue,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-aspect-specifications}@anchor{1f2}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-aspect-specifications}@anchor{1f3}
 @subsection No_Implementation_Aspect_Specifications
 
 
@@ -12645,7 +12666,7 @@ GNAT-defined aspects are present.  With this restriction, the only
 aspects that can be used are those defined in the Ada Reference Manual.
 
 @node No_Implementation_Attributes,No_Implementation_Identifiers,No_Implementation_Aspect_Specifications,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-attributes}@anchor{1f3}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-attributes}@anchor{1f4}
 @subsection No_Implementation_Attributes
 
 
@@ -12657,7 +12678,7 @@ attributes that can be used are those defined in the Ada Reference
 Manual.
 
 @node No_Implementation_Identifiers,No_Implementation_Pragmas,No_Implementation_Attributes,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-identifiers}@anchor{1f4}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-identifiers}@anchor{1f5}
 @subsection No_Implementation_Identifiers
 
 
@@ -12668,7 +12689,7 @@ implementation-defined identifiers (marked with pragma Implementation_Defined)
 occur within language-defined packages.
 
 @node No_Implementation_Pragmas,No_Implementation_Restrictions,No_Implementation_Identifiers,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-pragmas}@anchor{1f5}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-pragmas}@anchor{1f6}
 @subsection No_Implementation_Pragmas
 
 
@@ -12679,7 +12700,7 @@ GNAT-defined pragmas are present.  With this restriction, the only
 pragmas that can be used are those defined in the Ada Reference Manual.
 
 @node No_Implementation_Restrictions,No_Implementation_Units,No_Implementation_Pragmas,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-restrictions}@anchor{1f6}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-restrictions}@anchor{1f7}
 @subsection No_Implementation_Restrictions
 
 
@@ -12691,7 +12712,7 @@ are present.  With this restriction, the only other restriction identifiers
 that can be used are those defined in the Ada Reference Manual.
 
 @node No_Implementation_Units,No_Implicit_Aliasing,No_Implementation_Restrictions,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-units}@anchor{1f7}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implementation-units}@anchor{1f8}
 @subsection No_Implementation_Units
 
 
@@ -12701,8 +12722,8 @@ that can be used are those defined in the Ada Reference Manual.
 mention in the context clause of any implementation-defined descendants
 of packages Ada, Interfaces, or System.
 
-@node No_Implicit_Aliasing,No_Obsolescent_Features,No_Implementation_Units,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-aliasing}@anchor{1f8}
+@node No_Implicit_Aliasing,No_Implicit_Loops,No_Implementation_Units,Program Unit Level Restrictions
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-aliasing}@anchor{1f9}
 @subsection No_Implicit_Aliasing
 
 
@@ -12716,8 +12737,25 @@ Unrestricted_Access is forbidden is that it would require the prefix
 to be aliased, and in such cases, it can always be replaced by
 the standard attribute Unchecked_Access which is preferable.
 
-@node No_Obsolescent_Features,No_Wide_Characters,No_Implicit_Aliasing,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-obsolescent-features}@anchor{1f9}
+@node No_Implicit_Loops,No_Obsolescent_Features,No_Implicit_Aliasing,Program Unit Level Restrictions
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-implicit-loops}@anchor{1fa}
+@subsection No_Implicit_Loops
+
+
+@geindex No_Implicit_Loops
+
+[GNAT] This restriction ensures that the generated code of the unit marked
+with this restriction does not contain any implicit @cite{for} loops, either by
+modifying the generated code where possible, or by rejecting any construct
+that would otherwise generate an implicit @cite{for} loop. If this restriction is
+active, it is possible to build large array aggregates with all static
+components without generating an intermediate temporary, and without generating
+a loop to initialize individual components. Otherwise, a loop is created for
+arrays larger than about 5000 scalar components. Note that if this restriction
+is set in the spec of a package, it will not apply to its body.
+
+@node No_Obsolescent_Features,No_Wide_Characters,No_Implicit_Loops,Program Unit Level Restrictions
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-obsolescent-features}@anchor{1fb}
 @subsection No_Obsolescent_Features
 
 
@@ -12727,7 +12765,7 @@ the standard attribute Unchecked_Access which is preferable.
 features are used, as defined in Annex J of the Ada Reference Manual.
 
 @node No_Wide_Characters,SPARK_05,No_Obsolescent_Features,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-wide-characters}@anchor{1fa}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions no-wide-characters}@anchor{1fc}
 @subsection No_Wide_Characters
 
 
@@ -12741,7 +12779,7 @@ appear in the program (that is literals representing characters not in
 type @cite{Character}).
 
 @node SPARK_05,,No_Wide_Characters,Program Unit Level Restrictions
-@anchor{gnat_rm/standard_and_implementation_defined_restrictions spark-05}@anchor{1fb}
+@anchor{gnat_rm/standard_and_implementation_defined_restrictions spark-05}@anchor{1fd}
 @subsection SPARK_05
 
 
@@ -13100,7 +13138,7 @@ violations will be reported for constructs forbidden in SPARK 95,
 instead of SPARK 2005.
 
 @node Implementation Advice,Implementation Defined Characteristics,Standard and Implementation Defined Restrictions,Top
-@anchor{gnat_rm/implementation_advice doc}@anchor{1fc}@anchor{gnat_rm/implementation_advice implementation-advice}@anchor{a}@anchor{gnat_rm/implementation_advice id1}@anchor{1fd}
+@anchor{gnat_rm/implementation_advice doc}@anchor{1fe}@anchor{gnat_rm/implementation_advice implementation-advice}@anchor{a}@anchor{gnat_rm/implementation_advice id1}@anchor{1ff}
 @chapter Implementation Advice
 
 
@@ -13197,7 +13235,7 @@ case the text describes what GNAT does and why.
 @end menu
 
 @node RM 1 1 3 20 Error Detection,RM 1 1 3 31 Child Units,,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-1-1-3-20-error-detection}@anchor{1fe}
+@anchor{gnat_rm/implementation_advice rm-1-1-3-20-error-detection}@anchor{200}
 @section RM 1.1.3(20): Error Detection
 
 
@@ -13214,7 +13252,7 @@ or diagnosed at compile time.
 @geindex Child Units
 
 @node RM 1 1 3 31 Child Units,RM 1 1 5 12 Bounded Errors,RM 1 1 3 20 Error Detection,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-1-1-3-31-child-units}@anchor{1ff}
+@anchor{gnat_rm/implementation_advice rm-1-1-3-31-child-units}@anchor{201}
 @section RM 1.1.3(31): Child Units
 
 
@@ -13230,7 +13268,7 @@ Followed.
 @geindex Bounded errors
 
 @node RM 1 1 5 12 Bounded Errors,RM 2 8 16 Pragmas,RM 1 1 3 31 Child Units,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-1-1-5-12-bounded-errors}@anchor{200}
+@anchor{gnat_rm/implementation_advice rm-1-1-5-12-bounded-errors}@anchor{202}
 @section RM 1.1.5(12): Bounded Errors
 
 
@@ -13247,7 +13285,7 @@ runtime.
 @geindex Pragmas
 
 @node RM 2 8 16 Pragmas,RM 2 8 17-19 Pragmas,RM 1 1 5 12 Bounded Errors,Implementation Advice
-@anchor{gnat_rm/implementation_advice id2}@anchor{201}@anchor{gnat_rm/implementation_advice rm-2-8-16-pragmas}@anchor{202}
+@anchor{gnat_rm/implementation_advice id2}@anchor{203}@anchor{gnat_rm/implementation_advice rm-2-8-16-pragmas}@anchor{204}
 @section RM 2.8(16): Pragmas
 
 
@@ -13360,7 +13398,7 @@ that this advice not be followed.  For details see
 @ref{7,,Implementation Defined Pragmas}.
 
 @node RM 2 8 17-19 Pragmas,RM 3 5 2 5 Alternative Character Sets,RM 2 8 16 Pragmas,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-2-8-17-19-pragmas}@anchor{203}
+@anchor{gnat_rm/implementation_advice rm-2-8-17-19-pragmas}@anchor{205}
 @section RM 2.8(17-19): Pragmas
 
 
@@ -13381,14 +13419,14 @@ replacing @cite{library_items}."
 @end itemize
 @end quotation
 
-See @ref{202,,RM 2.8(16); Pragmas}.
+See @ref{204,,RM 2.8(16); Pragmas}.
 
 @geindex Character Sets
 
 @geindex Alternative Character Sets
 
 @node RM 3 5 2 5 Alternative Character Sets,RM 3 5 4 28 Integer Types,RM 2 8 17-19 Pragmas,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-3-5-2-5-alternative-character-sets}@anchor{204}
+@anchor{gnat_rm/implementation_advice rm-3-5-2-5-alternative-character-sets}@anchor{206}
 @section RM 3.5.2(5): Alternative Character Sets
 
 
@@ -13416,7 +13454,7 @@ there is no such restriction.
 @geindex Integer types
 
 @node RM 3 5 4 28 Integer Types,RM 3 5 4 29 Integer Types,RM 3 5 2 5 Alternative Character Sets,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-3-5-4-28-integer-types}@anchor{205}
+@anchor{gnat_rm/implementation_advice rm-3-5-4-28-integer-types}@anchor{207}
 @section RM 3.5.4(28): Integer Types
 
 
@@ -13435,7 +13473,7 @@ are supported for convenient interface to C, and so that all hardware
 types of the machine are easily available.
 
 @node RM 3 5 4 29 Integer Types,RM 3 5 5 8 Enumeration Values,RM 3 5 4 28 Integer Types,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-3-5-4-29-integer-types}@anchor{206}
+@anchor{gnat_rm/implementation_advice rm-3-5-4-29-integer-types}@anchor{208}
 @section RM 3.5.4(29): Integer Types
 
 
@@ -13451,7 +13489,7 @@ Followed.
 @geindex Enumeration values
 
 @node RM 3 5 5 8 Enumeration Values,RM 3 5 7 17 Float Types,RM 3 5 4 29 Integer Types,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-3-5-5-8-enumeration-values}@anchor{207}
+@anchor{gnat_rm/implementation_advice rm-3-5-5-8-enumeration-values}@anchor{209}
 @section RM 3.5.5(8): Enumeration Values
 
 
@@ -13471,7 +13509,7 @@ Followed.
 @geindex Float types
 
 @node RM 3 5 7 17 Float Types,RM 3 6 2 11 Multidimensional Arrays,RM 3 5 5 8 Enumeration Values,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-3-5-7-17-float-types}@anchor{208}
+@anchor{gnat_rm/implementation_advice rm-3-5-7-17-float-types}@anchor{20a}
 @section RM 3.5.7(17): Float Types
 
 
@@ -13501,7 +13539,7 @@ since this is a software rather than a hardware format.
 @geindex multidimensional
 
 @node RM 3 6 2 11 Multidimensional Arrays,RM 9 6 30-31 Duration'Small,RM 3 5 7 17 Float Types,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-3-6-2-11-multidimensional-arrays}@anchor{209}
+@anchor{gnat_rm/implementation_advice rm-3-6-2-11-multidimensional-arrays}@anchor{20b}
 @section RM 3.6.2(11): Multidimensional Arrays
 
 
@@ -13519,7 +13557,7 @@ Followed.
 @geindex Duration'Small
 
 @node RM 9 6 30-31 Duration'Small,RM 10 2 1 12 Consistent Representation,RM 3 6 2 11 Multidimensional Arrays,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-9-6-30-31-duration-small}@anchor{20a}
+@anchor{gnat_rm/implementation_advice rm-9-6-30-31-duration-small}@anchor{20c}
 @section RM 9.6(30-31): Duration'Small
 
 
@@ -13540,7 +13578,7 @@ it need not be the same time base as used for @cite{Calendar.Clock}."
 Followed.
 
 @node RM 10 2 1 12 Consistent Representation,RM 11 4 1 19 Exception Information,RM 9 6 30-31 Duration'Small,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-10-2-1-12-consistent-representation}@anchor{20b}
+@anchor{gnat_rm/implementation_advice rm-10-2-1-12-consistent-representation}@anchor{20d}
 @section RM 10.2.1(12): Consistent Representation
 
 
@@ -13562,7 +13600,7 @@ advice without severely impacting efficiency of execution.
 @geindex Exception information
 
 @node RM 11 4 1 19 Exception Information,RM 11 5 28 Suppression of Checks,RM 10 2 1 12 Consistent Representation,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-11-4-1-19-exception-information}@anchor{20c}
+@anchor{gnat_rm/implementation_advice rm-11-4-1-19-exception-information}@anchor{20e}
 @section RM 11.4.1(19): Exception Information
 
 
@@ -13593,7 +13631,7 @@ Pragma @cite{Discard_Names}.
 @geindex suppression of
 
 @node RM 11 5 28 Suppression of Checks,RM 13 1 21-24 Representation Clauses,RM 11 4 1 19 Exception Information,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-11-5-28-suppression-of-checks}@anchor{20d}
+@anchor{gnat_rm/implementation_advice rm-11-5-28-suppression-of-checks}@anchor{20f}
 @section RM 11.5(28): Suppression of Checks
 
 
@@ -13608,7 +13646,7 @@ Followed.
 @geindex Representation clauses
 
 @node RM 13 1 21-24 Representation Clauses,RM 13 2 6-8 Packed Types,RM 11 5 28 Suppression of Checks,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-1-21-24-representation-clauses}@anchor{20e}
+@anchor{gnat_rm/implementation_advice rm-13-1-21-24-representation-clauses}@anchor{210}
 @section RM 13.1 (21-24): Representation Clauses
 
 
@@ -13657,7 +13695,7 @@ Followed.
 @geindex Packed types
 
 @node RM 13 2 6-8 Packed Types,RM 13 3 14-19 Address Clauses,RM 13 1 21-24 Representation Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-2-6-8-packed-types}@anchor{20f}
+@anchor{gnat_rm/implementation_advice rm-13-2-6-8-packed-types}@anchor{211}
 @section RM 13.2(6-8): Packed Types
 
 
@@ -13696,7 +13734,7 @@ Followed.
 @geindex Address clauses
 
 @node RM 13 3 14-19 Address Clauses,RM 13 3 29-35 Alignment Clauses,RM 13 2 6-8 Packed Types,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-3-14-19-address-clauses}@anchor{210}
+@anchor{gnat_rm/implementation_advice rm-13-3-14-19-address-clauses}@anchor{212}
 @section RM 13.3(14-19): Address Clauses
 
 
@@ -13749,7 +13787,7 @@ Followed.
 @geindex Alignment clauses
 
 @node RM 13 3 29-35 Alignment Clauses,RM 13 3 42-43 Size Clauses,RM 13 3 14-19 Address Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-3-29-35-alignment-clauses}@anchor{211}
+@anchor{gnat_rm/implementation_advice rm-13-3-29-35-alignment-clauses}@anchor{213}
 @section RM 13.3(29-35): Alignment Clauses
 
 
@@ -13806,7 +13844,7 @@ Followed.
 @geindex Size clauses
 
 @node RM 13 3 42-43 Size Clauses,RM 13 3 50-56 Size Clauses,RM 13 3 29-35 Alignment Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-3-42-43-size-clauses}@anchor{212}
+@anchor{gnat_rm/implementation_advice rm-13-3-42-43-size-clauses}@anchor{214}
 @section RM 13.3(42-43): Size Clauses
 
 
@@ -13824,7 +13862,7 @@ object's @cite{Alignment} (if the @cite{Alignment} is nonzero)."
 Followed.
 
 @node RM 13 3 50-56 Size Clauses,RM 13 3 71-73 Component Size Clauses,RM 13 3 42-43 Size Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-3-50-56-size-clauses}@anchor{213}
+@anchor{gnat_rm/implementation_advice rm-13-3-50-56-size-clauses}@anchor{215}
 @section RM 13.3(50-56): Size Clauses
 
 
@@ -13875,7 +13913,7 @@ Followed.
 @geindex Component_Size clauses
 
 @node RM 13 3 71-73 Component Size Clauses,RM 13 4 9-10 Enumeration Representation Clauses,RM 13 3 50-56 Size Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-3-71-73-component-size-clauses}@anchor{214}
+@anchor{gnat_rm/implementation_advice rm-13-3-71-73-component-size-clauses}@anchor{216}
 @section RM 13.3(71-73): Component Size Clauses
 
 
@@ -13909,7 +13947,7 @@ Followed.
 @geindex enumeration
 
 @node RM 13 4 9-10 Enumeration Representation Clauses,RM 13 5 1 17-22 Record Representation Clauses,RM 13 3 71-73 Component Size Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-4-9-10-enumeration-representation-clauses}@anchor{215}
+@anchor{gnat_rm/implementation_advice rm-13-4-9-10-enumeration-representation-clauses}@anchor{217}
 @section RM 13.4(9-10): Enumeration Representation Clauses
 
 
@@ -13931,7 +13969,7 @@ Followed.
 @geindex records
 
 @node RM 13 5 1 17-22 Record Representation Clauses,RM 13 5 2 5 Storage Place Attributes,RM 13 4 9-10 Enumeration Representation Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-5-1-17-22-record-representation-clauses}@anchor{216}
+@anchor{gnat_rm/implementation_advice rm-13-5-1-17-22-record-representation-clauses}@anchor{218}
 @section RM 13.5.1(17-22): Record Representation Clauses
 
 
@@ -13991,7 +14029,7 @@ and all mentioned features are implemented.
 @geindex Storage place attributes
 
 @node RM 13 5 2 5 Storage Place Attributes,RM 13 5 3 7-8 Bit Ordering,RM 13 5 1 17-22 Record Representation Clauses,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-5-2-5-storage-place-attributes}@anchor{217}
+@anchor{gnat_rm/implementation_advice rm-13-5-2-5-storage-place-attributes}@anchor{219}
 @section RM 13.5.2(5): Storage Place Attributes
 
 
@@ -14011,7 +14049,7 @@ Followed.  There are no such components in GNAT.
 @geindex Bit ordering
 
 @node RM 13 5 3 7-8 Bit Ordering,RM 13 7 37 Address as Private,RM 13 5 2 5 Storage Place Attributes,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-5-3-7-8-bit-ordering}@anchor{218}
+@anchor{gnat_rm/implementation_advice rm-13-5-3-7-8-bit-ordering}@anchor{21a}
 @section RM 13.5.3(7-8): Bit Ordering
 
 
@@ -14031,7 +14069,7 @@ Thus non-default bit ordering is not supported.
 @geindex as private type
 
 @node RM 13 7 37 Address as Private,RM 13 7 1 16 Address Operations,RM 13 5 3 7-8 Bit Ordering,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-7-37-address-as-private}@anchor{219}
+@anchor{gnat_rm/implementation_advice rm-13-7-37-address-as-private}@anchor{21b}
 @section RM 13.7(37): Address as Private
 
 
@@ -14049,7 +14087,7 @@ Followed.
 @geindex operations of
 
 @node RM 13 7 1 16 Address Operations,RM 13 9 14-17 Unchecked Conversion,RM 13 7 37 Address as Private,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-7-1-16-address-operations}@anchor{21a}
+@anchor{gnat_rm/implementation_advice rm-13-7-1-16-address-operations}@anchor{21c}
 @section RM 13.7.1(16): Address Operations
 
 
@@ -14067,7 +14105,7 @@ operation raises @cite{Program_Error}, since all operations make sense.
 @geindex Unchecked conversion
 
 @node RM 13 9 14-17 Unchecked Conversion,RM 13 11 23-25 Implicit Heap Usage,RM 13 7 1 16 Address Operations,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-9-14-17-unchecked-conversion}@anchor{21b}
+@anchor{gnat_rm/implementation_advice rm-13-9-14-17-unchecked-conversion}@anchor{21d}
 @section RM 13.9(14-17): Unchecked Conversion
 
 
@@ -14111,7 +14149,7 @@ Followed.
 @geindex implicit
 
 @node RM 13 11 23-25 Implicit Heap Usage,RM 13 11 2 17 Unchecked Deallocation,RM 13 9 14-17 Unchecked Conversion,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-11-23-25-implicit-heap-usage}@anchor{21c}
+@anchor{gnat_rm/implementation_advice rm-13-11-23-25-implicit-heap-usage}@anchor{21e}
 @section RM 13.11(23-25): Implicit Heap Usage
 
 
@@ -14162,7 +14200,7 @@ Followed.
 @geindex Unchecked deallocation
 
 @node RM 13 11 2 17 Unchecked Deallocation,RM 13 13 2 17 Stream Oriented Attributes,RM 13 11 23-25 Implicit Heap Usage,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-11-2-17-unchecked-deallocation}@anchor{21d}
+@anchor{gnat_rm/implementation_advice rm-13-11-2-17-unchecked-deallocation}@anchor{21f}
 @section RM 13.11.2(17): Unchecked Deallocation
 
 
@@ -14177,7 +14215,7 @@ Followed.
 @geindex Stream oriented attributes
 
 @node RM 13 13 2 17 Stream Oriented Attributes,RM A 1 52 Names of Predefined Numeric Types,RM 13 11 2 17 Unchecked Deallocation,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-13-13-2-17-stream-oriented-attributes}@anchor{21e}
+@anchor{gnat_rm/implementation_advice rm-13-13-2-17-stream-oriented-attributes}@anchor{220}
 @section RM 13.13.2(17): Stream Oriented Attributes
 
 
@@ -14232,7 +14270,7 @@ the @cite{GNAT and Libraries} section of the @cite{GNAT User's Guide}.
 @end itemize
 
 @node RM A 1 52 Names of Predefined Numeric Types,RM A 3 2 49 Ada Characters Handling,RM 13 13 2 17 Stream Oriented Attributes,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-a-1-52-names-of-predefined-numeric-types}@anchor{21f}
+@anchor{gnat_rm/implementation_advice rm-a-1-52-names-of-predefined-numeric-types}@anchor{221}
 @section RM A.1(52): Names of Predefined Numeric Types
 
 
@@ -14250,7 +14288,7 @@ Followed.
 @geindex Ada.Characters.Handling
 
 @node RM A 3 2 49 Ada Characters Handling,RM A 4 4 106 Bounded-Length String Handling,RM A 1 52 Names of Predefined Numeric Types,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-a-3-2-49-ada-characters-handling}@anchor{220}
+@anchor{gnat_rm/implementation_advice rm-a-3-2-49-ada-characters-handling}@anchor{222}
 @section RM A.3.2(49): @cite{Ada.Characters.Handling}
 
 
@@ -14267,7 +14305,7 @@ Followed.  GNAT provides no such localized definitions.
 @geindex Bounded-length strings
 
 @node RM A 4 4 106 Bounded-Length String Handling,RM A 5 2 46-47 Random Number Generation,RM A 3 2 49 Ada Characters Handling,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-a-4-4-106-bounded-length-string-handling}@anchor{221}
+@anchor{gnat_rm/implementation_advice rm-a-4-4-106-bounded-length-string-handling}@anchor{223}
 @section RM A.4.4(106): Bounded-Length String Handling
 
 
@@ -14282,7 +14320,7 @@ Followed.  No implicit pointers or dynamic allocation are used.
 @geindex Random number generation
 
 @node RM A 5 2 46-47 Random Number Generation,RM A 10 7 23 Get_Immediate,RM A 4 4 106 Bounded-Length String Handling,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-a-5-2-46-47-random-number-generation}@anchor{222}
+@anchor{gnat_rm/implementation_advice rm-a-5-2-46-47-random-number-generation}@anchor{224}
 @section RM A.5.2(46-47): Random Number Generation
 
 
@@ -14311,7 +14349,7 @@ condition here to hold true.
 @geindex Get_Immediate
 
 @node RM A 10 7 23 Get_Immediate,RM B 1 39-41 Pragma Export,RM A 5 2 46-47 Random Number Generation,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-a-10-7-23-get-immediate}@anchor{223}
+@anchor{gnat_rm/implementation_advice rm-a-10-7-23-get-immediate}@anchor{225}
 @section RM A.10.7(23): @cite{Get_Immediate}
 
 
@@ -14335,7 +14373,7 @@ this functionality.
 @geindex Export
 
 @node RM B 1 39-41 Pragma Export,RM B 2 12-13 Package Interfaces,RM A 10 7 23 Get_Immediate,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-b-1-39-41-pragma-export}@anchor{224}
+@anchor{gnat_rm/implementation_advice rm-b-1-39-41-pragma-export}@anchor{226}
 @section RM B.1(39-41): Pragma @cite{Export}
 
 
@@ -14383,7 +14421,7 @@ Followed.
 @geindex Interfaces
 
 @node RM B 2 12-13 Package Interfaces,RM B 3 63-71 Interfacing with C,RM B 1 39-41 Pragma Export,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-b-2-12-13-package-interfaces}@anchor{225}
+@anchor{gnat_rm/implementation_advice rm-b-2-12-13-package-interfaces}@anchor{227}
 @section RM B.2(12-13): Package @cite{Interfaces}
 
 
@@ -14413,7 +14451,7 @@ Followed.  GNAT provides all the packages described in this section.
 @geindex interfacing with
 
 @node RM B 3 63-71 Interfacing with C,RM B 4 95-98 Interfacing with COBOL,RM B 2 12-13 Package Interfaces,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-b-3-63-71-interfacing-with-c}@anchor{226}
+@anchor{gnat_rm/implementation_advice rm-b-3-63-71-interfacing-with-c}@anchor{228}
 @section RM B.3(63-71): Interfacing with C
 
 
@@ -14501,7 +14539,7 @@ Followed.
 @geindex interfacing with
 
 @node RM B 4 95-98 Interfacing with COBOL,RM B 5 22-26 Interfacing with Fortran,RM B 3 63-71 Interfacing with C,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-b-4-95-98-interfacing-with-cobol}@anchor{227}
+@anchor{gnat_rm/implementation_advice rm-b-4-95-98-interfacing-with-cobol}@anchor{229}
 @section RM B.4(95-98): Interfacing with COBOL
 
 
@@ -14542,7 +14580,7 @@ Followed.
 @geindex interfacing with
 
 @node RM B 5 22-26 Interfacing with Fortran,RM C 1 3-5 Access to Machine Operations,RM B 4 95-98 Interfacing with COBOL,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-b-5-22-26-interfacing-with-fortran}@anchor{228}
+@anchor{gnat_rm/implementation_advice rm-b-5-22-26-interfacing-with-fortran}@anchor{22a}
 @section RM B.5(22-26): Interfacing with Fortran
 
 
@@ -14593,7 +14631,7 @@ Followed.
 @geindex Machine operations
 
 @node RM C 1 3-5 Access to Machine Operations,RM C 1 10-16 Access to Machine Operations,RM B 5 22-26 Interfacing with Fortran,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-1-3-5-access-to-machine-operations}@anchor{229}
+@anchor{gnat_rm/implementation_advice rm-c-1-3-5-access-to-machine-operations}@anchor{22b}
 @section RM C.1(3-5): Access to Machine Operations
 
 
@@ -14628,7 +14666,7 @@ object that is specified as exported."
 Followed.
 
 @node RM C 1 10-16 Access to Machine Operations,RM C 3 28 Interrupt Support,RM C 1 3-5 Access to Machine Operations,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-1-10-16-access-to-machine-operations}@anchor{22a}
+@anchor{gnat_rm/implementation_advice rm-c-1-10-16-access-to-machine-operations}@anchor{22c}
 @section RM C.1(10-16): Access to Machine Operations
 
 
@@ -14689,7 +14727,7 @@ Followed on any target supporting such operations.
 @geindex Interrupt support
 
 @node RM C 3 28 Interrupt Support,RM C 3 1 20-21 Protected Procedure Handlers,RM C 1 10-16 Access to Machine Operations,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-3-28-interrupt-support}@anchor{22b}
+@anchor{gnat_rm/implementation_advice rm-c-3-28-interrupt-support}@anchor{22d}
 @section RM C.3(28): Interrupt Support
 
 
@@ -14707,7 +14745,7 @@ of interrupt blocking.
 @geindex Protected procedure handlers
 
 @node RM C 3 1 20-21 Protected Procedure Handlers,RM C 3 2 25 Package Interrupts,RM C 3 28 Interrupt Support,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-3-1-20-21-protected-procedure-handlers}@anchor{22c}
+@anchor{gnat_rm/implementation_advice rm-c-3-1-20-21-protected-procedure-handlers}@anchor{22e}
 @section RM C.3.1(20-21): Protected Procedure Handlers
 
 
@@ -14733,7 +14771,7 @@ Followed.  Compile time warnings are given when possible.
 @geindex Interrupts
 
 @node RM C 3 2 25 Package Interrupts,RM C 4 14 Pre-elaboration Requirements,RM C 3 1 20-21 Protected Procedure Handlers,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-3-2-25-package-interrupts}@anchor{22d}
+@anchor{gnat_rm/implementation_advice rm-c-3-2-25-package-interrupts}@anchor{22f}
 @section RM C.3.2(25): Package @cite{Interrupts}
 
 
@@ -14751,7 +14789,7 @@ Followed.
 @geindex Pre-elaboration requirements
 
 @node RM C 4 14 Pre-elaboration Requirements,RM C 5 8 Pragma Discard_Names,RM C 3 2 25 Package Interrupts,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-4-14-pre-elaboration-requirements}@anchor{22e}
+@anchor{gnat_rm/implementation_advice rm-c-4-14-pre-elaboration-requirements}@anchor{230}
 @section RM C.4(14): Pre-elaboration Requirements
 
 
@@ -14767,7 +14805,7 @@ Followed.  Executable code is generated in some cases, e.g., loops
 to initialize large arrays.
 
 @node RM C 5 8 Pragma Discard_Names,RM C 7 2 30 The Package Task_Attributes,RM C 4 14 Pre-elaboration Requirements,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-5-8-pragma-discard-names}@anchor{22f}
+@anchor{gnat_rm/implementation_advice rm-c-5-8-pragma-discard-names}@anchor{231}
 @section RM C.5(8): Pragma @cite{Discard_Names}
 
 
@@ -14785,7 +14823,7 @@ Followed.
 @geindex Task_Attributes
 
 @node RM C 7 2 30 The Package Task_Attributes,RM D 3 17 Locking Policies,RM C 5 8 Pragma Discard_Names,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-c-7-2-30-the-package-task-attributes}@anchor{230}
+@anchor{gnat_rm/implementation_advice rm-c-7-2-30-the-package-task-attributes}@anchor{232}
 @section RM C.7.2(30): The Package Task_Attributes
 
 
@@ -14806,7 +14844,7 @@ Not followed.  This implementation is not targeted to such a domain.
 @geindex Locking Policies
 
 @node RM D 3 17 Locking Policies,RM D 4 16 Entry Queuing Policies,RM C 7 2 30 The Package Task_Attributes,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-d-3-17-locking-policies}@anchor{231}
+@anchor{gnat_rm/implementation_advice rm-d-3-17-locking-policies}@anchor{233}
 @section RM D.3(17): Locking Policies
 
 
@@ -14823,7 +14861,7 @@ whose names (@cite{Inheritance_Locking} and
 @geindex Entry queuing policies
 
 @node RM D 4 16 Entry Queuing Policies,RM D 6 9-10 Preemptive Abort,RM D 3 17 Locking Policies,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-d-4-16-entry-queuing-policies}@anchor{232}
+@anchor{gnat_rm/implementation_advice rm-d-4-16-entry-queuing-policies}@anchor{234}
 @section RM D.4(16): Entry Queuing Policies
 
 
@@ -14838,7 +14876,7 @@ Followed.  No such implementation-defined queuing policies exist.
 @geindex Preemptive abort
 
 @node RM D 6 9-10 Preemptive Abort,RM D 7 21 Tasking Restrictions,RM D 4 16 Entry Queuing Policies,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-d-6-9-10-preemptive-abort}@anchor{233}
+@anchor{gnat_rm/implementation_advice rm-d-6-9-10-preemptive-abort}@anchor{235}
 @section RM D.6(9-10): Preemptive Abort
 
 
@@ -14864,7 +14902,7 @@ Followed.
 @geindex Tasking restrictions
 
 @node RM D 7 21 Tasking Restrictions,RM D 8 47-49 Monotonic Time,RM D 6 9-10 Preemptive Abort,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-d-7-21-tasking-restrictions}@anchor{234}
+@anchor{gnat_rm/implementation_advice rm-d-7-21-tasking-restrictions}@anchor{236}
 @section RM D.7(21): Tasking Restrictions
 
 
@@ -14883,7 +14921,7 @@ pragma @cite{Profile (Restricted)} for more details.
 @geindex monotonic
 
 @node RM D 8 47-49 Monotonic Time,RM E 5 28-29 Partition Communication Subsystem,RM D 7 21 Tasking Restrictions,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-d-8-47-49-monotonic-time}@anchor{235}
+@anchor{gnat_rm/implementation_advice rm-d-8-47-49-monotonic-time}@anchor{237}
 @section RM D.8(47-49): Monotonic Time
 
 
@@ -14918,7 +14956,7 @@ Followed.
 @geindex PCS
 
 @node RM E 5 28-29 Partition Communication Subsystem,RM F 7 COBOL Support,RM D 8 47-49 Monotonic Time,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-e-5-28-29-partition-communication-subsystem}@anchor{236}
+@anchor{gnat_rm/implementation_advice rm-e-5-28-29-partition-communication-subsystem}@anchor{238}
 @section RM E.5(28-29): Partition Communication Subsystem
 
 
@@ -14946,7 +14984,7 @@ GNAT.
 @geindex COBOL support
 
 @node RM F 7 COBOL Support,RM F 1 2 Decimal Radix Support,RM E 5 28-29 Partition Communication Subsystem,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-f-7-cobol-support}@anchor{237}
+@anchor{gnat_rm/implementation_advice rm-f-7-cobol-support}@anchor{239}
 @section RM F(7): COBOL Support
 
 
@@ -14966,7 +15004,7 @@ Followed.
 @geindex Decimal radix support
 
 @node RM F 1 2 Decimal Radix Support,RM G Numerics,RM F 7 COBOL Support,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-f-1-2-decimal-radix-support}@anchor{238}
+@anchor{gnat_rm/implementation_advice rm-f-1-2-decimal-radix-support}@anchor{23a}
 @section RM F.1(2): Decimal Radix Support
 
 
@@ -14982,7 +15020,7 @@ representations.
 @geindex Numerics
 
 @node RM G Numerics,RM G 1 1 56-58 Complex Types,RM F 1 2 Decimal Radix Support,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-g-numerics}@anchor{239}
+@anchor{gnat_rm/implementation_advice rm-g-numerics}@anchor{23b}
 @section RM G: Numerics
 
 
@@ -15002,7 +15040,7 @@ Followed.
 @geindex Complex types
 
 @node RM G 1 1 56-58 Complex Types,RM G 1 2 49 Complex Elementary Functions,RM G Numerics,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-g-1-1-56-58-complex-types}@anchor{23a}
+@anchor{gnat_rm/implementation_advice rm-g-1-1-56-58-complex-types}@anchor{23c}
 @section RM G.1.1(56-58): Complex Types
 
 
@@ -15064,7 +15102,7 @@ Followed.
 @geindex Complex elementary functions
 
 @node RM G 1 2 49 Complex Elementary Functions,RM G 2 4 19 Accuracy Requirements,RM G 1 1 56-58 Complex Types,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-g-1-2-49-complex-elementary-functions}@anchor{23b}
+@anchor{gnat_rm/implementation_advice rm-g-1-2-49-complex-elementary-functions}@anchor{23d}
 @section RM G.1.2(49): Complex Elementary Functions
 
 
@@ -15086,7 +15124,7 @@ Followed.
 @geindex Accuracy requirements
 
 @node RM G 2 4 19 Accuracy Requirements,RM G 2 6 15 Complex Arithmetic Accuracy,RM G 1 2 49 Complex Elementary Functions,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-g-2-4-19-accuracy-requirements}@anchor{23c}
+@anchor{gnat_rm/implementation_advice rm-g-2-4-19-accuracy-requirements}@anchor{23e}
 @section RM G.2.4(19): Accuracy Requirements
 
 
@@ -15110,7 +15148,7 @@ Followed.
 @geindex complex arithmetic
 
 @node RM G 2 6 15 Complex Arithmetic Accuracy,RM H 6 15/2 Pragma Partition_Elaboration_Policy,RM G 2 4 19 Accuracy Requirements,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-g-2-6-15-complex-arithmetic-accuracy}@anchor{23d}
+@anchor{gnat_rm/implementation_advice rm-g-2-6-15-complex-arithmetic-accuracy}@anchor{23f}
 @section RM G.2.6(15): Complex Arithmetic Accuracy
 
 
@@ -15128,7 +15166,7 @@ Followed.
 @geindex Sequential elaboration policy
 
 @node RM H 6 15/2 Pragma Partition_Elaboration_Policy,,RM G 2 6 15 Complex Arithmetic Accuracy,Implementation Advice
-@anchor{gnat_rm/implementation_advice rm-h-6-15-2-pragma-partition-elaboration-policy}@anchor{23e}
+@anchor{gnat_rm/implementation_advice rm-h-6-15-2-pragma-partition-elaboration-policy}@anchor{240}
 @section RM H.6(15/2): Pragma Partition_Elaboration_Policy
 
 
@@ -15143,7 +15181,7 @@ immediately terminated."
 Not followed.
 
 @node Implementation Defined Characteristics,Intrinsic Subprograms,Implementation Advice,Top
-@anchor{gnat_rm/implementation_defined_characteristics implementation-defined-characteristics}@anchor{b}@anchor{gnat_rm/implementation_defined_characteristics doc}@anchor{23f}@anchor{gnat_rm/implementation_defined_characteristics id1}@anchor{240}
+@anchor{gnat_rm/implementation_defined_characteristics implementation-defined-characteristics}@anchor{b}@anchor{gnat_rm/implementation_defined_characteristics doc}@anchor{241}@anchor{gnat_rm/implementation_defined_characteristics id1}@anchor{242}
 @chapter Implementation Defined Characteristics
 
 
@@ -16338,7 +16376,7 @@ When the @cite{Pattern} parameter is not the null string, it is interpreted
 according to the syntax of regular expressions as defined in the
 @cite{GNAT.Regexp} package.
 
-See @ref{241,,GNAT.Regexp (g-regexp.ads)}.
+See @ref{243,,GNAT.Regexp (g-regexp.ads)}.
 
 
 @itemize *
@@ -17380,7 +17418,7 @@ H.4(27)."
 There are no restrictions on pragma @cite{Restrictions}.
 
 @node Intrinsic Subprograms,Representation Clauses and Pragmas,Implementation Defined Characteristics,Top
-@anchor{gnat_rm/intrinsic_subprograms doc}@anchor{242}@anchor{gnat_rm/intrinsic_subprograms intrinsic-subprograms}@anchor{c}@anchor{gnat_rm/intrinsic_subprograms id1}@anchor{243}
+@anchor{gnat_rm/intrinsic_subprograms doc}@anchor{244}@anchor{gnat_rm/intrinsic_subprograms intrinsic-subprograms}@anchor{c}@anchor{gnat_rm/intrinsic_subprograms id1}@anchor{245}
 @chapter Intrinsic Subprograms
 
 
@@ -17417,7 +17455,7 @@ Ada standard does not require Ada compilers to implement this feature.
 @end menu
 
 @node Intrinsic Operators,Compilation_Date,,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms id2}@anchor{244}@anchor{gnat_rm/intrinsic_subprograms intrinsic-operators}@anchor{245}
+@anchor{gnat_rm/intrinsic_subprograms id2}@anchor{246}@anchor{gnat_rm/intrinsic_subprograms intrinsic-operators}@anchor{247}
 @section Intrinsic Operators
 
 
@@ -17448,7 +17486,7 @@ It is also possible to specify such operators for private types, if the
 full views are appropriate arithmetic types.
 
 @node Compilation_Date,Compilation_Time,Intrinsic Operators,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms compilation-date}@anchor{246}@anchor{gnat_rm/intrinsic_subprograms id3}@anchor{247}
+@anchor{gnat_rm/intrinsic_subprograms compilation-date}@anchor{248}@anchor{gnat_rm/intrinsic_subprograms id3}@anchor{249}
 @section Compilation_Date
 
 
@@ -17462,7 +17500,7 @@ application program should simply call the function
 the current compilation (in local time format MMM DD YYYY).
 
 @node Compilation_Time,Enclosing_Entity,Compilation_Date,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms compilation-time}@anchor{248}@anchor{gnat_rm/intrinsic_subprograms id4}@anchor{249}
+@anchor{gnat_rm/intrinsic_subprograms compilation-time}@anchor{24a}@anchor{gnat_rm/intrinsic_subprograms id4}@anchor{24b}
 @section Compilation_Time
 
 
@@ -17476,7 +17514,7 @@ application program should simply call the function
 the current compilation (in local time format HH:MM:SS).
 
 @node Enclosing_Entity,Exception_Information,Compilation_Time,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms id5}@anchor{24a}@anchor{gnat_rm/intrinsic_subprograms enclosing-entity}@anchor{24b}
+@anchor{gnat_rm/intrinsic_subprograms id5}@anchor{24c}@anchor{gnat_rm/intrinsic_subprograms enclosing-entity}@anchor{24d}
 @section Enclosing_Entity
 
 
@@ -17490,7 +17528,7 @@ application program should simply call the function
 the current subprogram, package, task, entry, or protected subprogram.
 
 @node Exception_Information,Exception_Message,Enclosing_Entity,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms id6}@anchor{24c}@anchor{gnat_rm/intrinsic_subprograms exception-information}@anchor{24d}
+@anchor{gnat_rm/intrinsic_subprograms id6}@anchor{24e}@anchor{gnat_rm/intrinsic_subprograms exception-information}@anchor{24f}
 @section Exception_Information
 
 
@@ -17504,7 +17542,7 @@ so an application program should simply call the function
 the exception information associated with the current exception.
 
 @node Exception_Message,Exception_Name,Exception_Information,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms exception-message}@anchor{24e}@anchor{gnat_rm/intrinsic_subprograms id7}@anchor{24f}
+@anchor{gnat_rm/intrinsic_subprograms exception-message}@anchor{250}@anchor{gnat_rm/intrinsic_subprograms id7}@anchor{251}
 @section Exception_Message
 
 
@@ -17518,7 +17556,7 @@ so an application program should simply call the function
 the message associated with the current exception.
 
 @node Exception_Name,File,Exception_Message,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms exception-name}@anchor{250}@anchor{gnat_rm/intrinsic_subprograms id8}@anchor{251}
+@anchor{gnat_rm/intrinsic_subprograms exception-name}@anchor{252}@anchor{gnat_rm/intrinsic_subprograms id8}@anchor{253}
 @section Exception_Name
 
 
@@ -17532,7 +17570,7 @@ so an application program should simply call the function
 the name of the current exception.
 
 @node File,Line,Exception_Name,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms file}@anchor{252}@anchor{gnat_rm/intrinsic_subprograms id9}@anchor{253}
+@anchor{gnat_rm/intrinsic_subprograms file}@anchor{254}@anchor{gnat_rm/intrinsic_subprograms id9}@anchor{255}
 @section File
 
 
@@ -17546,7 +17584,7 @@ application program should simply call the function
 file.
 
 @node Line,Shifts and Rotates,File,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms id10}@anchor{254}@anchor{gnat_rm/intrinsic_subprograms line}@anchor{255}
+@anchor{gnat_rm/intrinsic_subprograms id10}@anchor{256}@anchor{gnat_rm/intrinsic_subprograms line}@anchor{257}
 @section Line
 
 
@@ -17560,7 +17598,7 @@ application program should simply call the function
 source line.
 
 @node Shifts and Rotates,Source_Location,Line,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms id11}@anchor{256}@anchor{gnat_rm/intrinsic_subprograms shifts-and-rotates}@anchor{257}
+@anchor{gnat_rm/intrinsic_subprograms id11}@anchor{258}@anchor{gnat_rm/intrinsic_subprograms shifts-and-rotates}@anchor{259}
 @section Shifts and Rotates
 
 
@@ -17599,7 +17637,7 @@ the Provide_Shift_Operators pragma, which provides the function declarations
 and corresponding pragma Import's for all five shift functions.
 
 @node Source_Location,,Shifts and Rotates,Intrinsic Subprograms
-@anchor{gnat_rm/intrinsic_subprograms source-location}@anchor{258}@anchor{gnat_rm/intrinsic_subprograms id12}@anchor{259}
+@anchor{gnat_rm/intrinsic_subprograms source-location}@anchor{25a}@anchor{gnat_rm/intrinsic_subprograms id12}@anchor{25b}
 @section Source_Location
 
 
@@ -17613,7 +17651,7 @@ application program should simply call the function
 source file location.
 
 @node Representation Clauses and Pragmas,Standard Library Routines,Intrinsic Subprograms,Top
-@anchor{gnat_rm/representation_clauses_and_pragmas representation-clauses-and-pragmas}@anchor{d}@anchor{gnat_rm/representation_clauses_and_pragmas doc}@anchor{25a}@anchor{gnat_rm/representation_clauses_and_pragmas id1}@anchor{25b}
+@anchor{gnat_rm/representation_clauses_and_pragmas representation-clauses-and-pragmas}@anchor{d}@anchor{gnat_rm/representation_clauses_and_pragmas doc}@anchor{25c}@anchor{gnat_rm/representation_clauses_and_pragmas id1}@anchor{25d}
 @chapter Representation Clauses and Pragmas
 
 
@@ -17659,7 +17697,7 @@ and this section describes the additional capabilities provided.
 @end menu
 
 @node Alignment Clauses,Size Clauses,,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id2}@anchor{25c}@anchor{gnat_rm/representation_clauses_and_pragmas alignment-clauses}@anchor{25d}
+@anchor{gnat_rm/representation_clauses_and_pragmas id2}@anchor{25e}@anchor{gnat_rm/representation_clauses_and_pragmas alignment-clauses}@anchor{25f}
 @section Alignment Clauses
 
 
@@ -17673,13 +17711,13 @@ values are as follows:
 @itemize *
 
 @item 
-@emph{Primitive Types}.
+@emph{Elementary Types}.
 
-For primitive types, the alignment is the minimum of the actual size of
+For elementary types, the alignment is the minimum of the actual size of
 objects of the type divided by @cite{Storage_Unit},
 and the maximum alignment supported by the target.
 (This maximum alignment is given by the GNAT-specific attribute
-@cite{Standard'Maximum_Alignment}; see @ref{17a,,Attribute Maximum_Alignment}.)
+@cite{Standard'Maximum_Alignment}; see @ref{17c,,Attribute Maximum_Alignment}.)
 
 @geindex Maximum_Alignment attribute
 
@@ -17695,10 +17733,11 @@ aligned.
 For arrays, the alignment is equal to the alignment of the component type
 for the normal case where no packing or component size is given.  If the
 array is packed, and the packing is effective (see separate section on
-packed arrays), then the alignment will be one for long packed arrays,
-or arrays whose length is not known at compile time.  For short packed
+packed arrays), then the alignment will be either 4, 2, or 1 for long packed
+arrays or arrays whose length is not known at compile time, depending on
+whether the component size is divisible by 4, 2, or is odd.  For short packed
 arrays, which are handled internally as modular types, the alignment
-will be as described for primitive types, e.g., a packed array of length
+will be as described for elementary types, e.g. a packed array of length
 31 bits will have an object size of four bytes, and an alignment of 4.
 
 @item 
@@ -17787,7 +17826,7 @@ assumption is non-portable, and other compilers may choose different
 alignments for the subtype @cite{RS}.
 
 @node Size Clauses,Storage_Size Clauses,Alignment Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id3}@anchor{25e}@anchor{gnat_rm/representation_clauses_and_pragmas size-clauses}@anchor{25f}
+@anchor{gnat_rm/representation_clauses_and_pragmas id3}@anchor{260}@anchor{gnat_rm/representation_clauses_and_pragmas size-clauses}@anchor{261}
 @section Size Clauses
 
 
@@ -17864,7 +17903,7 @@ if it is known that a Size value can be accommodated in an object of
 type Integer.
 
 @node Storage_Size Clauses,Size of Variant Record Objects,Size Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas storage-size-clauses}@anchor{260}@anchor{gnat_rm/representation_clauses_and_pragmas id4}@anchor{261}
+@anchor{gnat_rm/representation_clauses_and_pragmas storage-size-clauses}@anchor{262}@anchor{gnat_rm/representation_clauses_and_pragmas id4}@anchor{263}
 @section Storage_Size Clauses
 
 
@@ -17937,7 +17976,7 @@ Of course in practice, there will not be any explicit allocators in the
 case of such an access declaration.
 
 @node Size of Variant Record Objects,Biased Representation,Storage_Size Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id5}@anchor{262}@anchor{gnat_rm/representation_clauses_and_pragmas size-of-variant-record-objects}@anchor{263}
+@anchor{gnat_rm/representation_clauses_and_pragmas id5}@anchor{264}@anchor{gnat_rm/representation_clauses_and_pragmas size-of-variant-record-objects}@anchor{265}
 @section Size of Variant Record Objects
 
 
@@ -18047,7 +18086,7 @@ the maximum size, regardless of the current variant value, the
 variant value.
 
 @node Biased Representation,Value_Size and Object_Size Clauses,Size of Variant Record Objects,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id6}@anchor{264}@anchor{gnat_rm/representation_clauses_and_pragmas biased-representation}@anchor{265}
+@anchor{gnat_rm/representation_clauses_and_pragmas id6}@anchor{266}@anchor{gnat_rm/representation_clauses_and_pragmas biased-representation}@anchor{267}
 @section Biased Representation
 
 
@@ -18085,7 +18124,7 @@ biased representation can be used for all discrete types except for
 enumeration types for which a representation clause is given.
 
 @node Value_Size and Object_Size Clauses,Component_Size Clauses,Biased Representation,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id7}@anchor{266}@anchor{gnat_rm/representation_clauses_and_pragmas value-size-and-object-size-clauses}@anchor{267}
+@anchor{gnat_rm/representation_clauses_and_pragmas id7}@anchor{268}@anchor{gnat_rm/representation_clauses_and_pragmas value-size-and-object-size-clauses}@anchor{269}
 @section Value_Size and Object_Size Clauses
 
 
@@ -18148,7 +18187,7 @@ discrete types are as follows:
 The @cite{Object_Size} for base subtypes reflect the natural hardware
 size in bits (run the compiler with @emph{-gnatS} to find those values
 for numeric types). Enumeration types and fixed-point base subtypes have
-8, 16, 32 or 64 bits for this size, depending on the range of values
+8, 16, 32, or 64 bits for this size, depending on the range of values
 to be stored.
 
 @item 
@@ -18392,7 +18431,7 @@ definition clause forces biased representation. This
 warning can be turned off using @cite{-gnatw.B}.
 
 @node Component_Size Clauses,Bit_Order Clauses,Value_Size and Object_Size Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id8}@anchor{268}@anchor{gnat_rm/representation_clauses_and_pragmas component-size-clauses}@anchor{269}
+@anchor{gnat_rm/representation_clauses_and_pragmas id8}@anchor{26a}@anchor{gnat_rm/representation_clauses_and_pragmas component-size-clauses}@anchor{26b}
 @section Component_Size Clauses
 
 
@@ -18439,7 +18478,7 @@ and a pragma Pack for the same array type. if such duplicate
 clauses are given, the pragma Pack will be ignored.
 
 @node Bit_Order Clauses,Effect of Bit_Order on Byte Ordering,Component_Size Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas bit-order-clauses}@anchor{26a}@anchor{gnat_rm/representation_clauses_and_pragmas id9}@anchor{26b}
+@anchor{gnat_rm/representation_clauses_and_pragmas bit-order-clauses}@anchor{26c}@anchor{gnat_rm/representation_clauses_and_pragmas id9}@anchor{26d}
 @section Bit_Order Clauses
 
 
@@ -18528,7 +18567,7 @@ little-endian machines, this must be explicitly programmed.  This capability
 is not provided by @cite{Bit_Order}.
 
 @item 
-Components that are positioned across byte boundaries
+Components that are positioned across byte boundaries.
 
 but do not occupy an integral number of bytes.  Given that bytes are not
 reordered, such fields would occupy a non-contiguous sequence of bits
@@ -18545,7 +18584,7 @@ if desired.  The following section contains additional
 details regarding the issue of byte ordering.
 
 @node Effect of Bit_Order on Byte Ordering,Pragma Pack for Arrays,Bit_Order Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id10}@anchor{26c}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-bit-order-on-byte-ordering}@anchor{26d}
+@anchor{gnat_rm/representation_clauses_and_pragmas id10}@anchor{26e}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-bit-order-on-byte-ordering}@anchor{26f}
 @section Effect of Bit_Order on Byte Ordering
 
 
@@ -18802,35 +18841,36 @@ to set the boolean constant @cite{Master_Byte_First} in
 an appropriate manner.
 
 @node Pragma Pack for Arrays,Pragma Pack for Records,Effect of Bit_Order on Byte Ordering,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-arrays}@anchor{26e}@anchor{gnat_rm/representation_clauses_and_pragmas id11}@anchor{26f}
+@anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-arrays}@anchor{270}@anchor{gnat_rm/representation_clauses_and_pragmas id11}@anchor{271}
 @section Pragma Pack for Arrays
 
 
 @geindex Pragma Pack (for arrays)
 
-Pragma @cite{Pack} applied to an array has no effect unless the component type
-is packable.  For a component type to be packable, it must be one of the
-following cases:
+Pragma @cite{Pack} applied to an array has an effect that depends upon whether the
+component type is @emph{packable}.  For a component type to be @emph{packable}, it must
+be one of the following cases:
 
 
 @itemize *
 
 @item 
-Any scalar type
-
-@item 
-Any type whose size is specified with a size clause
+Any elementary type.
 
 @item 
-Any packed array type with a static size
+Any small packed array type with a static size.
 
 @item 
-Any record type padded because of its default alignment
+Any small simple record type with a static size.
 @end itemize
 
 For all these cases, if the component subtype size is in the range
-1 through 63, then the effect of the pragma @cite{Pack} is exactly as though a
+1 through 64, then the effect of the pragma @cite{Pack} is exactly as though a
 component size were specified giving the component subtype size.
+
+All other types are non-packable, they occupy an integral number of storage
+units and the only effect of pragma Pack is to remove alignment gaps.
+
 For example if we have:
 
 @example
@@ -18841,7 +18881,7 @@ pragma Pack (ar);
 @end example
 
 Then the component size of @cite{ar} will be set to 5 (i.e., to @cite{r'size},
-and the size of the array @cite{ar} will be exactly 40 bits.
+and the size of the array @cite{ar} will be exactly 40 bits).
 
 Note that in some cases this rather fierce approach to packing can produce
 unexpected effects.  For example, in Ada 95 and Ada 2005,
@@ -18918,7 +18958,7 @@ Here 31-bit packing is achieved as required, and no warning is generated,
 since in this case the programmer intention is clear.
 
 @node Pragma Pack for Records,Record Representation Clauses,Pragma Pack for Arrays,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-records}@anchor{270}@anchor{gnat_rm/representation_clauses_and_pragmas id12}@anchor{271}
+@anchor{gnat_rm/representation_clauses_and_pragmas pragma-pack-for-records}@anchor{272}@anchor{gnat_rm/representation_clauses_and_pragmas id12}@anchor{273}
 @section Pragma Pack for Records
 
 
@@ -18934,22 +18974,24 @@ Components of the following types are considered packable:
 @itemize *
 
 @item 
-Components of a primitive type are packable unless they are aliased
-or of an atomic type.
+Components of an elementary type are packable unless they are aliased,
+independent, or of an atomic type.
+
+@item 
+Small packed arrays, where the size is statically known, are represented
+internally as modular integers, and so they are also packable.
 
 @item 
-Small packed arrays, whose size does not exceed 64 bits, and where the
-size is statically known at compile time, are represented internally
-as modular integers, and so they are also packable.
+Small simple records, where the size is statically known, are also packable.
 @end itemize
 
-All packable components occupy the exact number of bits corresponding to
-their @cite{Size} value, and are packed with no padding bits, i.e., they
-can start on an arbitrary bit boundary.
+For all these cases, if the 'Size value is in the range 1 through 64, the
+components occupy the exact number of bits corresponding to this value
+and are packed with no padding bits, i.e. they can start on an arbitrary
+bit boundary.
 
-All other types are non-packable, they occupy an integral number of
-storage units, and
-are placed at a boundary corresponding to their alignment requirements.
+All other types are non-packable, they occupy an integral number of storage
+units and the only effect of pragma Pack is to remove alignment gaps.
 
 For example, consider the record
 
@@ -19001,7 +19043,7 @@ the @cite{L6} field is aligned to the next byte boundary, and takes an
 integral number of bytes, i.e., 72 bits.
 
 @node Record Representation Clauses,Handling of Records with Holes,Pragma Pack for Records,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id13}@anchor{272}@anchor{gnat_rm/representation_clauses_and_pragmas record-representation-clauses}@anchor{273}
+@anchor{gnat_rm/representation_clauses_and_pragmas id13}@anchor{274}@anchor{gnat_rm/representation_clauses_and_pragmas record-representation-clauses}@anchor{275}
 @section Record Representation Clauses
 
 
@@ -19080,13 +19122,13 @@ end record;
 
 Note: the above rules apply to recent releases of GNAT 5.
 In GNAT 3, there are more severe restrictions on larger components.
-For non-primitive types, including packed arrays with a size greater than
+For composite types, including packed arrays with a size greater than
 64 bits, component clauses must respect the alignment requirement of the
 type, in particular, always starting on a byte boundary, and the length
 must be a multiple of the storage unit.
 
 @node Handling of Records with Holes,Enumeration Clauses,Record Representation Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas handling-of-records-with-holes}@anchor{274}@anchor{gnat_rm/representation_clauses_and_pragmas id14}@anchor{275}
+@anchor{gnat_rm/representation_clauses_and_pragmas handling-of-records-with-holes}@anchor{276}@anchor{gnat_rm/representation_clauses_and_pragmas id14}@anchor{277}
 @section Handling of Records with Holes
 
 
@@ -19163,7 +19205,7 @@ for Hrec'Size use 64;
 @end example
 
 @node Enumeration Clauses,Address Clauses,Handling of Records with Holes,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas enumeration-clauses}@anchor{276}@anchor{gnat_rm/representation_clauses_and_pragmas id15}@anchor{277}
+@anchor{gnat_rm/representation_clauses_and_pragmas enumeration-clauses}@anchor{278}@anchor{gnat_rm/representation_clauses_and_pragmas id15}@anchor{279}
 @section Enumeration Clauses
 
 
@@ -19206,7 +19248,7 @@ the overhead of converting representation values to the corresponding
 positional values, (i.e., the value delivered by the @cite{Pos} attribute).
 
 @node Address Clauses,Use of Address Clauses for Memory-Mapped I/O,Enumeration Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id16}@anchor{278}@anchor{gnat_rm/representation_clauses_and_pragmas address-clauses}@anchor{279}
+@anchor{gnat_rm/representation_clauses_and_pragmas id16}@anchor{27a}@anchor{gnat_rm/representation_clauses_and_pragmas address-clauses}@anchor{27b}
 @section Address Clauses
 
 
@@ -19536,7 +19578,7 @@ then the program compiles without the warning and when run will generate
 the output @cite{X was not clobbered}.
 
 @node Use of Address Clauses for Memory-Mapped I/O,Effect of Convention on Representation,Address Clauses,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id17}@anchor{27a}@anchor{gnat_rm/representation_clauses_and_pragmas use-of-address-clauses-for-memory-mapped-i-o}@anchor{27b}
+@anchor{gnat_rm/representation_clauses_and_pragmas id17}@anchor{27c}@anchor{gnat_rm/representation_clauses_and_pragmas use-of-address-clauses-for-memory-mapped-i-o}@anchor{27d}
 @section Use of Address Clauses for Memory-Mapped I/O
 
 
@@ -19594,7 +19636,7 @@ provides the pragma @cite{Volatile_Full_Access} which can be used in lieu of
 pragma @cite{Atomic} and will give the additional guarantee.
 
 @node Effect of Convention on Representation,Conventions and Anonymous Access Types,Use of Address Clauses for Memory-Mapped I/O,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id18}@anchor{27c}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-convention-on-representation}@anchor{27d}
+@anchor{gnat_rm/representation_clauses_and_pragmas id18}@anchor{27e}@anchor{gnat_rm/representation_clauses_and_pragmas effect-of-convention-on-representation}@anchor{27f}
 @section Effect of Convention on Representation
 
 
@@ -19672,7 +19714,7 @@ when one of these values is read, any nonzero value is treated as True.
 @end itemize
 
 @node Conventions and Anonymous Access Types,Determining the Representations chosen by GNAT,Effect of Convention on Representation,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas conventions-and-anonymous-access-types}@anchor{27e}@anchor{gnat_rm/representation_clauses_and_pragmas id19}@anchor{27f}
+@anchor{gnat_rm/representation_clauses_and_pragmas conventions-and-anonymous-access-types}@anchor{280}@anchor{gnat_rm/representation_clauses_and_pragmas id19}@anchor{281}
 @section Conventions and Anonymous Access Types
 
 
@@ -19748,7 +19790,7 @@ package ConvComp is
 @end example
 
 @node Determining the Representations chosen by GNAT,,Conventions and Anonymous Access Types,Representation Clauses and Pragmas
-@anchor{gnat_rm/representation_clauses_and_pragmas id20}@anchor{280}@anchor{gnat_rm/representation_clauses_and_pragmas determining-the-representations-chosen-by-gnat}@anchor{281}
+@anchor{gnat_rm/representation_clauses_and_pragmas id20}@anchor{282}@anchor{gnat_rm/representation_clauses_and_pragmas determining-the-representations-chosen-by-gnat}@anchor{283}
 @section Determining the Representations chosen by GNAT
 
 
@@ -19900,7 +19942,7 @@ generated by the compiler into the original source to fix and guarantee
 the actual representation to be used.
 
 @node Standard Library Routines,The Implementation of Standard I/O,Representation Clauses and Pragmas,Top
-@anchor{gnat_rm/standard_library_routines standard-library-routines}@anchor{e}@anchor{gnat_rm/standard_library_routines doc}@anchor{282}@anchor{gnat_rm/standard_library_routines id1}@anchor{283}
+@anchor{gnat_rm/standard_library_routines standard-library-routines}@anchor{e}@anchor{gnat_rm/standard_library_routines doc}@anchor{284}@anchor{gnat_rm/standard_library_routines id1}@anchor{285}
 @chapter Standard Library Routines
 
 
@@ -20723,7 +20765,7 @@ For packages in Interfaces and System, all the RM defined packages are
 available in GNAT, see the Ada 2012 RM for full details.
 
 @node The Implementation of Standard I/O,The GNAT Library,Standard Library Routines,Top
-@anchor{gnat_rm/the_implementation_of_standard_i_o the-implementation-of-standard-i-o}@anchor{f}@anchor{gnat_rm/the_implementation_of_standard_i_o doc}@anchor{284}@anchor{gnat_rm/the_implementation_of_standard_i_o id1}@anchor{285}
+@anchor{gnat_rm/the_implementation_of_standard_i_o the-implementation-of-standard-i-o}@anchor{f}@anchor{gnat_rm/the_implementation_of_standard_i_o doc}@anchor{286}@anchor{gnat_rm/the_implementation_of_standard_i_o id1}@anchor{287}
 @chapter The Implementation of Standard I/O
 
 
@@ -20775,7 +20817,7 @@ these additional facilities are also described in this chapter.
 @end menu
 
 @node Standard I/O Packages,FORM Strings,,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o standard-i-o-packages}@anchor{286}@anchor{gnat_rm/the_implementation_of_standard_i_o id2}@anchor{287}
+@anchor{gnat_rm/the_implementation_of_standard_i_o standard-i-o-packages}@anchor{288}@anchor{gnat_rm/the_implementation_of_standard_i_o id2}@anchor{289}
 @section Standard I/O Packages
 
 
@@ -20846,7 +20888,7 @@ flush the common I/O streams and in particular Standard_Output before
 elaborating the Ada code.
 
 @node FORM Strings,Direct_IO,Standard I/O Packages,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o form-strings}@anchor{288}@anchor{gnat_rm/the_implementation_of_standard_i_o id3}@anchor{289}
+@anchor{gnat_rm/the_implementation_of_standard_i_o form-strings}@anchor{28a}@anchor{gnat_rm/the_implementation_of_standard_i_o id3}@anchor{28b}
 @section FORM Strings
 
 
@@ -20872,7 +20914,7 @@ unrecognized keyword appears in a form string, it is silently ignored
 and not considered invalid.
 
 @node Direct_IO,Sequential_IO,FORM Strings,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o direct-io}@anchor{28a}@anchor{gnat_rm/the_implementation_of_standard_i_o id4}@anchor{28b}
+@anchor{gnat_rm/the_implementation_of_standard_i_o direct-io}@anchor{28c}@anchor{gnat_rm/the_implementation_of_standard_i_o id4}@anchor{28d}
 @section Direct_IO
 
 
@@ -20892,7 +20934,7 @@ There is no limit on the size of Direct_IO files, they are expanded as
 necessary to accommodate whatever records are written to the file.
 
 @node Sequential_IO,Text_IO,Direct_IO,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o sequential-io}@anchor{28c}@anchor{gnat_rm/the_implementation_of_standard_i_o id5}@anchor{28d}
+@anchor{gnat_rm/the_implementation_of_standard_i_o sequential-io}@anchor{28e}@anchor{gnat_rm/the_implementation_of_standard_i_o id5}@anchor{28f}
 @section Sequential_IO
 
 
@@ -20939,7 +20981,7 @@ using Stream_IO, and this is the preferred mechanism.  In particular, the
 above program fragment rewritten to use Stream_IO will work correctly.
 
 @node Text_IO,Wide_Text_IO,Sequential_IO,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o id6}@anchor{28e}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io}@anchor{28f}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id6}@anchor{290}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io}@anchor{291}
 @section Text_IO
 
 
@@ -21022,7 +21064,7 @@ the file.
 @end menu
 
 @node Stream Pointer Positioning,Reading and Writing Non-Regular Files,,Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o id7}@anchor{290}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning}@anchor{291}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id7}@anchor{292}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning}@anchor{293}
 @subsection Stream Pointer Positioning
 
 
@@ -21058,7 +21100,7 @@ between two Ada files, then the difference may be observable in some
 situations.
 
 @node Reading and Writing Non-Regular Files,Get_Immediate,Stream Pointer Positioning,Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files}@anchor{292}@anchor{gnat_rm/the_implementation_of_standard_i_o id8}@anchor{293}
+@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files}@anchor{294}@anchor{gnat_rm/the_implementation_of_standard_i_o id8}@anchor{295}
 @subsection Reading and Writing Non-Regular Files
 
 
@@ -21109,7 +21151,7 @@ to read data past that end of
 file indication, until another end of file indication is entered.
 
 @node Get_Immediate,Treating Text_IO Files as Streams,Reading and Writing Non-Regular Files,Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o get-immediate}@anchor{294}@anchor{gnat_rm/the_implementation_of_standard_i_o id9}@anchor{295}
+@anchor{gnat_rm/the_implementation_of_standard_i_o get-immediate}@anchor{296}@anchor{gnat_rm/the_implementation_of_standard_i_o id9}@anchor{297}
 @subsection Get_Immediate
 
 
@@ -21127,7 +21169,7 @@ possible), it is undefined whether the FF character will be treated as a
 page mark.
 
 @node Treating Text_IO Files as Streams,Text_IO Extensions,Get_Immediate,Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o id10}@anchor{296}@anchor{gnat_rm/the_implementation_of_standard_i_o treating-text-io-files-as-streams}@anchor{297}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id10}@anchor{298}@anchor{gnat_rm/the_implementation_of_standard_i_o treating-text-io-files-as-streams}@anchor{299}
 @subsection Treating Text_IO Files as Streams
 
 
@@ -21143,7 +21185,7 @@ skipped and the effect is similar to that described above for
 @cite{Get_Immediate}.
 
 @node Text_IO Extensions,Text_IO Facilities for Unbounded Strings,Treating Text_IO Files as Streams,Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o id11}@anchor{298}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io-extensions}@anchor{299}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id11}@anchor{29a}@anchor{gnat_rm/the_implementation_of_standard_i_o text-io-extensions}@anchor{29b}
 @subsection Text_IO Extensions
 
 
@@ -21171,7 +21213,7 @@ the string is to be read.
 @end itemize
 
 @node Text_IO Facilities for Unbounded Strings,,Text_IO Extensions,Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o text-io-facilities-for-unbounded-strings}@anchor{29a}@anchor{gnat_rm/the_implementation_of_standard_i_o id12}@anchor{29b}
+@anchor{gnat_rm/the_implementation_of_standard_i_o text-io-facilities-for-unbounded-strings}@anchor{29c}@anchor{gnat_rm/the_implementation_of_standard_i_o id12}@anchor{29d}
 @subsection Text_IO Facilities for Unbounded Strings
 
 
@@ -21219,7 +21261,7 @@ files @code{a-szuzti.ads} and @code{a-szuzti.adb} provides similar extended
 @cite{Wide_Wide_Text_IO} functionality for unbounded wide wide strings.
 
 @node Wide_Text_IO,Wide_Wide_Text_IO,Text_IO,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o wide-text-io}@anchor{29c}@anchor{gnat_rm/the_implementation_of_standard_i_o id13}@anchor{29d}
+@anchor{gnat_rm/the_implementation_of_standard_i_o wide-text-io}@anchor{29e}@anchor{gnat_rm/the_implementation_of_standard_i_o id13}@anchor{29f}
 @section Wide_Text_IO
 
 
@@ -21466,12 +21508,12 @@ input also causes Constraint_Error to be raised.
 @end menu
 
 @node Stream Pointer Positioning<2>,Reading and Writing Non-Regular Files<2>,,Wide_Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-1}@anchor{29e}@anchor{gnat_rm/the_implementation_of_standard_i_o id14}@anchor{29f}
+@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-1}@anchor{2a0}@anchor{gnat_rm/the_implementation_of_standard_i_o id14}@anchor{2a1}
 @subsection Stream Pointer Positioning
 
 
 @cite{Ada.Wide_Text_IO} is similar to @cite{Ada.Text_IO} in its handling
-of stream pointer positioning (@ref{28f,,Text_IO}).  There is one additional
+of stream pointer positioning (@ref{291,,Text_IO}).  There is one additional
 case:
 
 If @cite{Ada.Wide_Text_IO.Look_Ahead} reads a character outside the
@@ -21490,7 +21532,7 @@ to a normal program using @cite{Wide_Text_IO}.  However, this discrepancy
 can be observed if the wide text file shares a stream with another file.
 
 @node Reading and Writing Non-Regular Files<2>,,Stream Pointer Positioning<2>,Wide_Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-1}@anchor{2a0}@anchor{gnat_rm/the_implementation_of_standard_i_o id15}@anchor{2a1}
+@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-1}@anchor{2a2}@anchor{gnat_rm/the_implementation_of_standard_i_o id15}@anchor{2a3}
 @subsection Reading and Writing Non-Regular Files
 
 
@@ -21501,7 +21543,7 @@ treated as data characters), and @cite{End_Of_Page} always returns
 it is possible to read beyond an end of file.
 
 @node Wide_Wide_Text_IO,Stream_IO,Wide_Text_IO,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o id16}@anchor{2a2}@anchor{gnat_rm/the_implementation_of_standard_i_o wide-wide-text-io}@anchor{2a3}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id16}@anchor{2a4}@anchor{gnat_rm/the_implementation_of_standard_i_o wide-wide-text-io}@anchor{2a5}
 @section Wide_Wide_Text_IO
 
 
@@ -21670,12 +21712,12 @@ input also causes Constraint_Error to be raised.
 @end menu
 
 @node Stream Pointer Positioning<3>,Reading and Writing Non-Regular Files<3>,,Wide_Wide_Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-2}@anchor{2a4}@anchor{gnat_rm/the_implementation_of_standard_i_o id17}@anchor{2a5}
+@anchor{gnat_rm/the_implementation_of_standard_i_o stream-pointer-positioning-2}@anchor{2a6}@anchor{gnat_rm/the_implementation_of_standard_i_o id17}@anchor{2a7}
 @subsection Stream Pointer Positioning
 
 
 @cite{Ada.Wide_Wide_Text_IO} is similar to @cite{Ada.Text_IO} in its handling
-of stream pointer positioning (@ref{28f,,Text_IO}).  There is one additional
+of stream pointer positioning (@ref{291,,Text_IO}).  There is one additional
 case:
 
 If @cite{Ada.Wide_Wide_Text_IO.Look_Ahead} reads a character outside the
@@ -21694,7 +21736,7 @@ to a normal program using @cite{Wide_Wide_Text_IO}.  However, this discrepancy
 can be observed if the wide text file shares a stream with another file.
 
 @node Reading and Writing Non-Regular Files<3>,,Stream Pointer Positioning<3>,Wide_Wide_Text_IO
-@anchor{gnat_rm/the_implementation_of_standard_i_o id18}@anchor{2a6}@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-2}@anchor{2a7}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id18}@anchor{2a8}@anchor{gnat_rm/the_implementation_of_standard_i_o reading-and-writing-non-regular-files-2}@anchor{2a9}
 @subsection Reading and Writing Non-Regular Files
 
 
@@ -21705,7 +21747,7 @@ treated as data characters), and @cite{End_Of_Page} always returns
 it is possible to read beyond an end of file.
 
 @node Stream_IO,Text Translation,Wide_Wide_Text_IO,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o id19}@anchor{2a8}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-io}@anchor{2a9}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id19}@anchor{2aa}@anchor{gnat_rm/the_implementation_of_standard_i_o stream-io}@anchor{2ab}
 @section Stream_IO
 
 
@@ -21727,7 +21769,7 @@ manner described for stream attributes.
 @end itemize
 
 @node Text Translation,Shared Files,Stream_IO,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o id20}@anchor{2aa}@anchor{gnat_rm/the_implementation_of_standard_i_o text-translation}@anchor{2ab}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id20}@anchor{2ac}@anchor{gnat_rm/the_implementation_of_standard_i_o text-translation}@anchor{2ad}
 @section Text Translation
 
 
@@ -21761,7 +21803,7 @@ mode. (corresponds to_O_U16TEXT).
 @end itemize
 
 @node Shared Files,Filenames encoding,Text Translation,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o id21}@anchor{2ac}@anchor{gnat_rm/the_implementation_of_standard_i_o shared-files}@anchor{2ad}
+@anchor{gnat_rm/the_implementation_of_standard_i_o id21}@anchor{2ae}@anchor{gnat_rm/the_implementation_of_standard_i_o shared-files}@anchor{2af}
 @section Shared Files
 
 
@@ -21824,7 +21866,7 @@ heterogeneous input-output.  Although this approach will work in GNAT if
 for this purpose (using the stream attributes)
 
 @node Filenames encoding,File content encoding,Shared Files,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o filenames-encoding}@anchor{2ae}@anchor{gnat_rm/the_implementation_of_standard_i_o id22}@anchor{2af}
+@anchor{gnat_rm/the_implementation_of_standard_i_o filenames-encoding}@anchor{2b0}@anchor{gnat_rm/the_implementation_of_standard_i_o id22}@anchor{2b1}
 @section Filenames encoding
 
 
@@ -21864,7 +21906,7 @@ platform. On the other Operating Systems the run-time is supporting
 UTF-8 natively.
 
 @node File content encoding,Open Modes,Filenames encoding,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o file-content-encoding}@anchor{2b0}@anchor{gnat_rm/the_implementation_of_standard_i_o id23}@anchor{2b1}
+@anchor{gnat_rm/the_implementation_of_standard_i_o file-content-encoding}@anchor{2b2}@anchor{gnat_rm/the_implementation_of_standard_i_o id23}@anchor{2b3}
 @section File content encoding
 
 
@@ -21897,7 +21939,7 @@ Unicode 8-bit encoding
 This encoding is only supported on the Windows platform.
 
 @node Open Modes,Operations on C Streams,File content encoding,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o open-modes}@anchor{2b2}@anchor{gnat_rm/the_implementation_of_standard_i_o id24}@anchor{2b3}
+@anchor{gnat_rm/the_implementation_of_standard_i_o open-modes}@anchor{2b4}@anchor{gnat_rm/the_implementation_of_standard_i_o id24}@anchor{2b5}
 @section Open Modes
 
 
@@ -22000,7 +22042,7 @@ subsequently requires switching from reading to writing or vice-versa,
 then the file is reopened in @code{r+} mode to permit the required operation.
 
 @node Operations on C Streams,Interfacing to C Streams,Open Modes,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o operations-on-c-streams}@anchor{2b4}@anchor{gnat_rm/the_implementation_of_standard_i_o id25}@anchor{2b5}
+@anchor{gnat_rm/the_implementation_of_standard_i_o operations-on-c-streams}@anchor{2b6}@anchor{gnat_rm/the_implementation_of_standard_i_o id25}@anchor{2b7}
 @section Operations on C Streams
 
 
@@ -22160,7 +22202,7 @@ end Interfaces.C_Streams;
 @end example
 
 @node Interfacing to C Streams,,Operations on C Streams,The Implementation of Standard I/O
-@anchor{gnat_rm/the_implementation_of_standard_i_o interfacing-to-c-streams}@anchor{2b6}@anchor{gnat_rm/the_implementation_of_standard_i_o id26}@anchor{2b7}
+@anchor{gnat_rm/the_implementation_of_standard_i_o interfacing-to-c-streams}@anchor{2b8}@anchor{gnat_rm/the_implementation_of_standard_i_o id26}@anchor{2b9}
 @section Interfacing to C Streams
 
 
@@ -22253,7 +22295,7 @@ imported from a C program, allowing an Ada file to operate on an
 existing C file.
 
 @node The GNAT Library,Interfacing to Other Languages,The Implementation of Standard I/O,Top
-@anchor{gnat_rm/the_gnat_library the-gnat-library}@anchor{10}@anchor{gnat_rm/the_gnat_library doc}@anchor{2b8}@anchor{gnat_rm/the_gnat_library id1}@anchor{2b9}
+@anchor{gnat_rm/the_gnat_library the-gnat-library}@anchor{10}@anchor{gnat_rm/the_gnat_library doc}@anchor{2ba}@anchor{gnat_rm/the_gnat_library id1}@anchor{2bb}
 @chapter The GNAT Library
 
 
@@ -22441,7 +22483,7 @@ of GNAT, and will generate a warning message.
 @end menu
 
 @node Ada Characters Latin_9 a-chlat9 ads,Ada Characters Wide_Latin_1 a-cwila1 ads,,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id2}@anchor{2ba}@anchor{gnat_rm/the_gnat_library ada-characters-latin-9-a-chlat9-ads}@anchor{2bb}
+@anchor{gnat_rm/the_gnat_library id2}@anchor{2bc}@anchor{gnat_rm/the_gnat_library ada-characters-latin-9-a-chlat9-ads}@anchor{2bd}
 @section @cite{Ada.Characters.Latin_9} (@code{a-chlat9.ads})
 
 
@@ -22458,7 +22500,7 @@ is specifically authorized by the Ada Reference Manual
 (RM A.3.3(27)).
 
 @node Ada Characters Wide_Latin_1 a-cwila1 ads,Ada Characters Wide_Latin_9 a-cwila1 ads,Ada Characters Latin_9 a-chlat9 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-1-a-cwila1-ads}@anchor{2bc}@anchor{gnat_rm/the_gnat_library id3}@anchor{2bd}
+@anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-1-a-cwila1-ads}@anchor{2be}@anchor{gnat_rm/the_gnat_library id3}@anchor{2bf}
 @section @cite{Ada.Characters.Wide_Latin_1} (@code{a-cwila1.ads})
 
 
@@ -22475,7 +22517,7 @@ is specifically authorized by the Ada Reference Manual
 (RM A.3.3(27)).
 
 @node Ada Characters Wide_Latin_9 a-cwila1 ads,Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,Ada Characters Wide_Latin_1 a-cwila1 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id4}@anchor{2be}@anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-9-a-cwila1-ads}@anchor{2bf}
+@anchor{gnat_rm/the_gnat_library id4}@anchor{2c0}@anchor{gnat_rm/the_gnat_library ada-characters-wide-latin-9-a-cwila1-ads}@anchor{2c1}
 @section @cite{Ada.Characters.Wide_Latin_9} (@code{a-cwila1.ads})
 
 
@@ -22492,7 +22534,7 @@ is specifically authorized by the Ada Reference Manual
 (RM A.3.3(27)).
 
 @node Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,Ada Characters Wide_Latin_9 a-cwila1 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-1-a-chzla1-ads}@anchor{2c0}@anchor{gnat_rm/the_gnat_library id5}@anchor{2c1}
+@anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-1-a-chzla1-ads}@anchor{2c2}@anchor{gnat_rm/the_gnat_library id5}@anchor{2c3}
 @section @cite{Ada.Characters.Wide_Wide_Latin_1} (@code{a-chzla1.ads})
 
 
@@ -22509,7 +22551,7 @@ is specifically authorized by the Ada Reference Manual
 (RM A.3.3(27)).
 
 @node Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,Ada Characters Wide_Wide_Latin_1 a-chzla1 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-9-a-chzla9-ads}@anchor{2c2}@anchor{gnat_rm/the_gnat_library id6}@anchor{2c3}
+@anchor{gnat_rm/the_gnat_library ada-characters-wide-wide-latin-9-a-chzla9-ads}@anchor{2c4}@anchor{gnat_rm/the_gnat_library id6}@anchor{2c5}
 @section @cite{Ada.Characters.Wide_Wide_Latin_9} (@code{a-chzla9.ads})
 
 
@@ -22526,7 +22568,7 @@ is specifically authorized by the Ada Reference Manual
 (RM A.3.3(27)).
 
 @node Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,Ada Containers Formal_Hashed_Maps a-cfhama ads,Ada Characters Wide_Wide_Latin_9 a-chzla9 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id7}@anchor{2c4}@anchor{gnat_rm/the_gnat_library ada-containers-formal-doubly-linked-lists-a-cfdlli-ads}@anchor{2c5}
+@anchor{gnat_rm/the_gnat_library id7}@anchor{2c6}@anchor{gnat_rm/the_gnat_library ada-containers-formal-doubly-linked-lists-a-cfdlli-ads}@anchor{2c7}
 @section @cite{Ada.Containers.Formal_Doubly_Linked_Lists} (@code{a-cfdlli.ads})
 
 
@@ -22545,7 +22587,7 @@ efficient version than the one defined in the standard. In particular it
 does not have the complex overhead required to detect cursor tampering.
 
 @node Ada Containers Formal_Hashed_Maps a-cfhama ads,Ada Containers Formal_Hashed_Sets a-cfhase ads,Ada Containers Formal_Doubly_Linked_Lists a-cfdlli ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id8}@anchor{2c6}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-maps-a-cfhama-ads}@anchor{2c7}
+@anchor{gnat_rm/the_gnat_library id8}@anchor{2c8}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-maps-a-cfhama-ads}@anchor{2c9}
 @section @cite{Ada.Containers.Formal_Hashed_Maps} (@code{a-cfhama.ads})
 
 
@@ -22564,7 +22606,7 @@ efficient version than the one defined in the standard. In particular it
 does not have the complex overhead required to detect cursor tampering.
 
 @node Ada Containers Formal_Hashed_Sets a-cfhase ads,Ada Containers Formal_Ordered_Maps a-cforma ads,Ada Containers Formal_Hashed_Maps a-cfhama ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id9}@anchor{2c8}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-sets-a-cfhase-ads}@anchor{2c9}
+@anchor{gnat_rm/the_gnat_library id9}@anchor{2ca}@anchor{gnat_rm/the_gnat_library ada-containers-formal-hashed-sets-a-cfhase-ads}@anchor{2cb}
 @section @cite{Ada.Containers.Formal_Hashed_Sets} (@code{a-cfhase.ads})
 
 
@@ -22583,7 +22625,7 @@ efficient version than the one defined in the standard. In particular it
 does not have the complex overhead required to detect cursor tampering.
 
 @node Ada Containers Formal_Ordered_Maps a-cforma ads,Ada Containers Formal_Ordered_Sets a-cforse ads,Ada Containers Formal_Hashed_Sets a-cfhase ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id10}@anchor{2ca}@anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-maps-a-cforma-ads}@anchor{2cb}
+@anchor{gnat_rm/the_gnat_library id10}@anchor{2cc}@anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-maps-a-cforma-ads}@anchor{2cd}
 @section @cite{Ada.Containers.Formal_Ordered_Maps} (@code{a-cforma.ads})
 
 
@@ -22602,7 +22644,7 @@ efficient version than the one defined in the standard. In particular it
 does not have the complex overhead required to detect cursor tampering.
 
 @node Ada Containers Formal_Ordered_Sets a-cforse ads,Ada Containers Formal_Vectors a-cofove ads,Ada Containers Formal_Ordered_Maps a-cforma ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-sets-a-cforse-ads}@anchor{2cc}@anchor{gnat_rm/the_gnat_library id11}@anchor{2cd}
+@anchor{gnat_rm/the_gnat_library ada-containers-formal-ordered-sets-a-cforse-ads}@anchor{2ce}@anchor{gnat_rm/the_gnat_library id11}@anchor{2cf}
 @section @cite{Ada.Containers.Formal_Ordered_Sets} (@code{a-cforse.ads})
 
 
@@ -22621,7 +22663,7 @@ efficient version than the one defined in the standard. In particular it
 does not have the complex overhead required to detect cursor tampering.
 
 @node Ada Containers Formal_Vectors a-cofove ads,Ada Containers Formal_Indefinite_Vectors a-cfinve ads,Ada Containers Formal_Ordered_Sets a-cforse ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id12}@anchor{2ce}@anchor{gnat_rm/the_gnat_library ada-containers-formal-vectors-a-cofove-ads}@anchor{2cf}
+@anchor{gnat_rm/the_gnat_library id12}@anchor{2d0}@anchor{gnat_rm/the_gnat_library ada-containers-formal-vectors-a-cofove-ads}@anchor{2d1}
 @section @cite{Ada.Containers.Formal_Vectors} (@code{a-cofove.ads})
 
 
@@ -22640,7 +22682,7 @@ efficient version than the one defined in the standard. In particular it
 does not have the complex overhead required to detect cursor tampering.
 
 @node Ada Containers Formal_Indefinite_Vectors a-cfinve ads,Ada Containers Bounded_Holders a-coboho ads,Ada Containers Formal_Vectors a-cofove ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id13}@anchor{2d0}@anchor{gnat_rm/the_gnat_library ada-containers-formal-indefinite-vectors-a-cfinve-ads}@anchor{2d1}
+@anchor{gnat_rm/the_gnat_library id13}@anchor{2d2}@anchor{gnat_rm/the_gnat_library ada-containers-formal-indefinite-vectors-a-cfinve-ads}@anchor{2d3}
 @section @cite{Ada.Containers.Formal_Indefinite_Vectors} (@code{a-cfinve.ads})
 
 
@@ -22659,7 +22701,7 @@ efficient version than the one defined in the standard. In particular it
 does not have the complex overhead required to detect cursor tampering.
 
 @node Ada Containers Bounded_Holders a-coboho ads,Ada Command_Line Environment a-colien ads,Ada Containers Formal_Indefinite_Vectors a-cfinve ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id14}@anchor{2d2}@anchor{gnat_rm/the_gnat_library ada-containers-bounded-holders-a-coboho-ads}@anchor{2d3}
+@anchor{gnat_rm/the_gnat_library id14}@anchor{2d4}@anchor{gnat_rm/the_gnat_library ada-containers-bounded-holders-a-coboho-ads}@anchor{2d5}
 @section @cite{Ada.Containers.Bounded_Holders} (@code{a-coboho.ads})
 
 
@@ -22671,7 +22713,7 @@ This child of @cite{Ada.Containers} defines a modified version of
 Indefinite_Holders that avoids heap allocation.
 
 @node Ada Command_Line Environment a-colien ads,Ada Command_Line Remove a-colire ads,Ada Containers Bounded_Holders a-coboho ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-command-line-environment-a-colien-ads}@anchor{2d4}@anchor{gnat_rm/the_gnat_library id15}@anchor{2d5}
+@anchor{gnat_rm/the_gnat_library ada-command-line-environment-a-colien-ads}@anchor{2d6}@anchor{gnat_rm/the_gnat_library id15}@anchor{2d7}
 @section @cite{Ada.Command_Line.Environment} (@code{a-colien.ads})
 
 
@@ -22684,7 +22726,7 @@ provides a mechanism for obtaining environment values on systems
 where this concept makes sense.
 
 @node Ada Command_Line Remove a-colire ads,Ada Command_Line Response_File a-clrefi ads,Ada Command_Line Environment a-colien ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id16}@anchor{2d6}@anchor{gnat_rm/the_gnat_library ada-command-line-remove-a-colire-ads}@anchor{2d7}
+@anchor{gnat_rm/the_gnat_library id16}@anchor{2d8}@anchor{gnat_rm/the_gnat_library ada-command-line-remove-a-colire-ads}@anchor{2d9}
 @section @cite{Ada.Command_Line.Remove} (@code{a-colire.ads})
 
 
@@ -22702,7 +22744,7 @@ to further calls on the subprograms in @cite{Ada.Command_Line} will not
 see the removed argument.
 
 @node Ada Command_Line Response_File a-clrefi ads,Ada Direct_IO C_Streams a-diocst ads,Ada Command_Line Remove a-colire ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-command-line-response-file-a-clrefi-ads}@anchor{2d8}@anchor{gnat_rm/the_gnat_library id17}@anchor{2d9}
+@anchor{gnat_rm/the_gnat_library ada-command-line-response-file-a-clrefi-ads}@anchor{2da}@anchor{gnat_rm/the_gnat_library id17}@anchor{2db}
 @section @cite{Ada.Command_Line.Response_File} (@code{a-clrefi.ads})
 
 
@@ -22722,7 +22764,7 @@ Using a response file allow passing a set of arguments to an executable longer
 than the maximum allowed by the system on the command line.
 
 @node Ada Direct_IO C_Streams a-diocst ads,Ada Exceptions Is_Null_Occurrence a-einuoc ads,Ada Command_Line Response_File a-clrefi ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id18}@anchor{2da}@anchor{gnat_rm/the_gnat_library ada-direct-io-c-streams-a-diocst-ads}@anchor{2db}
+@anchor{gnat_rm/the_gnat_library id18}@anchor{2dc}@anchor{gnat_rm/the_gnat_library ada-direct-io-c-streams-a-diocst-ads}@anchor{2dd}
 @section @cite{Ada.Direct_IO.C_Streams} (@code{a-diocst.ads})
 
 
@@ -22737,7 +22779,7 @@ extracted from a file opened on the Ada side, and an Ada file
 can be constructed from a stream opened on the C side.
 
 @node Ada Exceptions Is_Null_Occurrence a-einuoc ads,Ada Exceptions Last_Chance_Handler a-elchha ads,Ada Direct_IO C_Streams a-diocst ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id19}@anchor{2dc}@anchor{gnat_rm/the_gnat_library ada-exceptions-is-null-occurrence-a-einuoc-ads}@anchor{2dd}
+@anchor{gnat_rm/the_gnat_library id19}@anchor{2de}@anchor{gnat_rm/the_gnat_library ada-exceptions-is-null-occurrence-a-einuoc-ads}@anchor{2df}
 @section @cite{Ada.Exceptions.Is_Null_Occurrence} (@code{a-einuoc.ads})
 
 
@@ -22751,7 +22793,7 @@ exception occurrence (@cite{Null_Occurrence}) without raising
 an exception.
 
 @node Ada Exceptions Last_Chance_Handler a-elchha ads,Ada Exceptions Traceback a-exctra ads,Ada Exceptions Is_Null_Occurrence a-einuoc ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id20}@anchor{2de}@anchor{gnat_rm/the_gnat_library ada-exceptions-last-chance-handler-a-elchha-ads}@anchor{2df}
+@anchor{gnat_rm/the_gnat_library id20}@anchor{2e0}@anchor{gnat_rm/the_gnat_library ada-exceptions-last-chance-handler-a-elchha-ads}@anchor{2e1}
 @section @cite{Ada.Exceptions.Last_Chance_Handler} (@code{a-elchha.ads})
 
 
@@ -22765,7 +22807,7 @@ exceptions (hence the name last chance), and perform clean ups before
 terminating the program. Note that this subprogram never returns.
 
 @node Ada Exceptions Traceback a-exctra ads,Ada Sequential_IO C_Streams a-siocst ads,Ada Exceptions Last_Chance_Handler a-elchha ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-exceptions-traceback-a-exctra-ads}@anchor{2e0}@anchor{gnat_rm/the_gnat_library id21}@anchor{2e1}
+@anchor{gnat_rm/the_gnat_library ada-exceptions-traceback-a-exctra-ads}@anchor{2e2}@anchor{gnat_rm/the_gnat_library id21}@anchor{2e3}
 @section @cite{Ada.Exceptions.Traceback} (@code{a-exctra.ads})
 
 
@@ -22778,7 +22820,7 @@ give a traceback array of addresses based on an exception
 occurrence.
 
 @node Ada Sequential_IO C_Streams a-siocst ads,Ada Streams Stream_IO C_Streams a-ssicst ads,Ada Exceptions Traceback a-exctra ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-sequential-io-c-streams-a-siocst-ads}@anchor{2e2}@anchor{gnat_rm/the_gnat_library id22}@anchor{2e3}
+@anchor{gnat_rm/the_gnat_library ada-sequential-io-c-streams-a-siocst-ads}@anchor{2e4}@anchor{gnat_rm/the_gnat_library id22}@anchor{2e5}
 @section @cite{Ada.Sequential_IO.C_Streams} (@code{a-siocst.ads})
 
 
@@ -22793,7 +22835,7 @@ extracted from a file opened on the Ada side, and an Ada file
 can be constructed from a stream opened on the C side.
 
 @node Ada Streams Stream_IO C_Streams a-ssicst ads,Ada Strings Unbounded Text_IO a-suteio ads,Ada Sequential_IO C_Streams a-siocst ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id23}@anchor{2e4}@anchor{gnat_rm/the_gnat_library ada-streams-stream-io-c-streams-a-ssicst-ads}@anchor{2e5}
+@anchor{gnat_rm/the_gnat_library id23}@anchor{2e6}@anchor{gnat_rm/the_gnat_library ada-streams-stream-io-c-streams-a-ssicst-ads}@anchor{2e7}
 @section @cite{Ada.Streams.Stream_IO.C_Streams} (@code{a-ssicst.ads})
 
 
@@ -22808,7 +22850,7 @@ extracted from a file opened on the Ada side, and an Ada file
 can be constructed from a stream opened on the C side.
 
 @node Ada Strings Unbounded Text_IO a-suteio ads,Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,Ada Streams Stream_IO C_Streams a-ssicst ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-strings-unbounded-text-io-a-suteio-ads}@anchor{2e6}@anchor{gnat_rm/the_gnat_library id24}@anchor{2e7}
+@anchor{gnat_rm/the_gnat_library ada-strings-unbounded-text-io-a-suteio-ads}@anchor{2e8}@anchor{gnat_rm/the_gnat_library id24}@anchor{2e9}
 @section @cite{Ada.Strings.Unbounded.Text_IO} (@code{a-suteio.ads})
 
 
@@ -22825,7 +22867,7 @@ strings, avoiding the necessity for an intermediate operation
 with ordinary strings.
 
 @node Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,Ada Strings Unbounded Text_IO a-suteio ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id25}@anchor{2e8}@anchor{gnat_rm/the_gnat_library ada-strings-wide-unbounded-wide-text-io-a-swuwti-ads}@anchor{2e9}
+@anchor{gnat_rm/the_gnat_library id25}@anchor{2ea}@anchor{gnat_rm/the_gnat_library ada-strings-wide-unbounded-wide-text-io-a-swuwti-ads}@anchor{2eb}
 @section @cite{Ada.Strings.Wide_Unbounded.Wide_Text_IO} (@code{a-swuwti.ads})
 
 
@@ -22842,7 +22884,7 @@ wide strings, avoiding the necessity for an intermediate operation
 with ordinary wide strings.
 
 @node Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,Ada Text_IO C_Streams a-tiocst ads,Ada Strings Wide_Unbounded Wide_Text_IO a-swuwti ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-strings-wide-wide-unbounded-wide-wide-text-io-a-szuzti-ads}@anchor{2ea}@anchor{gnat_rm/the_gnat_library id26}@anchor{2eb}
+@anchor{gnat_rm/the_gnat_library ada-strings-wide-wide-unbounded-wide-wide-text-io-a-szuzti-ads}@anchor{2ec}@anchor{gnat_rm/the_gnat_library id26}@anchor{2ed}
 @section @cite{Ada.Strings.Wide_Wide_Unbounded.Wide_Wide_Text_IO} (@code{a-szuzti.ads})
 
 
@@ -22859,7 +22901,7 @@ wide wide strings, avoiding the necessity for an intermediate operation
 with ordinary wide wide strings.
 
 @node Ada Text_IO C_Streams a-tiocst ads,Ada Text_IO Reset_Standard_Files a-tirsfi ads,Ada Strings Wide_Wide_Unbounded Wide_Wide_Text_IO a-szuzti ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-text-io-c-streams-a-tiocst-ads}@anchor{2ec}@anchor{gnat_rm/the_gnat_library id27}@anchor{2ed}
+@anchor{gnat_rm/the_gnat_library ada-text-io-c-streams-a-tiocst-ads}@anchor{2ee}@anchor{gnat_rm/the_gnat_library id27}@anchor{2ef}
 @section @cite{Ada.Text_IO.C_Streams} (@code{a-tiocst.ads})
 
 
@@ -22874,7 +22916,7 @@ extracted from a file opened on the Ada side, and an Ada file
 can be constructed from a stream opened on the C side.
 
 @node Ada Text_IO Reset_Standard_Files a-tirsfi ads,Ada Wide_Characters Unicode a-wichun ads,Ada Text_IO C_Streams a-tiocst ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id28}@anchor{2ee}@anchor{gnat_rm/the_gnat_library ada-text-io-reset-standard-files-a-tirsfi-ads}@anchor{2ef}
+@anchor{gnat_rm/the_gnat_library id28}@anchor{2f0}@anchor{gnat_rm/the_gnat_library ada-text-io-reset-standard-files-a-tirsfi-ads}@anchor{2f1}
 @section @cite{Ada.Text_IO.Reset_Standard_Files} (@code{a-tirsfi.ads})
 
 
@@ -22889,7 +22931,7 @@ execution (for example a standard input file may be redefined to be
 interactive).
 
 @node Ada Wide_Characters Unicode a-wichun ads,Ada Wide_Text_IO C_Streams a-wtcstr ads,Ada Text_IO Reset_Standard_Files a-tirsfi ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id29}@anchor{2f0}@anchor{gnat_rm/the_gnat_library ada-wide-characters-unicode-a-wichun-ads}@anchor{2f1}
+@anchor{gnat_rm/the_gnat_library id29}@anchor{2f2}@anchor{gnat_rm/the_gnat_library ada-wide-characters-unicode-a-wichun-ads}@anchor{2f3}
 @section @cite{Ada.Wide_Characters.Unicode} (@code{a-wichun.ads})
 
 
@@ -22902,7 +22944,7 @@ This package provides subprograms that allow categorization of
 Wide_Character values according to Unicode categories.
 
 @node Ada Wide_Text_IO C_Streams a-wtcstr ads,Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,Ada Wide_Characters Unicode a-wichun ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-wide-text-io-c-streams-a-wtcstr-ads}@anchor{2f2}@anchor{gnat_rm/the_gnat_library id30}@anchor{2f3}
+@anchor{gnat_rm/the_gnat_library ada-wide-text-io-c-streams-a-wtcstr-ads}@anchor{2f4}@anchor{gnat_rm/the_gnat_library id30}@anchor{2f5}
 @section @cite{Ada.Wide_Text_IO.C_Streams} (@code{a-wtcstr.ads})
 
 
@@ -22917,7 +22959,7 @@ extracted from a file opened on the Ada side, and an Ada file
 can be constructed from a stream opened on the C side.
 
 @node Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,Ada Wide_Wide_Characters Unicode a-zchuni ads,Ada Wide_Text_IO C_Streams a-wtcstr ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library ada-wide-text-io-reset-standard-files-a-wrstfi-ads}@anchor{2f4}@anchor{gnat_rm/the_gnat_library id31}@anchor{2f5}
+@anchor{gnat_rm/the_gnat_library ada-wide-text-io-reset-standard-files-a-wrstfi-ads}@anchor{2f6}@anchor{gnat_rm/the_gnat_library id31}@anchor{2f7}
 @section @cite{Ada.Wide_Text_IO.Reset_Standard_Files} (@code{a-wrstfi.ads})
 
 
@@ -22932,7 +22974,7 @@ execution (for example a standard input file may be redefined to be
 interactive).
 
 @node Ada Wide_Wide_Characters Unicode a-zchuni ads,Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,Ada Wide_Text_IO Reset_Standard_Files a-wrstfi ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id32}@anchor{2f6}@anchor{gnat_rm/the_gnat_library ada-wide-wide-characters-unicode-a-zchuni-ads}@anchor{2f7}
+@anchor{gnat_rm/the_gnat_library id32}@anchor{2f8}@anchor{gnat_rm/the_gnat_library ada-wide-wide-characters-unicode-a-zchuni-ads}@anchor{2f9}
 @section @cite{Ada.Wide_Wide_Characters.Unicode} (@code{a-zchuni.ads})
 
 
@@ -22945,7 +22987,7 @@ This package provides subprograms that allow categorization of
 Wide_Wide_Character values according to Unicode categories.
 
 @node Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,Ada Wide_Wide_Characters Unicode a-zchuni ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id33}@anchor{2f8}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-c-streams-a-ztcstr-ads}@anchor{2f9}
+@anchor{gnat_rm/the_gnat_library id33}@anchor{2fa}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-c-streams-a-ztcstr-ads}@anchor{2fb}
 @section @cite{Ada.Wide_Wide_Text_IO.C_Streams} (@code{a-ztcstr.ads})
 
 
@@ -22960,7 +23002,7 @@ extracted from a file opened on the Ada side, and an Ada file
 can be constructed from a stream opened on the C side.
 
 @node Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,GNAT Altivec g-altive ads,Ada Wide_Wide_Text_IO C_Streams a-ztcstr ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id34}@anchor{2fa}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-reset-standard-files-a-zrstfi-ads}@anchor{2fb}
+@anchor{gnat_rm/the_gnat_library id34}@anchor{2fc}@anchor{gnat_rm/the_gnat_library ada-wide-wide-text-io-reset-standard-files-a-zrstfi-ads}@anchor{2fd}
 @section @cite{Ada.Wide_Wide_Text_IO.Reset_Standard_Files} (@code{a-zrstfi.ads})
 
 
@@ -22975,7 +23017,7 @@ change during execution (for example a standard input file may be
 redefined to be interactive).
 
 @node GNAT Altivec g-altive ads,GNAT Altivec Conversions g-altcon ads,Ada Wide_Wide_Text_IO Reset_Standard_Files a-zrstfi ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-altivec-g-altive-ads}@anchor{2fc}@anchor{gnat_rm/the_gnat_library id35}@anchor{2fd}
+@anchor{gnat_rm/the_gnat_library gnat-altivec-g-altive-ads}@anchor{2fe}@anchor{gnat_rm/the_gnat_library id35}@anchor{2ff}
 @section @cite{GNAT.Altivec} (@code{g-altive.ads})
 
 
@@ -22988,7 +23030,7 @@ definitions of constants and types common to all the versions of the
 binding.
 
 @node GNAT Altivec Conversions g-altcon ads,GNAT Altivec Vector_Operations g-alveop ads,GNAT Altivec g-altive ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id36}@anchor{2fe}@anchor{gnat_rm/the_gnat_library gnat-altivec-conversions-g-altcon-ads}@anchor{2ff}
+@anchor{gnat_rm/the_gnat_library id36}@anchor{300}@anchor{gnat_rm/the_gnat_library gnat-altivec-conversions-g-altcon-ads}@anchor{301}
 @section @cite{GNAT.Altivec.Conversions} (@code{g-altcon.ads})
 
 
@@ -22999,7 +23041,7 @@ binding.
 This package provides the Vector/View conversion routines.
 
 @node GNAT Altivec Vector_Operations g-alveop ads,GNAT Altivec Vector_Types g-alvety ads,GNAT Altivec Conversions g-altcon ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id37}@anchor{300}@anchor{gnat_rm/the_gnat_library gnat-altivec-vector-operations-g-alveop-ads}@anchor{301}
+@anchor{gnat_rm/the_gnat_library id37}@anchor{302}@anchor{gnat_rm/the_gnat_library gnat-altivec-vector-operations-g-alveop-ads}@anchor{303}
 @section @cite{GNAT.Altivec.Vector_Operations} (@code{g-alveop.ads})
 
 
@@ -23013,7 +23055,7 @@ library. The hard binding is provided as a separate package. This unit
 is common to both bindings.
 
 @node GNAT Altivec Vector_Types g-alvety ads,GNAT Altivec Vector_Views g-alvevi ads,GNAT Altivec Vector_Operations g-alveop ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-altivec-vector-types-g-alvety-ads}@anchor{302}@anchor{gnat_rm/the_gnat_library id38}@anchor{303}
+@anchor{gnat_rm/the_gnat_library gnat-altivec-vector-types-g-alvety-ads}@anchor{304}@anchor{gnat_rm/the_gnat_library id38}@anchor{305}
 @section @cite{GNAT.Altivec.Vector_Types} (@code{g-alvety.ads})
 
 
@@ -23025,7 +23067,7 @@ This package exposes the various vector types part of the Ada binding
 to AltiVec facilities.
 
 @node GNAT Altivec Vector_Views g-alvevi ads,GNAT Array_Split g-arrspl ads,GNAT Altivec Vector_Types g-alvety ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-altivec-vector-views-g-alvevi-ads}@anchor{304}@anchor{gnat_rm/the_gnat_library id39}@anchor{305}
+@anchor{gnat_rm/the_gnat_library gnat-altivec-vector-views-g-alvevi-ads}@anchor{306}@anchor{gnat_rm/the_gnat_library id39}@anchor{307}
 @section @cite{GNAT.Altivec.Vector_Views} (@code{g-alvevi.ads})
 
 
@@ -23040,7 +23082,7 @@ vector elements and provides a simple way to initialize vector
 objects.
 
 @node GNAT Array_Split g-arrspl ads,GNAT AWK g-awk ads,GNAT Altivec Vector_Views g-alvevi ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-array-split-g-arrspl-ads}@anchor{306}@anchor{gnat_rm/the_gnat_library id40}@anchor{307}
+@anchor{gnat_rm/the_gnat_library gnat-array-split-g-arrspl-ads}@anchor{308}@anchor{gnat_rm/the_gnat_library id40}@anchor{309}
 @section @cite{GNAT.Array_Split} (@code{g-arrspl.ads})
 
 
@@ -23053,7 +23095,7 @@ an array wherever the separators appear, and provide direct access
 to the resulting slices.
 
 @node GNAT AWK g-awk ads,GNAT Bind_Environment g-binenv ads,GNAT Array_Split g-arrspl ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id41}@anchor{308}@anchor{gnat_rm/the_gnat_library gnat-awk-g-awk-ads}@anchor{309}
+@anchor{gnat_rm/the_gnat_library id41}@anchor{30a}@anchor{gnat_rm/the_gnat_library gnat-awk-g-awk-ads}@anchor{30b}
 @section @cite{GNAT.AWK} (@code{g-awk.ads})
 
 
@@ -23068,7 +23110,7 @@ or more files containing formatted data.  The file is viewed as a database
 where each record is a line and a field is a data element in this line.
 
 @node GNAT Bind_Environment g-binenv ads,GNAT Bounded_Buffers g-boubuf ads,GNAT AWK g-awk ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-bind-environment-g-binenv-ads}@anchor{30a}@anchor{gnat_rm/the_gnat_library id42}@anchor{30b}
+@anchor{gnat_rm/the_gnat_library gnat-bind-environment-g-binenv-ads}@anchor{30c}@anchor{gnat_rm/the_gnat_library id42}@anchor{30d}
 @section @cite{GNAT.Bind_Environment} (@code{g-binenv.ads})
 
 
@@ -23081,7 +23123,7 @@ These associations can be specified using the @cite{-V} binder command
 line switch.
 
 @node GNAT Bounded_Buffers g-boubuf ads,GNAT Bounded_Mailboxes g-boumai ads,GNAT Bind_Environment g-binenv ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-bounded-buffers-g-boubuf-ads}@anchor{30c}@anchor{gnat_rm/the_gnat_library id43}@anchor{30d}
+@anchor{gnat_rm/the_gnat_library gnat-bounded-buffers-g-boubuf-ads}@anchor{30e}@anchor{gnat_rm/the_gnat_library id43}@anchor{30f}
 @section @cite{GNAT.Bounded_Buffers} (@code{g-boubuf.ads})
 
 
@@ -23096,7 +23138,7 @@ useful directly or as parts of the implementations of other abstractions,
 such as mailboxes.
 
 @node GNAT Bounded_Mailboxes g-boumai ads,GNAT Bubble_Sort g-bubsor ads,GNAT Bounded_Buffers g-boubuf ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id44}@anchor{30e}@anchor{gnat_rm/the_gnat_library gnat-bounded-mailboxes-g-boumai-ads}@anchor{30f}
+@anchor{gnat_rm/the_gnat_library id44}@anchor{310}@anchor{gnat_rm/the_gnat_library gnat-bounded-mailboxes-g-boumai-ads}@anchor{311}
 @section @cite{GNAT.Bounded_Mailboxes} (@code{g-boumai.ads})
 
 
@@ -23109,7 +23151,7 @@ such as mailboxes.
 Provides a thread-safe asynchronous intertask mailbox communication facility.
 
 @node GNAT Bubble_Sort g-bubsor ads,GNAT Bubble_Sort_A g-busora ads,GNAT Bounded_Mailboxes g-boumai ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-bubsor-ads}@anchor{310}@anchor{gnat_rm/the_gnat_library id45}@anchor{311}
+@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-bubsor-ads}@anchor{312}@anchor{gnat_rm/the_gnat_library id45}@anchor{313}
 @section @cite{GNAT.Bubble_Sort} (@code{g-bubsor.ads})
 
 
@@ -23124,7 +23166,7 @@ data items.  Exchange and comparison procedures are provided by passing
 access-to-procedure values.
 
 @node GNAT Bubble_Sort_A g-busora ads,GNAT Bubble_Sort_G g-busorg ads,GNAT Bubble_Sort g-bubsor ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id46}@anchor{312}@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-a-g-busora-ads}@anchor{313}
+@anchor{gnat_rm/the_gnat_library id46}@anchor{314}@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-a-g-busora-ads}@anchor{315}
 @section @cite{GNAT.Bubble_Sort_A} (@code{g-busora.ads})
 
 
@@ -23140,7 +23182,7 @@ access-to-procedure values. This is an older version, retained for
 compatibility. Usually @cite{GNAT.Bubble_Sort} will be preferable.
 
 @node GNAT Bubble_Sort_G g-busorg ads,GNAT Byte_Order_Mark g-byorma ads,GNAT Bubble_Sort_A g-busora ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id47}@anchor{314}@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-g-busorg-ads}@anchor{315}
+@anchor{gnat_rm/the_gnat_library id47}@anchor{316}@anchor{gnat_rm/the_gnat_library gnat-bubble-sort-g-g-busorg-ads}@anchor{317}
 @section @cite{GNAT.Bubble_Sort_G} (@code{g-busorg.ads})
 
 
@@ -23156,7 +23198,7 @@ if the procedures can be inlined, at the expense of duplicating code for
 multiple instantiations.
 
 @node GNAT Byte_Order_Mark g-byorma ads,GNAT Byte_Swapping g-bytswa ads,GNAT Bubble_Sort_G g-busorg ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-byte-order-mark-g-byorma-ads}@anchor{316}@anchor{gnat_rm/the_gnat_library id48}@anchor{317}
+@anchor{gnat_rm/the_gnat_library gnat-byte-order-mark-g-byorma-ads}@anchor{318}@anchor{gnat_rm/the_gnat_library id48}@anchor{319}
 @section @cite{GNAT.Byte_Order_Mark} (@code{g-byorma.ads})
 
 
@@ -23172,7 +23214,7 @@ the encoding of the string. The routine includes detection of special XML
 sequences for various UCS input formats.
 
 @node GNAT Byte_Swapping g-bytswa ads,GNAT Calendar g-calend ads,GNAT Byte_Order_Mark g-byorma ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-byte-swapping-g-bytswa-ads}@anchor{318}@anchor{gnat_rm/the_gnat_library id49}@anchor{319}
+@anchor{gnat_rm/the_gnat_library gnat-byte-swapping-g-bytswa-ads}@anchor{31a}@anchor{gnat_rm/the_gnat_library id49}@anchor{31b}
 @section @cite{GNAT.Byte_Swapping} (@code{g-bytswa.ads})
 
 
@@ -23186,7 +23228,7 @@ General routines for swapping the bytes in 2-, 4-, and 8-byte quantities.
 Machine-specific implementations are available in some cases.
 
 @node GNAT Calendar g-calend ads,GNAT Calendar Time_IO g-catiio ads,GNAT Byte_Swapping g-bytswa ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id50}@anchor{31a}@anchor{gnat_rm/the_gnat_library gnat-calendar-g-calend-ads}@anchor{31b}
+@anchor{gnat_rm/the_gnat_library id50}@anchor{31c}@anchor{gnat_rm/the_gnat_library gnat-calendar-g-calend-ads}@anchor{31d}
 @section @cite{GNAT.Calendar} (@code{g-calend.ads})
 
 
@@ -23200,7 +23242,7 @@ Also provides conversion of @cite{Ada.Calendar.Time} values to and from the
 C @cite{timeval} format.
 
 @node GNAT Calendar Time_IO g-catiio ads,GNAT CRC32 g-crc32 ads,GNAT Calendar g-calend ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-calendar-time-io-g-catiio-ads}@anchor{31c}@anchor{gnat_rm/the_gnat_library id51}@anchor{31d}
+@anchor{gnat_rm/the_gnat_library gnat-calendar-time-io-g-catiio-ads}@anchor{31e}@anchor{gnat_rm/the_gnat_library id51}@anchor{31f}
 @section @cite{GNAT.Calendar.Time_IO} (@code{g-catiio.ads})
 
 
@@ -23211,7 +23253,7 @@ C @cite{timeval} format.
 @geindex GNAT.Calendar.Time_IO (g-catiio.ads)
 
 @node GNAT CRC32 g-crc32 ads,GNAT Case_Util g-casuti ads,GNAT Calendar Time_IO g-catiio ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id52}@anchor{31e}@anchor{gnat_rm/the_gnat_library gnat-crc32-g-crc32-ads}@anchor{31f}
+@anchor{gnat_rm/the_gnat_library id52}@anchor{320}@anchor{gnat_rm/the_gnat_library gnat-crc32-g-crc32-ads}@anchor{321}
 @section @cite{GNAT.CRC32} (@code{g-crc32.ads})
 
 
@@ -23228,7 +23270,7 @@ of this algorithm see
 Aug. 1988.  Sarwate, D.V.
 
 @node GNAT Case_Util g-casuti ads,GNAT CGI g-cgi ads,GNAT CRC32 g-crc32 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-case-util-g-casuti-ads}@anchor{320}@anchor{gnat_rm/the_gnat_library id53}@anchor{321}
+@anchor{gnat_rm/the_gnat_library gnat-case-util-g-casuti-ads}@anchor{322}@anchor{gnat_rm/the_gnat_library id53}@anchor{323}
 @section @cite{GNAT.Case_Util} (@code{g-casuti.ads})
 
 
@@ -23243,7 +23285,7 @@ without the overhead of the full casing tables
 in @cite{Ada.Characters.Handling}.
 
 @node GNAT CGI g-cgi ads,GNAT CGI Cookie g-cgicoo ads,GNAT Case_Util g-casuti ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id54}@anchor{322}@anchor{gnat_rm/the_gnat_library gnat-cgi-g-cgi-ads}@anchor{323}
+@anchor{gnat_rm/the_gnat_library id54}@anchor{324}@anchor{gnat_rm/the_gnat_library gnat-cgi-g-cgi-ads}@anchor{325}
 @section @cite{GNAT.CGI} (@code{g-cgi.ads})
 
 
@@ -23258,7 +23300,7 @@ builds a table whose index is the key and provides some services to deal
 with this table.
 
 @node GNAT CGI Cookie g-cgicoo ads,GNAT CGI Debug g-cgideb ads,GNAT CGI g-cgi ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-cgi-cookie-g-cgicoo-ads}@anchor{324}@anchor{gnat_rm/the_gnat_library id55}@anchor{325}
+@anchor{gnat_rm/the_gnat_library gnat-cgi-cookie-g-cgicoo-ads}@anchor{326}@anchor{gnat_rm/the_gnat_library id55}@anchor{327}
 @section @cite{GNAT.CGI.Cookie} (@code{g-cgicoo.ads})
 
 
@@ -23273,7 +23315,7 @@ Common Gateway Interface (CGI).  It exports services to deal with Web
 cookies (piece of information kept in the Web client software).
 
 @node GNAT CGI Debug g-cgideb ads,GNAT Command_Line g-comlin ads,GNAT CGI Cookie g-cgicoo ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-cgi-debug-g-cgideb-ads}@anchor{326}@anchor{gnat_rm/the_gnat_library id56}@anchor{327}
+@anchor{gnat_rm/the_gnat_library gnat-cgi-debug-g-cgideb-ads}@anchor{328}@anchor{gnat_rm/the_gnat_library id56}@anchor{329}
 @section @cite{GNAT.CGI.Debug} (@code{g-cgideb.ads})
 
 
@@ -23285,7 +23327,7 @@ This is a package to help debugging CGI (Common Gateway Interface)
 programs written in Ada.
 
 @node GNAT Command_Line g-comlin ads,GNAT Compiler_Version g-comver ads,GNAT CGI Debug g-cgideb ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id57}@anchor{328}@anchor{gnat_rm/the_gnat_library gnat-command-line-g-comlin-ads}@anchor{329}
+@anchor{gnat_rm/the_gnat_library id57}@anchor{32a}@anchor{gnat_rm/the_gnat_library gnat-command-line-g-comlin-ads}@anchor{32b}
 @section @cite{GNAT.Command_Line} (@code{g-comlin.ads})
 
 
@@ -23298,7 +23340,7 @@ including the ability to scan for named switches with optional parameters
 and expand file names using wild card notations.
 
 @node GNAT Compiler_Version g-comver ads,GNAT Ctrl_C g-ctrl_c ads,GNAT Command_Line g-comlin ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-compiler-version-g-comver-ads}@anchor{32a}@anchor{gnat_rm/the_gnat_library id58}@anchor{32b}
+@anchor{gnat_rm/the_gnat_library gnat-compiler-version-g-comver-ads}@anchor{32c}@anchor{gnat_rm/the_gnat_library id58}@anchor{32d}
 @section @cite{GNAT.Compiler_Version} (@code{g-comver.ads})
 
 
@@ -23316,7 +23358,7 @@ of the compiler if a consistent tool set is used to compile all units
 of a partition).
 
 @node GNAT Ctrl_C g-ctrl_c ads,GNAT Current_Exception g-curexc ads,GNAT Compiler_Version g-comver ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-ctrl-c-g-ctrl-c-ads}@anchor{32c}@anchor{gnat_rm/the_gnat_library id59}@anchor{32d}
+@anchor{gnat_rm/the_gnat_library gnat-ctrl-c-g-ctrl-c-ads}@anchor{32e}@anchor{gnat_rm/the_gnat_library id59}@anchor{32f}
 @section @cite{GNAT.Ctrl_C} (@code{g-ctrl_c.ads})
 
 
@@ -23327,7 +23369,7 @@ of a partition).
 Provides a simple interface to handle Ctrl-C keyboard events.
 
 @node GNAT Current_Exception g-curexc ads,GNAT Debug_Pools g-debpoo ads,GNAT Ctrl_C g-ctrl_c ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id60}@anchor{32e}@anchor{gnat_rm/the_gnat_library gnat-current-exception-g-curexc-ads}@anchor{32f}
+@anchor{gnat_rm/the_gnat_library id60}@anchor{330}@anchor{gnat_rm/the_gnat_library gnat-current-exception-g-curexc-ads}@anchor{331}
 @section @cite{GNAT.Current_Exception} (@code{g-curexc.ads})
 
 
@@ -23344,7 +23386,7 @@ This is particularly useful in simulating typical facilities for
 obtaining information about exceptions provided by Ada 83 compilers.
 
 @node GNAT Debug_Pools g-debpoo ads,GNAT Debug_Utilities g-debuti ads,GNAT Current_Exception g-curexc ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-debug-pools-g-debpoo-ads}@anchor{330}@anchor{gnat_rm/the_gnat_library id61}@anchor{331}
+@anchor{gnat_rm/the_gnat_library gnat-debug-pools-g-debpoo-ads}@anchor{332}@anchor{gnat_rm/the_gnat_library id61}@anchor{333}
 @section @cite{GNAT.Debug_Pools} (@code{g-debpoo.ads})
 
 
@@ -23361,7 +23403,7 @@ problems.
 See @cite{The GNAT Debug_Pool Facility} section in the @cite{GNAT User's Guide}.
 
 @node GNAT Debug_Utilities g-debuti ads,GNAT Decode_String g-decstr ads,GNAT Debug_Pools g-debpoo ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-debug-utilities-g-debuti-ads}@anchor{332}@anchor{gnat_rm/the_gnat_library id62}@anchor{333}
+@anchor{gnat_rm/the_gnat_library gnat-debug-utilities-g-debuti-ads}@anchor{334}@anchor{gnat_rm/the_gnat_library id62}@anchor{335}
 @section @cite{GNAT.Debug_Utilities} (@code{g-debuti.ads})
 
 
@@ -23374,7 +23416,7 @@ to and from string images of address values. Supports both C and Ada formats
 for hexadecimal literals.
 
 @node GNAT Decode_String g-decstr ads,GNAT Decode_UTF8_String g-deutst ads,GNAT Debug_Utilities g-debuti ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-decode-string-g-decstr-ads}@anchor{334}@anchor{gnat_rm/the_gnat_library id63}@anchor{335}
+@anchor{gnat_rm/the_gnat_library gnat-decode-string-g-decstr-ads}@anchor{336}@anchor{gnat_rm/the_gnat_library id63}@anchor{337}
 @section @cite{GNAT.Decode_String} (@code{g-decstr.ads})
 
 
@@ -23398,7 +23440,7 @@ Useful in conjunction with Unicode character coding. Note there is a
 preinstantiation for UTF-8. See next entry.
 
 @node GNAT Decode_UTF8_String g-deutst ads,GNAT Directory_Operations g-dirope ads,GNAT Decode_String g-decstr ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-decode-utf8-string-g-deutst-ads}@anchor{336}@anchor{gnat_rm/the_gnat_library id64}@anchor{337}
+@anchor{gnat_rm/the_gnat_library gnat-decode-utf8-string-g-deutst-ads}@anchor{338}@anchor{gnat_rm/the_gnat_library id64}@anchor{339}
 @section @cite{GNAT.Decode_UTF8_String} (@code{g-deutst.ads})
 
 
@@ -23419,7 +23461,7 @@ preinstantiation for UTF-8. See next entry.
 A preinstantiation of GNAT.Decode_Strings for UTF-8 encoding.
 
 @node GNAT Directory_Operations g-dirope ads,GNAT Directory_Operations Iteration g-diopit ads,GNAT Decode_UTF8_String g-deutst ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id65}@anchor{338}@anchor{gnat_rm/the_gnat_library gnat-directory-operations-g-dirope-ads}@anchor{339}
+@anchor{gnat_rm/the_gnat_library id65}@anchor{33a}@anchor{gnat_rm/the_gnat_library gnat-directory-operations-g-dirope-ads}@anchor{33b}
 @section @cite{GNAT.Directory_Operations} (@code{g-dirope.ads})
 
 
@@ -23432,7 +23474,7 @@ the current directory, making new directories, and scanning the files in a
 directory.
 
 @node GNAT Directory_Operations Iteration g-diopit ads,GNAT Dynamic_HTables g-dynhta ads,GNAT Directory_Operations g-dirope ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id66}@anchor{33a}@anchor{gnat_rm/the_gnat_library gnat-directory-operations-iteration-g-diopit-ads}@anchor{33b}
+@anchor{gnat_rm/the_gnat_library id66}@anchor{33c}@anchor{gnat_rm/the_gnat_library gnat-directory-operations-iteration-g-diopit-ads}@anchor{33d}
 @section @cite{GNAT.Directory_Operations.Iteration} (@code{g-diopit.ads})
 
 
@@ -23444,7 +23486,7 @@ A child unit of GNAT.Directory_Operations providing additional operations
 for iterating through directories.
 
 @node GNAT Dynamic_HTables g-dynhta ads,GNAT Dynamic_Tables g-dyntab ads,GNAT Directory_Operations Iteration g-diopit ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id67}@anchor{33c}@anchor{gnat_rm/the_gnat_library gnat-dynamic-htables-g-dynhta-ads}@anchor{33d}
+@anchor{gnat_rm/the_gnat_library id67}@anchor{33e}@anchor{gnat_rm/the_gnat_library gnat-dynamic-htables-g-dynhta-ads}@anchor{33f}
 @section @cite{GNAT.Dynamic_HTables} (@code{g-dynhta.ads})
 
 
@@ -23462,7 +23504,7 @@ dynamic instances of the hash table, while an instantiation of
 @cite{GNAT.HTable} creates a single instance of the hash table.
 
 @node GNAT Dynamic_Tables g-dyntab ads,GNAT Encode_String g-encstr ads,GNAT Dynamic_HTables g-dynhta ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-dynamic-tables-g-dyntab-ads}@anchor{33e}@anchor{gnat_rm/the_gnat_library id68}@anchor{33f}
+@anchor{gnat_rm/the_gnat_library gnat-dynamic-tables-g-dyntab-ads}@anchor{340}@anchor{gnat_rm/the_gnat_library id68}@anchor{341}
 @section @cite{GNAT.Dynamic_Tables} (@code{g-dyntab.ads})
 
 
@@ -23482,7 +23524,7 @@ dynamic instances of the table, while an instantiation of
 @cite{GNAT.Table} creates a single instance of the table type.
 
 @node GNAT Encode_String g-encstr ads,GNAT Encode_UTF8_String g-enutst ads,GNAT Dynamic_Tables g-dyntab ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id69}@anchor{340}@anchor{gnat_rm/the_gnat_library gnat-encode-string-g-encstr-ads}@anchor{341}
+@anchor{gnat_rm/the_gnat_library id69}@anchor{342}@anchor{gnat_rm/the_gnat_library gnat-encode-string-g-encstr-ads}@anchor{343}
 @section @cite{GNAT.Encode_String} (@code{g-encstr.ads})
 
 
@@ -23504,7 +23546,7 @@ encoding method. Useful in conjunction with Unicode character coding.
 Note there is a preinstantiation for UTF-8. See next entry.
 
 @node GNAT Encode_UTF8_String g-enutst ads,GNAT Exception_Actions g-excact ads,GNAT Encode_String g-encstr ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-encode-utf8-string-g-enutst-ads}@anchor{342}@anchor{gnat_rm/the_gnat_library id70}@anchor{343}
+@anchor{gnat_rm/the_gnat_library gnat-encode-utf8-string-g-enutst-ads}@anchor{344}@anchor{gnat_rm/the_gnat_library id70}@anchor{345}
 @section @cite{GNAT.Encode_UTF8_String} (@code{g-enutst.ads})
 
 
@@ -23525,7 +23567,7 @@ Note there is a preinstantiation for UTF-8. See next entry.
 A preinstantiation of GNAT.Encode_Strings for UTF-8 encoding.
 
 @node GNAT Exception_Actions g-excact ads,GNAT Exception_Traces g-exctra ads,GNAT Encode_UTF8_String g-enutst ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id71}@anchor{344}@anchor{gnat_rm/the_gnat_library gnat-exception-actions-g-excact-ads}@anchor{345}
+@anchor{gnat_rm/the_gnat_library id71}@anchor{346}@anchor{gnat_rm/the_gnat_library gnat-exception-actions-g-excact-ads}@anchor{347}
 @section @cite{GNAT.Exception_Actions} (@code{g-excact.ads})
 
 
@@ -23538,7 +23580,7 @@ for specific exceptions, or when any exception is raised. This
 can be used for instance to force a core dump to ease debugging.
 
 @node GNAT Exception_Traces g-exctra ads,GNAT Exceptions g-expect ads,GNAT Exception_Actions g-excact ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id72}@anchor{346}@anchor{gnat_rm/the_gnat_library gnat-exception-traces-g-exctra-ads}@anchor{347}
+@anchor{gnat_rm/the_gnat_library id72}@anchor{348}@anchor{gnat_rm/the_gnat_library gnat-exception-traces-g-exctra-ads}@anchor{349}
 @section @cite{GNAT.Exception_Traces} (@code{g-exctra.ads})
 
 
@@ -23552,7 +23594,7 @@ Provides an interface allowing to control automatic output upon exception
 occurrences.
 
 @node GNAT Exceptions g-expect ads,GNAT Expect g-expect ads,GNAT Exception_Traces g-exctra ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id73}@anchor{348}@anchor{gnat_rm/the_gnat_library gnat-exceptions-g-expect-ads}@anchor{349}
+@anchor{gnat_rm/the_gnat_library id73}@anchor{34a}@anchor{gnat_rm/the_gnat_library gnat-exceptions-g-expect-ads}@anchor{34b}
 @section @cite{GNAT.Exceptions} (@code{g-expect.ads})
 
 
@@ -23573,7 +23615,7 @@ predefined exceptions, and for example allow raising
 @cite{Constraint_Error} with a message from a pure subprogram.
 
 @node GNAT Expect g-expect ads,GNAT Expect TTY g-exptty ads,GNAT Exceptions g-expect ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-expect-g-expect-ads}@anchor{34a}@anchor{gnat_rm/the_gnat_library id74}@anchor{34b}
+@anchor{gnat_rm/the_gnat_library gnat-expect-g-expect-ads}@anchor{34c}@anchor{gnat_rm/the_gnat_library id74}@anchor{34d}
 @section @cite{GNAT.Expect} (@code{g-expect.ads})
 
 
@@ -23589,7 +23631,7 @@ It is not implemented for cross ports, and in particular is not
 implemented for VxWorks or LynxOS.
 
 @node GNAT Expect TTY g-exptty ads,GNAT Float_Control g-flocon ads,GNAT Expect g-expect ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-expect-tty-g-exptty-ads}@anchor{34c}@anchor{gnat_rm/the_gnat_library id75}@anchor{34d}
+@anchor{gnat_rm/the_gnat_library gnat-expect-tty-g-exptty-ads}@anchor{34e}@anchor{gnat_rm/the_gnat_library id75}@anchor{34f}
 @section @cite{GNAT.Expect.TTY} (@code{g-exptty.ads})
 
 
@@ -23601,7 +23643,7 @@ ports. It is not implemented for cross ports, and
 in particular is not implemented for VxWorks or LynxOS.
 
 @node GNAT Float_Control g-flocon ads,GNAT Formatted_String g-forstr ads,GNAT Expect TTY g-exptty ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id76}@anchor{34e}@anchor{gnat_rm/the_gnat_library gnat-float-control-g-flocon-ads}@anchor{34f}
+@anchor{gnat_rm/the_gnat_library id76}@anchor{350}@anchor{gnat_rm/the_gnat_library gnat-float-control-g-flocon-ads}@anchor{351}
 @section @cite{GNAT.Float_Control} (@code{g-flocon.ads})
 
 
@@ -23615,7 +23657,7 @@ library calls may cause this mode to be modified, and the Reset procedure
 in this package can be used to reestablish the required mode.
 
 @node GNAT Formatted_String g-forstr ads,GNAT Heap_Sort g-heasor ads,GNAT Float_Control g-flocon ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-formatted-string-g-forstr-ads}@anchor{350}@anchor{gnat_rm/the_gnat_library id77}@anchor{351}
+@anchor{gnat_rm/the_gnat_library gnat-formatted-string-g-forstr-ads}@anchor{352}@anchor{gnat_rm/the_gnat_library id77}@anchor{353}
 @section @cite{GNAT.Formatted_String} (@code{g-forstr.ads})
 
 
@@ -23630,7 +23672,7 @@ derived from Integer, Float or enumerations as values for the
 formatted string.
 
 @node GNAT Heap_Sort g-heasor ads,GNAT Heap_Sort_A g-hesora ads,GNAT Formatted_String g-forstr ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-heasor-ads}@anchor{352}@anchor{gnat_rm/the_gnat_library id78}@anchor{353}
+@anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-heasor-ads}@anchor{354}@anchor{gnat_rm/the_gnat_library id78}@anchor{355}
 @section @cite{GNAT.Heap_Sort} (@code{g-heasor.ads})
 
 
@@ -23644,7 +23686,7 @@ access-to-procedure values.  The algorithm used is a modified heap sort
 that performs approximately N*log(N) comparisons in the worst case.
 
 @node GNAT Heap_Sort_A g-hesora ads,GNAT Heap_Sort_G g-hesorg ads,GNAT Heap_Sort g-heasor ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id79}@anchor{354}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-a-g-hesora-ads}@anchor{355}
+@anchor{gnat_rm/the_gnat_library id79}@anchor{356}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-a-g-hesora-ads}@anchor{357}
 @section @cite{GNAT.Heap_Sort_A} (@code{g-hesora.ads})
 
 
@@ -23660,7 +23702,7 @@ This differs from @cite{GNAT.Heap_Sort} in having a less convenient
 interface, but may be slightly more efficient.
 
 @node GNAT Heap_Sort_G g-hesorg ads,GNAT HTable g-htable ads,GNAT Heap_Sort_A g-hesora ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id80}@anchor{356}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-g-hesorg-ads}@anchor{357}
+@anchor{gnat_rm/the_gnat_library id80}@anchor{358}@anchor{gnat_rm/the_gnat_library gnat-heap-sort-g-g-hesorg-ads}@anchor{359}
 @section @cite{GNAT.Heap_Sort_G} (@code{g-hesorg.ads})
 
 
@@ -23674,7 +23716,7 @@ if the procedures can be inlined, at the expense of duplicating code for
 multiple instantiations.
 
 @node GNAT HTable g-htable ads,GNAT IO g-io ads,GNAT Heap_Sort_G g-hesorg ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id81}@anchor{358}@anchor{gnat_rm/the_gnat_library gnat-htable-g-htable-ads}@anchor{359}
+@anchor{gnat_rm/the_gnat_library id81}@anchor{35a}@anchor{gnat_rm/the_gnat_library gnat-htable-g-htable-ads}@anchor{35b}
 @section @cite{GNAT.HTable} (@code{g-htable.ads})
 
 
@@ -23687,7 +23729,7 @@ data.  Provides two approaches, one a simple static approach, and the other
 allowing arbitrary dynamic hash tables.
 
 @node GNAT IO g-io ads,GNAT IO_Aux g-io_aux ads,GNAT HTable g-htable ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id82}@anchor{35a}@anchor{gnat_rm/the_gnat_library gnat-io-g-io-ads}@anchor{35b}
+@anchor{gnat_rm/the_gnat_library id82}@anchor{35c}@anchor{gnat_rm/the_gnat_library gnat-io-g-io-ads}@anchor{35d}
 @section @cite{GNAT.IO} (@code{g-io.ads})
 
 
@@ -23703,7 +23745,7 @@ Standard_Input, and writing characters, strings and integers to either
 Standard_Output or Standard_Error.
 
 @node GNAT IO_Aux g-io_aux ads,GNAT Lock_Files g-locfil ads,GNAT IO g-io ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id83}@anchor{35c}@anchor{gnat_rm/the_gnat_library gnat-io-aux-g-io-aux-ads}@anchor{35d}
+@anchor{gnat_rm/the_gnat_library id83}@anchor{35e}@anchor{gnat_rm/the_gnat_library gnat-io-aux-g-io-aux-ads}@anchor{35f}
 @section @cite{GNAT.IO_Aux} (@code{g-io_aux.ads})
 
 
@@ -23717,7 +23759,7 @@ Provides some auxiliary functions for use with Text_IO, including a test
 for whether a file exists, and functions for reading a line of text.
 
 @node GNAT Lock_Files g-locfil ads,GNAT MBBS_Discrete_Random g-mbdira ads,GNAT IO_Aux g-io_aux ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-lock-files-g-locfil-ads}@anchor{35e}@anchor{gnat_rm/the_gnat_library id84}@anchor{35f}
+@anchor{gnat_rm/the_gnat_library gnat-lock-files-g-locfil-ads}@anchor{360}@anchor{gnat_rm/the_gnat_library id84}@anchor{361}
 @section @cite{GNAT.Lock_Files} (@code{g-locfil.ads})
 
 
@@ -23731,7 +23773,7 @@ Provides a general interface for using files as locks.  Can be used for
 providing program level synchronization.
 
 @node GNAT MBBS_Discrete_Random g-mbdira ads,GNAT MBBS_Float_Random g-mbflra ads,GNAT Lock_Files g-locfil ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id85}@anchor{360}@anchor{gnat_rm/the_gnat_library gnat-mbbs-discrete-random-g-mbdira-ads}@anchor{361}
+@anchor{gnat_rm/the_gnat_library id85}@anchor{362}@anchor{gnat_rm/the_gnat_library gnat-mbbs-discrete-random-g-mbdira-ads}@anchor{363}
 @section @cite{GNAT.MBBS_Discrete_Random} (@code{g-mbdira.ads})
 
 
@@ -23743,7 +23785,7 @@ The original implementation of @cite{Ada.Numerics.Discrete_Random}.  Uses
 a modified version of the Blum-Blum-Shub generator.
 
 @node GNAT MBBS_Float_Random g-mbflra ads,GNAT MD5 g-md5 ads,GNAT MBBS_Discrete_Random g-mbdira ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id86}@anchor{362}@anchor{gnat_rm/the_gnat_library gnat-mbbs-float-random-g-mbflra-ads}@anchor{363}
+@anchor{gnat_rm/the_gnat_library id86}@anchor{364}@anchor{gnat_rm/the_gnat_library gnat-mbbs-float-random-g-mbflra-ads}@anchor{365}
 @section @cite{GNAT.MBBS_Float_Random} (@code{g-mbflra.ads})
 
 
@@ -23755,7 +23797,7 @@ The original implementation of @cite{Ada.Numerics.Float_Random}.  Uses
 a modified version of the Blum-Blum-Shub generator.
 
 @node GNAT MD5 g-md5 ads,GNAT Memory_Dump g-memdum ads,GNAT MBBS_Float_Random g-mbflra ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id87}@anchor{364}@anchor{gnat_rm/the_gnat_library gnat-md5-g-md5-ads}@anchor{365}
+@anchor{gnat_rm/the_gnat_library id87}@anchor{366}@anchor{gnat_rm/the_gnat_library gnat-md5-g-md5-ads}@anchor{367}
 @section @cite{GNAT.MD5} (@code{g-md5.ads})
 
 
@@ -23768,7 +23810,7 @@ the HMAC-MD5 message authentication function as described in RFC 2104 and
 FIPS PUB 198.
 
 @node GNAT Memory_Dump g-memdum ads,GNAT Most_Recent_Exception g-moreex ads,GNAT MD5 g-md5 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id88}@anchor{366}@anchor{gnat_rm/the_gnat_library gnat-memory-dump-g-memdum-ads}@anchor{367}
+@anchor{gnat_rm/the_gnat_library id88}@anchor{368}@anchor{gnat_rm/the_gnat_library gnat-memory-dump-g-memdum-ads}@anchor{369}
 @section @cite{GNAT.Memory_Dump} (@code{g-memdum.ads})
 
 
@@ -23781,7 +23823,7 @@ standard output or standard error files. Uses GNAT.IO for actual
 output.
 
 @node GNAT Most_Recent_Exception g-moreex ads,GNAT OS_Lib g-os_lib ads,GNAT Memory_Dump g-memdum ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id89}@anchor{368}@anchor{gnat_rm/the_gnat_library gnat-most-recent-exception-g-moreex-ads}@anchor{369}
+@anchor{gnat_rm/the_gnat_library id89}@anchor{36a}@anchor{gnat_rm/the_gnat_library gnat-most-recent-exception-g-moreex-ads}@anchor{36b}
 @section @cite{GNAT.Most_Recent_Exception} (@code{g-moreex.ads})
 
 
@@ -23795,7 +23837,7 @@ various logging purposes, including duplicating functionality of some
 Ada 83 implementation dependent extensions.
 
 @node GNAT OS_Lib g-os_lib ads,GNAT Perfect_Hash_Generators g-pehage ads,GNAT Most_Recent_Exception g-moreex ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id90}@anchor{36a}@anchor{gnat_rm/the_gnat_library gnat-os-lib-g-os-lib-ads}@anchor{36b}
+@anchor{gnat_rm/the_gnat_library id90}@anchor{36c}@anchor{gnat_rm/the_gnat_library gnat-os-lib-g-os-lib-ads}@anchor{36d}
 @section @cite{GNAT.OS_Lib} (@code{g-os_lib.ads})
 
 
@@ -23811,7 +23853,7 @@ including a portable spawn procedure, and access to environment variables
 and error return codes.
 
 @node GNAT Perfect_Hash_Generators g-pehage ads,GNAT Random_Numbers g-rannum ads,GNAT OS_Lib g-os_lib ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-perfect-hash-generators-g-pehage-ads}@anchor{36c}@anchor{gnat_rm/the_gnat_library id91}@anchor{36d}
+@anchor{gnat_rm/the_gnat_library gnat-perfect-hash-generators-g-pehage-ads}@anchor{36e}@anchor{gnat_rm/the_gnat_library id91}@anchor{36f}
 @section @cite{GNAT.Perfect_Hash_Generators} (@code{g-pehage.ads})
 
 
@@ -23829,7 +23871,7 @@ hashcode are in the same order. These hashing functions are very
 convenient for use with realtime applications.
 
 @node GNAT Random_Numbers g-rannum ads,GNAT Regexp g-regexp ads,GNAT Perfect_Hash_Generators g-pehage ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-random-numbers-g-rannum-ads}@anchor{36e}@anchor{gnat_rm/the_gnat_library id92}@anchor{36f}
+@anchor{gnat_rm/the_gnat_library gnat-random-numbers-g-rannum-ads}@anchor{370}@anchor{gnat_rm/the_gnat_library id92}@anchor{371}
 @section @cite{GNAT.Random_Numbers} (@code{g-rannum.ads})
 
 
@@ -23841,7 +23883,7 @@ Provides random number capabilities which extend those available in the
 standard Ada library and are more convenient to use.
 
 @node GNAT Regexp g-regexp ads,GNAT Registry g-regist ads,GNAT Random_Numbers g-rannum ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-regexp-g-regexp-ads}@anchor{241}@anchor{gnat_rm/the_gnat_library id93}@anchor{370}
+@anchor{gnat_rm/the_gnat_library gnat-regexp-g-regexp-ads}@anchor{243}@anchor{gnat_rm/the_gnat_library id93}@anchor{372}
 @section @cite{GNAT.Regexp} (@code{g-regexp.ads})
 
 
@@ -23857,7 +23899,7 @@ simplest of the three pattern matching packages provided, and is particularly
 suitable for 'file globbing' applications.
 
 @node GNAT Registry g-regist ads,GNAT Regpat g-regpat ads,GNAT Regexp g-regexp ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id94}@anchor{371}@anchor{gnat_rm/the_gnat_library gnat-registry-g-regist-ads}@anchor{372}
+@anchor{gnat_rm/the_gnat_library id94}@anchor{373}@anchor{gnat_rm/the_gnat_library gnat-registry-g-regist-ads}@anchor{374}
 @section @cite{GNAT.Registry} (@code{g-regist.ads})
 
 
@@ -23871,7 +23913,7 @@ registry API, but at a lower level of abstraction, refer to the Win32.Winreg
 package provided with the Win32Ada binding
 
 @node GNAT Regpat g-regpat ads,GNAT Rewrite_Data g-rewdat ads,GNAT Registry g-regist ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-regpat-g-regpat-ads}@anchor{373}@anchor{gnat_rm/the_gnat_library id95}@anchor{374}
+@anchor{gnat_rm/the_gnat_library gnat-regpat-g-regpat-ads}@anchor{375}@anchor{gnat_rm/the_gnat_library id95}@anchor{376}
 @section @cite{GNAT.Regpat} (@code{g-regpat.ads})
 
 
@@ -23886,7 +23928,7 @@ from the original V7 style regular expression library written in C by
 Henry Spencer (and binary compatible with this C library).
 
 @node GNAT Rewrite_Data g-rewdat ads,GNAT Secondary_Stack_Info g-sestin ads,GNAT Regpat g-regpat ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id96}@anchor{375}@anchor{gnat_rm/the_gnat_library gnat-rewrite-data-g-rewdat-ads}@anchor{376}
+@anchor{gnat_rm/the_gnat_library id96}@anchor{377}@anchor{gnat_rm/the_gnat_library gnat-rewrite-data-g-rewdat-ads}@anchor{378}
 @section @cite{GNAT.Rewrite_Data} (@code{g-rewdat.ads})
 
 
@@ -23900,7 +23942,7 @@ full content to be processed is not loaded into memory all at once. This makes
 this interface usable for large files or socket streams.
 
 @node GNAT Secondary_Stack_Info g-sestin ads,GNAT Semaphores g-semaph ads,GNAT Rewrite_Data g-rewdat ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-secondary-stack-info-g-sestin-ads}@anchor{377}@anchor{gnat_rm/the_gnat_library id97}@anchor{378}
+@anchor{gnat_rm/the_gnat_library gnat-secondary-stack-info-g-sestin-ads}@anchor{379}@anchor{gnat_rm/the_gnat_library id97}@anchor{37a}
 @section @cite{GNAT.Secondary_Stack_Info} (@code{g-sestin.ads})
 
 
@@ -23912,7 +23954,7 @@ Provide the capability to query the high water mark of the current task's
 secondary stack.
 
 @node GNAT Semaphores g-semaph ads,GNAT Serial_Communications g-sercom ads,GNAT Secondary_Stack_Info g-sestin ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id98}@anchor{379}@anchor{gnat_rm/the_gnat_library gnat-semaphores-g-semaph-ads}@anchor{37a}
+@anchor{gnat_rm/the_gnat_library id98}@anchor{37b}@anchor{gnat_rm/the_gnat_library gnat-semaphores-g-semaph-ads}@anchor{37c}
 @section @cite{GNAT.Semaphores} (@code{g-semaph.ads})
 
 
@@ -23923,7 +23965,7 @@ secondary stack.
 Provides classic counting and binary semaphores using protected types.
 
 @node GNAT Serial_Communications g-sercom ads,GNAT SHA1 g-sha1 ads,GNAT Semaphores g-semaph ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-serial-communications-g-sercom-ads}@anchor{37b}@anchor{gnat_rm/the_gnat_library id99}@anchor{37c}
+@anchor{gnat_rm/the_gnat_library gnat-serial-communications-g-sercom-ads}@anchor{37d}@anchor{gnat_rm/the_gnat_library id99}@anchor{37e}
 @section @cite{GNAT.Serial_Communications} (@code{g-sercom.ads})
 
 
@@ -23935,7 +23977,7 @@ Provides a simple interface to send and receive data over a serial
 port. This is only supported on GNU/Linux and Windows.
 
 @node GNAT SHA1 g-sha1 ads,GNAT SHA224 g-sha224 ads,GNAT Serial_Communications g-sercom ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-sha1-g-sha1-ads}@anchor{37d}@anchor{gnat_rm/the_gnat_library id100}@anchor{37e}
+@anchor{gnat_rm/the_gnat_library gnat-sha1-g-sha1-ads}@anchor{37f}@anchor{gnat_rm/the_gnat_library id100}@anchor{380}
 @section @cite{GNAT.SHA1} (@code{g-sha1.ads})
 
 
@@ -23948,7 +23990,7 @@ and RFC 3174, and the HMAC-SHA1 message authentication function as described
 in RFC 2104 and FIPS PUB 198.
 
 @node GNAT SHA224 g-sha224 ads,GNAT SHA256 g-sha256 ads,GNAT SHA1 g-sha1 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id101}@anchor{37f}@anchor{gnat_rm/the_gnat_library gnat-sha224-g-sha224-ads}@anchor{380}
+@anchor{gnat_rm/the_gnat_library id101}@anchor{381}@anchor{gnat_rm/the_gnat_library gnat-sha224-g-sha224-ads}@anchor{382}
 @section @cite{GNAT.SHA224} (@code{g-sha224.ads})
 
 
@@ -23961,7 +24003,7 @@ and the HMAC-SHA224 message authentication function as described
 in RFC 2104 and FIPS PUB 198.
 
 @node GNAT SHA256 g-sha256 ads,GNAT SHA384 g-sha384 ads,GNAT SHA224 g-sha224 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id102}@anchor{381}@anchor{gnat_rm/the_gnat_library gnat-sha256-g-sha256-ads}@anchor{382}
+@anchor{gnat_rm/the_gnat_library id102}@anchor{383}@anchor{gnat_rm/the_gnat_library gnat-sha256-g-sha256-ads}@anchor{384}
 @section @cite{GNAT.SHA256} (@code{g-sha256.ads})
 
 
@@ -23974,7 +24016,7 @@ and the HMAC-SHA256 message authentication function as described
 in RFC 2104 and FIPS PUB 198.
 
 @node GNAT SHA384 g-sha384 ads,GNAT SHA512 g-sha512 ads,GNAT SHA256 g-sha256 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id103}@anchor{383}@anchor{gnat_rm/the_gnat_library gnat-sha384-g-sha384-ads}@anchor{384}
+@anchor{gnat_rm/the_gnat_library id103}@anchor{385}@anchor{gnat_rm/the_gnat_library gnat-sha384-g-sha384-ads}@anchor{386}
 @section @cite{GNAT.SHA384} (@code{g-sha384.ads})
 
 
@@ -23987,7 +24029,7 @@ and the HMAC-SHA384 message authentication function as described
 in RFC 2104 and FIPS PUB 198.
 
 @node GNAT SHA512 g-sha512 ads,GNAT Signals g-signal ads,GNAT SHA384 g-sha384 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-sha512-g-sha512-ads}@anchor{385}@anchor{gnat_rm/the_gnat_library id104}@anchor{386}
+@anchor{gnat_rm/the_gnat_library gnat-sha512-g-sha512-ads}@anchor{387}@anchor{gnat_rm/the_gnat_library id104}@anchor{388}
 @section @cite{GNAT.SHA512} (@code{g-sha512.ads})
 
 
@@ -24000,7 +24042,7 @@ and the HMAC-SHA512 message authentication function as described
 in RFC 2104 and FIPS PUB 198.
 
 @node GNAT Signals g-signal ads,GNAT Sockets g-socket ads,GNAT SHA512 g-sha512 ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-signals-g-signal-ads}@anchor{387}@anchor{gnat_rm/the_gnat_library id105}@anchor{388}
+@anchor{gnat_rm/the_gnat_library gnat-signals-g-signal-ads}@anchor{389}@anchor{gnat_rm/the_gnat_library id105}@anchor{38a}
 @section @cite{GNAT.Signals} (@code{g-signal.ads})
 
 
@@ -24012,7 +24054,7 @@ Provides the ability to manipulate the blocked status of signals on supported
 targets.
 
 @node GNAT Sockets g-socket ads,GNAT Source_Info g-souinf ads,GNAT Signals g-signal ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-sockets-g-socket-ads}@anchor{389}@anchor{gnat_rm/the_gnat_library id106}@anchor{38a}
+@anchor{gnat_rm/the_gnat_library gnat-sockets-g-socket-ads}@anchor{38b}@anchor{gnat_rm/the_gnat_library id106}@anchor{38c}
 @section @cite{GNAT.Sockets} (@code{g-socket.ads})
 
 
@@ -24027,7 +24069,7 @@ on all native GNAT ports and on VxWorks cross prots.  It is not implemented for
 the LynxOS cross port.
 
 @node GNAT Source_Info g-souinf ads,GNAT Spelling_Checker g-speche ads,GNAT Sockets g-socket ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-source-info-g-souinf-ads}@anchor{38b}@anchor{gnat_rm/the_gnat_library id107}@anchor{38c}
+@anchor{gnat_rm/the_gnat_library gnat-source-info-g-souinf-ads}@anchor{38d}@anchor{gnat_rm/the_gnat_library id107}@anchor{38e}
 @section @cite{GNAT.Source_Info} (@code{g-souinf.ads})
 
 
@@ -24041,7 +24083,7 @@ subprograms yielding the date and time of the current compilation (like the
 C macros @cite{__DATE__} and @cite{__TIME__})
 
 @node GNAT Spelling_Checker g-speche ads,GNAT Spelling_Checker_Generic g-spchge ads,GNAT Source_Info g-souinf ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-spelling-checker-g-speche-ads}@anchor{38d}@anchor{gnat_rm/the_gnat_library id108}@anchor{38e}
+@anchor{gnat_rm/the_gnat_library gnat-spelling-checker-g-speche-ads}@anchor{38f}@anchor{gnat_rm/the_gnat_library id108}@anchor{390}
 @section @cite{GNAT.Spelling_Checker} (@code{g-speche.ads})
 
 
@@ -24053,7 +24095,7 @@ Provides a function for determining whether one string is a plausible
 near misspelling of another string.
 
 @node GNAT Spelling_Checker_Generic g-spchge ads,GNAT Spitbol Patterns g-spipat ads,GNAT Spelling_Checker g-speche ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id109}@anchor{38f}@anchor{gnat_rm/the_gnat_library gnat-spelling-checker-generic-g-spchge-ads}@anchor{390}
+@anchor{gnat_rm/the_gnat_library id109}@anchor{391}@anchor{gnat_rm/the_gnat_library gnat-spelling-checker-generic-g-spchge-ads}@anchor{392}
 @section @cite{GNAT.Spelling_Checker_Generic} (@code{g-spchge.ads})
 
 
@@ -24066,7 +24108,7 @@ determining whether one string is a plausible near misspelling of another
 string.
 
 @node GNAT Spitbol Patterns g-spipat ads,GNAT Spitbol g-spitbo ads,GNAT Spelling_Checker_Generic g-spchge ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id110}@anchor{391}@anchor{gnat_rm/the_gnat_library gnat-spitbol-patterns-g-spipat-ads}@anchor{392}
+@anchor{gnat_rm/the_gnat_library id110}@anchor{393}@anchor{gnat_rm/the_gnat_library gnat-spitbol-patterns-g-spipat-ads}@anchor{394}
 @section @cite{GNAT.Spitbol.Patterns} (@code{g-spipat.ads})
 
 
@@ -24082,7 +24124,7 @@ the SNOBOL4 dynamic pattern construction and matching capabilities, using the
 efficient algorithm developed by Robert Dewar for the SPITBOL system.
 
 @node GNAT Spitbol g-spitbo ads,GNAT Spitbol Table_Boolean g-sptabo ads,GNAT Spitbol Patterns g-spipat ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id111}@anchor{393}@anchor{gnat_rm/the_gnat_library gnat-spitbol-g-spitbo-ads}@anchor{394}
+@anchor{gnat_rm/the_gnat_library id111}@anchor{395}@anchor{gnat_rm/the_gnat_library gnat-spitbol-g-spitbo-ads}@anchor{396}
 @section @cite{GNAT.Spitbol} (@code{g-spitbo.ads})
 
 
@@ -24097,7 +24139,7 @@ useful for constructing arbitrary mappings from strings in the style of
 the SNOBOL4 TABLE function.
 
 @node GNAT Spitbol Table_Boolean g-sptabo ads,GNAT Spitbol Table_Integer g-sptain ads,GNAT Spitbol g-spitbo ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id112}@anchor{395}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-boolean-g-sptabo-ads}@anchor{396}
+@anchor{gnat_rm/the_gnat_library id112}@anchor{397}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-boolean-g-sptabo-ads}@anchor{398}
 @section @cite{GNAT.Spitbol.Table_Boolean} (@code{g-sptabo.ads})
 
 
@@ -24112,7 +24154,7 @@ for type @cite{Standard.Boolean}, giving an implementation of sets of
 string values.
 
 @node GNAT Spitbol Table_Integer g-sptain ads,GNAT Spitbol Table_VString g-sptavs ads,GNAT Spitbol Table_Boolean g-sptabo ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id113}@anchor{397}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-integer-g-sptain-ads}@anchor{398}
+@anchor{gnat_rm/the_gnat_library id113}@anchor{399}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-integer-g-sptain-ads}@anchor{39a}
 @section @cite{GNAT.Spitbol.Table_Integer} (@code{g-sptain.ads})
 
 
@@ -24129,7 +24171,7 @@ for type @cite{Standard.Integer}, giving an implementation of maps
 from string to integer values.
 
 @node GNAT Spitbol Table_VString g-sptavs ads,GNAT SSE g-sse ads,GNAT Spitbol Table_Integer g-sptain ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id114}@anchor{399}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-vstring-g-sptavs-ads}@anchor{39a}
+@anchor{gnat_rm/the_gnat_library id114}@anchor{39b}@anchor{gnat_rm/the_gnat_library gnat-spitbol-table-vstring-g-sptavs-ads}@anchor{39c}
 @section @cite{GNAT.Spitbol.Table_VString} (@code{g-sptavs.ads})
 
 
@@ -24146,7 +24188,7 @@ a variable length string type, giving an implementation of general
 maps from strings to strings.
 
 @node GNAT SSE g-sse ads,GNAT SSE Vector_Types g-ssvety ads,GNAT Spitbol Table_VString g-sptavs ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id115}@anchor{39b}@anchor{gnat_rm/the_gnat_library gnat-sse-g-sse-ads}@anchor{39c}
+@anchor{gnat_rm/the_gnat_library id115}@anchor{39d}@anchor{gnat_rm/the_gnat_library gnat-sse-g-sse-ads}@anchor{39e}
 @section @cite{GNAT.SSE} (@code{g-sse.ads})
 
 
@@ -24158,7 +24200,7 @@ targets.  It exposes vector component types together with a general
 introduction to the binding contents and use.
 
 @node GNAT SSE Vector_Types g-ssvety ads,GNAT String_Hash g-strhas ads,GNAT SSE g-sse ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-sse-vector-types-g-ssvety-ads}@anchor{39d}@anchor{gnat_rm/the_gnat_library id116}@anchor{39e}
+@anchor{gnat_rm/the_gnat_library gnat-sse-vector-types-g-ssvety-ads}@anchor{39f}@anchor{gnat_rm/the_gnat_library id116}@anchor{3a0}
 @section @cite{GNAT.SSE.Vector_Types} (@code{g-ssvety.ads})
 
 
@@ -24167,7 +24209,7 @@ introduction to the binding contents and use.
 SSE vector types for use with SSE related intrinsics.
 
 @node GNAT String_Hash g-strhas ads,GNAT Strings g-string ads,GNAT SSE Vector_Types g-ssvety ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-string-hash-g-strhas-ads}@anchor{39f}@anchor{gnat_rm/the_gnat_library id117}@anchor{3a0}
+@anchor{gnat_rm/the_gnat_library gnat-string-hash-g-strhas-ads}@anchor{3a1}@anchor{gnat_rm/the_gnat_library id117}@anchor{3a2}
 @section @cite{GNAT.String_Hash} (@code{g-strhas.ads})
 
 
@@ -24179,7 +24221,7 @@ Provides a generic hash function working on arrays of scalars. Both the scalar
 type and the hash result type are parameters.
 
 @node GNAT Strings g-string ads,GNAT String_Split g-strspl ads,GNAT String_Hash g-strhas ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id118}@anchor{3a1}@anchor{gnat_rm/the_gnat_library gnat-strings-g-string-ads}@anchor{3a2}
+@anchor{gnat_rm/the_gnat_library id118}@anchor{3a3}@anchor{gnat_rm/the_gnat_library gnat-strings-g-string-ads}@anchor{3a4}
 @section @cite{GNAT.Strings} (@code{g-string.ads})
 
 
@@ -24189,7 +24231,7 @@ Common String access types and related subprograms. Basically it
 defines a string access and an array of string access types.
 
 @node GNAT String_Split g-strspl ads,GNAT Table g-table ads,GNAT Strings g-string ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-string-split-g-strspl-ads}@anchor{3a3}@anchor{gnat_rm/the_gnat_library id119}@anchor{3a4}
+@anchor{gnat_rm/the_gnat_library gnat-string-split-g-strspl-ads}@anchor{3a5}@anchor{gnat_rm/the_gnat_library id119}@anchor{3a6}
 @section @cite{GNAT.String_Split} (@code{g-strspl.ads})
 
 
@@ -24203,7 +24245,7 @@ to the resulting slices. This package is instantiated from
 @cite{GNAT.Array_Split}.
 
 @node GNAT Table g-table ads,GNAT Task_Lock g-tasloc ads,GNAT String_Split g-strspl ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-table-g-table-ads}@anchor{3a5}@anchor{gnat_rm/the_gnat_library id120}@anchor{3a6}
+@anchor{gnat_rm/the_gnat_library gnat-table-g-table-ads}@anchor{3a7}@anchor{gnat_rm/the_gnat_library id120}@anchor{3a8}
 @section @cite{GNAT.Table} (@code{g-table.ads})
 
 
@@ -24223,7 +24265,7 @@ while an instantiation of @cite{GNAT.Dynamic_Tables} creates a type that can be
 used to define dynamic instances of the table.
 
 @node GNAT Task_Lock g-tasloc ads,GNAT Time_Stamp g-timsta ads,GNAT Table g-table ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-task-lock-g-tasloc-ads}@anchor{3a7}@anchor{gnat_rm/the_gnat_library id121}@anchor{3a8}
+@anchor{gnat_rm/the_gnat_library gnat-task-lock-g-tasloc-ads}@anchor{3a9}@anchor{gnat_rm/the_gnat_library id121}@anchor{3aa}
 @section @cite{GNAT.Task_Lock} (@code{g-tasloc.ads})
 
 
@@ -24240,7 +24282,7 @@ single global task lock.  Appropriate for use in situations where contention
 between tasks is very rarely expected.
 
 @node GNAT Time_Stamp g-timsta ads,GNAT Threads g-thread ads,GNAT Task_Lock g-tasloc ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-time-stamp-g-timsta-ads}@anchor{3a9}@anchor{gnat_rm/the_gnat_library id122}@anchor{3aa}
+@anchor{gnat_rm/the_gnat_library gnat-time-stamp-g-timsta-ads}@anchor{3ab}@anchor{gnat_rm/the_gnat_library id122}@anchor{3ac}
 @section @cite{GNAT.Time_Stamp} (@code{g-timsta.ads})
 
 
@@ -24255,7 +24297,7 @@ represents the current date and time in ISO 8601 format. This is a very simple
 routine with minimal code and there are no dependencies on any other unit.
 
 @node GNAT Threads g-thread ads,GNAT Traceback g-traceb ads,GNAT Time_Stamp g-timsta ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-threads-g-thread-ads}@anchor{3ab}@anchor{gnat_rm/the_gnat_library id123}@anchor{3ac}
+@anchor{gnat_rm/the_gnat_library gnat-threads-g-thread-ads}@anchor{3ad}@anchor{gnat_rm/the_gnat_library id123}@anchor{3ae}
 @section @cite{GNAT.Threads} (@code{g-thread.ads})
 
 
@@ -24272,7 +24314,7 @@ further details if your program has threads that are created by a non-Ada
 environment which then accesses Ada code.
 
 @node GNAT Traceback g-traceb ads,GNAT Traceback Symbolic g-trasym ads,GNAT Threads g-thread ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id124}@anchor{3ad}@anchor{gnat_rm/the_gnat_library gnat-traceback-g-traceb-ads}@anchor{3ae}
+@anchor{gnat_rm/the_gnat_library id124}@anchor{3af}@anchor{gnat_rm/the_gnat_library gnat-traceback-g-traceb-ads}@anchor{3b0}
 @section @cite{GNAT.Traceback} (@code{g-traceb.ads})
 
 
@@ -24284,7 +24326,7 @@ Provides a facility for obtaining non-symbolic traceback information, useful
 in various debugging situations.
 
 @node GNAT Traceback Symbolic g-trasym ads,GNAT UTF_32 g-table ads,GNAT Traceback g-traceb ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-traceback-symbolic-g-trasym-ads}@anchor{3af}@anchor{gnat_rm/the_gnat_library id125}@anchor{3b0}
+@anchor{gnat_rm/the_gnat_library gnat-traceback-symbolic-g-trasym-ads}@anchor{3b1}@anchor{gnat_rm/the_gnat_library id125}@anchor{3b2}
 @section @cite{GNAT.Traceback.Symbolic} (@code{g-trasym.ads})
 
 
@@ -24293,7 +24335,7 @@ in various debugging situations.
 @geindex Trace back facilities
 
 @node GNAT UTF_32 g-table ads,GNAT Wide_Spelling_Checker g-u3spch ads,GNAT Traceback Symbolic g-trasym ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id126}@anchor{3b1}@anchor{gnat_rm/the_gnat_library gnat-utf-32-g-table-ads}@anchor{3b2}
+@anchor{gnat_rm/the_gnat_library id126}@anchor{3b3}@anchor{gnat_rm/the_gnat_library gnat-utf-32-g-table-ads}@anchor{3b4}
 @section @cite{GNAT.UTF_32} (@code{g-table.ads})
 
 
@@ -24312,7 +24354,7 @@ lower case to upper case fold routine corresponding to
 the Ada 2005 rules for identifier equivalence.
 
 @node GNAT Wide_Spelling_Checker g-u3spch ads,GNAT Wide_Spelling_Checker g-wispch ads,GNAT UTF_32 g-table ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-u3spch-ads}@anchor{3b3}@anchor{gnat_rm/the_gnat_library id127}@anchor{3b4}
+@anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-u3spch-ads}@anchor{3b5}@anchor{gnat_rm/the_gnat_library id127}@anchor{3b6}
 @section @cite{GNAT.Wide_Spelling_Checker} (@code{g-u3spch.ads})
 
 
@@ -24325,7 +24367,7 @@ near misspelling of another wide wide string, where the strings are represented
 using the UTF_32_String type defined in System.Wch_Cnv.
 
 @node GNAT Wide_Spelling_Checker g-wispch ads,GNAT Wide_String_Split g-wistsp ads,GNAT Wide_Spelling_Checker g-u3spch ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-wispch-ads}@anchor{3b5}@anchor{gnat_rm/the_gnat_library id128}@anchor{3b6}
+@anchor{gnat_rm/the_gnat_library gnat-wide-spelling-checker-g-wispch-ads}@anchor{3b7}@anchor{gnat_rm/the_gnat_library id128}@anchor{3b8}
 @section @cite{GNAT.Wide_Spelling_Checker} (@code{g-wispch.ads})
 
 
@@ -24337,7 +24379,7 @@ Provides a function for determining whether one wide string is a plausible
 near misspelling of another wide string.
 
 @node GNAT Wide_String_Split g-wistsp ads,GNAT Wide_Wide_Spelling_Checker g-zspche ads,GNAT Wide_Spelling_Checker g-wispch ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-wide-string-split-g-wistsp-ads}@anchor{3b7}@anchor{gnat_rm/the_gnat_library id129}@anchor{3b8}
+@anchor{gnat_rm/the_gnat_library gnat-wide-string-split-g-wistsp-ads}@anchor{3b9}@anchor{gnat_rm/the_gnat_library id129}@anchor{3ba}
 @section @cite{GNAT.Wide_String_Split} (@code{g-wistsp.ads})
 
 
@@ -24351,7 +24393,7 @@ to the resulting slices. This package is instantiated from
 @cite{GNAT.Array_Split}.
 
 @node GNAT Wide_Wide_Spelling_Checker g-zspche ads,GNAT Wide_Wide_String_Split g-zistsp ads,GNAT Wide_String_Split g-wistsp ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-wide-wide-spelling-checker-g-zspche-ads}@anchor{3b9}@anchor{gnat_rm/the_gnat_library id130}@anchor{3ba}
+@anchor{gnat_rm/the_gnat_library gnat-wide-wide-spelling-checker-g-zspche-ads}@anchor{3bb}@anchor{gnat_rm/the_gnat_library id130}@anchor{3bc}
 @section @cite{GNAT.Wide_Wide_Spelling_Checker} (@code{g-zspche.ads})
 
 
@@ -24363,7 +24405,7 @@ Provides a function for determining whether one wide wide string is a plausible
 near misspelling of another wide wide string.
 
 @node GNAT Wide_Wide_String_Split g-zistsp ads,Interfaces C Extensions i-cexten ads,GNAT Wide_Wide_Spelling_Checker g-zspche ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library gnat-wide-wide-string-split-g-zistsp-ads}@anchor{3bb}@anchor{gnat_rm/the_gnat_library id131}@anchor{3bc}
+@anchor{gnat_rm/the_gnat_library gnat-wide-wide-string-split-g-zistsp-ads}@anchor{3bd}@anchor{gnat_rm/the_gnat_library id131}@anchor{3be}
 @section @cite{GNAT.Wide_Wide_String_Split} (@code{g-zistsp.ads})
 
 
@@ -24377,7 +24419,7 @@ to the resulting slices. This package is instantiated from
 @cite{GNAT.Array_Split}.
 
 @node Interfaces C Extensions i-cexten ads,Interfaces C Streams i-cstrea ads,GNAT Wide_Wide_String_Split g-zistsp ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library interfaces-c-extensions-i-cexten-ads}@anchor{3bd}@anchor{gnat_rm/the_gnat_library id132}@anchor{3be}
+@anchor{gnat_rm/the_gnat_library interfaces-c-extensions-i-cexten-ads}@anchor{3bf}@anchor{gnat_rm/the_gnat_library id132}@anchor{3c0}
 @section @cite{Interfaces.C.Extensions} (@code{i-cexten.ads})
 
 
@@ -24388,7 +24430,7 @@ for use with either manually or automatically generated bindings
 to C libraries.
 
 @node Interfaces C Streams i-cstrea ads,Interfaces Packed_Decimal i-pacdec ads,Interfaces C Extensions i-cexten ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id133}@anchor{3bf}@anchor{gnat_rm/the_gnat_library interfaces-c-streams-i-cstrea-ads}@anchor{3c0}
+@anchor{gnat_rm/the_gnat_library id133}@anchor{3c1}@anchor{gnat_rm/the_gnat_library interfaces-c-streams-i-cstrea-ads}@anchor{3c2}
 @section @cite{Interfaces.C.Streams} (@code{i-cstrea.ads})
 
 
@@ -24401,7 +24443,7 @@ This package is a binding for the most commonly used operations
 on C streams.
 
 @node Interfaces Packed_Decimal i-pacdec ads,Interfaces VxWorks i-vxwork ads,Interfaces C Streams i-cstrea ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library interfaces-packed-decimal-i-pacdec-ads}@anchor{3c1}@anchor{gnat_rm/the_gnat_library id134}@anchor{3c2}
+@anchor{gnat_rm/the_gnat_library interfaces-packed-decimal-i-pacdec-ads}@anchor{3c3}@anchor{gnat_rm/the_gnat_library id134}@anchor{3c4}
 @section @cite{Interfaces.Packed_Decimal} (@code{i-pacdec.ads})
 
 
@@ -24416,7 +24458,7 @@ from a packed decimal format compatible with that used on IBM
 mainframes.
 
 @node Interfaces VxWorks i-vxwork ads,Interfaces VxWorks IO i-vxwoio ads,Interfaces Packed_Decimal i-pacdec ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library interfaces-vxworks-i-vxwork-ads}@anchor{3c3}@anchor{gnat_rm/the_gnat_library id135}@anchor{3c4}
+@anchor{gnat_rm/the_gnat_library interfaces-vxworks-i-vxwork-ads}@anchor{3c5}@anchor{gnat_rm/the_gnat_library id135}@anchor{3c6}
 @section @cite{Interfaces.VxWorks} (@code{i-vxwork.ads})
 
 
@@ -24432,7 +24474,7 @@ In particular, it interfaces with the
 VxWorks hardware interrupt facilities.
 
 @node Interfaces VxWorks IO i-vxwoio ads,System Address_Image s-addima ads,Interfaces VxWorks i-vxwork ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library interfaces-vxworks-io-i-vxwoio-ads}@anchor{3c5}@anchor{gnat_rm/the_gnat_library id136}@anchor{3c6}
+@anchor{gnat_rm/the_gnat_library interfaces-vxworks-io-i-vxwoio-ads}@anchor{3c7}@anchor{gnat_rm/the_gnat_library id136}@anchor{3c8}
 @section @cite{Interfaces.VxWorks.IO} (@code{i-vxwoio.ads})
 
 
@@ -24455,7 +24497,7 @@ function codes. A particular use of this package is
 to enable the use of Get_Immediate under VxWorks.
 
 @node System Address_Image s-addima ads,System Assertions s-assert ads,Interfaces VxWorks IO i-vxwoio ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library system-address-image-s-addima-ads}@anchor{3c7}@anchor{gnat_rm/the_gnat_library id137}@anchor{3c8}
+@anchor{gnat_rm/the_gnat_library system-address-image-s-addima-ads}@anchor{3c9}@anchor{gnat_rm/the_gnat_library id137}@anchor{3ca}
 @section @cite{System.Address_Image} (@code{s-addima.ads})
 
 
@@ -24471,7 +24513,7 @@ function that gives an (implementation dependent)
 string which identifies an address.
 
 @node System Assertions s-assert ads,System Atomic_Counters s-atocou ads,System Address_Image s-addima ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id138}@anchor{3c9}@anchor{gnat_rm/the_gnat_library system-assertions-s-assert-ads}@anchor{3ca}
+@anchor{gnat_rm/the_gnat_library id138}@anchor{3cb}@anchor{gnat_rm/the_gnat_library system-assertions-s-assert-ads}@anchor{3cc}
 @section @cite{System.Assertions} (@code{s-assert.ads})
 
 
@@ -24487,7 +24529,7 @@ by an run-time assertion failure, as well as the routine that
 is used internally to raise this assertion.
 
 @node System Atomic_Counters s-atocou ads,System Memory s-memory ads,System Assertions s-assert ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id139}@anchor{3cb}@anchor{gnat_rm/the_gnat_library system-atomic-counters-s-atocou-ads}@anchor{3cc}
+@anchor{gnat_rm/the_gnat_library id139}@anchor{3cd}@anchor{gnat_rm/the_gnat_library system-atomic-counters-s-atocou-ads}@anchor{3ce}
 @section @cite{System.Atomic_Counters} (@code{s-atocou.ads})
 
 
@@ -24501,7 +24543,7 @@ on most targets, including all Alpha, ia64, PowerPC, SPARC V9,
 x86, and x86_64 platforms.
 
 @node System Memory s-memory ads,System Multiprocessors s-multip ads,System Atomic_Counters s-atocou ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library system-memory-s-memory-ads}@anchor{3cd}@anchor{gnat_rm/the_gnat_library id140}@anchor{3ce}
+@anchor{gnat_rm/the_gnat_library system-memory-s-memory-ads}@anchor{3cf}@anchor{gnat_rm/the_gnat_library id140}@anchor{3d0}
 @section @cite{System.Memory} (@code{s-memory.ads})
 
 
@@ -24519,7 +24561,7 @@ calls to this unit may be made for low level allocation uses (for
 example see the body of @cite{GNAT.Tables}).
 
 @node System Multiprocessors s-multip ads,System Multiprocessors Dispatching_Domains s-mudido ads,System Memory s-memory ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id141}@anchor{3cf}@anchor{gnat_rm/the_gnat_library system-multiprocessors-s-multip-ads}@anchor{3d0}
+@anchor{gnat_rm/the_gnat_library id141}@anchor{3d1}@anchor{gnat_rm/the_gnat_library system-multiprocessors-s-multip-ads}@anchor{3d2}
 @section @cite{System.Multiprocessors} (@code{s-multip.ads})
 
 
@@ -24532,7 +24574,7 @@ in GNAT we also make it available in Ada 95 and Ada 2005 (where it is
 technically an implementation-defined addition).
 
 @node System Multiprocessors Dispatching_Domains s-mudido ads,System Partition_Interface s-parint ads,System Multiprocessors s-multip ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library system-multiprocessors-dispatching-domains-s-mudido-ads}@anchor{3d1}@anchor{gnat_rm/the_gnat_library id142}@anchor{3d2}
+@anchor{gnat_rm/the_gnat_library system-multiprocessors-dispatching-domains-s-mudido-ads}@anchor{3d3}@anchor{gnat_rm/the_gnat_library id142}@anchor{3d4}
 @section @cite{System.Multiprocessors.Dispatching_Domains} (@code{s-mudido.ads})
 
 
@@ -24545,7 +24587,7 @@ in GNAT we also make it available in Ada 95 and Ada 2005 (where it is
 technically an implementation-defined addition).
 
 @node System Partition_Interface s-parint ads,System Pool_Global s-pooglo ads,System Multiprocessors Dispatching_Domains s-mudido ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id143}@anchor{3d3}@anchor{gnat_rm/the_gnat_library system-partition-interface-s-parint-ads}@anchor{3d4}
+@anchor{gnat_rm/the_gnat_library id143}@anchor{3d5}@anchor{gnat_rm/the_gnat_library system-partition-interface-s-parint-ads}@anchor{3d6}
 @section @cite{System.Partition_Interface} (@code{s-parint.ads})
 
 
@@ -24558,7 +24600,7 @@ is used primarily in a distribution context when using Annex E
 with @cite{GLADE}.
 
 @node System Pool_Global s-pooglo ads,System Pool_Local s-pooloc ads,System Partition_Interface s-parint ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id144}@anchor{3d5}@anchor{gnat_rm/the_gnat_library system-pool-global-s-pooglo-ads}@anchor{3d6}
+@anchor{gnat_rm/the_gnat_library id144}@anchor{3d7}@anchor{gnat_rm/the_gnat_library system-pool-global-s-pooglo-ads}@anchor{3d8}
 @section @cite{System.Pool_Global} (@code{s-pooglo.ads})
 
 
@@ -24575,7 +24617,7 @@ declared. It uses malloc/free to allocate/free and does not attempt to
 do any automatic reclamation.
 
 @node System Pool_Local s-pooloc ads,System Restrictions s-restri ads,System Pool_Global s-pooglo ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id145}@anchor{3d7}@anchor{gnat_rm/the_gnat_library system-pool-local-s-pooloc-ads}@anchor{3d8}
+@anchor{gnat_rm/the_gnat_library id145}@anchor{3d9}@anchor{gnat_rm/the_gnat_library system-pool-local-s-pooloc-ads}@anchor{3da}
 @section @cite{System.Pool_Local} (@code{s-pooloc.ads})
 
 
@@ -24592,7 +24634,7 @@ a list of allocated blocks, so that all storage allocated for the pool can
 be freed automatically when the pool is finalized.
 
 @node System Restrictions s-restri ads,System Rident s-rident ads,System Pool_Local s-pooloc ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id146}@anchor{3d9}@anchor{gnat_rm/the_gnat_library system-restrictions-s-restri-ads}@anchor{3da}
+@anchor{gnat_rm/the_gnat_library id146}@anchor{3db}@anchor{gnat_rm/the_gnat_library system-restrictions-s-restri-ads}@anchor{3dc}
 @section @cite{System.Restrictions} (@code{s-restri.ads})
 
 
@@ -24608,7 +24650,7 @@ compiler determined information on which restrictions
 are violated by one or more packages in the partition.
 
 @node System Rident s-rident ads,System Strings Stream_Ops s-ststop ads,System Restrictions s-restri ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library system-rident-s-rident-ads}@anchor{3db}@anchor{gnat_rm/the_gnat_library id147}@anchor{3dc}
+@anchor{gnat_rm/the_gnat_library system-rident-s-rident-ads}@anchor{3dd}@anchor{gnat_rm/the_gnat_library id147}@anchor{3de}
 @section @cite{System.Rident} (@code{s-rident.ads})
 
 
@@ -24624,7 +24666,7 @@ since the necessary instantiation is included in
 package System.Restrictions.
 
 @node System Strings Stream_Ops s-ststop ads,System Unsigned_Types s-unstyp ads,System Rident s-rident ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library id148}@anchor{3dd}@anchor{gnat_rm/the_gnat_library system-strings-stream-ops-s-ststop-ads}@anchor{3de}
+@anchor{gnat_rm/the_gnat_library id148}@anchor{3df}@anchor{gnat_rm/the_gnat_library system-strings-stream-ops-s-ststop-ads}@anchor{3e0}
 @section @cite{System.Strings.Stream_Ops} (@code{s-ststop.ads})
 
 
@@ -24640,7 +24682,7 @@ stream attributes are applied to string types, but the subprograms in this
 package can be used directly by application programs.
 
 @node System Unsigned_Types s-unstyp ads,System Wch_Cnv s-wchcnv ads,System Strings Stream_Ops s-ststop ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library system-unsigned-types-s-unstyp-ads}@anchor{3df}@anchor{gnat_rm/the_gnat_library id149}@anchor{3e0}
+@anchor{gnat_rm/the_gnat_library system-unsigned-types-s-unstyp-ads}@anchor{3e1}@anchor{gnat_rm/the_gnat_library id149}@anchor{3e2}
 @section @cite{System.Unsigned_Types} (@code{s-unstyp.ads})
 
 
@@ -24653,7 +24695,7 @@ also contains some related definitions for other specialized types
 used by the compiler in connection with packed array types.
 
 @node System Wch_Cnv s-wchcnv ads,System Wch_Con s-wchcon ads,System Unsigned_Types s-unstyp ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library system-wch-cnv-s-wchcnv-ads}@anchor{3e1}@anchor{gnat_rm/the_gnat_library id150}@anchor{3e2}
+@anchor{gnat_rm/the_gnat_library system-wch-cnv-s-wchcnv-ads}@anchor{3e3}@anchor{gnat_rm/the_gnat_library id150}@anchor{3e4}
 @section @cite{System.Wch_Cnv} (@code{s-wchcnv.ads})
 
 
@@ -24674,7 +24716,7 @@ encoding method.  It uses definitions in
 package @cite{System.Wch_Con}.
 
 @node System Wch_Con s-wchcon ads,,System Wch_Cnv s-wchcnv ads,The GNAT Library
-@anchor{gnat_rm/the_gnat_library system-wch-con-s-wchcon-ads}@anchor{3e3}@anchor{gnat_rm/the_gnat_library id151}@anchor{3e4}
+@anchor{gnat_rm/the_gnat_library system-wch-con-s-wchcon-ads}@anchor{3e5}@anchor{gnat_rm/the_gnat_library id151}@anchor{3e6}
 @section @cite{System.Wch_Con} (@code{s-wchcon.ads})
 
 
@@ -24686,7 +24728,7 @@ in ordinary strings.  These definitions are used by
 the package @cite{System.Wch_Cnv}.
 
 @node Interfacing to Other Languages,Specialized Needs Annexes,The GNAT Library,Top
-@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-other-languages}@anchor{11}@anchor{gnat_rm/interfacing_to_other_languages doc}@anchor{3e5}@anchor{gnat_rm/interfacing_to_other_languages id1}@anchor{3e6}
+@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-other-languages}@anchor{11}@anchor{gnat_rm/interfacing_to_other_languages doc}@anchor{3e7}@anchor{gnat_rm/interfacing_to_other_languages id1}@anchor{3e8}
 @chapter Interfacing to Other Languages
 
 
@@ -24704,7 +24746,7 @@ provided.
 @end menu
 
 @node Interfacing to C,Interfacing to C++,,Interfacing to Other Languages
-@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-c}@anchor{3e7}@anchor{gnat_rm/interfacing_to_other_languages id2}@anchor{3e8}
+@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-c}@anchor{3e9}@anchor{gnat_rm/interfacing_to_other_languages id2}@anchor{3ea}
 @section Interfacing to C
 
 
@@ -24842,7 +24884,7 @@ of the length corresponding to the @code{type'Size} value in Ada.
 @end itemize
 
 @node Interfacing to C++,Interfacing to COBOL,Interfacing to C,Interfacing to Other Languages
-@anchor{gnat_rm/interfacing_to_other_languages id4}@anchor{3e9}@anchor{gnat_rm/interfacing_to_other_languages id3}@anchor{45}
+@anchor{gnat_rm/interfacing_to_other_languages id4}@anchor{3eb}@anchor{gnat_rm/interfacing_to_other_languages id3}@anchor{45}
 @section Interfacing to C++
 
 
@@ -24899,7 +24941,7 @@ The @cite{External_Name} is the name of the C++ RTTI symbol. You can then
 cover a specific C++ exception in an exception handler.
 
 @node Interfacing to COBOL,Interfacing to Fortran,Interfacing to C++,Interfacing to Other Languages
-@anchor{gnat_rm/interfacing_to_other_languages id5}@anchor{3ea}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-cobol}@anchor{3eb}
+@anchor{gnat_rm/interfacing_to_other_languages id5}@anchor{3ec}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-cobol}@anchor{3ed}
 @section Interfacing to COBOL
 
 
@@ -24907,7 +24949,7 @@ Interfacing to COBOL is achieved as described in section B.4 of
 the Ada Reference Manual.
 
 @node Interfacing to Fortran,Interfacing to non-GNAT Ada code,Interfacing to COBOL,Interfacing to Other Languages
-@anchor{gnat_rm/interfacing_to_other_languages id6}@anchor{3ec}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-fortran}@anchor{3ed}
+@anchor{gnat_rm/interfacing_to_other_languages id6}@anchor{3ee}@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-fortran}@anchor{3ef}
 @section Interfacing to Fortran
 
 
@@ -24917,7 +24959,7 @@ multi-dimensional array causes the array to be stored in column-major
 order as required for convenient interface to Fortran.
 
 @node Interfacing to non-GNAT Ada code,,Interfacing to Fortran,Interfacing to Other Languages
-@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-non-gnat-ada-code}@anchor{3ee}@anchor{gnat_rm/interfacing_to_other_languages id7}@anchor{3ef}
+@anchor{gnat_rm/interfacing_to_other_languages interfacing-to-non-gnat-ada-code}@anchor{3f0}@anchor{gnat_rm/interfacing_to_other_languages id7}@anchor{3f1}
 @section Interfacing to non-GNAT Ada code
 
 
@@ -24941,7 +24983,7 @@ values or simple record types without variants, or simple array
 types with fixed bounds.
 
 @node Specialized Needs Annexes,Implementation of Specific Ada Features,Interfacing to Other Languages,Top
-@anchor{gnat_rm/specialized_needs_annexes specialized-needs-annexes}@anchor{12}@anchor{gnat_rm/specialized_needs_annexes doc}@anchor{3f0}@anchor{gnat_rm/specialized_needs_annexes id1}@anchor{3f1}
+@anchor{gnat_rm/specialized_needs_annexes specialized-needs-annexes}@anchor{12}@anchor{gnat_rm/specialized_needs_annexes doc}@anchor{3f2}@anchor{gnat_rm/specialized_needs_annexes id1}@anchor{3f3}
 @chapter Specialized Needs Annexes
 
 
@@ -24982,7 +25024,7 @@ in Ada 2005) is fully implemented.
 @end table
 
 @node Implementation of Specific Ada Features,Implementation of Ada 2012 Features,Specialized Needs Annexes,Top
-@anchor{gnat_rm/implementation_of_specific_ada_features implementation-of-specific-ada-features}@anchor{13}@anchor{gnat_rm/implementation_of_specific_ada_features doc}@anchor{3f2}@anchor{gnat_rm/implementation_of_specific_ada_features id1}@anchor{3f3}
+@anchor{gnat_rm/implementation_of_specific_ada_features implementation-of-specific-ada-features}@anchor{13}@anchor{gnat_rm/implementation_of_specific_ada_features doc}@anchor{3f4}@anchor{gnat_rm/implementation_of_specific_ada_features id1}@anchor{3f5}
 @chapter Implementation of Specific Ada Features
 
 
@@ -25000,7 +25042,7 @@ facilities.
 @end menu
 
 @node Machine Code Insertions,GNAT Implementation of Tasking,,Implementation of Specific Ada Features
-@anchor{gnat_rm/implementation_of_specific_ada_features machine-code-insertions}@anchor{156}@anchor{gnat_rm/implementation_of_specific_ada_features id2}@anchor{3f4}
+@anchor{gnat_rm/implementation_of_specific_ada_features machine-code-insertions}@anchor{158}@anchor{gnat_rm/implementation_of_specific_ada_features id2}@anchor{3f6}
 @section Machine Code Insertions
 
 
@@ -25168,7 +25210,7 @@ according to normal visibility rules. In particular if there is no
 qualification is required.
 
 @node GNAT Implementation of Tasking,GNAT Implementation of Shared Passive Packages,Machine Code Insertions,Implementation of Specific Ada Features
-@anchor{gnat_rm/implementation_of_specific_ada_features id3}@anchor{3f5}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-tasking}@anchor{3f6}
+@anchor{gnat_rm/implementation_of_specific_ada_features id3}@anchor{3f7}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-tasking}@anchor{3f8}
 @section GNAT Implementation of Tasking
 
 
@@ -25183,7 +25225,7 @@ to compliance with the Real-Time Systems Annex.
 @end menu
 
 @node Mapping Ada Tasks onto the Underlying Kernel Threads,Ensuring Compliance with the Real-Time Annex,,GNAT Implementation of Tasking
-@anchor{gnat_rm/implementation_of_specific_ada_features mapping-ada-tasks-onto-the-underlying-kernel-threads}@anchor{3f7}@anchor{gnat_rm/implementation_of_specific_ada_features id4}@anchor{3f8}
+@anchor{gnat_rm/implementation_of_specific_ada_features mapping-ada-tasks-onto-the-underlying-kernel-threads}@anchor{3f9}@anchor{gnat_rm/implementation_of_specific_ada_features id4}@anchor{3fa}
 @subsection Mapping Ada Tasks onto the Underlying Kernel Threads
 
 
@@ -25252,7 +25294,7 @@ support this functionality when the parent contains more than one task.
 @geindex Forking a new process
 
 @node Ensuring Compliance with the Real-Time Annex,,Mapping Ada Tasks onto the Underlying Kernel Threads,GNAT Implementation of Tasking
-@anchor{gnat_rm/implementation_of_specific_ada_features id5}@anchor{3f9}@anchor{gnat_rm/implementation_of_specific_ada_features ensuring-compliance-with-the-real-time-annex}@anchor{3fa}
+@anchor{gnat_rm/implementation_of_specific_ada_features id5}@anchor{3fb}@anchor{gnat_rm/implementation_of_specific_ada_features ensuring-compliance-with-the-real-time-annex}@anchor{3fc}
 @subsection Ensuring Compliance with the Real-Time Annex
 
 
@@ -25301,7 +25343,7 @@ that were ready to execute in the priority queue where R has been
 placed at the end.
 
 @node GNAT Implementation of Shared Passive Packages,Code Generation for Array Aggregates,GNAT Implementation of Tasking,Implementation of Specific Ada Features
-@anchor{gnat_rm/implementation_of_specific_ada_features id6}@anchor{3fb}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-shared-passive-packages}@anchor{3fc}
+@anchor{gnat_rm/implementation_of_specific_ada_features id6}@anchor{3fd}@anchor{gnat_rm/implementation_of_specific_ada_features gnat-implementation-of-shared-passive-packages}@anchor{3fe}
 @section GNAT Implementation of Shared Passive Packages
 
 
@@ -25402,7 +25444,7 @@ GNAT supports shared passive packages on all platforms
 except for OpenVMS.
 
 @node Code Generation for Array Aggregates,The Size of Discriminated Records with Default Discriminants,GNAT Implementation of Shared Passive Packages,Implementation of Specific Ada Features
-@anchor{gnat_rm/implementation_of_specific_ada_features code-generation-for-array-aggregates}@anchor{3fd}@anchor{gnat_rm/implementation_of_specific_ada_features id7}@anchor{3fe}
+@anchor{gnat_rm/implementation_of_specific_ada_features code-generation-for-array-aggregates}@anchor{3ff}@anchor{gnat_rm/implementation_of_specific_ada_features id7}@anchor{400}
 @section Code Generation for Array Aggregates
 
 
@@ -25433,7 +25475,7 @@ component values and static subtypes also lead to simpler code.
 @end menu
 
 @node Static constant aggregates with static bounds,Constant aggregates with unconstrained nominal types,,Code Generation for Array Aggregates
-@anchor{gnat_rm/implementation_of_specific_ada_features static-constant-aggregates-with-static-bounds}@anchor{3ff}@anchor{gnat_rm/implementation_of_specific_ada_features id8}@anchor{400}
+@anchor{gnat_rm/implementation_of_specific_ada_features static-constant-aggregates-with-static-bounds}@anchor{401}@anchor{gnat_rm/implementation_of_specific_ada_features id8}@anchor{402}
 @subsection Static constant aggregates with static bounds
 
 
@@ -25480,7 +25522,7 @@ Zero2: constant two_dim := (others => (others => 0));
 @end example
 
 @node Constant aggregates with unconstrained nominal types,Aggregates with static bounds,Static constant aggregates with static bounds,Code Generation for Array Aggregates
-@anchor{gnat_rm/implementation_of_specific_ada_features constant-aggregates-with-unconstrained-nominal-types}@anchor{401}@anchor{gnat_rm/implementation_of_specific_ada_features id9}@anchor{402}
+@anchor{gnat_rm/implementation_of_specific_ada_features constant-aggregates-with-unconstrained-nominal-types}@anchor{403}@anchor{gnat_rm/implementation_of_specific_ada_features id9}@anchor{404}
 @subsection Constant aggregates with unconstrained nominal types
 
 
@@ -25495,7 +25537,7 @@ Cr_Unc : constant One_Unc := (12,24,36);
 @end example
 
 @node Aggregates with static bounds,Aggregates with nonstatic bounds,Constant aggregates with unconstrained nominal types,Code Generation for Array Aggregates
-@anchor{gnat_rm/implementation_of_specific_ada_features id10}@anchor{403}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-static-bounds}@anchor{404}
+@anchor{gnat_rm/implementation_of_specific_ada_features id10}@anchor{405}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-static-bounds}@anchor{406}
 @subsection Aggregates with static bounds
 
 
@@ -25523,7 +25565,7 @@ end loop;
 @end example
 
 @node Aggregates with nonstatic bounds,Aggregates in assignment statements,Aggregates with static bounds,Code Generation for Array Aggregates
-@anchor{gnat_rm/implementation_of_specific_ada_features id11}@anchor{405}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-nonstatic-bounds}@anchor{406}
+@anchor{gnat_rm/implementation_of_specific_ada_features id11}@anchor{407}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-with-nonstatic-bounds}@anchor{408}
 @subsection Aggregates with nonstatic bounds
 
 
@@ -25534,7 +25576,7 @@ have to be applied to sub-arrays individually, if they do not have statically
 compatible subtypes.
 
 @node Aggregates in assignment statements,,Aggregates with nonstatic bounds,Code Generation for Array Aggregates
-@anchor{gnat_rm/implementation_of_specific_ada_features id12}@anchor{407}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-in-assignment-statements}@anchor{408}
+@anchor{gnat_rm/implementation_of_specific_ada_features id12}@anchor{409}@anchor{gnat_rm/implementation_of_specific_ada_features aggregates-in-assignment-statements}@anchor{40a}
 @subsection Aggregates in assignment statements
 
 
@@ -25576,7 +25618,7 @@ a temporary (created either by the front-end or the code generator) and then
 that temporary will be copied onto the target.
 
 @node The Size of Discriminated Records with Default Discriminants,Strict Conformance to the Ada Reference Manual,Code Generation for Array Aggregates,Implementation of Specific Ada Features
-@anchor{gnat_rm/implementation_of_specific_ada_features id13}@anchor{409}@anchor{gnat_rm/implementation_of_specific_ada_features the-size-of-discriminated-records-with-default-discriminants}@anchor{40a}
+@anchor{gnat_rm/implementation_of_specific_ada_features id13}@anchor{40b}@anchor{gnat_rm/implementation_of_specific_ada_features the-size-of-discriminated-records-with-default-discriminants}@anchor{40c}
 @section The Size of Discriminated Records with Default Discriminants
 
 
@@ -25656,7 +25698,7 @@ say) must be consistent, so it is imperative that the object, once created,
 remain invariant.
 
 @node Strict Conformance to the Ada Reference Manual,,The Size of Discriminated Records with Default Discriminants,Implementation of Specific Ada Features
-@anchor{gnat_rm/implementation_of_specific_ada_features strict-conformance-to-the-ada-reference-manual}@anchor{40b}@anchor{gnat_rm/implementation_of_specific_ada_features id14}@anchor{40c}
+@anchor{gnat_rm/implementation_of_specific_ada_features strict-conformance-to-the-ada-reference-manual}@anchor{40d}@anchor{gnat_rm/implementation_of_specific_ada_features id14}@anchor{40e}
 @section Strict Conformance to the Ada Reference Manual
 
 
@@ -25683,7 +25725,7 @@ behavior (although at the cost of a significant performance penalty), so
 infinite and NaN values are properly generated.
 
 @node Implementation of Ada 2012 Features,Obsolescent Features,Implementation of Specific Ada Features,Top
-@anchor{gnat_rm/implementation_of_ada_2012_features doc}@anchor{40d}@anchor{gnat_rm/implementation_of_ada_2012_features implementation-of-ada-2012-features}@anchor{14}@anchor{gnat_rm/implementation_of_ada_2012_features id1}@anchor{40e}
+@anchor{gnat_rm/implementation_of_ada_2012_features doc}@anchor{40f}@anchor{gnat_rm/implementation_of_ada_2012_features implementation-of-ada-2012-features}@anchor{14}@anchor{gnat_rm/implementation_of_ada_2012_features id1}@anchor{410}
 @chapter Implementation of Ada 2012 Features
 
 
@@ -27849,7 +27891,7 @@ RM References:  H.04 (8/1)
 @end itemize
 
 @node Obsolescent Features,Compatibility and Porting Guide,Implementation of Ada 2012 Features,Top
-@anchor{gnat_rm/obsolescent_features id1}@anchor{40f}@anchor{gnat_rm/obsolescent_features doc}@anchor{410}@anchor{gnat_rm/obsolescent_features obsolescent-features}@anchor{15}
+@anchor{gnat_rm/obsolescent_features id1}@anchor{411}@anchor{gnat_rm/obsolescent_features doc}@anchor{412}@anchor{gnat_rm/obsolescent_features obsolescent-features}@anchor{15}
 @chapter Obsolescent Features
 
 
@@ -27868,7 +27910,7 @@ compatibility purposes.
 @end menu
 
 @node pragma No_Run_Time,pragma Ravenscar,,Obsolescent Features
-@anchor{gnat_rm/obsolescent_features id2}@anchor{411}@anchor{gnat_rm/obsolescent_features pragma-no-run-time}@anchor{412}
+@anchor{gnat_rm/obsolescent_features id2}@anchor{413}@anchor{gnat_rm/obsolescent_features pragma-no-run-time}@anchor{414}
 @section pragma No_Run_Time
 
 
@@ -27881,7 +27923,7 @@ preferred usage is to use an appropriately configured run-time that
 includes just those features that are to be made accessible.
 
 @node pragma Ravenscar,pragma Restricted_Run_Time,pragma No_Run_Time,Obsolescent Features
-@anchor{gnat_rm/obsolescent_features id3}@anchor{413}@anchor{gnat_rm/obsolescent_features pragma-ravenscar}@anchor{414}
+@anchor{gnat_rm/obsolescent_features id3}@anchor{415}@anchor{gnat_rm/obsolescent_features pragma-ravenscar}@anchor{416}
 @section pragma Ravenscar
 
 
@@ -27890,7 +27932,7 @@ The pragma @cite{Ravenscar} has exactly the same effect as pragma
 is part of the new Ada 2005 standard.
 
 @node pragma Restricted_Run_Time,pragma Task_Info,pragma Ravenscar,Obsolescent Features
-@anchor{gnat_rm/obsolescent_features pragma-restricted-run-time}@anchor{415}@anchor{gnat_rm/obsolescent_features id4}@anchor{416}
+@anchor{gnat_rm/obsolescent_features pragma-restricted-run-time}@anchor{417}@anchor{gnat_rm/obsolescent_features id4}@anchor{418}
 @section pragma Restricted_Run_Time
 
 
@@ -27900,7 +27942,7 @@ preferred since the Ada 2005 pragma @cite{Profile} is intended for
 this kind of implementation dependent addition.
 
 @node pragma Task_Info,package System Task_Info s-tasinf ads,pragma Restricted_Run_Time,Obsolescent Features
-@anchor{gnat_rm/obsolescent_features pragma-task-info}@anchor{417}@anchor{gnat_rm/obsolescent_features id5}@anchor{418}
+@anchor{gnat_rm/obsolescent_features pragma-task-info}@anchor{419}@anchor{gnat_rm/obsolescent_features id5}@anchor{41a}
 @section pragma Task_Info
 
 
@@ -27926,7 +27968,7 @@ in the spec of package System.Task_Info in the runtime
 library.
 
 @node package System Task_Info s-tasinf ads,,pragma Task_Info,Obsolescent Features
-@anchor{gnat_rm/obsolescent_features package-system-task-info}@anchor{419}@anchor{gnat_rm/obsolescent_features package-system-task-info-s-tasinf-ads}@anchor{41a}
+@anchor{gnat_rm/obsolescent_features package-system-task-info}@anchor{41b}@anchor{gnat_rm/obsolescent_features package-system-task-info-s-tasinf-ads}@anchor{41c}
 @section package System.Task_Info (@code{s-tasinf.ads})
 
 
@@ -27936,7 +27978,7 @@ to support the @cite{Task_Info} pragma. The predefined Ada package
 standard replacement for GNAT's @cite{Task_Info} functionality.
 
 @node Compatibility and Porting Guide,GNU Free Documentation License,Obsolescent Features,Top
-@anchor{gnat_rm/compatibility_and_porting_guide compatibility-and-porting-guide}@anchor{16}@anchor{gnat_rm/compatibility_and_porting_guide doc}@anchor{41b}@anchor{gnat_rm/compatibility_and_porting_guide id1}@anchor{41c}
+@anchor{gnat_rm/compatibility_and_porting_guide compatibility-and-porting-guide}@anchor{16}@anchor{gnat_rm/compatibility_and_porting_guide doc}@anchor{41d}@anchor{gnat_rm/compatibility_and_porting_guide id1}@anchor{41e}
 @chapter Compatibility and Porting Guide
 
 
@@ -27958,7 +28000,7 @@ applications developed in other Ada environments.
 @end menu
 
 @node Writing Portable Fixed-Point Declarations,Compatibility with Ada 83,,Compatibility and Porting Guide
-@anchor{gnat_rm/compatibility_and_porting_guide id2}@anchor{41d}@anchor{gnat_rm/compatibility_and_porting_guide writing-portable-fixed-point-declarations}@anchor{41e}
+@anchor{gnat_rm/compatibility_and_porting_guide id2}@anchor{41f}@anchor{gnat_rm/compatibility_and_porting_guide writing-portable-fixed-point-declarations}@anchor{420}
 @section Writing Portable Fixed-Point Declarations
 
 
@@ -28080,7 +28122,7 @@ If you follow this scheme you will be guaranteed that your fixed-point
 types will be portable.
 
 @node Compatibility with Ada 83,Compatibility between Ada 95 and Ada 2005,Writing Portable Fixed-Point Declarations,Compatibility and Porting Guide
-@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-ada-83}@anchor{41f}@anchor{gnat_rm/compatibility_and_porting_guide id3}@anchor{420}
+@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-ada-83}@anchor{421}@anchor{gnat_rm/compatibility_and_porting_guide id3}@anchor{422}
 @section Compatibility with Ada 83
 
 
@@ -28108,7 +28150,7 @@ following subsections treat the most likely issues to be encountered.
 @end menu
 
 @node Legal Ada 83 programs that are illegal in Ada 95,More deterministic semantics,,Compatibility with Ada 83
-@anchor{gnat_rm/compatibility_and_porting_guide id4}@anchor{421}@anchor{gnat_rm/compatibility_and_porting_guide legal-ada-83-programs-that-are-illegal-in-ada-95}@anchor{422}
+@anchor{gnat_rm/compatibility_and_porting_guide id4}@anchor{423}@anchor{gnat_rm/compatibility_and_porting_guide legal-ada-83-programs-that-are-illegal-in-ada-95}@anchor{424}
 @subsection Legal Ada 83 programs that are illegal in Ada 95
 
 
@@ -28208,7 +28250,7 @@ the fix is usually simply to add the @cite{(<>)} to the generic declaration.
 @end itemize
 
 @node More deterministic semantics,Changed semantics,Legal Ada 83 programs that are illegal in Ada 95,Compatibility with Ada 83
-@anchor{gnat_rm/compatibility_and_porting_guide more-deterministic-semantics}@anchor{423}@anchor{gnat_rm/compatibility_and_porting_guide id5}@anchor{424}
+@anchor{gnat_rm/compatibility_and_porting_guide more-deterministic-semantics}@anchor{425}@anchor{gnat_rm/compatibility_and_porting_guide id5}@anchor{426}
 @subsection More deterministic semantics
 
 
@@ -28236,7 +28278,7 @@ which open select branches are executed.
 @end itemize
 
 @node Changed semantics,Other language compatibility issues,More deterministic semantics,Compatibility with Ada 83
-@anchor{gnat_rm/compatibility_and_porting_guide id6}@anchor{425}@anchor{gnat_rm/compatibility_and_porting_guide changed-semantics}@anchor{426}
+@anchor{gnat_rm/compatibility_and_porting_guide id6}@anchor{427}@anchor{gnat_rm/compatibility_and_porting_guide changed-semantics}@anchor{428}
 @subsection Changed semantics
 
 
@@ -28278,7 +28320,7 @@ covers only the restricted range.
 @end itemize
 
 @node Other language compatibility issues,,Changed semantics,Compatibility with Ada 83
-@anchor{gnat_rm/compatibility_and_porting_guide other-language-compatibility-issues}@anchor{427}@anchor{gnat_rm/compatibility_and_porting_guide id7}@anchor{428}
+@anchor{gnat_rm/compatibility_and_porting_guide other-language-compatibility-issues}@anchor{429}@anchor{gnat_rm/compatibility_and_porting_guide id7}@anchor{42a}
 @subsection Other language compatibility issues
 
 
@@ -28311,7 +28353,7 @@ include @cite{pragma Interface} and the floating point type attributes
 @end itemize
 
 @node Compatibility between Ada 95 and Ada 2005,Implementation-dependent characteristics,Compatibility with Ada 83,Compatibility and Porting Guide
-@anchor{gnat_rm/compatibility_and_porting_guide compatibility-between-ada-95-and-ada-2005}@anchor{429}@anchor{gnat_rm/compatibility_and_porting_guide id8}@anchor{42a}
+@anchor{gnat_rm/compatibility_and_porting_guide compatibility-between-ada-95-and-ada-2005}@anchor{42b}@anchor{gnat_rm/compatibility_and_porting_guide id8}@anchor{42c}
 @section Compatibility between Ada 95 and Ada 2005
 
 
@@ -28383,7 +28425,7 @@ can declare a function returning a value from an anonymous access type.
 @end itemize
 
 @node Implementation-dependent characteristics,Compatibility with Other Ada Systems,Compatibility between Ada 95 and Ada 2005,Compatibility and Porting Guide
-@anchor{gnat_rm/compatibility_and_porting_guide implementation-dependent-characteristics}@anchor{42b}@anchor{gnat_rm/compatibility_and_porting_guide id9}@anchor{42c}
+@anchor{gnat_rm/compatibility_and_porting_guide implementation-dependent-characteristics}@anchor{42d}@anchor{gnat_rm/compatibility_and_porting_guide id9}@anchor{42e}
 @section Implementation-dependent characteristics
 
 
@@ -28406,7 +28448,7 @@ transition from certain Ada 83 compilers.
 @end menu
 
 @node Implementation-defined pragmas,Implementation-defined attributes,,Implementation-dependent characteristics
-@anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-pragmas}@anchor{42d}@anchor{gnat_rm/compatibility_and_porting_guide id10}@anchor{42e}
+@anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-pragmas}@anchor{42f}@anchor{gnat_rm/compatibility_and_porting_guide id10}@anchor{430}
 @subsection Implementation-defined pragmas
 
 
@@ -28428,7 +28470,7 @@ avoiding compiler rejection of units that contain such pragmas; they are not
 relevant in a GNAT context and hence are not otherwise implemented.
 
 @node Implementation-defined attributes,Libraries,Implementation-defined pragmas,Implementation-dependent characteristics
-@anchor{gnat_rm/compatibility_and_porting_guide id11}@anchor{42f}@anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-attributes}@anchor{430}
+@anchor{gnat_rm/compatibility_and_porting_guide id11}@anchor{431}@anchor{gnat_rm/compatibility_and_porting_guide implementation-defined-attributes}@anchor{432}
 @subsection Implementation-defined attributes
 
 
@@ -28442,7 +28484,7 @@ Ada 83, GNAT supplies the attributes @cite{Bit}, @cite{Machine_Size} and
 @cite{Type_Class}.
 
 @node Libraries,Elaboration order,Implementation-defined attributes,Implementation-dependent characteristics
-@anchor{gnat_rm/compatibility_and_porting_guide libraries}@anchor{431}@anchor{gnat_rm/compatibility_and_porting_guide id12}@anchor{432}
+@anchor{gnat_rm/compatibility_and_porting_guide libraries}@anchor{433}@anchor{gnat_rm/compatibility_and_porting_guide id12}@anchor{434}
 @subsection Libraries
 
 
@@ -28471,7 +28513,7 @@ be preferable to retrofit the application using modular types.
 @end itemize
 
 @node Elaboration order,Target-specific aspects,Libraries,Implementation-dependent characteristics
-@anchor{gnat_rm/compatibility_and_porting_guide elaboration-order}@anchor{433}@anchor{gnat_rm/compatibility_and_porting_guide id13}@anchor{434}
+@anchor{gnat_rm/compatibility_and_porting_guide elaboration-order}@anchor{435}@anchor{gnat_rm/compatibility_and_porting_guide id13}@anchor{436}
 @subsection Elaboration order
 
 
@@ -28507,7 +28549,7 @@ pragmas either globally (as an effect of the @emph{-gnatE} switch) or locally
 @end itemize
 
 @node Target-specific aspects,,Elaboration order,Implementation-dependent characteristics
-@anchor{gnat_rm/compatibility_and_porting_guide target-specific-aspects}@anchor{435}@anchor{gnat_rm/compatibility_and_porting_guide id14}@anchor{436}
+@anchor{gnat_rm/compatibility_and_porting_guide target-specific-aspects}@anchor{437}@anchor{gnat_rm/compatibility_and_porting_guide id14}@anchor{438}
 @subsection Target-specific aspects
 
 
@@ -28520,10 +28562,10 @@ on the robustness of the original design.  Moreover, Ada 95 (and thus
 Ada 2005 and Ada 2012) are sometimes
 incompatible with typical Ada 83 compiler practices regarding implicit
 packing, the meaning of the Size attribute, and the size of access values.
-GNAT's approach to these issues is described in @ref{437,,Representation Clauses}.
+GNAT's approach to these issues is described in @ref{439,,Representation Clauses}.
 
 @node Compatibility with Other Ada Systems,Representation Clauses,Implementation-dependent characteristics,Compatibility and Porting Guide
-@anchor{gnat_rm/compatibility_and_porting_guide id15}@anchor{438}@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-other-ada-systems}@anchor{439}
+@anchor{gnat_rm/compatibility_and_porting_guide id15}@anchor{43a}@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-other-ada-systems}@anchor{43b}
 @section Compatibility with Other Ada Systems
 
 
@@ -28566,7 +28608,7 @@ far beyond this minimal set, as described in the next section.
 @end itemize
 
 @node Representation Clauses,Compatibility with HP Ada 83,Compatibility with Other Ada Systems,Compatibility and Porting Guide
-@anchor{gnat_rm/compatibility_and_porting_guide representation-clauses}@anchor{437}@anchor{gnat_rm/compatibility_and_porting_guide id16}@anchor{43a}
+@anchor{gnat_rm/compatibility_and_porting_guide representation-clauses}@anchor{439}@anchor{gnat_rm/compatibility_and_porting_guide id16}@anchor{43c}
 @section Representation Clauses
 
 
@@ -28659,7 +28701,7 @@ with thin pointers.
 @end itemize
 
 @node Compatibility with HP Ada 83,,Representation Clauses,Compatibility and Porting Guide
-@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-hp-ada-83}@anchor{43b}@anchor{gnat_rm/compatibility_and_porting_guide id17}@anchor{43c}
+@anchor{gnat_rm/compatibility_and_porting_guide compatibility-with-hp-ada-83}@anchor{43d}@anchor{gnat_rm/compatibility_and_porting_guide id17}@anchor{43e}
 @section Compatibility with HP Ada 83
 
 
@@ -28689,7 +28731,7 @@ extension of package System.
 @end itemize
 
 @node GNU Free Documentation License,Index,Compatibility and Porting Guide,Top
-@anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{43d}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{43e}
+@anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{43f}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{440}
 @chapter GNU Free Documentation License
 
 
diff --git a/gcc/ada/gnat_ugn.texi b/gcc/ada/gnat_ugn.texi
index 0074b1bc650..dc9c1418953 100644
--- a/gcc/ada/gnat_ugn.texi
+++ b/gcc/ada/gnat_ugn.texi
@@ -21,7 +21,7 @@
 
 @copying
 @quotation
-GNAT User's Guide for Native Platforms , April 21, 2016
+GNAT User's Guide for Native Platforms , July 04, 2016
 
 AdaCore
 
@@ -68,8 +68,6 @@ included in the section entitled @ref{1,,GNU Free Documentation License}.
 * Getting Started with GNAT:: 
 * The GNAT Compilation Model:: 
 * Building Executable Programs with GNAT:: 
-* GNAT Project Manager:: 
-* Tools Supporting Project Files:: 
 * GNAT Utility Programs:: 
 * GNAT and Program Execution:: 
 * Platform-Specific Information:: 
@@ -310,108 +308,6 @@ Using the GNU make Utility
 * Generating the Command Line Switches:: 
 * Overcoming Command Line Length Limits:: 
 
-GNAT Project Manager
-
-* Introduction:: 
-* Building With Projects:: 
-* Organizing Projects into Subsystems:: 
-* Scenarios in Projects:: 
-* Library Projects:: 
-* Project Extension:: 
-* Aggregate Projects:: 
-* Aggregate Library Projects:: 
-* Project File Reference:: 
-
-Building With Projects
-
-* Source Files and Directories:: 
-* Duplicate Sources in Projects:: 
-* Object and Exec Directory:: 
-* Main Subprograms:: 
-* Tools Options in Project Files:: 
-* Compiling with Project Files:: 
-* Executable File Names:: 
-* Avoid Duplication With Variables:: 
-* Naming Schemes:: 
-* Installation:: 
-* Distributed support:: 
-
-Organizing Projects into Subsystems
-
-* Project Dependencies:: 
-* Cyclic Project Dependencies:: 
-* Sharing Between Projects:: 
-* Global Attributes:: 
-
-Library Projects
-
-* Building Libraries:: 
-* Using Library Projects:: 
-* Stand-alone Library Projects:: 
-* Installing a library with project files:: 
-
-Project Extension
-
-* Project Hierarchy Extension:: 
-
-Aggregate Projects
-
-* Building all main programs from a single project tree:: 
-* Building a set of projects with a single command:: 
-* Define a build environment:: 
-* Performance improvements in builder:: 
-* Syntax of aggregate projects:: 
-* package Builder in aggregate projects:: 
-
-Aggregate Library Projects
-
-* Building aggregate library projects:: 
-* Syntax of aggregate library projects:: 
-
-Project File Reference
-
-* Project Declaration:: 
-* Qualified Projects:: 
-* Declarations:: 
-* Packages:: 
-* Expressions:: 
-* External Values:: 
-* Typed String Declaration:: 
-* Variables:: 
-* Case Constructions:: 
-* Attributes:: 
-
-Attributes
-
-* Project Level Attributes:: 
-* Package Binder Attributes:: 
-* Package Builder Attributes:: 
-* Package Clean Attributes:: 
-* Package Compiler Attributes:: 
-* Package Cross_Reference Attributes:: 
-* Package Finder Attributes:: 
-* Package gnatls Attributes:: 
-* Package IDE Attributes:: 
-* Package Install Attributes:: 
-* Package Linker Attributes:: 
-* Package Naming Attributes:: 
-* Package Remote Attributes:: 
-* Package Stack Attributes:: 
-* Package Synchronize Attributes:: 
-
-Tools Supporting Project Files
-
-* gnatmake and Project Files:: 
-* The GNAT Driver and Project Files:: 
-
-gnatmake and Project Files
-
-* Switches Related to Project Files:: 
-* Switches and Project Files:: 
-* Specifying Configuration Pragmas:: 
-* Project Files and Main Subprograms:: 
-* Library Project Files:: 
-
 GNAT Utility Programs
 
 * The File Cleanup Utility gnatclean:: 
@@ -568,6 +464,7 @@ Microsoft Windows Topics
 * Using a network installation of GNAT:: 
 * CONSOLE and WINDOWS subsystems:: 
 * Temporary Files:: 
+* Disabling Command Line Argument Expansion:: 
 * Mixed-Language Programming on Windows:: 
 * Windows Specific Add-Ons:: 
 
@@ -717,19 +614,11 @@ main GNAT tools to build executable programs, and it also gives examples of
 using the GNU make utility with GNAT.
 
 @item 
-@ref{b,,GNAT Project Manager} describes how to use project files
-to organize large projects.
-
-@item 
-@ref{c,,Tools Supporting Project Files} described how to use the project
-facility in conjunction with various GNAT tools.
-
-@item 
-@ref{d,,GNAT Utility Programs} explains the various utility programs that
+@ref{b,,GNAT Utility Programs} explains the various utility programs that
 are included in the GNAT environment
 
 @item 
-@ref{e,,GNAT and Program Execution} covers a number of topics related to
+@ref{c,,GNAT and Program Execution} covers a number of topics related to
 running, debugging, and tuning the performace of programs developed
 with GNAT
 @end itemize
@@ -740,25 +629,25 @@ Appendices cover several additional topics:
 @itemize *
 
 @item 
-@ref{f,,Platform-Specific Information} describes the different run-time
+@ref{d,,Platform-Specific Information} describes the different run-time
 library implementations and also presents information on how to use
 GNAT on several specific platforms
 
 @item 
-@ref{10,,Example of Binder Output File} shows the source code for the binder
+@ref{e,,Example of Binder Output File} shows the source code for the binder
 output file for a sample program.
 
 @item 
-@ref{11,,Elaboration Order Handling in GNAT} describes how GNAT helps
+@ref{f,,Elaboration Order Handling in GNAT} describes how GNAT helps
 you deal with elaboration order issues.
 
 @item 
-@ref{12,,Inline Assembler} shows how to use the inline assembly facility
+@ref{10,,Inline Assembler} shows how to use the inline assembly facility
 in an Ada program.
 @end itemize
 
 @node What You Should Know before Reading This Guide,Related Information,What This Guide Contains,About This Guide
-@anchor{gnat_ugn/about_this_guide what-you-should-know-before-reading-this-guide}@anchor{13}
+@anchor{gnat_ugn/about_this_guide what-you-should-know-before-reading-this-guide}@anchor{11}
 @section What You Should Know before Reading This Guide
 
 
@@ -775,7 +664,7 @@ Reference manuals for Ada 95, Ada 2005, and Ada 2012 are included in
 the GNAT documentation package.
 
 @node Related Information,A Note to Readers of Previous Versions of the Manual,What You Should Know before Reading This Guide,About This Guide
-@anchor{gnat_ugn/about_this_guide related-information}@anchor{14}
+@anchor{gnat_ugn/about_this_guide related-information}@anchor{12}
 @section Related Information
 
 
@@ -813,7 +702,7 @@ environment Emacs.
 @end itemize
 
 @node A Note to Readers of Previous Versions of the Manual,Conventions,Related Information,About This Guide
-@anchor{gnat_ugn/about_this_guide a-note-to-readers-of-previous-versions-of-the-manual}@anchor{15}
+@anchor{gnat_ugn/about_this_guide a-note-to-readers-of-previous-versions-of-the-manual}@anchor{13}
 @section A Note to Readers of Previous Versions of the Manual
 
 
@@ -838,20 +727,20 @@ the following material:
 The @cite{gnatname}, @cite{gnatkr}, and @cite{gnatchop} tools
 
 @item 
-@ref{16,,Configuration Pragmas}
+@ref{14,,Configuration Pragmas}
 
 @item 
-@ref{17,,GNAT and Libraries}
+@ref{15,,GNAT and Libraries}
 
 @item 
-@ref{18,,Conditional Compilation} including @ref{19,,Preprocessing with gnatprep}
-and @ref{1a,,Integrated Preprocessing}
+@ref{16,,Conditional Compilation} including @ref{17,,Preprocessing with gnatprep}
+and @ref{18,,Integrated Preprocessing}
 
 @item 
-@ref{1b,,Generating Ada Bindings for C and C++ headers}
+@ref{19,,Generating Ada Bindings for C and C++ headers}
 
 @item 
-@ref{1c,,Using GNAT Files with External Tools}
+@ref{1a,,Using GNAT Files with External Tools}
 @end itemize
 
 @item 
@@ -862,23 +751,23 @@ the following content:
 @itemize -
 
 @item 
-@ref{1d,,Building with gnatmake}
+@ref{1b,,Building with gnatmake}
 
 @item 
-@ref{1e,,Compiling with gcc}
+@ref{1c,,Compiling with gcc}
 
 @item 
-@ref{1f,,Binding with gnatbind}
+@ref{1d,,Binding with gnatbind}
 
 @item 
-@ref{20,,Linking with gnatlink}
+@ref{1e,,Linking with gnatlink}
 
 @item 
-@ref{21,,Using the GNU make Utility}
+@ref{1f,,Using the GNU make Utility}
 @end itemize
 
 @item 
-@ref{d,,GNAT Utility Programs} is a new chapter consolidating the information about several
+@ref{b,,GNAT Utility Programs} is a new chapter consolidating the information about several
 GNAT tools:
 
 
@@ -886,60 +775,60 @@ GNAT tools:
 @itemize -
 
 @item 
-@ref{22,,The File Cleanup Utility gnatclean}
+@ref{20,,The File Cleanup Utility gnatclean}
 
 @item 
-@ref{23,,The GNAT Library Browser gnatls}
+@ref{21,,The GNAT Library Browser gnatls}
 
 @item 
-@ref{24,,The Cross-Referencing Tools gnatxref and gnatfind}
+@ref{22,,The Cross-Referencing Tools gnatxref and gnatfind}
 
 @item 
-@ref{25,,The Ada to HTML Converter gnathtml}
+@ref{23,,The Ada to HTML Converter gnathtml}
 @end itemize
 
 @item 
-@ref{e,,GNAT and Program Execution} is a new chapter consolidating the following:
+@ref{c,,GNAT and Program Execution} is a new chapter consolidating the following:
 
 
 @itemize -
 
 @item 
-@ref{26,,Running and Debugging Ada Programs}
+@ref{24,,Running and Debugging Ada Programs}
 
 @item 
-@ref{27,,Code Coverage and Profiling}
+@ref{25,,Code Coverage and Profiling}
 
 @item 
-@ref{28,,Improving Performance}
+@ref{26,,Improving Performance}
 
 @item 
-@ref{29,,Overflow Check Handling in GNAT}
+@ref{27,,Overflow Check Handling in GNAT}
 
 @item 
-@ref{2a,,Performing Dimensionality Analysis in GNAT}
+@ref{28,,Performing Dimensionality Analysis in GNAT}
 
 @item 
-@ref{2b,,Stack Related Facilities}
+@ref{29,,Stack Related Facilities}
 
 @item 
-@ref{2c,,Memory Management Issues}
+@ref{2a,,Memory Management Issues}
 @end itemize
 
 @item 
-@ref{f,,Platform-Specific Information} is a new appendix consolidating the following:
+@ref{d,,Platform-Specific Information} is a new appendix consolidating the following:
 
 
 @itemize -
 
 @item 
-@ref{2d,,Run-Time Libraries}
+@ref{2b,,Run-Time Libraries}
 
 @item 
-@ref{2e,,Microsoft Windows Topics}
+@ref{2c,,Microsoft Windows Topics}
 
 @item 
-@ref{2f,,Mac OS Topics}
+@ref{2d,,Mac OS Topics}
 @end itemize
 
 @item 
@@ -950,7 +839,7 @@ a separate chapter in the @cite{GNAT User's Guide}.
 @end itemize
 
 @node Conventions,,A Note to Readers of Previous Versions of the Manual,About This Guide
-@anchor{gnat_ugn/about_this_guide conventions}@anchor{30}
+@anchor{gnat_ugn/about_this_guide conventions}@anchor{2e}
 @section Conventions
 
 
@@ -1003,7 +892,7 @@ the '\' character should be used instead.
 @end itemize
 
 @node Getting Started with GNAT,The GNAT Compilation Model,About This Guide,Top
-@anchor{gnat_ugn/getting_started_with_gnat getting-started-with-gnat}@anchor{8}@anchor{gnat_ugn/getting_started_with_gnat doc}@anchor{31}@anchor{gnat_ugn/getting_started_with_gnat id1}@anchor{32}
+@anchor{gnat_ugn/getting_started_with_gnat getting-started-with-gnat}@anchor{8}@anchor{gnat_ugn/getting_started_with_gnat doc}@anchor{2f}@anchor{gnat_ugn/getting_started_with_gnat id1}@anchor{30}
 @chapter Getting Started with GNAT
 
 
@@ -1026,7 +915,7 @@ For information on GPS please refer to
 @end menu
 
 @node Running GNAT,Running a Simple Ada Program,,Getting Started with GNAT
-@anchor{gnat_ugn/getting_started_with_gnat running-gnat}@anchor{33}@anchor{gnat_ugn/getting_started_with_gnat id2}@anchor{34}
+@anchor{gnat_ugn/getting_started_with_gnat running-gnat}@anchor{31}@anchor{gnat_ugn/getting_started_with_gnat id2}@anchor{32}
 @section Running GNAT
 
 
@@ -1051,7 +940,7 @@ utility program that, given the name of the main program, automatically
 performs the necessary compilation, binding and linking steps.
 
 @node Running a Simple Ada Program,Running a Program with Multiple Units,Running GNAT,Getting Started with GNAT
-@anchor{gnat_ugn/getting_started_with_gnat running-a-simple-ada-program}@anchor{35}@anchor{gnat_ugn/getting_started_with_gnat id3}@anchor{36}
+@anchor{gnat_ugn/getting_started_with_gnat running-a-simple-ada-program}@anchor{33}@anchor{gnat_ugn/getting_started_with_gnat id3}@anchor{34}
 @section Running a Simple Ada Program
 
 
@@ -1080,12 +969,12 @@ extension is @code{ads} for a
 spec and @code{adb} for a body.
 You can override this default file naming convention by use of the
 special pragma @cite{Source_File_Name} (for further information please
-see @ref{37,,Using Other File Names}).
+see @ref{35,,Using Other File Names}).
 Alternatively, if you want to rename your files according to this default
 convention, which is probably more convenient if you will be using GNAT
 for all your compilations, then the @cite{gnatchop} utility
 can be used to generate correctly-named source files
-(see @ref{38,,Renaming Files with gnatchop}).
+(see @ref{36,,Renaming Files with gnatchop}).
 
 You can compile the program using the following command (@cite{$} is used
 as the command prompt in the examples in this document):
@@ -1156,7 +1045,7 @@ Hello WORLD!
 appear in response to this command.
 
 @node Running a Program with Multiple Units,Using the gnatmake Utility,Running a Simple Ada Program,Getting Started with GNAT
-@anchor{gnat_ugn/getting_started_with_gnat id4}@anchor{39}@anchor{gnat_ugn/getting_started_with_gnat running-a-program-with-multiple-units}@anchor{3a}
+@anchor{gnat_ugn/getting_started_with_gnat id4}@anchor{37}@anchor{gnat_ugn/getting_started_with_gnat running-a-program-with-multiple-units}@anchor{38}
 @section Running a Program with Multiple Units
 
 
@@ -1245,7 +1134,7 @@ In the next section we discuss the advantages of using @emph{gnatmake} in
 more detail.
 
 @node Using the gnatmake Utility,,Running a Program with Multiple Units,Getting Started with GNAT
-@anchor{gnat_ugn/getting_started_with_gnat using-the-gnatmake-utility}@anchor{3b}@anchor{gnat_ugn/getting_started_with_gnat id5}@anchor{3c}
+@anchor{gnat_ugn/getting_started_with_gnat using-the-gnatmake-utility}@anchor{39}@anchor{gnat_ugn/getting_started_with_gnat id5}@anchor{3a}
 @section Using the @emph{gnatmake} Utility
 
 
@@ -1298,7 +1187,7 @@ dependencies from scratch each time it is run.
 @c -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
 
 @node The GNAT Compilation Model,Building Executable Programs with GNAT,Getting Started with GNAT,Top
-@anchor{gnat_ugn/the_gnat_compilation_model doc}@anchor{3d}@anchor{gnat_ugn/the_gnat_compilation_model the-gnat-compilation-model}@anchor{9}@anchor{gnat_ugn/the_gnat_compilation_model id1}@anchor{3e}
+@anchor{gnat_ugn/the_gnat_compilation_model doc}@anchor{3b}@anchor{gnat_ugn/the_gnat_compilation_model the-gnat-compilation-model}@anchor{9}@anchor{gnat_ugn/the_gnat_compilation_model id1}@anchor{3c}
 @chapter The GNAT Compilation Model
 
 
@@ -1322,44 +1211,44 @@ Topics related to source file makeup and naming
 @itemize *
 
 @item 
-@ref{3f,,Source Representation}
+@ref{3d,,Source Representation}
 
 @item 
-@ref{40,,Foreign Language Representation}
+@ref{3e,,Foreign Language Representation}
 
 @item 
-@ref{41,,File Naming Topics and Utilities}
+@ref{3f,,File Naming Topics and Utilities}
 @end itemize
 
 @item 
-@ref{16,,Configuration Pragmas}
+@ref{14,,Configuration Pragmas}
 
 @item 
-@ref{42,,Generating Object Files}
+@ref{40,,Generating Object Files}
 
 @item 
-@ref{43,,Source Dependencies}
+@ref{41,,Source Dependencies}
 
 @item 
-@ref{44,,The Ada Library Information Files}
+@ref{42,,The Ada Library Information Files}
 
 @item 
-@ref{45,,Binding an Ada Program}
+@ref{43,,Binding an Ada Program}
 
 @item 
-@ref{17,,GNAT and Libraries}
+@ref{15,,GNAT and Libraries}
 
 @item 
-@ref{18,,Conditional Compilation}
+@ref{16,,Conditional Compilation}
 
 @item 
-@ref{46,,Mixed Language Programming}
+@ref{44,,Mixed Language Programming}
 
 @item 
-@ref{47,,GNAT and Other Compilation Models}
+@ref{45,,GNAT and Other Compilation Models}
 
 @item 
-@ref{1c,,Using GNAT Files with External Tools}
+@ref{1a,,Using GNAT Files with External Tools}
 @end itemize
 
 @menu
@@ -1380,7 +1269,7 @@ Topics related to source file makeup and naming
 @end menu
 
 @node Source Representation,Foreign Language Representation,,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model source-representation}@anchor{3f}@anchor{gnat_ugn/the_gnat_compilation_model id2}@anchor{48}
+@anchor{gnat_ugn/the_gnat_compilation_model source-representation}@anchor{3d}@anchor{gnat_ugn/the_gnat_compilation_model id2}@anchor{46}
 @section Source Representation
 
 
@@ -1395,7 +1284,7 @@ Topics related to source file makeup and naming
 Ada source programs are represented in standard text files, using
 Latin-1 coding. Latin-1 is an 8-bit code that includes the familiar
 7-bit ASCII set, plus additional characters used for
-representing foreign languages (see @ref{40,,Foreign Language Representation}
+representing foreign languages (see @ref{3e,,Foreign Language Representation}
 for support of non-USA character sets). The format effector characters
 are represented using their standard ASCII encodings, as follows:
 
@@ -1506,13 +1395,13 @@ compilation units) is represented using a sequence of files. Similarly,
 you will place each subunit or child unit in a separate file.
 
 @node Foreign Language Representation,File Naming Topics and Utilities,Source Representation,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model foreign-language-representation}@anchor{40}@anchor{gnat_ugn/the_gnat_compilation_model id3}@anchor{49}
+@anchor{gnat_ugn/the_gnat_compilation_model foreign-language-representation}@anchor{3e}@anchor{gnat_ugn/the_gnat_compilation_model id3}@anchor{47}
 @section Foreign Language Representation
 
 
 GNAT supports the standard character sets defined in Ada as well as
 several other non-standard character sets for use in localized versions
-of the compiler (@ref{4a,,Character Set Control}).
+of the compiler (@ref{48,,Character Set Control}).
 
 @menu
 * Latin-1:: 
@@ -1523,7 +1412,7 @@ of the compiler (@ref{4a,,Character Set Control}).
 @end menu
 
 @node Latin-1,Other 8-Bit Codes,,Foreign Language Representation
-@anchor{gnat_ugn/the_gnat_compilation_model id4}@anchor{4b}@anchor{gnat_ugn/the_gnat_compilation_model latin-1}@anchor{4c}
+@anchor{gnat_ugn/the_gnat_compilation_model id4}@anchor{49}@anchor{gnat_ugn/the_gnat_compilation_model latin-1}@anchor{4a}
 @subsection Latin-1
 
 
@@ -1546,7 +1435,7 @@ string literals. In addition, the extended characters that represent
 letters can be used in identifiers.
 
 @node Other 8-Bit Codes,Wide_Character Encodings,Latin-1,Foreign Language Representation
-@anchor{gnat_ugn/the_gnat_compilation_model other-8-bit-codes}@anchor{4d}@anchor{gnat_ugn/the_gnat_compilation_model id5}@anchor{4e}
+@anchor{gnat_ugn/the_gnat_compilation_model other-8-bit-codes}@anchor{4b}@anchor{gnat_ugn/the_gnat_compilation_model id5}@anchor{4c}
 @subsection Other 8-Bit Codes
 
 
@@ -1663,7 +1552,7 @@ the GNAT compiler sources. You will need to obtain a full source release
 of GNAT to obtain this file.
 
 @node Wide_Character Encodings,Wide_Wide_Character Encodings,Other 8-Bit Codes,Foreign Language Representation
-@anchor{gnat_ugn/the_gnat_compilation_model id6}@anchor{4f}@anchor{gnat_ugn/the_gnat_compilation_model wide-character-encodings}@anchor{50}
+@anchor{gnat_ugn/the_gnat_compilation_model id6}@anchor{4d}@anchor{gnat_ugn/the_gnat_compilation_model wide-character-encodings}@anchor{4e}
 @subsection Wide_Character Encodings
 
 
@@ -1774,7 +1663,7 @@ use of the upper half of the Latin-1 set.
 @end cartouche
 
 @node Wide_Wide_Character Encodings,,Wide_Character Encodings,Foreign Language Representation
-@anchor{gnat_ugn/the_gnat_compilation_model id7}@anchor{51}@anchor{gnat_ugn/the_gnat_compilation_model wide-wide-character-encodings}@anchor{52}
+@anchor{gnat_ugn/the_gnat_compilation_model id7}@anchor{4f}@anchor{gnat_ugn/the_gnat_compilation_model wide-wide-character-encodings}@anchor{50}
 @subsection Wide_Wide_Character Encodings
 
 
@@ -1826,7 +1715,7 @@ ACATS (Ada Conformity Assessment Test Suite) test suite distributions.
 @end table
 
 @node File Naming Topics and Utilities,Configuration Pragmas,Foreign Language Representation,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model id8}@anchor{53}@anchor{gnat_ugn/the_gnat_compilation_model file-naming-topics-and-utilities}@anchor{41}
+@anchor{gnat_ugn/the_gnat_compilation_model id8}@anchor{51}@anchor{gnat_ugn/the_gnat_compilation_model file-naming-topics-and-utilities}@anchor{3f}
 @section File Naming Topics and Utilities
 
 
@@ -1845,7 +1734,7 @@ source files correspond to the Ada compilation units that they contain.
 @end menu
 
 @node File Naming Rules,Using Other File Names,,File Naming Topics and Utilities
-@anchor{gnat_ugn/the_gnat_compilation_model file-naming-rules}@anchor{54}@anchor{gnat_ugn/the_gnat_compilation_model id9}@anchor{55}
+@anchor{gnat_ugn/the_gnat_compilation_model file-naming-rules}@anchor{52}@anchor{gnat_ugn/the_gnat_compilation_model id9}@anchor{53}
 @subsection File Naming Rules
 
 
@@ -1954,7 +1843,7 @@ unit names are long (for example, if child units or subunits are
 heavily nested). An option is available to shorten such long file names
 (called file name 'krunching'). This may be particularly useful when
 programs being developed with GNAT are to be used on operating systems
-with limited file name lengths. @ref{56,,Using gnatkr}.
+with limited file name lengths. @ref{54,,Using gnatkr}.
 
 Of course, no file shortening algorithm can guarantee uniqueness over
 all possible unit names; if file name krunching is used, it is your
@@ -1963,7 +1852,7 @@ can specify the exact file names that you want used, as described
 in the next section. Finally, if your Ada programs are migrating from a
 compiler with a different naming convention, you can use the gnatchop
 utility to produce source files that follow the GNAT naming conventions.
-(For details see @ref{38,,Renaming Files with gnatchop}.)
+(For details see @ref{36,,Renaming Files with gnatchop}.)
 
 Note: in the case of Windows or Mac OS operating systems, case is not
 significant. So for example on @cite{Windows} if the canonical name is
@@ -1973,7 +1862,7 @@ if you want to use other than canonically cased file names on a Unix system,
 you need to follow the procedures described in the next section.
 
 @node Using Other File Names,Alternative File Naming Schemes,File Naming Rules,File Naming Topics and Utilities
-@anchor{gnat_ugn/the_gnat_compilation_model id10}@anchor{57}@anchor{gnat_ugn/the_gnat_compilation_model using-other-file-names}@anchor{37}
+@anchor{gnat_ugn/the_gnat_compilation_model id10}@anchor{55}@anchor{gnat_ugn/the_gnat_compilation_model using-other-file-names}@anchor{35}
 @subsection Using Other File Names
 
 
@@ -2011,7 +1900,7 @@ normally it will be placed in the @code{gnat.adc}
 file used to hold configuration
 pragmas that apply to a complete compilation environment.
 For more details on how the @code{gnat.adc} file is created and used
-see @ref{58,,Handling of Configuration Pragmas}.
+see @ref{56,,Handling of Configuration Pragmas}.
 
 @geindex gnat.adc
 
@@ -2033,7 +1922,7 @@ then it must be included in the @cite{gnatmake} command, it may not
 be omitted.
 
 @node Alternative File Naming Schemes,Handling Arbitrary File Naming Conventions with gnatname,Using Other File Names,File Naming Topics and Utilities
-@anchor{gnat_ugn/the_gnat_compilation_model id11}@anchor{59}@anchor{gnat_ugn/the_gnat_compilation_model alternative-file-naming-schemes}@anchor{5a}
+@anchor{gnat_ugn/the_gnat_compilation_model id11}@anchor{57}@anchor{gnat_ugn/the_gnat_compilation_model alternative-file-naming-schemes}@anchor{58}
 @subsection Alternative File Naming Schemes
 
 
@@ -2177,7 +2066,7 @@ pragma Source_File_Name
 @geindex gnatname
 
 @node Handling Arbitrary File Naming Conventions with gnatname,File Name Krunching with gnatkr,Alternative File Naming Schemes,File Naming Topics and Utilities
-@anchor{gnat_ugn/the_gnat_compilation_model handling-arbitrary-file-naming-conventions-with-gnatname}@anchor{5b}@anchor{gnat_ugn/the_gnat_compilation_model id12}@anchor{5c}
+@anchor{gnat_ugn/the_gnat_compilation_model handling-arbitrary-file-naming-conventions-with-gnatname}@anchor{59}@anchor{gnat_ugn/the_gnat_compilation_model id12}@anchor{5a}
 @subsection Handling Arbitrary File Naming Conventions with @cite{gnatname}
 
 
@@ -2192,7 +2081,7 @@ pragma Source_File_Name
 @end menu
 
 @node Arbitrary File Naming Conventions,Running gnatname,,Handling Arbitrary File Naming Conventions with gnatname
-@anchor{gnat_ugn/the_gnat_compilation_model arbitrary-file-naming-conventions}@anchor{5d}@anchor{gnat_ugn/the_gnat_compilation_model id13}@anchor{5e}
+@anchor{gnat_ugn/the_gnat_compilation_model arbitrary-file-naming-conventions}@anchor{5b}@anchor{gnat_ugn/the_gnat_compilation_model id13}@anchor{5c}
 @subsubsection Arbitrary File Naming Conventions
 
 
@@ -2203,11 +2092,11 @@ does not need additional information.
 
 When the source file names do not follow the standard GNAT default file naming
 conventions, the GNAT compiler must be given additional information through
-a configuration pragmas file (@ref{16,,Configuration Pragmas})
+a configuration pragmas file (@ref{14,,Configuration Pragmas})
 or a project file.
 When the non-standard file naming conventions are well-defined,
 a small number of pragmas @cite{Source_File_Name} specifying a naming pattern
-(@ref{5a,,Alternative File Naming Schemes}) may be sufficient. However,
+(@ref{58,,Alternative File Naming Schemes}) may be sufficient. However,
 if the file naming conventions are irregular or arbitrary, a number
 of pragma @cite{Source_File_Name} for individual compilation units
 must be defined.
@@ -2217,7 +2106,7 @@ GNAT provides a tool @cite{gnatname} to generate the required pragmas for a
 set of files.
 
 @node Running gnatname,Switches for gnatname,Arbitrary File Naming Conventions,Handling Arbitrary File Naming Conventions with gnatname
-@anchor{gnat_ugn/the_gnat_compilation_model running-gnatname}@anchor{5f}@anchor{gnat_ugn/the_gnat_compilation_model id14}@anchor{60}
+@anchor{gnat_ugn/the_gnat_compilation_model running-gnatname}@anchor{5d}@anchor{gnat_ugn/the_gnat_compilation_model id14}@anchor{5e}
 @subsubsection Running @cite{gnatname}
 
 
@@ -2268,7 +2157,7 @@ with pragmas @cite{Source_File_Name} for each file that contains a valid Ada
 unit.
 
 @node Switches for gnatname,Examples of gnatname Usage,Running gnatname,Handling Arbitrary File Naming Conventions with gnatname
-@anchor{gnat_ugn/the_gnat_compilation_model id15}@anchor{61}@anchor{gnat_ugn/the_gnat_compilation_model switches-for-gnatname}@anchor{62}
+@anchor{gnat_ugn/the_gnat_compilation_model id15}@anchor{5f}@anchor{gnat_ugn/the_gnat_compilation_model switches-for-gnatname}@anchor{60}
 @subsubsection Switches for @cite{gnatname}
 
 
@@ -2451,7 +2340,7 @@ except those whose names end with @code{_nt.ada}.
 @end table
 
 @node Examples of gnatname Usage,,Switches for gnatname,Handling Arbitrary File Naming Conventions with gnatname
-@anchor{gnat_ugn/the_gnat_compilation_model examples-of-gnatname-usage}@anchor{63}@anchor{gnat_ugn/the_gnat_compilation_model id16}@anchor{64}
+@anchor{gnat_ugn/the_gnat_compilation_model examples-of-gnatname-usage}@anchor{61}@anchor{gnat_ugn/the_gnat_compilation_model id16}@anchor{62}
 @subsubsection Examples of @cite{gnatname} Usage
 
 
@@ -2477,13 +2366,13 @@ even in conjunction with one or several switches
 are used in this example.
 
 @node File Name Krunching with gnatkr,Renaming Files with gnatchop,Handling Arbitrary File Naming Conventions with gnatname,File Naming Topics and Utilities
-@anchor{gnat_ugn/the_gnat_compilation_model file-name-krunching-with-gnatkr}@anchor{65}@anchor{gnat_ugn/the_gnat_compilation_model id17}@anchor{66}
+@anchor{gnat_ugn/the_gnat_compilation_model file-name-krunching-with-gnatkr}@anchor{63}@anchor{gnat_ugn/the_gnat_compilation_model id17}@anchor{64}
 @subsection File Name Krunching with @cite{gnatkr}
 
 
 @geindex gnatkr
 
-This chapter discusses the method used by the compiler to shorten
+This section discusses the method used by the compiler to shorten
 the default file names chosen for Ada units so that they do not
 exceed the maximum length permitted. It also describes the
 @cite{gnatkr} utility that can be used to determine the result of
@@ -2498,7 +2387,7 @@ applying this shortening.
 @end menu
 
 @node About gnatkr,Using gnatkr,,File Name Krunching with gnatkr
-@anchor{gnat_ugn/the_gnat_compilation_model id18}@anchor{67}@anchor{gnat_ugn/the_gnat_compilation_model about-gnatkr}@anchor{68}
+@anchor{gnat_ugn/the_gnat_compilation_model id18}@anchor{65}@anchor{gnat_ugn/the_gnat_compilation_model about-gnatkr}@anchor{66}
 @subsubsection About @cite{gnatkr}
 
 
@@ -2536,7 +2425,7 @@ The @cite{gnatkr} utility can be used to determine the krunched name for
 a given file, when krunched to a specified maximum length.
 
 @node Using gnatkr,Krunching Method,About gnatkr,File Name Krunching with gnatkr
-@anchor{gnat_ugn/the_gnat_compilation_model id19}@anchor{69}@anchor{gnat_ugn/the_gnat_compilation_model using-gnatkr}@anchor{56}
+@anchor{gnat_ugn/the_gnat_compilation_model id19}@anchor{67}@anchor{gnat_ugn/the_gnat_compilation_model using-gnatkr}@anchor{54}
 @subsubsection Using @cite{gnatkr}
 
 
@@ -2573,7 +2462,7 @@ The output is the krunched name. The output has an extension only if the
 original argument was a file name with an extension.
 
 @node Krunching Method,Examples of gnatkr Usage,Using gnatkr,File Name Krunching with gnatkr
-@anchor{gnat_ugn/the_gnat_compilation_model id20}@anchor{6a}@anchor{gnat_ugn/the_gnat_compilation_model krunching-method}@anchor{6b}
+@anchor{gnat_ugn/the_gnat_compilation_model id20}@anchor{68}@anchor{gnat_ugn/the_gnat_compilation_model krunching-method}@anchor{69}
 @subsubsection Krunching Method
 
 
@@ -2703,7 +2592,7 @@ program @cite{gnatkr} is supplied for conveniently determining the
 krunched name of a file.
 
 @node Examples of gnatkr Usage,,Krunching Method,File Name Krunching with gnatkr
-@anchor{gnat_ugn/the_gnat_compilation_model id21}@anchor{6c}@anchor{gnat_ugn/the_gnat_compilation_model examples-of-gnatkr-usage}@anchor{6d}
+@anchor{gnat_ugn/the_gnat_compilation_model id21}@anchor{6a}@anchor{gnat_ugn/the_gnat_compilation_model examples-of-gnatkr-usage}@anchor{6b}
 @subsubsection Examples of @cite{gnatkr} Usage
 
 
@@ -2717,13 +2606,13 @@ $ gnatkr very_long_unit_name.ads/count=0 --> very_long_unit_name.ads
 @end example
 
 @node Renaming Files with gnatchop,,File Name Krunching with gnatkr,File Naming Topics and Utilities
-@anchor{gnat_ugn/the_gnat_compilation_model id22}@anchor{6e}@anchor{gnat_ugn/the_gnat_compilation_model renaming-files-with-gnatchop}@anchor{38}
+@anchor{gnat_ugn/the_gnat_compilation_model id22}@anchor{6c}@anchor{gnat_ugn/the_gnat_compilation_model renaming-files-with-gnatchop}@anchor{36}
 @subsection Renaming Files with @cite{gnatchop}
 
 
 @geindex gnatchop
 
-This chapter discusses how to handle files with multiple units by using
+This section discusses how to handle files with multiple units by using
 the @cite{gnatchop} utility. This utility is also useful in renaming
 files to meet the standard GNAT default file naming conventions.
 
@@ -2737,7 +2626,7 @@ files to meet the standard GNAT default file naming conventions.
 @end menu
 
 @node Handling Files with Multiple Units,Operating gnatchop in Compilation Mode,,Renaming Files with gnatchop
-@anchor{gnat_ugn/the_gnat_compilation_model id23}@anchor{6f}@anchor{gnat_ugn/the_gnat_compilation_model handling-files-with-multiple-units}@anchor{70}
+@anchor{gnat_ugn/the_gnat_compilation_model id23}@anchor{6d}@anchor{gnat_ugn/the_gnat_compilation_model handling-files-with-multiple-units}@anchor{6e}
 @subsubsection Handling Files with Multiple Units
 
 
@@ -2769,7 +2658,7 @@ will each start with a copy of this BOM, meaning that they can be compiled
 automatically in UTF-8 mode without needing to specify an explicit encoding.
 
 @node Operating gnatchop in Compilation Mode,Command Line for gnatchop,Handling Files with Multiple Units,Renaming Files with gnatchop
-@anchor{gnat_ugn/the_gnat_compilation_model operating-gnatchop-in-compilation-mode}@anchor{71}@anchor{gnat_ugn/the_gnat_compilation_model id24}@anchor{72}
+@anchor{gnat_ugn/the_gnat_compilation_model operating-gnatchop-in-compilation-mode}@anchor{6f}@anchor{gnat_ugn/the_gnat_compilation_model id24}@anchor{70}
 @subsubsection Operating gnatchop in Compilation Mode
 
 
@@ -2802,7 +2691,7 @@ should apply to all subsequent compilations in the same compilation
 environment. Using GNAT, the current directory, possibly containing a
 @code{gnat.adc} file is the representation
 of a compilation environment. For more information on the
-@code{gnat.adc} file, see @ref{58,,Handling of Configuration Pragmas}.
+@code{gnat.adc} file, see @ref{56,,Handling of Configuration Pragmas}.
 
 Second, in compilation mode, if @cite{gnatchop}
 is given a file that starts with
@@ -2829,7 +2718,7 @@ switch provides the required behavior, and is for example the mode
 in which GNAT processes the ACVC tests.
 
 @node Command Line for gnatchop,Switches for gnatchop,Operating gnatchop in Compilation Mode,Renaming Files with gnatchop
-@anchor{gnat_ugn/the_gnat_compilation_model id25}@anchor{73}@anchor{gnat_ugn/the_gnat_compilation_model command-line-for-gnatchop}@anchor{74}
+@anchor{gnat_ugn/the_gnat_compilation_model id25}@anchor{71}@anchor{gnat_ugn/the_gnat_compilation_model command-line-for-gnatchop}@anchor{72}
 @subsubsection Command Line for @cite{gnatchop}
 
 
@@ -2903,7 +2792,7 @@ no source files written
 @end example
 
 @node Switches for gnatchop,Examples of gnatchop Usage,Command Line for gnatchop,Renaming Files with gnatchop
-@anchor{gnat_ugn/the_gnat_compilation_model switches-for-gnatchop}@anchor{75}@anchor{gnat_ugn/the_gnat_compilation_model id26}@anchor{76}
+@anchor{gnat_ugn/the_gnat_compilation_model switches-for-gnatchop}@anchor{73}@anchor{gnat_ugn/the_gnat_compilation_model id26}@anchor{74}
 @subsubsection Switches for @cite{gnatchop}
 
 
@@ -3069,7 +2958,7 @@ no attempt is made to add the prefix to the GNAT parser executable.
 @end table
 
 @node Examples of gnatchop Usage,,Switches for gnatchop,Renaming Files with gnatchop
-@anchor{gnat_ugn/the_gnat_compilation_model id27}@anchor{77}@anchor{gnat_ugn/the_gnat_compilation_model examples-of-gnatchop-usage}@anchor{78}
+@anchor{gnat_ugn/the_gnat_compilation_model id27}@anchor{75}@anchor{gnat_ugn/the_gnat_compilation_model examples-of-gnatchop-usage}@anchor{76}
 @subsubsection Examples of @cite{gnatchop} Usage
 
 
@@ -3110,7 +2999,7 @@ be the one that is output, and earlier duplicate occurrences for a given
 unit will be skipped.
 
 @node Configuration Pragmas,Generating Object Files,File Naming Topics and Utilities,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model id28}@anchor{79}@anchor{gnat_ugn/the_gnat_compilation_model configuration-pragmas}@anchor{16}
+@anchor{gnat_ugn/the_gnat_compilation_model id28}@anchor{77}@anchor{gnat_ugn/the_gnat_compilation_model configuration-pragmas}@anchor{14}
 @section Configuration Pragmas
 
 
@@ -3206,7 +3095,7 @@ Wide_Character_Encoding
 @end menu
 
 @node Handling of Configuration Pragmas,The Configuration Pragmas Files,,Configuration Pragmas
-@anchor{gnat_ugn/the_gnat_compilation_model id29}@anchor{7a}@anchor{gnat_ugn/the_gnat_compilation_model handling-of-configuration-pragmas}@anchor{58}
+@anchor{gnat_ugn/the_gnat_compilation_model id29}@anchor{78}@anchor{gnat_ugn/the_gnat_compilation_model handling-of-configuration-pragmas}@anchor{56}
 @subsection Handling of Configuration Pragmas
 
 
@@ -3217,7 +3106,7 @@ all compilations performed in a given compilation environment.
 GNAT also provides the @cite{gnatchop} utility to provide an automatic
 way to handle configuration pragmas following the semantics for
 compilations (that is, files with multiple units), described in the RM.
-See @ref{71,,Operating gnatchop in Compilation Mode} for details.
+See @ref{6f,,Operating gnatchop in Compilation Mode} for details.
 However, for most purposes, it will be more convenient to edit the
 @code{gnat.adc} file that contains configuration pragmas directly,
 as described in the following section.
@@ -3247,7 +3136,7 @@ relevant units). It can appear on a subunit only if it has previously
 appeared in the body of spec.
 
 @node The Configuration Pragmas Files,,Handling of Configuration Pragmas,Configuration Pragmas
-@anchor{gnat_ugn/the_gnat_compilation_model the-configuration-pragmas-files}@anchor{7b}@anchor{gnat_ugn/the_gnat_compilation_model id30}@anchor{7c}
+@anchor{gnat_ugn/the_gnat_compilation_model the-configuration-pragmas-files}@anchor{79}@anchor{gnat_ugn/the_gnat_compilation_model id30}@anchor{7a}
 @subsection The Configuration Pragmas Files
 
 
@@ -3288,11 +3177,13 @@ depend on a file that no longer exists. Such tools include
 @emph{gprbuild}, @emph{gnatmake}, and @emph{gnatcheck}.
 
 If you are using project file, a separate mechanism is provided using
-project attributes, see @ref{7d,,Specifying Configuration Pragmas} for more
-details.
+project attributes.
+
+@c --Comment:
+@c See :ref:`Specifying_Configuration_Pragmas` for more details.
 
 @node Generating Object Files,Source Dependencies,Configuration Pragmas,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model generating-object-files}@anchor{42}@anchor{gnat_ugn/the_gnat_compilation_model id31}@anchor{7e}
+@anchor{gnat_ugn/the_gnat_compilation_model generating-object-files}@anchor{40}@anchor{gnat_ugn/the_gnat_compilation_model id31}@anchor{7b}
 @section Generating Object Files
 
 
@@ -3363,7 +3254,7 @@ part of the process of building a program. To compile a file in this
 checking mode, use the @emph{-gnatc} switch.
 
 @node Source Dependencies,The Ada Library Information Files,Generating Object Files,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model id32}@anchor{7f}@anchor{gnat_ugn/the_gnat_compilation_model source-dependencies}@anchor{43}
+@anchor{gnat_ugn/the_gnat_compilation_model id32}@anchor{7c}@anchor{gnat_ugn/the_gnat_compilation_model source-dependencies}@anchor{41}
 @section Source Dependencies
 
 
@@ -3458,7 +3349,7 @@ recompilations is done automatically when one uses @emph{gnatmake}.
 @end itemize
 
 @node The Ada Library Information Files,Binding an Ada Program,Source Dependencies,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model id33}@anchor{80}@anchor{gnat_ugn/the_gnat_compilation_model the-ada-library-information-files}@anchor{44}
+@anchor{gnat_ugn/the_gnat_compilation_model id33}@anchor{7d}@anchor{gnat_ugn/the_gnat_compilation_model the-ada-library-information-files}@anchor{42}
 @section The Ada Library Information Files
 
 
@@ -3526,7 +3417,7 @@ see the source of the body of unit @cite{Lib.Writ}, contained in file
 @code{lib-writ.adb} in the GNAT compiler sources.
 
 @node Binding an Ada Program,GNAT and Libraries,The Ada Library Information Files,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model id34}@anchor{81}@anchor{gnat_ugn/the_gnat_compilation_model binding-an-ada-program}@anchor{45}
+@anchor{gnat_ugn/the_gnat_compilation_model id34}@anchor{7e}@anchor{gnat_ugn/the_gnat_compilation_model binding-an-ada-program}@anchor{43}
 @section Binding an Ada Program
 
 
@@ -3562,16 +3453,16 @@ using the object from the main program from the bind step as well as the
 object files for the Ada units of the program.
 
 @node GNAT and Libraries,Conditional Compilation,Binding an Ada Program,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model gnat-and-libraries}@anchor{17}@anchor{gnat_ugn/the_gnat_compilation_model id35}@anchor{82}
+@anchor{gnat_ugn/the_gnat_compilation_model gnat-and-libraries}@anchor{15}@anchor{gnat_ugn/the_gnat_compilation_model id35}@anchor{7f}
 @section GNAT and Libraries
 
 
 @geindex Library building and using
 
-This chapter describes how to build and use libraries with GNAT, and also shows
+This section describes how to build and use libraries with GNAT, and also shows
 how to recompile the GNAT run-time library. You should be familiar with the
-Project Manager facility (@ref{b,,GNAT Project Manager}) before reading this
-chapter.
+Project Manager facility (see the @emph{GNAT_Project_Manager} chapter of the
+@emph{GPRbuild User's Guide}) before reading this chapter.
 
 @menu
 * Introduction to Libraries in GNAT:: 
@@ -3582,7 +3473,7 @@ chapter.
 @end menu
 
 @node Introduction to Libraries in GNAT,General Ada Libraries,,GNAT and Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model introduction-to-libraries-in-gnat}@anchor{83}@anchor{gnat_ugn/the_gnat_compilation_model id36}@anchor{84}
+@anchor{gnat_ugn/the_gnat_compilation_model introduction-to-libraries-in-gnat}@anchor{80}@anchor{gnat_ugn/the_gnat_compilation_model id36}@anchor{81}
 @subsection Introduction to Libraries in GNAT
 
 
@@ -3609,7 +3500,7 @@ In the GNAT environment, a library has three types of components:
 Source files,
 
 @item 
-@code{ALI} files (see @ref{44,,The Ada Library Information Files}), and
+@code{ALI} files (see @ref{42,,The Ada Library Information Files}), and
 
 @item 
 Object files, an archive or a shared library.
@@ -3621,7 +3512,7 @@ an external user to make use of the library. That is to say, the specs
 reflecting the library services along with all the units needed to compile
 those specs, which can include generic bodies or any body implementing an
 inlined routine. In the case of @emph{stand-alone libraries} those exposed
-units are called @emph{interface units} (@ref{85,,Stand-alone Ada Libraries}).
+units are called @emph{interface units} (@ref{82,,Stand-alone Ada Libraries}).
 
 All compilation units comprising an application, including those in a library,
 need to be elaborated in an order partially defined by Ada's semantics. GNAT
@@ -3632,7 +3523,7 @@ library elaboration routine is produced independently of the application(s)
 using the library.
 
 @node General Ada Libraries,Stand-alone Ada Libraries,Introduction to Libraries in GNAT,GNAT and Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model general-ada-libraries}@anchor{86}@anchor{gnat_ugn/the_gnat_compilation_model id37}@anchor{87}
+@anchor{gnat_ugn/the_gnat_compilation_model general-ada-libraries}@anchor{83}@anchor{gnat_ugn/the_gnat_compilation_model id37}@anchor{84}
 @subsection General Ada Libraries
 
 
@@ -3644,13 +3535,14 @@ using the library.
 @end menu
 
 @node Building a library,Installing a library,,General Ada Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model building-a-library}@anchor{88}@anchor{gnat_ugn/the_gnat_compilation_model id38}@anchor{89}
+@anchor{gnat_ugn/the_gnat_compilation_model building-a-library}@anchor{85}@anchor{gnat_ugn/the_gnat_compilation_model id38}@anchor{86}
 @subsubsection Building a library
 
 
 The easiest way to build a library is to use the Project Manager,
 which supports a special type of project called a @emph{Library Project}
-(see @ref{8a,,Library Projects}).
+(see the @emph{Library Projects} section in the @emph{GNAT Project Manager}
+chapter of the @emph{GPRbuild User's Guide}).
 
 A project is considered a library project, when two project-level attributes
 are defined in it: @cite{Library_Name} and @cite{Library_Dir}. In order to
@@ -3725,7 +3617,7 @@ for this task. In special cases where this is not desired, the necessary
 steps are discussed below.
 
 There are various possibilities for compiling the units that make up the
-library: for example with a Makefile (@ref{21,,Using the GNU make Utility}) or
+library: for example with a Makefile (@ref{1f,,Using the GNU make Utility}) or
 with a conventional script. For simple libraries, it is also possible to create
 a dummy main program which depends upon all the packages that comprise the
 interface of the library. This dummy main program can then be given to
@@ -3776,7 +3668,7 @@ or @code{lib@emph{xxx}.so} (or @code{lib@emph{xxx}.dll} on Windows) in order to
 be accessed by the directive @code{-l@emph{xxx}} at link time.
 
 @node Installing a library,Using a library,Building a library,General Ada Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model installing-a-library}@anchor{8b}@anchor{gnat_ugn/the_gnat_compilation_model id39}@anchor{8c}
+@anchor{gnat_ugn/the_gnat_compilation_model installing-a-library}@anchor{87}@anchor{gnat_ugn/the_gnat_compilation_model id39}@anchor{88}
 @subsubsection Installing a library
 
 
@@ -3785,12 +3677,13 @@ be accessed by the directive @code{-l@emph{xxx}} at link time.
 @geindex GPR_PROJECT_PATH
 
 If you use project files, library installation is part of the library build
-process (@ref{8d,,Installing a library with project files}).
+process (see the @emph{Installing a Library with Project Files} section of the
+@emph{GNAT Project Manager} chapter of the @emph{GPRbuild User's Guide}).
 
 When project files are not an option, it is also possible, but not recommended,
 to install the library so that the sources needed to use the library are on the
 Ada source path and the ALI files & libraries be on the Ada Object path (see
-@ref{8e,,Search Paths and the Run-Time Library (RTL)}. Alternatively, the system
+@ref{89,,Search Paths and the Run-Time Library (RTL)}. Alternatively, the system
 administrator can place general-purpose libraries in the default compiler
 paths, by specifying the libraries' location in the configuration files
 @code{ada_source_path} and @code{ada_object_path}. These configuration files
@@ -3832,7 +3725,7 @@ library must be installed before the GNAT library if it redefines
 any part of it.
 
 @node Using a library,,Installing a library,General Ada Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model using-a-library}@anchor{8f}@anchor{gnat_ugn/the_gnat_compilation_model id40}@anchor{90}
+@anchor{gnat_ugn/the_gnat_compilation_model using-a-library}@anchor{8a}@anchor{gnat_ugn/the_gnat_compilation_model id40}@anchor{8b}
 @subsubsection Using a library
 
 
@@ -3871,8 +3764,8 @@ left to the tools having visibility over project dependence information.
 
 In order to use an Ada library manually, you need to make sure that this
 library is on both your source and object path
-(see @ref{8e,,Search Paths and the Run-Time Library (RTL)}
-and @ref{91,,Search Paths for gnatbind}). Furthermore, when the objects are grouped
+(see @ref{89,,Search Paths and the Run-Time Library (RTL)}
+and @ref{8c,,Search Paths for gnatbind}). Furthermore, when the objects are grouped
 in an archive or a shared library, you need to specify the desired
 library at link time.
 
@@ -3926,7 +3819,7 @@ in the directory @code{share/examples/gnat/plugins} within the GNAT
 install area.
 
 @node Stand-alone Ada Libraries,Rebuilding the GNAT Run-Time Library,General Ada Libraries,GNAT and Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model stand-alone-ada-libraries}@anchor{85}@anchor{gnat_ugn/the_gnat_compilation_model id41}@anchor{92}
+@anchor{gnat_ugn/the_gnat_compilation_model stand-alone-ada-libraries}@anchor{82}@anchor{gnat_ugn/the_gnat_compilation_model id41}@anchor{8d}
 @subsection Stand-alone Ada Libraries
 
 
@@ -3941,7 +3834,7 @@ install area.
 @end menu
 
 @node Introduction to Stand-alone Libraries,Building a Stand-alone Library,,Stand-alone Ada Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model introduction-to-stand-alone-libraries}@anchor{93}@anchor{gnat_ugn/the_gnat_compilation_model id42}@anchor{94}
+@anchor{gnat_ugn/the_gnat_compilation_model introduction-to-stand-alone-libraries}@anchor{8e}@anchor{gnat_ugn/the_gnat_compilation_model id42}@anchor{8f}
 @subsubsection Introduction to Stand-alone Libraries
 
 
@@ -3976,16 +3869,18 @@ Stand-alone libraries are also well suited to be used in an executable whose
 main routine is not written in Ada.
 
 @node Building a Stand-alone Library,Creating a Stand-alone Library to be used in a non-Ada context,Introduction to Stand-alone Libraries,Stand-alone Ada Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model id43}@anchor{95}@anchor{gnat_ugn/the_gnat_compilation_model building-a-stand-alone-library}@anchor{96}
+@anchor{gnat_ugn/the_gnat_compilation_model id43}@anchor{90}@anchor{gnat_ugn/the_gnat_compilation_model building-a-stand-alone-library}@anchor{91}
 @subsubsection Building a Stand-alone Library
 
 
 GNAT's Project facility provides a simple way of building and installing
-stand-alone libraries; see @ref{97,,Stand-alone Library Projects}.
+stand-alone libraries; see the @emph{Stand-alone Library Projects} section
+in the @emph{GNAT Project Manager} chapter of the @emph{GPRbuild User's Guide}.
 To be a Stand-alone Library Project, in addition to the two attributes
 that make a project a Library Project (@cite{Library_Name} and
-@cite{Library_Dir}; see @ref{8a,,Library Projects}), the attribute
-@cite{Library_Interface} must be defined.  For example:
+@cite{Library_Dir}; see the @emph{Library Projects} section in the
+@emph{GNAT Project Manager} chapter of the @emph{GPRbuild User's Guide}),
+the attribute @cite{Library_Interface} must be defined.  For example:
 
 @example
 for Library_Dir use "lib_dir";
@@ -4093,10 +3988,10 @@ read-only.
 @end itemize
 
 Using SALs is not different from using other libraries
-(see @ref{8f,,Using a library}).
+(see @ref{8a,,Using a library}).
 
 @node Creating a Stand-alone Library to be used in a non-Ada context,Restrictions in Stand-alone Libraries,Building a Stand-alone Library,Stand-alone Ada Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model creating-a-stand-alone-library-to-be-used-in-a-non-ada-context}@anchor{98}@anchor{gnat_ugn/the_gnat_compilation_model id44}@anchor{99}
+@anchor{gnat_ugn/the_gnat_compilation_model creating-a-stand-alone-library-to-be-used-in-a-non-ada-context}@anchor{92}@anchor{gnat_ugn/the_gnat_compilation_model id44}@anchor{93}
 @subsubsection Creating a Stand-alone Library to be used in a non-Ada context
 
 
@@ -4181,7 +4076,7 @@ must be ensured at the application level using a specific operating
 system services like a mutex or a critical-section.
 
 @node Restrictions in Stand-alone Libraries,,Creating a Stand-alone Library to be used in a non-Ada context,Stand-alone Ada Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model id45}@anchor{9a}@anchor{gnat_ugn/the_gnat_compilation_model restrictions-in-stand-alone-libraries}@anchor{9b}
+@anchor{gnat_ugn/the_gnat_compilation_model id45}@anchor{94}@anchor{gnat_ugn/the_gnat_compilation_model restrictions-in-stand-alone-libraries}@anchor{95}
 @subsubsection Restrictions in Stand-alone Libraries
 
 
@@ -4227,7 +4122,7 @@ In practice these attributes are rarely used, so this is unlikely
 to be a consideration.
 
 @node Rebuilding the GNAT Run-Time Library,,Stand-alone Ada Libraries,GNAT and Libraries
-@anchor{gnat_ugn/the_gnat_compilation_model id46}@anchor{9c}@anchor{gnat_ugn/the_gnat_compilation_model rebuilding-the-gnat-run-time-library}@anchor{9d}
+@anchor{gnat_ugn/the_gnat_compilation_model id46}@anchor{96}@anchor{gnat_ugn/the_gnat_compilation_model rebuilding-the-gnat-run-time-library}@anchor{97}
 @subsection Rebuilding the GNAT Run-Time Library
 
 
@@ -4261,7 +4156,7 @@ to use it.
 @geindex Conditional compilation
 
 @node Conditional Compilation,Mixed Language Programming,GNAT and Libraries,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model id47}@anchor{9e}@anchor{gnat_ugn/the_gnat_compilation_model conditional-compilation}@anchor{18}
+@anchor{gnat_ugn/the_gnat_compilation_model id47}@anchor{98}@anchor{gnat_ugn/the_gnat_compilation_model conditional-compilation}@anchor{16}
 @section Conditional Compilation
 
 
@@ -4278,7 +4173,7 @@ gnatprep preprocessor utility.
 @end menu
 
 @node Modeling Conditional Compilation in Ada,Preprocessing with gnatprep,,Conditional Compilation
-@anchor{gnat_ugn/the_gnat_compilation_model modeling-conditional-compilation-in-ada}@anchor{9f}@anchor{gnat_ugn/the_gnat_compilation_model id48}@anchor{a0}
+@anchor{gnat_ugn/the_gnat_compilation_model modeling-conditional-compilation-in-ada}@anchor{99}@anchor{gnat_ugn/the_gnat_compilation_model id48}@anchor{9a}
 @subsection Modeling Conditional Compilation in Ada
 
 
@@ -4329,7 +4224,7 @@ be achieved using Ada in general, and GNAT in particular.
 @end menu
 
 @node Use of Boolean Constants,Debugging - A Special Case,,Modeling Conditional Compilation in Ada
-@anchor{gnat_ugn/the_gnat_compilation_model id49}@anchor{a1}@anchor{gnat_ugn/the_gnat_compilation_model use-of-boolean-constants}@anchor{a2}
+@anchor{gnat_ugn/the_gnat_compilation_model id49}@anchor{9b}@anchor{gnat_ugn/the_gnat_compilation_model use-of-boolean-constants}@anchor{9c}
 @subsubsection Use of Boolean Constants
 
 
@@ -4373,7 +4268,7 @@ Then any other unit requiring conditional compilation can do a @emph{with}
 of @cite{Config} to make the constants visible.
 
 @node Debugging - A Special Case,Conditionalizing Declarations,Use of Boolean Constants,Modeling Conditional Compilation in Ada
-@anchor{gnat_ugn/the_gnat_compilation_model debugging-a-special-case}@anchor{a3}@anchor{gnat_ugn/the_gnat_compilation_model id50}@anchor{a4}
+@anchor{gnat_ugn/the_gnat_compilation_model debugging-a-special-case}@anchor{9d}@anchor{gnat_ugn/the_gnat_compilation_model id50}@anchor{9e}
 @subsubsection Debugging - A Special Case
 
 
@@ -4486,7 +4381,7 @@ end if;
 @end example
 
 @node Conditionalizing Declarations,Use of Alternative Implementations,Debugging - A Special Case,Modeling Conditional Compilation in Ada
-@anchor{gnat_ugn/the_gnat_compilation_model conditionalizing-declarations}@anchor{a5}@anchor{gnat_ugn/the_gnat_compilation_model id51}@anchor{a6}
+@anchor{gnat_ugn/the_gnat_compilation_model conditionalizing-declarations}@anchor{9f}@anchor{gnat_ugn/the_gnat_compilation_model id51}@anchor{a0}
 @subsubsection Conditionalizing Declarations
 
 
@@ -4551,7 +4446,7 @@ constant was introduced as @cite{System.Default_Bit_Order}, so you do not
 need to define this one yourself).
 
 @node Use of Alternative Implementations,Preprocessing,Conditionalizing Declarations,Modeling Conditional Compilation in Ada
-@anchor{gnat_ugn/the_gnat_compilation_model use-of-alternative-implementations}@anchor{a7}@anchor{gnat_ugn/the_gnat_compilation_model id52}@anchor{a8}
+@anchor{gnat_ugn/the_gnat_compilation_model use-of-alternative-implementations}@anchor{a1}@anchor{gnat_ugn/the_gnat_compilation_model id52}@anchor{a2}
 @subsubsection Use of Alternative Implementations
 
 
@@ -4685,7 +4580,7 @@ The same idea can also be implemented using tagged types and dispatching
 calls.
 
 @node Preprocessing,,Use of Alternative Implementations,Modeling Conditional Compilation in Ada
-@anchor{gnat_ugn/the_gnat_compilation_model preprocessing}@anchor{a9}@anchor{gnat_ugn/the_gnat_compilation_model id53}@anchor{aa}
+@anchor{gnat_ugn/the_gnat_compilation_model preprocessing}@anchor{a3}@anchor{gnat_ugn/the_gnat_compilation_model id53}@anchor{a4}
 @subsubsection Preprocessing
 
 
@@ -4708,7 +4603,7 @@ The preprocessor may be used in two separate modes. It can be used quite
 separately from the compiler, to generate a separate output source file
 that is then fed to the compiler as a separate step. This is the
 @cite{gnatprep} utility, whose use is fully described in
-@ref{19,,Preprocessing with gnatprep}.
+@ref{17,,Preprocessing with gnatprep}.
 
 The preprocessing language allows such constructs as
 
@@ -4728,10 +4623,10 @@ often more convenient. In this approach the preprocessing is integrated into
 the compilation process. The compiler is fed the preprocessor input which
 includes @cite{#if} lines etc, and then the compiler carries out the
 preprocessing internally and processes the resulting output.
-For more details on this approach, see @ref{1a,,Integrated Preprocessing}.
+For more details on this approach, see @ref{18,,Integrated Preprocessing}.
 
 @node Preprocessing with gnatprep,Integrated Preprocessing,Modeling Conditional Compilation in Ada,Conditional Compilation
-@anchor{gnat_ugn/the_gnat_compilation_model id54}@anchor{ab}@anchor{gnat_ugn/the_gnat_compilation_model preprocessing-with-gnatprep}@anchor{19}
+@anchor{gnat_ugn/the_gnat_compilation_model id54}@anchor{a5}@anchor{gnat_ugn/the_gnat_compilation_model preprocessing-with-gnatprep}@anchor{17}
 @subsection Preprocessing with @cite{gnatprep}
 
 
@@ -4744,7 +4639,7 @@ preprocessing.
 Although designed for use with GNAT, @cite{gnatprep} does not depend on any
 special GNAT features.
 For further discussion of conditional compilation in general, see
-@ref{18,,Conditional Compilation}.
+@ref{16,,Conditional Compilation}.
 
 @menu
 * Preprocessing Symbols:: 
@@ -4756,7 +4651,7 @@ For further discussion of conditional compilation in general, see
 @end menu
 
 @node Preprocessing Symbols,Using gnatprep,,Preprocessing with gnatprep
-@anchor{gnat_ugn/the_gnat_compilation_model id55}@anchor{ac}@anchor{gnat_ugn/the_gnat_compilation_model preprocessing-symbols}@anchor{ad}
+@anchor{gnat_ugn/the_gnat_compilation_model id55}@anchor{a6}@anchor{gnat_ugn/the_gnat_compilation_model preprocessing-symbols}@anchor{a7}
 @subsubsection Preprocessing Symbols
 
 
@@ -4766,7 +4661,7 @@ normal Ada (case-insensitive) rules for its syntax, with the restriction that
 all characters need to be in the ASCII set (no accented letters).
 
 @node Using gnatprep,Switches for gnatprep,Preprocessing Symbols,Preprocessing with gnatprep
-@anchor{gnat_ugn/the_gnat_compilation_model using-gnatprep}@anchor{ae}@anchor{gnat_ugn/the_gnat_compilation_model id56}@anchor{af}
+@anchor{gnat_ugn/the_gnat_compilation_model using-gnatprep}@anchor{a8}@anchor{gnat_ugn/the_gnat_compilation_model id56}@anchor{a9}
 @subsubsection Using @cite{gnatprep}
 
 
@@ -4824,7 +4719,7 @@ optional, and can be replaced by the use of the @emph{-D} switch.
 @end itemize
 
 @node Switches for gnatprep,Form of Definitions File,Using gnatprep,Preprocessing with gnatprep
-@anchor{gnat_ugn/the_gnat_compilation_model switches-for-gnatprep}@anchor{b0}@anchor{gnat_ugn/the_gnat_compilation_model id57}@anchor{b1}
+@anchor{gnat_ugn/the_gnat_compilation_model switches-for-gnatprep}@anchor{aa}@anchor{gnat_ugn/the_gnat_compilation_model id57}@anchor{ab}
 @subsubsection Switches for @cite{gnatprep}
 
 
@@ -4975,7 +4870,7 @@ deleted lines are completely removed from the output, unless -r is
 specified, in which case -b is assumed.
 
 @node Form of Definitions File,Form of Input Text for gnatprep,Switches for gnatprep,Preprocessing with gnatprep
-@anchor{gnat_ugn/the_gnat_compilation_model form-of-definitions-file}@anchor{b2}@anchor{gnat_ugn/the_gnat_compilation_model id58}@anchor{b3}
+@anchor{gnat_ugn/the_gnat_compilation_model form-of-definitions-file}@anchor{ac}@anchor{gnat_ugn/the_gnat_compilation_model id58}@anchor{ad}
 @subsubsection Form of Definitions File
 
 
@@ -5005,7 +4900,7 @@ the usual @code{--},
 and comments may be added to the definitions lines.
 
 @node Form of Input Text for gnatprep,,Form of Definitions File,Preprocessing with gnatprep
-@anchor{gnat_ugn/the_gnat_compilation_model id59}@anchor{b4}@anchor{gnat_ugn/the_gnat_compilation_model form-of-input-text-for-gnatprep}@anchor{b5}
+@anchor{gnat_ugn/the_gnat_compilation_model id59}@anchor{ae}@anchor{gnat_ugn/the_gnat_compilation_model form-of-input-text-for-gnatprep}@anchor{af}
 @subsubsection Form of Input Text for @cite{gnatprep}
 
 
@@ -5137,7 +5032,7 @@ Header : String := $XYZ;
 and then the substitution will occur as desired.
 
 @node Integrated Preprocessing,,Preprocessing with gnatprep,Conditional Compilation
-@anchor{gnat_ugn/the_gnat_compilation_model id60}@anchor{b6}@anchor{gnat_ugn/the_gnat_compilation_model integrated-preprocessing}@anchor{1a}
+@anchor{gnat_ugn/the_gnat_compilation_model id60}@anchor{b0}@anchor{gnat_ugn/the_gnat_compilation_model integrated-preprocessing}@anchor{18}
 @subsection Integrated Preprocessing
 
 
@@ -5168,7 +5063,7 @@ because @emph{gnatmake} cannot compute the checksum of the source after
 preprocessing.
 
 The actual preprocessing function is described in detail in section
-@ref{19,,Preprocessing with gnatprep}. This section only describes how integrated
+@ref{17,,Preprocessing with gnatprep}. This section only describes how integrated
 preprocessing is triggered and parameterized.
 
 @geindex -gnatep (gcc)
@@ -5207,7 +5102,7 @@ lines starting with the character '*'.
 
 After the file name or the character '*', another optional literal string
 indicating the file name of the definition file to be used for preprocessing
-(@ref{b2,,Form of Definitions File}). The definition files are found by the
+(@ref{ac,,Form of Definitions File}). The definition files are found by the
 compiler in one of the source directories. In some cases, when compiling
 a source in a directory other than the current directory, if the definition
 file is in the current directory, it may be necessary to add the current
@@ -5310,7 +5205,7 @@ the source text, write the result of this preprocessing into a file
 @end table
 
 @node Mixed Language Programming,GNAT and Other Compilation Models,Conditional Compilation,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model mixed-language-programming}@anchor{46}@anchor{gnat_ugn/the_gnat_compilation_model id61}@anchor{b7}
+@anchor{gnat_ugn/the_gnat_compilation_model mixed-language-programming}@anchor{44}@anchor{gnat_ugn/the_gnat_compilation_model id61}@anchor{b1}
 @section Mixed Language Programming
 
 
@@ -5329,7 +5224,7 @@ with a focus on combining Ada with C or C++.
 @end menu
 
 @node Interfacing to C,Calling Conventions,,Mixed Language Programming
-@anchor{gnat_ugn/the_gnat_compilation_model interfacing-to-c}@anchor{b8}@anchor{gnat_ugn/the_gnat_compilation_model id62}@anchor{b9}
+@anchor{gnat_ugn/the_gnat_compilation_model interfacing-to-c}@anchor{b2}@anchor{gnat_ugn/the_gnat_compilation_model id62}@anchor{b3}
 @subsection Interfacing to C
 
 
@@ -5440,7 +5335,7 @@ $ gnatmake my_main.adb -largs file1.o file2.o
 If the main program is in a language other than Ada, then you may have
 more than one entry point into the Ada subsystem. You must use a special
 binder option to generate callable routines that initialize and
-finalize the Ada units (@ref{ba,,Binding with Non-Ada Main Programs}).
+finalize the Ada units (@ref{b4,,Binding with Non-Ada Main Programs}).
 Calls to the initialization and finalization routines must be inserted
 in the main program, or some other appropriate point in the code. The
 call to initialize the Ada units must occur before the first Ada
@@ -5556,7 +5451,7 @@ GNAT linker not to include the standard startup objects by passing the
 @code{-nostartfiles} switch to @cite{gnatlink}.
 
 @node Calling Conventions,Building Mixed Ada and C++ Programs,Interfacing to C,Mixed Language Programming
-@anchor{gnat_ugn/the_gnat_compilation_model calling-conventions}@anchor{bb}@anchor{gnat_ugn/the_gnat_compilation_model id63}@anchor{bc}
+@anchor{gnat_ugn/the_gnat_compilation_model calling-conventions}@anchor{b5}@anchor{gnat_ugn/the_gnat_compilation_model id63}@anchor{b6}
 @subsection Calling Conventions
 
 
@@ -5880,7 +5775,7 @@ identifier (for example in an @cite{Import} pragma) with the same
 meaning as Fortran.
 
 @node Building Mixed Ada and C++ Programs,Generating Ada Bindings for C and C++ headers,Calling Conventions,Mixed Language Programming
-@anchor{gnat_ugn/the_gnat_compilation_model id64}@anchor{bd}@anchor{gnat_ugn/the_gnat_compilation_model building-mixed-ada-and-c-programs}@anchor{be}
+@anchor{gnat_ugn/the_gnat_compilation_model id64}@anchor{b7}@anchor{gnat_ugn/the_gnat_compilation_model building-mixed-ada-and-c-programs}@anchor{b8}
 @subsection Building Mixed Ada and C++ Programs
 
 
@@ -5898,7 +5793,7 @@ challenge.  This section gives a few hints that should make this task easier.
 @end menu
 
 @node Interfacing to C++,Linking a Mixed C++ & Ada Program,,Building Mixed Ada and C++ Programs
-@anchor{gnat_ugn/the_gnat_compilation_model id65}@anchor{bf}@anchor{gnat_ugn/the_gnat_compilation_model id66}@anchor{c0}
+@anchor{gnat_ugn/the_gnat_compilation_model id65}@anchor{b9}@anchor{gnat_ugn/the_gnat_compilation_model id66}@anchor{ba}
 @subsubsection Interfacing to C++
 
 
@@ -5910,7 +5805,7 @@ Interfacing can be done at 3 levels: simple data, subprograms, and
 classes. In the first two cases, GNAT offers a specific @cite{Convention C_Plus_Plus}
 (or @cite{CPP}) that behaves exactly like @cite{Convention C}.
 Usually, C++ mangles the names of subprograms. To generate proper mangled
-names automatically, see @ref{1b,,Generating Ada Bindings for C and C++ headers}).
+names automatically, see @ref{19,,Generating Ada Bindings for C and C++ headers}).
 This problem can also be addressed manually in two ways:
 
 
@@ -5929,7 +5824,7 @@ Interfacing at the class level can be achieved by using the GNAT specific
 pragmas such as @cite{CPP_Constructor}.  See the @cite{GNAT_Reference_Manual} for additional information.
 
 @node Linking a Mixed C++ & Ada Program,A Simple Example,Interfacing to C++,Building Mixed Ada and C++ Programs
-@anchor{gnat_ugn/the_gnat_compilation_model linking-a-mixed-c-ada-program}@anchor{c1}@anchor{gnat_ugn/the_gnat_compilation_model linking-a-mixed-c-and-ada-program}@anchor{c2}
+@anchor{gnat_ugn/the_gnat_compilation_model linking-a-mixed-c-ada-program}@anchor{bb}@anchor{gnat_ugn/the_gnat_compilation_model linking-a-mixed-c-and-ada-program}@anchor{bc}
 @subsubsection Linking a Mixed C++ & Ada Program
 
 
@@ -6044,7 +5939,7 @@ which has a large knowledge base and knows how to link Ada and C++ code
 together automatically in most cases.
 
 @node A Simple Example,Interfacing with C++ constructors,Linking a Mixed C++ & Ada Program,Building Mixed Ada and C++ Programs
-@anchor{gnat_ugn/the_gnat_compilation_model id67}@anchor{c3}@anchor{gnat_ugn/the_gnat_compilation_model a-simple-example}@anchor{c4}
+@anchor{gnat_ugn/the_gnat_compilation_model id67}@anchor{bd}@anchor{gnat_ugn/the_gnat_compilation_model a-simple-example}@anchor{be}
 @subsubsection A Simple Example
 
 
@@ -6173,7 +6068,7 @@ end Simple_Cpp_Interface;
 @end example
 
 @node Interfacing with C++ constructors,Interfacing with C++ at the Class Level,A Simple Example,Building Mixed Ada and C++ Programs
-@anchor{gnat_ugn/the_gnat_compilation_model id68}@anchor{c5}@anchor{gnat_ugn/the_gnat_compilation_model interfacing-with-c-constructors}@anchor{c6}
+@anchor{gnat_ugn/the_gnat_compilation_model id68}@anchor{bf}@anchor{gnat_ugn/the_gnat_compilation_model interfacing-with-c-constructors}@anchor{c0}
 @subsubsection Interfacing with C++ constructors
 
 
@@ -6200,8 +6095,8 @@ public:
 
 For this purpose we can write the following package spec (further
 information on how to build this spec is available in
-@ref{c7,,Interfacing with C++ at the Class Level} and
-@ref{1b,,Generating Ada Bindings for C and C++ headers}).
+@ref{c1,,Interfacing with C++ at the Class Level} and
+@ref{19,,Generating Ada Bindings for C and C++ headers}).
 
 @example
 with Interfaces.C; use Interfaces.C;
@@ -6370,7 +6265,7 @@ by means of a limited aggregate. Any further action associated with
 the constructor can be placed inside the construct.
 
 @node Interfacing with C++ at the Class Level,,Interfacing with C++ constructors,Building Mixed Ada and C++ Programs
-@anchor{gnat_ugn/the_gnat_compilation_model interfacing-with-c-at-the-class-level}@anchor{c7}@anchor{gnat_ugn/the_gnat_compilation_model id69}@anchor{c8}
+@anchor{gnat_ugn/the_gnat_compilation_model interfacing-with-c-at-the-class-level}@anchor{c1}@anchor{gnat_ugn/the_gnat_compilation_model id69}@anchor{c2}
 @subsubsection Interfacing with C++ at the Class Level
 
 
@@ -6616,7 +6511,7 @@ int main ()
 @end example
 
 @node Generating Ada Bindings for C and C++ headers,Generating C Headers for Ada Specifications,Building Mixed Ada and C++ Programs,Mixed Language Programming
-@anchor{gnat_ugn/the_gnat_compilation_model id70}@anchor{c9}@anchor{gnat_ugn/the_gnat_compilation_model generating-ada-bindings-for-c-and-c-headers}@anchor{1b}
+@anchor{gnat_ugn/the_gnat_compilation_model id70}@anchor{c3}@anchor{gnat_ugn/the_gnat_compilation_model generating-ada-bindings-for-c-and-c-headers}@anchor{19}
 @subsection Generating Ada Bindings for C and C++ headers
 
 
@@ -6666,7 +6561,7 @@ easier to interface with other languages than previous versions of Ada.
 @end menu
 
 @node Running the Binding Generator,Generating Bindings for C++ Headers,,Generating Ada Bindings for C and C++ headers
-@anchor{gnat_ugn/the_gnat_compilation_model id71}@anchor{ca}@anchor{gnat_ugn/the_gnat_compilation_model running-the-binding-generator}@anchor{cb}
+@anchor{gnat_ugn/the_gnat_compilation_model id71}@anchor{c4}@anchor{gnat_ugn/the_gnat_compilation_model running-the-binding-generator}@anchor{c5}
 @subsubsection Running the Binding Generator
 
 
@@ -6760,7 +6655,7 @@ $ g++ -c -fdump-ada-spec readline1.h
 @end example
 
 @node Generating Bindings for C++ Headers,Switches,Running the Binding Generator,Generating Ada Bindings for C and C++ headers
-@anchor{gnat_ugn/the_gnat_compilation_model id72}@anchor{cc}@anchor{gnat_ugn/the_gnat_compilation_model generating-bindings-for-c-headers}@anchor{cd}
+@anchor{gnat_ugn/the_gnat_compilation_model id72}@anchor{c6}@anchor{gnat_ugn/the_gnat_compilation_model generating-bindings-for-c-headers}@anchor{c7}
 @subsubsection Generating Bindings for C++ Headers
 
 
@@ -6861,7 +6756,7 @@ use Class_Dog;
 @end example
 
 @node Switches,,Generating Bindings for C++ Headers,Generating Ada Bindings for C and C++ headers
-@anchor{gnat_ugn/the_gnat_compilation_model switches}@anchor{ce}@anchor{gnat_ugn/the_gnat_compilation_model switches-for-ada-binding-generation}@anchor{cf}
+@anchor{gnat_ugn/the_gnat_compilation_model switches}@anchor{c8}@anchor{gnat_ugn/the_gnat_compilation_model switches-for-ada-binding-generation}@anchor{c9}
 @subsubsection Switches
 
 
@@ -6909,7 +6804,7 @@ Extract comments from headers and generate Ada comments in the Ada spec files.
 @end table
 
 @node Generating C Headers for Ada Specifications,,Generating Ada Bindings for C and C++ headers,Mixed Language Programming
-@anchor{gnat_ugn/the_gnat_compilation_model generating-c-headers-for-ada-specifications}@anchor{d0}@anchor{gnat_ugn/the_gnat_compilation_model id73}@anchor{d1}
+@anchor{gnat_ugn/the_gnat_compilation_model generating-c-headers-for-ada-specifications}@anchor{ca}@anchor{gnat_ugn/the_gnat_compilation_model id73}@anchor{cb}
 @subsection Generating C Headers for Ada Specifications
 
 
@@ -6952,7 +6847,7 @@ Subprogram declarations
 @end menu
 
 @node Running the C Header Generator,,,Generating C Headers for Ada Specifications
-@anchor{gnat_ugn/the_gnat_compilation_model running-the-c-header-generator}@anchor{d2}
+@anchor{gnat_ugn/the_gnat_compilation_model running-the-c-header-generator}@anchor{cc}
 @subsubsection Running the C Header Generator
 
 
@@ -7020,7 +6915,7 @@ You can then @cite{include} @code{pack1.h} from a C source file and use the type
 call subprograms, reference objects, and constants.
 
 @node GNAT and Other Compilation Models,Using GNAT Files with External Tools,Mixed Language Programming,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model id74}@anchor{d3}@anchor{gnat_ugn/the_gnat_compilation_model gnat-and-other-compilation-models}@anchor{47}
+@anchor{gnat_ugn/the_gnat_compilation_model id74}@anchor{cd}@anchor{gnat_ugn/the_gnat_compilation_model gnat-and-other-compilation-models}@anchor{45}
 @section GNAT and Other Compilation Models
 
 
@@ -7036,7 +6931,7 @@ used for Ada 83.
 @end menu
 
 @node Comparison between GNAT and C/C++ Compilation Models,Comparison between GNAT and Conventional Ada Library Models,,GNAT and Other Compilation Models
-@anchor{gnat_ugn/the_gnat_compilation_model comparison-between-gnat-and-c-c-compilation-models}@anchor{d4}@anchor{gnat_ugn/the_gnat_compilation_model id75}@anchor{d5}
+@anchor{gnat_ugn/the_gnat_compilation_model comparison-between-gnat-and-c-c-compilation-models}@anchor{ce}@anchor{gnat_ugn/the_gnat_compilation_model id75}@anchor{cf}
 @subsection Comparison between GNAT and C/C++ Compilation Models
 
 
@@ -7070,7 +6965,7 @@ elaboration, a C++ compiler would simply construct a program that
 malfunctioned at run time.
 
 @node Comparison between GNAT and Conventional Ada Library Models,,Comparison between GNAT and C/C++ Compilation Models,GNAT and Other Compilation Models
-@anchor{gnat_ugn/the_gnat_compilation_model comparison-between-gnat-and-conventional-ada-library-models}@anchor{d6}@anchor{gnat_ugn/the_gnat_compilation_model id76}@anchor{d7}
+@anchor{gnat_ugn/the_gnat_compilation_model comparison-between-gnat-and-conventional-ada-library-models}@anchor{d0}@anchor{gnat_ugn/the_gnat_compilation_model id76}@anchor{d1}
 @subsection Comparison between GNAT and Conventional Ada Library Models
 
 
@@ -7138,7 +7033,7 @@ of rules saying what source files must be present when a file is
 compiled.
 
 @node Using GNAT Files with External Tools,,GNAT and Other Compilation Models,The GNAT Compilation Model
-@anchor{gnat_ugn/the_gnat_compilation_model using-gnat-files-with-external-tools}@anchor{1c}@anchor{gnat_ugn/the_gnat_compilation_model id77}@anchor{d8}
+@anchor{gnat_ugn/the_gnat_compilation_model using-gnat-files-with-external-tools}@anchor{1a}@anchor{gnat_ugn/the_gnat_compilation_model id77}@anchor{d2}
 @section Using GNAT Files with External Tools
 
 
@@ -7152,7 +7047,7 @@ used with tools designed for other languages.
 @end menu
 
 @node Using Other Utility Programs with GNAT,The External Symbol Naming Scheme of GNAT,,Using GNAT Files with External Tools
-@anchor{gnat_ugn/the_gnat_compilation_model using-other-utility-programs-with-gnat}@anchor{d9}@anchor{gnat_ugn/the_gnat_compilation_model id78}@anchor{da}
+@anchor{gnat_ugn/the_gnat_compilation_model using-other-utility-programs-with-gnat}@anchor{d3}@anchor{gnat_ugn/the_gnat_compilation_model id78}@anchor{d4}
 @subsection Using Other Utility Programs with GNAT
 
 
@@ -7167,7 +7062,7 @@ gprof (a profiling program), gdb (the FSF debugger), and utilities such
 as Purify.
 
 @node The External Symbol Naming Scheme of GNAT,,Using Other Utility Programs with GNAT,Using GNAT Files with External Tools
-@anchor{gnat_ugn/the_gnat_compilation_model the-external-symbol-naming-scheme-of-gnat}@anchor{db}@anchor{gnat_ugn/the_gnat_compilation_model id79}@anchor{dc}
+@anchor{gnat_ugn/the_gnat_compilation_model the-external-symbol-naming-scheme-of-gnat}@anchor{d5}@anchor{gnat_ugn/the_gnat_compilation_model id79}@anchor{d6}
 @subsection The External Symbol Naming Scheme of GNAT
 
 
@@ -7225,24 +7120,25 @@ the external name of this procedure will be @cite{_ada_hello}.
 
 @c -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
 
-@node Building Executable Programs with GNAT,GNAT Project Manager,The GNAT Compilation Model,Top
-@anchor{gnat_ugn/building_executable_programs_with_gnat building-executable-programs-with-gnat}@anchor{a}@anchor{gnat_ugn/building_executable_programs_with_gnat doc}@anchor{dd}@anchor{gnat_ugn/building_executable_programs_with_gnat id1}@anchor{de}
+@node Building Executable Programs with GNAT,GNAT Utility Programs,The GNAT Compilation Model,Top
+@anchor{gnat_ugn/building_executable_programs_with_gnat building-executable-programs-with-gnat}@anchor{a}@anchor{gnat_ugn/building_executable_programs_with_gnat doc}@anchor{d7}@anchor{gnat_ugn/building_executable_programs_with_gnat id1}@anchor{d8}
 @chapter Building Executable Programs with GNAT
 
 
 This chapter describes first the gnatmake tool
-(@ref{1d,,Building with gnatmake}),
+(@ref{1b,,Building with gnatmake}),
 which automatically determines the set of sources
 needed by an Ada compilation unit and executes the necessary
 (re)compilations, binding and linking.
 It also explains how to use each tool individually: the
-compiler (gcc, see @ref{1e,,Compiling with gcc}),
-binder (gnatbind, see @ref{1f,,Binding with gnatbind}),
-and linker (gnatlink, see @ref{20,,Linking with gnatlink})
+compiler (gcc, see @ref{1c,,Compiling with gcc}),
+binder (gnatbind, see @ref{1d,,Binding with gnatbind}),
+and linker (gnatlink, see @ref{1e,,Linking with gnatlink})
 to build executable programs.
 Finally, this chapter provides examples of
 how to make use of the general GNU make mechanism
-in a GNAT context (see @ref{21,,Using the GNU make Utility}).
+in a GNAT context (see @ref{1f,,Using the GNU make Utility}).
+
 
 @menu
 * Building with gnatmake:: 
@@ -7255,7 +7151,7 @@ in a GNAT context (see @ref{21,,Using the GNU make Utility}).
 @end menu
 
 @node Building with gnatmake,Compiling with gcc,,Building Executable Programs with GNAT
-@anchor{gnat_ugn/building_executable_programs_with_gnat the-gnat-make-program-gnatmake}@anchor{1d}@anchor{gnat_ugn/building_executable_programs_with_gnat building-with-gnatmake}@anchor{df}
+@anchor{gnat_ugn/building_executable_programs_with_gnat the-gnat-make-program-gnatmake}@anchor{1b}@anchor{gnat_ugn/building_executable_programs_with_gnat building-with-gnatmake}@anchor{d9}
 @section Building with @emph{gnatmake}
 
 
@@ -7302,8 +7198,9 @@ changes to the source program cause corresponding changes in
 dependencies, they will always be tracked exactly correctly by
 @emph{gnatmake}.
 
-Note that for advanced description of project structure, we recommend creating
-a project file as explained in @ref{b,,GNAT Project Manager} and use the
+Note that for advanced forms of project structure, we recommend creating
+a project file as explained in the @emph{GNAT_Project_Manager} chapter in the
+@emph{GPRbuild User's Guide}, and using the
 @emph{gprbuild} tool which supports building with project files and works similarly
 to @emph{gnatmake}.
 
@@ -7318,7 +7215,7 @@ to @emph{gnatmake}.
 @end menu
 
 @node Running gnatmake,Switches for gnatmake,,Building with gnatmake
-@anchor{gnat_ugn/building_executable_programs_with_gnat running-gnatmake}@anchor{e0}@anchor{gnat_ugn/building_executable_programs_with_gnat id2}@anchor{e1}
+@anchor{gnat_ugn/building_executable_programs_with_gnat running-gnatmake}@anchor{da}@anchor{gnat_ugn/building_executable_programs_with_gnat id2}@anchor{db}
 @subsection Running @emph{gnatmake}
 
 
@@ -7346,14 +7243,14 @@ be searched for in the specified directory only. Otherwise, the input
 source file will first be searched in the directory where
 @emph{gnatmake} was invoked and if it is not found, it will be search on
 the source path of the compiler as described in
-@ref{8e,,Search Paths and the Run-Time Library (RTL)}.
+@ref{89,,Search Paths and the Run-Time Library (RTL)}.
 
 All @emph{gnatmake} output (except when you specify @emph{-M}) is sent to
 @code{stderr}. The output produced by the
 @emph{-M} switch is sent to @code{stdout}.
 
 @node Switches for gnatmake,Mode Switches for gnatmake,Running gnatmake,Building with gnatmake
-@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gnatmake}@anchor{e2}@anchor{gnat_ugn/building_executable_programs_with_gnat id3}@anchor{e3}
+@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gnatmake}@anchor{dc}@anchor{gnat_ugn/building_executable_programs_with_gnat id3}@anchor{dd}
 @subsection Switches for @emph{gnatmake}
 
 
@@ -7727,7 +7624,7 @@ then instead object files and ALI files that already exist are overwritten
 in place. This means that once a large project is organized into separate
 directories in the desired manner, then @emph{gnatmake} will automatically
 maintain and update this organization. If no ALI files are found on the
-Ada object path (see @ref{8e,,Search Paths and the Run-Time Library (RTL)}),
+Ada object path (see @ref{89,,Search Paths and the Run-Time Library (RTL)}),
 the new object and ALI files are created in the
 directory containing the source being compiled. If another organization
 is desired, where objects and sources are kept in different directories,
@@ -7888,9 +7785,11 @@ Same as @code{--create-missing-dirs}
 @item @code{-P@emph{project}}
 
 Use project file @cite{project}. Only one such switch can be used.
-@ref{e4,,gnatmake and Project Files}.
 @end table
 
+@c -- Comment:
+@c :ref:`gnatmake_and_Project_Files`.
+
 @geindex -q (gnatmake)
 
 
@@ -7929,10 +7828,12 @@ This switch is recommended when Integrated Preprocessing is used.
 
 Unique. Recompile at most the main files. It implies -c. Combined with
 -f, it is equivalent to calling the compiler directly. Note that using
--u with a project file and no main has a special meaning
-(@ref{e5,,Project Files and Main Subprograms}).
+-u with a project file and no main has a special meaning.
 @end table
 
+@c --Comment:
+@c (See :ref:`Project_Files_and_Main_Subprograms`.)
+
 @geindex -U (gnatmake)
 
 
@@ -7989,7 +7890,7 @@ Verbosity level High. Equivalent to -v.
 @item @code{-vP@emph{x}}
 
 Indicate the verbosity of the parsing of GNAT project files.
-See @ref{e6,,Switches Related to Project Files}.
+See @ref{de,,Switches Related to Project Files}.
 @end table
 
 @geindex -x (gnatmake)
@@ -8013,7 +7914,7 @@ command line need to be sources of a project file.
 Indicate that external variable @cite{name} has the value @cite{value}.
 The Project Manager will use this value for occurrences of
 @cite{external(name)} when parsing the project file.
-@ref{e6,,Switches Related to Project Files}.
+@ref{de,,Switches Related to Project Files}.
 @end table
 
 @geindex -z (gnatmake)
@@ -8047,7 +7948,7 @@ is passed to @emph{gcc} (e.g., @emph{-O}, @emph{-gnato,} etc.)
 
 When looking for source files also look in directory @cite{dir}.
 The order in which source files search is undertaken is
-described in @ref{8e,,Search Paths and the Run-Time Library (RTL)}.
+described in @ref{89,,Search Paths and the Run-Time Library (RTL)}.
 @end table
 
 @geindex -aL (gnatmake)
@@ -8079,7 +7980,7 @@ ALI files.
 
 When searching for library and object files, look in directory
 @cite{dir}. The order in which library files are searched is described in
-@ref{91,,Search Paths for gnatbind}.
+@ref{8c,,Search Paths for gnatbind}.
 @end table
 
 @geindex Search paths
@@ -8184,7 +8085,7 @@ The selected path is handled like a normal RTS path.
 @end table
 
 @node Mode Switches for gnatmake,Notes on the Command Line,Switches for gnatmake,Building with gnatmake
-@anchor{gnat_ugn/building_executable_programs_with_gnat id4}@anchor{e7}@anchor{gnat_ugn/building_executable_programs_with_gnat mode-switches-for-gnatmake}@anchor{e8}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id4}@anchor{df}@anchor{gnat_ugn/building_executable_programs_with_gnat mode-switches-for-gnatmake}@anchor{e0}
 @subsection Mode Switches for @emph{gnatmake}
 
 
@@ -8244,7 +8145,7 @@ or @emph{-largs}.
 @end table
 
 @node Notes on the Command Line,How gnatmake Works,Mode Switches for gnatmake,Building with gnatmake
-@anchor{gnat_ugn/building_executable_programs_with_gnat id5}@anchor{e9}@anchor{gnat_ugn/building_executable_programs_with_gnat notes-on-the-command-line}@anchor{ea}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id5}@anchor{e1}@anchor{gnat_ugn/building_executable_programs_with_gnat notes-on-the-command-line}@anchor{e2}
 @subsection Notes on the Command Line
 
 
@@ -8314,7 +8215,7 @@ that the debugging information may be out of date.
 @end itemize
 
 @node How gnatmake Works,Examples of gnatmake Usage,Notes on the Command Line,Building with gnatmake
-@anchor{gnat_ugn/building_executable_programs_with_gnat id6}@anchor{eb}@anchor{gnat_ugn/building_executable_programs_with_gnat how-gnatmake-works}@anchor{ec}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id6}@anchor{e3}@anchor{gnat_ugn/building_executable_programs_with_gnat how-gnatmake-works}@anchor{e4}
 @subsection How @emph{gnatmake} Works
 
 
@@ -8354,14 +8255,14 @@ When invoking @emph{gnatmake} with several @cite{file_names}, if a unit is
 imported by several of the executables, it will be recompiled at most once.
 
 Note: when using non-standard naming conventions
-(@ref{37,,Using Other File Names}), changing through a configuration pragmas
+(@ref{35,,Using Other File Names}), changing through a configuration pragmas
 file the version of a source and invoking @emph{gnatmake} to recompile may
 have no effect, if the previous version of the source is still accessible
 by @emph{gnatmake}. It may be necessary to use the switch
 -f.
 
 @node Examples of gnatmake Usage,,How gnatmake Works,Building with gnatmake
-@anchor{gnat_ugn/building_executable_programs_with_gnat examples-of-gnatmake-usage}@anchor{ed}@anchor{gnat_ugn/building_executable_programs_with_gnat id7}@anchor{ee}
+@anchor{gnat_ugn/building_executable_programs_with_gnat examples-of-gnatmake-usage}@anchor{e5}@anchor{gnat_ugn/building_executable_programs_with_gnat id7}@anchor{e6}
 @subsection Examples of @emph{gnatmake} Usage
 
 
@@ -8393,7 +8294,7 @@ displaying commands it is executing.
 @end table
 
 @node Compiling with gcc,Compiler Switches,Building with gnatmake,Building Executable Programs with GNAT
-@anchor{gnat_ugn/building_executable_programs_with_gnat compiling-with-gcc}@anchor{1e}@anchor{gnat_ugn/building_executable_programs_with_gnat id8}@anchor{ef}
+@anchor{gnat_ugn/building_executable_programs_with_gnat compiling-with-gcc}@anchor{1c}@anchor{gnat_ugn/building_executable_programs_with_gnat id8}@anchor{e7}
 @section Compiling with @emph{gcc}
 
 
@@ -8410,7 +8311,7 @@ that can be used to control the behavior of the compiler.
 @end menu
 
 @node Compiling Programs,Search Paths and the Run-Time Library RTL,,Compiling with gcc
-@anchor{gnat_ugn/building_executable_programs_with_gnat compiling-programs}@anchor{f0}@anchor{gnat_ugn/building_executable_programs_with_gnat id9}@anchor{f1}
+@anchor{gnat_ugn/building_executable_programs_with_gnat compiling-programs}@anchor{e8}@anchor{gnat_ugn/building_executable_programs_with_gnat id9}@anchor{e9}
 @subsection Compiling Programs
 
 
@@ -8521,11 +8422,11 @@ calls @cite{gnat1} (the Ada compiler) twice to compile @code{x.adb} and
 The compiler generates two object files @code{x.o} and @code{y.o}
 and the two ALI files @code{x.ali} and @code{y.ali}.
 
-Any switches apply to all the files listed, see @ref{f2,,Compiler Switches} for a
+Any switches apply to all the files listed, see @ref{ea,,Compiler Switches} for a
 list of available @emph{gcc} switches.
 
 @node Search Paths and the Run-Time Library RTL,Order of Compilation Issues,Compiling Programs,Compiling with gcc
-@anchor{gnat_ugn/building_executable_programs_with_gnat id10}@anchor{f3}@anchor{gnat_ugn/building_executable_programs_with_gnat search-paths-and-the-run-time-library-rtl}@anchor{8e}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id10}@anchor{eb}@anchor{gnat_ugn/building_executable_programs_with_gnat search-paths-and-the-run-time-library-rtl}@anchor{89}
 @subsection Search Paths and the Run-Time Library (RTL)
 
 
@@ -8582,7 +8483,7 @@ names separated by colons (semicolons when working with the NT version).
 The content of the @code{ada_source_path} file which is part of the GNAT
 installation tree and is used to store standard libraries such as the
 GNAT Run Time Library (RTL) source files.
-@ref{8b,,Installing a library}
+@ref{87,,Installing a library}
 @end itemize
 
 Specifying the switch @emph{-I-}
@@ -8624,7 +8525,7 @@ in compiling sources from multiple directories. This can make
 development environments much more flexible.
 
 @node Order of Compilation Issues,Examples,Search Paths and the Run-Time Library RTL,Compiling with gcc
-@anchor{gnat_ugn/building_executable_programs_with_gnat id11}@anchor{f4}@anchor{gnat_ugn/building_executable_programs_with_gnat order-of-compilation-issues}@anchor{f5}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id11}@anchor{ec}@anchor{gnat_ugn/building_executable_programs_with_gnat order-of-compilation-issues}@anchor{ed}
 @subsection Order of Compilation Issues
 
 
@@ -8652,7 +8553,7 @@ source files on which it depends.
 
 @item 
 There is no library as such, apart from the ALI files
-(@ref{44,,The Ada Library Information Files}, for information on the format
+(@ref{42,,The Ada Library Information Files}, for information on the format
 of these files). For now we find it convenient to create separate ALI files,
 but eventually the information therein may be incorporated into the object
 file directly.
@@ -8665,7 +8566,7 @@ described above), or you will receive a fatal error message.
 @end itemize
 
 @node Examples,,Order of Compilation Issues,Compiling with gcc
-@anchor{gnat_ugn/building_executable_programs_with_gnat id12}@anchor{f6}@anchor{gnat_ugn/building_executable_programs_with_gnat examples}@anchor{f7}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id12}@anchor{ee}@anchor{gnat_ugn/building_executable_programs_with_gnat examples}@anchor{ef}
 @subsection Examples
 
 
@@ -8693,7 +8594,7 @@ Compile the subunit in file @code{abc-def.adb} in semantic-checking-only
 mode.
 
 @node Compiler Switches,Binding with gnatbind,Compiling with gcc,Building Executable Programs with GNAT
-@anchor{gnat_ugn/building_executable_programs_with_gnat compiler-switches}@anchor{f8}@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gcc}@anchor{f2}
+@anchor{gnat_ugn/building_executable_programs_with_gnat compiler-switches}@anchor{f0}@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gcc}@anchor{ea}
 @section Compiler Switches
 
 
@@ -8732,7 +8633,7 @@ compilation units.
 @end menu
 
 @node Alphabetical List of All Switches,Output and Error Message Control,,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id13}@anchor{f9}@anchor{gnat_ugn/building_executable_programs_with_gnat alphabetical-list-of-all-switches}@anchor{fa}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id13}@anchor{f1}@anchor{gnat_ugn/building_executable_programs_with_gnat alphabetical-list-of-all-switches}@anchor{f2}
 @subsection Alphabetical List of All Switches
 
 
@@ -8918,7 +8819,7 @@ and thus producing inferior code.
 
 Causes the compiler to avoid assumptions regarding non-aliasing
 of objects of different types. See
-@ref{fb,,Optimization and Strict Aliasing} for details.
+@ref{f3,,Optimization and Strict Aliasing} for details.
 @end table
 
 @geindex -fno-strict-overflow (gcc)
@@ -8944,7 +8845,7 @@ for very peculiar cases of low-level programming.
 @item @code{-fstack-check}
 
 Activates stack checking.
-See @ref{fc,,Stack Overflow Checking} for details.
+See @ref{f4,,Stack Overflow Checking} for details.
 @end table
 
 @geindex -fstack-usage (gcc)
@@ -8955,7 +8856,7 @@ See @ref{fc,,Stack Overflow Checking} for details.
 @item @code{-fstack-usage}
 
 Makes the compiler output stack usage information for the program, on a
-per-subprogram basis. See @ref{fd,,Static Stack Usage Analysis} for details.
+per-subprogram basis. See @ref{f5,,Static Stack Usage Analysis} for details.
 @end table
 
 @geindex -g (gcc)
@@ -9085,7 +8986,7 @@ Generate brief messages to @code{stderr} even if verbose mode set.
 @item @code{-gnatB}
 
 Assume no invalid (bad) values except for 'Valid attribute use
-(@ref{fe,,Validity Checking}).
+(@ref{f6,,Validity Checking}).
 @end table
 
 @geindex -gnatc (gcc)
@@ -9200,7 +9101,7 @@ not share the memory location of @cite{Obj}.
 
 Specify a configuration pragma file
 (the equal sign is optional)
-(@ref{7b,,The Configuration Pragmas Files}).
+(@ref{79,,The Configuration Pragmas Files}).
 @end table
 
 @geindex -gnateC (gcc)
@@ -9233,7 +9134,7 @@ Disable atomic synchronization
 @item @code{-gnateDsymbol[=@emph{value}]}
 
 Defines a symbol, associated with @cite{value}, for preprocessing.
-(@ref{1a,,Integrated Preprocessing}).
+(@ref{18,,Integrated Preprocessing}).
 @end table
 
 @geindex -gnateE (gcc)
@@ -9282,7 +9183,7 @@ for unconstrained predefined types. See description of pragma
 
 The @cite{-gnatc} switch must always be specified before this switch, e.g.
 @cite{-gnatceg}. Generate a C header from the Ada input file. See
-@ref{d0,,Generating C Headers for Ada Specifications} for more
+@ref{ca,,Generating C Headers for Ada Specifications} for more
 information.
 @end quotation
 
@@ -9356,7 +9257,7 @@ This switch turns off the info messages about implicit elaboration pragmas.
 
 Specify a mapping file
 (the equal sign is optional)
-(@ref{ff,,Units to Sources Mapping Files}).
+(@ref{f7,,Units to Sources Mapping Files}).
 @end table
 
 @geindex -gnatep (gcc)
@@ -9368,7 +9269,7 @@ Specify a mapping file
 
 Specify a preprocessing data file
 (the equal sign is optional)
-(@ref{1a,,Integrated Preprocessing}).
+(@ref{18,,Integrated Preprocessing}).
 @end table
 
 @geindex -gnateP (gcc)
@@ -9538,7 +9439,7 @@ support this switch.
 @item @code{-gnateV}
 
 Check that all actual parameters of a subprogram call are valid according to
-the rules of validity checking (@ref{fe,,Validity Checking}).
+the rules of validity checking (@ref{f6,,Validity Checking}).
 @end table
 
 @geindex -gnateY (gcc)
@@ -9631,7 +9532,7 @@ Output usage information. The output is written to @code{stdout}.
 
 Identifier character set (@cite{c} = 1/2/3/4/8/9/p/f/n/w).
 For details of the possible selections for @cite{c},
-see @ref{4a,,Character Set Control}.
+see @ref{48,,Character Set Control}.
 @end table
 
 @geindex -gnatI (gcc)
@@ -9832,7 +9733,7 @@ overflow checking is enabled.
 Note that division by zero is a separate check that is not
 controlled by this switch (divide-by-zero checking is on by default).
 
-See also @ref{100,,Specifying the Desired Mode}.
+See also @ref{f8,,Specifying the Desired Mode}.
 @end table
 
 @geindex -gnatp (gcc)
@@ -9842,7 +9743,7 @@ See also @ref{100,,Specifying the Desired Mode}.
 
 @item @code{-gnatp}
 
-Suppress all checks. See @ref{101,,Run-Time Checks} for details. This switch
+Suppress all checks. See @ref{f9,,Run-Time Checks} for details. This switch
 has no effect if cancelled by a subsequent @emph{-gnat-p} switch.
 @end table
 
@@ -9994,7 +9895,7 @@ Verbose mode. Full error output with source lines to @code{stdout}.
 
 @item @code{-gnatV}
 
-Control level of validity checking (@ref{fe,,Validity Checking}).
+Control level of validity checking (@ref{f6,,Validity Checking}).
 @end table
 
 @geindex -gnatw (gcc)
@@ -10007,7 +9908,7 @@ Control level of validity checking (@ref{fe,,Validity Checking}).
 Warning mode where
 @cite{xxx} is a string of option letters that denotes
 the exact warnings that
-are enabled or disabled (@ref{102,,Warning Message Control}).
+are enabled or disabled (@ref{fa,,Warning Message Control}).
 @end table
 
 @geindex -gnatW (gcc)
@@ -10048,7 +9949,7 @@ Enable GNAT implementation extensions and latest Ada version.
 
 @item @code{-gnaty}
 
-Enable built-in style checks (@ref{103,,Style Checking}).
+Enable built-in style checks (@ref{fb,,Style Checking}).
 @end table
 
 @geindex -gnatz (gcc)
@@ -10073,7 +9974,7 @@ Distribution stub generation and compilation
 
 Direct GNAT to search the @cite{dir} directory for source files needed by
 the current compilation
-(see @ref{8e,,Search Paths and the Run-Time Library (RTL)}).
+(see @ref{89,,Search Paths and the Run-Time Library (RTL)}).
 @end table
 
 @geindex -I- (gcc)
@@ -10087,7 +9988,7 @@ the current compilation
 
 Except for the source file named in the command line, do not look for source
 files in the directory containing the source file named in the command line
-(see @ref{8e,,Search Paths and the Run-Time Library (RTL)}).
+(see @ref{89,,Search Paths and the Run-Time Library (RTL)}).
 @end table
 
 @geindex -o (gcc)
@@ -10191,7 +10092,7 @@ Optimize space usage
 @end multitable
 
 
-See also @ref{104,,Optimization Levels}.
+See also @ref{fc,,Optimization Levels}.
 @end table
 
 @geindex -pass-exit-codes (gcc)
@@ -10213,7 +10114,7 @@ exit status.
 @item @code{--RTS=@emph{rts-path}}
 
 Specifies the default location of the runtime library. Same meaning as the
-equivalent @emph{gnatmake} flag (@ref{e2,,Switches for gnatmake}).
+equivalent @emph{gnatmake} flag (@ref{dc,,Switches for gnatmake}).
 @end table
 
 @geindex -S (gcc)
@@ -10339,7 +10240,7 @@ as warning mode modifiers (see description of @emph{-gnatw}).
 @item 
 Once a 'V' appears in the string (that is a use of the @emph{-gnatV}
 switch), then all further characters in the switch are interpreted
-as validity checking options (@ref{fe,,Validity Checking}).
+as validity checking options (@ref{f6,,Validity Checking}).
 
 @item 
 Option 'em', 'ec', 'ep', 'l=' and 'R' must be the last options in
@@ -10347,7 +10248,7 @@ a combined list of options.
 @end itemize
 
 @node Output and Error Message Control,Warning Message Control,Alphabetical List of All Switches,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id14}@anchor{105}@anchor{gnat_ugn/building_executable_programs_with_gnat output-and-error-message-control}@anchor{106}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id14}@anchor{fd}@anchor{gnat_ugn/building_executable_programs_with_gnat output-and-error-message-control}@anchor{fe}
 @subsection Output and Error Message Control
 
 
@@ -10650,7 +10551,7 @@ since ALI files are never generated if @emph{-gnats} is set.
 @end table
 
 @node Warning Message Control,Debugging and Assertion Control,Output and Error Message Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat warning-message-control}@anchor{102}@anchor{gnat_ugn/building_executable_programs_with_gnat id15}@anchor{107}
+@anchor{gnat_ugn/building_executable_programs_with_gnat warning-message-control}@anchor{fa}@anchor{gnat_ugn/building_executable_programs_with_gnat id15}@anchor{ff}
 @subsection Warning Message Control
 
 
@@ -12545,7 +12446,7 @@ used in conjunction with an optimization level greater than zero.
 @item @code{-Wstack-usage=@emph{len}}
 
 Warn if the stack usage of a subprogram might be larger than @cite{len} bytes.
-See @ref{fd,,Static Stack Usage Analysis} for details.
+See @ref{f5,,Static Stack Usage Analysis} for details.
 @end table
 
 @geindex -Wall (gcc)
@@ -12713,7 +12614,7 @@ When no switch @emph{-gnatw} is used, this is equivalent to:
 @end quotation
 
 @node Debugging and Assertion Control,Validity Checking,Warning Message Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat debugging-and-assertion-control}@anchor{108}@anchor{gnat_ugn/building_executable_programs_with_gnat id16}@anchor{109}
+@anchor{gnat_ugn/building_executable_programs_with_gnat debugging-and-assertion-control}@anchor{100}@anchor{gnat_ugn/building_executable_programs_with_gnat id16}@anchor{101}
 @subsection Debugging and Assertion Control
 
 
@@ -12802,7 +12703,7 @@ is @cite{False}, the exception @cite{Assert_Failure} is raised.
 @end table
 
 @node Validity Checking,Style Checking,Debugging and Assertion Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat validity-checking}@anchor{fe}@anchor{gnat_ugn/building_executable_programs_with_gnat id17}@anchor{10a}
+@anchor{gnat_ugn/building_executable_programs_with_gnat validity-checking}@anchor{f6}@anchor{gnat_ugn/building_executable_programs_with_gnat id17}@anchor{102}
 @subsection Validity Checking
 
 
@@ -13091,7 +12992,7 @@ the validity checking mode at the program source level, and also allows for
 temporary disabling of validity checks.
 
 @node Style Checking,Run-Time Checks,Validity Checking,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id18}@anchor{10b}@anchor{gnat_ugn/building_executable_programs_with_gnat style-checking}@anchor{103}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id18}@anchor{103}@anchor{gnat_ugn/building_executable_programs_with_gnat style-checking}@anchor{fb}
 @subsection Style Checking
 
 
@@ -13799,7 +13700,7 @@ built-in standard style check options are enabled.
 The switch @code{-gnatyN} clears any previously set style checks.
 
 @node Run-Time Checks,Using gcc for Syntax Checking,Style Checking,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat run-time-checks}@anchor{101}@anchor{gnat_ugn/building_executable_programs_with_gnat id19}@anchor{10c}
+@anchor{gnat_ugn/building_executable_programs_with_gnat run-time-checks}@anchor{f9}@anchor{gnat_ugn/building_executable_programs_with_gnat id19}@anchor{104}
 @subsection Run-Time Checks
 
 
@@ -13993,7 +13894,7 @@ on subprogram calls and generic instantiations.
 Note that @emph{-gnatE} is not necessary for safety, because in the
 default mode, GNAT ensures statically that the checks would not fail.
 For full details of the effect and use of this switch,
-@ref{1e,,Compiling with gcc}.
+@ref{1c,,Compiling with gcc}.
 @end table
 
 @geindex -fstack-check (gcc)
@@ -14009,7 +13910,7 @@ For full details of the effect and use of this switch,
 @item @code{-fstack-check}
 
 Activates stack overflow checking. For full details of the effect and use of
-this switch see @ref{fc,,Stack Overflow Checking}.
+this switch see @ref{f4,,Stack Overflow Checking}.
 @end table
 
 @geindex Unsuppress
@@ -14020,7 +13921,7 @@ checks) or @cite{Unsuppress} (to add back suppressed checks) pragmas in
 the program source.
 
 @node Using gcc for Syntax Checking,Using gcc for Semantic Checking,Run-Time Checks,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id20}@anchor{10d}@anchor{gnat_ugn/building_executable_programs_with_gnat using-gcc-for-syntax-checking}@anchor{10e}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id20}@anchor{105}@anchor{gnat_ugn/building_executable_programs_with_gnat using-gcc-for-syntax-checking}@anchor{106}
 @subsection Using @emph{gcc} for Syntax Checking
 
 
@@ -14073,11 +13974,11 @@ Normally, GNAT allows only a single unit in a source file. However, this
 restriction does not apply in syntax-check-only mode, and it is possible
 to check a file containing multiple compilation units concatenated
 together. This is primarily used by the @cite{gnatchop} utility
-(@ref{38,,Renaming Files with gnatchop}).
+(@ref{36,,Renaming Files with gnatchop}).
 @end table
 
 @node Using gcc for Semantic Checking,Compiling Different Versions of Ada,Using gcc for Syntax Checking,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id21}@anchor{10f}@anchor{gnat_ugn/building_executable_programs_with_gnat using-gcc-for-semantic-checking}@anchor{110}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id21}@anchor{107}@anchor{gnat_ugn/building_executable_programs_with_gnat using-gcc-for-semantic-checking}@anchor{108}
 @subsection Using @emph{gcc} for Semantic Checking
 
 
@@ -14102,13 +14003,13 @@ semantic restrictions on file structuring to operate in this mode:
 
 @item 
 The needed source files must be accessible
-(see @ref{8e,,Search Paths and the Run-Time Library (RTL)}).
+(see @ref{89,,Search Paths and the Run-Time Library (RTL)}).
 
 @item 
 Each file must contain only one compilation unit.
 
 @item 
-The file name and unit name must match (@ref{54,,File Naming Rules}).
+The file name and unit name must match (@ref{52,,File Naming Rules}).
 @end itemize
 
 The output consists of error messages as appropriate. No object file is
@@ -14124,7 +14025,7 @@ and specifications where a separate body is present).
 @end table
 
 @node Compiling Different Versions of Ada,Character Set Control,Using gcc for Semantic Checking,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat compiling-different-versions-of-ada}@anchor{6}@anchor{gnat_ugn/building_executable_programs_with_gnat id22}@anchor{111}
+@anchor{gnat_ugn/building_executable_programs_with_gnat compiling-different-versions-of-ada}@anchor{6}@anchor{gnat_ugn/building_executable_programs_with_gnat id22}@anchor{109}
 @subsection Compiling Different Versions of Ada
 
 
@@ -14258,7 +14159,7 @@ extensions, see the GNAT reference manual.
 @end table
 
 @node Character Set Control,File Naming Control,Compiling Different Versions of Ada,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id23}@anchor{112}@anchor{gnat_ugn/building_executable_programs_with_gnat character-set-control}@anchor{4a}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id23}@anchor{10a}@anchor{gnat_ugn/building_executable_programs_with_gnat character-set-control}@anchor{48}
 @subsection Character Set Control
 
 
@@ -14369,7 +14270,7 @@ allowed in identifiers
 @end multitable
 
 
-See @ref{40,,Foreign Language Representation} for full details on the
+See @ref{3e,,Foreign Language Representation} for full details on the
 implementation of these character sets.
 @end table
 
@@ -14437,7 +14338,7 @@ Brackets encoding only (default value)
 
 
 For full details on these encoding
-methods see @ref{50,,Wide_Character Encodings}.
+methods see @ref{4e,,Wide_Character Encodings}.
 Note that brackets coding is always accepted, even if one of the other
 options is specified, so for example @emph{-gnatW8} specifies that both
 brackets and UTF-8 encodings will be recognized. The units that are
@@ -14485,7 +14386,7 @@ comments are ended by an appropriate (CR, or CR/LF, or LF) line terminator.
 This is a common mode for many programs with foreign language comments.
 
 @node File Naming Control,Subprogram Inlining Control,Character Set Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat file-naming-control}@anchor{113}@anchor{gnat_ugn/building_executable_programs_with_gnat id24}@anchor{114}
+@anchor{gnat_ugn/building_executable_programs_with_gnat file-naming-control}@anchor{10b}@anchor{gnat_ugn/building_executable_programs_with_gnat id24}@anchor{10c}
 @subsection File Naming Control
 
 
@@ -14501,11 +14402,11 @@ Activates file name 'krunching'. @cite{n}, a decimal integer in the range
 including the @code{.ads} or @code{.adb} extension). The default is not
 to enable file name krunching.
 
-For the source file naming rules, @ref{54,,File Naming Rules}.
+For the source file naming rules, @ref{52,,File Naming Rules}.
 @end table
 
 @node Subprogram Inlining Control,Auxiliary Output Control,File Naming Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat subprogram-inlining-control}@anchor{115}@anchor{gnat_ugn/building_executable_programs_with_gnat id25}@anchor{116}
+@anchor{gnat_ugn/building_executable_programs_with_gnat subprogram-inlining-control}@anchor{10d}@anchor{gnat_ugn/building_executable_programs_with_gnat id25}@anchor{10e}
 @subsection Subprogram Inlining Control
 
 
@@ -14538,7 +14439,7 @@ If you specify this switch the compiler will access these bodies,
 creating an extra source dependency for the resulting object file, and
 where possible, the call will be inlined.
 For further details on when inlining is possible
-see @ref{117,,Inlining of Subprograms}.
+see @ref{10f,,Inlining of Subprograms}.
 @end table
 
 @geindex -gnatN (gcc)
@@ -14559,7 +14460,7 @@ inlining, but that is no longer the case.
 @end table
 
 @node Auxiliary Output Control,Debugging Control,Subprogram Inlining Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat auxiliary-output-control}@anchor{118}@anchor{gnat_ugn/building_executable_programs_with_gnat id26}@anchor{119}
+@anchor{gnat_ugn/building_executable_programs_with_gnat auxiliary-output-control}@anchor{110}@anchor{gnat_ugn/building_executable_programs_with_gnat id26}@anchor{111}
 @subsection Auxiliary Output Control
 
 
@@ -14651,7 +14552,7 @@ An object file has been generated for every source file.
 @end table
 
 @node Debugging Control,Exception Handling Control,Auxiliary Output Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat debugging-control}@anchor{11a}@anchor{gnat_ugn/building_executable_programs_with_gnat id27}@anchor{11b}
+@anchor{gnat_ugn/building_executable_programs_with_gnat debugging-control}@anchor{112}@anchor{gnat_ugn/building_executable_programs_with_gnat id27}@anchor{113}
 @subsection Debugging Control
 
 
@@ -14950,7 +14851,7 @@ speed up compilation, but means that these tools cannot be used.
 @end table
 
 @node Exception Handling Control,Units to Sources Mapping Files,Debugging Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id28}@anchor{11c}@anchor{gnat_ugn/building_executable_programs_with_gnat exception-handling-control}@anchor{11d}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id28}@anchor{114}@anchor{gnat_ugn/building_executable_programs_with_gnat exception-handling-control}@anchor{115}
 @subsection Exception Handling Control
 
 
@@ -15018,11 +14919,11 @@ is available for the target in use, otherwise it will generate an error.
 
 The same option @emph{--RTS} must be used both for @emph{gcc}
 and @emph{gnatbind}. Passing this option to @emph{gnatmake}
-(@ref{e2,,Switches for gnatmake}) will ensure the required consistency
+(@ref{dc,,Switches for gnatmake}) will ensure the required consistency
 through the compilation and binding steps.
 
 @node Units to Sources Mapping Files,Code Generation Control,Exception Handling Control,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat id29}@anchor{11e}@anchor{gnat_ugn/building_executable_programs_with_gnat units-to-sources-mapping-files}@anchor{ff}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id29}@anchor{116}@anchor{gnat_ugn/building_executable_programs_with_gnat units-to-sources-mapping-files}@anchor{f7}
 @subsection Units to Sources Mapping Files
 
 
@@ -15074,7 +14975,7 @@ mapping file and communicates it to the compiler using this switch.
 @end table
 
 @node Code Generation Control,,Units to Sources Mapping Files,Compiler Switches
-@anchor{gnat_ugn/building_executable_programs_with_gnat code-generation-control}@anchor{11f}@anchor{gnat_ugn/building_executable_programs_with_gnat id30}@anchor{120}
+@anchor{gnat_ugn/building_executable_programs_with_gnat code-generation-control}@anchor{117}@anchor{gnat_ugn/building_executable_programs_with_gnat id30}@anchor{118}
 @subsection Code Generation Control
 
 
@@ -15103,7 +15004,7 @@ there is no point in using @emph{-m} switches to improve performance
 unless you actually see a performance improvement.
 
 @node Binding with gnatbind,Linking with gnatlink,Compiler Switches,Building Executable Programs with GNAT
-@anchor{gnat_ugn/building_executable_programs_with_gnat binding-with-gnatbind}@anchor{1f}@anchor{gnat_ugn/building_executable_programs_with_gnat id31}@anchor{121}
+@anchor{gnat_ugn/building_executable_programs_with_gnat binding-with-gnatbind}@anchor{1d}@anchor{gnat_ugn/building_executable_programs_with_gnat id31}@anchor{119}
 @section Binding with @cite{gnatbind}
 
 
@@ -15113,7 +15014,7 @@ This chapter describes the GNAT binder, @cite{gnatbind}, which is used
 to bind compiled GNAT objects.
 
 Note: to invoke @cite{gnatbind} with a project file, use the @cite{gnat}
-driver (see @ref{122,,The GNAT Driver and Project Files}).
+driver (see @emph{The_GNAT_Driver_and_Project_Files}).
 
 The @cite{gnatbind} program performs four separate functions:
 
@@ -15157,7 +15058,7 @@ to be read by the @emph{gnatlink} utility used to link the Ada application.
 @end menu
 
 @node Running gnatbind,Switches for gnatbind,,Binding with gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat running-gnatbind}@anchor{123}@anchor{gnat_ugn/building_executable_programs_with_gnat id32}@anchor{124}
+@anchor{gnat_ugn/building_executable_programs_with_gnat running-gnatbind}@anchor{11a}@anchor{gnat_ugn/building_executable_programs_with_gnat id32}@anchor{11b}
 @subsection Running @cite{gnatbind}
 
 
@@ -15232,7 +15133,7 @@ error: "p.ads" has been modified and must be recompiled
 Now both files must be recompiled as indicated, and then the bind can
 succeed, generating a main program. You need not normally be concerned
 with the contents of this file, but for reference purposes a sample
-binder output file is given in @ref{10,,Example of Binder Output File}.
+binder output file is given in @ref{e,,Example of Binder Output File}.
 
 In most normal usage, the default mode of @emph{gnatbind} which is to
 generate the main package in Ada, as described in the previous section.
@@ -15242,7 +15143,7 @@ Ada code provided the @emph{-g} switch is used for
 @emph{gnatbind} and @emph{gnatlink}.
 
 @node Switches for gnatbind,Command-Line Access,Running gnatbind,Binding with gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat id33}@anchor{125}@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gnatbind}@anchor{126}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id33}@anchor{11c}@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gnatbind}@anchor{11d}
 @subsection Switches for @emph{gnatbind}
 
 
@@ -15460,7 +15361,7 @@ Output usage (help) information.
 @item @code{-H32}
 
 Use 32-bit allocations for @cite{__gnat_malloc} (and thus for access types).
-For further details see @ref{127,,Dynamic Allocation Control}.
+For further details see @ref{11e,,Dynamic Allocation Control}.
 
 @geindex -H64 (gnatbind)
 
@@ -15469,7 +15370,7 @@ For further details see @ref{127,,Dynamic Allocation Control}.
 @item @code{-H64}
 
 Use 64-bit allocations for @cite{__gnat_malloc} (and thus for access types).
-For further details see @ref{127,,Dynamic Allocation Control}.
+For further details see @ref{11e,,Dynamic Allocation Control}.
 
 @geindex -I (gnatbind)
 
@@ -15496,7 +15397,7 @@ Output chosen elaboration order.
 @item @code{-L@emph{xxx}}
 
 Bind the units for library building. In this case the adainit and
-adafinal procedures (@ref{ba,,Binding with Non-Ada Main Programs})
+adafinal procedures (@ref{b4,,Binding with Non-Ada Main Programs})
 are renamed to @cite{xxx`init and `xxx`final. Implies -n. (:ref:`GNAT_and_Libraries}, for more details.)
 
 @geindex -M (gnatbind)
@@ -15542,7 +15443,7 @@ Do not look for library files in the system default directory.
 @item @code{--RTS=@emph{rts-path}}
 
 Specifies the default location of the runtime library. Same meaning as the
-equivalent @emph{gnatmake} flag (@ref{e2,,Switches for gnatmake}).
+equivalent @emph{gnatmake} flag (@ref{dc,,Switches for gnatmake}).
 
 @geindex -o (gnatbind)
 
@@ -15696,7 +15597,7 @@ Enable dynamic stack usage, with @cite{n} results stored and displayed
 at program termination. A result is generated when a task
 terminates. Results that can't be stored are displayed on the fly, at
 task termination. This option is currently not supported on Itanium
-platforms. (See @ref{128,,Dynamic Stack Usage Analysis} for details.)
+platforms. (See @ref{11f,,Dynamic Stack Usage Analysis} for details.)
 
 @geindex -v (gnatbind)
 
@@ -15765,7 +15666,7 @@ no arguments.
 @end menu
 
 @node Consistency-Checking Modes,Binder Error Message Control,,Switches for gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat consistency-checking-modes}@anchor{129}@anchor{gnat_ugn/building_executable_programs_with_gnat id34}@anchor{12a}
+@anchor{gnat_ugn/building_executable_programs_with_gnat consistency-checking-modes}@anchor{120}@anchor{gnat_ugn/building_executable_programs_with_gnat id34}@anchor{121}
 @subsubsection Consistency-Checking Modes
 
 
@@ -15819,7 +15720,7 @@ case the checking against sources has already been performed by
 @end table
 
 @node Binder Error Message Control,Elaboration Control,Consistency-Checking Modes,Switches for gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat id35}@anchor{12b}@anchor{gnat_ugn/building_executable_programs_with_gnat binder-error-message-control}@anchor{12c}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id35}@anchor{122}@anchor{gnat_ugn/building_executable_programs_with_gnat binder-error-message-control}@anchor{123}
 @subsubsection Binder Error Message Control
 
 
@@ -15929,12 +15830,12 @@ with extreme care.
 @end table
 
 @node Elaboration Control,Output Control,Binder Error Message Control,Switches for gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat id36}@anchor{12d}@anchor{gnat_ugn/building_executable_programs_with_gnat elaboration-control}@anchor{12e}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id36}@anchor{124}@anchor{gnat_ugn/building_executable_programs_with_gnat elaboration-control}@anchor{125}
 @subsubsection Elaboration Control
 
 
 The following switches provide additional control over the elaboration
-order. For full details see @ref{11,,Elaboration Order Handling in GNAT}.
+order. For full details see @ref{f,,Elaboration Order Handling in GNAT}.
 
 @quotation
 
@@ -15968,7 +15869,7 @@ production use; it is more for debugging/experimental use.
 @end table
 
 @node Output Control,Dynamic Allocation Control,Elaboration Control,Switches for gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat output-control}@anchor{12f}@anchor{gnat_ugn/building_executable_programs_with_gnat id37}@anchor{130}
+@anchor{gnat_ugn/building_executable_programs_with_gnat output-control}@anchor{126}@anchor{gnat_ugn/building_executable_programs_with_gnat id37}@anchor{127}
 @subsubsection Output Control
 
 
@@ -16049,7 +15950,7 @@ be used to improve code generation in some cases.
 @end table
 
 @node Dynamic Allocation Control,Binding with Non-Ada Main Programs,Output Control,Switches for gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat dynamic-allocation-control}@anchor{127}@anchor{gnat_ugn/building_executable_programs_with_gnat id38}@anchor{131}
+@anchor{gnat_ugn/building_executable_programs_with_gnat dynamic-allocation-control}@anchor{11e}@anchor{gnat_ugn/building_executable_programs_with_gnat id38}@anchor{128}
 @subsubsection Dynamic Allocation Control
 
 
@@ -16075,7 +15976,7 @@ unless explicitly overridden by a @cite{'Size} clause on the access type.
 These switches are only effective on VMS platforms.
 
 @node Binding with Non-Ada Main Programs,Binding Programs with No Main Subprogram,Dynamic Allocation Control,Switches for gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat binding-with-non-ada-main-programs}@anchor{ba}@anchor{gnat_ugn/building_executable_programs_with_gnat id39}@anchor{132}
+@anchor{gnat_ugn/building_executable_programs_with_gnat binding-with-non-ada-main-programs}@anchor{b4}@anchor{gnat_ugn/building_executable_programs_with_gnat id39}@anchor{129}
 @subsubsection Binding with Non-Ada Main Programs
 
 
@@ -16084,7 +15985,7 @@ program is in Ada, and that the task of the binder is to generate a
 corresponding function @cite{main} that invokes this Ada main
 program. GNAT also supports the building of executable programs where
 the main program is not in Ada, but some of the called routines are
-written in Ada and compiled using GNAT (@ref{46,,Mixed Language Programming}).
+written in Ada and compiled using GNAT (@ref{44,,Mixed Language Programming}).
 The following switch is used in this situation:
 
 @quotation
@@ -16171,7 +16072,7 @@ side effect is that this could be the wrong mode for the foreign code
 where floating point computation could be broken after this call.
 
 @node Binding Programs with No Main Subprogram,,Binding with Non-Ada Main Programs,Switches for gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat binding-programs-with-no-main-subprogram}@anchor{133}@anchor{gnat_ugn/building_executable_programs_with_gnat id40}@anchor{134}
+@anchor{gnat_ugn/building_executable_programs_with_gnat binding-programs-with-no-main-subprogram}@anchor{12a}@anchor{gnat_ugn/building_executable_programs_with_gnat id40}@anchor{12b}
 @subsubsection Binding Programs with No Main Subprogram
 
 
@@ -16202,7 +16103,7 @@ the binder switch
 @end table
 
 @node Command-Line Access,Search Paths for gnatbind,Switches for gnatbind,Binding with gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat id41}@anchor{135}@anchor{gnat_ugn/building_executable_programs_with_gnat command-line-access}@anchor{136}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id41}@anchor{12c}@anchor{gnat_ugn/building_executable_programs_with_gnat command-line-access}@anchor{12d}
 @subsection Command-Line Access
 
 
@@ -16232,7 +16133,7 @@ required, your main program must set @cite{gnat_argc} and
 it.
 
 @node Search Paths for gnatbind,Examples of gnatbind Usage,Command-Line Access,Binding with gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat search-paths-for-gnatbind}@anchor{91}@anchor{gnat_ugn/building_executable_programs_with_gnat id42}@anchor{137}
+@anchor{gnat_ugn/building_executable_programs_with_gnat search-paths-for-gnatbind}@anchor{8c}@anchor{gnat_ugn/building_executable_programs_with_gnat id42}@anchor{12e}
 @subsection Search Paths for @cite{gnatbind}
 
 
@@ -16240,7 +16141,7 @@ The binder takes the name of an ALI file as its argument and needs to
 locate source files as well as other ALI files to verify object consistency.
 
 For source files, it follows exactly the same search rules as @emph{gcc}
-(see @ref{8e,,Search Paths and the Run-Time Library (RTL)}). For ALI files the
+(see @ref{89,,Search Paths and the Run-Time Library (RTL)}). For ALI files the
 directories searched are:
 
 
@@ -16289,7 +16190,7 @@ of GNAT).
 The content of the @code{ada_object_path} file which is part of the GNAT
 installation tree and is used to store standard libraries such as the
 GNAT Run Time Library (RTL) unless the switch @emph{-nostdlib} is
-specified. See @ref{8b,,Installing a library}
+specified. See @ref{87,,Installing a library}
 @end itemize
 
 @geindex -I (gnatbind)
@@ -16336,7 +16237,7 @@ in compiling sources from multiple directories. This can make
 development environments much more flexible.
 
 @node Examples of gnatbind Usage,,Search Paths for gnatbind,Binding with gnatbind
-@anchor{gnat_ugn/building_executable_programs_with_gnat examples-of-gnatbind-usage}@anchor{138}@anchor{gnat_ugn/building_executable_programs_with_gnat id43}@anchor{139}
+@anchor{gnat_ugn/building_executable_programs_with_gnat examples-of-gnatbind-usage}@anchor{12f}@anchor{gnat_ugn/building_executable_programs_with_gnat id43}@anchor{130}
 @subsection Examples of @cite{gnatbind} Usage
 
 
@@ -16365,7 +16266,7 @@ since gnatlink will not be able to find the generated file.
 @end quotation
 
 @node Linking with gnatlink,Using the GNU make Utility,Binding with gnatbind,Building Executable Programs with GNAT
-@anchor{gnat_ugn/building_executable_programs_with_gnat id44}@anchor{13a}@anchor{gnat_ugn/building_executable_programs_with_gnat linking-with-gnatlink}@anchor{20}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id44}@anchor{131}@anchor{gnat_ugn/building_executable_programs_with_gnat linking-with-gnatlink}@anchor{1e}
 @section Linking with @emph{gnatlink}
 
 
@@ -16380,7 +16281,7 @@ references for the Ada part of a program. It uses the binder file
 generated by the @emph{gnatbind} to determine this list.
 
 Note: to invoke @cite{gnatlink} with a project file, use the @cite{gnat}
-driver (see @ref{122,,The GNAT Driver and Project Files}).
+driver (see @emph{The_GNAT_Driver_and_Project_Files}).
 
 @menu
 * Running gnatlink:: 
@@ -16389,7 +16290,7 @@ driver (see @ref{122,,The GNAT Driver and Project Files}).
 @end menu
 
 @node Running gnatlink,Switches for gnatlink,,Linking with gnatlink
-@anchor{gnat_ugn/building_executable_programs_with_gnat id45}@anchor{13b}@anchor{gnat_ugn/building_executable_programs_with_gnat running-gnatlink}@anchor{13c}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id45}@anchor{132}@anchor{gnat_ugn/building_executable_programs_with_gnat running-gnatlink}@anchor{133}
 @subsection Running @emph{gnatlink}
 
 
@@ -16448,8 +16349,8 @@ $ gnatlink my_prog -Wl,-Map,MAPFILE
 
 Using @cite{linker options} it is possible to set the program stack and
 heap size.
-See @ref{13d,,Setting Stack Size from gnatlink} and
-@ref{13e,,Setting Heap Size from gnatlink}.
+See @ref{134,,Setting Stack Size from gnatlink} and
+@ref{135,,Setting Heap Size from gnatlink}.
 
 @emph{gnatlink} determines the list of objects required by the Ada
 program and prepends them to the list of objects passed to the linker.
@@ -16458,7 +16359,7 @@ program and prepends them to the list of objects passed to the linker.
 presented to the linker.
 
 @node Switches for gnatlink,,Running gnatlink,Linking with gnatlink
-@anchor{gnat_ugn/building_executable_programs_with_gnat id46}@anchor{13f}@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gnatlink}@anchor{140}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id46}@anchor{136}@anchor{gnat_ugn/building_executable_programs_with_gnat switches-for-gnatlink}@anchor{137}
 @subsection Switches for @emph{gnatlink}
 
 
@@ -16665,7 +16566,7 @@ switch.
 @end table
 
 @node Using the GNU make Utility,,Linking with gnatlink,Building Executable Programs with GNAT
-@anchor{gnat_ugn/building_executable_programs_with_gnat id47}@anchor{141}@anchor{gnat_ugn/building_executable_programs_with_gnat using-the-gnu-make-utility}@anchor{21}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id47}@anchor{138}@anchor{gnat_ugn/building_executable_programs_with_gnat using-the-gnu-make-utility}@anchor{1f}
 @section Using the GNU @cite{make} Utility
 
 
@@ -16674,7 +16575,7 @@ switch.
 
 This chapter offers some examples of makefiles that solve specific
 problems. It does not explain how to write a makefile, nor does it try to replace the
-@emph{gnatmake} utility (@ref{1d,,Building with gnatmake}).
+@emph{gnatmake} utility (@ref{1b,,Building with gnatmake}).
 
 All the examples in this section are specific to the GNU version of
 make. Although @emph{make} is a standard utility, and the basic language
@@ -16690,7 +16591,7 @@ is the same, these examples use some advanced features found only in
 @end menu
 
 @node Using gnatmake in a Makefile,Automatically Creating a List of Directories,,Using the GNU make Utility
-@anchor{gnat_ugn/building_executable_programs_with_gnat using-gnatmake-in-a-makefile}@anchor{142}@anchor{gnat_ugn/building_executable_programs_with_gnat id48}@anchor{143}
+@anchor{gnat_ugn/building_executable_programs_with_gnat using-gnatmake-in-a-makefile}@anchor{139}@anchor{gnat_ugn/building_executable_programs_with_gnat id48}@anchor{13a}
 @subsection Using gnatmake in a Makefile
 
 
@@ -16709,7 +16610,7 @@ the appropriate directories.
 
 Note that you should also read the example on how to automatically
 create the list of directories
-(@ref{144,,Automatically Creating a List of Directories})
+(@ref{13b,,Automatically Creating a List of Directories})
 which might help you in case your project has a lot of subdirectories.
 
 @example
@@ -16789,7 +16690,7 @@ clean::
 @end example
 
 @node Automatically Creating a List of Directories,Generating the Command Line Switches,Using gnatmake in a Makefile,Using the GNU make Utility
-@anchor{gnat_ugn/building_executable_programs_with_gnat automatically-creating-a-list-of-directories}@anchor{144}@anchor{gnat_ugn/building_executable_programs_with_gnat id49}@anchor{145}
+@anchor{gnat_ugn/building_executable_programs_with_gnat automatically-creating-a-list-of-directories}@anchor{13b}@anchor{gnat_ugn/building_executable_programs_with_gnat id49}@anchor{13c}
 @subsection Automatically Creating a List of Directories
 
 
@@ -16862,12 +16763,12 @@ DIRS := $@{shell find $@{ROOT_DIRECTORY@} -type d -print@}
 @end example
 
 @node Generating the Command Line Switches,Overcoming Command Line Length Limits,Automatically Creating a List of Directories,Using the GNU make Utility
-@anchor{gnat_ugn/building_executable_programs_with_gnat id50}@anchor{146}@anchor{gnat_ugn/building_executable_programs_with_gnat generating-the-command-line-switches}@anchor{147}
+@anchor{gnat_ugn/building_executable_programs_with_gnat id50}@anchor{13d}@anchor{gnat_ugn/building_executable_programs_with_gnat generating-the-command-line-switches}@anchor{13e}
 @subsection Generating the Command Line Switches
 
 
 Once you have created the list of directories as explained in the
-previous section (@ref{144,,Automatically Creating a List of Directories}),
+previous section (@ref{13b,,Automatically Creating a List of Directories}),
 you can easily generate the command line arguments to pass to gnatmake.
 
 For the sake of completeness, this example assumes that the source path
@@ -16888,7 +16789,7 @@ all:
 @end example
 
 @node Overcoming Command Line Length Limits,,Generating the Command Line Switches,Using the GNU make Utility
-@anchor{gnat_ugn/building_executable_programs_with_gnat overcoming-command-line-length-limits}@anchor{148}@anchor{gnat_ugn/building_executable_programs_with_gnat id51}@anchor{149}
+@anchor{gnat_ugn/building_executable_programs_with_gnat overcoming-command-line-length-limits}@anchor{13f}@anchor{gnat_ugn/building_executable_programs_with_gnat id51}@anchor{140}
 @subsection Overcoming Command Line Length Limits
 
 
@@ -16903,7 +16804,7 @@ even none on most systems).
 
 It assumes that you have created a list of directories in your Makefile,
 using one of the methods presented in
-@ref{144,,Automatically Creating a List of Directories}.
+@ref{13b,,Automatically Creating a List of Directories}.
 For the sake of completeness, we assume that the object
 path (where the ALI files are found) is different from the sources patch.
 
@@ -16945,6390 +16846,8 @@ all:
         gnatmake main_unit
 @end example
 
-@c -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
-
-@node GNAT Project Manager,Tools Supporting Project Files,Building Executable Programs with GNAT,Top
-@anchor{gnat_ugn/gnat_project_manager doc}@anchor{14a}@anchor{gnat_ugn/gnat_project_manager gnat-project-manager}@anchor{b}@anchor{gnat_ugn/gnat_project_manager id1}@anchor{14b}
-@chapter GNAT Project Manager
-
-
-@menu
-* Introduction:: 
-* Building With Projects:: 
-* Organizing Projects into Subsystems:: 
-* Scenarios in Projects:: 
-* Library Projects:: 
-* Project Extension:: 
-* Aggregate Projects:: 
-* Aggregate Library Projects:: 
-* Project File Reference:: 
-
-@end menu
-
-@node Introduction,Building With Projects,,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager introduction}@anchor{14c}@anchor{gnat_ugn/gnat_project_manager gnat-project-manager-introduction}@anchor{14d}
-@section Introduction
-
-
-This chapter describes GNAT's @emph{Project Manager}, a facility that allows
-you to manage complex builds involving a number of source files, directories,
-and options for different system configurations. In particular,
-project files allow you to specify:
-
-
-@itemize *
-
-@item 
-The directory or set of directories containing the source files, and/or the
-names of the specific source files themselves
-
-@item 
-The directory in which the compiler's output
-(@code{ALI} files, object files, tree files, etc.) is to be placed
-
-@item 
-The directory in which the executable programs are to be placed
-
-@item 
-Switch settings for any of the project-enabled tools;
-you can apply these settings either globally or to individual compilation units.
-
-@item 
-The source files containing the main subprogram(s) to be built
-
-@item 
-The source programming language(s)
-
-@item 
-Source file naming conventions; you can specify these either globally or for
-individual compilation units (see @ref{14e,,Naming Schemes}).
-
-@item 
-Change any of the above settings depending on external values, thus enabling
-the reuse of the projects in various @strong{scenarios} (see @ref{14f,,Scenarios in Projects}).
-
-@item 
-Automatically build libraries as part of the build process
-(see @ref{8a,,Library Projects}).
-@end itemize
-
-Project files are written in a syntax close to that of Ada, using familiar
-notions such as packages, context clauses, declarations, default values,
-assignments, and inheritance (see @ref{150,,Project File Reference}).
-
-Project files can be built hierarchically from other project files, simplifying
-complex system integration and project reuse (see @ref{151,,Organizing Projects into Subsystems}).
-
-
-@itemize *
-
-@item 
-One project can import other projects containing needed source files.
-More generally, the Project Manager lets you structure large development
-efforts into hierarchical subsystems, where build decisions are delegated
-to the subsystem level, and thus different compilation environments
-(switch settings) used for different subsystems.
-
-@item 
-You can organize GNAT projects in a hierarchy: a child project
-can extend a parent project, inheriting the parent's source files and
-optionally overriding any of them with alternative versions
-(see @ref{152,,Project Extension}).
-@end itemize
-
-Several tools support project files, generally in addition to specifying
-the information on the command line itself). They share common switches
-to control the loading of the project (in particular
-@code{-P@emph{projectfile}} and
-@code{-X@emph{vbl}=@emph{value}}).
-
-The Project Manager supports a wide range of development strategies,
-for systems of all sizes.  Here are some typical practices that are
-easily handled:
-
-
-@itemize *
-
-@item 
-Using a common set of source files and generating object files in different
-directories via different switch settings. It can be used for instance, for
-generating separate sets of object files for debugging and for production.
-
-@item 
-Using a mostly-shared set of source files with different versions of
-some units or subunits. It can be used for instance, for grouping and hiding
-all OS dependencies in a small number of implementation units.
-@end itemize
-
-Project files can be used to achieve some of the effects of a source
-versioning system (for example, defining separate projects for
-the different sets of sources that comprise different releases) but the
-Project Manager is independent of any source configuration management tool
-that might be used by the developers.
-
-The various sections below introduce the different concepts related to
-projects. Each section starts with examples and use cases, and then goes into
-the details of related project file capabilities.
-
-@node Building With Projects,Organizing Projects into Subsystems,Introduction,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager building-with-projects}@anchor{153}@anchor{gnat_ugn/gnat_project_manager id2}@anchor{154}
-@section Building With Projects
-
-
-In its simplest form, a unique project is used to build a single executable.
-This section concentrates on such a simple setup. Later sections will extend
-this basic model to more complex setups.
-
-The following concepts are the foundation of project files, and will be further
-detailed later in this documentation. They are summarized here as a reference.
-
-
-@table @asis
-
-@item @strong{Project file}:
-
-A text file using an Ada-like syntax, generally using the @code{.gpr}
-extension. It defines build-related characteristics of an application.
-The characteristics include the list of sources, the location of those
-sources, the location for the generated object files, the name of
-the main program, and the options for the various tools involved in the
-build process.
-
-@item @strong{Project attribute}:
-
-A specific project characteristic is defined by an attribute clause. Its
-value is a string or a sequence of strings. All settings in a project
-are defined through a list of predefined attributes with precise
-semantics. See @ref{155,,Attributes}.
-
-@item @strong{Package in a project}:
-
-Global attributes are defined at the top level of a project.
-Attributes affecting specific tools are grouped in a
-package whose name is related to tool's function. The most common
-packages are @cite{Builder}, @cite{Compiler}, @cite{Binder},
-and @cite{Linker}. See @ref{156,,Packages}.
-
-@item @strong{Project variables}:
-
-In addition to attributes, a project can use variables to store intermediate
-values and avoid duplication in complex expressions. It can be initialized
-with a value coming from the environment.
-A frequent use of variables is to define scenarios.
-See @ref{157,,External Values}, @ref{14f,,Scenarios in Projects}, and @ref{158,,Variables}.
-
-@item @strong{Source files} and @strong{source directories}:
-
-A source file is associated with a language through a naming convention. For
-instance, @cite{foo.c} is typically the name of a C source file;
-@cite{bar.ads} or @cite{bar.1.ada} are two common naming conventions for a
-file containing an Ada spec. A compilation unit is often composed of a main
-source file and potentially several auxiliary ones, such as header files in C.
-The naming conventions can be user defined @ref{14e,,Naming Schemes}, and will
-drive the builder to call the appropriate compiler for the given source file.
-Source files are searched for in the source directories associated with the
-project through the @strong{Source_Dirs} attribute. By default, all the files (in
-these source directories) following the naming conventions associated with the
-declared languages are considered to be part of the project. It is also
-possible to limit the list of source files using the @strong{Source_Files} or
-@strong{Source_List_File} attributes. Note that those last two attributes only
-accept basenames with no directory information.
-
-@item @strong{Object files} and @strong{object directory}:
-
-An object file is an intermediate file produced by the compiler from a
-compilation unit. It is used by post-compilation tools to produce
-final executables or libraries. Object files produced in the context of
-a given project are stored in a single directory that can be specified by the
-@strong{Object_Dir} attribute. In order to store objects in
-two or more object directories, the system must be split into
-distinct subsystems with their own project file.
-@end table
-
-The following subsections introduce gradually all the attributes of interest
-for simple build needs. Here is the simple setup that will be used in the
-following examples.
-
-The Ada source files @code{pack.ads}, @code{pack.adb}, and @code{proc.adb} are in
-the @code{common/} directory. The file @code{proc.adb} contains an Ada main
-subprogram @cite{Proc} that @emph{with}s package @cite{Pack}. We want to compile
-these source files with the switch
-@emph{-O2}, and put the resulting files in
-the directory @code{obj/}.
-
-@example
-common/
-  pack.ads
-  pack.adb
-  proc.adb
-common/obj/
-  proc.ali, proc.o pack.ali, pack.o
-@end example
-
-Our project is to be called @emph{Build}. The name of the
-file is the name of the project (case-insensitive) with the
-@code{.gpr} extension, therefore the project file name is @code{build.gpr}. This
-is not mandatory, but a warning is issued when this convention is not followed.
-
-This is a very simple example, and as stated above, a single project
-file is enough for it. We will thus create a new file, that for now
-should contain the following code:
-
-@example
-project Build is
-end Build;
-@end example
-
-@menu
-* Source Files and Directories:: 
-* Duplicate Sources in Projects:: 
-* Object and Exec Directory:: 
-* Main Subprograms:: 
-* Tools Options in Project Files:: 
-* Compiling with Project Files:: 
-* Executable File Names:: 
-* Avoid Duplication With Variables:: 
-* Naming Schemes:: 
-* Installation:: 
-* Distributed support:: 
-
-@end menu
-
-@node Source Files and Directories,Duplicate Sources in Projects,,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager id3}@anchor{159}@anchor{gnat_ugn/gnat_project_manager source-files-and-directories}@anchor{15a}
-@subsection Source Files and Directories
-
-
-When you create a new project, the first thing to describe is how to find the
-corresponding source files. These are the only settings that are needed by all
-the tools that will use this project (builder, compiler, binder and linker for
-the compilation, IDEs to edit the source files,...).
-
-@geindex Source directories (GNAT Project Manager)
-
-The first step is to declare the source directories, which are the directories
-to be searched to find source files. In the case of the example,
-the @code{common} directory is the only source directory.
-
-@geindex Source_Dirs (GNAT Project Manager)
-
-There are several ways of defining source directories:
-
-
-@itemize *
-
-@item 
-When the attribute @strong{Source_Dirs} is not used, a project contains a
-single source directory which is the one where the project file itself
-resides. In our example, if @code{build.gpr} is placed in the @code{common}
-directory, the project has the needed implicit source directory.
-
-@item 
-The attribute @strong{Source_Dirs} can be set to a list of path names, one
-for each of the source directories. Such paths can either be absolute
-names (for instance @code{"/usr/local/common/"} on UNIX), or relative to the
-directory in which the project file resides (for instance "." if
-@code{build.gpr} is inside @code{common/}, or "common" if it is one level up).
-Each of the source directories must exist and be readable.
-
-@geindex portability of path names (GNAT Project Manager)
-
-The syntax for directories is platform specific. For portability, however,
-the project manager will always properly translate UNIX-like path names to
-the native format of the specific platform. For instance, when the same
-project file is to be used both on Unix and Windows, "/" should be used as
-the directory separator rather than "\".
-
-@item 
-The attribute @strong{Source_Dirs} can automatically include subdirectories
-using a special syntax inspired by some UNIX shells. If any of the paths in
-the list ends with "@code{**}", then that path and all its subdirectories
-(recursively) are included in the list of source directories. For instance,
-@code{**} and @code{./**} represent the complete directory tree rooted at
-the directory in which the project file resides.
-
-@geindex Source directories (GNAT Project Manager)
-
-@geindex Excluded_Source_Dirs (GNAT Project Manager)
-
-When using that construct, it can sometimes be convenient to also use the
-attribute @strong{Excluded_Source_Dirs}, which is also a list of paths. Each entry
-specifies a directory whose immediate content, not including subdirs, is to
-be excluded. It is also possible to exclude a complete directory subtree
-using the "**" notation.
-
-@geindex Ignore_Source_Sub_Dirs (GNAT Project Manager)
-
-It is often desirable to remove, from the source directories, directory
-subtrees rooted at some subdirectories. An example is the subdirectories
-created by a Version Control System such as Subversion that creates directory
-subtrees rooted at subdirectories ".svn". To do that, attribute
-@strong{Ignore_Source_Sub_Dirs} can be used. It specifies the list of simple
-file names for the roots of these undesirable directory subtrees.
-
-@example
-for Source_Dirs use ("./**");
-for Ignore_Source_Sub_Dirs use (".svn");
-@end example
-@end itemize
-
-When applied to the simple example, and because we generally prefer to have
-the project file at the toplevel directory rather than mixed with the sources,
-we will create the following file
-
-@example
-build.gpr
-project Build is
-   for Source_Dirs use ("common");  --  <<<<
-end Build;
-@end example
-
-Once source directories have been specified, one may need to indicate
-source files of interest. By default, all source files present in the source
-directories are considered by the project manager. When this is not desired,
-it is possible to specify the list of sources to consider explicitly.
-In such a case, only source file base names are indicated and not
-their absolute or relative path names. The project manager is in charge of
-locating the specified source files in the specified source directories.
-
-
-@itemize *
-
-@item 
-By default, the project manager searches for all source files of all
-specified languages in all the source directories.
-
-Since the project manager was initially developed for Ada environments, the
-default language is usually Ada and the above project file is complete: it
-defines without ambiguity the sources composing the project: that is to say,
-all the sources in subdirectory "common" for the default language (Ada) using
-the default naming convention.
-
-@geindex Languages (GNAT Project Manager)
-
-However, when compiling a multi-language application, or a pure C
-application, the project manager must be told which languages are of
-interest, which is done by setting the @strong{Languages} attribute to a list of
-strings, each of which is the name of a language.
-
-@geindex Naming scheme (GNAT Project Manager)
-
-Even when using only Ada, the default naming might not be suitable. Indeed,
-how does the project manager recognizes an "Ada file" from any other
-file? Project files can describe the naming scheme used for source files,
-and override the default (see @ref{14e,,Naming Schemes}). The default is the
-standard GNAT extension (@code{.adb} for bodies and @code{.ads} for
-specs), which is what is used in our example, explaining why no naming scheme
-is explicitly specified.
-See @ref{14e,,Naming Schemes}.
-
-@geindex Source_Files (GNAT Project Manager)
-
-@item 
-@cite{Source_Files}.
-In some cases, source directories might contain files that should not be
-included in a project. One can specify the explicit list of file names to
-be considered through the @strong{Source_Files} attribute.
-When this attribute is defined, instead of looking at every file in the
-source directories, the project manager takes only those names into
-consideration  reports  errors if they cannot be found in the source
-directories or does not correspond to the naming scheme.
-
-@item 
-For various reasons, it is sometimes useful to have a project with no
-sources (most of the time because the attributes defined in the project
-file will be reused in other projects, as explained in
-@ref{151,,Organizing Projects into Subsystems}. To do this, the attribute
-@emph{Source_Files} is set to the empty list, i.e. @cite{()}. Alternatively,
-@emph{Source_Dirs} can be set to the empty list, with the same
-result.
-
-@geindex Source_List_File (GNAT Project Manager)
-
-@item 
-@cite{Source_List_File}.
-If there is a great number of files, it might be more convenient to use
-the attribute @strong{Source_List_File}, which specifies the full path of a file.
-This file must contain a list of source file names (one per line, no
-directory information) that are searched as if they had been defined
-through @emph{Source_Files}. Such a file can easily be created through
-external tools.
-
-A warning is issued if both attributes @cite{Source_Files} and
-@cite{Source_List_File} are given explicit values. In this case, the
-attribute @cite{Source_Files} prevails.
-
-@geindex Excluded_Source_Files (GNAT Project Manager)
-
-@geindex Locally_Removed_Files (GNAT Project Manager)
-
-@geindex Excluded_Source_List_File (GNAT Project Manager)
-
-@item 
-@cite{Excluded_Source_Files}.
-Specifying an explicit list of files is not always convenient.It might be
-more convenient to use the default search rules with specific exceptions.
-This can be done thanks to the attribute @strong{Excluded_Source_Files}
-(or its synonym @strong{Locally_Removed_Files}).
-Its value is the list of file names that should not be taken into account.
-This attribute is often used when extending a project,
-see @ref{152,,Project Extension}. A similar attribute
-@strong{Excluded_Source_List_File} plays the same
-role but takes the name of file containing file names similarly to
-@cite{Source_List_File}.
-@end itemize
-
-In most simple cases, such as the above example, the default source file search
-behavior provides the expected result, and we do not need to add anything after
-setting @cite{Source_Dirs}. The project manager automatically finds
-@code{pack.ads}, @code{pack.adb}, and @code{proc.adb} as source files of the
-project.
-
-Note that by default a warning is issued when a project has no sources attached
-to it and this is not explicitly indicated in the project file.
-
-@node Duplicate Sources in Projects,Object and Exec Directory,Source Files and Directories,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager duplicate-sources-in-projects}@anchor{15b}@anchor{gnat_ugn/gnat_project_manager id4}@anchor{15c}
-@subsection Duplicate Sources in Projects
-
-
-If the order of the source directories is known statically, that is if
-@cite{"/**"} is not used in the string list @cite{Source_Dirs}, then there may
-be several files with the same name sitting in different directories of the
-project. In this case, only the file in the first directory is considered as a
-source of the project and the others are hidden. If @cite{"/**"} is used in the
-string list @cite{Source_Dirs}, it is an error to have several files with the
-same name in the same directory @cite{"/**"} subtree, since there would be an
-ambiguity as to which one should be used. However, two files with the same name
-may exist in two single directories or directory subtrees. In this case, the
-one in the first directory or directory subtree is a source of the project.
-
-If there are two sources in different directories of the same @cite{"/**"}
-subtree, one way to resolve the problem is to exclude the directory of the
-file that should not be used as a source of the project.
-
-@node Object and Exec Directory,Main Subprograms,Duplicate Sources in Projects,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager object-and-exec-directory}@anchor{15d}@anchor{gnat_ugn/gnat_project_manager id5}@anchor{15e}
-@subsection Object and Exec Directory
-
-
-The next step when writing a project is to indicate where the compiler should
-put the object files. In fact, the compiler and other tools might create
-several different kind of files (for GNAT, there is the object file and the ALI
-file for instance). One of the important concepts in projects is that most
-tools may consider source directories as read-only and do not attempt to create
-new or temporary files there. Instead, all files are created in the object
-directory. It is of course not true for project-aware IDEs, whose purpose it is
-to create the source files.
-
-@geindex Object_Dir (GNAT Project Manager)
-
-The object directory is specified through the @strong{Object_Dir} attribute.
-Its value is the path to the object directory, either absolute or
-relative to the directory containing the project file. This
-directory must already exist and be readable and writable, although
-some tools have a switch to create the directory if needed (See
-the switch @cite{-p} for @emph{gprbuild}).
-
-If the attribute @cite{Object_Dir} is not specified, it defaults to
-the project directory, that is the directory containing the project file.
-
-For our example, we can specify the object dir in this way:
-
-@example
-project Build is
-   for Source_Dirs use ("common");
-   for Object_Dir use "obj";   --  <<<<
-end Build;
-@end example
-
-As mentioned earlier, there is a single object directory per project. As a
-result, if you have an existing system where the object files are spread across
-several directories, you can either move all of them into the same directory if
-you want to build it with a single project file, or study the section on
-subsystems (see @ref{151,,Organizing Projects into Subsystems}) to see how each
-separate object directory can be associated with one of the subsystems
-constituting the application.
-
-When the @emph{linker} is called, it usually creates an executable. By
-default, this executable is placed in the object directory of the project. It
-might be convenient to store it in its own directory.
-
-@geindex Exec_Dir (GNAT Project Manager)
-
-This can be done through the @cite{Exec_Dir} attribute, which, like
-@emph{Object_Dir} contains a single absolute or relative path and must point to
-an existing and writable directory, unless you ask the tool to create it on
-your behalf. When not specified, It defaults to the object directory and
-therefore to the project file's directory if neither @emph{Object_Dir} nor
-@emph{Exec_Dir} was specified.
-
-In the case of the example, let's place the executable in the root
-of the hierarchy, ie the same directory as @code{build.gpr}. Hence
-the project file is now
-
-@example
-project Build is
-   for Source_Dirs use ("common");
-   for Object_Dir use "obj";
-   for Exec_Dir use ".";  --   <<<<
-end Build;
-@end example
-
-@node Main Subprograms,Tools Options in Project Files,Object and Exec Directory,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager id6}@anchor{15f}@anchor{gnat_ugn/gnat_project_manager main-subprograms}@anchor{160}
-@subsection Main Subprograms
-
-
-In the previous section, executables were mentioned. The project manager needs
-to be taught what they are. In a project file, an executable is indicated by
-pointing to the source file of a main subprogram. In C this is the file that
-contains the @cite{main} function, and in Ada the file that contains the main
-unit.
-
-There can be any number of such main files within a given project, and thus
-several executables can be built in the context of a single project file. Of
-course, one given executable might not (and in fact will not) need all the
-source files referenced by the project. As opposed to other build environments
-such as @emph{makefile}, one does not need to specify the list of
-dependencies of each executable, the project-aware builder knows enough of the
-semantics of the languages to build and link only the necessary elements.
-
-@geindex Main (GNAT Project Manager)
-
-The list of main files is specified via the @strong{Main} attribute. It contains
-a list of file names (no directories). If a project defines this
-attribute, it is not necessary to identify  main files on the
-command line when invoking a builder, and editors like
-@emph{GPS} will be able to create extra menus to spawn or debug the
-corresponding executables.
-
-@example
-project Build is
-   for Source_Dirs use ("common");
-   for Object_Dir use "obj";
-   for Exec_Dir use ".";
-   for Main use ("proc.adb");  --   <<<<
-end Build;
-@end example
-
-If this attribute is defined in the project, then spawning the builder
-with a command such as
-
-@example
-gprbuild -Pbuild
-@end example
-
-automatically builds all the executables corresponding to the files
-listed in the @emph{Main} attribute. It is possible to specify one
-or more executables on the command line to build a subset of them.
-
-@node Tools Options in Project Files,Compiling with Project Files,Main Subprograms,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager tools-options-in-project-files}@anchor{161}@anchor{gnat_ugn/gnat_project_manager id7}@anchor{162}
-@subsection Tools Options in Project Files
-
-
-We now have a project file that fully describes our environment, and can be
-used to build the application with a simple @emph{gprbuild} command as seen
-in the previous section. In fact, the empty project we showed immediately at
-the beginning (with no attribute at all) could already fulfill that need if it
-was put in the @code{common} directory.
-
-Of course, we might want more control. This section shows you how to specify
-the compilation switches that the various tools involved in the building of the
-executable should use.
-
-@geindex command line length (GNAT Project Manager)
-
-Since source names and locations are described in the project file, it is not
-necessary to use switches on the command line for this purpose (switches such
-as -I for gcc). This removes a major source of command line length overflow.
-Clearly, the builders will have to communicate this information one way or
-another to the underlying compilers and tools they call but they usually use
-response files for this and thus are not subject to command line overflows.
-
-Several tools participate to the creation of an executable: the compiler
-produces object files from the source files; the binder (in the Ada case)
-creates a "source" file that takes care, among other things, of elaboration
-issues and global variable initialization; and the linker gathers everything
-into a single executable that users can execute. All these tools are known to
-the project manager and will be called with user defined switches from the
-project files. However, we need to introduce a new project file concept to
-express the switches to be used for any of the tools involved in the build.
-
-@geindex project file packages (GNAT Project Manager)
-
-A project file is subdivided into zero or more @strong{packages}, each of which
-contains the attributes specific to one tool (or one set of tools). Project
-files use an Ada-like syntax for packages. Package names permitted in project
-files are restricted to a predefined set (see @ref{156,,Packages}), and the contents
-of packages are limited to a small set of constructs and attributes
-(see @ref{155,,Attributes}).
-
-Our example project file can be extended with the following empty packages. At
-this stage, they could all be omitted since they are empty, but they show which
-packages would be involved in the build process.
-
-@example
-project Build is
-   for Source_Dirs use ("common");
-   for Object_Dir use "obj";
-   for Exec_Dir use ".";
-   for Main use ("proc.adb");
-
-   package Builder is  --<<<  for gprbuild
-   end Builder;
-
-   package Compiler is --<<<  for the compiler
-   end Compiler;
-
-   package Binder is   --<<<  for the binder
-   end Binder;
-
-   package Linker is   --<<<  for the linker
-   end Linker;
-end Build;
-@end example
-
-Let's first examine the compiler switches. As stated in the initial description
-of the example, we want to compile all files with @emph{-O2}. This is a
-compiler switch, although it is usual, on the command line, to pass it to the
-builder which then passes it to the compiler. It is recommended to use directly
-the right package, which will make the setup easier to understand for other
-people.
-
-Several attributes can be used to specify the switches:
-
-@geindex Default_Switches (GNAT Project Manager)
-
-@strong{Default_Switches}:
-
-@quotation
-
-This is the first mention in this manual of an @strong{indexed attribute}. When
-this attribute is defined, one must supply an @emph{index} in the form of a
-literal string.
-In the case of @emph{Default_Switches}, the index is the name of the
-language to which the switches apply (since a different compiler will
-likely be used for each language, and each compiler has its own set of
-switches). The value of the attribute is a list of switches.
-
-In this example, we want to compile all Ada source files with the switch
-@emph{-O2}, and the resulting project file is as follows
-(only the @cite{Compiler} package is shown):
-
-@example
-package Compiler is
-  for Default_Switches ("Ada") use ("-O2");
-end Compiler;
-@end example
-@end quotation
-
-@geindex Switches (GNAT Project Manager)
-
-@strong{Switches}:
-
-@quotation
-
-In some cases, we might want to use specific switches
-for one or more files. For instance, compiling @code{proc.adb} might not be
-possible at high level of optimization because of a compiler issue.
-In such a case, the @emph{Switches}
-attribute (indexed on the file name) can be used and will override the
-switches defined by @emph{Default_Switches}. Our project file would
-become:
-
-@example
-package Compiler is
-   for Default_Switches ("Ada")
-       use ("-O2");
-   for Switches ("proc.adb")
-       use ("-O0");
-end Compiler;
-@end example
-
-@cite{Switches} may take a pattern as an index, such as in:
-
-@example
-package Compiler is
-  for Default_Switches ("Ada")
-      use ("-O2");
-  for Switches ("pkg*")
-      use ("-O0");
-end Compiler;
-@end example
-
-Sources @code{pkg.adb} and @code{pkg-child.adb} would be compiled with -O0,
-not -O2.
-
-@cite{Switches} can also be given a language name as index instead of a file
-name in which case it has the same semantics as @emph{Default_Switches}.
-However, indexes with wild cards are never valid for language name.
-@end quotation
-
-@geindex Local_Configuration_Pragmas (GNAT Project Manager)
-
-@strong{Local_Configuration_Pragmas}:
-
-@quotation
-
-This attribute may specify the path
-of a file containing configuration pragmas for use by the Ada compiler,
-such as @cite{pragma Restrictions (No_Tasking)}. These pragmas will be
-used for all the sources of the project.
-@end quotation
-
-The switches for the other tools are defined in a similar manner through the
-@strong{Default_Switches} and @strong{Switches} attributes, respectively in the
-@emph{Builder} package (for @emph{gprbuild}),
-the @emph{Binder} package (binding Ada executables) and the @emph{Linker}
-package (for linking executables).
-
-@node Compiling with Project Files,Executable File Names,Tools Options in Project Files,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager compiling-with-project-files}@anchor{163}@anchor{gnat_ugn/gnat_project_manager id8}@anchor{164}
-@subsection Compiling with Project Files
-
-
-Now that our project files are written, let's build our executable.
-Here is the command we would use from the command line:
-
-@example
-gprbuild -Pbuild
-@end example
-
-This will automatically build the executables specified through the
-@emph{Main} attribute: for each, it will compile or recompile the
-sources for which the object file does not exist or is not up-to-date; it
-will then run the binder; and finally run the linker to create the
-executable itself.
-
-The @emph{gprbuild} builder, can automatically manage C files the
-same way: create the file @code{utils.c} in the @code{common} directory,
-set the attribute @emph{Languages} to @cite{"(Ada@comma{} C)"}, and re-run
-
-@example
-gprbuild -Pbuild
-@end example
-
-Gprbuild knows how to recompile the C files and will
-recompile them only if one of their dependencies has changed. No direct
-indication on how to build the various elements is given in the
-project file, which describes the project properties rather than a
-set of actions to be executed. Here is the invocation of
-@emph{gprbuild} when building a multi-language program:
-
-@example
-$ gprbuild -Pbuild
-gcc -c proc.adb
-gcc -c pack.adb
-gcc -c utils.c
-gprbind proc
-...
-gcc proc.o -o proc
-@end example
-
-Notice the three steps described earlier:
-
-
-@itemize *
-
-@item 
-The first three gcc commands correspond to the compilation phase.
-
-@item 
-The gprbind command corresponds to the post-compilation phase.
-
-@item 
-The last gcc command corresponds to the final link.
-@end itemize
-
-@geindex -v option (for GPRbuild)
-
-The default output of GPRbuild's execution is kept reasonably simple and easy
-to understand. In particular, some of the less frequently used commands are not
-shown, and some parameters are abbreviated. So it is not possible to rerun the
-effect of the @emph{gprbuild} command by cut-and-pasting its output.
-GPRbuild's option @cite{-v} provides a much more verbose output which includes,
-among other information, more complete compilation, post-compilation and link
-commands.
-
-@node Executable File Names,Avoid Duplication With Variables,Compiling with Project Files,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager executable-file-names}@anchor{165}@anchor{gnat_ugn/gnat_project_manager id9}@anchor{166}
-@subsection Executable File Names
-
-
-@geindex Executable (GNAT Project Manager)
-
-By default, the executable name corresponding to a main file is
-computed from the main source file name. Through the attribute
-@strong{Builder.Executable}, it is possible to change this default.
-
-For instance, instead of building @emph{proc} (or @emph{proc.exe}
-on Windows), we could configure our project file to build "proc1"
-(resp proc1.exe) with the following addition:
-
-@example
-project Build is
-   ...  --  same as before
-   package Builder is
-      for Executable ("proc.adb") use "proc1";
-   end Builder
-end Build;
-@end example
-
-@geindex Executable_Suffix (GNAT Project Manager)
-
-Attribute @strong{Executable_Suffix}, when specified, may change the suffix
-of the executable files, when no attribute @cite{Executable} applies:
-its value replaces the platform-specific executable suffix.
-The default executable suffix is empty on UNIX and ".exe" on Windows.
-
-It is also possible to change the name of the produced executable by using the
-command line switch @emph{-o}. When several mains are defined in the project,
-it is not possible to use the @emph{-o} switch and the only way to change the
-names of the executable is provided by Attributes @cite{Executable} and
-@cite{Executable_Suffix}.
-
-@node Avoid Duplication With Variables,Naming Schemes,Executable File Names,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager id10}@anchor{167}@anchor{gnat_ugn/gnat_project_manager avoid-duplication-with-variables}@anchor{168}
-@subsection Avoid Duplication With Variables
-
-
-To illustrate some other project capabilities, here is a slightly more complex
-project using similar sources and a main program in C:
-
-@example
-project C_Main is
-   for Languages    use ("Ada", "C");
-   for Source_Dirs  use ("common");
-   for Object_Dir   use  "obj";
-   for Main         use ("main.c");
-   package Compiler is
-      C_Switches := ("-pedantic");
-      for Default_Switches ("C")   use C_Switches;
-      for Default_Switches ("Ada") use ("-gnaty");
-      for Switches ("main.c") use C_Switches & ("-g");
-   end Compiler;
-end C_Main;
-@end example
-
-This project has many similarities with the previous one.
-As expected, its @cite{Main} attribute now refers to a C source.
-The attribute @emph{Exec_Dir} is now omitted, thus the resulting
-executable will be put in the directory @code{obj}.
-
-The most noticeable difference is the use of a variable in the
-@emph{Compiler} package to store settings used in several attributes.
-This avoids text duplication, and eases maintenance (a single place to
-modify if we want to add new switches for C files). We will revisit
-the use of variables in the context of scenarios (see @ref{14f,,Scenarios in Projects}).
-
-In this example, we see how the file @code{main.c} can be compiled with
-the switches used for all the other C files, plus @emph{-g}.
-In this specific situation the use of a variable could have been
-replaced by a reference to the @cite{Default_Switches} attribute:
-
-@example
-for Switches ("c_main.c") use Compiler'Default_Switches ("C") & ("-g");
-@end example
-
-Note the tick (@emph{'}) used to refer to attributes defined in a package.
-
-Here is the output of the GPRbuild command using this project:
-
-@example
-$ gprbuild -Pc_main
-gcc -c -pedantic -g main.c
-gcc -c -gnaty proc.adb
-gcc -c -gnaty pack.adb
-gcc -c -pedantic utils.c
-gprbind main.bexch
-...
-gcc main.o -o main
-@end example
-
-The default switches for Ada sources,
-the default switches for C sources (in the compilation of @code{lib.c}),
-and the specific switches for @code{main.c} have all been taken into
-account.
-
-@node Naming Schemes,Installation,Avoid Duplication With Variables,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager id11}@anchor{169}@anchor{gnat_ugn/gnat_project_manager naming-schemes}@anchor{14e}
-@subsection Naming Schemes
-
-
-Sometimes an Ada software system is ported from one compilation environment to
-another (say GNAT), and the file are not named using the default GNAT
-conventions. Instead of changing all the file names, which for a variety of
-reasons might not be possible, you can define the relevant file naming scheme
-in the @strong{Naming} package of your project file.
-
-The naming scheme has two distinct goals for the project manager: it
-allows finding of source files when searching in the source
-directories, and given a source file name it makes it possible to guess
-the associated language, and thus the compiler to use.
-
-Note that the use by the Ada compiler of pragmas Source_File_Name is not
-supported when using project files. You must use the features described in this
-paragraph. You can however specify other configuration pragmas.
-
-The following attributes can be defined in package @cite{Naming}:
-
-@geindex Casing (GNAT Project Manager)
-
-@strong{Casing}:
-
-@quotation
-
-Its value must be one of @cite{"lowercase"} (the default if
-unspecified), @cite{"uppercase"} or @cite{"mixedcase"}. It describes the
-casing of file names with regards to the Ada unit name. Given an Ada unit
-My_Unit, the file name will respectively be @code{my_unit.adb} (lowercase),
-@code{MY_UNIT.ADB} (uppercase) or @code{My_Unit.adb} (mixedcase).
-On Windows, file names are case insensitive, so this attribute is
-irrelevant.
-@end quotation
-
-@geindex Dot_Replacement (GNAT Project Manager)
-
-@strong{Dot_Replacement}:
-
-@quotation
-
-This attribute specifies the string that should replace the "." in unit
-names. Its default value is @cite{"-"} so that a unit
-@cite{Parent.Child} is expected to be found in the file
-@code{parent-child.adb}. The replacement string must satisfy the following
-requirements to avoid ambiguities in the naming scheme:
-
-
-@itemize *
-
-@item 
-It must not be empty
-
-@item 
-It cannot start or end with an alphanumeric character
-
-@item 
-It cannot be a single underscore
-
-@item 
-It cannot start with an underscore followed by an alphanumeric
-
-@item 
-It cannot contain a dot @cite{'.'} except if the entire string is @cite{"."}
-@end itemize
-@end quotation
-
-@geindex Spec_Suffix (GNAT Project Manager)
-
-@geindex Specification_Suffix (GNAT Project Manager)
-
-@strong{Spec_Suffix} and @strong{Specification_Suffix}:
-
-@quotation
-
-For Ada, these attributes give the suffix used in file names that contain
-specifications. For other languages, they give the extension for files
-that contain declaration (header files in C for instance). The attribute
-is indexed on the language.
-The two attributes are equivalent, but the latter is obsolescent.
-
-If the value of the attribute is the empty string, it indicates to the
-Project Manager that the only specifications/header files for the language
-are those specified with attributes @cite{Spec} or
-@cite{Specification_Exceptions}.
-
-If @cite{Spec_Suffix ("Ada")} is not specified, then the default is
-@cite{".ads"}.
-
-A non empty value must satisfy the following requirements:
-
-
-@itemize *
-
-@item 
-It must include at least one dot
-
-@item 
-If @cite{Dot_Replacement} is a single dot, then it cannot include
-more than one dot.
-@end itemize
-@end quotation
-
-@geindex Body_Suffix (GNAT Project Manager)
-
-@geindex Implementation_Suffix (GNAT Project Manager)
-
-@strong{Body_Suffix} and @strong{Implementation_Suffix}:
-
-@quotation
-
-These attributes give the extension used for file names that contain
-code (bodies in Ada). They are indexed on the language. The second
-version is obsolescent and fully replaced by the first attribute.
-
-For each language of a project, one of these two attributes need to be
-specified, either in the project itself or in the configuration project file.
-
-If the value of the attribute is the empty string, it indicates to the
-Project Manager that the only source files for the language
-are those specified with attributes @cite{Body} or
-@cite{Implementation_Exceptions}.
-
-These attributes must satisfy the same requirements as @cite{Spec_Suffix}.
-In addition, they must be different from any of the values in
-@cite{Spec_Suffix}.
-If @cite{Body_Suffix ("Ada")} is not specified, then the default is
-@cite{".adb"}.
-
-If @cite{Body_Suffix ("Ada")} and @cite{Spec_Suffix ("Ada")} end with the
-same string, then a file name that ends with the longest of these two
-suffixes will be a body if the longest suffix is @cite{Body_Suffix ("Ada")}
-or a spec if the longest suffix is @cite{Spec_Suffix ("Ada")}.
-
-If the suffix does not start with a '.', a file with a name exactly equal to
-the suffix will also be part of the project (for instance if you define the
-suffix as @cite{Makefile.in}, a file called @code{Makefile.in} will be part
-of the project. This capability is usually not interesting when building.
-However, it might become useful when a project is also used to
-find the list of source files in an editor, like the GNAT Programming System
-(GPS).
-@end quotation
-
-@geindex Separate_Suffix (GNAT Project Manager)
-
-@strong{Separate_Suffix}:
-
-@quotation
-
-This attribute is specific to Ada. It denotes the suffix used in file names
-that contain separate bodies. If it is not specified, then it defaults to
-same value as @cite{Body_Suffix ("Ada")}.
-
-The value of this attribute cannot be the empty string.
-
-Otherwise, the same rules apply as for the
-@cite{Body_Suffix} attribute. The only accepted index is "Ada".
-@end quotation
-
-@strong{Spec} or @strong{Specification}:
-
-@quotation
-
-@geindex Spec (GNAT Project Manager)
-
-@geindex Specification (GNAT Project Manager)
-
-This attribute @cite{Spec} can be used to define the source file name for a
-given Ada compilation unit's spec. The index is the literal name of the Ada
-unit (case insensitive). The value is the literal base name of the file that
-contains this unit's spec (case sensitive or insensitive depending on the
-operating system). This attribute allows the definition of exceptions to the
-general naming scheme, in case some files do not follow the usual
-convention.
-
-When a source file contains several units, the relative position of the unit
-can be indicated. The first unit in the file is at position 1
-
-@example
-for Spec ("MyPack.MyChild") use "mypack.mychild.spec";
-for Spec ("top") use "foo.a" at 1;
-for Spec ("foo") use "foo.a" at 2;
-@end example
-@end quotation
-
-@geindex Body (GNAT Project Manager)
-
-@geindex Implementation (GNAT Project Manager)
-
-@strong{Body} or @strong{Implementation}:
-
-@quotation
-
-These attribute play the same role as @emph{Spec} for Ada bodies.
-@end quotation
-
-@geindex Specification_Exceptions (GNAT Project Manager)
-
-@geindex Implementation_Exceptions (GNAT Project Manager)
-
-@strong{Specification_Exceptions} and @strong{Implementation_Exceptions}:
-
-@quotation
-
-These attributes define exceptions to the naming scheme for languages
-other than Ada. They are indexed on the language name, and contain
-a list of file names respectively for headers and source code.
-@end quotation
-
-For example, the following package models the Apex file naming rules:
-
-@example
-package Naming is
-  for Casing               use "lowercase";
-  for Dot_Replacement      use ".";
-  for Spec_Suffix ("Ada")  use ".1.ada";
-  for Body_Suffix ("Ada")  use ".2.ada";
-end Naming;
-@end example
-
-@node Installation,Distributed support,Naming Schemes,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager id12}@anchor{16a}@anchor{gnat_ugn/gnat_project_manager installation}@anchor{16b}
-@subsection Installation
-
-
-After building an application or a library it is often required to
-install it into the development environment. For instance this step is
-required if the library is to be used by another application.
-The @emph{gprinstall} tool provides an easy way to install
-libraries, executable or object code generated during the build. The
-@strong{Install} package can be used to change the default locations.
-
-The following attributes can be defined in package @cite{Install}:
-
-@geindex Active (GNAT Project Manager)
-
-
-@table @asis
-
-@item @strong{Active}
-
-Whether the project is to be installed, values are @cite{true}
-(default) or @cite{false}.
-@end table
-
-@geindex Artifacts (GNAT Project Manager)
-
-@strong{Artifacts}
-
-@quotation
-
-An array attribute to declare a set of files not part of the sources
-to be installed. The array discriminant is the directory where the
-file is to be installed. If a relative directory then Prefix (see
-below) is prepended. Note also that if the same file name occurs
-multiple time in the attribute list, the last one will be the one
-installed.
-@end quotation
-
-@geindex Prefix (GNAT Project Manager)
-
-@strong{Prefix}:
-
-@quotation
-
-Root directory for the installation.
-@end quotation
-
-@strong{Exec_Subdir}
-
-@quotation
-
-Subdirectory of @strong{Prefix} where executables are to be
-installed. Default is @strong{bin}.
-@end quotation
-
-@strong{Lib_Subdir}
-
-@quotation
-
-Subdirectory of @strong{Prefix} where directory with the library or object
-files is to be installed. Default is @strong{lib}.
-@end quotation
-
-@strong{Sources_Subdir}
-
-@quotation
-
-Subdirectory of @strong{Prefix} where directory with sources is to be
-installed. Default is @strong{include}.
-@end quotation
-
-@strong{Project_Subdir}
-
-@quotation
-
-Subdirectory of @strong{Prefix} where the generated project file is to be
-installed. Default is @strong{share/gpr}.
-@end quotation
-
-@strong{Mode}
-
-@quotation
-
-The installation mode, it is either @strong{dev} (default) or @strong{usage}.
-See @strong{gprbuild} user's guide for details.
-@end quotation
-
-@strong{Install_Name}
-
-@quotation
-
-Specify the name to use for recording the installation. The default is
-the project name without the extension.
-@end quotation
-
-@node Distributed support,,Installation,Building With Projects
-@anchor{gnat_ugn/gnat_project_manager id13}@anchor{16c}@anchor{gnat_ugn/gnat_project_manager distributed-support}@anchor{16d}
-@subsection Distributed support
-
-
-For large projects the compilation time can become a limitation in
-the development cycle. To cope with that, GPRbuild supports
-distributed compilation.
-
-The following attributes can be defined in package @cite{Remote}:
-
-@geindex Root_Dir (GNAT Project Manager)
-
-@strong{Root_Dir}:
-
-@quotation
-
-Root directory of the project's sources. The default value is the
-project's directory.
-@end quotation
-
-@node Organizing Projects into Subsystems,Scenarios in Projects,Building With Projects,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager organizing-projects-into-subsystems}@anchor{151}@anchor{gnat_ugn/gnat_project_manager id14}@anchor{16e}
-@section Organizing Projects into Subsystems
-
-
-A @strong{subsystem} is a coherent part of the complete system to be built. It is
-represented by a set of sources and one single object directory. A system can
-be composed of a single subsystem when it is simple as we have seen in the
-first section. Complex systems are usually composed of several interdependent
-subsystems. A subsystem is dependent on another subsystem if knowledge of the
-other one is required to build it, and in particular if visibility on some of
-the sources of this other subsystem is required. Each subsystem is usually
-represented by its own project file.
-
-In this section, the previous example is being extended. Let's assume some
-sources of our @cite{Build} project depend on other sources.
-For instance, when building a graphical interface, it is usual to depend upon
-a graphical library toolkit such as GtkAda. Furthermore, we also need
-sources from a logging module we had previously written.
-
-@menu
-* Project Dependencies:: 
-* Cyclic Project Dependencies:: 
-* Sharing Between Projects:: 
-* Global Attributes:: 
-
-@end menu
-
-@node Project Dependencies,Cyclic Project Dependencies,,Organizing Projects into Subsystems
-@anchor{gnat_ugn/gnat_project_manager project-dependencies}@anchor{16f}@anchor{gnat_ugn/gnat_project_manager id15}@anchor{170}
-@subsection Project Dependencies
-
-
-GtkAda comes with its own project file (appropriately called
-@code{gtkada.gpr}), and we will assume we have already built a project
-called @code{logging.gpr} for the logging module. With the information provided
-so far in @code{build.gpr}, building the application would fail with an error
-indicating that the gtkada and logging units that are relied upon by the sources
-of this project cannot be found.
-
-This is solved by adding the following @strong{with} clauses at the beginning of our
-project:
-
-@example
-with "gtkada.gpr";
-with "a/b/logging.gpr";
-project Build is
-  ...  --  as before
-end Build;
-@end example
-
-@geindex Externally_Built (GNAT Project Manager)
-
-When such a project is compiled, @emph{gprbuild} will automatically check
-the other projects and recompile their sources when needed. It will also
-recompile the sources from @cite{Build} when needed, and finally create the
-executable. In some cases, the implementation units needed to recompile a
-project are not available, or come from some third party and you do not want to
-recompile it yourself. In this case, set the attribute @strong{Externally_Built} to
-"true", indicating to the builder that this project can be assumed to be
-up-to-date, and should not be considered for recompilation. In Ada, if the
-sources of this externally built project were compiled with another version of
-the compiler or with incompatible options, the binder will issue an error.
-
-The project's @emph{with} clause has several effects. It provides source
-visibility between projects during the compilation process. It also guarantees
-that the necessary object files from @cite{Logging} and @cite{GtkAda} are
-available when linking @cite{Build}.
-
-As can be seen in this example, the syntax for importing projects is similar
-to the syntax for importing compilation units in Ada. However, project files
-use literal strings instead of names, and the @emph{with} clause identifies
-project files rather than packages.
-
-Each literal string after @emph{with} is the path
-(absolute or relative) to a project file. The @cite{.gpr} extension is
-optional, although we recommend adding it. If no extension is specified,
-and no project file with the @code{.gpr} extension is found, then
-the file is searched for exactly as written in the @emph{with} clause,
-that is with no extension.
-
-As mentioned above, the path after a @emph{with} has to be a literal
-string, and you cannot use concatenation, or lookup the value of external
-variables to change the directories from which a project is loaded.
-A solution if you need something like this is to use aggregate projects
-(see @ref{171,,Aggregate Projects}).
-
-@geindex project path (GNAT Project Manager)
-
-When a relative path or a base name is used, the
-project files are searched relative to each of the directories in the
-@strong{project path}. This path includes all the directories found with the
-following algorithm, in this order; the first matching file is used:
-
-
-@itemize *
-
-@item 
-First, the file is searched relative to the directory that contains the
-current project file.
-
-@geindex GPR_PROJECT_PATH_FILE (GNAT Project Manager)
-
-@geindex GPR_PROJECT_PATH (GNAT Project Manager)
-
-@geindex ADA_PROJECT_PATH (GNAT Project Manager)
-
-@item 
-Then it is searched relative to all the directories specified in the
-environment variables @strong{GPR_PROJECT_PATH_FILE},
-@strong{GPR_PROJECT_PATH} and @strong{ADA_PROJECT_PATH} (in that order) if they exist.
-The value of @strong{GPR_PROJECT_PATH_FILE}, when defined, is the path name of
-a text file that contains project directory path names, one per line.
-@strong{GPR_PROJECT_PATH} and @strong{ADA_PROJECT_PATH}, when defined, contain
-project directory path names separated by directory separators.
-@strong{ADA_PROJECT_PATH} is used for compatibility, it is recommended to
-use @strong{GPR_PROJECT_PATH_FILE} or @strong{GPR_PROJECT_PATH}.
-
-@item 
-Finally, it is searched relative to the default project directories.
-Such directories depend on the tool used. The locations searched in the
-specified order are:
-
-
-@itemize *
-
-@item 
-@code{<prefix>/<target>/lib/gnat} if option @emph{--target} is specified
-
-@item 
-@code{<prefix>/<target>/share/gpr} if option @emph{--target} is specified
-
-@item 
-@code{<prefix>/share/gpr/}
-
-@item 
-@code{<prefix>/lib/gnat/}
-@end itemize
-
-In our example, @code{gtkada.gpr} is found in the predefined directory if
-it was installed at the same root as GNAT.
-@end itemize
-
-Some tools also support extending the project path from the command line,
-generally through the @emph{-aP}. You can see the value of the project
-path by using the @emph{gnatls -v} command.
-
-Any symbolic link will be fully resolved in the directory of the
-importing project file before the imported project file is examined.
-
-Any source file in the imported project can be used by the sources of the
-importing project, transitively.
-Thus if @cite{A} imports @cite{B}, which imports @cite{C}, the sources of
-@cite{A} may depend on the sources of @cite{C}, even if @cite{A} does not
-import @cite{C} explicitly. However, this is not recommended, because if
-and when @cite{B} ceases to import @cite{C}, some sources in @cite{A} will
-no longer compile. @emph{gprbuild} has a switch @emph{--no-indirect-imports}
-that will report such indirect dependencies.
-
-@cartouche
-@quotation Note 
-One very important aspect of a project hierarchy is that
-@strong{a given source can only belong to one project} (otherwise the project manager
-would not know which settings apply to it and when to recompile it). It means
-that different project files do not usually share source directories or
-when they do, they need to specify precisely which project owns which sources
-using attribute @cite{Source_Files} or equivalent. By contrast, 2 projects
-can each own a source with the same base file name as long as they live in
-different directories. The latter is not true for Ada Sources because of the
-correlation between source files and Ada units.
-@end quotation
-@end cartouche
-
-@node Cyclic Project Dependencies,Sharing Between Projects,Project Dependencies,Organizing Projects into Subsystems
-@anchor{gnat_ugn/gnat_project_manager id16}@anchor{172}@anchor{gnat_ugn/gnat_project_manager cyclic-project-dependencies}@anchor{173}
-@subsection Cyclic Project Dependencies
-
-
-Cyclic dependencies are mostly forbidden:
-if @cite{A} imports @cite{B} (directly or indirectly) then @cite{B}
-is not allowed to import @cite{A}. However, there are cases when cyclic
-dependencies would be beneficial. For these cases, another form of import
-between projects exists: the @strong{limited with}.  A project @cite{A} that
-imports a project @cite{B} with a straight @emph{with} may also be imported,
-directly or indirectly, by @cite{B} through a @cite{limited with}.
-
-The difference between straight @emph{with} and @cite{limited with} is that
-the name of a project imported with a @cite{limited with} cannot be used in the
-project importing it. In particular, its packages cannot be renamed and
-its variables cannot be referred to.
-
-@example
-with "b.gpr";
-with "c.gpr";
-project A is
-    for Exec_Dir use B'Exec_Dir; -- ok
-end A;
-
-limited with "a.gpr";   --  Cyclic dependency: A -> B -> A
-project B is
-   for Exec_Dir use A'Exec_Dir; -- not ok
-end B;
-
-with "d.gpr";
-project C is
-end C;
-
-limited with "a.gpr";  --  Cyclic dependency: A -> C -> D -> A
-project D is
-   for Exec_Dir use A'Exec_Dir; -- not ok
-end D;
-@end example
-
-@node Sharing Between Projects,Global Attributes,Cyclic Project Dependencies,Organizing Projects into Subsystems
-@anchor{gnat_ugn/gnat_project_manager sharing-between-projects}@anchor{174}@anchor{gnat_ugn/gnat_project_manager id17}@anchor{175}
-@subsection Sharing Between Projects
-
-
-When building an application, it is common to have similar needs in several of
-the projects corresponding to the subsystems under construction. For instance,
-they will all have the same compilation switches.
-
-As seen before (see @ref{161,,Tools Options in Project Files}), setting compilation
-switches for all sources of a subsystem is simple: it is just a matter of
-adding a @cite{Compiler.Default_Switches} attribute to each project files with
-the same value. Of course, that means duplication of data, and both places need
-to be changed in order to recompile the whole application with different
-switches. It can become a real problem if there are many subsystems and thus
-many project files to edit.
-
-There are two main approaches to avoiding this duplication:
-
-
-@itemize *
-
-@item 
-Since @code{build.gpr} imports @code{logging.gpr}, we could change it
-to reference the attribute in Logging, either through a package renaming,
-or by referencing the attribute. The following example shows both cases:
-
-@example
-project Logging is
-   package Compiler is
-      for Switches ("Ada")
-          use ("-O2");
-   end Compiler;
-   package Binder is
-      for Switches ("Ada")
-          use ("-E");
-   end Binder;
-end Logging;
-
-with "logging.gpr";
-project Build is
-   package Compiler renames Logging.Compiler;
-   package Binder is
-      for Switches ("Ada") use Logging.Binder'Switches ("Ada");
-   end Binder;
-end Build;
-@end example
-
-The solution used for @cite{Compiler} gets the same value for all
-attributes of the package, but you cannot modify anything from the
-package (adding extra switches or some exceptions). The second
-version is more flexible, but more verbose.
-
-If you need to refer to the value of a variable in an imported
-project, rather than an attribute, the syntax is similar but uses
-a "." rather than an apostrophe. For instance:
-
-@example
-with "imported";
-project Main is
-   Var1 := Imported.Var;
-end Main;
-@end example
-
-@item 
-The second approach is to define the switches in a third project.
-That project is set up without any sources (so that, as opposed to
-the first example, none of the project plays a special role), and
-will only be used to define the attributes. Such a project is
-typically called @code{shared.gpr}.
-
-@example
-abstract project Shared is
-   for Source_Files use ();   --  no sources
-   package Compiler is
-      for Switches ("Ada")
-          use ("-O2");
-   end Compiler;
-end Shared;
-
-with "shared.gpr";
-project Logging is
-   package Compiler renames Shared.Compiler;
-end Logging;
-
-with "shared.gpr";
-project Build is
-   package Compiler renames Shared.Compiler;
-end Build;
-@end example
-
-As for the first example, we could have chosen to set the attributes
-one by one rather than to rename a package. The reason we explicitly
-indicate that @cite{Shared} has no sources is so that it can be created
-in any directory and we are sure it shares no sources with @cite{Build}
-or @cite{Logging}, which of course would be invalid.
-
-@geindex project qualifier (GNAT Project Manager)
-
-Note the additional use of the @strong{abstract} qualifier in @code{shared.gpr}.
-This qualifier is optional, but helps convey the message that we do not
-intend this project to have sources (see @ref{176,,Qualified Projects} for
-more qualifiers).
-@end itemize
-
-@node Global Attributes,,Sharing Between Projects,Organizing Projects into Subsystems
-@anchor{gnat_ugn/gnat_project_manager global-attributes}@anchor{177}@anchor{gnat_ugn/gnat_project_manager id18}@anchor{178}
-@subsection Global Attributes
-
-
-We have already seen many examples of attributes used to specify a special
-option of one of the tools involved in the build process. Most of those
-attributes are project specific. That it to say, they only affect the invocation
-of tools on the sources of the project where they are defined.
-
-There are a few additional attributes that apply to all projects in a
-hierarchy as long as they are defined on the "main" project.
-The main project is the project explicitly mentioned on the command-line.
-The project hierarchy is the "with"-closure of the main project.
-
-Here is a list of commonly used global attributes:
-
-@geindex Global_Configuration_Pragmas (GNAT Project Manager)
-
-@strong{Builder.Global_Configuration_Pragmas}:
-
-@quotation
-
-This attribute points to a file that contains configuration pragmas
-to use when building executables. These pragmas apply for all
-executables built from this project hierarchy. As we have seen before,
-additional pragmas can be specified on a per-project basis by setting the
-@cite{Compiler.Local_Configuration_Pragmas} attribute.
-@end quotation
-
-@geindex Global_Compilation_Switches (GNAT Project Manager)
-
-@strong{Builder.Global_Compilation_Switches}:
-
-@quotation
-
-This attribute is a list of compiler switches to use when compiling any
-source file in the project hierarchy. These switches are used in addition
-to the ones defined in the @cite{Compiler} package, which only apply to
-the sources of the corresponding project. This attribute is indexed on
-the name of the language.
-@end quotation
-
-Using such global capabilities is convenient. It can also lead to unexpected
-behavior. Especially when several subsystems are shared among different main
-projects and the different global attributes are not
-compatible. Note that using aggregate projects can be a safer and more powerful
-replacement to global attributes.
-
-@node Scenarios in Projects,Library Projects,Organizing Projects into Subsystems,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager id19}@anchor{179}@anchor{gnat_ugn/gnat_project_manager scenarios-in-projects}@anchor{14f}
-@section Scenarios in Projects
-
-
-Various aspects of the projects can be modified based on @strong{scenarios}. These
-are user-defined modes that change the behavior of a project. Typical
-examples are the setup of platform-specific compiler options, or the use of
-a debug and a release mode (the former would activate the generation of debug
-information, while the second will focus on improving code optimization).
-
-Let's enhance our example to support debug and release modes. The issue is to
-let the user choose what kind of system he is building: use @emph{-g} as
-compiler switches in debug mode and @emph{-O2} in release mode. We will also
-set up the projects so that we do not share the same object directory in both
-modes; otherwise switching from one to the other might trigger more
-recompilations than needed or mix objects from the two modes.
-
-One naive approach is to create two different project files, say
-@code{build_debug.gpr} and @code{build_release.gpr}, that set the appropriate
-attributes as explained in previous sections. This solution does not scale
-well, because in the presence of multiple projects depending on each other, you
-will also have to duplicate the complete hierarchy and adapt the project files
-to point to the right copies.
-
-@geindex scenarios (GNAT Project Manager)
-
-Instead, project files support the notion of scenarios controlled
-by external values. Such values can come from several sources (in decreasing
-order of priority):
-
-@geindex -X (usage with GNAT Project Manager)
-
-
-@table @asis
-
-@item @strong{Command line}:
-
-When launching @emph{gprbuild}, the user can pass
-extra @emph{-X} switches to define the external value. In
-our case, the command line might look like
-
-@example
-gprbuild -Pbuild.gpr -Xmode=release
-@end example
-
-@item @strong{Environment variables}:
-
-When the external value does not come from the command line, it can come from
-the value of environment variables of the appropriate name.
-In our case, if an environment variable called "mode"
-exists, its value will be taken into account.
-@end table
-
-@geindex external (GNAT Project Manager)
-
-@strong{External function second parameter}.
-
-We now need to get that value in the project. The general form is to use
-the predefined function @strong{external} which returns the current value of
-the external. For instance, we could set up the object directory to point to
-either @code{obj/debug} or @code{obj/release} by changing our project to
-
-@example
-project Build is
-    for Object_Dir use "obj/" & external ("mode", "debug");
-    ... --  as before
-end Build;
-@end example
-
-The second parameter to @cite{external} is optional, and is the default
-value to use if "mode" is not set from the command line or the environment.
-
-In order to set the switches according to the different scenarios, other
-constructs have to be introduced such as typed variables and case constructions.
-
-@geindex typed variable (GNAT Project Manager)
-
-@geindex case construction (GNAT Project Manager)
-
-A @strong{typed variable} is a variable that
-can take only a limited number of values, similar to an enumeration in Ada.
-Such a variable can then be used in a @strong{case construction} and create conditional
-sections in the project. The following example shows how this can be done:
-
-@example
-project Build is
-   type Mode_Type is ("debug", "release");  --  all possible values
-   Mode : Mode_Type := external ("mode", "debug"); -- a typed variable
-
-   package Compiler is
-      case Mode is
-         when "debug" =>
-            for Switches ("Ada")
-                use ("-g");
-         when "release" =>
-            for Switches ("Ada")
-                use ("-O2");
-      end case;
-   end Compiler;
-end Build;
-@end example
-
-The project has suddenly grown in size, but has become much more flexible.
-@cite{Mode_Type} defines the only valid values for the @cite{mode} variable. If
-any other value is read from the environment, an error is reported and the
-project is considered as invalid.
-
-The @cite{Mode} variable is initialized with an external value
-defaulting to @cite{"debug"}. This default could be omitted and that would
-force the user to define the value. Finally, we can use a case construction to set the
-switches depending on the scenario the user has chosen.
-
-Most aspects of the projects can depend on scenarios. The notable exception
-are project dependencies (@emph{with} clauses), which cannot depend on a scenario.
-
-Scenarios work the same way with @strong{project hierarchies}: you can either
-duplicate a variable similar to @cite{Mode} in each of the project (as long
-as the first argument to @cite{external} is always the same and the type is
-the same), or simply set the variable in the @code{shared.gpr} project
-(see @ref{174,,Sharing Between Projects}).
-
-@node Library Projects,Project Extension,Scenarios in Projects,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager library-projects}@anchor{8a}@anchor{gnat_ugn/gnat_project_manager id20}@anchor{17a}
-@section Library Projects
-
-
-So far, we have seen examples of projects that create executables. However,
-it is also possible to create libraries instead. A @strong{library} is a specific
-type of subsystem where, for convenience, objects are grouped together
-using system-specific means such as archives or windows DLLs.
-
-Library projects provide a system- and language-independent way of building
-both @strong{static} and @strong{dynamic} libraries. They also support the concept of
-@strong{standalone libraries} (SAL) which offer two significant properties: the
-elaboration (e.g. initialization) of the library is either automatic or
-very simple; a change in the
-implementation part of the library implies minimal post-compilation actions on
-the complete system and potentially no action at all for the rest of the
-system in the case of dynamic SALs.
-
-There is a restriction on shared library projects: by default, they are only
-allowed to import other shared library projects. They are not allowed to
-import non library projects or static library projects.
-
-The GNAT Project Manager takes complete care of the library build, rebuild and
-installation tasks, including recompilation of the source files for which
-objects do not exist or are not up to date, assembly of the library archive, and
-installation of the library (i.e., copying associated source, object and
-@code{ALI} files to the specified location).
-
-@menu
-* Building Libraries:: 
-* Using Library Projects:: 
-* Stand-alone Library Projects:: 
-* Installing a library with project files:: 
-
-@end menu
-
-@node Building Libraries,Using Library Projects,,Library Projects
-@anchor{gnat_ugn/gnat_project_manager id21}@anchor{17b}@anchor{gnat_ugn/gnat_project_manager building-libraries}@anchor{17c}
-@subsection Building Libraries
-
-
-Let's enhance our example and transform the @cite{logging} subsystem into a
-library.  In order to do so, a few changes need to be made to
-@code{logging.gpr}.  Some attributes need to be defined: at least
-@cite{Library_Name} and @cite{Library_Dir}; in addition, some other attributes
-can be used to specify specific aspects of the library. For readability, it is
-also recommended (although not mandatory), to use the qualifier @cite{library}
-in front of the @cite{project} keyword.
-
-@geindex Library_Name (GNAT Project Manager)
-
-@strong{Library_Name}:
-
-@quotation
-
-This attribute is the name of the library to be built. There is no
-restriction on the name of a library imposed by the project manager, except
-for stand-alone libraries whose names must follow the syntax of Ada
-identifiers; however, there may be system-specific restrictions on the name.
-In general, it is recommended to stick to alphanumeric characters (and
-possibly single underscores) to help portability.
-@end quotation
-
-@geindex Library_Dir (GNAT Project Manager)
-
-@strong{Library_Dir}:
-
-@quotation
-
-This attribute  is the path (absolute or relative) of the directory where
-the library is to be installed. In the process of building a library,
-the sources are compiled, the object files end up  in the explicit or
-implicit @cite{Object_Dir} directory. When all sources of a library
-are compiled, some of the compilation artifacts, including the library itself,
-are copied to the library_dir directory. This directory must exist and be
-writable. It must also be different from the object directory so that cleanup
-activities in the Library_Dir do not affect recompilation needs.
-@end quotation
-
-Here is the new version of @code{logging.gpr} that makes it a library:
-
-@example
-library project Logging is          --  "library" is optional
-   for Library_Name use "logging";  --  will create "liblogging.a" on Unix
-   for Object_Dir   use "obj";
-   for Library_Dir  use "lib";      --  different from object_dir
-end Logging;
-@end example
-
-Once the above two attributes are defined, the library project is valid and
-is enough for building a library with default characteristics.
-Other library-related attributes can be used to change the defaults:
-
-@geindex Library_Kind (GNAT Project Manager)
-
-@strong{Library_Kind}:
-
-@quotation
-
-The value of this attribute must be either @cite{"static"}, @cite{"dynamic"} or
-@cite{"relocatable"} (the latter is a synonym for dynamic). It indicates
-which kind of library should be built (the default is to build a
-static library, that is an archive of object files that can potentially
-be linked into a static executable). When the library is set to be dynamic,
-a separate image is created that will be loaded independently, usually
-at the start of the main program execution. Support for dynamic libraries is
-very platform specific, for instance on Windows it takes the form of a DLL
-while on GNU/Linux, it is a dynamic elf image whose suffix is usually
-@code{.so}. Library project files, on the other hand, can be written in
-a platform independent way so that the same project file can be used to build
-a library on different operating systems.
-
-If you need to build both a static and a dynamic library, it is recommended
-to use two different object directories, since in some cases some extra code
-needs to be generated for the latter. For such cases, one can either define
-two different project files, or a single one that uses scenarios to indicate
-the various kinds of library to be built and their corresponding object_dir.
-@end quotation
-
-@geindex Library_ALI_Dir (GNAT Project Manager)
-
-@strong{Library_ALI_Dir}:
-
-@quotation
-
-This attribute may be specified to indicate the directory where the ALI
-files of the library are installed. By default, they are copied into the
-@cite{Library_Dir} directory, but as for the executables where we have a
-separate @cite{Exec_Dir} attribute, you might want to put them in a separate
-directory since there can be hundreds of them. The same restrictions as for
-the @cite{Library_Dir} attribute apply.
-@end quotation
-
-@geindex Library_Version (GNAT Project Manager)
-
-@strong{Library_Version}:
-
-@quotation
-
-This attribute is platform dependent, and has no effect on Windows.
-On Unix, it is used only for dynamic libraries as the internal
-name of the library (the @cite{"soname"}). If the library file name (built
-from the @cite{Library_Name}) is different from the @cite{Library_Version},
-then the library file will be a symbolic link to the actual file whose name
-will be @cite{Library_Version}. This follows the usual installation schemes
-for dynamic libraries on many Unix systems.
-
-@example
-project Logging is
-   Version := "1";
-   for Library_Dir use "lib";
-   for Library_Name use "logging";
-   for Library_Kind use "dynamic";
-   for Library_Version use "liblogging.so." & Version;
-end Logging;
-@end example
-
-After the compilation, the directory @code{lib} will contain both a
-@code{libdummy.so.1} library and a symbolic link to it called
-@code{libdummy.so}.
-@end quotation
-
-@geindex Library_GCC (GNAT Project Manager)
-
-@strong{Library_GCC}:
-
-@quotation
-
-This attribute is the name of the tool to use instead of "gcc" to link shared
-libraries. A common use of this attribute is to define a wrapper script that
-accomplishes specific actions before calling gcc (which itself calls the
-linker to build the library image).
-@end quotation
-
-@geindex Library_Options (GNAT Project Manager)
-
-@strong{Library_Options}:
-
-@quotation
-
-This attribute may be used to specify additional switches (last switches)
-when linking a shared library.
-
-It may also be used to add foreign object files to a static library.
-Each string in Library_Options is an absolute or relative path of an object
-file. When a relative path, it is relative to the object directory.
-@end quotation
-
-@geindex Leading_Library_Options (GNAT Project Manager)
-
-@strong{Leading_Library_Options}:
-
-@quotation
-
-This attribute, that is taken into account only by @emph{gprbuild}, may be
-used to specified leading options (first switches) when linking a shared
-library.
-@end quotation
-
-@geindex Linker_Options (GNAT Project Manager)
-
-@strong{Linker.Linker_Options}:
-
-@quotation
-
-This attribute specifies additional switches to be given to the linker when
-linking an executable. It is ignored when defined in the main project and
-taken into account in all other projects that are imported directly or
-indirectly. These switches complement the @cite{Linker.Switches}
-defined in the main project. This is useful when a particular subsystem
-depends on an external library: adding this dependency as a
-@cite{Linker_Options} in the project of the subsystem is more convenient than
-adding it to all the @cite{Linker.Switches} of the main projects that depend
-upon this subsystem.
-@end quotation
-
-@node Using Library Projects,Stand-alone Library Projects,Building Libraries,Library Projects
-@anchor{gnat_ugn/gnat_project_manager id22}@anchor{17d}@anchor{gnat_ugn/gnat_project_manager using-library-projects}@anchor{17e}
-@subsection Using Library Projects
-
-
-When the builder detects that a project file is a library project file, it
-recompiles all sources of the project that need recompilation and rebuild the
-library if any of the sources have been recompiled. It then groups all object
-files into a single file, which is a shared or a static library. This library
-can later on be linked with multiple executables. Note that the use
-of shard libraries reduces the size of the final executable and can also reduce
-the memory footprint at execution time when the library is shared among several
-executables.
-
-@emph{gprbuild also allows to build **multi-language libraries*} when specifying
-sources from multiple languages.
-
-A non-library project can import a library project. When the builder is invoked
-on the former, the library of the latter is only rebuilt when absolutely
-necessary. For instance, if a unit of the library is not up-to-date but none of
-the executables need this unit, then the unit is not recompiled and the library
-is not reassembled.  For instance, let's assume in our example that logging has
-the following sources: @code{log1.ads}, @code{log1.adb}, @code{log2.ads} and
-@code{log2.adb}. If @code{log1.adb} has been modified, then the library
-@code{liblogging} will be rebuilt when compiling all the sources of
-@cite{Build} only if @code{proc.ads}, @code{pack.ads} or @code{pack.adb}
-include a @cite{"with Log1"}.
-
-To ensure that all the sources in the @cite{Logging} library are
-up to date, and that all the sources of @cite{Build} are also up to date,
-the following two commands need to be used:
-
-@example
-gprbuild -Plogging.gpr
-gprbuild -Pbuild.gpr
-@end example
-
-All @code{ALI} files will also be copied from the object directory to the
-library directory. To build executables, @emph{gprbuild} will use the
-library rather than the individual object files.
-
-Library projects can also be useful to describe a library that needs to be used
-but, for some reason, cannot be rebuilt. For instance, it is the case when some
-of the library sources are not available. Such library projects need to use the
-@cite{Externally_Built} attribute as in the example below:
-
-@example
-library project Extern_Lib is
-   for Languages    use ("Ada", "C");
-   for Source_Dirs  use ("lib_src");
-   for Library_Dir  use "lib2";
-   for Library_Kind use "dynamic";
-   for Library_Name use "l2";
-   for Externally_Built use "true";  --  <<<<
-end Extern_Lib;
-@end example
-
-In the case of externally built libraries, the @cite{Object_Dir}
-attribute does not need to be specified because it will never be
-used.
-
-The main effect of using such an externally built library project is mostly to
-affect the linker command in order to reference the desired library. It can
-also be achieved by using @cite{Linker.Linker_Options} or @cite{Linker.Switches}
-in the project corresponding to the subsystem needing this external library.
-This latter method is more straightforward in simple cases but when several
-subsystems depend upon the same external library, finding the proper place
-for the @cite{Linker.Linker_Options} might not be easy and if it is
-not placed properly, the final link command is likely to present ordering issues.
-In such a situation, it is better to use the externally built library project
-so that all other subsystems depending on it can declare this dependency thanks
-to a project @emph{with} clause, which in turn will trigger the builder to find
-the proper order of libraries in the final link command.
-
-@node Stand-alone Library Projects,Installing a library with project files,Using Library Projects,Library Projects
-@anchor{gnat_ugn/gnat_project_manager id23}@anchor{17f}@anchor{gnat_ugn/gnat_project_manager stand-alone-library-projects}@anchor{97}
-@subsection Stand-alone Library Projects
-
-
-@geindex standalone libraries (usage with GNAT Project Manager)
-
-A @strong{stand-alone library} is a library that contains the necessary code to
-elaborate the Ada units that are included in the library. A stand-alone
-library is a convenient way to add an Ada subsystem to a more global system
-whose main is not in Ada since it makes the elaboration of the Ada part mostly
-transparent. However, stand-alone libraries are also useful when the main is in
-Ada: they provide a means for minimizing relinking & redeployment of complex
-systems when localized changes are made.
-
-The name of a stand-alone library, specified with attribute
-@cite{Library_Name}, must have the syntax of an Ada identifier.
-
-The most prominent characteristic of a stand-alone library is that it offers a
-distinction between interface units and implementation units. Only the former
-are visible to units outside the library. A stand-alone library project is thus
-characterised by a third attribute, usually @strong{Library_Interface}, in addition
-to the two attributes that make a project a Library Project
-(@cite{Library_Name} and @cite{Library_Dir}). This third attribute may also be
-@strong{Interfaces}. @strong{Library_Interface} only works when the interface is in Ada
-and takes a list of units as parameter. @strong{Interfaces} works for any supported
-language and takes a list of sources as parameter.
-
-@geindex Library_Interface (GNAT Project Manager)
-
-@strong{Library_Interface}:
-
-@quotation
-
-This attribute defines an explicit subset of the units of the project. Units
-from projects importing this library project may only "with" units whose
-sources are listed in the @cite{Library_Interface}. Other sources are
-considered implementation units.
-
-@example
-for Library_Dir use "lib";
-for Library_Name use "logging";
-for Library_Interface use ("lib1", "lib2");  --  unit names
-@end example
-@end quotation
-
-@strong{Interfaces}
-
-@quotation
-
-This attribute defines an explicit subset of the source files of a project.
-Sources from projects importing this project, can only depend on sources from
-this subset. This attribute can be used on non library projects. It can also
-be used as a replacement for attribute @cite{Library_Interface}, in which
-case, units have to be replaced by source files. For multi-language library
-projects, it is the only way to make the project a Stand-Alone Library project
-whose interface is not purely Ada.
-@end quotation
-
-@geindex Library_Standalone (GNAT Project Manager)
-
-@strong{Library_Standalone}:
-
-@quotation
-
-This attribute defines the kind of standalone library to
-build. Values are either @cite{standard} (the default), @cite{no} or
-@cite{encapsulated}. When @cite{standard} is used the code to elaborate and
-finalize the library is embedded, when @cite{encapsulated} is used the
-library can furthermore depend only on static libraries (including
-the GNAT runtime). This attribute can be set to @cite{no} to make it clear
-that the library should not be standalone in which case the
-@cite{Library_Interface} should not defined. Note that this attribute
-only applies to shared libraries, so @cite{Library_Kind} must be set
-to @cite{dynamic}.
-
-@example
-for Library_Dir use "lib";
-for Library_Name use "logging";
-for Library_Kind use "dynamic";
-for Library_Interface use ("lib1", "lib2");  --  unit names
-for Library_Standalone use "encapsulated";
-@end example
-@end quotation
-
-In order to include the elaboration code in the stand-alone library, the binder
-is invoked on the closure of the library units creating a package whose name
-depends on the library name (b~logging.ads/b in the example).
-This binder-generated package includes @strong{initialization} and @strong{finalization}
-procedures whose names depend on the library name (@cite{logginginit} and
-@cite{loggingfinal} in the example). The object corresponding to this package is
-included in the library.
-
-@geindex Library_Auto_Init (GNAT Project Manager)
-
-@strong{Library_Auto_Init}:
-
-@quotation
-
-A dynamic stand-alone Library is automatically initialized
-if automatic initialization of Stand-alone Libraries is supported on the
-platform and if attribute @strong{Library_Auto_Init} is not specified or
-is specified with the value "true". A static Stand-alone Library is never
-automatically initialized. Specifying "false" for this attribute
-prevents automatic initialization.
-
-When a non-automatically initialized stand-alone library is used in an
-executable, its initialization procedure must be called before any service of
-the library is used. When the main subprogram is in Ada, it may mean that the
-initialization procedure has to be called during elaboration of another
-package.
-@end quotation
-
-@geindex Library_Dir (GNAT Project Manager)
-
-@strong{Library_Dir}:
-
-@quotation
-
-For a stand-alone library, only the @code{ALI} files of the interface units
-(those that are listed in attribute @cite{Library_Interface}) are copied to
-the library directory. As a consequence, only the interface units may be
-imported from Ada units outside of the library. If other units are imported,
-the binding phase will fail.
-@end quotation
-
-@strong{Binder.Default_Switches}:
-
-@quotation
-
-When a stand-alone library is bound, the switches that are specified in
-the attribute @strong{Binder.Default_Switches ("Ada")} are
-used in the call to @emph{gnatbind}.
-@end quotation
-
-@geindex Library_Src_Dir (GNAT Project Manager)
-
-@strong{Library_Src_Dir}:
-
-@quotation
-
-This attribute defines the location (absolute or relative to the project
-directory) where the sources of the interface units are copied at
-installation time.
-These sources includes the specs of the interface units along with the
-closure of sources necessary to compile them successfully. That may include
-bodies and subunits, when pragmas @cite{Inline} are used, or when there are
-generic units in specs. This directory cannot point to the object directory
-or one of the source directories, but it can point to the library directory,
-which is the default value for this attribute.
-@end quotation
-
-@geindex Library_Symbol_Policy (GNAT Project Manager)
-
-@strong{Library_Symbol_Policy}:
-
-@quotation
-
-This attribute controls the export of symbols and, on some platforms (like
-VMS) that have the notions of major and minor IDs built in the library
-files, it controls the setting of these IDs. It is not supported on all
-platforms (where it will just have no effect). It may have one of the
-following values:
-
-
-@itemize *
-
-@item 
-@cite{"autonomous"} or @cite{"default"}: exported symbols are not controlled
-
-@item 
-@cite{"compliant"}: if attribute @strong{Library_Reference_Symbol_File}
-is not defined, then it is equivalent to policy "autonomous". If there
-are exported symbols in the reference symbol file that are not in the
-object files of the interfaces, the major ID of the library is increased.
-If there are symbols in the object files of the interfaces that are not
-in the reference symbol file, these symbols are put at the end of the list
-in the newly created symbol file and the minor ID is increased.
-
-@item 
-@cite{"controlled"}: the attribute @strong{Library_Reference_Symbol_File} must be
-defined. The library will fail to build if the exported symbols in the
-object files of the interfaces do not match exactly the symbol in the
-symbol file.
-
-@item 
-@cite{"restricted"}: The attribute @strong{Library_Symbol_File} must be defined.
-The library will fail to build if there are symbols in the symbol file that
-are not in the exported symbols of the object files of the interfaces.
-Additional symbols in the object files are not added to the symbol file.
-
-@item 
-@cite{"direct"}: The attribute @strong{Library_Symbol_File} must be defined and
-must designate an existing file in the object directory. This symbol file
-is passed directly to the underlying linker without any symbol processing.
-@end itemize
-@end quotation
-
-@geindex Library_Reference_Symbol_File (GNAT Project Manager)
-
-@strong{Library_Reference_Symbol_File}
-
-@quotation
-
-This attribute may define the path name of a reference symbol file that is
-read when the symbol policy is either "compliant" or "controlled", on
-platforms that support symbol control, such as VMS, when building a
-stand-alone library. The path may be an absolute path or a path relative
-to the project directory.
-@end quotation
-
-@geindex Library_Symbol_File (GNAT Project Manager)
-
-@strong{Library_Symbol_File}
-
-@quotation
-
-This attribute may define the name of the symbol file to be created when
-building a stand-alone library when the symbol policy is either "compliant",
-"controlled" or "restricted", on platforms that support symbol control,
-such as VMS. When symbol policy is "direct", then a file with this name
-must exist in the object directory.
-@end quotation
-
-@node Installing a library with project files,,Stand-alone Library Projects,Library Projects
-@anchor{gnat_ugn/gnat_project_manager installing-a-library-with-project-files}@anchor{8d}@anchor{gnat_ugn/gnat_project_manager id24}@anchor{180}
-@subsection Installing a library with project files
-
-
-When using project files, a usable version of the library is created in the
-directory specified by the @cite{Library_Dir} attribute of the library
-project file. Thus no further action is needed in order to make use of
-the libraries that are built as part of the general application build.
-
-You may want to install a library in a context different from where the library
-is built. This situation arises with third party suppliers, who may want
-to distribute a library in binary form where the user is not expected to be
-able to recompile the library. The simplest option in this case is to provide
-a project file slightly different from the one used to build the library, by
-using the @cite{externally_built} attribute. See @ref{17e,,Using Library Projects}
-
-Another option is to use @emph{gprinstall} to install the library in a
-different context than the build location. @emph{gprinstall} automatically
-generates a project to use this library, and also copies the minimum set of
-sources needed to use the library to the install location.
-@ref{16b,,Installation}
-
-@node Project Extension,Aggregate Projects,Library Projects,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager id25}@anchor{181}@anchor{gnat_ugn/gnat_project_manager project-extension}@anchor{152}
-@section Project Extension
-
-
-During development of a large system, it is sometimes necessary to use
-modified versions of some of the source files, without changing the original
-sources. This can be achieved through the @strong{project extension} facility.
-
-Suppose for instance that our example @cite{Build} project is built every night
-for the whole team, in some shared directory. A developer usually needs to work
-on a small part of the system, and might not want to have a copy of all the
-sources and all the object files (mostly because that would require too much
-disk space, time to recompile everything). He prefers to be able to override
-some of the source files in his directory, while taking advantage of all the
-object files generated at night.
-
-Another example can be taken from large software systems, where it is common to have
-multiple implementations of a common interface; in Ada terms, multiple
-versions of a package body for the same spec.  For example, one implementation
-might be safe for use in tasking programs, while another might be used only
-in sequential applications.  This can be modeled in GNAT using the concept
-of @emph{project extension}.  If one project (the 'child') @emph{extends}
-another project (the 'parent') then by default all source files of the
-parent project are inherited by the child, but the child project can
-override any of the parent's source files with new versions, and can also
-add new files or remove unnecessary ones.
-This facility is the project analog of a type extension in
-object-oriented programming.  Project hierarchies are permitted (an extending
-project may itself be extended), and a project that
-extends a project can also import other projects.
-
-A third example is that of using project extensions to provide different
-versions of the same system. For instance, assume that a @cite{Common}
-project is used by two development branches. One of the branches has now
-been frozen, and no further change can be done to it or to @cite{Common}.
-However, the other development branch still needs evolution of @cite{Common}.
-Project extensions provide a flexible solution to create a new version
-of a subsystem while sharing and reusing as much as possible from the original
-one.
-
-A project extension implicitly inherits all the sources and objects from the
-project it extends. It is possible to create a new version of some of the
-sources in one of the additional source directories of the extending
-project. Those new versions hide the original versions. Adding new sources or
-removing existing ones is also possible. Here is an example on how to extend
-the project @cite{Build} from previous examples:
-
-@example
-project Work extends "../bld/build.gpr" is
-end Work;
-@end example
-
-The project after @strong{extends} is the one being extended. As usual, it can be
-specified using an absolute path, or a path relative to any of the directories
-in the project path (see @ref{16f,,Project Dependencies}). This project does not
-specify source or object directories, so the default values for these
-attributes will be used that is to say the current directory (where project
-@cite{Work} is placed). We can compile that project with
-
-@example
-gprbuild -Pwork
-@end example
-
-If no sources have been placed in the current directory, this command
-won't do anything, since this project does not change the
-sources it inherited from @cite{Build}, therefore all the object files
-in @cite{Build} and its dependencies are still valid and are reused
-automatically.
-
-Suppose we now want to supply an alternate version of @code{pack.adb} but use
-the existing versions of @code{pack.ads} and @code{proc.adb}.  We can create
-the new file in Work's current directory (likely by copying the one from the
-@cite{Build} project and making changes to it. If new packages are needed at
-the same time, we simply create new files in the source directory of the
-extending project.
-
-When we recompile, @emph{gprbuild} will now automatically recompile
-this file (thus creating @code{pack.o} in the current directory) and
-any file that depends on it (thus creating @code{proc.o}). Finally, the
-executable is also linked locally.
-
-Note that we could have obtained the desired behavior using project import
-rather than project inheritance. A @cite{base} project would contain the
-sources for @code{pack.ads} and @code{proc.adb}, and @cite{Work} would
-import @cite{base} and add @code{pack.adb}. In this scenario,  @cite{base}
-cannot contain the original version of @code{pack.adb} otherwise there would be
-2 versions of the same unit in the closure of the project and this is not
-allowed. Generally speaking, it is not recommended to put the spec and the
-body of a unit in different projects since this affects their autonomy and
-reusability.
-
-In a project file that extends another project, it is possible to
-indicate that an inherited source is @strong{not part} of the sources of the
-extending project. This is necessary sometimes when a package spec has
-been overridden and no longer requires a body: in this case, it is
-necessary to indicate that the inherited body is not part of the sources
-of the project, otherwise there will be a compilation error
-when compiling the spec.
-
-@geindex Excluded_Source_Files (GNAT Project Manager)
-
-@geindex Excluded_Source_List_File (GNAT Project Manager)
-
-For that purpose, the attribute @strong{Excluded_Source_Files} is used.
-Its value is a list of file names.
-It is also possible to use attribute @cite{Excluded_Source_List_File}.
-Its value is the path of a text file containing one file name per
-line.
-
-@example
-project Work extends "../bld/build.gpr" is
-   for Source_Files use ("pack.ads");
-   --  New spec of Pkg does not need a completion
-   for Excluded_Source_Files use ("pack.adb");
-end Work;
-@end example
-
-All packages that are not declared in the extending project are inherited from
-the project being extended, with their attributes, with the exception of
-@cite{Linker'Linker_Options} which is never inherited. In particular, an
-extending project retains all the switches specified in the project being
-extended.
-
-At the project level, if they are not declared in the extending project, some
-attributes are inherited from the project being extended. They are:
-@cite{Languages}, @cite{Main} (for a root non library project) and
-@cite{Library_Name} (for a project extending a library project).
-
-@menu
-* Project Hierarchy Extension:: 
-
-@end menu
-
-@node Project Hierarchy Extension,,,Project Extension
-@anchor{gnat_ugn/gnat_project_manager project-hierarchy-extension}@anchor{182}@anchor{gnat_ugn/gnat_project_manager id26}@anchor{183}
-@subsection Project Hierarchy Extension
-
-
-One of the fundamental restrictions in project extension is the following:
-@strong{A project is not allowed to import directly or indirectly at the same time an extending project and one of its ancestors}.
-
-For example, consider the following hierarchy of projects.
-
-@example
-a.gpr  contains package A1
-b.gpr, imports a.gpr and contains B1, which depends on A1
-c.gpr, imports b.gpr and contains C1, which depends on B1
-@end example
-
-If we want to locally extend the packages @cite{A1} and @cite{C1}, we need to
-create several extending projects:
-
-@example
-a_ext.gpr which extends a.gpr, and overrides A1
-b_ext.gpr which extends b.gpr and imports a_ext.gpr
-c_ext.gpr which extends c.gpr, imports b_ext.gpr and overrides C1
-@end example
-
-@example
-project A_Ext extends "a.gpr" is
-   for Source_Files use ("a1.adb", "a1.ads");
-end A_Ext;
-
-with "a_ext.gpr";
-project B_Ext extends "b.gpr" is
-end B_Ext;
-
-with "b_ext.gpr";
-project C_Ext extends "c.gpr" is
-   for Source_Files use ("c1.adb");
-end C_Ext;
-@end example
-
-The extension @code{b_ext.gpr} is required, even though we are not overriding
-any of the sources of @code{b.gpr} because otherwise @code{c_expr.gpr} would
-import @code{b.gpr} which itself knows nothing about @code{a_ext.gpr}.
-
-@geindex extends all (GNAT Project Manager)
-
-When extending a large system spanning multiple projects, it is often
-inconvenient to extend every project in the hierarchy that is impacted by a
-small change introduced in a low layer. In such cases, it is possible to create
-an @strong{implicit extension} of an entire hierarchy using @strong{extends all}
-relationship.
-
-When the project is extended using @cite{extends all} inheritance, all projects
-that are imported by it, both directly and indirectly, are considered virtually
-extended. That is, the project manager creates implicit projects
-that extend every project in the hierarchy; all these implicit projects do not
-control sources on their own and use the object directory of
-the "extending all" project.
-
-It is possible to explicitly extend one or more projects in the hierarchy
-in order to modify the sources. These extending projects must be imported by
-the "extending all" project, which will replace the corresponding virtual
-projects with the explicit ones.
-
-When building such a project hierarchy extension, the project manager will
-ensure that both modified sources and sources in implicit extending projects
-that depend on them are recompiled.
-
-Thus, in our example we could create the following projects instead:
-
-@example
-a_ext.gpr, extends a.gpr and overrides A1
-c_ext.gpr, "extends all" c.gpr, imports a_ext.gpr and overrides C1
-@end example
-
-@example
-project A_Ext extends "a.gpr" is
-   for Source_Files use ("a1.adb", "a1.ads");
-end A_Ext;
-
-with "a_ext.gpr";
-project C_Ext extends all "c.gpr" is
-  for Source_Files use ("c1.adb");
-end C_Ext;
-@end example
-
-When building project @code{c_ext.gpr}, the entire modified project space is
-considered for recompilation, including the sources of @code{b.gpr} that are
-impacted by the changes in @cite{A1} and @cite{C1}.
-
-@node Aggregate Projects,Aggregate Library Projects,Project Extension,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager aggregate-projects}@anchor{171}@anchor{gnat_ugn/gnat_project_manager id27}@anchor{184}
-@section Aggregate Projects
-
-
-Aggregate projects are an extension of the project paradigm, and are
-meant to solve a few specific use cases that cannot be solved directly
-using standard projects. This section will go over a few of these use
-cases to try to explain what you can use aggregate projects for.
-
-@menu
-* Building all main programs from a single project tree:: 
-* Building a set of projects with a single command:: 
-* Define a build environment:: 
-* Performance improvements in builder:: 
-* Syntax of aggregate projects:: 
-* package Builder in aggregate projects:: 
-
-@end menu
-
-@node Building all main programs from a single project tree,Building a set of projects with a single command,,Aggregate Projects
-@anchor{gnat_ugn/gnat_project_manager id28}@anchor{185}@anchor{gnat_ugn/gnat_project_manager building-all-main-programs-from-a-single-project-tree}@anchor{186}
-@subsection Building all main programs from a single project tree
-
-
-Most often, an application is organized into modules and submodules,
-which are very conveniently represented as a project tree or graph
-(the root project A @emph{with}s the projects for each modules (say B and C),
-which in turn @emph{with} projects for submodules.
-
-Very often, modules will build their own executables (for testing
-purposes for instance), or libraries (for easier reuse in various
-contexts).
-
-However, if you build your project through @emph{gprbuild}, using a syntax similar to
-
-@example
-gprbuild -PA.gpr
-@end example
-
-this will only rebuild the main programs of project A, not those of the
-imported projects B and C. Therefore you have to spawn several
-@emph{gprbuild} commands, one per project, to build all executables.
-This is a little inconvenient, but more importantly is inefficient
-because @emph{gprbuild} needs to do duplicate work to ensure that sources are
-up-to-date, and cannot easily compile things in parallel when using
-the -j switch.
-
-Also libraries are always rebuilt when building a project.
-
-You could therefore define an aggregate project Agg that groups A, B
-and C. Then, when you build with
-
-@example
-gprbuild -PAgg.gpr
-@end example
-
-this will build all mains from A, B and C.
-
-@example
-aggregate project Agg is
-   for Project_Files use ("a.gpr", "b.gpr", "c.gpr");
-end Agg;
-@end example
-
-If B or C do not define any main program (through their Main
-attribute), all their sources are built. When you do not group them
-in the aggregate project, only those sources that are needed by A
-will be built.
-
-If you add a main to a project P not already explicitly referenced in the
-aggregate project, you will need to add "p.gpr" in the list of project
-files for the aggregate project, or the main will not be built when
-building the aggregate project.
-
-@node Building a set of projects with a single command,Define a build environment,Building all main programs from a single project tree,Aggregate Projects
-@anchor{gnat_ugn/gnat_project_manager building-a-set-of-projects-with-a-single-command}@anchor{187}@anchor{gnat_ugn/gnat_project_manager id29}@anchor{188}
-@subsection Building a set of projects with a single command
-
-
-One other case is when you have multiple applications and libraries
-that are built independently from each other (but can be built in
-parallel). For instance, you have a project tree rooted at A, and
-another one (which might share some subprojects) rooted at B.
-
-Using only @emph{gprbuild}, you could do
-
-@example
-gprbuild -PA.gpr
-gprbuild -PB.gpr
-@end example
-
-to build both. But again, @emph{gprbuild} has to do some duplicate work for
-those files that are shared between the two, and cannot truly build
-things in parallel efficiently.
-
-If the two projects are really independent, share no sources other
-than through a common subproject, and have no source files with a
-common basename, you could create a project C that imports A and
-B. But these restrictions are often too strong, and one has to build
-them independently. An aggregate project does not have these
-limitations and can aggregate two project trees that have common
-sources.
-
-This scenario is particularly useful in environments like VxWorks 653
-where the applications running in the multiple partitions can be built
-in parallel through a single @emph{gprbuild} command. This also works nicely
-with Annex E.
-
-@node Define a build environment,Performance improvements in builder,Building a set of projects with a single command,Aggregate Projects
-@anchor{gnat_ugn/gnat_project_manager id30}@anchor{189}@anchor{gnat_ugn/gnat_project_manager define-a-build-environment}@anchor{18a}
-@subsection Define a build environment
-
-
-The environment variables at the time you launch @emph{gprbuild}
-will influence the view these tools have of the project
-(PATH to find the compiler, ADA_PROJECT_PATH or GPR_PROJECT_PATH to find the
-projects, environment variables that are referenced in project files
-through the "external" built-in function, ...). Several command line switches
-can be used to override those (-X or -aP), but on some systems and
-with some projects, this might make the command line too long, and on
-all systems often make it hard to read.
-
-An aggregate project can be used to set the environment for all
-projects built through that aggregate. One of the nice aspects is that
-you can put the aggregate project under configuration management, and
-make sure all your user have a consistent environment when
-building. The syntax looks like
-
-@example
-aggregate project Agg is
-   for Project_Files use ("A.gpr", "B.gpr");
-   for Project_Path use ("../dir1", "../dir1/dir2");
-   for External ("BUILD") use "PRODUCTION";
-
-   package Builder is
-      for Global_Compilation_Switches ("Ada") use ("-g");
-   end Builder;
-end Agg;
-@end example
-
-One of the often requested features in projects is to be able to
-reference external variables in @emph{with} declarations, as in
-
-@example
-with external("SETUP") & "path/prj.gpr";   --  ILLEGAL
-project MyProject is
-   ...
-end MyProject;
-@end example
-
-For various reasons, this is not allowed. But using aggregate projects provide
-an elegant solution. For instance, you could use a project file like:
-
-@example
-aggregate project Agg is
-    for Project_Path use (external("SETUP") & "path");
-    for Project_Files use ("myproject.gpr");
-end Agg;
-
-with "prj.gpr";  --  searched on Agg'Project_Path
-project MyProject is
-   ...
-end MyProject;
-@end example
-
-@node Performance improvements in builder,Syntax of aggregate projects,Define a build environment,Aggregate Projects
-@anchor{gnat_ugn/gnat_project_manager performance-improvements-in-builder}@anchor{18b}@anchor{gnat_ugn/gnat_project_manager id31}@anchor{18c}
-@subsection Performance improvements in builder
-
-
-The loading of aggregate projects is optimized in @emph{gprbuild},
-so that all files are searched for only once on the disk
-(thus reducing the number of system calls and contributing to faster
-compilation times, especially on systems with sources on remote
-servers). As part of the loading, @emph{gprbuild}
-computes how and where a source file should be compiled, and even if it is
-found several times in the aggregated projects it will be compiled only
-once.
-
-Since there is no ambiguity as to which switches should be used, files
-can be compiled in parallel (through the usual -j switch) and this can
-be done while maximizing the use of CPUs (compared to launching
-multiple @emph{gprbuild} commands in parallel).
-
-@node Syntax of aggregate projects,package Builder in aggregate projects,Performance improvements in builder,Aggregate Projects
-@anchor{gnat_ugn/gnat_project_manager id32}@anchor{18d}@anchor{gnat_ugn/gnat_project_manager syntax-of-aggregate-projects}@anchor{18e}
-@subsection Syntax of aggregate projects
-
-
-An aggregate project follows the general syntax of project files. The
-recommended extension is still @code{.gpr}. However, a special
-@cite{aggregate} qualifier must be put before the keyword
-@cite{project}.
-
-An aggregate project cannot @emph{with} any other project (standard or
-aggregate), except an abstract project which can be used to share attribute
-values. Also, aggregate projects cannot be extended or imported though a
-@emph{with} clause by any other project. Building other aggregate projects from
-an aggregate project is done through the Project_Files attribute (see below).
-
-An aggregate project does not have any source files directly (only
-through other standard projects). Therefore a number of the standard
-attributes and packages are forbidden in an aggregate project. Here is the
-(non exhaustive) list:
-
-
-@itemize *
-
-@item 
-Languages
-
-@item 
-Source_Files, Source_List_File and other attributes dealing with
-list of sources.
-
-@item 
-Source_Dirs, Exec_Dir and Object_Dir
-
-@item 
-Library_Dir, Library_Name and other library-related attributes
-
-@item 
-Main
-
-@item 
-Roots
-
-@item 
-Externally_Built
-
-@item 
-Inherit_Source_Path
-
-@item 
-Excluded_Source_Dirs
-
-@item 
-Locally_Removed_Files
-
-@item 
-Excluded_Source_Files
-
-@item 
-Excluded_Source_List_File
-
-@item 
-Interfaces
-@end itemize
-
-The only package that is authorized (albeit optional) is
-Builder. Other packages (in particular Compiler, Binder and Linker)
-are forbidden.
-
-The following three attributes can be used only in an aggregate project:
-
-@geindex Project_Files (GNAT Project Manager)
-
-@strong{Project_Files}:
-
-@quotation
-
-This attribute is compulsory (or else we are not aggregating any project,
-and thus not doing anything). It specifies a list of @code{.gpr} files
-that are grouped in the aggregate. The list may be empty. The project
-files can be either other aggregate projects, or standard projects. When
-grouping standard projects, you can have both the root of a project tree
-(and you do not need to specify all its imported projects), and any project
-within the tree.
-
-Basically, the idea is to specify all those projects that have
-main programs you want to build and link, or libraries you want to
-build. You can even specify projects that do not use the Main
-attribute nor the @cite{Library_*} attributes, and the result will be to
-build all their source files (not just the ones needed by other
-projects).
-
-The file can include paths (absolute or relative). Paths are relative to
-the location of the aggregate project file itself (if you use a base name,
-we expect to find the .gpr file in the same directory as the aggregate
-project file). The environment variables @cite{ADA_PROJECT_PATH},
-@cite{GPR_PROJECT_PATH} and @cite{GPR_PROJECT_PATH_FILE} are not used to find
-the project files. The extension @code{.gpr} is mandatory, since this attribute
-contains file names, not project names.
-
-Paths can also include the @cite{"*"} and @cite{"**"} globbing patterns. The
-latter indicates that any subdirectory (recursively) will be
-searched for matching files. The latter (@cite{"**"}) can only occur at the
-last position in the directory part (ie @cite{"a/**/*.gpr"} is supported, but
-not @cite{"**/a/*.gpr"}). Starting the pattern with @cite{"**"} is equivalent
-to starting with @cite{"./**"}.
-
-For now, the pattern @cite{"*"} is only allowed in the filename part, not
-in the directory part. This is mostly for efficiency reasons to limit the
-number of system calls that are needed.
-
-Here are a few valid examples:
-
-@example
-for Project_Files use ("a.gpr", "subdir/b.gpr");
---  two specific projects relative to the directory of agg.gpr
-
-for Project_Files use ("/.gpr");
---  all projects recursively
-@end example
-@end quotation
-
-@geindex Project_Path (GNAT Project Manager)
-
-@strong{Project_Path}:
-
-@quotation
-
-This attribute can be used to specify a list of directories in
-which to look for project files in @emph{with} declarations.
-
-When you specify a project in Project_Files (say @cite{x/y/a.gpr}), and
-@cite{a.gpr} imports a project @cite{b.gpr}, only @cite{b.gpr} is searched in
-the project path. @cite{a.gpr} must be exactly at
-@cite{<dir of the aggregate>/x/y/a.gpr}.
-
-This attribute, however, does not affect the search for the aggregated
-project files specified with @cite{Project_Files}.
-
-Each aggregate project has its own @cite{Project_Path} (that is if
-@cite{agg1.gpr} includes @cite{agg2.gpr}, they can potentially both have a
-different @cite{Project_Path}).
-
-This project path is defined as the concatenation, in that order, of:
-
-
-@itemize *
-
-@item 
-the current directory;
-
-@item 
-followed by the command line -aP switches;
-
-@item 
-then the directories from the GPR_PROJECT_PATH and ADA_PROJECT_PATH environment
-variables;
-
-@item 
-then the directories from the Project_Path attribute;
-
-@item 
-and finally the predefined directories.
-@end itemize
-
-In the example above, agg2.gpr's project path is not influenced by
-the attribute agg1'Project_Path, nor is agg1 influenced by
-agg2'Project_Path.
-
-This can potentially lead to errors. Consider the following example:
-
-@example
---
---  +---------------+                  +----------------+
---  | Agg1.gpr      |-=--includes--=-->| Agg2.gpr       |
---  |  'project_path|                  |  'project_path |
---  |               |                  |                |
---  +---------------+                  +----------------+
---        :                                   :
---        includes                        includes
---        :                                   :
---        v                                   v
---    +-------+                          +---------+
---    | P.gpr |<---------- withs --------|  Q.gpr  |
---    +-------+---------\                +---------+
---        |             |
---        withs         |
---        |             |
---        v             v
---    +-------+      +---------+
---    | R.gpr |      | R'.gpr  |
---    +-------+      +---------+
-@end example
-
-When looking for p.gpr, both aggregates find the same physical file on
-the disk. However, it might happen that with their different project
-paths, both aggregate projects would in fact find a different r.gpr.
-Since we have a common project (p.gpr) "with"ing two different r.gpr,
-this will be reported as an error by the builder.
-
-Directories are relative to the location of the aggregate project file.
-
-Example:
-
-@example
-for Project_Path use ("/usr/local/gpr", "gpr/");
-@end example
-@end quotation
-
-@geindex External (GNAT Project Manager)
-
-@strong{External}:
-
-@quotation
-
-This attribute can be used to set the value of environment
-variables as retrieved through the @cite{external} function
-in projects. It does not affect the environment variables
-themselves (so for instance you cannot use it to change the value
-of your PATH as seen from the spawned compiler).
-
-This attribute affects the external values as seen in the rest of
-the aggregate project, and in the aggregated projects.
-
-The exact value of external a variable comes from one of three
-sources (each level overrides the previous levels):
-
-
-@itemize *
-
-@item 
-An External attribute in aggregate project, for instance
-@cite{for External ("BUILD_MODE") use "DEBUG"};
-
-@item 
-Environment variables.
-These override the value given by the attribute, so that
-users can override the value set in the (presumably shared
-with others team members) aggregate project.
-
-@item 
-The -X command line switch to @emph{gprbuild}.
-This always takes precedence.
-@end itemize
-
-This attribute is only taken into account in the main aggregate
-project (i.e. the one specified on the command line to @emph{gprbuild}),
-and ignored in other aggregate projects. It is invalid
-in standard projects.
-The goal is to have a consistent value in all
-projects that are built through the aggregate, which would not
-be the case in the diamond case: A groups the aggregate
-projects B and C, which both (either directly or indirectly)
-build the project P. If B and C could set different values for
-the environment variables, we would have two different views of
-P, which in particular might impact the list of source files in P.
-@end quotation
-
-@node package Builder in aggregate projects,,Syntax of aggregate projects,Aggregate Projects
-@anchor{gnat_ugn/gnat_project_manager package-builder-in-aggregate-projects}@anchor{18f}@anchor{gnat_ugn/gnat_project_manager id33}@anchor{190}
-@subsection package Builder in aggregate projects
-
-
-As mentioned above, only the package Builder can be specified in
-an aggregate project. In this package, only the following attributes
-are valid:
-
-@geindex Switches (GNAT Project Manager)
-
-@strong{Switches}:
-
-@quotation
-
-This attribute gives the list of switches to use for @emph{gprbuild}.
-Because no mains can be specified for aggregate projects, the only possible
-index for attribute @cite{Switches} is @cite{others}. All other indexes will
-be ignored.
-
-Example:
-
-@example
-for Switches (others) use ("-v", "-k", "-j8");
-@end example
-
-These switches are only read from the main aggregate project (the
-one passed on the command line), and ignored in all other aggregate
-projects or projects.
-
-It can only contain builder switches, not compiler switches.
-@end quotation
-
-@geindex Global_Compilation_Switches (GNAT Project Manager)
-
-@strong{Global_Compilation_Switches}
-
-@quotation
-
-This attribute gives the list of compiler switches for the various
-languages. For instance,
-
-@example
-for Global_Compilation_Switches ("Ada") use ("O1", "-g");
-for Global_Compilation_Switches ("C")   use ("-O2");
-@end example
-
-This attribute is only taken into account in the aggregate project
-specified on the command line, not in other aggregate projects.
-
-In the projects grouped by that aggregate, the attribute
-Builder.Global_Compilation_Switches is also ignored. However, the
-attribute Compiler.Default_Switches will be taken into account (but
-that of the aggregate have higher priority). The attribute
-Compiler.Switches is also taken into account and can be used to
-override the switches for a specific file. As a result, it always
-has priority.
-
-The rules are meant to avoid ambiguities when compiling. For
-instance, aggregate project Agg groups the projects A and B, that
-both depend on C. Here is an extra for all of these projects:
-
-@example
-aggregate project Agg is
-    for Project_Files use ("a.gpr", "b.gpr");
-    package Builder is
-       for Global_Compilation_Switches ("Ada") use ("-O2");
-    end Builder;
-end Agg;
-
-with "c.gpr";
-project A is
-    package Builder is
-       for Global_Compilation_Switches ("Ada") use ("-O1");
-       --  ignored
-    end Builder;
-
-    package Compiler is
-       for Default_Switches ("Ada")
-           use ("-O1", "-g");
-       for Switches ("a_file1.adb")
-           use ("-O0");
-    end Compiler;
-end A;
-
-with "c.gpr";
-project B is
-    package Compiler is
-       for Default_Switches ("Ada") use ("-O0");
-    end Compiler;
-end B;
-
-project C is
-    package Compiler is
-       for Default_Switches ("Ada")
-           use ("-O3",
-                "-gnatn");
-       for Switches ("c_file1.adb")
-           use ("-O0", "-g");
-    end Compiler;
-end C;
-@end example
-
-then the following switches are used:
-
-
-@itemize *
-
-@item 
-all files from project A except a_file1.adb are compiled
-with "-O2 -g", since the aggregate project has priority.
-
-@item 
-the file a_file1.adb is compiled with
-"-O0", since the Compiler.Switches has priority
-
-@item 
-all files from project B are compiled with
-"-O2", since the aggregate project has priority
-
-@item 
-all files from C are compiled with "-O2 -gnatn", except for
-c_file1.adb which is compiled with "-O0 -g"
-@end itemize
-
-Even though C is seen through two paths (through A and through
-B), the switches used by the compiler are unambiguous.
-@end quotation
-
-@geindex Global_Configuration_Pragmas (GNAT Project Manager)
-
-@strong{Global_Configuration_Pragmas}
-
-@quotation
-
-This attribute can be used to specify a file containing
-configuration pragmas, to be passed to the Ada compiler.  Since we
-ignore the package Builder in other aggregate projects and projects,
-only those pragmas defined in the main aggregate project will be
-taken into account.
-
-Projects can locally add to those by using the
-@cite{Compiler.Local_Configuration_Pragmas} attribute if they need.
-@end quotation
-
-@geindex Global_Config_File (GNAT Project Manager)
-
-@strong{Global_Config_File}
-
-@quotation
-
-This attribute, indexed with a language name, can be used to specify a config
-when compiling sources of the language. For Ada, these files are configuration
-pragmas files.
-@end quotation
-
-For projects that are built through the aggregate, the package Builder
-is ignored, except for the Executable attribute which specifies the
-name of the executables resulting from the link of the main programs, and
-for the Executable_Suffix.
-
-@node Aggregate Library Projects,Project File Reference,Aggregate Projects,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager id34}@anchor{191}@anchor{gnat_ugn/gnat_project_manager aggregate-library-projects}@anchor{192}
-@section Aggregate Library Projects
-
-
-Aggregate library projects make it possible to build a single library
-using object files built using other standard or library
-projects. This gives the flexibility to describe an application as
-having multiple modules (a GUI, database access, ...) using different
-project files (so possibly built with different compiler options) and
-yet create a single library (static or relocatable) out of the
-corresponding object files.
-
-@menu
-* Building aggregate library projects:: 
-* Syntax of aggregate library projects:: 
-
-@end menu
-
-@node Building aggregate library projects,Syntax of aggregate library projects,,Aggregate Library Projects
-@anchor{gnat_ugn/gnat_project_manager building-aggregate-library-projects}@anchor{193}@anchor{gnat_ugn/gnat_project_manager id35}@anchor{194}
-@subsection Building aggregate library projects
-
-
-For example, we can define an aggregate project Agg that groups A, B
-and C:
-
-@example
-aggregate library project Agg is
-   for Project_Files use ("a.gpr", "b.gpr", "c.gpr");
-   for Library_Name use ("agg");
-   for Library_Dir use ("lagg");
-end Agg;
-@end example
-
-Then, when you build with:
-
-@example
-gprbuild agg.gpr
-@end example
-
-This will build all units from projects A, B and C and will create a
-static library named @code{libagg.a} in the @code{lagg}
-directory. An aggregate library project has the same set of
-restriction as a standard library project.
-
-Note that a shared aggregate library project cannot aggregate a
-static library project. In platforms where a compiler option is
-required to create relocatable object files, a Builder package in the
-aggregate library project may be used:
-
-@example
-aggregate library project Agg is
-   for Project_Files use ("a.gpr", "b.gpr", "c.gpr");
-   for Library_Name use ("agg");
-   for Library_Dir use ("lagg");
-   for Library_Kind use "relocatable";
-
-   package Builder is
-      for Global_Compilation_Switches ("Ada") use ("-fPIC");
-   end Builder;
-end Agg;
-@end example
-
-With the above aggregate library Builder package, the @cite{-fPIC}
-option will be passed to the compiler when building any source code
-from projects @code{a.gpr}, @code{b.gpr} and @code{c.gpr}.
-
-@node Syntax of aggregate library projects,,Building aggregate library projects,Aggregate Library Projects
-@anchor{gnat_ugn/gnat_project_manager syntax-of-aggregate-library-projects}@anchor{195}@anchor{gnat_ugn/gnat_project_manager id36}@anchor{196}
-@subsection Syntax of aggregate library projects
-
-
-An aggregate library project follows the general syntax of project
-files. The recommended extension is still @code{.gpr}. However, a special
-@cite{aggregate library} qualifier must be put before the keyword
-@cite{project}.
-
-An aggregate library project cannot @emph{with} any other project
-(standard or aggregate), except an abstract project which can be used
-to share attribute values.
-
-An aggregate library project does not have any source files directly (only
-through other standard projects). Therefore a number of the standard
-attributes and packages are forbidden in an aggregate library
-project. Here is the (non exhaustive) list:
-
-
-@itemize *
-
-@item 
-Languages
-
-@item 
-Source_Files, Source_List_File and other attributes dealing with
-list of sources.
-
-@item 
-Source_Dirs, Exec_Dir and Object_Dir
-
-@item 
-Main
-
-@item 
-Roots
-
-@item 
-Externally_Built
-
-@item 
-Inherit_Source_Path
-
-@item 
-Excluded_Source_Dirs
-
-@item 
-Locally_Removed_Files
-
-@item 
-Excluded_Source_Files
-
-@item 
-Excluded_Source_List_File
-
-@item 
-Interfaces
-@end itemize
-
-The only package that is authorized (albeit optional) is Builder.
-
-The Project_Files attribute (See @ref{171,,Aggregate Projects}) is used to
-described the aggregated projects whose object files have to be
-included into the aggregate library. The environment variables
-@cite{ADA_PROJECT_PATH}, @cite{GPR_PROJECT_PATH} and
-@cite{GPR_PROJECT_PATH_FILE} are not used to find the project files.
-
-@node Project File Reference,,Aggregate Library Projects,GNAT Project Manager
-@anchor{gnat_ugn/gnat_project_manager id37}@anchor{197}@anchor{gnat_ugn/gnat_project_manager project-file-reference}@anchor{150}
-@section Project File Reference
-
-
-This section describes the syntactic structure of project files, the various
-constructs that can be used. Finally, it ends with a summary of all available
-attributes.
-
-@menu
-* Project Declaration:: 
-* Qualified Projects:: 
-* Declarations:: 
-* Packages:: 
-* Expressions:: 
-* External Values:: 
-* Typed String Declaration:: 
-* Variables:: 
-* Case Constructions:: 
-* Attributes:: 
-
-@end menu
-
-@node Project Declaration,Qualified Projects,,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager id38}@anchor{198}@anchor{gnat_ugn/gnat_project_manager project-declaration}@anchor{199}
-@subsection Project Declaration
-
-
-Project files have an Ada-like syntax. The minimal project file is:
-
-@example
-project Empty is
-end Empty;
-@end example
-
-The identifier @cite{Empty} is the name of the project.
-This project name must be present after the reserved
-word @cite{end} at the end of the project file, followed by a semi-colon.
-
-@strong{Identifiers} (i.e., the user-defined names such as project or variable names)
-have the same syntax as Ada identifiers: they must start with a letter,
-and be followed by zero or more letters, digits or underscore characters;
-it is also illegal to have two underscores next to each other. Identifiers
-are always case-insensitive ("Name" is the same as "name").
-
-@example
-simple_name ::= identifier
-name        ::= simple_name @{ . simple_name @}
-@end example
-
-@strong{Strings} are used for values of attributes or as indexes for these
-attributes. They are in general case sensitive, except when noted
-otherwise (in particular, strings representing file names will be case
-insensitive on some systems, so that "file.adb" and "File.adb" both
-represent the same file).
-
-@strong{Reserved words} are the same as for standard Ada 95, and cannot
-be used for identifiers. In particular, the following words are currently
-used in project files, but others could be added later on. In bold are the
-extra reserved words in project files:
-@code{all}, @code{at}, @code{case}, @code{end}, @code{for}, @code{is}, @code{limited},
-@code{null}, @code{others}, @code{package}, @code{renames}, @code{type}, @code{use}, @code{when},
-@code{with}, @strong{extends}, @strong{external}, @strong{project}.
-
-@strong{Comments} in project files have the same syntax as in Ada, two consecutive
-hyphens through the end of the line.
-
-A project may be an @strong{independent project}, entirely defined by a single
-project file. Any source file in an independent project depends only
-on the predefined library and other source files in the same project.
-But a project may also depend on other projects, either by importing them
-through @strong{with clauses}, or by @strong{extending} at most one other project. Both
-types of dependency can be used in the same project.
-
-A path name denotes a project file. It can be absolute or relative.
-An absolute path name includes a sequence of directories, in the syntax of
-the host operating system, that identifies uniquely the project file in the
-file system. A relative path name identifies the project file, relative
-to the directory that contains the current project, or relative to a
-directory listed in the environment variables ADA_PROJECT_PATH and
-GPR_PROJECT_PATH. Path names are case sensitive if file names in the host
-operating system are case sensitive. As a special case, the directory
-separator can always be "/" even on Windows systems, so that project files
-can be made portable across architectures.
-The syntax of the environment variables ADA_PROJECT_PATH and
-GPR_PROJECT_PATH is a list of directory names separated by colons on UNIX and
-semicolons on Windows.
-
-A given project name can appear only once in a context clause.
-
-It is illegal for a project imported by a context clause to refer, directly
-or indirectly, to the project in which this context clause appears (the
-dependency graph cannot contain cycles), except when one of the with clauses
-in the cycle is a @strong{limited with}.
-
-@example
-with "other_project.gpr";
-project My_Project extends "extended.gpr" is
-end My_Project;
-@end example
-
-These dependencies form a @strong{directed graph}, potentially cyclic when using
-@strong{limited with}. The subgraph reflecting the @strong{extends} relations is a tree.
-
-A project's @strong{immediate sources} are the source files directly defined by
-that project, either implicitly by residing in the project source directories,
-or explicitly through any of the source-related attributes.
-More generally, a project's @strong{sources} are the immediate sources of the
-project together with the immediate sources (unless overridden) of any project
-on which it depends directly or indirectly.
-
-A @strong{project hierarchy} can be created, where projects are children of
-other projects. The name of such a child project must be @cite{Parent.Child},
-where @cite{Parent} is the name of the parent project. In particular, this
-makes all @emph{with} clauses of the parent project automatically visible
-in the child project.
-
-@example
-project        ::= context_clause project_declaration
-
-context_clause ::= @{with_clause@}
-with_clause    ::= *with* path_name @{ , path_name @} ;
-path_name      ::= string_literal
-
-project_declaration ::= simple_project_declaration | project_extension
-simple_project_declaration ::=
-  project <project_>name is
-    @{declarative_item@}
-  end <project_>simple_name;
-@end example
-
-@node Qualified Projects,Declarations,Project Declaration,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager qualified-projects}@anchor{176}@anchor{gnat_ugn/gnat_project_manager id39}@anchor{19a}
-@subsection Qualified Projects
-
-
-Before the reserved @cite{project}, there may be one or two @strong{qualifiers}, that
-is identifiers or reserved words, to qualify the project.
-The current list of qualifiers is:
-
-
-@table @asis
-
-@item @strong{abstract}:
-
-Qualifies a project with no sources.
-Such a   project must either have no declaration of attributes @cite{Source_Dirs},
-@cite{Source_Files}, @cite{Languages} or @cite{Source_List_File}, or one of
-@cite{Source_Dirs}, @cite{Source_Files}, or @cite{Languages} must be declared
-as empty. If it extends another project, the project it extends must also be a
-qualified abstract project.
-
-@item @strong{standard}:
-
-A standard project is a non library project with sources.
-This is the default (implicit) qualifier.
-
-@item @strong{aggregate}:
-
-A project whose sources are aggregated from other project files.
-
-@item @strong{aggregate library}:
-
-A library whose sources are aggregated from other project
-or library project files.
-
-@item @strong{library}:
-
-A library project must declare both attributes
-Library_Name` and @cite{Library_Dir}.
-
-@item @strong{configuration}:
-
-A configuration project cannot be in a project tree.
-It describes compilers and other tools to @emph{gprbuild}.
-@end table
-
-@node Declarations,Packages,Qualified Projects,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager declarations}@anchor{19b}@anchor{gnat_ugn/gnat_project_manager id40}@anchor{19c}
-@subsection Declarations
-
-
-Declarations introduce new entities that denote types, variables, attributes,
-and packages. Some declarations can only appear immediately within a project
-declaration. Others can appear within a project or within a package.
-
-@example
-declarative_item ::= simple_declarative_item
-  | typed_string_declaration
-  | package_declaration
-
-simple_declarative_item ::= variable_declaration
-  | typed_variable_declaration
-  | attribute_declaration
-  | case_construction
-  | empty_declaration
-
-empty_declaration ::= *null* ;
-@end example
-
-An empty declaration is allowed anywhere a declaration is allowed. It has
-no effect.
-
-@node Packages,Expressions,Declarations,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager packages}@anchor{156}@anchor{gnat_ugn/gnat_project_manager id41}@anchor{19d}
-@subsection Packages
-
-
-A project file may contain @strong{packages}, that group attributes (typically
-all the attributes that are used by one of the GNAT tools).
-
-A package with a given name may only appear once in a project file.
-The following packages are currently supported in project files
-(See @ref{155,,Attributes} for the list of attributes that each can contain).
-
-
-@table @asis
-
-@item @emph{Binder}
-
-This package specifies characteristics useful when invoking the binder either
-directly via the @emph{gnat} driver or when using @emph{gprbuild}.
-See @ref{160,,Main Subprograms}.
-
-@item @emph{Builder}
-
-This package specifies the compilation options used when building an
-executable or a library for a project. Most of the options should be
-set in one of @cite{Compiler}, @cite{Binder} or @cite{Linker} packages,
-but there are some general options that should be defined in this
-package. See @ref{160,,Main Subprograms}, and @ref{165,,Executable File Names} in
-particular.
-@end table
-
-
-
-@table @asis
-
-@item @emph{Clean}
-
-This package specifies the options used when cleaning a project or a project
-tree using the tools @emph{gnatclean} or @emph{gprclean}.
-
-@item @emph{Compiler}
-
-This package specifies the compilation options used by the compiler for
-each languages. See @ref{161,,Tools Options in Project Files}.
-
-@item @emph{Cross_Reference}
-
-This package specifies the options used when calling the library tool
-@emph{gnatxref} via the @emph{gnat} driver. Its attributes
-@strong{Default_Switches} and @strong{Switches} have the same semantics as for the
-package @cite{Builder}.
-@end table
-
-
-
-@table @asis
-
-@item @emph{Finder}
-
-This package specifies the options used when calling the search tool
-@emph{gnatfind} via the @emph{gnat} driver. Its attributes
-@strong{Default_Switches} and @strong{Switches} have the same semantics as for the
-package @cite{Builder}.
-
-@item @emph{Gnatls}
-
-This package specifies the options to use when invoking @emph{gnatls}
-via the @emph{gnat} driver.
-@end table
-
-
-
-@table @asis
-
-@item @emph{IDE}
-
-This package specifies the options used when starting an integrated
-development environment, for instance @emph{GPS} or @emph{Gnatbench}.
-
-@item @emph{Install}
-
-This package specifies the options used when installing a project
-with @emph{gprinstall}. See @ref{16b,,Installation}.
-
-@item @emph{Linker}
-
-This package specifies the options used by the linker.
-See @ref{160,,Main Subprograms}.
-@end table
-
-
-
-@table @asis
-
-@item @emph{Naming}
-
-@quotation
-
-This package specifies the naming conventions that apply
-to the source files in a project. In particular, these conventions are
-used to automatically find all source files in the source directories,
-or given a file name to find out its language for proper processing.
-See @ref{14e,,Naming Schemes}.
-@end quotation
-
-
-@item @emph{Remote}
-
-This package is used by @emph{gprbuild} to describe how distributed
-compilation should be done.
-
-@item @emph{Stack}
-
-This package specifies the options used when calling the tool
-@emph{gnatstack} via the @emph{gnat} driver. Its attributes
-@strong{Default_Switches} and @strong{Switches} have the same semantics as for the
-package @cite{Builder}.
-
-@item @emph{Synchronize}
-
-This package specifies the options used when calling the tool
-@emph{gnatsync} via the @emph{gnat} driver.
-@end table
-
-In its simplest form, a package may be empty:
-
-@example
-project Simple is
-  package Builder is
-  end Builder;
-end Simple;
-@end example
-
-A package may contain @strong{attribute declarations},
-@strong{variable declarations} and @strong{case constructions}, as will be
-described below.
-
-When there is ambiguity between a project name and a package name,
-the name always designates the project. To avoid possible confusion, it is
-always a good idea to avoid naming a project with one of the
-names allowed for packages or any name that starts with @cite{gnat}.
-
-A package can also be defined by a @strong{renaming declaration}. The new package
-renames a package declared in a different project file, and has the same
-attributes as the package it renames. The name of the renamed package
-must be the same as the name of the renaming package. The project must
-contain a package declaration with this name, and the project
-must appear in the context clause of the current project, or be its parent
-project. It is not possible to add or override attributes to the renaming
-project. If you need to do so, you should use an @strong{extending declaration}
-(see below).
-
-Packages that are renamed in other project files often come from project files
-that have no sources: they are just used as templates. Any modification in the
-template will be reflected automatically in all the project files that rename
-a package from the template. This is a very common way to share settings
-between projects.
-
-Finally, a package can also be defined by an @strong{extending declaration}. This is
-similar to a @strong{renaming declaration}, except that it is possible to add or
-override attributes.
-
-@example
-package_declaration ::= package_spec | package_renaming | package_extension
-package_spec ::=
-  package <package_>simple_name is
-    @{simple_declarative_item@}
-  end package_identifier ;
-package_renaming ::==
-  package <package_>simple_name renames <project_>simple_name.package_identifier ;
-package_extension ::==
-  package <package_>simple_name extends <project_>simple_name.package_identifier is
-    @{simple_declarative_item@}
-  end package_identifier ;
-@end example
-
-@node Expressions,External Values,Packages,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager expressions}@anchor{19e}@anchor{gnat_ugn/gnat_project_manager id42}@anchor{19f}
-@subsection Expressions
-
-
-An expression is any value that can be assigned to an attribute or a
-variable. It is either a literal value, or a construct requiring runtime
-computation by the project manager. In a project file, the computed value of
-an expression is either a string or a list of strings.
-
-A string value is one of:
-
-
-@itemize *
-
-@item 
-A literal string, for instance @cite{"comm/my_proj.gpr"}
-
-@item 
-The name of a variable that evaluates to a string (see @ref{158,,Variables})
-
-@item 
-The name of an attribute that evaluates to a string (see @ref{155,,Attributes})
-
-@item 
-An external reference (see @ref{157,,External Values})
-
-@item 
-A concatenation of the above, as in @cite{"prefix_" & Var}.
-@end itemize
-
-A list of strings is one of the following:
-
-
-@itemize *
-
-@item 
-A parenthesized comma-separated list of zero or more string expressions, for
-instance @cite{(File_Name@comma{} "gnat.adc"@comma{} File_Name & ".orig")} or @cite{()}.
-
-@item 
-The name of a variable that evaluates to a list of strings
-
-@item 
-The name of an attribute that evaluates to a list of strings
-
-@item 
-A concatenation of a list of strings and a string (as defined above), for
-instance @cite{("A"@comma{} "B") & "C"}
-
-@item 
-A concatenation of two lists of strings
-@end itemize
-
-The following is the grammar for expressions
-
-@example
-string_literal ::= "@{string_element@}"  --  Same as Ada
-string_expression ::= string_literal
-    | *variable_*name
-    | external_value
-    | attribute_reference
-    | ( string_expression @{ & string_expression @} )
-string_list  ::= ( string_expression @{ , string_expression @} )
-   | *string_variable*_name
-   | *string_*attribute_reference
-term ::= string_expression | string_list
-expression ::= term @{ & term @}     --  Concatenation
-@end example
-
-Concatenation involves strings and list of strings. As soon as a list of
-strings is involved, the result of the concatenation is a list of strings. The
-following Ada declarations show the existing operators:
-
-@example
-function "&" (X : String;      Y : String)      return String;
-function "&" (X : String_List; Y : String)      return String_List;
-function "&" (X : String_List; Y : String_List) return String_List;
-@end example
-
-Here are some specific examples:
-
-@example
-List := () & File_Name; --  One string in this list
-List2 := List & (File_Name & ".orig"); -- Two strings
-Big_List := List & Lists2;  --  Three strings
-Illegal := "gnat.adc" & List2;  --  Illegal, must start with list
-@end example
-
-@node External Values,Typed String Declaration,Expressions,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager external-values}@anchor{157}@anchor{gnat_ugn/gnat_project_manager id43}@anchor{1a0}
-@subsection External Values
-
-
-An external value is an expression whose value is obtained from the command
-that invoked the processing of the current project file (typically a
-@emph{gprbuild} command).
-
-There are two kinds of external values, one that returns a single string, and
-one that returns a string list.
-
-The syntax of a single string external value is:
-
-@example
-external_value ::= *external* ( string_literal [, string_literal] )
-@end example
-
-The first string_literal is the string to be used on the command line or
-in the environment to specify the external value. The second string_literal,
-if present, is the default to use if there is no specification for this
-external value either on the command line or in the environment.
-
-Typically, the external value will either exist in the
-environment variables
-or be specified on the command line through the
-@code{-X@emph{vbl}=@emph{value}} switch. If both
-are specified, then the command line value is used, so that a user can more
-easily override the value.
-
-The function @cite{external} always returns a string. It is an error if the
-value was not found in the environment and no default was specified in the
-call to @cite{external}.
-
-An external reference may be part of a string expression or of a string
-list expression, and can therefore appear in a variable declaration or
-an attribute declaration.
-
-Most of the time, this construct is used to initialize typed variables, which
-are then used in @strong{case} constructions to control the value assigned to
-attributes in various scenarios. Thus such variables are often called
-@strong{scenario variables}.
-
-The syntax for a string list external value is:
-
-@example
-external_value ::= *external_as_list* ( string_literal , string_literal )
-@end example
-
-The first string_literal is the string to be used on the command line or
-in the environment to specify the external value. The second string_literal is
-the separator between each component of the string list.
-
-If the external value does not exist in the environment or on the command line,
-the result is an empty list. This is also the case, if the separator is an
-empty string or if the external value is only one separator.
-
-Any separator at the beginning or at the end of the external value is
-discarded. Then, if there is no separator in the external value, the result is
-a string list with only one string. Otherwise, any string between the beginning
-and the first separator, between two consecutive separators and between the
-last separator and the end are components of the string list.
-
-@example
-*external_as_list* ("SWITCHES", ",")
-@end example
-
-If the external value is "-O2,-g",
-the result is ("-O2", "-g").
-
-If the external value is ",-O2,-g,",
-the result is also ("-O2", "-g").
-
-if the external value is "-gnatv",
-the result is ("-gnatv").
-
-If the external value is ",,", the result is ("").
-
-If the external value is ",", the result is (), the empty string list.
-
-@node Typed String Declaration,Variables,External Values,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager id44}@anchor{1a1}@anchor{gnat_ugn/gnat_project_manager typed-string-declaration}@anchor{1a2}
-@subsection Typed String Declaration
-
-
-A @strong{type declaration} introduces a discrete set of string literals.
-If a string variable is declared to have this type, its value
-is restricted to the given set of literals. These are the only named
-types in project files. A string type may only be declared at the project
-level, not inside a package.
-
-@example
-typed_string_declaration ::=
-  *type* *<typed_string_>*_simple_name *is* ( string_literal @{, string_literal@} );
-@end example
-
-The string literals in the list are case sensitive and must all be different.
-They may include any graphic characters allowed in Ada, including spaces.
-Here is an example of a string type declaration:
-
-@example
-type OS is ("NT", "nt", "Unix", "GNU/Linux", "other OS");
-@end example
-
-Variables of a string type are called @strong{typed variables}; all other
-variables are called @strong{untyped variables}. Typed variables are
-particularly useful in @cite{case} constructions, to support conditional
-attribute declarations. (See @ref{1a3,,Case Constructions}).
-
-A string type may be referenced by its name if it has been declared in the same
-project file, or by an expanded name whose prefix is the name of the project
-in which it is declared.
-
-@node Variables,Case Constructions,Typed String Declaration,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager variables}@anchor{158}@anchor{gnat_ugn/gnat_project_manager id45}@anchor{1a4}
-@subsection Variables
-
-
-@strong{Variables} store values (strings or list of strings) and can appear
-as part of an expression. The declaration of a variable creates the
-variable and assigns the value of the expression to it. The name of the
-variable is available immediately after the assignment symbol, if you
-need to reuse its old value to compute the new value. Before the completion
-of its first declaration, the value of a variable defaults to the empty
-string ("").
-
-A @strong{typed} variable can be used as part of a @strong{case} expression to
-compute the value, but it can only be declared once in the project file,
-so that all case constructions see the same value for the variable. This
-provides more consistency and makes the project easier to understand.
-The syntax for its declaration is identical to the Ada syntax for an
-object declaration. In effect, a typed variable acts as a constant.
-
-An @strong{untyped} variable can be declared and overridden multiple times
-within the same project. It is declared implicitly through an Ada
-assignment. The first declaration establishes the kind of the variable
-(string or list of strings) and successive declarations must respect
-the initial kind. Assignments are executed in the order in which they
-appear, so the new value replaces the old one and any subsequent reference
-to the variable uses the new value.
-
-A variable may be declared at the project file level, or within a package.
-
-@example
-typed_variable_declaration ::=
-  *<typed_variable_>*simple_name : *<typed_string_>*name := string_expression;
-
-variable_declaration ::= *<variable_>*simple_name := expression;
-@end example
-
-Here are some examples of variable declarations:
-
-@example
-This_OS : OS := external ("OS"); --  a typed variable declaration
-That_OS := "GNU/Linux";          --  an untyped variable declaration
-
-Name      := "readme.txt";
-Save_Name := Name & ".saved";
-
-Empty_List := ();
-List_With_One_Element := ("-gnaty");
-List_With_Two_Elements := List_With_One_Element & "-gnatg";
-Long_List := ("main.ada", "pack1_.ada", "pack1.ada", "pack2_.ada");
-@end example
-
-A @strong{variable reference} may take several forms:
-
-
-@itemize *
-
-@item 
-The simple variable name, for a variable in the current package (if any)
-or in the current project
-
-@item 
-An expanded name, whose prefix is a context name.
-@end itemize
-
-A @strong{context} may be one of the following:
-
-
-@itemize *
-
-@item 
-The name of an existing package in the current project
-
-@item 
-The name of an imported project of the current project
-
-@item 
-The name of an ancestor project (i.e., a project extended by the current
-project, either directly or indirectly)
-
-@item 
-An expanded name whose prefix is an imported/parent project name, and
-whose selector is a package name in that project.
-@end itemize
-
-@node Case Constructions,Attributes,Variables,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager id46}@anchor{1a5}@anchor{gnat_ugn/gnat_project_manager case-constructions}@anchor{1a3}
-@subsection Case Constructions
-
-
-A @strong{case} construction is used in a project file to effect conditional
-behavior. Through this construction, you can set the value of attributes
-and variables depending on the value previously assigned to a typed
-variable.
-
-All choices in a choice list must be distinct. Unlike Ada, the choice
-lists of all alternatives do not need to include all values of the type.
-An @cite{others} choice must appear last in the list of alternatives.
-
-The syntax of a @cite{case} construction is based on the Ada case construction
-(although the @cite{null} declaration for empty alternatives is optional).
-
-The case expression must be a string variable, either typed or not, whose value
-is often given by an external reference (see @ref{157,,External Values}).
-
-Each alternative starts with the reserved word @cite{when}, either a list of
-literal strings separated by the @cite{"|"} character or the reserved word
-@cite{others}, and the @cite{"=>"} token.
-When the case expression is a typed string variable, each literal string must
-belong to the string type that is the type of the case variable.
-After each @cite{=>}, there are zero or more declarations.  The only
-declarations allowed in a case construction are other case constructions,
-attribute declarations and variable declarations. String type declarations and
-package declarations are not allowed. Variable declarations are restricted to
-variables that have already been declared before the case construction.
-
-@example
-case_construction ::=
-  *case* *<variable_>*name *is* @{case_item@} *end case* ;
-
-case_item ::=
-  *when* discrete_choice_list =>
-    @{case_declaration
-      | attribute_declaration
-      | variable_declaration
-      | empty_declaration@}
-
-discrete_choice_list ::= string_literal @{| string_literal@} | *others*
-@end example
-
-Here is a typical example, with a typed string variable:
-
-@example
-project MyProj is
-   type OS_Type is ("GNU/Linux", "Unix", "NT", "VMS");
-   OS : OS_Type := external ("OS", "GNU/Linux");
-
-   package Compiler is
-     case OS is
-       when "GNU/Linux" | "Unix" =>
-         for Switches ("Ada")
-             use ("-gnath");
-       when "NT" =>
-         for Switches ("Ada")
-             use ("-gnatP");
-       when others =>
-         null;
-     end case;
-   end Compiler;
-end MyProj;
-@end example
-
-@node Attributes,,Case Constructions,Project File Reference
-@anchor{gnat_ugn/gnat_project_manager id47}@anchor{1a6}@anchor{gnat_ugn/gnat_project_manager attributes}@anchor{155}
-@subsection Attributes
-
-
-A project (and its packages) may have @strong{attributes} that define
-the project's properties.  Some attributes have values that are strings;
-others have values that are string lists.
-
-@example
-attribute_declaration ::=
-   simple_attribute_declaration | indexed_attribute_declaration
-
-simple_attribute_declaration ::= *for* attribute_designator *use* expression ;
-
-indexed_attribute_declaration ::=
-  *for* *<indexed_attribute_>*simple_name ( string_literal) *use* expression ;
-
-attribute_designator ::=
-  *<simple_attribute_>*simple_name
-  | *<indexed_attribute_>*simple_name ( string_literal )
-@end example
-
-There are two categories of attributes: @strong{simple attributes}
-and @strong{indexed attributes}.
-Each simple attribute has a default value: the empty string (for string
-attributes) and the empty list (for string list attributes).
-An attribute declaration defines a new value for an attribute, and overrides
-the previous value. The syntax of a simple attribute declaration is similar to
-that of an attribute definition clause in Ada.
-
-Some attributes are indexed. These attributes are mappings whose
-domain is a set of strings. They are declared one association
-at a time, by specifying a point in the domain and the corresponding image
-of the attribute.
-Like untyped variables and simple attributes, indexed attributes
-may be declared several times. Each declaration supplies a new value for the
-attribute, and replaces the previous setting.
-
-Here are some examples of attribute declarations:
-
-@example
---  simple attributes
-for Object_Dir use "objects";
-for Source_Dirs use ("units", "test/drivers");
-
---  indexed attributes
-for Body ("main") use "Main.ada";
-for Switches ("main.ada")
-    use ("-v", "-gnatv");
-for Switches ("main.ada") use Builder'Switches ("main.ada") & "-g";
-
---  indexed attributes copy (from package Builder in project Default)
---  The package name must always be specified, even if it is the current
---  package.
-for Default_Switches use Default.Builder'Default_Switches;
-@end example
-
-Attributes references may appear anywhere in expressions, and are used
-to retrieve the value previously assigned to the attribute. If an attribute
-has not been set in a given package or project, its value defaults to the
-empty string or the empty list, with some exceptions.
-
-@example
-attribute_reference ::=
-  attribute_prefix ' *<simple_attribute>_*simple_name [ (string_literal) ]
-attribute_prefix ::= *project*
-  | *<project_>*simple_name
-  | package_identifier
-  | *<project_>*simple_name . package_identifier
-@end example
-
-Examples are:
-
-@example
-<project>'Object_Dir
-Naming'Dot_Replacement
-Imported_Project'Source_Dirs
-Imported_Project.Naming'Casing
-Builder'Default_Switches ("Ada")
-@end example
-
-The exceptions to the empty defaults are:
-
-
-@itemize *
-
-@item 
-Object_Dir: default is "."
-
-@item 
-Exec_Dir: default is 'Object_Dir, that is the value of attribute
-Object_Dir in the same project, declared or defaulted.
-
-@item 
-Source_Dirs: default is (".")
-@end itemize
-
-The prefix of an attribute may be:
-
-
-@itemize *
-
-@item 
-@cite{project} for an attribute of the current project
-
-@item 
-The name of an existing package of the current project
-
-@item 
-The name of an imported project
-
-@item 
-The name of a parent project that is extended by the current project
-
-@item 
-An expanded name whose prefix is imported/parent project name,
-and whose selector is a package name
-@end itemize
-
-In the following sections, all predefined attributes are succinctly described,
-first the project level attributes, that is those attributes that are not in a
-package, then the attributes in the different packages.
-
-It is possible for different tools to dynamically create new packages with
-attributes, or new attributes in predefined packages. These attributes are
-not documented here.
-
-The attributes under Configuration headings are usually found only in
-configuration project files.
-
-The characteristics of each attribute are indicated as follows:
-
-
-@itemize *
-
-@item 
-@strong{Type of value}
-
-The value of an attribute may be a single string, indicated by the word
-"single", or a string list, indicated by the word "list".
-
-@item 
-@strong{Read-only}
-
-When the attribute is read-only, that is when it is not allowed to declare
-the attribute, this is indicated by the words "read-only".
-
-@item 
-@strong{Optional index}
-
-If it is allowed in the value of the attribute (both single and list) to have
-an optional index, this is indicated by the words "optional index".
-
-@item 
-@strong{Indexed attribute}
-
-When it is an indexed attribute, this is indicated by the word "indexed".
-
-@item 
-@strong{Case-sensitivity of the index}
-
-For an indexed attribute, if the index is case-insensitive, this is indicated
-by the words "case-insensitive index".
-
-@item 
-@strong{File name index}
-
-For an indexed attribute, when the index is a file name, this is indicated by
-the words "file name index". The index may or may not be case-sensitive,
-depending on the platform.
-
-@item 
-@strong{others allowed in index}
-
-For an indexed attribute, if it is allowed to use @strong{others} as the index,
-this is indicated by the words "others allowed".
-
-When @strong{others} is used as the index of an indexed attribute, the value of
-the attribute indexed by @strong{others} is used when no other index would apply.
-@end itemize
-
-@menu
-* Project Level Attributes:: 
-* Package Binder Attributes:: 
-* Package Builder Attributes:: 
-* Package Clean Attributes:: 
-* Package Compiler Attributes:: 
-* Package Cross_Reference Attributes:: 
-* Package Finder Attributes:: 
-* Package gnatls Attributes:: 
-* Package IDE Attributes:: 
-* Package Install Attributes:: 
-* Package Linker Attributes:: 
-* Package Naming Attributes:: 
-* Package Remote Attributes:: 
-* Package Stack Attributes:: 
-* Package Synchronize Attributes:: 
-
-@end menu
-
-@node Project Level Attributes,Package Binder Attributes,,Attributes
-@anchor{gnat_ugn/gnat_project_manager project-level-attributes}@anchor{1a7}@anchor{gnat_ugn/gnat_project_manager id48}@anchor{1a8}
-@subsubsection Project Level Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{General}
-
-
-@itemize *
-
-@item 
-@strong{Name}: single, read-only
-
-The name of the project.
-
-@item 
-@strong{Project_Dir}: single, read-only
-
-The path name of the project directory.
-
-@item 
-@strong{Main}: list, optional index
-
-The list of main sources for the executables.
-
-@item 
-@strong{Languages}: list
-
-The list of languages of the sources of the project.
-
-@item 
-@strong{Roots}: list, indexed, file name index
-
-The index is the file name of an executable source. Indicates the list of units
-from the main project that need to be bound and linked with their closures
-with the executable. The index is either a file name, a language name or "*".
-The roots for an executable source are those in @strong{Roots} with an index that
-is the executable source file name, if declared. Otherwise, they are those in
-@strong{Roots} with an index that is the language name of the executable source,
-if present. Otherwise, they are those in @strong{Roots ("*")}, if declared. If none
-of these three possibilities are declared, then there are no roots for the
-executable source.
-
-@item 
-@strong{Externally_Built}: single
-
-Indicates if the project is externally built.
-Only case-insensitive values allowed are "true" and "false", the default.
-@end itemize
-
-@item 
-@strong{Directories}
-
-
-@itemize *
-
-@item 
-@strong{Object_Dir}: single
-
-Indicates the object directory for the project.
-
-@item 
-@strong{Exec_Dir}: single
-
-Indicates the exec directory for the project, that is the directory where the
-executables are.
-
-@item 
-@strong{Source_Dirs}: list
-
-The list of source directories of the project.
-
-@item 
-@strong{Inherit_Source_Path}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of language names. Indicates that
-in the source search path of the index language the source directories of
-the languages in the list should be included.
-
-Example:
-
-@example
-for Inherit_Source_Path ("C++") use ("C");
-@end example
-
-@item 
-@strong{Exclude_Source_Dirs}: list
-
-The list of directories that are included in Source_Dirs but are not source
-directories of the project.
-
-@item 
-@strong{Ignore_Source_Sub_Dirs}: list
-
-Value is a list of simple names for subdirectories that are removed from the
-list of source directories, including theur subdirectories.
-@end itemize
-
-@item 
-@strong{Source Files}
-
-
-@itemize *
-
-@item 
-@strong{Source_Files}: list
-
-Value is a list of source file simple names.
-
-@item 
-@strong{Locally_Removed_Files}: list
-
-Obsolescent. Equivalent to Excluded_Source_Files.
-
-@item 
-@strong{Excluded_Source_Files}: list
-
-Value is a list of simple file names that are not sources of the project.
-Allows to remove sources that are inherited or found in the source directories
-and that match the naming scheme.
-
-@item 
-@strong{Source_List_File}: single
-
-Value is a text file name that contains a list of source file simple names,
-one on each line.
-
-@item 
-@strong{Excluded_Source_List_File}: single
-
-Value is a text file name that contains a list of file simple names that
-are not sources of the project.
-
-@item 
-@strong{Interfaces}: list
-
-Value is a list of file names that constitutes the interfaces of the project.
-@end itemize
-
-@item 
-@strong{Aggregate Projects}
-
-
-@itemize *
-
-@item 
-@strong{Project_Files}: list
-
-Value is the list of aggregated projects.
-
-@item 
-@strong{Project_Path}: list
-
-Value is a list of directories that are added to the project search path when
-looking for the aggregated projects.
-
-@item 
-@strong{External}: single, indexed
-
-Index is the name of an external reference. Value is the value of the
-external reference to be used when parsing the aggregated projects.
-@end itemize
-
-@item 
-@strong{Libraries}
-
-
-@itemize *
-
-@item 
-@strong{Library_Dir}: single
-
-Value is the name of the library directory. This attribute needs to be
-declared for each library project.
-
-@item 
-@strong{Library_Name}: single
-
-Value is the name of the library. This attribute needs to be declared or
-inherited for each library project.
-
-@item 
-@strong{Library_Kind}: single
-
-Specifies the kind of library: static library (archive) or shared library.
-Case-insensitive values must be one of "static" for archives (the default) or
-"dynamic" or "relocatable" for shared libraries.
-
-@item 
-@strong{Library_Version}: single
-
-Value is the name of the library file.
-
-@item 
-@strong{Library_Interface}: list
-
-Value is the list of unit names that constitutes the interfaces
-of a Stand-Alone Library project.
-
-@item 
-@strong{Library_Standalone}: single
-
-Specifies if a Stand-Alone Library (SAL) is encapsulated or not.
-Only authorized case-insensitive values are "standard" for non encapsulated
-SALs, "encapsulated" for encapsulated SALs or "no" for non SAL library project.
-
-@item 
-@strong{Library_Encapsulated_Options}: list
-
-Value is a list of options that need to be used when linking an encapsulated
-Stand-Alone Library.
-
-@item 
-@strong{Library_Encapsulated_Supported}: single
-
-Indicates if encapsulated Stand-Alone Libraries are supported. Only
-authorized case-insensitive values are "true" and "false" (the default).
-
-@item 
-@strong{Library_Auto_Init}: single
-
-Indicates if a Stand-Alone Library is auto-initialized. Only authorized
-case-insentive values are "true" and "false".
-
-@item 
-@strong{Leading_Library_Options}: list
-
-Value is a list of options that are to be used at the beginning of
-the command line when linking a shared library.
-
-@item 
-@strong{Library_Options}: list
-
-Value is a list of options that are to be used when linking a shared library.
-
-@item 
-@strong{Library_Rpath_Options}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of options for an invocation of the
-compiler of the language. This invocation is done for a shared library project
-with sources of the language. The output of the invocation is the path name
-of a shared library file. The directory name is to be put in the run path
-option switch when linking the shared library for the project.
-
-@item 
-@strong{Library_Src_Dir}: single
-
-Value is the name of the directory where copies of the sources of the
-interfaces of a Stand-Alone Library are to be copied.
-
-@item 
-@strong{Library_ALI_Dir}: single
-
-Value is the name of the directory where the ALI files of the interfaces
-of a Stand-Alone Library are to be copied. When this attribute is not declared,
-the directory is the library directory.
-
-@item 
-@strong{Library_gcc}: single
-
-Obsolescent attribute. Specify the linker driver used to link a shared library.
-Use instead attribute Linker'Driver.
-
-@item 
-@strong{Library_Symbol_File}: single
-
-Value is the name of the library symbol file.
-
-@item 
-@strong{Library_Symbol_Policy}: single
-
-Indicates the symbol policy kind. Only authorized case-insensitive values are
-"autonomous", "default", "compliant", "controlled" or "direct".
-
-@item 
-@strong{Library_Reference_Symbol_File}: single
-
-Value is the name of the reference symbol file.
-@end itemize
-
-@item 
-@strong{Configuration - General}
-
-
-@itemize *
-
-@item 
-@strong{Default_Language}: single
-
-Value is the case-insensitive name of the language of a project when attribute
-Languages is not specified.
-
-@item 
-@strong{Run_Path_Option}: list
-
-Value is the list of switches to be used when specifying the run path option
-in an executable.
-
-@item 
-@strong{Run_Path_Origin}: single
-
-Value is the the string that may replace the path name of the executable
-directory in the run path options.
-
-@item 
-@strong{Separate_Run_Path_Options}: single
-
-Indicates if there may be several run path options specified when linking an
-executable. Only authorized case-insensitive values are "true" or "false" (the
-default).
-
-@item 
-@strong{Toolchain_Version}: single, indexed, case-insensitive index
-
-Index is a language name. Specify the version of a toolchain for a language.
-
-@item 
-@strong{Toolchain_Description}: single, indexed, case-insensitive index
-
-Obsolescent. No longer used.
-
-@item 
-@strong{Object_Generated}: single, indexed, case-insensitive index
-
-Index is a language name. Indicates if invoking the compiler for a language
-produces an object file. Only authorized case-insensitive values are "false"
-and "true" (the default).
-
-@item 
-@strong{Objects_Linked}: single, indexed, case-insensitive index
-
-Index is a language name. Indicates if the object files created by the compiler
-for a language need to be linked in the executable. Only authorized
-case-insensitive values are "false" and "true" (the default).
-
-@item 
-@strong{Target}: single
-
-Value is the name of the target platform. Taken into account only in the main
-project.
-
-Note that when the target is specified on the command line (usually with
-a switch --target=), the value of attribute reference 'Target is the one
-specified on the command line.
-
-@item 
-@strong{Runtime}: single, indexed, case-insensitive index
-
-Index is a language name. Indicates the runtime directory that is to be used
-when using the compiler of the language. Taken into account only in the main
-project.
-
-Note that when the runtime is specified for a language on the command line
-(usually with a switch --RTS), the value of attribute reference 'Runtime
-for this language is the one specified on the command line.
-@end itemize
-
-@item 
-@strong{Configuration - Libraries}
-
-
-@itemize *
-
-@item 
-@strong{Library_Builder}: single
-
-Value is the path name of the application that is to be used to build
-libraries. Usually the path name of "gprlib".
-
-@item 
-@strong{Library_Support}: single
-
-Indicates the level of support of libraries. Only authorized case-insensitive
-values are "static_only", "full" or "none" (the default).
-@end itemize
-
-@item 
-@strong{Configuration - Archives}
-
-
-@itemize *
-
-@item 
-@strong{Archive_Builder}: list
-
-Value is the name of the application to be used to create a static library
-(archive), followed by the options to be used.
-
-@item 
-@strong{Archive_Builder_Append_Option}: list
-
-Value is the list of options to be used when invoking the archive builder
-to add project files into an archive.
-
-@item 
-@strong{Archive_Indexer}: list
-
-Value is the name of the archive indexer, followed by the required options.
-
-@item 
-@strong{Archive_Suffix}: single
-
-Value is the extension of archives. When not declared, the extension is ".a".
-
-@item 
-@strong{Library_Partial_Linker}: list
-
-Value is the name of the partial linker executable, followed by the required
-options.
-@end itemize
-
-@item 
-@strong{Configuration - Shared Libraries}
-
-
-@itemize *
-
-@item 
-@strong{Shared_Library_Prefix}: single
-
-Value is the prefix in the name of shared library files. When not declared,
-the prefix is "lib".
-
-@item 
-@strong{Shared_Library_Suffix}: single
-
-Value is the the extension of the name of shared library files. When not
-declared, the extension is ".so".
-
-@item 
-@strong{Symbolic_Link_Supported}: single
-
-Indicates if symbolic links are supported on the platform. Only authorized
-case-insensitive values are "true" and "false" (the default).
-
-@item 
-@strong{Library_Major_Minor_Id_Supported}: single
-
-Indicates if major and minor ids for shared library names are supported on
-the platform. Only authorized case-insensitive values are "true" and "false"
-(the default).
-
-@item 
-@strong{Library_Auto_Init_Supported}: single
-
-Indicates if auto-initialization of Stand-Alone Libraries is supported. Only
-authorized case-insensitive values are "true" and "false" (the default).
-
-@item 
-@strong{Shared_Library_Minimum_Switches}: list
-
-Value is the list of required switches when linking a shared library.
-
-@item 
-@strong{Library_Version_Switches}: list
-
-Value is the list of switches to specify a internal name for a shared library.
-
-@item 
-@strong{Library_Install_Name_Option}: single
-
-Value is the name of the option that needs to be used, concatenated with the
-path name of the library file, when linking a shared library.
-
-@item 
-@strong{Runtime_Library_Dir}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the path name of the directory where the
-runtime libraries are located.
-
-@item 
-@strong{Runtime_Source_Dir}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the path name of the directory where the
-sources of runtime libraries are located.
-@end itemize
-@end itemize
-
-@node Package Binder Attributes,Package Builder Attributes,Project Level Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-binder-attributes}@anchor{1a9}@anchor{gnat_ugn/gnat_project_manager id49}@anchor{1aa}
-@subsubsection Package Binder Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{General}
-
-
-@itemize *
-
-@item 
-@strong{Default_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to be used when binding
-code of the language, if there is no applicable attribute Switches.
-
-@item 
-@strong{Switches}: list, optional index, indexed,
-case-insensitive index, others allowed
-
-Index is either a language name or a source file name. Value is the list of
-switches to be used when binding code. Index is either the source file name
-of the executable to be bound or the language name of the code to be bound.
-@end itemize
-
-@item 
-@strong{Configuration - Binding}
-
-
-@itemize *
-
-@item 
-@strong{Driver}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the name of the application to be used when
-binding code of the language.
-
-@item 
-@strong{Required_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of the required switches to be
-used when binding code of the language.
-
-@item 
-@strong{Prefix}: single, indexed, case-insensitive index
-
-Index is a language name. Value is a prefix to be used for the binder exchange
-file name for the language. Used to have different binder exchange file names
-when binding different languages.
-
-@item 
-@strong{Objects_Path}: single,indexed, case-insensitive index
-
-Index is a language name. Value is the name of the environment variable that
-contains the path for the object directories.
-
-@item 
-@strong{Object_Path_File}: single,indexed, case-insensitive index
-
-Index is a language name. Value is the name of the environment variable. The
-value of the environment variable is the path name of a text file that
-contains the list of object directories.
-@end itemize
-@end itemize
-
-@node Package Builder Attributes,Package Clean Attributes,Package Binder Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-builder-attributes}@anchor{1ab}@anchor{gnat_ugn/gnat_project_manager id50}@anchor{1ac}
-@subsubsection Package Builder Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Default_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of builder switches to be used when
-building an executable of the language, if there is no applicable attribute
-Switches.
-
-@item 
-@strong{Switches}: list, optional index, indexed, case-insensitive index,
-others allowed
-
-Index is either a language name or a source file name. Value is the list of
-builder switches to be used when building an executable. Index is either the
-source file name of the executable to be built or its language name.
-
-@item 
-@strong{Global_Compilation_Switches}: list, optional index, indexed,
-case-insensitive index
-
-Index is a language name. Value is the list of compilation switches to be
-used when building an executable. Index is either the source file name of
-the executable to be built or its language name.
-
-@item 
-@strong{Executable}: single, indexed, case-insensitive index
-
-Index is an executable source file name. Value is the simple file name of the
-executable to be built.
-
-@item 
-@strong{Executable_Suffix}: single
-
-Value is the extension of the file names of executable. When not specified,
-the extension is the default extension of executables on the platform.
-
-@item 
-@strong{Global_Configuration_Pragmas}: single
-
-Value is the file name of a configuration pragmas file that is specified to
-the Ada compiler when compiling any Ada source in the project tree.
-
-@item 
-@strong{Global_Config_File}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the file name of a configuration file that
-is specified to the compiler when compiling any source of the language in the
-project tree.
-@end itemize
-
-
-@node Package Clean Attributes,Package Compiler Attributes,Package Builder Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-clean-attributes}@anchor{1ad}@anchor{gnat_ugn/gnat_project_manager id52}@anchor{1ae}
-@subsubsection Package Clean Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Switches}: list
-
-Value is a list of switches to be used by the cleaning application.
-
-@item 
-@strong{Source_Artifact_Extensions}: list, indexed, case-insensitive index
-
-Index is a language names. Value is the list of extensions for file names
-derived from object file names that need to be cleaned in the object
-directory of the project.
-
-@item 
-@strong{Object_Artifact_Extensions}: list, indexed, case-insensitive index
-
-Index is a language names. Value is the list of extensions for file names
-derived from source file names that need to be cleaned in the object
-directory of the project.
-
-@item 
-@strong{Artifacts_In_Object_Dir}: single
-
-Value is a list of file names expressed as regular expressions that are to be
-deleted by gprclean in the object directory of the project.
-
-@item 
-@strong{Artifacts_In_Exec_Dir}: single
-
-Value is list of file names expressed as regular expressions that are to be
-deleted by gprclean in the exec directory of the main project.
-@end itemize
-
-@node Package Compiler Attributes,Package Cross_Reference Attributes,Package Clean Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager id53}@anchor{1af}@anchor{gnat_ugn/gnat_project_manager package-compiler-attributes}@anchor{1b0}
-@subsubsection Package Compiler Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{General}
-
-
-@itemize *
-
-@item 
-@strong{Default_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of switches to be used when invoking
-the compiler for the language for a source of the project, if there is no
-applicable attribute Switches.
-
-@item 
-@strong{Switches}: list, optional index, indexed, case-insensitive index,
-others allowed
-
-Index is a source file name or a language name. Value is the list of switches
-to be used when invoking the compiler for the source or for its language.
-
-@item 
-@strong{Local_Configuration_Pragmas}: single
-
-Value is the file name of a configuration pragmas file that is specified to
-the Ada compiler when compiling any Ada source in the project.
-
-@item 
-@strong{Local_Config_File}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the file name of a configuration file that
-is specified to the compiler when compiling any source of the language in the
-project.
-@end itemize
-
-@item 
-@strong{Configuration - Compiling}
-
-
-@itemize *
-
-@item 
-@strong{Driver}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the name of the executable for the compiler
-of the language.
-
-@item 
-@strong{Language_Kind}: single, indexed, case-insensitive index
-
-Index is a language name. Indicates the kind of the language, either file based
-or unit based. Only authorized case-insensitive values are "unit_based" and
-"file_based" (the default).
-
-@item 
-@strong{Dependency_Kind}: single, indexed, case-insensitive index
-
-Index is a language name. Indicates how the dependencies are handled for the
-language. Only authorized case-insensitive values are "makefile", "ali_file",
-"ali_closure" or "none" (the default).
-
-@item 
-@strong{Required_Switches}: list, indexed, case-insensitive index
-
-Equivalent to attribute Leading_Required_Switches.
-
-@item 
-@strong{Leading_Required_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of the minimum switches to be used
-at the beginning of the command line when invoking the compiler for the
-language.
-
-@item 
-@strong{Trailing_Required_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of the minimum switches to be used
-at the end of the command line when invoking the compiler for the language.
-
-@item 
-@strong{PIC_Option}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to be used when
-compiling a source of the language when the project is a shared library
-project.
-
-@item 
-@strong{Path_Syntax}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the kind of path syntax to be used when
-invoking the compiler for the language. Only authorized case-insensitive
-values are "canonical" and "host" (the default).
-
-@item 
-@strong{Source_File_Switches}: single, indexed, case-insensitive index
-
-Index is a language name. Value is a list of switches to be used just before
-the path name of the source to compile when invoking the compiler for a source
-of the language.
-
-@item 
-@strong{Object_File_Suffix}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the extension of the object files created
-by the compiler of the language. When not specified, the extension is the
-default one for the platform.
-
-@item 
-@strong{Object_File_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to be used by the
-compiler of the language to specify the path name of the object file. When not
-specified, the switch used is "-o".
-
-@item 
-@strong{Multi_Unit_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to be used to compile
-a unit in a multi unit source of the language. The index of the unit in the
-source is concatenated with the last switches in the list.
-
-@item 
-@strong{Multi_Unit_Object_Separator}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the string to be used in the object file
-name before the index of the unit, when compiling a unit in a multi unit source
-of the language.
-@end itemize
-
-@item 
-@strong{Configuration - Mapping Files}
-
-
-@itemize *
-
-@item 
-@strong{Mapping_File_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to be used to specify
-a mapping file when invoking the compiler for a source of the language.
-
-@item 
-@strong{Mapping_Spec_Suffix}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the suffix to be used in a mapping file
-to indicate that the source is a spec.
-
-@item 
-@strong{Mapping_Body_Suffix}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the suffix to be used in a mapping file
-to indicate that the source is a body.
-@end itemize
-
-@item 
-@strong{Configuration - Config Files}
-
-
-@itemize *
-
-@item 
-@strong{Config_File_Switches}: list: single, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to specify to the
-compiler of the language a configuration file.
-
-@item 
-@strong{Config_Body_File_Name}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the template to be used to indicate a
-configuration specific to a body of the language in a configuration
-file.
-
-@item 
-@strong{Config_Body_File_Name_Index}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the template to be used to indicate a
-configuration specific to the body a unit in a multi unit source of the
-language in a configuration file.
-
-@item 
-@strong{Config_Body_File_Name_Pattern}: single, indexed,
-case-insensitive index
-
-Index is a language name. Value is the template to be used to indicate a
-configuration for all bodies of the languages in a configuration file.
-
-@item 
-@strong{Config_Spec_File_Name}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the template to be used to indicate a
-configuration specific to a spec of the language in a configuration
-file.
-
-@item 
-@strong{Config_Spec_File_Name_Index}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the template to be used to indicate a
-configuration specific to the spec a unit in a multi unit source of the
-language in a configuration file.
-
-@item 
-@strong{Config_Spec_File_Name_Pattern}: single, indexed,
-case-insensitive index
-
-Index is a language name. Value is the template to be used to indicate a
-configuration for all specs of the languages in a configuration file.
-
-@item 
-@strong{Config_File_Unique}: single, indexed, case-insensitive index
-
-Index is a language name. Indicates if there should be only one configuration
-file specified to the compiler of the language. Only authorized
-case-insensitive values are "true" and "false" (the default).
-@end itemize
-
-@item 
-@strong{Configuration - Dependencies}
-
-
-@itemize *
-
-@item 
-@strong{Dependency_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to be used to specify
-to the compiler the dependency file when the dependency kind of the language is
-file based, and when Dependency_Driver is not specified for the language.
-
-@item 
-@strong{Dependency_Driver}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the name of the executable to be used to
-create the dependency file for a source of the language, followed by the
-required switches.
-@end itemize
-
-@item 
-@strong{Configuration - Search Paths}
-
-
-@itemize *
-
-@item 
-@strong{Include_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to specify to the
-compiler of the language to indicate a directory to look for sources.
-
-@item 
-@strong{Include_Path}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the name of an environment variable that
-contains the path of all the directories that the compiler of the language
-may search for sources.
-
-@item 
-@strong{Include_Path_File}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the name of an environment variable the
-value of which is the path name of a text file that contains the directories
-that the compiler of the language may search for sources.
-
-@item 
-@strong{Object_Path_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is the list of switches to specify to the
-compiler of the language the name of a text file that contains the list of
-object directories. When this attribute is not declared, the text file is
-not created.
-@end itemize
-@end itemize
-
-@node Package Cross_Reference Attributes,Package Finder Attributes,Package Compiler Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager id54}@anchor{1b1}@anchor{gnat_ugn/gnat_project_manager package-cross-reference-attributes}@anchor{1b2}
-@subsubsection Package Cross_Reference Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Default_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of switches to be used when invoking
-@cite{gnatxref} for a source of the language, if there is no applicable
-attribute Switches.
-
-@item 
-@strong{Switches}: list, optional index, indexed, case-insensitive index,
-others allowed
-
-Index is a source file name. Value is the list of switches to be used when
-invoking @cite{gnatxref} for the source.
-@end itemize
-
-
-@node Package Finder Attributes,Package gnatls Attributes,Package Cross_Reference Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager id56}@anchor{1b3}@anchor{gnat_ugn/gnat_project_manager package-finder-attributes}@anchor{1b4}
-@subsubsection Package Finder Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Default_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of switches to be used when invoking
-@cite{gnatfind} for a source of the language, if there is no applicable
-attribute Switches.
-
-@item 
-@strong{Switches}: list, optional index, indexed, case-insensitive index,
-others allowed
-
-Index is a source file name. Value is the list of switches to be used when
-invoking @cite{gnatfind} for the source.
-@end itemize
-
-@node Package gnatls Attributes,Package IDE Attributes,Package Finder Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-gnatls-attributes}@anchor{1b5}@anchor{gnat_ugn/gnat_project_manager id57}@anchor{1b6}
-@subsubsection Package gnatls Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Switches}: list
-
-Value is a list of switches to be used when invoking @cite{gnatls}.
-@end itemize
-
-
-@node Package IDE Attributes,Package Install Attributes,Package gnatls Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager id58}@anchor{1b7}@anchor{gnat_ugn/gnat_project_manager package-ide-attributes}@anchor{1b8}
-@subsubsection Package IDE Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Default_Switches}: list, indexed
-
-Index is the name of an external tool that the GNAT Programming System (GPS)
-is supporting. Value is a list of switches to use when invoking that tool.
-
-@item 
-@strong{Remote_Host}: single
-
-Value is a string that designates the remote host in a cross-compilation
-environment, to be used for remote compilation and debugging. This attribute
-should not be specified when running on the local machine.
-
-@item 
-@strong{Program_Host}: single
-
-Value is a string that specifies the name of IP address of the embedded target
-in a cross-compilation environment, on which the program should execute.
-
-@item 
-@strong{Communication_Protocol}: single
-
-Value is the name of the protocol to use to communicate with the target
-in a cross-compilation environment, for example @cite{"wtx"} or
-@cite{"vxworks"}.
-
-@item 
-@strong{Compiler_Command}: single, indexed, case-insensitive index
-
-Index is a language Name. Value is a string that denotes the command to be
-used to invoke the compiler. For historical reasons, the value of
-@cite{Compiler_Command ("Ada")} is expected to be a reference to @emph{gnatmake} or
-@emph{cross-gnatmake}.
-
-@item 
-@strong{Debugger_Command}: single
-
-Value is a string that specifies the name of the debugger to be used, such as
-gdb, powerpc-wrs-vxworks-gdb or gdb-4.
-
-@item 
-@strong{gnatlist}: single
-
-Value is a string that specifies the name of the @emph{gnatls} utility
-to be used to retrieve information about the predefined path; for example,
-@cite{"gnatls"}, @cite{"powerpc-wrs-vxworks-gnatls"}.
-
-@item 
-@strong{VCS_Kind}: single
-
-Value is a string used to specify the Version Control System (VCS) to be used
-for this project, for example "Subversion", "ClearCase". If the
-value is set to "Auto", the IDE will try to detect the actual VCS used
-on the list of supported ones.
-
-@item 
-@strong{VCS_File_Check}: single
-
-Value is a string that specifies the command used by the VCS to check
-the validity of a file, either when the user explicitly asks for a check,
-or as a sanity check before doing the check-in.
-
-@item 
-@strong{VCS_Log_Check}: single
-
-Value is a string that specifies the command used by the VCS to check
-the validity of a log file.
-
-@item 
-@strong{Documentation_Dir}: single
-
-Value is the directory used to generate the documentation of source code.
-@end itemize
-
-@node Package Install Attributes,Package Linker Attributes,Package IDE Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-install-attributes}@anchor{1b9}@anchor{gnat_ugn/gnat_project_manager id59}@anchor{1ba}
-@subsubsection Package Install Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Artifacts}: list, indexed
-
-An array attribute to declare a set of files not part of the sources
-to be installed. The array discriminant is the directory where the
-file is to be installed. If a relative directory then Prefix (see
-below) is prepended. Note also that if the same file name occurs
-multiple time in the attribute list, the last one will be the one
-installed.
-
-@item 
-@strong{Prefix}: single
-
-Value is the install destination directory.
-
-@item 
-@strong{Sources_Subdir}: single
-
-Value is the sources directory or subdirectory of Prefix.
-
-@item 
-@strong{Exec_Subdir}: single
-
-Value is the executables directory or subdirectory of Prefix.
-
-@item 
-@strong{Lib_Subdir}: single
-
-Value is library directory or subdirectory of Prefix.
-
-@item 
-@strong{Project_Subdir}: single
-
-Value is the project directory or subdirectory of Prefix.
-
-@item 
-@strong{Active}: single
-
-Indicates that the project is to be installed or not. Case-insensitive value
-"false" means that the project is not to be installed, all other values mean
-that the project is to be installed.
-
-@item 
-@strong{Mode}: single
-
-Value is the installation mode, it is either @strong{dev} (default) or @strong{usage}.
-
-@item 
-@strong{Install_Name}: single
-
-Specify the name to use for recording the installation. The default is
-the project name without the extension.
-@end itemize
-
-@node Package Linker Attributes,Package Naming Attributes,Package Install Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager id60}@anchor{1bb}@anchor{gnat_ugn/gnat_project_manager package-linker-attributes}@anchor{1bc}
-@subsubsection Package Linker Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{General}
-
-
-@itemize *
-
-@item 
-@strong{Required_Switches}: list
-
-Value is a list of switches that are required when invoking the linker to link
-an executable.
-
-@item 
-@strong{Default_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of switches for the linker when
-linking an executable for a main source of the language, when there is no
-applicable Switches.
-
-@item 
-@strong{Leading_Switches}: list, optional index, indexed,
-case-insensitive index, others allowed
-
-Index is a source file name or a language name. Value is the list of switches
-to be used at the beginning of the command line when invoking the linker to
-build an executable for the source or for its language.
-
-@item 
-@strong{Switches}: list, optional index, indexed, case-insensitive index,
-others allowed
-
-Index is a source file name or a language name. Value is the list of switches
-to be used when invoking the linker to build an executable for the source or
-for its language.
-
-@item 
-@strong{Trailing_Switches}: list, optional index, indexed,
-case-insensitive index, others allowed
-
-Index is a source file name or a language name. Value is the list of switches
-to be used at the end of the command line when invoking the linker to
-build an executable for the source or for its language. These switches may
-override the Required_Switches.
-
-@item 
-@strong{Linker_Options}: list
-
-Value is a list of switches/options that are to be added when linking an
-executable from a project importing the current project directly or indirectly.
-Linker_Options are not used when linking an executable from the current
-project.
-
-@item 
-@strong{Map_File_Option}: single
-
-Value is the switch to specify the map file name that the linker needs to
-create.
-@end itemize
-
-@item 
-@strong{Configuration - Linking}
-
-
-@itemize *
-
-@item 
-@strong{Driver}: single
-
-Value is the name of the linker executable.
-@end itemize
-
-@item 
-@strong{Configuration - Response Files}
-
-
-@itemize *
-
-@item 
-@strong{Max_Command_Line_Length}: single
-
-Value is the maximum number of character in the command line when invoking
-the linker to link an executable.
-
-@item 
-@strong{Response_File_Format}: single
-
-Indicates the kind of response file to create when the length of the linking
-command line is too large. Only authorized case-insensitive values are "none",
-"gnu", "object_list", "gcc_gnu", "gcc_option_list" and "gcc_object_list".
-
-@item 
-@strong{Response_File_Switches}: list
-
-Value is the list of switches to specify a response file to the linker.
-@end itemize
-@end itemize
-
-@c only PRO or GPL
-@c 
-@c .. _Package_Metrics_Attribute:
-@c 
-@c Package Metrics Attribute
-@c ^^^^^^^^^^^^^^^^^^^^^^^^^
-@c 
-@c * **Default_Switches**: list, indexed, case-insensitive index
-@c 
-@c   Index is a language name. Value is a list of switches to be used when invoking
-@c   `gnatmetric` for a source of the language, if there is no applicable
-@c   attribute Switches.
-@c 
-@c * **Switches**: list, optional index, indexed, case-insensitive index,
-@c   others allowed
-@c 
-@c   Index is a source file name. Value is the list of switches to be used when
-@c   invoking `gnatmetric` for the source.
-
-@node Package Naming Attributes,Package Remote Attributes,Package Linker Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-naming-attributes}@anchor{1bd}@anchor{gnat_ugn/gnat_project_manager id61}@anchor{1be}
-@subsubsection Package Naming Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Specification_Suffix}: single, indexed, case-insensitive index
-
-Equivalent to attribute Spec_Suffix.
-
-@item 
-@strong{Spec_Suffix}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the extension of file names for specs of
-the language.
-
-@item 
-@strong{Implementation_Suffix}: single, indexed, case-insensitive index
-
-Equivalent to attribute Body_Suffix.
-
-@item 
-@strong{Body_Suffix}: single, indexed, case-insensitive index
-
-Index is a language name. Value is the extension of file names for bodies of
-the language.
-
-@item 
-@strong{Separate_Suffix}: single
-
-Value is the extension of file names for subunits of Ada.
-
-@item 
-@strong{Casing}: single
-
-Indicates the casing of sources of the Ada language. Only authorized
-case-insensitive values are "lowercase", "uppercase" and "mixedcase".
-
-@item 
-@strong{Dot_Replacement}: single
-
-Value is the string that replace the dot of unit names in the source file names
-of the Ada language.
-
-@item 
-@strong{Specification}: single, optional index, indexed,
-case-insensitive index
-
-Equivalent to attribute Spec.
-
-@item 
-@strong{Spec}: single, optional index, indexed, case-insensitive index
-
-Index is a unit name. Value is the file name of the spec of the unit.
-
-@item 
-@strong{Implementation}: single, optional index, indexed,
-case-insensitive index
-
-Equivalent to attribute Body.
-
-@item 
-@strong{Body}: single, optional index, indexed, case-insensitive index
-
-Index is a unit name. Value is the file name of the body of the unit.
-
-@item 
-@strong{Specification_Exceptions}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of specs for the language that do not
-necessarily follow the naming scheme for the language and that may or may not
-be found in the source directories of the project.
-
-@item 
-@strong{Implementation_Exceptions}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of bodies for the language that do not
-necessarily follow the naming scheme for the language and that may or may not
-be found in the source directories of the project.
-@end itemize
-
-
-@node Package Remote Attributes,Package Stack Attributes,Package Naming Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-remote-attributes}@anchor{1bf}@anchor{gnat_ugn/gnat_project_manager id63}@anchor{1c0}
-@subsubsection Package Remote Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Included_Patterns}: list
-
-If this attribute is defined it sets the patterns to
-synchronized from the master to the slaves. It is exclusive
-with Excluded_Patterns, that is it is an error to define
-both.
-
-@item 
-@strong{Included_Artifact_Patterns}: list
-
-If this attribute is defined it sets the patterns of compilation
-artifacts to synchronized from the slaves to the build master.
-This attribute replace the default hard-coded patterns.
-
-@item 
-@strong{Excluded_Patterns}: list
-
-Set of patterns to ignore when synchronizing sources from the build
-master to the slaves. A set of predefined patterns are supported
-(e.g. *.o, *.ali, *.exe, etc.), this attributes make it possible to
-add some more patterns.
-
-@item 
-@strong{Root_Dir}: single
-
-Value is the root directory used by the slave machines.
-@end itemize
-
-@node Package Stack Attributes,Package Synchronize Attributes,Package Remote Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager id64}@anchor{1c1}@anchor{gnat_ugn/gnat_project_manager package-stack-attributes}@anchor{1c2}
-@subsubsection Package Stack Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Switches}: list
-
-Value is the list of switches to be used when invoking @cite{gnatstack}.
-@end itemize
-
-@node Package Synchronize Attributes,,Package Stack Attributes,Attributes
-@anchor{gnat_ugn/gnat_project_manager package-synchronize-attributes}@anchor{1c3}
-@subsubsection Package Synchronize Attributes
-
-
-
-@itemize *
-
-@item 
-@strong{Default_Switches}: list, indexed, case-insensitive index
-
-Index is a language name. Value is a list of switches to be used when invoking
-@cite{gnatsync} for a source of the language, if there is no applicable
-attribute Switches.
-
-@item 
-@strong{Switches}: list, optional index, indexed, case-insensitive index,
-others allowed
-
-Index is a source file name. Value is the list of switches to be used when
-invoking @cite{gnatsync} for the source.
-@end itemize
-
-@node Tools Supporting Project Files,GNAT Utility Programs,GNAT Project Manager,Top
-@anchor{gnat_ugn/tools_supporting_project_files doc}@anchor{1c4}@anchor{gnat_ugn/tools_supporting_project_files tools-supporting-project-files}@anchor{c}@anchor{gnat_ugn/tools_supporting_project_files id1}@anchor{1c5}
-@chapter Tools Supporting Project Files
-
-
-This section describes how project files can be used in conjunction with a number of
-GNAT tools.
-
-@menu
-* gnatmake and Project Files:: 
-* The GNAT Driver and Project Files:: 
-
-@end menu
-
-@node gnatmake and Project Files,The GNAT Driver and Project Files,,Tools Supporting Project Files
-@anchor{gnat_ugn/tools_supporting_project_files id2}@anchor{1c6}@anchor{gnat_ugn/tools_supporting_project_files gnatmake-and-project-files}@anchor{e4}
-@section gnatmake and Project Files
-
-
-This section covers several topics related to @emph{gnatmake} and
-project files: defining switches for @emph{gnatmake}
-and for the tools that it invokes; specifying configuration pragmas;
-the use of the @cite{Main} attribute; building and rebuilding library project
-files.
-
-@menu
-* Switches Related to Project Files:: 
-* Switches and Project Files:: 
-* Specifying Configuration Pragmas:: 
-* Project Files and Main Subprograms:: 
-* Library Project Files:: 
-
-@end menu
-
-@node Switches Related to Project Files,Switches and Project Files,,gnatmake and Project Files
-@anchor{gnat_ugn/tools_supporting_project_files switches-related-to-project-files}@anchor{e6}@anchor{gnat_ugn/tools_supporting_project_files id3}@anchor{1c7}
-@subsection Switches Related to Project Files
-
-
-The following switches are used by GNAT tools that support project files:
-
-@quotation
-
-@geindex -P (any project-aware tool)
-@end quotation
-
-
-@table @asis
-
-@item @code{-P@emph{project}}
-
-Indicates the name of a project file. This project file will be parsed with
-the verbosity indicated by @emph{-vP*x*},
-if any, and using the external references indicated
-by @emph{-X} switches, if any.
-There may zero, one or more spaces between @emph{-P} and @cite{project}.
-
-There must be only one @emph{-P} switch on the command line.
-
-Since the Project Manager parses the project file only after all the switches
-on the command line are checked, the order of the switches
-@emph{-P},
-@emph{-vP*x*}
-or @emph{-X} is not significant.
-
-@geindex -X (any project-aware tool)
-
-@item @code{-X@emph{name}=@emph{value}}
-
-Indicates that external variable @cite{name} has the value @cite{value}.
-The Project Manager will use this value for occurrences of
-@cite{external(name)} when parsing the project file.
-
-If @cite{name} or @cite{value} includes a space, then @cite{name=value} should be
-put between quotes.
-
-@example
--XOS=NT
--X"user=John Doe"
-@end example
-
-Several @emph{-X} switches can be used simultaneously.
-If several @emph{-X} switches specify the same
-@cite{name}, only the last one is used.
-
-An external variable specified with a @emph{-X} switch
-takes precedence over the value of the same name in the environment.
-
-@geindex -vP (any project-aware tool)
-
-@item @code{-vP@emph{x}}
-
-Indicates the verbosity of the parsing of GNAT project files.
-
-@emph{-vP0} means Default;
-@emph{-vP1} means Medium;
-@emph{-vP2} means High.
-
-The default is Default: no output for syntactically correct
-project files.
-If several @emph{-vP*x*} switches are present,
-only the last one is used.
-
-@geindex -aP (any project-aware tool)
-
-@item @code{-aP@emph{dir}}
-
-Add directory @cite{dir} at the beginning of the project search path, in order,
-after the current working directory.
-
-@geindex -eL (any project-aware tool)
-
-@item @code{-eL}
-
-Follow all symbolic links when processing project files.
-
-@geindex --subdirs= (gnatmake and gnatclean)
-
-@item @code{--subdirs=@emph{subdir}}
-
-This switch is recognized by @emph{gnatmake} and @emph{gnatclean}. It
-indicate that the real directories (except the source directories) are the
-subdirectories @cite{subdir} of the directories specified in the project files.
-This applies in particular to object directories, library directories and
-exec directories. If the subdirectories do not exist, they are created
-automatically.
-@end table
-
-@node Switches and Project Files,Specifying Configuration Pragmas,Switches Related to Project Files,gnatmake and Project Files
-@anchor{gnat_ugn/tools_supporting_project_files id4}@anchor{1c8}@anchor{gnat_ugn/tools_supporting_project_files switches-and-project-files}@anchor{1c9}
-@subsection Switches and Project Files
-
-
-For each of the packages @cite{Builder}, @cite{Compiler}, @cite{Binder}, and
-@cite{Linker}, you can specify a @cite{Default_Switches}
-attribute, a @cite{Switches} attribute, or both;
-as their names imply, these switch-related
-attributes affect the switches that are used for each of these GNAT
-components when
-@emph{gnatmake} is invoked.  As will be explained below, these
-component-specific switches precede
-the switches provided on the @emph{gnatmake} command line.
-
-The @cite{Default_Switches} attribute is an attribute
-indexed by language name (case insensitive) whose value is a string list.
-For example:
-
-@quotation
-
-@example
-package Compiler is
-  for Default_Switches ("Ada")
-      use ("-gnaty",
-           "-v");
-end Compiler;
-@end example
-@end quotation
-
-The @cite{Switches} attribute is indexed on a file name (which may or may
-not be case sensitive, depending
-on the operating system) whose value is a string list.  For example:
-
-@quotation
-
-@example
-package Builder is
-   for Switches ("main1.adb")
-       use ("-O2");
-   for Switches ("main2.adb")
-       use ("-g");
-end Builder;
-@end example
-@end quotation
-
-For the @cite{Builder} package, the file names must designate source files
-for main subprograms.  For the @cite{Binder} and @cite{Linker} packages, the
-file names must designate @code{ALI} or source files for main subprograms.
-In each case just the file name without an explicit extension is acceptable.
-
-For each tool used in a program build (@emph{gnatmake}, the compiler, the
-binder, and the linker), the corresponding package @@dfn@{contributes@} a set of
-switches for each file on which the tool is invoked, based on the
-switch-related attributes defined in the package.
-In particular, the switches
-that each of these packages contributes for a given file @cite{f} comprise:
-
-
-@itemize *
-
-@item 
-the value of attribute @cite{Switches (`f})`,
-if it is specified in the package for the given file,
-
-@item 
-otherwise, the value of @cite{Default_Switches ("Ada")},
-if it is specified in the package.
-@end itemize
-
-If neither of these attributes is defined in the package, then the package does
-not contribute any switches for the given file.
-
-When @emph{gnatmake} is invoked on a file, the switches comprise
-two sets, in the following order: those contributed for the file
-by the @cite{Builder} package;
-and the switches passed on the command line.
-
-When @emph{gnatmake} invokes a tool (compiler, binder, linker) on a file,
-the switches passed to the tool comprise three sets,
-in the following order:
-
-
-@itemize *
-
-@item 
-the applicable switches contributed for the file
-by the @cite{Builder} package in the project file supplied on the command line;
-
-@item 
-those contributed for the file by the package (in the relevant project file --
-see below) corresponding to the tool; and
-
-@item 
-the applicable switches passed on the command line.
-@end itemize
-
-The term @emph{applicable switches} reflects the fact that
-@emph{gnatmake} switches may or may not be passed to individual
-tools, depending on the individual switch.
-
-@emph{gnatmake} may invoke the compiler on source files from different
-projects. The Project Manager will use the appropriate project file to
-determine the @cite{Compiler} package for each source file being compiled.
-Likewise for the @cite{Binder} and @cite{Linker} packages.
-
-As an example, consider the following package in a project file:
-
-@quotation
-
-@example
-project Proj1 is
-   package Compiler is
-      for Default_Switches ("Ada")
-          use ("-g");
-      for Switches ("a.adb")
-          use ("-O1");
-      for Switches ("b.adb")
-          use ("-O2",
-               "-gnaty");
-   end Compiler;
-end Proj1;
-@end example
-@end quotation
-
-If @emph{gnatmake} is invoked with this project file, and it needs to
-compile, say, the files @code{a.adb}, @code{b.adb}, and @code{c.adb}, then
-@code{a.adb} will be compiled with the switch @emph{-O1},
-@code{b.adb} with switches @emph{-O2} and @emph{-gnaty},
-and @code{c.adb} with @emph{-g}.
-
-The following example illustrates the ordering of the switches
-contributed by different packages:
-
-@quotation
-
-@example
-project Proj2 is
-   package Builder is
-      for Switches ("main.adb")
-          use ("-g",
-               "-O1",
-               "-f");
-   end Builder;
-
-   package Compiler is
-      for Switches ("main.adb")
-          use ("-O2");
-   end Compiler;
-end Proj2;
-@end example
-@end quotation
-
-If you issue the command:
-
-@quotation
-
-@example
-$ gnatmake -Pproj2 -O0 main
-@end example
-@end quotation
-
-then the compiler will be invoked on @code{main.adb} with the following
-sequence of switches
-
-@quotation
-
-@example
--g -O1 -O2 -O0
-@end example
-@end quotation
-
-with the last @emph{-O}
-switch having precedence over the earlier ones;
-several other switches
-(such as @emph{-c}) are added implicitly.
-
-The switches @emph{-g}
-and @emph{-O1} are contributed by package
-@cite{Builder},  @emph{-O2} is contributed
-by the package @cite{Compiler}
-and @emph{-O0} comes from the command line.
-
-The @emph{-g} switch will also be passed in the invocation of
-@emph{Gnatlink.}
-
-A final example illustrates switch contributions from packages in different
-project files:
-
-@quotation
-
-@example
-project Proj3 is
-   for Source_Files use ("pack.ads", "pack.adb");
-   package Compiler is
-      for Default_Switches ("Ada")
-          use ("-gnata");
-   end Compiler;
-end Proj3;
-
-with "Proj3";
-project Proj4 is
-   for Source_Files use ("foo_main.adb", "bar_main.adb");
-   package Builder is
-      for Switches ("foo_main.adb")
-          use ("-s",
-               "-g");
-   end Builder;
-end Proj4;
-@end example
-
-@example
--- Ada source file:
-with Pack;
-procedure Foo_Main is
-   ...
-end Foo_Main;
-@end example
-@end quotation
-
-If the command is
-
-@quotation
-
-@example
-$ gnatmake -PProj4 foo_main.adb -cargs -gnato
-@end example
-@end quotation
-
-then the switches passed to the compiler for @code{foo_main.adb} are
-@emph{-g} (contributed by the package @cite{Proj4.Builder}) and
-@emph{-gnato} (passed on the command line).
-When the imported package @cite{Pack} is compiled, the switches used
-are @emph{-g} from @cite{Proj4.Builder},
-@emph{-gnata} (contributed from package @cite{Proj3.Compiler},
-and @emph{-gnato} from the command line.
-
-When using @emph{gnatmake} with project files, some switches or
-arguments may be expressed as relative paths. As the working directory where
-compilation occurs may change, these relative paths are converted to absolute
-paths. For the switches found in a project file, the relative paths
-are relative to the project file directory, for the switches on the command
-line, they are relative to the directory where @emph{gnatmake} is invoked.
-The switches for which this occurs are:
--I,
--A,
--L,
--aO,
--aL,
--aI, as well as all arguments that are not switches (arguments to
-switch
--o, object files specified in package @cite{Linker} or after
--largs on the command line). The exception to this rule is the switch
---RTS= for which a relative path argument is never converted.
-
-@node Specifying Configuration Pragmas,Project Files and Main Subprograms,Switches and Project Files,gnatmake and Project Files
-@anchor{gnat_ugn/tools_supporting_project_files id5}@anchor{1ca}@anchor{gnat_ugn/tools_supporting_project_files specifying-configuration-pragmas}@anchor{7d}
-@subsection Specifying Configuration Pragmas
-
-
-When using @emph{gnatmake} with project files, if there exists a file
-@code{gnat.adc} that contains configuration pragmas, this file will be
-ignored.
-
-Configuration pragmas can be defined by means of the following attributes in
-project files: @cite{Global_Configuration_Pragmas} in package @cite{Builder}
-and @cite{Local_Configuration_Pragmas} in package @cite{Compiler}.
-
-Both these attributes are single string attributes. Their values is the path
-name of a file containing configuration pragmas. If a path name is relative,
-then it is relative to the project directory of the project file where the
-attribute is defined.
-
-When compiling a source, the configuration pragmas used are, in order,
-those listed in the file designated by attribute
-@cite{Global_Configuration_Pragmas} in package @cite{Builder} of the main
-project file, if it is specified, and those listed in the file designated by
-attribute @cite{Local_Configuration_Pragmas} in package @cite{Compiler} of
-the project file of the source, if it exists.
-
-@node Project Files and Main Subprograms,Library Project Files,Specifying Configuration Pragmas,gnatmake and Project Files
-@anchor{gnat_ugn/tools_supporting_project_files id6}@anchor{1cb}@anchor{gnat_ugn/tools_supporting_project_files project-files-and-main-subprograms}@anchor{e5}
-@subsection Project Files and Main Subprograms
-
-
-When using a project file, you can invoke @emph{gnatmake}
-with one or several main subprograms, by specifying their source files on the
-command line.
-
-@quotation
-
-@example
-$ gnatmake -Pprj main1.adb main2.adb main3.adb
-@end example
-@end quotation
-
-Each of these needs to be a source file of the same project, except
-when the switch @cite{-u} is used.
-
-When @cite{-u} is not used, all the mains need to be sources of the
-same project, one of the project in the tree rooted at the project specified
-on the command line. The package @cite{Builder} of this common project, the
-"main project" is the one that is considered by @emph{gnatmake}.
-
-When @cite{-u} is used, the specified source files may be in projects
-imported directly or indirectly by the project specified on the command line.
-Note that if such a source file is not part of the project specified on the
-command line, the switches found in package @cite{Builder} of the
-project specified on the command line, if any, that are transmitted
-to the compiler will still be used, not those found in the project file of
-the source file.
-
-When using a project file, you can also invoke @emph{gnatmake} without
-explicitly specifying any main, and the effect depends on whether you have
-defined the @cite{Main} attribute.  This attribute has a string list value,
-where each element in the list is the name of a source file (the file
-extension is optional) that contains a unit that can be a main subprogram.
-
-If the @cite{Main} attribute is defined in a project file as a non-empty
-string list and the switch @emph{-u} is not used on the command
-line, then invoking @emph{gnatmake} with this project file but without any
-main on the command line is equivalent to invoking @emph{gnatmake} with all
-the file names in the @cite{Main} attribute on the command line.
-
-Example:
-
-@quotation
-
-@example
-project Prj is
-   for Main use ("main1.adb", "main2.adb", "main3.adb");
-end Prj;
-@end example
-@end quotation
-
-With this project file, @cite{"gnatmake -Pprj"}
-is equivalent to
-@cite{"gnatmake -Pprj main1.adb main2.adb main3.adb"}.
-
-When the project attribute @cite{Main} is not specified, or is specified
-as an empty string list, or when the switch @emph{-u} is used on the command
-line, then invoking @emph{gnatmake} with no main on the command line will
-result in all immediate sources of the project file being checked, and
-potentially recompiled. Depending on the presence of the switch @emph{-u},
-sources from other project files on which the immediate sources of the main
-project file depend are also checked and potentially recompiled. In other
-words, the @emph{-u} switch is applied to all of the immediate sources of the
-main project file.
-
-When no main is specified on the command line and attribute @cite{Main} exists
-and includes several mains, or when several mains are specified on the
-command line, the default switches in package @cite{Builder} will
-be used for all mains, even if there are specific switches
-specified for one or several mains.
-
-But the switches from package @cite{Binder} or @cite{Linker} will be
-the specific switches for each main, if they are specified.
-
-@node Library Project Files,,Project Files and Main Subprograms,gnatmake and Project Files
-@anchor{gnat_ugn/tools_supporting_project_files id7}@anchor{1cc}@anchor{gnat_ugn/tools_supporting_project_files library-project-files}@anchor{1cd}
-@subsection Library Project Files
-
-
-When @emph{gnatmake} is invoked with a main project file that is a library
-project file, it is not allowed to specify one or more mains on the command
-line.
-
-When a library project file is specified, switches @cite{-b} and
-@cite{-l} have special meanings.
-
-
-@itemize *
-
-@item 
-@cite{-b} is only allowed for stand-alone libraries. It indicates
-to @emph{gnatmake} that @emph{gnatbind} should be invoked for the
-library.
-
-@item 
-@cite{-l} may be used for all library projects. It indicates
-to @emph{gnatmake} that the binder generated file should be compiled
-(in the case of a stand-alone library) and that the library should be built.
-@end itemize
-
-@node The GNAT Driver and Project Files,,gnatmake and Project Files,Tools Supporting Project Files
-@anchor{gnat_ugn/tools_supporting_project_files id8}@anchor{1ce}@anchor{gnat_ugn/tools_supporting_project_files the-gnat-driver-and-project-files}@anchor{122}
-@section The GNAT Driver and Project Files
-
-
-A number of GNAT tools beyond @emph{gnatmake}
-can benefit from project files:
-
-
-
-@itemize *
-
-@item 
-@emph{gnatbind}
-
-@item 
-@emph{gnatclean}
-
-@item 
-@emph{gnatfind}
-
-@item 
-@emph{gnatlink}
-
-@item 
-@emph{gnatls}
-
-@item 
-@emph{gnatxref}
-@end itemize
-
-However, none of these tools can be invoked
-directly with a project file switch (@emph{-P}).
-They must be invoked through the @emph{gnat} driver.
-
-The @emph{gnat} driver is a wrapper that accepts a number of commands and
-calls the corresponding tool. It was designed initially for VMS platforms (to
-convert VMS qualifiers to Unix-style switches), but it is now available on all
-GNAT platforms.
-
-On non-VMS platforms, the @emph{gnat} driver accepts the following commands
-(case insensitive):
-
-
-
-@itemize *
-
-@item 
-BIND to invoke @emph{gnatbind}
-
-@item 
-CHOP to invoke @emph{gnatchop}
-
-@item 
-CLEAN to invoke @emph{gnatclean}
-
-@item 
-COMP or COMPILE to invoke the compiler
-
-@item 
-FIND to invoke @emph{gnatfind}
-
-@item 
-KR or KRUNCH to invoke @emph{gnatkr}
-
-@item 
-LINK to invoke @emph{gnatlink}
-
-@item 
-LS or LIST to invoke @emph{gnatls}
-
-@item 
-MAKE to invoke @emph{gnatmake}
-
-@item 
-NAME to invoke @emph{gnatname}
-
-@item 
-PREP or PREPROCESS to invoke @emph{gnatprep}
-
-@item 
-XREF to invoke @emph{gnatxref}
-@end itemize
-
-Note that the command
-@emph{gnatmake -c -f -u} is used to invoke the compiler.
-
-On non-VMS platforms, between @emph{gnat} and the command, two
-special switches may be used:
-
-
-@itemize *
-
-@item 
-@emph{-v} to display the invocation of the tool.
-
-@item 
-@emph{-dn} to prevent the @emph{gnat} driver from removing
-the temporary files it has created. These temporary files are
-configuration files and temporary file list files.
-@end itemize
-
-The command may be followed by switches and arguments for the invoked
-tool.
-
-@quotation
-
-@example
-$ gnat bind -C main.ali
-$ gnat ls -a main
-$ gnat chop foo.txt
-@end example
-@end quotation
-
-Switches may also be put in text files, one switch per line, and the text
-files may be specified with their path name preceded by '@@'.
-
-@quotation
-
-@example
-$ gnat bind @@args.txt main.ali
-@end example
-@end quotation
-
-In addition, for the following commands the project file related switches
-(@emph{-P}, @emph{-X} and @emph{-vPx}) may be used in addition to
-the switches of the invoking tool:
-
-
-
-@itemize *
-
-@item 
-BIND
-
-@item 
-COMP or COMPILE
-
-@item 
-FIND
-
-@item 
-LS or LIST
-
-@item 
-LINK
-
-@item 
-XREF
-@end itemize
-
-
-For each of the following commands, there is optionally a corresponding
-package in the main project.
-
-
-
-@itemize *
-
-@item 
-package @cite{Binder} for command BIND (invoking @cite{gnatbind})
-
-@item 
-package @cite{Compiler} for command COMP or COMPILE (invoking the compiler)
-
-@item 
-package @cite{Cross_Reference} for command XREF (invoking @cite{gnatxref})
-
-@item 
-package @cite{Finder} for command FIND (invoking @cite{gnatfind})
-
-@item 
-package @cite{Gnatls} for command LS or LIST (invoking @cite{gnatls})
-
-@item 
-package @cite{Linker} for command LINK (invoking @cite{gnatlink})
-@end itemize
-
-Package @cite{Gnatls} has a unique attribute @cite{Switches},
-a simple variable with a string list value. It contains switches
-for the invocation of @cite{gnatls}.
-
-@quotation
-
-@example
-project Proj1 is
-   package gnatls is
-      for Switches
-          use ("-a",
-               "-v");
-   end gnatls;
-end Proj1;
-@end example
-@end quotation
-
-All other packages have two attribute @cite{Switches} and
-@cite{Default_Switches}.
-
-@cite{Switches} is an indexed attribute, indexed by the
-source file name, that has a string list value: the switches to be
-used when the tool corresponding to the package is invoked for the specific
-source file.
-
-@cite{Default_Switches} is an attribute,
-indexed by  the programming language that has a string list value.
-@cite{Default_Switches ("Ada")} contains the
-switches for the invocation of the tool corresponding
-to the package, except if a specific @cite{Switches} attribute
-is specified for the source file.
-
-@quotation
-
-@example
-project Proj is
-
-   for Source_Dirs use ("");
-
-   package gnatls is
-      for Switches use
-          ("-a",
-           "-v");
-   end gnatls;
-
-   package Compiler is
-      for Default_Switches ("Ada")
-          use ("-gnatv",
-               "-gnatwa");
-   end Binder;
-
-   package Binder is
-      for Default_Switches ("Ada")
-          use ("-C",
-               "-e");
-   end Binder;
-
-   package Linker is
-      for Default_Switches ("Ada")
-          use ("-C");
-      for Switches ("main.adb")
-          use ("-C",
-               "-v",
-               "-v");
-   end Linker;
-
-   package Finder is
-      for Default_Switches ("Ada")
-           use ("-a",
-                "-f");
-   end Finder;
-
-   package Cross_Reference is
-      for Default_Switches ("Ada")
-          use ("-a",
-               "-f",
-               "-d",
-               "-u");
-   end Cross_Reference;
-end Proj;
-@end example
-@end quotation
-
-With the above project file, commands such as
-
-@quotation
-
-@example
-$ gnat comp -Pproj main
-$ gnat ls -Pproj main
-$ gnat xref -Pproj main
-$ gnat bind -Pproj main.ali
-$ gnat link -Pproj main.ali
-@end example
-@end quotation
-
-will set up the environment properly and invoke the tool with the switches
-found in the package corresponding to the tool:
-@cite{Default_Switches ("Ada")} for all tools,
-except @cite{Switches ("main.adb")}
-for @cite{gnatlink}.
-
-
-@node GNAT Utility Programs,GNAT and Program Execution,Tools Supporting Project Files,Top
-@anchor{gnat_ugn/gnat_utility_programs doc}@anchor{1cf}@anchor{gnat_ugn/gnat_utility_programs gnat-utility-programs}@anchor{d}@anchor{gnat_ugn/gnat_utility_programs id1}@anchor{1d0}
+@node GNAT Utility Programs,GNAT and Program Execution,Building Executable Programs with GNAT,Top
+@anchor{gnat_ugn/gnat_utility_programs doc}@anchor{141}@anchor{gnat_ugn/gnat_utility_programs gnat-utility-programs}@anchor{b}@anchor{gnat_ugn/gnat_utility_programs id1}@anchor{142}
 @chapter GNAT Utility Programs
 
 
@@ -23339,16 +16858,16 @@ This chapter describes a number of utility programs:
 @itemize *
 
 @item 
-@ref{22,,The File Cleanup Utility gnatclean}
+@ref{20,,The File Cleanup Utility gnatclean}
 
 @item 
-@ref{23,,The GNAT Library Browser gnatls}
+@ref{21,,The GNAT Library Browser gnatls}
 
 @item 
-@ref{24,,The Cross-Referencing Tools gnatxref and gnatfind}
+@ref{22,,The Cross-Referencing Tools gnatxref and gnatfind}
 
 @item 
-@ref{25,,The Ada to HTML Converter gnathtml}
+@ref{23,,The Ada to HTML Converter gnathtml}
 @end itemize
 
 Other GNAT utilities are described elsewhere in this manual:
@@ -23357,16 +16876,16 @@ Other GNAT utilities are described elsewhere in this manual:
 @itemize *
 
 @item 
-@ref{5b,,Handling Arbitrary File Naming Conventions with gnatname}
+@ref{59,,Handling Arbitrary File Naming Conventions with gnatname}
 
 @item 
-@ref{65,,File Name Krunching with gnatkr}
+@ref{63,,File Name Krunching with gnatkr}
 
 @item 
-@ref{38,,Renaming Files with gnatchop}
+@ref{36,,Renaming Files with gnatchop}
 
 @item 
-@ref{19,,Preprocessing with gnatprep}
+@ref{17,,Preprocessing with gnatprep}
 @end itemize
 
 @menu
@@ -23378,7 +16897,7 @@ Other GNAT utilities are described elsewhere in this manual:
 @end menu
 
 @node The File Cleanup Utility gnatclean,The GNAT Library Browser gnatls,,GNAT Utility Programs
-@anchor{gnat_ugn/gnat_utility_programs id2}@anchor{1d1}@anchor{gnat_ugn/gnat_utility_programs the-file-cleanup-utility-gnatclean}@anchor{22}
+@anchor{gnat_ugn/gnat_utility_programs id2}@anchor{143}@anchor{gnat_ugn/gnat_utility_programs the-file-cleanup-utility-gnatclean}@anchor{20}
 @section The File Cleanup Utility @emph{gnatclean}
 
 
@@ -23398,7 +16917,7 @@ generated files and executable files.
 @end menu
 
 @node Running gnatclean,Switches for gnatclean,,The File Cleanup Utility gnatclean
-@anchor{gnat_ugn/gnat_utility_programs running-gnatclean}@anchor{1d2}@anchor{gnat_ugn/gnat_utility_programs id3}@anchor{1d3}
+@anchor{gnat_ugn/gnat_utility_programs running-gnatclean}@anchor{144}@anchor{gnat_ugn/gnat_utility_programs id3}@anchor{145}
 @subsection Running @cite{gnatclean}
 
 
@@ -23422,7 +16941,7 @@ the linker. In informative-only mode, specified by switch
 normal mode is listed, but no file is actually deleted.
 
 @node Switches for gnatclean,,Running gnatclean,The File Cleanup Utility gnatclean
-@anchor{gnat_ugn/gnat_utility_programs id4}@anchor{1d4}@anchor{gnat_ugn/gnat_utility_programs switches-for-gnatclean}@anchor{1d5}
+@anchor{gnat_ugn/gnat_utility_programs id4}@anchor{146}@anchor{gnat_ugn/gnat_utility_programs switches-for-gnatclean}@anchor{147}
 @subsection Switches for @cite{gnatclean}
 
 
@@ -23573,7 +17092,7 @@ Verbose mode.
 @item @code{-vP@emph{x}}
 
 Indicates the verbosity of the parsing of GNAT project files.
-@ref{e6,,Switches Related to Project Files}.
+@ref{de,,Switches Related to Project Files}.
 @end table
 
 @geindex -X (gnatclean)
@@ -23586,7 +17105,7 @@ Indicates the verbosity of the parsing of GNAT project files.
 Indicates that external variable @cite{name} has the value @cite{value}.
 The Project Manager will use this value for occurrences of
 @cite{external(name)} when parsing the project file.
-@ref{e6,,Switches Related to Project Files}.
+@ref{de,,Switches Related to Project Files}.
 @end table
 
 @geindex -aO (gnatclean)
@@ -23624,7 +17143,7 @@ where @cite{gnatclean} was invoked.
 @end table
 
 @node The GNAT Library Browser gnatls,The Cross-Referencing Tools gnatxref and gnatfind,The File Cleanup Utility gnatclean,GNAT Utility Programs
-@anchor{gnat_ugn/gnat_utility_programs the-gnat-library-browser-gnatls}@anchor{23}@anchor{gnat_ugn/gnat_utility_programs id5}@anchor{1d6}
+@anchor{gnat_ugn/gnat_utility_programs the-gnat-library-browser-gnatls}@anchor{21}@anchor{gnat_ugn/gnat_utility_programs id5}@anchor{148}
 @section The GNAT Library Browser @cite{gnatls}
 
 
@@ -23638,7 +17157,7 @@ files. It can also be used to check the source dependencies of a unit
 as well as various characteristics.
 
 Note: to invoke @cite{gnatls} with a project file, use the @cite{gnat}
-driver (see @ref{122,,The GNAT Driver and Project Files}).
+driver (see @emph{The_GNAT_Driver_and_Project_Files}).
 
 @menu
 * Running gnatls:: 
@@ -23648,7 +17167,7 @@ driver (see @ref{122,,The GNAT Driver and Project Files}).
 @end menu
 
 @node Running gnatls,Switches for gnatls,,The GNAT Library Browser gnatls
-@anchor{gnat_ugn/gnat_utility_programs id6}@anchor{1d7}@anchor{gnat_ugn/gnat_utility_programs running-gnatls}@anchor{1d8}
+@anchor{gnat_ugn/gnat_utility_programs id6}@anchor{149}@anchor{gnat_ugn/gnat_utility_programs running-gnatls}@anchor{14a}
 @subsection Running @cite{gnatls}
 
 
@@ -23662,7 +17181,7 @@ $ gnatls switches `object_or_ali_file`
 @end quotation
 
 The main argument is the list of object or @code{ali} files
-(see @ref{44,,The Ada Library Information Files})
+(see @ref{42,,The Ada Library Information Files})
 for which information is requested.
 
 In normal mode, without additional option, @cite{gnatls} produces a
@@ -23728,7 +17247,7 @@ version of the same source that has been modified.
 @end table
 
 @node Switches for gnatls,Example of gnatls Usage,Running gnatls,The GNAT Library Browser gnatls
-@anchor{gnat_ugn/gnat_utility_programs id7}@anchor{1d9}@anchor{gnat_ugn/gnat_utility_programs switches-for-gnatls}@anchor{1da}
+@anchor{gnat_ugn/gnat_utility_programs id7}@anchor{14b}@anchor{gnat_ugn/gnat_utility_programs switches-for-gnatls}@anchor{14c}
 @subsection Switches for @cite{gnatls}
 
 
@@ -23843,7 +17362,7 @@ Several such switches may be specified simultaneously.
 @item @code{-aO@emph{dir}}, @code{-aI@emph{dir}}, @code{-I@emph{dir}}, @code{-I-}, @code{-nostdinc}
 
 Source path manipulation. Same meaning as the equivalent @emph{gnatmake}
-flags (@ref{e2,,Switches for gnatmake}).
+flags (@ref{dc,,Switches for gnatmake}).
 @end table
 
 @geindex -aP (gnatls)
@@ -23864,7 +17383,7 @@ Add @cite{dir} at the beginning of the project search dir.
 @item @code{--RTS=@emph{rts-path}`}
 
 Specifies the default location of the runtime library. Same meaning as the
-equivalent @emph{gnatmake} flag (@ref{e2,,Switches for gnatmake}).
+equivalent @emph{gnatmake} flag (@ref{dc,,Switches for gnatmake}).
 @end table
 
 @geindex -v (gnatls)
@@ -23910,7 +17429,7 @@ by the user.
 @end table
 
 @node Example of gnatls Usage,,Switches for gnatls,The GNAT Library Browser gnatls
-@anchor{gnat_ugn/gnat_utility_programs id8}@anchor{1db}@anchor{gnat_ugn/gnat_utility_programs example-of-gnatls-usage}@anchor{1dc}
+@anchor{gnat_ugn/gnat_utility_programs id8}@anchor{14d}@anchor{gnat_ugn/gnat_utility_programs example-of-gnatls-usage}@anchor{14e}
 @subsection Example of @cite{gnatls} Usage
 
 
@@ -23990,7 +17509,7 @@ instr.ads
 @end quotation
 
 @node The Cross-Referencing Tools gnatxref and gnatfind,The Ada to HTML Converter gnathtml,The GNAT Library Browser gnatls,GNAT Utility Programs
-@anchor{gnat_ugn/gnat_utility_programs the-cross-referencing-tools-gnatxref-and-gnatfind}@anchor{24}@anchor{gnat_ugn/gnat_utility_programs id9}@anchor{1dd}
+@anchor{gnat_ugn/gnat_utility_programs the-cross-referencing-tools-gnatxref-and-gnatfind}@anchor{22}@anchor{gnat_ugn/gnat_utility_programs id9}@anchor{14f}
 @section The Cross-Referencing Tools @cite{gnatxref} and @cite{gnatfind}
 
 
@@ -24018,11 +17537,11 @@ cross-references.
 
 To use these tools, you must not compile your application using the
 @emph{-gnatx} switch on the @emph{gnatmake} command line
-(see @ref{1d,,Building with gnatmake}). Otherwise, cross-referencing
+(see @ref{1b,,Building with gnatmake}). Otherwise, cross-referencing
 information will not be generated.
 
 Note: to invoke @cite{gnatxref} or @cite{gnatfind} with a project file,
-use the @cite{gnat} driver (see @ref{122,,The GNAT Driver and Project Files}).
+use the @cite{gnat} driver (see @emph{The_GNAT_Driver_and_Project_Files}).
 
 @menu
 * gnatxref Switches:: 
@@ -24035,7 +17554,7 @@ use the @cite{gnat} driver (see @ref{122,,The GNAT Driver and Project Files}).
 @end menu
 
 @node gnatxref Switches,gnatfind Switches,,The Cross-Referencing Tools gnatxref and gnatfind
-@anchor{gnat_ugn/gnat_utility_programs id10}@anchor{1de}@anchor{gnat_ugn/gnat_utility_programs gnatxref-switches}@anchor{1df}
+@anchor{gnat_ugn/gnat_utility_programs id10}@anchor{150}@anchor{gnat_ugn/gnat_utility_programs gnatxref-switches}@anchor{151}
 @subsection @cite{gnatxref} Switches
 
 
@@ -24170,7 +17689,7 @@ default, which means that only the new extension will be considered.
 @item @code{-RTS=@emph{rts-path}}
 
 Specifies the default location of the runtime library. Same meaning as the
-equivalent @emph{gnatmake} flag (@ref{e2,,Switches for gnatmake}).
+equivalent @emph{gnatmake} flag (@ref{dc,,Switches for gnatmake}).
 @end table
 
 @geindex -d (gnatxref)
@@ -24225,7 +17744,8 @@ Equivalent to @code{-aODIR -aIDIR}.
 
 @item @code{p@emph{FILE}}
 
-Specify a project file to use @ref{b,,GNAT Project Manager}.
+Specify a project file to use (see the @emph{GNAT_Project_Manager}
+chapter in the @emph{GPRbuild User's Guide}).
 If you need to use the @code{.gpr}
 project files, you should use gnatxref through the GNAT driver
 (@emph{gnat xref -Pproject}).
@@ -24248,7 +17768,7 @@ display every unused entity and 'with'ed package.
 
 Instead of producing the default output, @cite{gnatxref} will generate a
 @code{tags} file that can be used by vi. For examples how to use this
-feature, see @ref{1e0,,Examples of gnatxref Usage}. The tags file is output
+feature, see @ref{152,,Examples of gnatxref Usage}. The tags file is output
 to the standard output, thus you will have to redirect it to a file.
 @end table
 
@@ -24257,7 +17777,7 @@ appear after the file names. They need not be separated by spaces, thus
 you can say @code{gnatxref -ag} instead of @code{gnatxref -a -g}.
 
 @node gnatfind Switches,Project Files for gnatxref and gnatfind,gnatxref Switches,The Cross-Referencing Tools gnatxref and gnatfind
-@anchor{gnat_ugn/gnat_utility_programs id11}@anchor{1e1}@anchor{gnat_ugn/gnat_utility_programs gnatfind-switches}@anchor{1e2}
+@anchor{gnat_ugn/gnat_utility_programs id11}@anchor{153}@anchor{gnat_ugn/gnat_utility_programs gnatfind-switches}@anchor{154}
 @subsection @cite{gnatfind} Switches
 
 
@@ -24279,7 +17799,7 @@ with the following iterpretation of the command arguments:
 @item @emph{pattern}
 
 An entity will be output only if it matches the regular expression found
-in @cite{pattern}, see @ref{1e3,,Regular Expressions in gnatfind and gnatxref}.
+in @cite{pattern}, see @ref{155,,Regular Expressions in gnatfind and gnatxref}.
 
 Omitting the pattern is equivalent to specifying @code{*}, which
 will match any entity. Note that if you do not provide a pattern, you
@@ -24293,7 +17813,7 @@ for matching purposes. At the current time there is no support for
 
 @cite{gnatfind} will look for references, bodies or declarations
 of symbols referenced in @code{sourcefile}, at line @cite{line}
-and column @cite{column}. See @ref{1e4,,Examples of gnatfind Usage}
+and column @cite{column}. See @ref{156,,Examples of gnatfind Usage}
 for syntax examples.
 
 @item @emph{line}
@@ -24432,7 +17952,7 @@ default, which means that only the new extension will be considered.
 @item @code{-RTS=@emph{rts-path}}
 
 Specifies the default location of the runtime library. Same meaning as the
-equivalent @emph{gnatmake} flag (@ref{e2,,Switches for gnatmake}).
+equivalent @emph{gnatmake} flag (@ref{dc,,Switches for gnatmake}).
 @end table
 
 @geindex -d (gnatfind)
@@ -24499,7 +18019,8 @@ Equivalent to @code{-aODIR -aIDIR}.
 
 @item @code{p@emph{FILE}}
 
-Specify a project file (@ref{b,,GNAT Project Manager}) to use.
+Specify a project file (see the @emph{GNAT_Project_Manager} chapter in the
+@emph{GPRbuild User's Guide}).
 By default, @cite{gnatxref} and @cite{gnatfind} will try to locate a
 project file in the current directory.
 
@@ -24557,7 +18078,7 @@ search path. You can force it to look only in the current directory if
 you specify @cite{*} at the end of the command line.
 
 @node Project Files for gnatxref and gnatfind,Regular Expressions in gnatfind and gnatxref,gnatfind Switches,The Cross-Referencing Tools gnatxref and gnatfind
-@anchor{gnat_ugn/gnat_utility_programs project-files-for-gnatxref-and-gnatfind}@anchor{1e5}@anchor{gnat_ugn/gnat_utility_programs id12}@anchor{1e6}
+@anchor{gnat_ugn/gnat_utility_programs project-files-for-gnatxref-and-gnatfind}@anchor{157}@anchor{gnat_ugn/gnat_utility_programs id12}@anchor{158}
 @subsection Project Files for @emph{gnatxref} and @emph{gnatfind}
 
 
@@ -24698,7 +18219,7 @@ Specifies the command used to debug the application
 @cite{src_dir} and @cite{obj_dir} lines, and ignore the others.
 
 @node Regular Expressions in gnatfind and gnatxref,Examples of gnatxref Usage,Project Files for gnatxref and gnatfind,The Cross-Referencing Tools gnatxref and gnatfind
-@anchor{gnat_ugn/gnat_utility_programs id13}@anchor{1e7}@anchor{gnat_ugn/gnat_utility_programs regular-expressions-in-gnatfind-and-gnatxref}@anchor{1e3}
+@anchor{gnat_ugn/gnat_utility_programs id13}@anchor{159}@anchor{gnat_ugn/gnat_utility_programs regular-expressions-in-gnatfind-and-gnatxref}@anchor{155}
 @subsection Regular Expressions in @cite{gnatfind} and @cite{gnatxref}
 
 
@@ -24791,7 +18312,7 @@ least one character.
 @end itemize
 
 @node Examples of gnatxref Usage,Examples of gnatfind Usage,Regular Expressions in gnatfind and gnatxref,The Cross-Referencing Tools gnatxref and gnatfind
-@anchor{gnat_ugn/gnat_utility_programs examples-of-gnatxref-usage}@anchor{1e0}@anchor{gnat_ugn/gnat_utility_programs id14}@anchor{1e8}
+@anchor{gnat_ugn/gnat_utility_programs examples-of-gnatxref-usage}@anchor{152}@anchor{gnat_ugn/gnat_utility_programs id14}@anchor{15a}
 @subsection Examples of @cite{gnatxref} Usage
 
 
@@ -24802,7 +18323,7 @@ least one character.
 @end menu
 
 @node General Usage,Using gnatxref with vi,,Examples of gnatxref Usage
-@anchor{gnat_ugn/gnat_utility_programs general-usage}@anchor{1e9}
+@anchor{gnat_ugn/gnat_utility_programs general-usage}@anchor{15b}
 @subsubsection General Usage
 
 
@@ -24902,7 +18423,7 @@ of these.
 @end quotation
 
 @node Using gnatxref with vi,,General Usage,Examples of gnatxref Usage
-@anchor{gnat_ugn/gnat_utility_programs using-gnatxref-with-vi}@anchor{1ea}
+@anchor{gnat_ugn/gnat_utility_programs using-gnatxref-with-vi}@anchor{15c}
 @subsubsection Using gnatxref with vi
 
 
@@ -24933,7 +18454,7 @@ From @emph{vi}, you can then use the command @code{:tag @emph{entity}}
 display a new file with the corresponding declaration of entity.
 
 @node Examples of gnatfind Usage,,Examples of gnatxref Usage,The Cross-Referencing Tools gnatxref and gnatfind
-@anchor{gnat_ugn/gnat_utility_programs id15}@anchor{1eb}@anchor{gnat_ugn/gnat_utility_programs examples-of-gnatfind-usage}@anchor{1e4}
+@anchor{gnat_ugn/gnat_utility_programs id15}@anchor{15d}@anchor{gnat_ugn/gnat_utility_programs examples-of-gnatfind-usage}@anchor{156}
 @subsection Examples of @cite{gnatfind} Usage
 
 
@@ -25008,14 +18529,14 @@ point to any character in the middle of the identifier.
 @end itemize
 
 @node The Ada to HTML Converter gnathtml,,The Cross-Referencing Tools gnatxref and gnatfind,GNAT Utility Programs
-@anchor{gnat_ugn/gnat_utility_programs the-ada-to-html-converter-gnathtml}@anchor{25}@anchor{gnat_ugn/gnat_utility_programs id16}@anchor{1ec}
+@anchor{gnat_ugn/gnat_utility_programs the-ada-to-html-converter-gnathtml}@anchor{23}@anchor{gnat_ugn/gnat_utility_programs id16}@anchor{15e}
 @section The Ada to HTML Converter @cite{gnathtml}
 
 
 @geindex gnathtml
 
 @emph{gnathtml} is a Perl script that allows Ada source files to be browsed using
-standard Web browsers. For installation information, see @ref{1ed,,Installing gnathtml}.
+standard Web browsers. For installation information, see @ref{15f,,Installing gnathtml}.
 
 Ada reserved keywords are highlighted in a bold font and Ada comments in
 a blue font. Unless your program was compiled with the gcc @emph{-gnatx}
@@ -25030,7 +18551,7 @@ be able to click on any identifier and go to its declaration.
 @end menu
 
 @node Invoking gnathtml,Installing gnathtml,,The Ada to HTML Converter gnathtml
-@anchor{gnat_ugn/gnat_utility_programs invoking-gnathtml}@anchor{1ee}@anchor{gnat_ugn/gnat_utility_programs id17}@anchor{1ef}
+@anchor{gnat_ugn/gnat_utility_programs invoking-gnathtml}@anchor{160}@anchor{gnat_ugn/gnat_utility_programs id17}@anchor{161}
 @subsection Invoking @emph{gnathtml}
 
 
@@ -25196,7 +18717,7 @@ systems.
 @end table
 
 @node Installing gnathtml,,Invoking gnathtml,The Ada to HTML Converter gnathtml
-@anchor{gnat_ugn/gnat_utility_programs installing-gnathtml}@anchor{1ed}@anchor{gnat_ugn/gnat_utility_programs id18}@anchor{1f0}
+@anchor{gnat_ugn/gnat_utility_programs installing-gnathtml}@anchor{15f}@anchor{gnat_ugn/gnat_utility_programs id18}@anchor{162}
 @subsection Installing @cite{gnathtml}
 
 
@@ -25236,10 +18757,11 @@ $ perl gnathtml.pl [`switches`] `files`
 
 
 
+
 @c -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
 
 @node GNAT and Program Execution,Platform-Specific Information,GNAT Utility Programs,Top
-@anchor{gnat_ugn/gnat_and_program_execution gnat-and-program-execution}@anchor{e}@anchor{gnat_ugn/gnat_and_program_execution doc}@anchor{1f1}@anchor{gnat_ugn/gnat_and_program_execution id1}@anchor{1f2}
+@anchor{gnat_ugn/gnat_and_program_execution gnat-and-program-execution}@anchor{c}@anchor{gnat_ugn/gnat_and_program_execution doc}@anchor{163}@anchor{gnat_ugn/gnat_and_program_execution id1}@anchor{164}
 @chapter GNAT and Program Execution
 
 
@@ -25249,25 +18771,25 @@ This chapter covers several topics:
 @itemize *
 
 @item 
-@ref{1f3,,Running and Debugging Ada Programs}
+@ref{165,,Running and Debugging Ada Programs}
 
 @item 
-@ref{1f4,,Code Coverage and Profiling}
+@ref{166,,Code Coverage and Profiling}
 
 @item 
-@ref{1f5,,Improving Performance}
+@ref{167,,Improving Performance}
 
 @item 
-@ref{1f6,,Overflow Check Handling in GNAT}
+@ref{168,,Overflow Check Handling in GNAT}
 
 @item 
-@ref{1f7,,Performing Dimensionality Analysis in GNAT}
+@ref{169,,Performing Dimensionality Analysis in GNAT}
 
 @item 
-@ref{1f8,,Stack Related Facilities}
+@ref{16a,,Stack Related Facilities}
 
 @item 
-@ref{1f9,,Memory Management Issues}
+@ref{16b,,Memory Management Issues}
 @end itemize
 
 @menu
@@ -25282,7 +18804,7 @@ This chapter covers several topics:
 @end menu
 
 @node Running and Debugging Ada Programs,Code Coverage and Profiling,,GNAT and Program Execution
-@anchor{gnat_ugn/gnat_and_program_execution id2}@anchor{1f3}@anchor{gnat_ugn/gnat_and_program_execution running-and-debugging-ada-programs}@anchor{26}
+@anchor{gnat_ugn/gnat_and_program_execution id2}@anchor{165}@anchor{gnat_ugn/gnat_and_program_execution running-and-debugging-ada-programs}@anchor{24}
 @section Running and Debugging Ada Programs
 
 
@@ -25335,7 +18857,7 @@ the incorrect user program.
 @end menu
 
 @node The GNAT Debugger GDB,Running GDB,,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution the-gnat-debugger-gdb}@anchor{1fa}@anchor{gnat_ugn/gnat_and_program_execution id3}@anchor{1fb}
+@anchor{gnat_ugn/gnat_and_program_execution the-gnat-debugger-gdb}@anchor{16c}@anchor{gnat_ugn/gnat_and_program_execution id3}@anchor{16d}
 @subsection The GNAT Debugger GDB
 
 
@@ -25392,7 +18914,7 @@ the debugging information and can respond to user commands to inspect
 variables, and more generally to report on the state of execution.
 
 @node Running GDB,Introduction to GDB Commands,The GNAT Debugger GDB,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution id4}@anchor{1fc}@anchor{gnat_ugn/gnat_and_program_execution running-gdb}@anchor{1fd}
+@anchor{gnat_ugn/gnat_and_program_execution id4}@anchor{16e}@anchor{gnat_ugn/gnat_and_program_execution running-gdb}@anchor{16f}
 @subsection Running GDB
 
 
@@ -25419,7 +18941,7 @@ exactly as if the debugger were not present. The following section
 describes some of the additional commands that can be given to @cite{GDB}.
 
 @node Introduction to GDB Commands,Using Ada Expressions,Running GDB,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution introduction-to-gdb-commands}@anchor{1fe}@anchor{gnat_ugn/gnat_and_program_execution id5}@anchor{1ff}
+@anchor{gnat_ugn/gnat_and_program_execution introduction-to-gdb-commands}@anchor{170}@anchor{gnat_ugn/gnat_and_program_execution id5}@anchor{171}
 @subsection Introduction to GDB Commands
 
 
@@ -25627,7 +19149,7 @@ Note that most commands can be abbreviated
 (for example, c for continue, bt for backtrace).
 
 @node Using Ada Expressions,Calling User-Defined Subprograms,Introduction to GDB Commands,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution id6}@anchor{200}@anchor{gnat_ugn/gnat_and_program_execution using-ada-expressions}@anchor{201}
+@anchor{gnat_ugn/gnat_and_program_execution id6}@anchor{172}@anchor{gnat_ugn/gnat_and_program_execution using-ada-expressions}@anchor{173}
 @subsection Using Ada Expressions
 
 
@@ -25665,7 +19187,7 @@ their packages, regardless of context. Where this causes ambiguity,
 For details on the supported Ada syntax, see @cite{Debugging with GDB}.
 
 @node Calling User-Defined Subprograms,Using the next Command in a Function,Using Ada Expressions,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution id7}@anchor{202}@anchor{gnat_ugn/gnat_and_program_execution calling-user-defined-subprograms}@anchor{203}
+@anchor{gnat_ugn/gnat_and_program_execution id7}@anchor{174}@anchor{gnat_ugn/gnat_and_program_execution calling-user-defined-subprograms}@anchor{175}
 @subsection Calling User-Defined Subprograms
 
 
@@ -25724,7 +19246,7 @@ elements directly from GDB, you can write a callable procedure that prints
 the elements in the desired format.
 
 @node Using the next Command in a Function,Stopping When Ada Exceptions Are Raised,Calling User-Defined Subprograms,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution using-the-next-command-in-a-function}@anchor{204}@anchor{gnat_ugn/gnat_and_program_execution id8}@anchor{205}
+@anchor{gnat_ugn/gnat_and_program_execution using-the-next-command-in-a-function}@anchor{176}@anchor{gnat_ugn/gnat_and_program_execution id8}@anchor{177}
 @subsection Using the @emph{next} Command in a Function
 
 
@@ -25747,7 +19269,7 @@ The value returned is always that from the first return statement
 that was stepped through.
 
 @node Stopping When Ada Exceptions Are Raised,Ada Tasks,Using the next Command in a Function,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution stopping-when-ada-exceptions-are-raised}@anchor{206}@anchor{gnat_ugn/gnat_and_program_execution id9}@anchor{207}
+@anchor{gnat_ugn/gnat_and_program_execution stopping-when-ada-exceptions-are-raised}@anchor{178}@anchor{gnat_ugn/gnat_and_program_execution id9}@anchor{179}
 @subsection Stopping When Ada Exceptions Are Raised
 
 
@@ -25804,7 +19326,7 @@ argument, prints out only those exceptions whose name matches @cite{regexp}.
 @geindex Tasks (in gdb)
 
 @node Ada Tasks,Debugging Generic Units,Stopping When Ada Exceptions Are Raised,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution ada-tasks}@anchor{208}@anchor{gnat_ugn/gnat_and_program_execution id10}@anchor{209}
+@anchor{gnat_ugn/gnat_and_program_execution ada-tasks}@anchor{17a}@anchor{gnat_ugn/gnat_and_program_execution id10}@anchor{17b}
 @subsection Ada Tasks
 
 
@@ -25891,7 +19413,7 @@ see @cite{Debugging with GDB}.
 @geindex Generics
 
 @node Debugging Generic Units,Remote Debugging with gdbserver,Ada Tasks,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution debugging-generic-units}@anchor{20a}@anchor{gnat_ugn/gnat_and_program_execution id11}@anchor{20b}
+@anchor{gnat_ugn/gnat_and_program_execution debugging-generic-units}@anchor{17c}@anchor{gnat_ugn/gnat_and_program_execution id11}@anchor{17d}
 @subsection Debugging Generic Units
 
 
@@ -25950,7 +19472,7 @@ other units.
 @geindex Remote Debugging with gdbserver
 
 @node Remote Debugging with gdbserver,GNAT Abnormal Termination or Failure to Terminate,Debugging Generic Units,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution remote-debugging-with-gdbserver}@anchor{20c}@anchor{gnat_ugn/gnat_and_program_execution id12}@anchor{20d}
+@anchor{gnat_ugn/gnat_and_program_execution remote-debugging-with-gdbserver}@anchor{17e}@anchor{gnat_ugn/gnat_and_program_execution id12}@anchor{17f}
 @subsection Remote Debugging with gdbserver
 
 
@@ -26008,7 +19530,7 @@ GNAT provides support for gdbserver on x86-linux, x86-windows and x86_64-linux.
 @geindex Abnormal Termination or Failure to Terminate
 
 @node GNAT Abnormal Termination or Failure to Terminate,Naming Conventions for GNAT Source Files,Remote Debugging with gdbserver,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution gnat-abnormal-termination-or-failure-to-terminate}@anchor{20e}@anchor{gnat_ugn/gnat_and_program_execution id13}@anchor{20f}
+@anchor{gnat_ugn/gnat_and_program_execution gnat-abnormal-termination-or-failure-to-terminate}@anchor{180}@anchor{gnat_ugn/gnat_and_program_execution id13}@anchor{181}
 @subsection GNAT Abnormal Termination or Failure to Terminate
 
 
@@ -26063,7 +19585,7 @@ Finally, you can start
 @cite{gdb} directly on the @cite{gnat1} executable. @cite{gnat1} is the
 front-end of GNAT, and can be run independently (normally it is just
 called from @emph{gcc}). You can use @cite{gdb} on @cite{gnat1} as you
-would on a C program (but @ref{1fa,,The GNAT Debugger GDB} for caveats). The
+would on a C program (but @ref{16c,,The GNAT Debugger GDB} for caveats). The
 @cite{where} command is the first line of attack; the variable
 @cite{lineno} (seen by @cite{print lineno}), used by the second phase of
 @cite{gnat1} and by the @emph{gcc} backend, indicates the source line at
@@ -26072,7 +19594,7 @@ the source file.
 @end itemize
 
 @node Naming Conventions for GNAT Source Files,Getting Internal Debugging Information,GNAT Abnormal Termination or Failure to Terminate,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution naming-conventions-for-gnat-source-files}@anchor{210}@anchor{gnat_ugn/gnat_and_program_execution id14}@anchor{211}
+@anchor{gnat_ugn/gnat_and_program_execution naming-conventions-for-gnat-source-files}@anchor{182}@anchor{gnat_ugn/gnat_and_program_execution id14}@anchor{183}
 @subsection Naming Conventions for GNAT Source Files
 
 
@@ -26153,7 +19675,7 @@ the other @code{.c} files are modifications of common @emph{gcc} files.
 @end itemize
 
 @node Getting Internal Debugging Information,Stack Traceback,Naming Conventions for GNAT Source Files,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution id15}@anchor{212}@anchor{gnat_ugn/gnat_and_program_execution getting-internal-debugging-information}@anchor{213}
+@anchor{gnat_ugn/gnat_and_program_execution id15}@anchor{184}@anchor{gnat_ugn/gnat_and_program_execution getting-internal-debugging-information}@anchor{185}
 @subsection Getting Internal Debugging Information
 
 
@@ -26181,7 +19703,7 @@ are replaced with run-time calls.
 @geindex stack unwinding
 
 @node Stack Traceback,,Getting Internal Debugging Information,Running and Debugging Ada Programs
-@anchor{gnat_ugn/gnat_and_program_execution stack-traceback}@anchor{214}@anchor{gnat_ugn/gnat_and_program_execution id16}@anchor{215}
+@anchor{gnat_ugn/gnat_and_program_execution stack-traceback}@anchor{186}@anchor{gnat_ugn/gnat_and_program_execution id16}@anchor{187}
 @subsection Stack Traceback
 
 
@@ -26210,7 +19732,7 @@ is enabled, and no exception is raised during program execution.
 @end menu
 
 @node Non-Symbolic Traceback,Symbolic Traceback,,Stack Traceback
-@anchor{gnat_ugn/gnat_and_program_execution non-symbolic-traceback}@anchor{216}@anchor{gnat_ugn/gnat_and_program_execution id17}@anchor{217}
+@anchor{gnat_ugn/gnat_and_program_execution non-symbolic-traceback}@anchor{188}@anchor{gnat_ugn/gnat_and_program_execution id17}@anchor{189}
 @subsubsection Non-Symbolic Traceback
 
 
@@ -26337,7 +19859,7 @@ From this traceback we can see that the exception was raised in
 @code{stb.adb} at line 5, which was reached from a procedure call in
 @code{stb.adb} at line 10, and so on. The @code{b~std.adb} is the binder file,
 which contains the call to the main program.
-@ref{123,,Running gnatbind}. The remaining entries are assorted runtime routines,
+@ref{11a,,Running gnatbind}. The remaining entries are assorted runtime routines,
 and the output will vary from platform to platform.
 
 It is also possible to use @cite{GDB} with these traceback addresses to debug
@@ -26495,7 +20017,7 @@ need to be specified in C format, with a leading '0x').
 @geindex symbolic
 
 @node Symbolic Traceback,,Non-Symbolic Traceback,Stack Traceback
-@anchor{gnat_ugn/gnat_and_program_execution id18}@anchor{218}@anchor{gnat_ugn/gnat_and_program_execution symbolic-traceback}@anchor{219}
+@anchor{gnat_ugn/gnat_and_program_execution id18}@anchor{18a}@anchor{gnat_ugn/gnat_and_program_execution symbolic-traceback}@anchor{18b}
 @subsubsection Symbolic Traceback
 
 
@@ -26627,7 +20149,7 @@ program.
 @geindex Profiling
 
 @node Code Coverage and Profiling,Improving Performance,Running and Debugging Ada Programs,GNAT and Program Execution
-@anchor{gnat_ugn/gnat_and_program_execution id19}@anchor{1f4}@anchor{gnat_ugn/gnat_and_program_execution code-coverage-and-profiling}@anchor{27}
+@anchor{gnat_ugn/gnat_and_program_execution id19}@anchor{166}@anchor{gnat_ugn/gnat_and_program_execution code-coverage-and-profiling}@anchor{25}
 @section Code Coverage and Profiling
 
 
@@ -26643,7 +20165,7 @@ the @cite{gprof} profiler tool on Ada programs.
 @end menu
 
 @node Code Coverage of Ada Programs with gcov,Profiling an Ada Program with gprof,,Code Coverage and Profiling
-@anchor{gnat_ugn/gnat_and_program_execution id20}@anchor{21a}@anchor{gnat_ugn/gnat_and_program_execution code-coverage-of-ada-programs-with-gcov}@anchor{21b}
+@anchor{gnat_ugn/gnat_and_program_execution id20}@anchor{18c}@anchor{gnat_ugn/gnat_and_program_execution code-coverage-of-ada-programs-with-gcov}@anchor{18d}
 @subsection Code Coverage of Ada Programs with gcov
 
 
@@ -26665,7 +20187,7 @@ details some GNAT-specific features.
 @end menu
 
 @node Quick startup guide,GNAT specifics,,Code Coverage of Ada Programs with gcov
-@anchor{gnat_ugn/gnat_and_program_execution id21}@anchor{21c}@anchor{gnat_ugn/gnat_and_program_execution quick-startup-guide}@anchor{21d}
+@anchor{gnat_ugn/gnat_and_program_execution id21}@anchor{18e}@anchor{gnat_ugn/gnat_and_program_execution quick-startup-guide}@anchor{18f}
 @subsubsection Quick startup guide
 
 
@@ -26724,7 +20246,7 @@ This will create annotated source files with a @code{.gcov} extension:
 @code{my_main.adb} file will be analyzed in @code{my_main.adb.gcov}.
 
 @node GNAT specifics,,Quick startup guide,Code Coverage of Ada Programs with gcov
-@anchor{gnat_ugn/gnat_and_program_execution gnat-specifics}@anchor{21e}@anchor{gnat_ugn/gnat_and_program_execution id22}@anchor{21f}
+@anchor{gnat_ugn/gnat_and_program_execution gnat-specifics}@anchor{190}@anchor{gnat_ugn/gnat_and_program_execution id22}@anchor{191}
 @subsubsection GNAT specifics
 
 
@@ -26749,7 +20271,7 @@ not supported as there can be unresolved symbols during the final link.
 @geindex Profiling
 
 @node Profiling an Ada Program with gprof,,Code Coverage of Ada Programs with gcov,Code Coverage and Profiling
-@anchor{gnat_ugn/gnat_and_program_execution profiling-an-ada-program-with-gprof}@anchor{220}@anchor{gnat_ugn/gnat_and_program_execution id23}@anchor{221}
+@anchor{gnat_ugn/gnat_and_program_execution profiling-an-ada-program-with-gprof}@anchor{192}@anchor{gnat_ugn/gnat_and_program_execution id23}@anchor{193}
 @subsection Profiling an Ada Program with gprof
 
 
@@ -26806,7 +20328,7 @@ to interpret the results.
 @end menu
 
 @node Compilation for profiling,Program execution,,Profiling an Ada Program with gprof
-@anchor{gnat_ugn/gnat_and_program_execution id24}@anchor{222}@anchor{gnat_ugn/gnat_and_program_execution compilation-for-profiling}@anchor{223}
+@anchor{gnat_ugn/gnat_and_program_execution id24}@anchor{194}@anchor{gnat_ugn/gnat_and_program_execution compilation-for-profiling}@anchor{195}
 @subsubsection Compilation for profiling
 
 
@@ -26834,7 +20356,7 @@ be profiled; if you need to profile your whole project, use the @code{-f}
 gnatmake switch to force full recompilation.
 
 @node Program execution,Running gprof,Compilation for profiling,Profiling an Ada Program with gprof
-@anchor{gnat_ugn/gnat_and_program_execution program-execution}@anchor{224}@anchor{gnat_ugn/gnat_and_program_execution id25}@anchor{225}
+@anchor{gnat_ugn/gnat_and_program_execution program-execution}@anchor{196}@anchor{gnat_ugn/gnat_and_program_execution id25}@anchor{197}
 @subsubsection Program execution
 
 
@@ -26849,7 +20371,7 @@ generated in the directory where the program was launched from. If this file
 already exists, it will be overwritten.
 
 @node Running gprof,Interpretation of profiling results,Program execution,Profiling an Ada Program with gprof
-@anchor{gnat_ugn/gnat_and_program_execution running-gprof}@anchor{226}@anchor{gnat_ugn/gnat_and_program_execution id26}@anchor{227}
+@anchor{gnat_ugn/gnat_and_program_execution running-gprof}@anchor{198}@anchor{gnat_ugn/gnat_and_program_execution id26}@anchor{199}
 @subsubsection Running gprof
 
 
@@ -26962,7 +20484,7 @@ may be given; only one @cite{function_name} may be indicated with each
 @end table
 
 @node Interpretation of profiling results,,Running gprof,Profiling an Ada Program with gprof
-@anchor{gnat_ugn/gnat_and_program_execution id27}@anchor{228}@anchor{gnat_ugn/gnat_and_program_execution interpretation-of-profiling-results}@anchor{229}
+@anchor{gnat_ugn/gnat_and_program_execution id27}@anchor{19a}@anchor{gnat_ugn/gnat_and_program_execution interpretation-of-profiling-results}@anchor{19b}
 @subsubsection Interpretation of profiling results
 
 
@@ -26979,7 +20501,7 @@ and the subprograms that it calls. It also provides an estimate of the time
 spent in each of those callers/called subprograms.
 
 @node Improving Performance,Overflow Check Handling in GNAT,Code Coverage and Profiling,GNAT and Program Execution
-@anchor{gnat_ugn/gnat_and_program_execution improving-performance}@anchor{28}@anchor{gnat_ugn/gnat_and_program_execution id28}@anchor{1f5}
+@anchor{gnat_ugn/gnat_and_program_execution improving-performance}@anchor{26}@anchor{gnat_ugn/gnat_and_program_execution id28}@anchor{167}
 @section Improving Performance
 
 
@@ -27001,7 +20523,7 @@ which can reduce the size of program executables.
 @end menu
 
 @node Performance Considerations,Text_IO Suggestions,,Improving Performance
-@anchor{gnat_ugn/gnat_and_program_execution id29}@anchor{22a}@anchor{gnat_ugn/gnat_and_program_execution performance-considerations}@anchor{22b}
+@anchor{gnat_ugn/gnat_and_program_execution id29}@anchor{19c}@anchor{gnat_ugn/gnat_and_program_execution performance-considerations}@anchor{19d}
 @subsection Performance Considerations
 
 
@@ -27062,7 +20584,7 @@ some guidelines on debugging optimized code.
 @end menu
 
 @node Controlling Run-Time Checks,Use of Restrictions,,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution controlling-run-time-checks}@anchor{22c}@anchor{gnat_ugn/gnat_and_program_execution id30}@anchor{22d}
+@anchor{gnat_ugn/gnat_and_program_execution controlling-run-time-checks}@anchor{19e}@anchor{gnat_ugn/gnat_and_program_execution id30}@anchor{19f}
 @subsubsection Controlling Run-Time Checks
 
 
@@ -27076,7 +20598,7 @@ necessary checking is done at compile time.
 @geindex -gnato (gcc)
 
 The gnat switch, @emph{-gnatp} allows this default to be modified. See
-@ref{101,,Run-Time Checks}.
+@ref{f9,,Run-Time Checks}.
 
 Our experience is that the default is suitable for most development
 purposes.
@@ -27114,7 +20636,7 @@ remove checks) or @cite{pragma Unsuppress} (to add back suppressed
 checks) in the program source.
 
 @node Use of Restrictions,Optimization Levels,Controlling Run-Time Checks,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution use-of-restrictions}@anchor{22e}@anchor{gnat_ugn/gnat_and_program_execution id31}@anchor{22f}
+@anchor{gnat_ugn/gnat_and_program_execution use-of-restrictions}@anchor{1a0}@anchor{gnat_ugn/gnat_and_program_execution id31}@anchor{1a1}
 @subsubsection Use of Restrictions
 
 
@@ -27149,7 +20671,7 @@ that this also means that you can write code without worrying about the
 possibility of an immediate abort at any point.
 
 @node Optimization Levels,Debugging Optimized Code,Use of Restrictions,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution id32}@anchor{230}@anchor{gnat_ugn/gnat_and_program_execution optimization-levels}@anchor{104}
+@anchor{gnat_ugn/gnat_and_program_execution id32}@anchor{1a2}@anchor{gnat_ugn/gnat_and_program_execution optimization-levels}@anchor{fc}
 @subsubsection Optimization Levels
 
 
@@ -27231,7 +20753,7 @@ the slowest compilation time.
 
 Full optimization as in @emph{-O2};
 also uses more aggressive automatic inlining of subprograms within a unit
-(@ref{117,,Inlining of Subprograms}) and attempts to vectorize loops.
+(@ref{10f,,Inlining of Subprograms}) and attempts to vectorize loops.
 @end table
 
 @item 
@@ -27271,10 +20793,10 @@ levels.
 Note regarding the use of @emph{-O3}: The use of this optimization level
 is generally discouraged with GNAT, since it often results in larger
 executables which may run more slowly. See further discussion of this point
-in @ref{117,,Inlining of Subprograms}.
+in @ref{10f,,Inlining of Subprograms}.
 
 @node Debugging Optimized Code,Inlining of Subprograms,Optimization Levels,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution id33}@anchor{231}@anchor{gnat_ugn/gnat_and_program_execution debugging-optimized-code}@anchor{232}
+@anchor{gnat_ugn/gnat_and_program_execution id33}@anchor{1a3}@anchor{gnat_ugn/gnat_and_program_execution debugging-optimized-code}@anchor{1a4}
 @subsubsection Debugging Optimized Code
 
 
@@ -27402,7 +20924,7 @@ on the resulting executable,
 which removes both debugging information and global symbols.
 
 @node Inlining of Subprograms,Floating_Point_Operations,Debugging Optimized Code,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution id34}@anchor{233}@anchor{gnat_ugn/gnat_and_program_execution inlining-of-subprograms}@anchor{117}
+@anchor{gnat_ugn/gnat_and_program_execution id34}@anchor{1a5}@anchor{gnat_ugn/gnat_and_program_execution inlining-of-subprograms}@anchor{10f}
 @subsubsection Inlining of Subprograms
 
 
@@ -27545,7 +21067,7 @@ indeed you should use @emph{-O3} only if tests show that it actually
 improves performance for your program.
 
 @node Floating_Point_Operations,Vectorization of loops,Inlining of Subprograms,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution floating-point-operations}@anchor{234}@anchor{gnat_ugn/gnat_and_program_execution id35}@anchor{235}
+@anchor{gnat_ugn/gnat_and_program_execution floating-point-operations}@anchor{1a6}@anchor{gnat_ugn/gnat_and_program_execution id35}@anchor{1a7}
 @subsubsection Floating_Point_Operations
 
 
@@ -27593,7 +21115,7 @@ so it is permissible to mix units compiled with and without these
 switches.
 
 @node Vectorization of loops,Other Optimization Switches,Floating_Point_Operations,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution id36}@anchor{236}@anchor{gnat_ugn/gnat_and_program_execution vectorization-of-loops}@anchor{237}
+@anchor{gnat_ugn/gnat_and_program_execution id36}@anchor{1a8}@anchor{gnat_ugn/gnat_and_program_execution vectorization-of-loops}@anchor{1a9}
 @subsubsection Vectorization of loops
 
 
@@ -27744,7 +21266,7 @@ placed immediately within the loop will tell the compiler that it can safely
 omit the non-vectorized version of the loop as well as the run-time test.
 
 @node Other Optimization Switches,Optimization and Strict Aliasing,Vectorization of loops,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution id37}@anchor{238}@anchor{gnat_ugn/gnat_and_program_execution other-optimization-switches}@anchor{239}
+@anchor{gnat_ugn/gnat_and_program_execution id37}@anchor{1aa}@anchor{gnat_ugn/gnat_and_program_execution other-optimization-switches}@anchor{1ab}
 @subsubsection Other Optimization Switches
 
 
@@ -27761,7 +21283,7 @@ the @cite{Submodel Options} section in the @cite{Hardware Models and Configurati
 chapter of @cite{Using the GNU Compiler Collection (GCC)}.
 
 @node Optimization and Strict Aliasing,Aliased Variables and Optimization,Other Optimization Switches,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution optimization-and-strict-aliasing}@anchor{fb}@anchor{gnat_ugn/gnat_and_program_execution id38}@anchor{23a}
+@anchor{gnat_ugn/gnat_and_program_execution optimization-and-strict-aliasing}@anchor{f3}@anchor{gnat_ugn/gnat_and_program_execution id38}@anchor{1ac}
 @subsubsection Optimization and Strict Aliasing
 
 
@@ -28001,7 +21523,7 @@ review any uses of unchecked conversion of access types,
 particularly if you are getting the warnings described above.
 
 @node Aliased Variables and Optimization,Atomic Variables and Optimization,Optimization and Strict Aliasing,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution aliased-variables-and-optimization}@anchor{23b}@anchor{gnat_ugn/gnat_and_program_execution id39}@anchor{23c}
+@anchor{gnat_ugn/gnat_and_program_execution aliased-variables-and-optimization}@anchor{1ad}@anchor{gnat_ugn/gnat_and_program_execution id39}@anchor{1ae}
 @subsubsection Aliased Variables and Optimization
 
 
@@ -28059,7 +21581,7 @@ This means that the above example will in fact "work" reliably,
 that is, it will produce the expected results.
 
 @node Atomic Variables and Optimization,Passive Task Optimization,Aliased Variables and Optimization,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution atomic-variables-and-optimization}@anchor{23d}@anchor{gnat_ugn/gnat_and_program_execution id40}@anchor{23e}
+@anchor{gnat_ugn/gnat_and_program_execution atomic-variables-and-optimization}@anchor{1af}@anchor{gnat_ugn/gnat_and_program_execution id40}@anchor{1b0}
 @subsubsection Atomic Variables and Optimization
 
 
@@ -28140,7 +21662,7 @@ such synchronization code is not required, it may be
 useful to disable it.
 
 @node Passive Task Optimization,,Atomic Variables and Optimization,Performance Considerations
-@anchor{gnat_ugn/gnat_and_program_execution id41}@anchor{23f}@anchor{gnat_ugn/gnat_and_program_execution passive-task-optimization}@anchor{240}
+@anchor{gnat_ugn/gnat_and_program_execution id41}@anchor{1b1}@anchor{gnat_ugn/gnat_and_program_execution passive-task-optimization}@anchor{1b2}
 @subsubsection Passive Task Optimization
 
 
@@ -28185,7 +21707,7 @@ that typically clients of the tasks who call entries, will not have
 to be modified, only the task definition itself.
 
 @node Text_IO Suggestions,Reducing Size of Executables with Unused Subprogram/Data Elimination,Performance Considerations,Improving Performance
-@anchor{gnat_ugn/gnat_and_program_execution text-io-suggestions}@anchor{241}@anchor{gnat_ugn/gnat_and_program_execution id42}@anchor{242}
+@anchor{gnat_ugn/gnat_and_program_execution text-io-suggestions}@anchor{1b3}@anchor{gnat_ugn/gnat_and_program_execution id42}@anchor{1b4}
 @subsection @cite{Text_IO} Suggestions
 
 
@@ -28208,7 +21730,7 @@ of the standard output file, or change the standard output file to
 be buffered using @cite{Interfaces.C_Streams.setvbuf}.
 
 @node Reducing Size of Executables with Unused Subprogram/Data Elimination,,Text_IO Suggestions,Improving Performance
-@anchor{gnat_ugn/gnat_and_program_execution id43}@anchor{243}@anchor{gnat_ugn/gnat_and_program_execution reducing-size-of-executables-with-unused-subprogram-data-elimination}@anchor{244}
+@anchor{gnat_ugn/gnat_and_program_execution id43}@anchor{1b5}@anchor{gnat_ugn/gnat_and_program_execution reducing-size-of-executables-with-unused-subprogram-data-elimination}@anchor{1b6}
 @subsection Reducing Size of Executables with Unused Subprogram/Data Elimination
 
 
@@ -28225,7 +21747,7 @@ your executable just by setting options at compilation time.
 @end menu
 
 @node About unused subprogram/data elimination,Compilation options,,Reducing Size of Executables with Unused Subprogram/Data Elimination
-@anchor{gnat_ugn/gnat_and_program_execution id44}@anchor{245}@anchor{gnat_ugn/gnat_and_program_execution about-unused-subprogram-data-elimination}@anchor{246}
+@anchor{gnat_ugn/gnat_and_program_execution id44}@anchor{1b7}@anchor{gnat_ugn/gnat_and_program_execution about-unused-subprogram-data-elimination}@anchor{1b8}
 @subsubsection About unused subprogram/data elimination
 
 
@@ -28241,7 +21763,7 @@ architecture and on all cross platforms using the ELF binary file format.
 In both cases GNU binutils version 2.16 or later are required to enable it.
 
 @node Compilation options,Example of unused subprogram/data elimination,About unused subprogram/data elimination,Reducing Size of Executables with Unused Subprogram/Data Elimination
-@anchor{gnat_ugn/gnat_and_program_execution id45}@anchor{247}@anchor{gnat_ugn/gnat_and_program_execution compilation-options}@anchor{248}
+@anchor{gnat_ugn/gnat_and_program_execution id45}@anchor{1b9}@anchor{gnat_ugn/gnat_and_program_execution compilation-options}@anchor{1ba}
 @subsubsection Compilation options
 
 
@@ -28280,7 +21802,7 @@ The GNAT static library is now compiled with -ffunction-sections and
 and data of the GNAT library from your executable.
 
 @node Example of unused subprogram/data elimination,,Compilation options,Reducing Size of Executables with Unused Subprogram/Data Elimination
-@anchor{gnat_ugn/gnat_and_program_execution id46}@anchor{249}@anchor{gnat_ugn/gnat_and_program_execution example-of-unused-subprogram-data-elimination}@anchor{24a}
+@anchor{gnat_ugn/gnat_and_program_execution id46}@anchor{1bb}@anchor{gnat_ugn/gnat_and_program_execution example-of-unused-subprogram-data-elimination}@anchor{1bc}
 @subsubsection Example of unused subprogram/data elimination
 
 
@@ -28351,7 +21873,7 @@ appropriate options.
 
 
 @node Overflow Check Handling in GNAT,Performing Dimensionality Analysis in GNAT,Improving Performance,GNAT and Program Execution
-@anchor{gnat_ugn/gnat_and_program_execution id54}@anchor{1f6}@anchor{gnat_ugn/gnat_and_program_execution overflow-check-handling-in-gnat}@anchor{29}
+@anchor{gnat_ugn/gnat_and_program_execution id54}@anchor{168}@anchor{gnat_ugn/gnat_and_program_execution overflow-check-handling-in-gnat}@anchor{27}
 @section Overflow Check Handling in GNAT
 
 
@@ -28367,7 +21889,7 @@ This section explains how to control the handling of overflow checks.
 @end menu
 
 @node Background,Management of Overflows in GNAT,,Overflow Check Handling in GNAT
-@anchor{gnat_ugn/gnat_and_program_execution id55}@anchor{24b}@anchor{gnat_ugn/gnat_and_program_execution background}@anchor{24c}
+@anchor{gnat_ugn/gnat_and_program_execution id55}@anchor{1bd}@anchor{gnat_ugn/gnat_and_program_execution background}@anchor{1be}
 @subsection Background
 
 
@@ -28493,7 +22015,7 @@ exception raised because of the intermediate overflow (and we really
 would prefer this precondition to be considered True at run time).
 
 @node Management of Overflows in GNAT,Specifying the Desired Mode,Background,Overflow Check Handling in GNAT
-@anchor{gnat_ugn/gnat_and_program_execution id56}@anchor{24d}@anchor{gnat_ugn/gnat_and_program_execution management-of-overflows-in-gnat}@anchor{24e}
+@anchor{gnat_ugn/gnat_and_program_execution id56}@anchor{1bf}@anchor{gnat_ugn/gnat_and_program_execution management-of-overflows-in-gnat}@anchor{1c0}
 @subsection Management of Overflows in GNAT
 
 
@@ -28607,7 +22129,7 @@ out in the normal manner (with infinite values always failing all
 range checks).
 
 @node Specifying the Desired Mode,Default Settings,Management of Overflows in GNAT,Overflow Check Handling in GNAT
-@anchor{gnat_ugn/gnat_and_program_execution specifying-the-desired-mode}@anchor{100}@anchor{gnat_ugn/gnat_and_program_execution id57}@anchor{24f}
+@anchor{gnat_ugn/gnat_and_program_execution specifying-the-desired-mode}@anchor{f8}@anchor{gnat_ugn/gnat_and_program_execution id57}@anchor{1c1}
 @subsection Specifying the Desired Mode
 
 
@@ -28732,7 +22254,7 @@ causing all intermediate operations to be computed using the base
 type (@cite{STRICT} mode).
 
 @node Default Settings,Implementation Notes,Specifying the Desired Mode,Overflow Check Handling in GNAT
-@anchor{gnat_ugn/gnat_and_program_execution id58}@anchor{250}@anchor{gnat_ugn/gnat_and_program_execution default-settings}@anchor{251}
+@anchor{gnat_ugn/gnat_and_program_execution id58}@anchor{1c2}@anchor{gnat_ugn/gnat_and_program_execution default-settings}@anchor{1c3}
 @subsection Default Settings
 
 
@@ -28779,7 +22301,7 @@ checking, but it has no effect on the method used for computing
 intermediate results.
 
 @node Implementation Notes,,Default Settings,Overflow Check Handling in GNAT
-@anchor{gnat_ugn/gnat_and_program_execution implementation-notes}@anchor{252}@anchor{gnat_ugn/gnat_and_program_execution id59}@anchor{253}
+@anchor{gnat_ugn/gnat_and_program_execution implementation-notes}@anchor{1c4}@anchor{gnat_ugn/gnat_and_program_execution id59}@anchor{1c5}
 @subsection Implementation Notes
 
 
@@ -28827,7 +22349,7 @@ platforms for which @cite{Long_Long_Integer} is 64-bits (nearly all GNAT
 platforms).
 
 @node Performing Dimensionality Analysis in GNAT,Stack Related Facilities,Overflow Check Handling in GNAT,GNAT and Program Execution
-@anchor{gnat_ugn/gnat_and_program_execution performing-dimensionality-analysis-in-gnat}@anchor{2a}@anchor{gnat_ugn/gnat_and_program_execution id60}@anchor{1f7}
+@anchor{gnat_ugn/gnat_and_program_execution performing-dimensionality-analysis-in-gnat}@anchor{28}@anchor{gnat_ugn/gnat_and_program_execution id60}@anchor{169}
 @section Performing Dimensionality Analysis in GNAT
 
 
@@ -29029,7 +22551,7 @@ Final velocity: 98.10 m.s**(-1)
 @end quotation
 
 @node Stack Related Facilities,Memory Management Issues,Performing Dimensionality Analysis in GNAT,GNAT and Program Execution
-@anchor{gnat_ugn/gnat_and_program_execution id61}@anchor{1f8}@anchor{gnat_ugn/gnat_and_program_execution stack-related-facilities}@anchor{2b}
+@anchor{gnat_ugn/gnat_and_program_execution id61}@anchor{16a}@anchor{gnat_ugn/gnat_and_program_execution stack-related-facilities}@anchor{29}
 @section Stack Related Facilities
 
 
@@ -29045,7 +22567,7 @@ particular, it deals with dynamic and static stack usage measurements.
 @end menu
 
 @node Stack Overflow Checking,Static Stack Usage Analysis,,Stack Related Facilities
-@anchor{gnat_ugn/gnat_and_program_execution id62}@anchor{254}@anchor{gnat_ugn/gnat_and_program_execution stack-overflow-checking}@anchor{fc}
+@anchor{gnat_ugn/gnat_and_program_execution id62}@anchor{1c6}@anchor{gnat_ugn/gnat_and_program_execution stack-overflow-checking}@anchor{f4}
 @subsection Stack Overflow Checking
 
 
@@ -29082,7 +22604,7 @@ If the space is exceeded, then a @cite{Storage_Error} exception is raised.
 
 For declared tasks, the stack size is controlled by the size
 given in an applicable @cite{Storage_Size} pragma or by the value specified
-at bind time with @code{-d} (@ref{126,,Switches for gnatbind}) or is set to
+at bind time with @code{-d} (@ref{11d,,Switches for gnatbind}) or is set to
 the default size as defined in the GNAT runtime otherwise.
 
 @geindex GNAT_STACK_LIMIT
@@ -29114,7 +22636,7 @@ is an operating systems issue, and must be addressed with the
 appropriate operating systems commands.
 
 @node Static Stack Usage Analysis,Dynamic Stack Usage Analysis,Stack Overflow Checking,Stack Related Facilities
-@anchor{gnat_ugn/gnat_and_program_execution static-stack-usage-analysis}@anchor{fd}@anchor{gnat_ugn/gnat_and_program_execution id63}@anchor{255}
+@anchor{gnat_ugn/gnat_and_program_execution static-stack-usage-analysis}@anchor{f5}@anchor{gnat_ugn/gnat_and_program_execution id63}@anchor{1c7}
 @subsection Static Stack Usage Analysis
 
 
@@ -29163,7 +22685,7 @@ subprogram whose stack usage might be larger than the specified amount of
 bytes.  The wording is in keeping with the qualifier documented above.
 
 @node Dynamic Stack Usage Analysis,,Static Stack Usage Analysis,Stack Related Facilities
-@anchor{gnat_ugn/gnat_and_program_execution id64}@anchor{256}@anchor{gnat_ugn/gnat_and_program_execution dynamic-stack-usage-analysis}@anchor{128}
+@anchor{gnat_ugn/gnat_and_program_execution id64}@anchor{1c8}@anchor{gnat_ugn/gnat_and_program_execution dynamic-stack-usage-analysis}@anchor{11f}
 @subsection Dynamic Stack Usage Analysis
 
 
@@ -29230,7 +22752,7 @@ The package @cite{GNAT.Task_Stack_Usage} provides facilities to get
 stack usage reports at run-time. See its body for the details.
 
 @node Memory Management Issues,,Stack Related Facilities,GNAT and Program Execution
-@anchor{gnat_ugn/gnat_and_program_execution id65}@anchor{1f9}@anchor{gnat_ugn/gnat_and_program_execution memory-management-issues}@anchor{2c}
+@anchor{gnat_ugn/gnat_and_program_execution id65}@anchor{16b}@anchor{gnat_ugn/gnat_and_program_execution memory-management-issues}@anchor{2a}
 @section Memory Management Issues
 
 
@@ -29246,7 +22768,7 @@ incorrect uses of access values (including 'dangling references').
 @end menu
 
 @node Some Useful Memory Pools,The GNAT Debug Pool Facility,,Memory Management Issues
-@anchor{gnat_ugn/gnat_and_program_execution id66}@anchor{257}@anchor{gnat_ugn/gnat_and_program_execution some-useful-memory-pools}@anchor{258}
+@anchor{gnat_ugn/gnat_and_program_execution id66}@anchor{1c9}@anchor{gnat_ugn/gnat_and_program_execution some-useful-memory-pools}@anchor{1ca}
 @subsection Some Useful Memory Pools
 
 
@@ -29327,7 +22849,7 @@ for T1'Storage_Size use 10_000;
 @end quotation
 
 @node The GNAT Debug Pool Facility,,Some Useful Memory Pools,Memory Management Issues
-@anchor{gnat_ugn/gnat_and_program_execution id67}@anchor{259}@anchor{gnat_ugn/gnat_and_program_execution the-gnat-debug-pool-facility}@anchor{25a}
+@anchor{gnat_ugn/gnat_and_program_execution id67}@anchor{1cb}@anchor{gnat_ugn/gnat_and_program_execution the-gnat-debug-pool-facility}@anchor{1cc}
 @subsection The GNAT Debug Pool Facility
 
 
@@ -29490,7 +23012,7 @@ Debug Pool info:
 @c -- E.g. Ada |nbsp| 95
 
 @node Platform-Specific Information,Example of Binder Output File,GNAT and Program Execution,Top
-@anchor{gnat_ugn/platform_specific_information platform-specific-information}@anchor{f}@anchor{gnat_ugn/platform_specific_information doc}@anchor{25b}@anchor{gnat_ugn/platform_specific_information id1}@anchor{25c}
+@anchor{gnat_ugn/platform_specific_information platform-specific-information}@anchor{d}@anchor{gnat_ugn/platform_specific_information doc}@anchor{1cd}@anchor{gnat_ugn/platform_specific_information id1}@anchor{1ce}
 @chapter Platform-Specific Information
 
 
@@ -29507,7 +23029,7 @@ topics related to the GNAT implementation on Windows and Mac OS.
 @end menu
 
 @node Run-Time Libraries,Specifying a Run-Time Library,,Platform-Specific Information
-@anchor{gnat_ugn/platform_specific_information id2}@anchor{25d}@anchor{gnat_ugn/platform_specific_information run-time-libraries}@anchor{2d}
+@anchor{gnat_ugn/platform_specific_information id2}@anchor{1cf}@anchor{gnat_ugn/platform_specific_information run-time-libraries}@anchor{2b}
 @section Run-Time Libraries
 
 
@@ -29579,7 +23101,7 @@ information about several specific platforms.
 @end menu
 
 @node Summary of Run-Time Configurations,,,Run-Time Libraries
-@anchor{gnat_ugn/platform_specific_information summary-of-run-time-configurations}@anchor{25e}@anchor{gnat_ugn/platform_specific_information id3}@anchor{25f}
+@anchor{gnat_ugn/platform_specific_information summary-of-run-time-configurations}@anchor{1d0}@anchor{gnat_ugn/platform_specific_information id3}@anchor{1d1}
 @subsection Summary of Run-Time Configurations
 
 
@@ -29830,7 +23352,7 @@ SJLJ
 
 
 @node Specifying a Run-Time Library,Microsoft Windows Topics,Run-Time Libraries,Platform-Specific Information
-@anchor{gnat_ugn/platform_specific_information specifying-a-run-time-library}@anchor{260}@anchor{gnat_ugn/platform_specific_information id4}@anchor{261}
+@anchor{gnat_ugn/platform_specific_information specifying-a-run-time-library}@anchor{1d2}@anchor{gnat_ugn/platform_specific_information id4}@anchor{1d3}
 @section Specifying a Run-Time Library
 
 
@@ -29877,6 +23399,27 @@ For example on x86-linux:
 --           +--- adalib
 @end example
 
+
+@example
+               $(target-dir)
+              __/ /      \ \___
+      _______/   /        \    \_________________
+     /          /          \                     \
+    /          /            \                     \
+ADAINCLUDE  ADALIB      rts-native             rts-sjlj
+   :          :            /    \                 /   \
+   :          :           /      \               /     \
+   :          :          /        \             /       \
+   :          :         /          \           /         \
+   +-------------> adainclude     adalib   adainclude   adalib
+              :                     ^
+              :                     :
+              +---------------------+
+
+              Run-Time Library Directory Structure
+   (Upper-case names and dotted/dashed arrows represent soft links)
+@end example
+
 If the @emph{rts-sjlj} library is to be selected on a permanent basis,
 these soft links can be modified with the following commands:
 
@@ -29898,7 +23441,7 @@ Alternatively, you can specify @code{rts-sjlj/adainclude} in the file
 
 Selecting another run-time library temporarily can be
 achieved by using the @emph{--RTS} switch, e.g., @emph{--RTS=sjlj}
-@anchor{gnat_ugn/platform_specific_information choosing-the-scheduling-policy}@anchor{262}
+@anchor{gnat_ugn/platform_specific_information choosing-the-scheduling-policy}@anchor{1d4}
 @geindex SCHED_FIFO scheduling policy
 
 @geindex SCHED_RR scheduling policy
@@ -29914,7 +23457,7 @@ achieved by using the @emph{--RTS} switch, e.g., @emph{--RTS=sjlj}
 @end menu
 
 @node Choosing the Scheduling Policy,Solaris-Specific Considerations,,Specifying a Run-Time Library
-@anchor{gnat_ugn/platform_specific_information id5}@anchor{263}
+@anchor{gnat_ugn/platform_specific_information id5}@anchor{1d5}
 @subsection Choosing the Scheduling Policy
 
 
@@ -29955,7 +23498,7 @@ binder option.
 @geindex Solaris Sparc threads libraries
 
 @node Solaris-Specific Considerations,Solaris Threads Issues,Choosing the Scheduling Policy,Specifying a Run-Time Library
-@anchor{gnat_ugn/platform_specific_information id6}@anchor{264}@anchor{gnat_ugn/platform_specific_information solaris-specific-considerations}@anchor{265}
+@anchor{gnat_ugn/platform_specific_information id6}@anchor{1d6}@anchor{gnat_ugn/platform_specific_information solaris-specific-considerations}@anchor{1d7}
 @subsection Solaris-Specific Considerations
 
 
@@ -29965,7 +23508,7 @@ on Sparc Solaris.
 @geindex rts-pthread threads library
 
 @node Solaris Threads Issues,AIX-Specific Considerations,Solaris-Specific Considerations,Specifying a Run-Time Library
-@anchor{gnat_ugn/platform_specific_information id7}@anchor{266}@anchor{gnat_ugn/platform_specific_information solaris-threads-issues}@anchor{267}
+@anchor{gnat_ugn/platform_specific_information id7}@anchor{1d8}@anchor{gnat_ugn/platform_specific_information solaris-threads-issues}@anchor{1d9}
 @subsection Solaris Threads Issues
 
 
@@ -30054,7 +23597,7 @@ Run the program on the specified processor.
 @end quotation
 
 @node AIX-Specific Considerations,,Solaris Threads Issues,Specifying a Run-Time Library
-@anchor{gnat_ugn/platform_specific_information aix-specific-considerations}@anchor{268}@anchor{gnat_ugn/platform_specific_information id8}@anchor{269}
+@anchor{gnat_ugn/platform_specific_information aix-specific-considerations}@anchor{1da}@anchor{gnat_ugn/platform_specific_information id8}@anchor{1db}
 @subsection AIX-Specific Considerations
 
 
@@ -30081,7 +23624,7 @@ this call.
 @geindex Windows 98
 
 @node Microsoft Windows Topics,Mac OS Topics,Specifying a Run-Time Library,Platform-Specific Information
-@anchor{gnat_ugn/platform_specific_information microsoft-windows-topics}@anchor{2e}@anchor{gnat_ugn/platform_specific_information id9}@anchor{26a}
+@anchor{gnat_ugn/platform_specific_information microsoft-windows-topics}@anchor{2c}@anchor{gnat_ugn/platform_specific_information id9}@anchor{1dc}
 @section Microsoft Windows Topics
 
 
@@ -30097,13 +23640,14 @@ platforms.
 * Using a network installation of GNAT:: 
 * CONSOLE and WINDOWS subsystems:: 
 * Temporary Files:: 
+* Disabling Command Line Argument Expansion:: 
 * Mixed-Language Programming on Windows:: 
 * Windows Specific Add-Ons:: 
 
 @end menu
 
 @node Using GNAT on Windows,Using a network installation of GNAT,,Microsoft Windows Topics
-@anchor{gnat_ugn/platform_specific_information using-gnat-on-windows}@anchor{26b}@anchor{gnat_ugn/platform_specific_information id10}@anchor{26c}
+@anchor{gnat_ugn/platform_specific_information using-gnat-on-windows}@anchor{1dd}@anchor{gnat_ugn/platform_specific_information id10}@anchor{1de}
 @subsection Using GNAT on Windows
 
 
@@ -30180,7 +23724,7 @@ uninstall or integrate different GNAT products.
 @end itemize
 
 @node Using a network installation of GNAT,CONSOLE and WINDOWS subsystems,Using GNAT on Windows,Microsoft Windows Topics
-@anchor{gnat_ugn/platform_specific_information id11}@anchor{26d}@anchor{gnat_ugn/platform_specific_information using-a-network-installation-of-gnat}@anchor{26e}
+@anchor{gnat_ugn/platform_specific_information id11}@anchor{1df}@anchor{gnat_ugn/platform_specific_information using-a-network-installation-of-gnat}@anchor{1e0}
 @subsection Using a network installation of GNAT
 
 
@@ -30207,7 +23751,7 @@ transfer of large amounts of data across the network and will likely cause
 serious performance penalty.
 
 @node CONSOLE and WINDOWS subsystems,Temporary Files,Using a network installation of GNAT,Microsoft Windows Topics
-@anchor{gnat_ugn/platform_specific_information id12}@anchor{26f}@anchor{gnat_ugn/platform_specific_information console-and-windows-subsystems}@anchor{270}
+@anchor{gnat_ugn/platform_specific_information id12}@anchor{1e1}@anchor{gnat_ugn/platform_specific_information console-and-windows-subsystems}@anchor{1e2}
 @subsection CONSOLE and WINDOWS subsystems
 
 
@@ -30231,8 +23775,8 @@ $ gnatmake winprog -largs -mwindows
 @end example
 @end quotation
 
-@node Temporary Files,Mixed-Language Programming on Windows,CONSOLE and WINDOWS subsystems,Microsoft Windows Topics
-@anchor{gnat_ugn/platform_specific_information id13}@anchor{271}@anchor{gnat_ugn/platform_specific_information temporary-files}@anchor{272}
+@node Temporary Files,Disabling Command Line Argument Expansion,CONSOLE and WINDOWS subsystems,Microsoft Windows Topics
+@anchor{gnat_ugn/platform_specific_information id13}@anchor{1e3}@anchor{gnat_ugn/platform_specific_information temporary-files}@anchor{1e4}
 @subsection Temporary Files
 
 
@@ -30270,8 +23814,79 @@ file will be created. This is particularly useful in networked
 environments where you may not have write access to some
 directories.
 
-@node Mixed-Language Programming on Windows,Windows Specific Add-Ons,Temporary Files,Microsoft Windows Topics
-@anchor{gnat_ugn/platform_specific_information mixed-language-programming-on-windows}@anchor{273}@anchor{gnat_ugn/platform_specific_information id14}@anchor{274}
+@node Disabling Command Line Argument Expansion,Mixed-Language Programming on Windows,Temporary Files,Microsoft Windows Topics
+@anchor{gnat_ugn/platform_specific_information disabling-command-line-argument-expansion}@anchor{1e5}
+@subsection Disabling Command Line Argument Expansion
+
+
+@geindex Command Line Argument Expansion
+
+By default, an executable compiled for the @strong{Windows} platform will do
+the following postprocessing on the arguments passed on the command
+line:
+
+
+@itemize *
+
+@item 
+If the argument contains the characters @code{*} and/or @code{?}, then
+file expansion will be attempted. For example, if the current directory
+contains @code{a.txt} and @code{b.txt}, then when calling:
+
+@example
+$ my_ada_program *.txt
+@end example
+
+The following arguments will effectively be passed to the main program
+(for example when using @code{Ada.Command_Line.Argument}):
+
+@example
+Ada.Command_Line.Argument (1) -> "a.txt"
+Ada.Command_Line.Argument (2) -> "b.txt"
+@end example
+
+@item 
+Filename expansion can be disabled for a given argument by using single
+quotes. Thus, calling:
+
+@example
+$ my_ada_program '*.txt'
+@end example
+
+will result in:
+
+@example
+Ada.Command_Line.Argument (1) -> "*.txt"
+@end example
+@end itemize
+
+Note that if the program is launched from a shell such as @strong{Cygwin} @strong{Bash}
+then quote removal might be performed by the shell.
+
+In some contexts it might be useful to disable this feature (for example if
+the program performs its own argument expansion). In order to do this, a C
+symbol needs to be defined and set to @code{0}. You can do this by
+adding the following code fragment in one of your @strong{Ada} units:
+
+@example
+Do_Argv_Expansion : Integer := 0;
+pragma Export (C, Do_Argv_Expansion, "__gnat_do_argv_expansion");
+@end example
+
+The results of previous examples will be respectively:
+
+@example
+Ada.Command_Line.Argument (1) -> "*.txt"
+@end example
+
+and:
+
+@example
+Ada.Command_Line.Argument (1) -> "'*.txt'"
+@end example
+
+@node Mixed-Language Programming on Windows,Windows Specific Add-Ons,Disabling Command Line Argument Expansion,Microsoft Windows Topics
+@anchor{gnat_ugn/platform_specific_information mixed-language-programming-on-windows}@anchor{1e6}@anchor{gnat_ugn/platform_specific_information id14}@anchor{1e7}
 @subsection Mixed-Language Programming on Windows
 
 
@@ -30293,17 +23908,17 @@ to use the Microsoft tools for your C++ code, you have two choices:
 Encapsulate your C++ code in a DLL to be linked with your Ada
 application. In this case, use the Microsoft or whatever environment to
 build the DLL and use GNAT to build your executable
-(@ref{275,,Using DLLs with GNAT}).
+(@ref{1e8,,Using DLLs with GNAT}).
 
 @item 
 Or you can encapsulate your Ada code in a DLL to be linked with the
 other part of your application. In this case, use GNAT to build the DLL
-(@ref{276,,Building DLLs with GNAT Project files}) and use the Microsoft
+(@ref{1e9,,Building DLLs with GNAT Project files}) and use the Microsoft
 or whatever environment to build your executable.
 @end itemize
 
 In addition to the description about C main in
-@ref{46,,Mixed Language Programming} section, if the C main uses a
+@ref{44,,Mixed Language Programming} section, if the C main uses a
 stand-alone library it is required on x86-windows to
 setup the SEH context. For this the C main must looks like this:
 
@@ -30355,7 +23970,7 @@ native SEH support is used.
 @end menu
 
 @node Windows Calling Conventions,Introduction to Dynamic Link Libraries DLLs,,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information windows-calling-conventions}@anchor{277}@anchor{gnat_ugn/platform_specific_information id15}@anchor{278}
+@anchor{gnat_ugn/platform_specific_information windows-calling-conventions}@anchor{1ea}@anchor{gnat_ugn/platform_specific_information id15}@anchor{1eb}
 @subsubsection Windows Calling Conventions
 
 
@@ -30400,7 +24015,7 @@ are available for Windows:
 @end menu
 
 @node C Calling Convention,Stdcall Calling Convention,,Windows Calling Conventions
-@anchor{gnat_ugn/platform_specific_information c-calling-convention}@anchor{279}@anchor{gnat_ugn/platform_specific_information id16}@anchor{27a}
+@anchor{gnat_ugn/platform_specific_information c-calling-convention}@anchor{1ec}@anchor{gnat_ugn/platform_specific_information id16}@anchor{1ed}
 @subsubsection @cite{C} Calling Convention
 
 
@@ -30442,10 +24057,10 @@ is missing, as in the above example, this parameter is set to be the
 When importing a variable defined in C, you should always use the @cite{C}
 calling convention unless the object containing the variable is part of a
 DLL (in which case you should use the @cite{Stdcall} calling
-convention, @ref{27b,,Stdcall Calling Convention}).
+convention, @ref{1ee,,Stdcall Calling Convention}).
 
 @node Stdcall Calling Convention,Win32 Calling Convention,C Calling Convention,Windows Calling Conventions
-@anchor{gnat_ugn/platform_specific_information stdcall-calling-convention}@anchor{27b}@anchor{gnat_ugn/platform_specific_information id17}@anchor{27c}
+@anchor{gnat_ugn/platform_specific_information stdcall-calling-convention}@anchor{1ee}@anchor{gnat_ugn/platform_specific_information id17}@anchor{1ef}
 @subsubsection @cite{Stdcall} Calling Convention
 
 
@@ -30542,7 +24157,7 @@ Note that to ease building cross-platform bindings this convention
 will be handled as a @cite{C} calling convention on non-Windows platforms.
 
 @node Win32 Calling Convention,DLL Calling Convention,Stdcall Calling Convention,Windows Calling Conventions
-@anchor{gnat_ugn/platform_specific_information id18}@anchor{27d}@anchor{gnat_ugn/platform_specific_information win32-calling-convention}@anchor{27e}
+@anchor{gnat_ugn/platform_specific_information id18}@anchor{1f0}@anchor{gnat_ugn/platform_specific_information win32-calling-convention}@anchor{1f1}
 @subsubsection @cite{Win32} Calling Convention
 
 
@@ -30550,7 +24165,7 @@ This convention, which is GNAT-specific is fully equivalent to the
 @cite{Stdcall} calling convention described above.
 
 @node DLL Calling Convention,,Win32 Calling Convention,Windows Calling Conventions
-@anchor{gnat_ugn/platform_specific_information id19}@anchor{27f}@anchor{gnat_ugn/platform_specific_information dll-calling-convention}@anchor{280}
+@anchor{gnat_ugn/platform_specific_information id19}@anchor{1f2}@anchor{gnat_ugn/platform_specific_information dll-calling-convention}@anchor{1f3}
 @subsubsection @cite{DLL} Calling Convention
 
 
@@ -30558,7 +24173,7 @@ This convention, which is GNAT-specific is fully equivalent to the
 @cite{Stdcall} calling convention described above.
 
 @node Introduction to Dynamic Link Libraries DLLs,Using DLLs with GNAT,Windows Calling Conventions,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information id20}@anchor{281}@anchor{gnat_ugn/platform_specific_information introduction-to-dynamic-link-libraries-dlls}@anchor{282}
+@anchor{gnat_ugn/platform_specific_information id20}@anchor{1f4}@anchor{gnat_ugn/platform_specific_information introduction-to-dynamic-link-libraries-dlls}@anchor{1f5}
 @subsubsection Introduction to Dynamic Link Libraries (DLLs)
 
 
@@ -30642,10 +24257,10 @@ As a side note, an interesting difference between Microsoft DLLs and
 Unix shared libraries, is the fact that on most Unix systems all public
 routines are exported by default in a Unix shared library, while under
 Windows it is possible (but not required) to list exported routines in
-a definition file (see @ref{283,,The Definition File}).
+a definition file (see @ref{1f6,,The Definition File}).
 
 @node Using DLLs with GNAT,Building DLLs with GNAT Project files,Introduction to Dynamic Link Libraries DLLs,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information id21}@anchor{284}@anchor{gnat_ugn/platform_specific_information using-dlls-with-gnat}@anchor{275}
+@anchor{gnat_ugn/platform_specific_information id21}@anchor{1f7}@anchor{gnat_ugn/platform_specific_information using-dlls-with-gnat}@anchor{1e8}
 @subsubsection Using DLLs with GNAT
 
 
@@ -30736,7 +24351,7 @@ example a fictitious DLL called @code{API.dll}.
 @end menu
 
 @node Creating an Ada Spec for the DLL Services,Creating an Import Library,,Using DLLs with GNAT
-@anchor{gnat_ugn/platform_specific_information creating-an-ada-spec-for-the-dll-services}@anchor{285}@anchor{gnat_ugn/platform_specific_information id22}@anchor{286}
+@anchor{gnat_ugn/platform_specific_information creating-an-ada-spec-for-the-dll-services}@anchor{1f8}@anchor{gnat_ugn/platform_specific_information id22}@anchor{1f9}
 @subsubsection Creating an Ada Spec for the DLL Services
 
 
@@ -30776,7 +24391,7 @@ end API;
 @end quotation
 
 @node Creating an Import Library,,Creating an Ada Spec for the DLL Services,Using DLLs with GNAT
-@anchor{gnat_ugn/platform_specific_information id23}@anchor{287}@anchor{gnat_ugn/platform_specific_information creating-an-import-library}@anchor{288}
+@anchor{gnat_ugn/platform_specific_information id23}@anchor{1fa}@anchor{gnat_ugn/platform_specific_information creating-an-import-library}@anchor{1fb}
 @subsubsection Creating an Import Library
 
 
@@ -30790,7 +24405,7 @@ as in this case it is possible to link directly against the
 DLL. Otherwise read on.
 
 @geindex Definition file
-@anchor{gnat_ugn/platform_specific_information the-definition-file}@anchor{283}
+@anchor{gnat_ugn/platform_specific_information the-definition-file}@anchor{1f6}
 @subsubheading The Definition File
 
 
@@ -30838,17 +24453,17 @@ EXPORTS
 @end table
 
 Note that you must specify the correct suffix (@code{@@@emph{nn}})
-(see @ref{277,,Windows Calling Conventions}) for a Stdcall
+(see @ref{1ea,,Windows Calling Conventions}) for a Stdcall
 calling convention function in the exported symbols list.
 
 There can actually be other sections in a definition file, but these
 sections are not relevant to the discussion at hand.
-@anchor{gnat_ugn/platform_specific_information create-def-file-automatically}@anchor{289}
+@anchor{gnat_ugn/platform_specific_information create-def-file-automatically}@anchor{1fc}
 @subsubheading Creating a Definition File Automatically
 
 
 You can automatically create the definition file @code{API.def}
-(see @ref{283,,The Definition File}) from a DLL.
+(see @ref{1f6,,The Definition File}) from a DLL.
 For that use the @cite{dlltool} program as follows:
 
 @quotation
@@ -30858,7 +24473,7 @@ $ dlltool API.dll -z API.def --export-all-symbols
 @end example
 
 Note that if some routines in the DLL have the @cite{Stdcall} convention
-(@ref{277,,Windows Calling Conventions}) with stripped @code{@@@emph{nn}}
+(@ref{1ea,,Windows Calling Conventions}) with stripped @code{@@@emph{nn}}
 suffix then you'll have to edit @code{api.def} to add it, and specify
 @emph{-k} to @emph{gnatdll} when creating the import library.
 
@@ -30882,13 +24497,13 @@ tells you what symbol is expected. You just have to go back to the
 definition file and add the right suffix.
 @end itemize
 @end quotation
-@anchor{gnat_ugn/platform_specific_information gnat-style-import-library}@anchor{28a}
+@anchor{gnat_ugn/platform_specific_information gnat-style-import-library}@anchor{1fd}
 @subsubheading GNAT-Style Import Library
 
 
 To create a static import library from @code{API.dll} with the GNAT tools
 you should create the .def file, then use @cite{gnatdll} tool
-(see @ref{28b,,Using gnatdll}) as follows:
+(see @ref{1fe,,Using gnatdll}) as follows:
 
 @quotation
 
@@ -30904,15 +24519,15 @@ definition file name is @cite{xyz`}.def`, the import library name will
 be @cite{lib`@w{`}xyz`}.a`. Note that in the previous example option
 @emph{-e} could have been removed because the name of the definition
 file (before the '@cite{.def}' suffix) is the same as the name of the
-DLL (@ref{28b,,Using gnatdll} for more information about @cite{gnatdll}).
+DLL (@ref{1fe,,Using gnatdll} for more information about @cite{gnatdll}).
 @end quotation
-@anchor{gnat_ugn/platform_specific_information msvs-style-import-library}@anchor{28c}
+@anchor{gnat_ugn/platform_specific_information msvs-style-import-library}@anchor{1ff}
 @subsubheading Microsoft-Style Import Library
 
 
 A Microsoft import library is needed only if you plan to make an
 Ada DLL available to applications developed with Microsoft
-tools (@ref{273,,Mixed-Language Programming on Windows}).
+tools (@ref{1e6,,Mixed-Language Programming on Windows}).
 
 To create a Microsoft-style import library for @code{API.dll} you
 should create the .def file, then build the actual import library using
@@ -30936,7 +24551,7 @@ See the Microsoft documentation for further details about the usage of
 @end quotation
 
 @node Building DLLs with GNAT Project files,Building DLLs with GNAT,Using DLLs with GNAT,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information id24}@anchor{28d}@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat-project-files}@anchor{276}
+@anchor{gnat_ugn/platform_specific_information id24}@anchor{200}@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat-project-files}@anchor{1e9}
 @subsubsection Building DLLs with GNAT Project files
 
 
@@ -30944,14 +24559,15 @@ See the Microsoft documentation for further details about the usage of
 @geindex building
 
 There is nothing specific to Windows in the build process.
-@ref{8a,,Library Projects}.
+See the @emph{Library Projects} section in the @emph{GNAT Project Manager}
+chapter of the @emph{GPRbuild User's Guide}.
 
 Due to a system limitation, it is not possible under Windows to create threads
 when inside the @cite{DllMain} routine which is used for auto-initialization
 of shared libraries, so it is not possible to have library level tasks in SALs.
 
 @node Building DLLs with GNAT,Building DLLs with gnatdll,Building DLLs with GNAT Project files,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat}@anchor{28e}@anchor{gnat_ugn/platform_specific_information id25}@anchor{28f}
+@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnat}@anchor{201}@anchor{gnat_ugn/platform_specific_information id25}@anchor{202}
 @subsubsection Building DLLs with GNAT
 
 
@@ -30982,7 +24598,7 @@ $ gcc -shared -shared-libgcc -o api.dll obj1.o obj2.o ...
 It is important to note that in this case all symbols found in the
 object files are automatically exported. It is possible to restrict
 the set of symbols to export by passing to @emph{gcc} a definition
-file (see @ref{283,,The Definition File}).
+file (see @ref{1f6,,The Definition File}).
 For example:
 
 @example
@@ -31020,7 +24636,7 @@ $ gnatmake main -Iapilib -bargs -shared -largs -Lapilib -lAPI
 @end quotation
 
 @node Building DLLs with gnatdll,Ada DLLs and Finalization,Building DLLs with GNAT,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnatdll}@anchor{290}@anchor{gnat_ugn/platform_specific_information id26}@anchor{291}
+@anchor{gnat_ugn/platform_specific_information building-dlls-with-gnatdll}@anchor{203}@anchor{gnat_ugn/platform_specific_information id26}@anchor{204}
 @subsubsection Building DLLs with gnatdll
 
 
@@ -31028,8 +24644,8 @@ $ gnatmake main -Iapilib -bargs -shared -largs -Lapilib -lAPI
 @geindex building
 
 Note that it is preferred to use GNAT Project files
-(@ref{276,,Building DLLs with GNAT Project files}) or the built-in GNAT
-DLL support (@ref{28e,,Building DLLs with GNAT}) or to build DLLs.
+(@ref{1e9,,Building DLLs with GNAT Project files}) or the built-in GNAT
+DLL support (@ref{201,,Building DLLs with GNAT}) or to build DLLs.
 
 This section explains how to build DLLs containing Ada code using
 @cite{gnatdll}. These DLLs will be referred to as Ada DLLs in the
@@ -31045,20 +24661,20 @@ non-Ada applications are as follows:
 You need to mark each Ada @emph{entity} exported by the DLL with a @cite{C} or
 @cite{Stdcall} calling convention to avoid any Ada name mangling for the
 entities exported by the DLL
-(see @ref{292,,Exporting Ada Entities}). You can
+(see @ref{205,,Exporting Ada Entities}). You can
 skip this step if you plan to use the Ada DLL only from Ada applications.
 
 @item 
 Your Ada code must export an initialization routine which calls the routine
 @cite{adainit} generated by @emph{gnatbind} to perform the elaboration of
-the Ada code in the DLL (@ref{293,,Ada DLLs and Elaboration}). The initialization
+the Ada code in the DLL (@ref{206,,Ada DLLs and Elaboration}). The initialization
 routine exported by the Ada DLL must be invoked by the clients of the DLL
 to initialize the DLL.
 
 @item 
 When useful, the DLL should also export a finalization routine which calls
 routine @cite{adafinal} generated by @emph{gnatbind} to perform the
-finalization of the Ada code in the DLL (@ref{294,,Ada DLLs and Finalization}).
+finalization of the Ada code in the DLL (@ref{207,,Ada DLLs and Finalization}).
 The finalization routine exported by the Ada DLL must be invoked by the
 clients of the DLL when the DLL services are no further needed.
 
@@ -31068,18 +24684,19 @@ of the programming languages to which you plan to make the DLL available.
 
 @item 
 You must provide a definition file listing the exported entities
-(@ref{283,,The Definition File}).
+(@ref{1f6,,The Definition File}).
 
 @item 
 Finally you must use @cite{gnatdll} to produce the DLL and the import
-library (@ref{28b,,Using gnatdll}).
+library (@ref{1fe,,Using gnatdll}).
 @end itemize
 
 Note that a relocatable DLL stripped using the @cite{strip}
 binutils tool will not be relocatable anymore. To build a DLL without
 debug information pass @cite{-largs -s} to @cite{gnatdll}. This
 restriction does not apply to a DLL built using a Library Project.
-See @ref{8a,,Library Projects}.
+See the @emph{Library Projects} section in the @emph{GNAT Project Manager}
+chapter of the @emph{GPRbuild User's Guide}.
 
 @c Limitations_When_Using_Ada_DLLs_from Ada:
 
@@ -31091,7 +24708,7 @@ See @ref{8a,,Library Projects}.
 @end menu
 
 @node Limitations When Using Ada DLLs from Ada,Exporting Ada Entities,,Building DLLs with gnatdll
-@anchor{gnat_ugn/platform_specific_information limitations-when-using-ada-dlls-from-ada}@anchor{295}
+@anchor{gnat_ugn/platform_specific_information limitations-when-using-ada-dlls-from-ada}@anchor{208}
 @subsubsection Limitations When Using Ada DLLs from Ada
 
 
@@ -31112,7 +24729,7 @@ It is completely safe to exchange plain elementary, array or record types,
 Windows object handles, etc.
 
 @node Exporting Ada Entities,Ada DLLs and Elaboration,Limitations When Using Ada DLLs from Ada,Building DLLs with gnatdll
-@anchor{gnat_ugn/platform_specific_information exporting-ada-entities}@anchor{292}@anchor{gnat_ugn/platform_specific_information id27}@anchor{296}
+@anchor{gnat_ugn/platform_specific_information exporting-ada-entities}@anchor{205}@anchor{gnat_ugn/platform_specific_information id27}@anchor{209}
 @subsubsection Exporting Ada Entities
 
 
@@ -31212,10 +24829,10 @@ end API;
 Note that if you do not export the Ada entities with a @cite{C} or
 @cite{Stdcall} convention you will have to provide the mangled Ada names
 in the definition file of the Ada DLL
-(@ref{297,,Creating the Definition File}).
+(@ref{20a,,Creating the Definition File}).
 
 @node Ada DLLs and Elaboration,,Exporting Ada Entities,Building DLLs with gnatdll
-@anchor{gnat_ugn/platform_specific_information ada-dlls-and-elaboration}@anchor{293}@anchor{gnat_ugn/platform_specific_information id28}@anchor{298}
+@anchor{gnat_ugn/platform_specific_information ada-dlls-and-elaboration}@anchor{206}@anchor{gnat_ugn/platform_specific_information id28}@anchor{20b}
 @subsubsection Ada DLLs and Elaboration
 
 
@@ -31224,16 +24841,16 @@ in the definition file of the Ada DLL
 The DLL that you are building contains your Ada code as well as all the
 routines in the Ada library that are needed by it. The first thing a
 user of your DLL must do is elaborate the Ada code
-(@ref{11,,Elaboration Order Handling in GNAT}).
+(@ref{f,,Elaboration Order Handling in GNAT}).
 
 To achieve this you must export an initialization routine
 (@cite{Initialize_API} in the previous example), which must be invoked
 before using any of the DLL services. This elaboration routine must call
 the Ada elaboration routine @cite{adainit} generated by the GNAT binder
-(@ref{ba,,Binding with Non-Ada Main Programs}). See the body of
+(@ref{b4,,Binding with Non-Ada Main Programs}). See the body of
 @cite{Initialize_Api} for an example. Note that the GNAT binder is
 automatically invoked during the DLL build process by the @cite{gnatdll}
-tool (@ref{28b,,Using gnatdll}).
+tool (@ref{1fe,,Using gnatdll}).
 
 When a DLL is loaded, Windows systematically invokes a routine called
 @cite{DllMain}. It would therefore be possible to call @cite{adainit}
@@ -31246,7 +24863,7 @@ time), which means that the GNAT run time will deadlock waiting for the
 newly created task to complete its initialization.
 
 @node Ada DLLs and Finalization,Creating a Spec for Ada DLLs,Building DLLs with gnatdll,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information id29}@anchor{299}@anchor{gnat_ugn/platform_specific_information ada-dlls-and-finalization}@anchor{294}
+@anchor{gnat_ugn/platform_specific_information id29}@anchor{20c}@anchor{gnat_ugn/platform_specific_information ada-dlls-and-finalization}@anchor{207}
 @subsubsection Ada DLLs and Finalization
 
 
@@ -31257,14 +24874,14 @@ invoke the DLL finalization routine, if available. The DLL finalization
 routine is in charge of releasing all resources acquired by the DLL. In the
 case of the Ada code contained in the DLL, this is achieved by calling
 routine @cite{adafinal} generated by the GNAT binder
-(@ref{ba,,Binding with Non-Ada Main Programs}).
+(@ref{b4,,Binding with Non-Ada Main Programs}).
 See the body of @cite{Finalize_Api} for an
 example. As already pointed out the GNAT binder is automatically invoked
 during the DLL build process by the @cite{gnatdll} tool
-(@ref{28b,,Using gnatdll}).
+(@ref{1fe,,Using gnatdll}).
 
 @node Creating a Spec for Ada DLLs,GNAT and Windows Resources,Ada DLLs and Finalization,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information id30}@anchor{29a}@anchor{gnat_ugn/platform_specific_information creating-a-spec-for-ada-dlls}@anchor{29b}
+@anchor{gnat_ugn/platform_specific_information id30}@anchor{20d}@anchor{gnat_ugn/platform_specific_information creating-a-spec-for-ada-dlls}@anchor{20e}
 @subsubsection Creating a Spec for Ada DLLs
 
 
@@ -31322,7 +24939,7 @@ end API;
 @end menu
 
 @node Creating the Definition File,Using gnatdll,,Creating a Spec for Ada DLLs
-@anchor{gnat_ugn/platform_specific_information creating-the-definition-file}@anchor{297}@anchor{gnat_ugn/platform_specific_information id31}@anchor{29c}
+@anchor{gnat_ugn/platform_specific_information creating-the-definition-file}@anchor{20a}@anchor{gnat_ugn/platform_specific_information id31}@anchor{20f}
 @subsubsection Creating the Definition File
 
 
@@ -31358,7 +24975,7 @@ EXPORTS
 @end quotation
 
 @node Using gnatdll,,Creating the Definition File,Creating a Spec for Ada DLLs
-@anchor{gnat_ugn/platform_specific_information using-gnatdll}@anchor{28b}@anchor{gnat_ugn/platform_specific_information id32}@anchor{29d}
+@anchor{gnat_ugn/platform_specific_information using-gnatdll}@anchor{1fe}@anchor{gnat_ugn/platform_specific_information id32}@anchor{210}
 @subsubsection Using @cite{gnatdll}
 
 
@@ -31456,7 +25073,7 @@ Help mode. Displays @cite{gnatdll} switch usage information.
 
 Direct @cite{gnatdll} to search the @cite{dir} directory for source and
 object files needed to build the DLL.
-(@ref{8e,,Search Paths and the Run-Time Library (RTL)}).
+(@ref{89,,Search Paths and the Run-Time Library (RTL)}).
 
 @geindex -k (gnatdll)
 
@@ -31569,7 +25186,7 @@ asks @emph{gnatlink} to generate the routines @cite{DllMain} and
 is loaded into memory.
 
 @item 
-@cite{gnatdll} uses @cite{dlltool} (see @ref{29e,,Using dlltool}) to build the
+@cite{gnatdll} uses @cite{dlltool} (see @ref{211,,Using dlltool}) to build the
 export table (@code{api.exp}). The export table contains the relocation
 information in a form which can be used during the final link to ensure
 that the Windows loader is able to place the DLL anywhere in memory.
@@ -31608,7 +25225,7 @@ $ gnatbind -n api
 $ gnatlink api api.exp -o api.dll -mdll
 @end example
 @end itemize
-@anchor{gnat_ugn/platform_specific_information using-dlltool}@anchor{29e}
+@anchor{gnat_ugn/platform_specific_information using-dlltool}@anchor{211}
 @subsubheading Using @cite{dlltool}
 
 
@@ -31667,7 +25284,7 @@ DLL in the static import library generated by @cite{dlltool} with switch
 @item @code{-k}
 
 Kill @code{@@@emph{nn}} from exported names
-(@ref{277,,Windows Calling Conventions}
+(@ref{1ea,,Windows Calling Conventions}
 for a discussion about @cite{Stdcall}-style symbols.
 @end table
 
@@ -31723,7 +25340,7 @@ Use @cite{assembler-name} as the assembler. The default is @cite{as}.
 @end table
 
 @node GNAT and Windows Resources,Using GNAT DLLs from Microsoft Visual Studio Applications,Creating a Spec for Ada DLLs,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information gnat-and-windows-resources}@anchor{29f}@anchor{gnat_ugn/platform_specific_information id33}@anchor{2a0}
+@anchor{gnat_ugn/platform_specific_information gnat-and-windows-resources}@anchor{212}@anchor{gnat_ugn/platform_specific_information id33}@anchor{213}
 @subsubsection GNAT and Windows Resources
 
 
@@ -31818,7 +25435,7 @@ the corresponding Microsoft documentation.
 @end menu
 
 @node Building Resources,Compiling Resources,,GNAT and Windows Resources
-@anchor{gnat_ugn/platform_specific_information building-resources}@anchor{2a1}@anchor{gnat_ugn/platform_specific_information id34}@anchor{2a2}
+@anchor{gnat_ugn/platform_specific_information building-resources}@anchor{214}@anchor{gnat_ugn/platform_specific_information id34}@anchor{215}
 @subsubsection Building Resources
 
 
@@ -31838,7 +25455,7 @@ complete description of the resource script language can be found in the
 Microsoft documentation.
 
 @node Compiling Resources,Using Resources,Building Resources,GNAT and Windows Resources
-@anchor{gnat_ugn/platform_specific_information compiling-resources}@anchor{2a3}@anchor{gnat_ugn/platform_specific_information id35}@anchor{2a4}
+@anchor{gnat_ugn/platform_specific_information compiling-resources}@anchor{216}@anchor{gnat_ugn/platform_specific_information id35}@anchor{217}
 @subsubsection Compiling Resources
 
 
@@ -31880,7 +25497,7 @@ $ windres -i myres.res -o myres.o
 @end quotation
 
 @node Using Resources,,Compiling Resources,GNAT and Windows Resources
-@anchor{gnat_ugn/platform_specific_information id36}@anchor{2a5}@anchor{gnat_ugn/platform_specific_information using-resources}@anchor{2a6}
+@anchor{gnat_ugn/platform_specific_information id36}@anchor{218}@anchor{gnat_ugn/platform_specific_information using-resources}@anchor{219}
 @subsubsection Using Resources
 
 
@@ -31900,7 +25517,7 @@ $ gnatmake myprog -largs myres.o
 @end quotation
 
 @node Using GNAT DLLs from Microsoft Visual Studio Applications,Debugging a DLL,GNAT and Windows Resources,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information using-gnat-dll-from-msvs}@anchor{2a7}@anchor{gnat_ugn/platform_specific_information using-gnat-dlls-from-microsoft-visual-studio-applications}@anchor{2a8}
+@anchor{gnat_ugn/platform_specific_information using-gnat-dll-from-msvs}@anchor{21a}@anchor{gnat_ugn/platform_specific_information using-gnat-dlls-from-microsoft-visual-studio-applications}@anchor{21b}
 @subsubsection Using GNAT DLLs from Microsoft Visual Studio Applications
 
 
@@ -31934,7 +25551,7 @@ $ gprbuild -p mylib.gpr
 @item 
 Produce a .def file for the symbols you need to interface with, either by
 hand or automatically with possibly some manual adjustments
-(see @ref{289,,Creating Definition File Automatically}):
+(see @ref{1fc,,Creating Definition File Automatically}):
 @end enumerate
 
 @quotation
@@ -31951,7 +25568,7 @@ $ dlltool libmylib.dll -z libmylib.def --export-all-symbols
 Make sure that MSVS command-line tools are accessible on the path.
 
 @item 
-Create the Microsoft-style import library (see @ref{28c,,MSVS-Style Import Library}):
+Create the Microsoft-style import library (see @ref{1ff,,MSVS-Style Import Library}):
 @end enumerate
 
 @quotation
@@ -31993,7 +25610,7 @@ or copy the DLL into into the directory containing the .exe.
 @end enumerate
 
 @node Debugging a DLL,Setting Stack Size from gnatlink,Using GNAT DLLs from Microsoft Visual Studio Applications,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information id37}@anchor{2a9}@anchor{gnat_ugn/platform_specific_information debugging-a-dll}@anchor{2aa}
+@anchor{gnat_ugn/platform_specific_information id37}@anchor{21c}@anchor{gnat_ugn/platform_specific_information debugging-a-dll}@anchor{21d}
 @subsubsection Debugging a DLL
 
 
@@ -32031,7 +25648,7 @@ tools suite used to build the DLL.
 @end menu
 
 @node Program and DLL Both Built with GCC/GNAT,Program Built with Foreign Tools and DLL Built with GCC/GNAT,,Debugging a DLL
-@anchor{gnat_ugn/platform_specific_information program-and-dll-both-built-with-gcc-gnat}@anchor{2ab}@anchor{gnat_ugn/platform_specific_information id38}@anchor{2ac}
+@anchor{gnat_ugn/platform_specific_information program-and-dll-both-built-with-gcc-gnat}@anchor{21e}@anchor{gnat_ugn/platform_specific_information id38}@anchor{21f}
 @subsubsection Program and DLL Both Built with GCC/GNAT
 
 
@@ -32041,7 +25658,7 @@ the process. Let's suppose here that the main procedure is named
 @cite{ada_main} and that in the DLL there is an entry point named
 @cite{ada_dll}.
 
-The DLL (@ref{282,,Introduction to Dynamic Link Libraries (DLLs)}) and
+The DLL (@ref{1f5,,Introduction to Dynamic Link Libraries (DLLs)}) and
 program must have been built with the debugging information (see GNAT -g
 switch). Here are the step-by-step instructions for debugging it:
 
@@ -32078,10 +25695,10 @@ Set a breakpoint inside the DLL
 
 At this stage a breakpoint is set inside the DLL. From there on
 you can use the standard approach to debug the whole program
-(@ref{26,,Running and Debugging Ada Programs}).
+(@ref{24,,Running and Debugging Ada Programs}).
 
 @node Program Built with Foreign Tools and DLL Built with GCC/GNAT,,Program and DLL Both Built with GCC/GNAT,Debugging a DLL
-@anchor{gnat_ugn/platform_specific_information program-built-with-foreign-tools-and-dll-built-with-gcc-gnat}@anchor{2ad}@anchor{gnat_ugn/platform_specific_information id39}@anchor{2ae}
+@anchor{gnat_ugn/platform_specific_information program-built-with-foreign-tools-and-dll-built-with-gcc-gnat}@anchor{220}@anchor{gnat_ugn/platform_specific_information id39}@anchor{221}
 @subsubsection Program Built with Foreign Tools and DLL Built with GCC/GNAT
 
 
@@ -32098,7 +25715,7 @@ example some C code built with Microsoft Visual C) and that there is a
 DLL named @cite{test.dll} containing an Ada entry point named
 @cite{ada_dll}.
 
-The DLL (see @ref{282,,Introduction to Dynamic Link Libraries (DLLs)}) must have
+The DLL (see @ref{1f5,,Introduction to Dynamic Link Libraries (DLLs)}) must have
 been built with debugging information (see GNAT @cite{-g} option).
 
 @subsubheading Debugging the DLL Directly
@@ -32164,7 +25781,7 @@ Continue the program.
 
 This will run the program until it reaches the breakpoint that has been
 set. From that point you can use the standard way to debug a program
-as described in (@ref{26,,Running and Debugging Ada Programs}).
+as described in (@ref{24,,Running and Debugging Ada Programs}).
 @end itemize
 
 It is also possible to debug the DLL by attaching to a running process.
@@ -32234,10 +25851,10 @@ Continue process execution.
 This last step will resume the process execution, and stop at
 the breakpoint we have set. From there you can use the standard
 approach to debug a program as described in
-@ref{26,,Running and Debugging Ada Programs}.
+@ref{24,,Running and Debugging Ada Programs}.
 
 @node Setting Stack Size from gnatlink,Setting Heap Size from gnatlink,Debugging a DLL,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information setting-stack-size-from-gnatlink}@anchor{13d}@anchor{gnat_ugn/platform_specific_information id40}@anchor{2af}
+@anchor{gnat_ugn/platform_specific_information setting-stack-size-from-gnatlink}@anchor{134}@anchor{gnat_ugn/platform_specific_information id40}@anchor{222}
 @subsubsection Setting Stack Size from @emph{gnatlink}
 
 
@@ -32280,7 +25897,7 @@ because the coma is a separator for this option.
 @end itemize
 
 @node Setting Heap Size from gnatlink,,Setting Stack Size from gnatlink,Mixed-Language Programming on Windows
-@anchor{gnat_ugn/platform_specific_information setting-heap-size-from-gnatlink}@anchor{13e}@anchor{gnat_ugn/platform_specific_information id41}@anchor{2b0}
+@anchor{gnat_ugn/platform_specific_information setting-heap-size-from-gnatlink}@anchor{135}@anchor{gnat_ugn/platform_specific_information id41}@anchor{223}
 @subsubsection Setting Heap Size from @emph{gnatlink}
 
 
@@ -32313,7 +25930,7 @@ because the coma is a separator for this option.
 @end itemize
 
 @node Windows Specific Add-Ons,,Mixed-Language Programming on Windows,Microsoft Windows Topics
-@anchor{gnat_ugn/platform_specific_information windows-specific-add-ons}@anchor{2b1}@anchor{gnat_ugn/platform_specific_information win32-specific-addons}@anchor{2b2}
+@anchor{gnat_ugn/platform_specific_information windows-specific-add-ons}@anchor{224}@anchor{gnat_ugn/platform_specific_information win32-specific-addons}@anchor{225}
 @subsection Windows Specific Add-Ons
 
 
@@ -32326,7 +25943,7 @@ This section describes the Windows specific add-ons.
 @end menu
 
 @node Win32Ada,wPOSIX,,Windows Specific Add-Ons
-@anchor{gnat_ugn/platform_specific_information win32ada}@anchor{2b3}@anchor{gnat_ugn/platform_specific_information id42}@anchor{2b4}
+@anchor{gnat_ugn/platform_specific_information win32ada}@anchor{226}@anchor{gnat_ugn/platform_specific_information id42}@anchor{227}
 @subsubsection Win32Ada
 
 
@@ -32357,7 +25974,7 @@ gprbuild p.gpr
 @end quotation
 
 @node wPOSIX,,Win32Ada,Windows Specific Add-Ons
-@anchor{gnat_ugn/platform_specific_information id43}@anchor{2b5}@anchor{gnat_ugn/platform_specific_information wposix}@anchor{2b6}
+@anchor{gnat_ugn/platform_specific_information id43}@anchor{228}@anchor{gnat_ugn/platform_specific_information wposix}@anchor{229}
 @subsubsection wPOSIX
 
 
@@ -32390,7 +26007,7 @@ gprbuild p.gpr
 @end quotation
 
 @node Mac OS Topics,,Microsoft Windows Topics,Platform-Specific Information
-@anchor{gnat_ugn/platform_specific_information mac-os-topics}@anchor{2f}@anchor{gnat_ugn/platform_specific_information id44}@anchor{2b7}
+@anchor{gnat_ugn/platform_specific_information mac-os-topics}@anchor{2d}@anchor{gnat_ugn/platform_specific_information id44}@anchor{22a}
 @section Mac OS Topics
 
 
@@ -32405,7 +26022,7 @@ platform.
 @end menu
 
 @node Codesigning the Debugger,,,Mac OS Topics
-@anchor{gnat_ugn/platform_specific_information codesigning-the-debugger}@anchor{2b8}
+@anchor{gnat_ugn/platform_specific_information codesigning-the-debugger}@anchor{22b}
 @subsection Codesigning the Debugger
 
 
@@ -32486,7 +26103,7 @@ the location where you installed GNAT.  Also, be sure that users are
 in the Unix group @code{_developer}.
 
 @node Example of Binder Output File,Elaboration Order Handling in GNAT,Platform-Specific Information,Top
-@anchor{gnat_ugn/example_of_binder_output example-of-binder-output-file}@anchor{10}@anchor{gnat_ugn/example_of_binder_output doc}@anchor{2b9}@anchor{gnat_ugn/example_of_binder_output id1}@anchor{2ba}
+@anchor{gnat_ugn/example_of_binder_output example-of-binder-output-file}@anchor{e}@anchor{gnat_ugn/example_of_binder_output doc}@anchor{22c}@anchor{gnat_ugn/example_of_binder_output id1}@anchor{22d}
 @chapter Example of Binder Output File
 
 
@@ -33238,7 +26855,7 @@ elaboration code in your own application).
 @c -- Example: A |withing| unit has a |with| clause, it |withs| a |withed| unit
 
 @node Elaboration Order Handling in GNAT,Inline Assembler,Example of Binder Output File,Top
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-order-handling-in-gnat}@anchor{11}@anchor{gnat_ugn/elaboration_order_handling_in_gnat doc}@anchor{2bb}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id1}@anchor{2bc}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-order-handling-in-gnat}@anchor{f}@anchor{gnat_ugn/elaboration_order_handling_in_gnat doc}@anchor{22e}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id1}@anchor{22f}
 @chapter Elaboration Order Handling in GNAT
 
 
@@ -33270,7 +26887,7 @@ features.
 @end menu
 
 @node Elaboration Code,Checking the Elaboration Order,,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-code}@anchor{2bd}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id2}@anchor{2be}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-code}@anchor{230}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id2}@anchor{231}
 @section Elaboration Code
 
 
@@ -33420,7 +27037,7 @@ to figure out which of these expressions will be true, and hence it
 is impossible to guarantee a safe order of elaboration at run time.
 
 @node Checking the Elaboration Order,Controlling the Elaboration Order,Elaboration Code,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat checking-the-elaboration-order}@anchor{2bf}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id3}@anchor{2c0}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat checking-the-elaboration-order}@anchor{232}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id3}@anchor{233}
 @section Checking the Elaboration Order
 
 
@@ -33524,7 +27141,7 @@ does such optimizations, but still the easiest conceptual model is to
 think of there being one variable per subprogram.
 
 @node Controlling the Elaboration Order,Controlling Elaboration in GNAT - Internal Calls,Checking the Elaboration Order,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id4}@anchor{2c1}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-the-elaboration-order}@anchor{2c2}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id4}@anchor{234}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-the-elaboration-order}@anchor{235}
 @section Controlling the Elaboration Order
 
 
@@ -33783,7 +27400,7 @@ code in the body makes calls to some other unit, so it is still necessary
 to use @cite{Elaborate_All} on such units.
 
 @node Controlling Elaboration in GNAT - Internal Calls,Controlling Elaboration in GNAT - External Calls,Controlling the Elaboration Order,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id5}@anchor{2c3}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-elaboration-in-gnat-internal-calls}@anchor{2c4}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id5}@anchor{236}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-elaboration-in-gnat-internal-calls}@anchor{237}
 @section Controlling Elaboration in GNAT - Internal Calls
 
 
@@ -33963,7 +27580,7 @@ guaranteed) for a program to be able to call a subprogram whose body
 is not yet elaborated, without raising a @cite{Program_Error} exception.
 
 @node Controlling Elaboration in GNAT - External Calls,Default Behavior in GNAT - Ensuring Safety,Controlling Elaboration in GNAT - Internal Calls,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id6}@anchor{2c5}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-elaboration-in-gnat-external-calls}@anchor{2c6}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id6}@anchor{238}@anchor{gnat_ugn/elaboration_order_handling_in_gnat controlling-elaboration-in-gnat-external-calls}@anchor{239}
 @section Controlling Elaboration in GNAT - External Calls
 
 
@@ -34071,7 +27688,7 @@ provides a number of facilities for assisting the programmer in
 developing programs that are robust with respect to elaboration order.
 
 @node Default Behavior in GNAT - Ensuring Safety,Treatment of Pragma Elaborate,Controlling Elaboration in GNAT - External Calls,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id7}@anchor{2c7}@anchor{gnat_ugn/elaboration_order_handling_in_gnat default-behavior-in-gnat-ensuring-safety}@anchor{2c8}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id7}@anchor{23a}@anchor{gnat_ugn/elaboration_order_handling_in_gnat default-behavior-in-gnat-ensuring-safety}@anchor{23b}
 @section Default Behavior in GNAT - Ensuring Safety
 
 
@@ -34173,7 +27790,7 @@ is clearly safer to rely on compile and link time checks rather than
 run-time checks. However, in the case of legacy code, it may be
 difficult to meet the requirements of the static model. This
 issue is further discussed in
-@ref{2c9,,What to Do If the Default Elaboration Behavior Fails}.
+@ref{23c,,What to Do If the Default Elaboration Behavior Fails}.
 
 Note that the static model provides a strict subset of the allowed
 behavior and programs of the Ada Reference Manual, so if you do
@@ -34183,7 +27800,7 @@ work using the dynamic model, providing that you remove any
 pragma Elaborate statements from the source.
 
 @node Treatment of Pragma Elaborate,Elaboration Issues for Library Tasks,Default Behavior in GNAT - Ensuring Safety,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat treatment-of-pragma-elaborate}@anchor{2ca}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id8}@anchor{2cb}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat treatment-of-pragma-elaborate}@anchor{23d}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id8}@anchor{23e}
 @section Treatment of Pragma Elaborate
 
 
@@ -34222,7 +27839,7 @@ When using the static mode with @emph{-gnatwl}, any use of
 problems.
 
 @node Elaboration Issues for Library Tasks,Mixing Elaboration Models,Treatment of Pragma Elaborate,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-issues-for-library-tasks}@anchor{2cc}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id9}@anchor{2cd}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-issues-for-library-tasks}@anchor{23f}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id9}@anchor{240}
 @section Elaboration Issues for Library Tasks
 
 
@@ -34585,7 +28202,7 @@ no task receives an entry call before elaboration of all units is completed.
 @end itemize
 
 @node Mixing Elaboration Models,What to Do If the Default Elaboration Behavior Fails,Elaboration Issues for Library Tasks,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id10}@anchor{2ce}@anchor{gnat_ugn/elaboration_order_handling_in_gnat mixing-elaboration-models}@anchor{2cf}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id10}@anchor{241}@anchor{gnat_ugn/elaboration_order_handling_in_gnat mixing-elaboration-models}@anchor{242}
 @section Mixing Elaboration Models
 
 
@@ -34650,7 +28267,7 @@ allowing the main application that uses this subsystem to be compiled
 using the more reliable default static model.
 
 @node What to Do If the Default Elaboration Behavior Fails,Elaboration for Indirect Calls,Mixing Elaboration Models,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id11}@anchor{2d0}@anchor{gnat_ugn/elaboration_order_handling_in_gnat what-to-do-if-the-default-elaboration-behavior-fails}@anchor{2c9}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id11}@anchor{243}@anchor{gnat_ugn/elaboration_order_handling_in_gnat what-to-do-if-the-default-elaboration-behavior-fails}@anchor{23c}
 @section What to Do If the Default Elaboration Behavior Fails
 
 
@@ -34761,7 +28378,7 @@ all subprograms declared in this spec.
 @item 
 Use Pragma Elaborate.
 
-As previously described in section @ref{2ca,,Treatment of Pragma Elaborate},
+As previously described in section @ref{23d,,Treatment of Pragma Elaborate},
 GNAT in static mode assumes that a @cite{pragma} Elaborate indicates correctly
 that no elaboration checks are required on calls to the designated unit.
 There may be cases in which the caller knows that no transitive calls
@@ -34894,7 +28511,7 @@ C-tests are indeed correct (it is less efficient, but efficiency is
 not a factor in running the ACATS tests.)
 
 @node Elaboration for Indirect Calls,Summary of Procedures for Elaboration Control,What to Do If the Default Elaboration Behavior Fails,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id12}@anchor{2d1}@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-for-indirect-calls}@anchor{2d2}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id12}@anchor{244}@anchor{gnat_ugn/elaboration_order_handling_in_gnat elaboration-for-indirect-calls}@anchor{245}
 @section Elaboration for Indirect Calls
 
 
@@ -34908,29 +28525,34 @@ fall back to run-time checks; premature calls to any primitive
 operation of a tagged type before the body of the operation has been
 elaborated will raise @cite{Program_Error}.
 
-Access-to-subprogram types, however, are handled conservatively, and
-do not require run-time checks. This was not true in earlier versions
-of the compiler; you can use the @emph{-gnatd.U} debug switch to
-revert to the old behavior if the new conservative behavior causes
-elaboration cycles. Here, 'conservative' means that if you do
-@cite{P'Access} during elaboration, the compiler will assume that you
-might call @cite{P} indirectly during elaboration, so it adds an
-implicit @cite{pragma Elaborate_All} on the library unit containing
-@cite{P}. The @emph{-gnatd.U} switch is safe if you know there are
-no such calls. If the program worked before, it will continue to work
-with @emph{-gnatd.U}. But beware that code modifications such as
-adding an indirect call can cause erroneous behavior in the presence
-of @emph{-gnatd.U}.
+Access-to-subprogram types, however, are handled conservatively in many
+cases. This was not true in earlier versions of the compiler; you can use
+the @emph{-gnatd.U} debug switch to revert to the old behavior if the new
+conservative behavior causes elaboration cycles. Here, 'conservative' means
+that if you do @cite{P'Access} during elaboration, the compiler will normally
+assume that you might call @cite{P} indirectly during elaboration, so it adds an
+implicit @cite{pragma Elaborate_All} on the library unit containing @cite{P}. The
+@emph{-gnatd.U} switch is safe if you know there are no such calls. If the
+program worked before, it will continue to work with @emph{-gnatd.U}. But beware
+that code modifications such as adding an indirect call can cause erroneous
+behavior in the presence of @emph{-gnatd.U}.
+
+These implicit Elaborate_All pragmas are not added in all cases, because
+they cause elaboration cycles in certain common code patterns. If you want
+even more conservative handling of P'Access, you can use the @emph{-gnatd.o}
+switch.
+
+See @cite{debug.adb} for documentation on the @emph{-gnatd...} debug switches.
 
 @node Summary of Procedures for Elaboration Control,Other Elaboration Order Considerations,Elaboration for Indirect Calls,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id13}@anchor{2d3}@anchor{gnat_ugn/elaboration_order_handling_in_gnat summary-of-procedures-for-elaboration-control}@anchor{2d4}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id13}@anchor{246}@anchor{gnat_ugn/elaboration_order_handling_in_gnat summary-of-procedures-for-elaboration-control}@anchor{247}
 @section Summary of Procedures for Elaboration Control
 
 
 @geindex Elaboration control
 
 First, compile your program with the default options, using none of
-the special elaboration control switches. If the binder successfully
+the special elaboration-control switches. If the binder successfully
 binds your program, then you can be confident that, apart from issues
 raised by the use of access-to-subprogram types and dynamic dispatching,
 the program is free of elaboration errors. If it is important that the
@@ -34947,7 +28569,7 @@ and, if you are sure there really are no elaboration problems,
 use a global pragma @cite{Suppress (Elaboration_Check)}.
 
 @node Other Elaboration Order Considerations,Determining the Chosen Elaboration Order,Summary of Procedures for Elaboration Control,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat id14}@anchor{2d5}@anchor{gnat_ugn/elaboration_order_handling_in_gnat other-elaboration-order-considerations}@anchor{2d6}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat id14}@anchor{248}@anchor{gnat_ugn/elaboration_order_handling_in_gnat other-elaboration-order-considerations}@anchor{249}
 @section Other Elaboration Order Considerations
 
 
@@ -35094,7 +28716,7 @@ and figuring out which is correct, and then adding the necessary
 @cite{Elaborate} or @cite{Elaborate_All} pragmas to ensure the desired order.
 
 @node Determining the Chosen Elaboration Order,,Other Elaboration Order Considerations,Elaboration Order Handling in GNAT
-@anchor{gnat_ugn/elaboration_order_handling_in_gnat determining-the-chosen-elaboration-order}@anchor{2d7}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id15}@anchor{2d8}
+@anchor{gnat_ugn/elaboration_order_handling_in_gnat determining-the-chosen-elaboration-order}@anchor{24a}@anchor{gnat_ugn/elaboration_order_handling_in_gnat id15}@anchor{24b}
 @section Determining the Chosen Elaboration Order
 
 
@@ -35234,7 +28856,7 @@ gdbstr (body)
 @end example
 
 @node Inline Assembler,GNU Free Documentation License,Elaboration Order Handling in GNAT,Top
-@anchor{gnat_ugn/inline_assembler inline-assembler}@anchor{12}@anchor{gnat_ugn/inline_assembler doc}@anchor{2d9}@anchor{gnat_ugn/inline_assembler id1}@anchor{2da}
+@anchor{gnat_ugn/inline_assembler inline-assembler}@anchor{10}@anchor{gnat_ugn/inline_assembler doc}@anchor{24c}@anchor{gnat_ugn/inline_assembler id1}@anchor{24d}
 @chapter Inline Assembler
 
 
@@ -35293,7 +28915,7 @@ and with assembly language programming.
 @end menu
 
 @node Basic Assembler Syntax,A Simple Example of Inline Assembler,,Inline Assembler
-@anchor{gnat_ugn/inline_assembler id2}@anchor{2db}@anchor{gnat_ugn/inline_assembler basic-assembler-syntax}@anchor{2dc}
+@anchor{gnat_ugn/inline_assembler id2}@anchor{24e}@anchor{gnat_ugn/inline_assembler basic-assembler-syntax}@anchor{24f}
 @section Basic Assembler Syntax
 
 
@@ -35409,7 +29031,7 @@ Intel: Destination first; for example @cite{mov eax@comma{} 4}@w{ }
 
 
 @node A Simple Example of Inline Assembler,Output Variables in Inline Assembler,Basic Assembler Syntax,Inline Assembler
-@anchor{gnat_ugn/inline_assembler a-simple-example-of-inline-assembler}@anchor{2dd}@anchor{gnat_ugn/inline_assembler id3}@anchor{2de}
+@anchor{gnat_ugn/inline_assembler a-simple-example-of-inline-assembler}@anchor{250}@anchor{gnat_ugn/inline_assembler id3}@anchor{251}
 @section A Simple Example of Inline Assembler
 
 
@@ -35558,7 +29180,7 @@ If there are no errors, @emph{as} will generate an object file
 @code{nothing.out}.
 
 @node Output Variables in Inline Assembler,Input Variables in Inline Assembler,A Simple Example of Inline Assembler,Inline Assembler
-@anchor{gnat_ugn/inline_assembler id4}@anchor{2df}@anchor{gnat_ugn/inline_assembler output-variables-in-inline-assembler}@anchor{2e0}
+@anchor{gnat_ugn/inline_assembler id4}@anchor{252}@anchor{gnat_ugn/inline_assembler output-variables-in-inline-assembler}@anchor{253}
 @section Output Variables in Inline Assembler
 
 
@@ -35925,7 +29547,7 @@ end Get_Flags_3;
 @end quotation
 
 @node Input Variables in Inline Assembler,Inlining Inline Assembler Code,Output Variables in Inline Assembler,Inline Assembler
-@anchor{gnat_ugn/inline_assembler id5}@anchor{2e1}@anchor{gnat_ugn/inline_assembler input-variables-in-inline-assembler}@anchor{2e2}
+@anchor{gnat_ugn/inline_assembler id5}@anchor{254}@anchor{gnat_ugn/inline_assembler input-variables-in-inline-assembler}@anchor{255}
 @section Input Variables in Inline Assembler
 
 
@@ -36014,7 +29636,7 @@ _increment__incr.1:
 @end quotation
 
 @node Inlining Inline Assembler Code,Other Asm Functionality,Input Variables in Inline Assembler,Inline Assembler
-@anchor{gnat_ugn/inline_assembler id6}@anchor{2e3}@anchor{gnat_ugn/inline_assembler inlining-inline-assembler-code}@anchor{2e4}
+@anchor{gnat_ugn/inline_assembler id6}@anchor{256}@anchor{gnat_ugn/inline_assembler inlining-inline-assembler-code}@anchor{257}
 @section Inlining Inline Assembler Code
 
 
@@ -36085,7 +29707,7 @@ movl %esi,%eax
 thus saving the overhead of stack frame setup and an out-of-line call.
 
 @node Other Asm Functionality,,Inlining Inline Assembler Code,Inline Assembler
-@anchor{gnat_ugn/inline_assembler other-asm-functionality}@anchor{2e5}@anchor{gnat_ugn/inline_assembler id7}@anchor{2e6}
+@anchor{gnat_ugn/inline_assembler other-asm-functionality}@anchor{258}@anchor{gnat_ugn/inline_assembler id7}@anchor{259}
 @section Other @cite{Asm} Functionality
 
 
@@ -36100,7 +29722,7 @@ and @cite{Volatile}, which inhibits unwanted optimizations.
 @end menu
 
 @node The Clobber Parameter,The Volatile Parameter,,Other Asm Functionality
-@anchor{gnat_ugn/inline_assembler the-clobber-parameter}@anchor{2e7}@anchor{gnat_ugn/inline_assembler id8}@anchor{2e8}
+@anchor{gnat_ugn/inline_assembler the-clobber-parameter}@anchor{25a}@anchor{gnat_ugn/inline_assembler id8}@anchor{25b}
 @subsection The @cite{Clobber} Parameter
 
 
@@ -36164,7 +29786,7 @@ Use 'register' name @cite{memory} if you changed a memory location
 @end itemize
 
 @node The Volatile Parameter,,The Clobber Parameter,Other Asm Functionality
-@anchor{gnat_ugn/inline_assembler the-volatile-parameter}@anchor{2e9}@anchor{gnat_ugn/inline_assembler id9}@anchor{2ea}
+@anchor{gnat_ugn/inline_assembler the-volatile-parameter}@anchor{25c}@anchor{gnat_ugn/inline_assembler id9}@anchor{25d}
 @subsection The @cite{Volatile} Parameter
 
 
@@ -36200,7 +29822,7 @@ to @cite{True} only if the compiler's optimizations have created
 problems.
 
 @node GNU Free Documentation License,Index,Inline Assembler,Top
-@anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{2eb}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{2ec}
+@anchor{share/gnu_free_documentation_license gnu-fdl}@anchor{1}@anchor{share/gnu_free_documentation_license doc}@anchor{25e}@anchor{share/gnu_free_documentation_license gnu-free-documentation-license}@anchor{25f}
 @chapter GNU Free Documentation License
 
 
@@ -36688,6 +30310,8 @@ to permit their use in free software.
 
 @printindex ge
 
+@anchor{de}@w{                              }
+@anchor{gnat_ugn/gnat_utility_programs switches-related-to-project-files}@w{                              }
 
 @c %**end of body
 @bye
diff --git a/gcc/ada/gnatbind.adb b/gcc/ada/gnatbind.adb
index 85f670716bd..51353773822 100644
--- a/gcc/ada/gnatbind.adb
+++ b/gcc/ada/gnatbind.adb
@@ -855,12 +855,15 @@ begin
          end;
       end if;
 
-      --  Perform consistency and correctness checks
-
-      Check_Duplicated_Subunits;
-      Check_Versions;
-      Check_Consistency;
-      Check_Configuration_Consistency;
+      --  Perform consistency and correctness checks. Disable these in CodePeer
+      --  mode where we want to be more flexible.
+
+      if not CodePeer_Mode then
+         Check_Duplicated_Subunits;
+         Check_Versions;
+         Check_Consistency;
+         Check_Configuration_Consistency;
+      end if;
 
       --  List restrictions that could be applied to this partition
 
diff --git a/gcc/ada/inline.adb b/gcc/ada/inline.adb
index d205636be03..1be03ae87ad 100644
--- a/gcc/ada/inline.adb
+++ b/gcc/ada/inline.adb
@@ -459,11 +459,12 @@ package body Inline is
             --  Do not inline it either if it is in the main unit.
             --  Extend the -gnatn2 processing to -gnatn1 for Inline_Always
             --  calls if the back-end takes care of inlining the call.
+            --  Note that Level in Inline_Package | Inline_Call here.
 
-            elsif (Level = Inline_Package
-                    or else (Level = Inline_Call
-                              and then Has_Pragma_Inline_Always (E)
-                              and then Back_End_Inlining))
+            elsif ((Level = Inline_Call
+                      and then Has_Pragma_Inline_Always (E)
+                      and then Back_End_Inlining)
+                    or else Level = Inline_Package)
               and then not Is_Inlined (Pack)
               and then not Is_Internal (E)
               and then not In_Main_Unit_Or_Subunit (Pack)
diff --git a/gcc/ada/lib-xref.adb b/gcc/ada/lib-xref.adb
index bff6d25b7c8..b1d5978549e 100644
--- a/gcc/ada/lib-xref.adb
+++ b/gcc/ada/lib-xref.adb
@@ -841,6 +841,8 @@ package body Lib.Xref is
 
          --  Check for pragma Unreferenced given and reference is within
          --  this source unit (occasion for possible warning to be issued).
+         --  Note that the entity may be marked as unreferenced by pragma
+         --  Unused.
 
          if Has_Unreferenced (E)
            and then In_Same_Extended_Unit (E, N)
@@ -875,8 +877,13 @@ package body Lib.Xref is
                   BE := First_Entity (Current_Scope);
                   while Present (BE) loop
                      if Chars (BE) = Chars (E) then
-                        Error_Msg_NE -- CODEFIX
-                          ("??pragma Unreferenced given for&!", N, BE);
+                        if Has_Pragma_Unused (E) then
+                           Error_Msg_NE -- CODEFIX
+                             ("??pragma Unused given for&!", N, BE);
+                        else
+                           Error_Msg_NE -- CODEFIX
+                             ("??pragma Unreferenced given for&!", N, BE);
+                        end if;
                         exit;
                      end if;
 
@@ -886,6 +893,9 @@ package body Lib.Xref is
 
             --  Here we issue the warning, since this is a real reference
 
+            elsif Has_Pragma_Unused (E) then
+               Error_Msg_NE -- CODEFIX
+                 ("??pragma Unused given for&!", N, E);
             else
                Error_Msg_NE -- CODEFIX
                  ("??pragma Unreferenced given for&!", N, E);
diff --git a/gcc/ada/lib.adb b/gcc/ada/lib.adb
index b711c21f592..0ba9f9ad245 100644
--- a/gcc/ada/lib.adb
+++ b/gcc/ada/lib.adb
@@ -38,6 +38,7 @@ with Csets;    use Csets;
 with Einfo;    use Einfo;
 with Fname;    use Fname;
 with Nlists;   use Nlists;
+with Opt;      use Opt;
 with Output;   use Output;
 with Sinfo;    use Sinfo;
 with Sinput;   use Sinput;
@@ -259,18 +260,22 @@ package body Lib is
    ------------------------------
 
    function Check_Same_Extended_Unit (S1, S2 : Source_Ptr) return SEU_Result is
-      Sloc1  : Source_Ptr;
-      Sloc2  : Source_Ptr;
-      Sind1  : Source_File_Index;
-      Sind2  : Source_File_Index;
-      Inst1  : Source_Ptr;
-      Inst2  : Source_Ptr;
-      Unum1  : Unit_Number_Type;
-      Unum2  : Unit_Number_Type;
-      Unit1  : Node_Id;
-      Unit2  : Node_Id;
-      Depth1 : Nat;
-      Depth2 : Nat;
+      Max_Iterations : constant Nat := Maximum_Instantiations * 2;
+      --  Limit to prevent a potential infinite loop
+
+      Counter : Nat := 0;
+      Depth1  : Nat;
+      Depth2  : Nat;
+      Inst1   : Source_Ptr;
+      Inst2   : Source_Ptr;
+      Sind1   : Source_File_Index;
+      Sind2   : Source_File_Index;
+      Sloc1   : Source_Ptr;
+      Sloc2   : Source_Ptr;
+      Unit1   : Node_Id;
+      Unit2   : Node_Id;
+      Unum1   : Unit_Number_Type;
+      Unum2   : Unit_Number_Type;
 
    begin
       if S1 = No_Location or else S2 = No_Location then
@@ -435,7 +440,20 @@ package body Lib is
          return No;
 
          <<Continue>>
-            null;
+         Counter := Counter + 1;
+
+         --  Prevent looping forever
+
+         if Counter > Max_Iterations then
+            --  ??? Not quite right, but return a value to be able to generate
+            --  SCIL files and hope for the best.
+
+            if CodePeer_Mode then
+               return No;
+            else
+               raise Program_Error;
+            end if;
+         end if;
       end loop;
    end Check_Same_Extended_Unit;
 
diff --git a/gcc/ada/opt.ads b/gcc/ada/opt.ads
index 402a9e50e5e..4027fab60ed 100644
--- a/gcc/ada/opt.ads
+++ b/gcc/ada/opt.ads
@@ -776,8 +776,7 @@ package Opt is
    GNAT_Encodings : Int;
    pragma Import (C, GNAT_Encodings, "gnat_encodings");
    --  Constant controlling the balance between GNAT encodings and standard
-   --  DWARF to emit in the debug information. See aamissing.c for definitions
-   --  for the GNAAMP back end. It accepts the following values.
+   --  DWARF to emit in the debug information. It accepts the following values.
 
    DWARF_GNAT_Encodings_All     : constant Int := 0;
    DWARF_GNAT_Encodings_GDB     : constant Int := 1;
@@ -1194,13 +1193,11 @@ package Opt is
    Optimization_Level : Int;
    pragma Import (C, Optimization_Level, "optimize");
    --  Constant reflecting the optimization level (0,1,2,3 for -O0,-O1,-O2,-O3)
-   --  See e.g. aamissing.c for definitions for the GNAAMP back end.
 
    Optimize_Size : Int;
    pragma Import (C, Optimize_Size, "optimize_size");
    --  Constant reflecting setting of -Os (optimize for size). Set to nonzero
-   --  in -Os mode and set to zero otherwise. See aamissing.c for definition
-   --  of "optimize_size" for the GNAAMP backend.
+   --  in -Os mode and set to zero otherwise.
 
    Output_File_Name_Present : Boolean := False;
    --  GNATBIND, GNAT, GNATMAKE
@@ -1576,13 +1573,6 @@ package Opt is
    --  If true, activates the circuitry for unnesting subprograms (see the spec
    --  of Exp_Unst for full details). Currently set only by use of -gnatd.1.
 
-   Universal_Addressing_On_AAMP : Boolean := False;
-   --  GNAAMP
-   --  Indicates if library-level objects should be accessed and updated using
-   --  universal addressing instructions on the AAMP architecture. This flag is
-   --  set to True when pragma Universal_Data is given as a configuration
-   --  pragma.
-
    Unreserve_All_Interrupts : Boolean := False;
    --  GNAT, GNATBIND
    --  Normally set False, set True if a valid Unreserve_All_Interrupts pragma
diff --git a/gcc/ada/osint-c.ads b/gcc/ada/osint-c.ads
index 54ffb01f601..e7379175e9c 100644
--- a/gcc/ada/osint-c.ads
+++ b/gcc/ada/osint-c.ads
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 S p e c                                  --
 --                                                                          --
---          Copyright (C) 2001-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 2001-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -111,7 +111,8 @@ package Osint.C is
    procedure Set_File_Name (Ext : String);
    --  Sets a default file name from the main compiler source name. Ext is the
    --  extension, e.g. "ali" for a library information file. The name is in
-   --  Name_Buffer (with length in Name_Len) on return.
+   --  Name_Buffer (with length in Name_Len) on return, with
+   --  Name_Buffer (Name_Len) always set to ASCII.NUL.
 
    --------------------------------
    -- Library Information Output --
diff --git a/gcc/ada/par-prag.adb b/gcc/ada/par-prag.adb
index 56299140d4d..900d96a866f 100644
--- a/gcc/ada/par-prag.adb
+++ b/gcc/ada/par-prag.adb
@@ -1487,6 +1487,7 @@ begin
            Pragma_Unreferenced_Objects           |
            Pragma_Unreserve_All_Interrupts       |
            Pragma_Unsuppress                     |
+           Pragma_Unused                         |
            Pragma_Use_VADS_Size                  |
            Pragma_Volatile                       |
            Pragma_Volatile_Components            |
diff --git a/gcc/ada/prep.adb b/gcc/ada/prep.adb
index d5672bafb9d..6f401ede478 100644
--- a/gcc/ada/prep.adb
+++ b/gcc/ada/prep.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 2002-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 2002-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -1562,14 +1562,12 @@ package body Prep is
          --  so we have to deduct Start_Of_Processing from the token pointer.
 
          if Token = Tok_End_Of_Line then
-            if (Sinput.Source (Token_Ptr) = ASCII.CR
-                  and then Sinput.Source (Token_Ptr + 1) = ASCII.LF)
-              or else
-               (Sinput.Source (Token_Ptr) = ASCII.CR
-                  and then Sinput.Source (Token_Ptr + 1) = ASCII.LF)
+            if Sinput.Source (Token_Ptr) = ASCII.CR
+              and then Sinput.Source (Token_Ptr + 1) = ASCII.LF
             then
                Start_Of_Processing := Token_Ptr + 2;
             else
+               pragma Assert (Sinput.Source (Token_Ptr) = ASCII.LF);
                Start_Of_Processing := Token_Ptr + 1;
             end if;
          end if;
diff --git a/gcc/ada/prj-ext.adb b/gcc/ada/prj-ext.adb
index 5f134008b1c..127438d8a24 100644
--- a/gcc/ada/prj-ext.adb
+++ b/gcc/ada/prj-ext.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 2000-2013, Free Software Foundation, Inc.         --
+--          Copyright (C) 2000-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -116,7 +116,7 @@ package body Prj.Ext is
             then
                if not Silent then
                   Debug_Output
-                    ("Not overridding existing external reference '"
+                    ("Not overriding existing external reference '"
                      & External_Name & "', value was defined in "
                      & N.Source'Img);
                end if;
diff --git a/gcc/ada/s-fatgen.adb b/gcc/ada/s-fatgen.adb
index 35d037ac388..c2185e07328 100644
--- a/gcc/ada/s-fatgen.adb
+++ b/gcc/ada/s-fatgen.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -84,7 +84,7 @@ package body System.Fat_Gen is
    --  the sign of the exponent. The absolute value of Frac is in the range
    --  0.0 <= Frac < 1.0. If Frac = 0.0 or -0.0, then Expo is always zero.
 
-   function Gradual_Scaling  (Adjustment : UI) return T;
+   function Gradual_Scaling (Adjustment : UI) return T;
    --  Like Scaling with a first argument of 1.0, but returns the smallest
    --  denormal rather than zero when the adjustment is smaller than
    --  Machine_Emin. Used for Succ and Pred.
@@ -368,7 +368,7 @@ package body System.Fat_Gen is
       Result := Truncation (abs X);
       Tail   := abs X - Result;
 
-      if Tail >= 0.5  then
+      if Tail >= 0.5 then
          Result := Result + 1.0;
       end if;
 
@@ -553,7 +553,7 @@ package body System.Fat_Gen is
       Result := Truncation (abs X);
       Tail   := abs X - Result;
 
-      if Tail >= 0.5  then
+      if Tail >= 0.5 then
          Result := Result + 1.0;
       end if;
 
@@ -775,7 +775,7 @@ package body System.Fat_Gen is
       Result := Truncation (Abs_X);
       Tail   := Abs_X - Result;
 
-      if Tail > 0.5  then
+      if Tail > 0.5 then
          Result := Result + 1.0;
 
       elsif Tail = 0.5 then
diff --git a/gcc/ada/s-os_lib.adb b/gcc/ada/s-os_lib.adb
index f97bcbe79dc..31b2f08cab9 100644
--- a/gcc/ada/s-os_lib.adb
+++ b/gcc/ada/s-os_lib.adb
@@ -1495,6 +1495,21 @@ package body System.OS_Lib is
       return Is_Directory (F_Name'Address);
    end Is_Directory;
 
+   -----------------------------
+   -- Is_Read_Accessible_File --
+   -----------------------------
+
+   function Is_Read_Accessible_File (Name : String) return Boolean is
+      function Is_Read_Accessible_File (Name : Address) return Integer;
+      pragma Import
+        (C, Is_Read_Accessible_File, "__gnat_is_read_accessible_file");
+      F_Name : String (1 .. Name'Length + 1);
+   begin
+      F_Name (1 .. Name'Length) := Name;
+      F_Name (F_Name'Last)      := ASCII.NUL;
+      return Is_Read_Accessible_File (F_Name'Address) /= 0;
+   end Is_Read_Accessible_File;
+
    ----------------------
    -- Is_Readable_File --
    ----------------------
@@ -1571,6 +1586,21 @@ package body System.OS_Lib is
       return Is_Symbolic_Link (F_Name'Address);
    end Is_Symbolic_Link;
 
+   ------------------------------
+   -- Is_Write_Accessible_File --
+   ------------------------------
+
+   function Is_Write_Accessible_File (Name : String) return Boolean is
+      function Is_Write_Accessible_File (Name : Address) return Integer;
+      pragma Import
+        (C, Is_Write_Accessible_File, "__gnat_is_write_accessible_file");
+      F_Name : String (1 .. Name'Length + 1);
+   begin
+      F_Name (1 .. Name'Length) := Name;
+      F_Name (F_Name'Last)      := ASCII.NUL;
+      return Is_Write_Accessible_File (F_Name'Address) /= 0;
+   end Is_Write_Accessible_File;
+
    ----------------------
    -- Is_Writable_File --
    ----------------------
diff --git a/gcc/ada/s-os_lib.ads b/gcc/ada/s-os_lib.ads
index dd0851ded7d..90048749082 100644
--- a/gcc/ada/s-os_lib.ads
+++ b/gcc/ada/s-os_lib.ads
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 S p e c                                  --
 --                                                                          --
---          Copyright (C) 1995-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1995-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -457,6 +457,14 @@ package System.OS_Lib is
    --  not actually be writable due to some other process having exclusive
    --  access.
 
+   function Is_Read_Accessible_File (Name : String) return Boolean;
+   --  Determines if the given string, Name, is the name of an existing file
+   --  that is readable. Returns True if so, False otherwise.
+
+   function Is_Write_Accessible_File (Name : String) return Boolean;
+   --  Determines if the given string, Name, is the name of an existing file
+   --  that is writable. Returns True if so, False otherwise.
+
    function Locate_Exec_On_Path (Exec_Name : String) return String_Access;
    --  Try to locate an executable whose name is given by Exec_Name in the
    --  directories listed in the environment Path. If the Exec_Name does not
diff --git a/gcc/ada/s-poosiz.adb b/gcc/ada/s-poosiz.adb
index 683f32e315d..da3a0c5594c 100644
--- a/gcc/ada/s-poosiz.adb
+++ b/gcc/ada/s-poosiz.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -148,7 +148,7 @@ package body System.Pool_Size is
    -- Initialize --
    ----------------
 
-   procedure Initialize  (Pool : in out Stack_Bounded_Pool) is
+   procedure Initialize (Pool : in out Stack_Bounded_Pool) is
 
       --  Define the appropriate alignment for allocations. This is the
       --  maximum of the requested alignment, and the alignment required
@@ -180,7 +180,7 @@ package body System.Pool_Size is
    -- Storage_Size --
    ------------------
 
-   function  Storage_Size
+   function Storage_Size
      (Pool : Stack_Bounded_Pool) return SSE.Storage_Count
    is
    begin
diff --git a/gcc/ada/s-regexp.adb b/gcc/ada/s-regexp.adb
index 6a445340b14..e9faa1cc6b2 100644
--- a/gcc/ada/s-regexp.adb
+++ b/gcc/ada/s-regexp.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---                     Copyright (C) 1999-2015, AdaCore                     --
+--                     Copyright (C) 1999-2016, AdaCore                     --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -551,7 +551,7 @@ package body System.Regexp is
                     ("Incorrect character ']' in regular expression", J);
 
                when '\' =>
-                  if J < S'Last  then
+                  if J < S'Last then
                      J := J + 1;
                      Add_In_Map (S (J));
 
diff --git a/gcc/ada/sem_aggr.adb b/gcc/ada/sem_aggr.adb
index 8b6504575ca..580d33ecce6 100644
--- a/gcc/ada/sem_aggr.adb
+++ b/gcc/ada/sem_aggr.adb
@@ -647,9 +647,9 @@ package body Sem_Aggr is
 
    begin
       --  All the components of List are matched against Component and a count
-      --  is maintained of possible misspellings. When at the end of the the
+      --  is maintained of possible misspellings. When at the end of the
       --  analysis there are one or two (not more) possible misspellings,
-      --  these misspellings will be suggested as possible correction.
+      --  these misspellings will be suggested as possible corrections.
 
       Component_Elmt := First_Elmt (Elements);
       while Nr_Of_Suggestions <= Max_Suggestions
@@ -664,7 +664,7 @@ package body Sem_Aggr is
             case Nr_Of_Suggestions is
                when 1      => Suggestion_1 := Node (Component_Elmt);
                when 2      => Suggestion_2 := Node (Component_Elmt);
-               when others => exit;
+               when others => null;
             end case;
          end if;
 
@@ -1094,18 +1094,6 @@ package body Sem_Aggr is
                     Index_Constr   => First_Index (Typ),
                     Component_Typ  => Component_Type (Typ),
                     Others_Allowed => True);
-
-            elsif not Expander_Active
-              and then Pkind = N_Assignment_Statement
-            then
-               Aggr_Resolved :=
-                 Resolve_Array_Aggregate
-                   (N,
-                    Index          => First_Index (Aggr_Typ),
-                    Index_Constr   => First_Index (Typ),
-                    Component_Typ  => Component_Type (Typ),
-                    Others_Allowed => True);
-
             else
                Aggr_Resolved :=
                  Resolve_Array_Aggregate
@@ -1821,6 +1809,25 @@ package body Sem_Aggr is
          end if;
 
          Step_2 : declare
+            function Empty_Range (A : Node_Id) return Boolean;
+            --  If an association covers an empty range, some warnings on the
+            --  expression of the association can be disabled.
+
+            -----------------
+            -- Empty_Range --
+            -----------------
+
+            function Empty_Range (A : Node_Id) return Boolean is
+               R : constant Node_Id := First (Choices (A));
+            begin
+               return No (Next (R))
+                 and then Nkind (R) = N_Range
+                 and then Compile_Time_Compare
+                            (Low_Bound (R), High_Bound (R), False) = GT;
+            end Empty_Range;
+
+            --  Local variables
+
             Low  : Node_Id;
             High : Node_Id;
             --  Denote the lowest and highest values in an aggregate choice
@@ -1845,23 +1852,6 @@ package body Sem_Aggr is
             Errors_Posted_On_Choices : Boolean := False;
             --  Keeps track of whether any choices have semantic errors
 
-            function Empty_Range (A : Node_Id) return Boolean;
-            --  If an association covers an empty range, some warnings on the
-            --  expression of the association can be disabled.
-
-            -----------------
-            -- Empty_Range --
-            -----------------
-
-            function Empty_Range (A : Node_Id) return Boolean is
-               R : constant Node_Id := First (Choices (A));
-            begin
-               return No (Next (R))
-                 and then Nkind (R) = N_Range
-                 and then Compile_Time_Compare
-                            (Low_Bound (R), High_Bound (R), False) = GT;
-            end Empty_Range;
-
          --  Start of processing for Step_2
 
          begin
@@ -2940,7 +2930,7 @@ package body Sem_Aggr is
          end if;
 
       else
-         Error_Msg_N ("no unique type for this aggregate",  A);
+         Error_Msg_N ("no unique type for this aggregate", A);
       end if;
 
       Check_Function_Writable_Actuals (N);
@@ -2951,25 +2941,9 @@ package body Sem_Aggr is
    ------------------------------
 
    procedure Resolve_Record_Aggregate (N : Node_Id; Typ : Entity_Id) is
-      Assoc : Node_Id;
-      --  N_Component_Association node belonging to the input aggregate N
-
-      Expr            : Node_Id;
-      Positional_Expr : Node_Id;
-      Component       : Entity_Id;
-      Component_Elmt  : Elmt_Id;
-
-      Components : constant Elist_Id := New_Elmt_List;
-      --  Components is the list of the record components whose value must be
-      --  provided in the aggregate. This list does include discriminants.
-
       New_Assoc_List : constant List_Id := New_List;
-      New_Assoc      : Node_Id;
       --  New_Assoc_List is the newly built list of N_Component_Association
-      --  nodes. New_Assoc is one such N_Component_Association node in it.
-      --  Note that while Assoc and New_Assoc contain the same kind of nodes,
-      --  they are used to iterate over two different N_Component_Association
-      --  lists.
+      --  nodes.
 
       Others_Etype : Entity_Id := Empty;
       --  This variable is used to save the Etype of the last record component
@@ -2985,7 +2959,6 @@ package body Sem_Aggr is
       Box_Node       : Node_Id;
       Is_Box_Present : Boolean := False;
       Others_Box     : Integer := 0;
-
       --  Ada 2005 (AI-287): Variables used in case of default initialization
       --  to provide a functionality similar to Others_Etype. Box_Present
       --  indicates that the component takes its default initialization;
@@ -2993,9 +2966,9 @@ package body Sem_Aggr is
       --  (which may be a sub-aggregate of a larger one) that are default-
       --  initialized. A value of One indicates that an others_box is present.
       --  Any larger value indicates that the others_box is not redundant.
-      --  These variables, similar to Others_Etype, are also updated as a
-      --  side effect of function Get_Value.
-      --  Box_Node is used to place a warning on a redundant others_box.
+      --  These variables, similar to Others_Etype, are also updated as a side
+      --  effect of function Get_Value. Box_Node is used to place a warning on
+      --  a redundant others_box.
 
       procedure Add_Association
         (Component      : Entity_Id;
@@ -3007,14 +2980,23 @@ package body Sem_Aggr is
       --  either New_Assoc_List, or the association being built for an inner
       --  aggregate.
 
-      function Discr_Present (Discr : Entity_Id) return Boolean;
+      procedure Add_Discriminant_Values
+        (New_Aggr   : Node_Id;
+         Assoc_List : List_Id);
+      --  The constraint to a component may be given by a discriminant of the
+      --  enclosing type, in which case we have to retrieve its value, which is
+      --  part of the enclosing aggregate. Assoc_List provides the discriminant
+      --  associations of the current type or of some enclosing record.
+
+      function Discriminant_Present (Input_Discr : Entity_Id) return Boolean;
       --  If aggregate N is a regular aggregate this routine will return True.
-      --  Otherwise, if N is an extension aggregate, Discr is a discriminant
-      --  whose value may already have been specified by N's ancestor part.
-      --  This routine checks whether this is indeed the case and if so returns
-      --  False, signaling that no value for Discr should appear in N's
-      --  aggregate part. Also, in this case, the routine appends to
-      --  New_Assoc_List the discriminant value specified in the ancestor part.
+      --  Otherwise, if N is an extension aggregate, then Input_Discr denotes
+      --  a discriminant whose value may already have been specified by N's
+      --  ancestor part. This routine checks whether this is indeed the case
+      --  and if so returns False, signaling that no value for Input_Discr
+      --  should appear in N's aggregate part. Also, in this case, the routine
+      --  appends to New_Assoc_List the discriminant value specified in the
+      --  ancestor part.
       --
       --  If the aggregate is in a context with expansion delayed, it will be
       --  reanalyzed. The inherited discriminant values must not be reinserted
@@ -3022,11 +3004,16 @@ package body Sem_Aggr is
       --  present on first analysis to build the proper subtype indications.
       --  The flag Inherited_Discriminant is used to prevent the re-insertion.
 
+      function Find_Private_Ancestor (Typ : Entity_Id) return Entity_Id;
+      --  AI05-0115: Find earlier ancestor in the derivation chain that is
+      --  derived from private view Typ. Whether the aggregate is legal depends
+      --  on the current visibility of the type as well as that of the parent
+      --  of the ancestor.
+
       function Get_Value
         (Compon                 : Node_Id;
          From                   : List_Id;
-         Consider_Others_Choice : Boolean := False)
-         return                   Node_Id;
+         Consider_Others_Choice : Boolean := False) return Node_Id;
       --  Given a record component stored in parameter Compon, this function
       --  returns its value as it appears in the list From, which is a list
       --  of N_Component_Association nodes.
@@ -3051,7 +3038,14 @@ package body Sem_Aggr is
       --  Same as New_Copy_Tree (defined in Sem_Util), except that this routine
       --  also copies the dimensions of Source to the returned node.
 
-      procedure Resolve_Aggr_Expr (Expr : Node_Id; Component : Node_Id);
+      procedure Propagate_Discriminants
+        (Aggr       : Node_Id;
+         Assoc_List : List_Id);
+      --  Nested components may themselves be discriminated types constrained
+      --  by outer discriminants, whose values must be captured before the
+      --  aggregate is expanded into assignments.
+
+      procedure Resolve_Aggr_Expr (Expr : Node_Id; Component : Entity_Id);
       --  Analyzes and resolves expression Expr against the Etype of the
       --  Component. This routine also applies all appropriate checks to Expr.
       --  It finally saves a Expr in the newly created association list that
@@ -3069,13 +3063,12 @@ package body Sem_Aggr is
          Assoc_List     : List_Id;
          Is_Box_Present : Boolean := False)
       is
-         Loc : Source_Ptr;
          Choice_List : constant List_Id := New_List;
-         New_Assoc   : Node_Id;
+         Loc         : Source_Ptr;
 
       begin
-         --  If this is a box association the expression is missing, so
-         --  use the Sloc of the aggregate itself for the new association.
+         --  If this is a box association the expression is missing, so use the
+         --  Sloc of the aggregate itself for the new association.
 
          if Present (Expr) then
             Loc := Sloc (Expr);
@@ -3083,34 +3076,97 @@ package body Sem_Aggr is
             Loc := Sloc (N);
          end if;
 
-         Append (New_Occurrence_Of (Component, Loc), Choice_List);
-         New_Assoc :=
+         Append_To (Choice_List, New_Occurrence_Of (Component, Loc));
+
+         Append_To (Assoc_List,
            Make_Component_Association (Loc,
              Choices     => Choice_List,
              Expression  => Expr,
-             Box_Present => Is_Box_Present);
-         Append (New_Assoc, Assoc_List);
+             Box_Present => Is_Box_Present));
       end Add_Association;
 
-      -------------------
-      -- Discr_Present --
-      -------------------
+      -----------------------------
+      -- Add_Discriminant_Values --
+      -----------------------------
+
+      procedure Add_Discriminant_Values
+        (New_Aggr   : Node_Id;
+         Assoc_List : List_Id)
+      is
+         Assoc      : Node_Id;
+         Discr      : Entity_Id;
+         Discr_Elmt : Elmt_Id;
+         Discr_Val  : Node_Id;
+         Val        : Entity_Id;
+
+      begin
+         Discr      := First_Discriminant (Etype (New_Aggr));
+         Discr_Elmt := First_Elmt (Discriminant_Constraint (Etype (New_Aggr)));
+         while Present (Discr_Elmt) loop
+            Discr_Val := Node (Discr_Elmt);
+
+            --  If the constraint is given by a discriminant then it is a
+            --  discriminant of an enclosing record, and its value has already
+            --  been placed in the association list.
+
+            if Is_Entity_Name (Discr_Val)
+              and then Ekind (Entity (Discr_Val)) = E_Discriminant
+            then
+               Val := Entity (Discr_Val);
+
+               Assoc := First (Assoc_List);
+               while Present (Assoc) loop
+                  if Present (Entity (First (Choices (Assoc))))
+                    and then Entity (First (Choices (Assoc))) = Val
+                  then
+                     Discr_Val := Expression (Assoc);
+                     exit;
+                  end if;
+
+                  Next (Assoc);
+               end loop;
+            end if;
+
+            Add_Association
+              (Discr, New_Copy_Tree (Discr_Val),
+               Component_Associations (New_Aggr));
+
+            --  If the discriminant constraint is a current instance, mark the
+            --  current aggregate so that the self-reference can be expanded
+            --  later. The constraint may refer to the subtype of aggregate, so
+            --  use base type for comparison.
+
+            if Nkind (Discr_Val) = N_Attribute_Reference
+              and then Is_Entity_Name (Prefix (Discr_Val))
+              and then Is_Type (Entity (Prefix (Discr_Val)))
+              and then Base_Type (Etype (N)) = Entity (Prefix (Discr_Val))
+            then
+               Set_Has_Self_Reference (N);
+            end if;
+
+            Next_Elmt (Discr_Elmt);
+            Next_Discriminant (Discr);
+         end loop;
+      end Add_Discriminant_Values;
 
-      function Discr_Present (Discr : Entity_Id) return Boolean is
+      --------------------------
+      -- Discriminant_Present --
+      --------------------------
+
+      function Discriminant_Present (Input_Discr : Entity_Id) return Boolean is
          Regular_Aggr : constant Boolean := Nkind (N) /= N_Extension_Aggregate;
 
+         Ancestor_Is_Subtyp : Boolean;
+
          Loc : Source_Ptr;
 
          Ancestor     : Node_Id;
+         Ancestor_Typ : Entity_Id;
          Comp_Assoc   : Node_Id;
+         Discr        : Entity_Id;
          Discr_Expr   : Node_Id;
-
-         Ancestor_Typ : Entity_Id;
+         Discr_Val    : Elmt_Id := No_Elmt;
          Orig_Discr   : Entity_Id;
-         D            : Entity_Id;
-         D_Val        : Elmt_Id := No_Elmt; -- stop junk warning
-
-         Ancestor_Is_Subtyp : Boolean;
 
       begin
          if Regular_Aggr then
@@ -3167,41 +3223,66 @@ package body Sem_Aggr is
          --  Now look to see if Discr was specified in the ancestor part
 
          if Ancestor_Is_Subtyp then
-            D_Val := First_Elmt (Discriminant_Constraint (Entity (Ancestor)));
+            Discr_Val :=
+              First_Elmt (Discriminant_Constraint (Entity (Ancestor)));
          end if;
 
-         Orig_Discr := Original_Record_Component (Discr);
+         Orig_Discr := Original_Record_Component (Input_Discr);
 
-         D := First_Discriminant (Ancestor_Typ);
-         while Present (D) loop
+         Discr := First_Discriminant (Ancestor_Typ);
+         while Present (Discr) loop
 
             --  If Ancestor has already specified Disc value then insert its
             --  value in the final aggregate.
 
-            if Original_Record_Component (D) = Orig_Discr then
+            if Original_Record_Component (Discr) = Orig_Discr then
                if Ancestor_Is_Subtyp then
-                  Discr_Expr := New_Copy_Tree (Node (D_Val));
+                  Discr_Expr := New_Copy_Tree (Node (Discr_Val));
                else
                   Discr_Expr :=
                     Make_Selected_Component (Loc,
                       Prefix        => Duplicate_Subexpr (Ancestor),
-                      Selector_Name => New_Occurrence_Of (Discr, Loc));
+                      Selector_Name => New_Occurrence_Of (Input_Discr, Loc));
                end if;
 
-               Resolve_Aggr_Expr (Discr_Expr, Discr);
+               Resolve_Aggr_Expr (Discr_Expr, Input_Discr);
                Set_Inherited_Discriminant (Last (New_Assoc_List));
                return False;
             end if;
 
-            Next_Discriminant (D);
+            Next_Discriminant (Discr);
 
             if Ancestor_Is_Subtyp then
-               Next_Elmt (D_Val);
+               Next_Elmt (Discr_Val);
             end if;
          end loop;
 
          return True;
-      end Discr_Present;
+      end Discriminant_Present;
+
+      ---------------------------
+      -- Find_Private_Ancestor --
+      ---------------------------
+
+      function Find_Private_Ancestor (Typ : Entity_Id) return Entity_Id is
+         Par : Entity_Id;
+
+      begin
+         Par := Typ;
+         loop
+            if Has_Private_Ancestor (Par)
+              and then not Has_Private_Ancestor (Etype (Base_Type (Par)))
+            then
+               return Par;
+
+            elsif not Is_Derived_Type (Par) then
+               return Empty;
+
+            else
+               Par := Etype (Base_Type (Par));
+            end if;
+         end loop;
+      end Find_Private_Ancestor;
 
       ---------------
       -- Get_Value --
@@ -3210,8 +3291,7 @@ package body Sem_Aggr is
       function Get_Value
         (Compon                 : Node_Id;
          From                   : List_Id;
-         Consider_Others_Choice : Boolean := False)
-         return                   Node_Id
+         Consider_Others_Choice : Boolean := False) return Node_Id
       is
          Typ           : constant Entity_Id := Etype (Compon);
          Assoc         : Node_Id;
@@ -3276,14 +3356,14 @@ package body Sem_Aggr is
                               null;
                            else
                               Error_Msg_N
-                                ("components in OTHERS choice must "
-                                 & "have same type", Selector_Name);
+                                ("components in OTHERS choice must have same "
+                                 & "type", Selector_Name);
                            end if;
                         end if;
 
                         Others_Etype := Typ;
 
-                        --  Copy expression so that it is resolved
+                        --  Copy the expression so that it is resolved
                         --  independently for each component, This is needed
                         --  for accessibility checks on compoents of anonymous
                         --  access types, even in compile_only mode.
@@ -3424,15 +3504,110 @@ package body Sem_Aggr is
          return New_Copy;
       end New_Copy_Tree_And_Copy_Dimensions;
 
+      -----------------------------
+      -- Propagate_Discriminants --
+      -----------------------------
+
+      procedure Propagate_Discriminants
+        (Aggr       : Node_Id;
+         Assoc_List : List_Id)
+      is
+         Loc : constant Source_Ptr := Sloc (N);
+
+         Needs_Box : Boolean := False;
+
+         procedure Process_Component (Comp : Entity_Id);
+         --  Add one component with a box association to the inner aggregate,
+         --  and recurse if component is itself composite.
+
+         -----------------------
+         -- Process_Component --
+         -----------------------
+
+         procedure Process_Component (Comp : Entity_Id) is
+            T        : constant Entity_Id := Etype (Comp);
+            New_Aggr : Node_Id;
+
+         begin
+            if Is_Record_Type (T) and then Has_Discriminants (T) then
+               New_Aggr := Make_Aggregate (Loc, New_List, New_List);
+               Set_Etype (New_Aggr, T);
+
+               Add_Association
+                 (Comp, New_Aggr, Component_Associations (Aggr));
+
+               --  Collect discriminant values and recurse
+
+               Add_Discriminant_Values (New_Aggr, Assoc_List);
+               Propagate_Discriminants (New_Aggr, Assoc_List);
+
+            else
+               Needs_Box := True;
+            end if;
+         end Process_Component;
+
+         --  Local variables
+
+         Aggr_Type  : constant Entity_Id := Base_Type (Etype (Aggr));
+         Components : constant Elist_Id  := New_Elmt_List;
+         Def_Node   : constant Node_Id   :=
+                       Type_Definition (Declaration_Node (Aggr_Type));
+
+         Comp      : Node_Id;
+         Comp_Elmt : Elmt_Id;
+         Errors    : Boolean;
+
+      --  Start of processing for Propagate_Discriminants
+
+      begin
+         --  The component type may be a variant type. Collect the components
+         --  that are ruled by the known values of the discriminants. Their
+         --  values have already been inserted into the component list of the
+         --  current aggregate.
+
+         if Nkind (Def_Node) = N_Record_Definition
+           and then Present (Component_List (Def_Node))
+           and then Present (Variant_Part (Component_List (Def_Node)))
+         then
+            Gather_Components (Aggr_Type,
+              Component_List (Def_Node),
+              Governed_By   => Component_Associations (Aggr),
+              Into          => Components,
+              Report_Errors => Errors);
+
+            Comp_Elmt := First_Elmt (Components);
+            while Present (Comp_Elmt) loop
+               if Ekind (Node (Comp_Elmt)) /= E_Discriminant then
+                  Process_Component (Node (Comp_Elmt));
+               end if;
+
+               Next_Elmt (Comp_Elmt);
+            end loop;
+
+            --  No variant part, iterate over all components
+
+         else
+            Comp := First_Component (Etype (Aggr));
+            while Present (Comp) loop
+               Process_Component (Comp);
+               Next_Component (Comp);
+            end loop;
+         end if;
+
+         if Needs_Box then
+            Append_To (Component_Associations (Aggr),
+              Make_Component_Association (Loc,
+                Choices     => New_List (Make_Others_Choice (Loc)),
+                Expression  => Empty,
+                Box_Present => True));
+         end if;
+      end Propagate_Discriminants;
+
       -----------------------
       -- Resolve_Aggr_Expr --
       -----------------------
 
-      procedure Resolve_Aggr_Expr (Expr : Node_Id; Component : Node_Id) is
-         Expr_Type : Entity_Id := Empty;
-         New_C     : Entity_Id := Component;
-         New_Expr  : Node_Id;
-
+      procedure Resolve_Aggr_Expr (Expr : Node_Id; Component : Entity_Id) is
          function Has_Expansion_Delayed (Expr : Node_Id) return Boolean;
          --  If the expression is an aggregate (possibly qualified) then its
          --  expansion is delayed until the enclosing aggregate is expanded
@@ -3442,6 +3617,28 @@ package body Sem_Aggr is
          --  dynamic-sized aggregate in the code, something that gigi cannot
          --  handle.
 
+         ---------------------------
+         -- Has_Expansion_Delayed --
+         ---------------------------
+
+         function Has_Expansion_Delayed (Expr : Node_Id) return Boolean is
+         begin
+            return
+               (Nkind_In (Expr, N_Aggregate, N_Extension_Aggregate)
+                 and then Present (Etype (Expr))
+                 and then Is_Record_Type (Etype (Expr))
+                 and then Expansion_Delayed (Expr))
+              or else
+                (Nkind (Expr) = N_Qualified_Expression
+                  and then Has_Expansion_Delayed (Expression (Expr)));
+         end Has_Expansion_Delayed;
+
+         --  Local variables
+
+         Expr_Type : Entity_Id := Empty;
+         New_C     : Entity_Id := Component;
+         New_Expr  : Node_Id;
+
          Relocate : Boolean;
          --  Set to True if the resolved Expr node needs to be relocated when
          --  attached to the newly created association list. This node need not
@@ -3451,21 +3648,6 @@ package body Sem_Aggr is
          --  aggregate and hence it needs to be relocated when moved over to
          --  the new association list.
 
-         ---------------------------
-         -- Has_Expansion_Delayed --
-         ---------------------------
-
-         function Has_Expansion_Delayed (Expr : Node_Id) return Boolean is
-            Kind : constant Node_Kind := Nkind (Expr);
-         begin
-            return (Nkind_In (Kind, N_Aggregate, N_Extension_Aggregate)
-                     and then Present (Etype (Expr))
-                     and then Is_Record_Type (Etype (Expr))
-                     and then Expansion_Delayed (Expr))
-              or else (Kind = N_Qualified_Expression
-                        and then Has_Expansion_Delayed (Expression (Expr)));
-         end Has_Expansion_Delayed;
-
       --  Start of processing for Resolve_Aggr_Expr
 
       begin
@@ -3588,6 +3770,8 @@ package body Sem_Aggr is
             Generate_Range_Check (Expr, Expr_Type, CE_Range_Check_Failed);
          end if;
 
+         --  Add association Component => Expr if the caller requests it
+
          if Relocate then
             New_Expr := Relocate_Node (Expr);
 
@@ -3603,6 +3787,17 @@ package body Sem_Aggr is
          Add_Association (New_C, New_Expr, New_Assoc_List);
       end Resolve_Aggr_Expr;
 
+      --  Local variables
+
+      Components : constant Elist_Id := New_Elmt_List;
+      --  Components is the list of the record components whose value must be
+      --  provided in the aggregate. This list does include discriminants.
+
+      Expr            : Node_Id;
+      Component       : Entity_Id;
+      Component_Elmt  : Elmt_Id;
+      Positional_Expr : Node_Id;
+
    --  Start of processing for Resolve_Record_Aggregate
 
    begin
@@ -3615,7 +3810,6 @@ package body Sem_Aggr is
       if Present (Component_Associations (N))
         and then Present (First (Component_Associations (N)))
       then
-
          if Present (Expressions (N)) then
             Check_SPARK_05_Restriction
               ("named association cannot follow positional one",
@@ -3686,8 +3880,9 @@ package body Sem_Aggr is
       --  STEP 2: Verify aggregate structure
 
       Step_2 : declare
-         Selector_Name : Node_Id;
+         Assoc         : Node_Id;
          Bad_Aggregate : Boolean := False;
+         Selector_Name : Node_Id;
 
       begin
          if Present (Component_Associations (N)) then
@@ -3782,7 +3977,7 @@ package body Sem_Aggr is
          --  First find the discriminant values in the positional components
 
          while Present (Discrim) and then Present (Positional_Expr) loop
-            if Discr_Present (Discrim) then
+            if Discriminant_Present (Discrim) then
                Resolve_Aggr_Expr (Positional_Expr, Discrim);
 
                --  Ada 2005 (AI-231)
@@ -3810,7 +4005,7 @@ package body Sem_Aggr is
          while Present (Discrim) loop
             Expr := Get_Value (Discrim, Component_Associations (N), True);
 
-            if not Discr_Present (Discrim) then
+            if not Discriminant_Present (Discrim) then
                if Present (Expr) then
                   Error_Msg_NE
                     ("more than one value supplied for discriminant &",
@@ -3858,17 +4053,17 @@ package body Sem_Aggr is
                   and then Present (Underlying_Record_View (Typ)))
       then
          Build_Constrained_Itype : declare
+            Constrs     : constant List_Id    := New_List;
             Loc         : constant Source_Ptr := Sloc (N);
+            Def_Id      : Entity_Id;
             Indic       : Node_Id;
+            New_Assoc   : Node_Id;
             Subtyp_Decl : Node_Id;
-            Def_Id      : Entity_Id;
-
-            C : constant List_Id := New_List;
 
          begin
             New_Assoc := First (New_Assoc_List);
             while Present (New_Assoc) loop
-               Append (Duplicate_Subexpr (Expression (New_Assoc)), To => C);
+               Append_To (Constrs, Duplicate_Subexpr (Expression (New_Assoc)));
                Next (New_Assoc);
             end loop;
 
@@ -3880,14 +4075,16 @@ package body Sem_Aggr is
                    Subtype_Mark =>
                      New_Occurrence_Of (Underlying_Record_View (Typ), Loc),
                    Constraint   =>
-                     Make_Index_Or_Discriminant_Constraint (Loc, C));
+                     Make_Index_Or_Discriminant_Constraint (Loc,
+                       Constraints => Constrs));
             else
                Indic :=
                  Make_Subtype_Indication (Loc,
                    Subtype_Mark =>
                      New_Occurrence_Of (Base_Type (Typ), Loc),
                    Constraint   =>
-                     Make_Index_Or_Discriminant_Constraint (Loc, C));
+                     Make_Index_Or_Discriminant_Constraint (Loc,
+                       Constraints => Constrs));
             end if;
 
             Def_Id := Create_Itype (Ekind (Typ), N);
@@ -3914,45 +4111,13 @@ package body Sem_Aggr is
       --  STEP 5: Get remaining components according to discriminant values
 
       Step_5 : declare
+         Dnode           : Node_Id;
+         Errors_Found    : Boolean := False;
          Record_Def      : Node_Id;
          Parent_Typ      : Entity_Id;
-         Root_Typ        : Entity_Id;
          Parent_Typ_List : Elist_Id;
          Parent_Elmt     : Elmt_Id;
-         Errors_Found    : Boolean := False;
-         Dnode           : Node_Id;
-
-         function Find_Private_Ancestor return Entity_Id;
-         --  AI05-0115: Find earlier ancestor in the derivation chain that is
-         --  derived from a private view. Whether the aggregate is legal
-         --  depends on the current visibility of the type as well as that
-         --  of the parent of the ancestor.
-
-         ---------------------------
-         -- Find_Private_Ancestor --
-         ---------------------------
-
-         function Find_Private_Ancestor return Entity_Id is
-            Par : Entity_Id;
-
-         begin
-            Par := Typ;
-            loop
-               if Has_Private_Ancestor (Par)
-                 and then not Has_Private_Ancestor (Etype (Base_Type (Par)))
-               then
-                  return Par;
-
-               elsif not Is_Derived_Type (Par) then
-                  return Empty;
-
-               else
-                  Par := Etype (Base_Type (Par));
-               end if;
-            end loop;
-         end Find_Private_Ancestor;
-
-      --  Start of processing for Step_5
+         Root_Typ        : Entity_Id;
 
       begin
          if Is_Derived_Type (Typ) and then Is_Tagged_Type (Typ) then
@@ -3967,19 +4132,20 @@ package body Sem_Aggr is
                Root_Typ := Base_Type (Etype (Ancestor_Part (N)));
 
             else
-               --  AI05-0115:  check legality of aggregate for type with
-               --  aa private ancestor.
+               --  AI05-0115: check legality of aggregate for type with a
+               --  private ancestor.
 
                Root_Typ := Root_Type (Typ);
                if Has_Private_Ancestor (Typ) then
                   declare
                      Ancestor      : constant Entity_Id :=
-                       Find_Private_Ancestor;
+                                       Find_Private_Ancestor (Typ);
                      Ancestor_Unit : constant Entity_Id :=
-                       Cunit_Entity (Get_Source_Unit (Ancestor));
+                                       Cunit_Entity
+                                         (Get_Source_Unit (Ancestor));
                      Parent_Unit   : constant Entity_Id :=
-                       Cunit_Entity
-                         (Get_Source_Unit (Base_Type (Etype (Ancestor))));
+                                       Cunit_Entity (Get_Source_Unit
+                                         (Base_Type (Etype (Ancestor))));
                   begin
                      --  Check whether we are in a scope that has full view
                      --  over the private ancestor and its parent. This can
@@ -4197,8 +4363,7 @@ package body Sem_Aggr is
                --  object of the aggregate.
 
                if Present (Parent (Component))
-                 and then
-                   Nkind (Parent (Component)) = N_Component_Declaration
+                 and then Nkind (Parent (Component)) = N_Component_Declaration
                  and then Present (Expression (Parent (Component)))
                then
                   Expr :=
@@ -4221,26 +4386,18 @@ package body Sem_Aggr is
                elsif Present (Underlying_Type (Ctyp))
                  and then Is_Access_Type (Underlying_Type (Ctyp))
                then
-                  if not Is_Private_Type (Ctyp) then
-                     Expr := Make_Null (Sloc (N));
-                     Set_Etype (Expr, Ctyp);
-                     Add_Association
-                       (Component  => Component,
-                        Expr       => Expr,
-                        Assoc_List => New_Assoc_List);
-
                   --  If the component's type is private with an access type as
                   --  its underlying type then we have to create an unchecked
                   --  conversion to satisfy type checking.
 
-                  else
+                  if Is_Private_Type (Ctyp) then
                      declare
                         Qual_Null : constant Node_Id :=
                                       Make_Qualified_Expression (Sloc (N),
                                         Subtype_Mark =>
                                           New_Occurrence_Of
                                             (Underlying_Type (Ctyp), Sloc (N)),
-                                        Expression => Make_Null (Sloc (N)));
+                                        Expression   => Make_Null (Sloc (N)));
 
                         Convert_Null : constant Node_Id :=
                                          Unchecked_Convert_To
@@ -4253,6 +4410,17 @@ package body Sem_Aggr is
                            Expr       => Convert_Null,
                            Assoc_List => New_Assoc_List);
                      end;
+
+                  --  Otherwise the component type is non-private
+
+                  else
+                     Expr := Make_Null (Sloc (N));
+                     Set_Etype (Expr, Ctyp);
+
+                     Add_Association
+                       (Component  => Component,
+                        Expr       => Expr,
+                        Assoc_List => New_Assoc_List);
                   end if;
 
                --  Ada 2012: If component is scalar with default value, use it
@@ -4262,8 +4430,9 @@ package body Sem_Aggr is
                then
                   Add_Association
                     (Component  => Component,
-                     Expr       => Default_Aspect_Value
-                                     (First_Subtype (Underlying_Type (Ctyp))),
+                     Expr       =>
+                       Default_Aspect_Value
+                         (First_Subtype (Underlying_Type (Ctyp))),
                      Assoc_List => New_Assoc_List);
 
                elsif Has_Non_Null_Base_Init_Proc (Ctyp)
@@ -4278,8 +4447,8 @@ package body Sem_Aggr is
                      --  for the rest, if other components are present.
 
                      --  The type of the aggregate is the known subtype of
-                     --  the component. The capture of discriminants must
-                     --  be recursive because subcomponents may be constrained
+                     --  the component. The capture of discriminants must be
+                     --  recursive because subcomponents may be constrained
                      --  (transitively) by discriminants of enclosing types.
                      --  For a private type with discriminants, a call to the
                      --  initialization procedure will be generated, and no
@@ -4289,206 +4458,6 @@ package body Sem_Aggr is
                         Loc  : constant Source_Ptr := Sloc (N);
                         Expr : Node_Id;
 
-                        procedure Add_Discriminant_Values
-                          (New_Aggr   : Node_Id;
-                           Assoc_List : List_Id);
-                        --  The constraint to a component may be given by a
-                        --  discriminant of the enclosing type, in which case
-                        --  we have to retrieve its value, which is part of the
-                        --  enclosing aggregate. Assoc_List provides the
-                        --  discriminant associations of the current type or
-                        --  of some enclosing record.
-
-                        procedure Propagate_Discriminants
-                          (Aggr       : Node_Id;
-                           Assoc_List : List_Id);
-                        --  Nested components may themselves be discriminated
-                        --  types constrained by outer discriminants, whose
-                        --  values must be captured before the aggregate is
-                        --  expanded into assignments.
-
-                        -----------------------------
-                        -- Add_Discriminant_Values --
-                        -----------------------------
-
-                        procedure Add_Discriminant_Values
-                          (New_Aggr   : Node_Id;
-                           Assoc_List : List_Id)
-                        is
-                           Assoc      : Node_Id;
-                           Discr      : Entity_Id;
-                           Discr_Elmt : Elmt_Id;
-                           Discr_Val  : Node_Id;
-                           Val        : Entity_Id;
-
-                        begin
-                           Discr := First_Discriminant (Etype (New_Aggr));
-                           Discr_Elmt :=
-                             First_Elmt
-                               (Discriminant_Constraint (Etype (New_Aggr)));
-                           while Present (Discr_Elmt) loop
-                              Discr_Val := Node (Discr_Elmt);
-
-                              --  If the constraint is given by a discriminant
-                              --  it is a discriminant of an enclosing record,
-                              --  and its value has already been placed in the
-                              --  association list.
-
-                              if Is_Entity_Name (Discr_Val)
-                                and then
-                                  Ekind (Entity (Discr_Val)) = E_Discriminant
-                              then
-                                 Val := Entity (Discr_Val);
-
-                                 Assoc := First (Assoc_List);
-                                 while Present (Assoc) loop
-                                    if Present
-                                         (Entity (First (Choices (Assoc))))
-                                      and then
-                                        Entity (First (Choices (Assoc))) = Val
-                                    then
-                                       Discr_Val := Expression (Assoc);
-                                       exit;
-                                    end if;
-
-                                    Next (Assoc);
-                                 end loop;
-                              end if;
-
-                              Add_Association
-                                (Discr, New_Copy_Tree (Discr_Val),
-                                 Component_Associations (New_Aggr));
-
-                              --  If the discriminant constraint is a current
-                              --  instance, mark the current aggregate so that
-                              --  the self-reference can be expanded later.
-                              --  The constraint may refer to the subtype of
-                              --  aggregate, so use base type for comparison.
-
-                              if Nkind (Discr_Val) = N_Attribute_Reference
-                                and then Is_Entity_Name (Prefix (Discr_Val))
-                                and then Is_Type (Entity (Prefix (Discr_Val)))
-                                and then Base_Type (Etype (N)) =
-                                           Entity (Prefix (Discr_Val))
-                              then
-                                 Set_Has_Self_Reference (N);
-                              end if;
-
-                              Next_Elmt (Discr_Elmt);
-                              Next_Discriminant (Discr);
-                           end loop;
-                        end Add_Discriminant_Values;
-
-                        -----------------------------
-                        -- Propagate_Discriminants --
-                        -----------------------------
-
-                        procedure Propagate_Discriminants
-                          (Aggr       : Node_Id;
-                           Assoc_List : List_Id)
-                        is
-                           Aggr_Type : constant Entity_Id :=
-                                         Base_Type (Etype (Aggr));
-                           Def_Node  : constant Node_Id :=
-                                         Type_Definition
-                                           (Declaration_Node (Aggr_Type));
-
-                           Comp       : Node_Id;
-                           Comp_Elmt  : Elmt_Id;
-                           Components : constant Elist_Id := New_Elmt_List;
-                           Needs_Box  : Boolean := False;
-                           Errors     : Boolean;
-
-                           procedure Process_Component (Comp : Entity_Id);
-                           --  Add one component with a box association to the
-                           --  inner aggregate, and recurse if component is
-                           --  itself composite.
-
-                           -----------------------
-                           -- Process_Component --
-                           -----------------------
-
-                           procedure Process_Component (Comp : Entity_Id) is
-                              T        : constant Entity_Id := Etype (Comp);
-                              New_Aggr : Node_Id;
-
-                           begin
-                              if Is_Record_Type (T)
-                                and then Has_Discriminants (T)
-                              then
-                                 New_Aggr :=
-                                   Make_Aggregate (Loc, New_List, New_List);
-                                 Set_Etype (New_Aggr, T);
-                                 Add_Association
-                                   (Comp, New_Aggr,
-                                     Component_Associations (Aggr));
-
-                                 --  Collect discriminant values and recurse
-
-                                 Add_Discriminant_Values
-                                   (New_Aggr, Assoc_List);
-                                 Propagate_Discriminants
-                                   (New_Aggr, Assoc_List);
-
-                              else
-                                 Needs_Box := True;
-                              end if;
-                           end Process_Component;
-
-                        --  Start of processing for Propagate_Discriminants
-
-                        begin
-                           --  The component type may be a variant type, so
-                           --  collect the components that are ruled by the
-                           --  known values of the discriminants. Their values
-                           --  have already been inserted into the component
-                           --  list of the current aggregate.
-
-                           if Nkind (Def_Node) = N_Record_Definition
-                             and then Present (Component_List (Def_Node))
-                             and then
-                               Present
-                                 (Variant_Part (Component_List (Def_Node)))
-                           then
-                              Gather_Components (Aggr_Type,
-                                Component_List (Def_Node),
-                                Governed_By   => Component_Associations (Aggr),
-                                Into          => Components,
-                                Report_Errors => Errors);
-
-                              Comp_Elmt := First_Elmt (Components);
-                              while Present (Comp_Elmt) loop
-                                 if Ekind (Node (Comp_Elmt)) /=
-                                      E_Discriminant
-                                 then
-                                    Process_Component (Node (Comp_Elmt));
-                                 end if;
-
-                                 Next_Elmt (Comp_Elmt);
-                              end loop;
-
-                           --  No variant part, iterate over all components
-
-                           else
-                              Comp := First_Component (Etype (Aggr));
-                              while Present (Comp) loop
-                                 Process_Component (Comp);
-                                 Next_Component (Comp);
-                              end loop;
-                           end if;
-
-                           if Needs_Box then
-                              Append_To (Component_Associations (Aggr),
-                                Make_Component_Association (Loc,
-                                  Choices     =>
-                                    New_List (Make_Others_Choice (Loc)),
-                                  Expression  => Empty,
-                                  Box_Present => True));
-                           end if;
-                        end Propagate_Discriminants;
-
-                     --  Start of processing for Capture_Discriminants
-
                      begin
                         Expr := Make_Aggregate (Loc, New_List, New_List);
                         Set_Etype (Expr, Ctyp);
@@ -4506,9 +4475,9 @@ package body Sem_Aggr is
 
                         elsif Has_Discriminants (Ctyp) then
                            Add_Discriminant_Values
-                              (Expr, Component_Associations (Expr));
+                             (Expr, Component_Associations (Expr));
                            Propagate_Discriminants
-                              (Expr, Component_Associations (Expr));
+                             (Expr, Component_Associations (Expr));
 
                         else
                            declare
@@ -4531,6 +4500,7 @@ package body Sem_Aggr is
                                             Expression  => Empty,
                                             Box_Present => True));
                                     end if;
+
                                     exit;
                                  end if;
 
@@ -4545,6 +4515,9 @@ package body Sem_Aggr is
                            Assoc_List => New_Assoc_List);
                      end Capture_Discriminants;
 
+                  --  Otherwise the component type is not a record, or it has
+                  --  not discriminants, or it is private.
+
                   else
                      Add_Association
                        (Component      => Component,
@@ -4584,6 +4557,9 @@ package body Sem_Aggr is
       --  STEP 7: check for invalid components + check type in choice list
 
       Step_7 : declare
+         Assoc     : Node_Id;
+         New_Assoc : Node_Id;
+
          Selectr : Node_Id;
          --  Selector name
 
@@ -4659,7 +4635,7 @@ package body Sem_Aggr is
                               if Nkind (N) /= N_Extension_Aggregate
                                 or else
                                   Scope (Original_Record_Component (C)) /=
-                                                     Etype (Ancestor_Part (N))
+                                    Etype (Ancestor_Part (N))
                               then
                                  exit;
                               end if;
diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
index eefeabe63d6..c0be95d525a 100644
--- a/gcc/ada/sem_attr.adb
+++ b/gcc/ada/sem_attr.adb
@@ -1354,14 +1354,17 @@ package body Sem_Attr is
          --  The aspect or pragma where the attribute resides should be
          --  associated with a subprogram declaration or a body. If this is not
          --  the case, then the aspect or pragma is illegal. Return as analysis
-         --  cannot be carried out.
+         --  cannot be carried out. Note that it is legal to have the aspect
+         --  appear on a subprogram renaming, when the renamed entity is an
+         --  attribute reference.
 
          if not Nkind_In (Subp_Decl, N_Abstract_Subprogram_Declaration,
                                      N_Entry_Declaration,
                                      N_Generic_Subprogram_Declaration,
                                      N_Subprogram_Body,
                                      N_Subprogram_Body_Stub,
-                                     N_Subprogram_Declaration)
+                                     N_Subprogram_Declaration,
+                                     N_Subprogram_Renaming_Declaration)
          then
             return;
          end if;
@@ -3374,9 +3377,9 @@ package body Sem_Attr is
                P_Type := Underlying_Type (P_Type);
             end if;
 
-            --  Must have discriminants or be an access type designating
-            --  a type with discriminants. If it is a classwide type it
-            --  has unknown discriminants.
+            --  Must have discriminants or be an access type designating a type
+            --  with discriminants. If it is a class-wide type it has unknown
+            --  discriminants.
 
             if Has_Discriminants (P_Type)
               or else Has_Unknown_Discriminants (P_Type)
@@ -3740,15 +3743,8 @@ package body Sem_Attr is
             Check_Discrete_Type;
             Resolve (E1, P_Base_Type);
 
-         else
-            if not Is_Entity_Name (P)
-              or else (not Is_Object (Entity (P))
-                        and then Ekind (Entity (P)) /= E_Enumeration_Literal)
-            then
-               Error_Attr_P
-                 ("prefix of % attribute must be " &
-                  "discrete type/object or enum literal");
-            end if;
+         elsif not Is_Discrete_Type (Etype (P)) then
+            Error_Attr_P ("prefix of % attribute must be of discrete type");
          end if;
 
          Set_Etype (N, Universal_Integer);
@@ -5913,7 +5909,7 @@ package body Sem_Attr is
 
          else
             Error_Attr_P
-              ("prefix of% attribute must be remote access to classwide");
+              ("prefix of% attribute must be remote access-to-class-wide");
          end if;
 
       ----------
@@ -7424,35 +7420,51 @@ package body Sem_Attr is
          elsif Id = Attribute_Enum_Rep then
             if Is_Entity_Name (P) then
 
-               --  The prefix denotes a constant or an enumeration literal, the
-               --  attribute can be folded. A generated loop variable for an
-               --  iterator is a constant, but cannot be constant-folded.
+               declare
+                  Enum_Expr : Node_Id;
+                  --  The enumeration-type expression of interest
 
-               if Ekind (Entity (P)) = E_Enumeration_Literal
-                 or else
-                   (Ekind (Entity (P)) = E_Constant
-                     and then Ekind (Scope (Entity (P))) /= E_Loop)
-               then
-                  P_Entity := Etype (P);
+               begin
+                  --  P'Enum_Rep case
 
-               --  The prefix denotes an enumeration type. Folding can occur
-               --  when the argument is a constant or an enumeration literal.
+                  if Ekind_In (Entity (P), E_Constant,
+                                           E_Enumeration_Literal)
+                  then
+                     Enum_Expr := P;
 
-               elsif Is_Enumeration_Type (Entity (P))
-                 and then Present (E1)
-                 and then Is_Entity_Name (E1)
-                 and then Ekind_In (Entity (E1), E_Constant,
-                                                 E_Enumeration_Literal)
-               then
-                  P_Entity := Etype (P);
+                  --  Enum_Type'Enum_Rep (E1) case
 
-               --  Otherwise the attribute must be expanded into a conversion
-               --  and evaluated at run time.
+                  elsif Is_Enumeration_Type (Entity (P)) then
+                     Enum_Expr := E1;
 
-               else
-                  Check_Expressions;
-                  return;
-               end if;
+                  --  Otherwise the attribute must be expanded into a
+                  --  conversion and evaluated at run time.
+
+                  else
+                     Check_Expressions;
+                     return;
+                  end if;
+
+                  --  We can fold if the expression is an enumeration
+                  --  literal, or if it denotes a constant whose value
+                  --  is known at compile time.
+
+                  if Nkind (Enum_Expr) in N_Has_Entity
+                    and then (Ekind (Entity (Enum_Expr)) =
+                                E_Enumeration_Literal
+                      or else
+                       (Ekind (Entity (Enum_Expr)) = E_Constant
+                          and then Nkind (Parent (Entity (Enum_Expr))) =
+                                     N_Object_Declaration
+                          and then Compile_Time_Known_Value
+                                     (Expression (Parent (Entity (P))))))
+                  then
+                     P_Entity := Etype (P);
+                  else
+                     Check_Expressions;
+                     return;
+                  end if;
+               end;
 
             --  Otherwise the attribute is illegal, do not attempt to perform
             --  any kind of folding.
diff --git a/gcc/ada/sem_ch10.adb b/gcc/ada/sem_ch10.adb
index d4cd883c0d0..86dbad06f52 100644
--- a/gcc/ada/sem_ch10.adb
+++ b/gcc/ada/sem_ch10.adb
@@ -269,8 +269,8 @@ package body Sem_Ch10 is
          procedure Process_Body_Clauses
           (Context_List      : List_Id;
            Clause            : Node_Id;
-           Used              : in out Boolean;
-           Used_Type_Or_Elab : in out Boolean);
+           Used              : out Boolean;
+           Used_Type_Or_Elab : out Boolean);
          --  Examine the context clauses of a package body, trying to match the
          --  name entity of Clause with any list element. If the match occurs
          --  on a use package clause set Used to True, for a use type clause or
@@ -279,8 +279,8 @@ package body Sem_Ch10 is
          procedure Process_Spec_Clauses
           (Context_List : List_Id;
            Clause       : Node_Id;
-           Used         : in out Boolean;
-           Withed       : in out Boolean;
+           Used         : out Boolean;
+           Withed       : out Boolean;
            Exit_On_Self : Boolean := False);
          --  Examine the context clauses of a package spec, trying to match
          --  the name entity of Clause with any list element. If the match
@@ -298,8 +298,8 @@ package body Sem_Ch10 is
          procedure Process_Body_Clauses
           (Context_List      : List_Id;
            Clause            : Node_Id;
-           Used              : in out Boolean;
-           Used_Type_Or_Elab : in out Boolean)
+           Used              : out Boolean;
+           Used_Type_Or_Elab : out Boolean)
          is
             Nam_Ent   : constant Entity_Id := Entity (Name (Clause));
             Cont_Item : Node_Id;
@@ -419,8 +419,8 @@ package body Sem_Ch10 is
          procedure Process_Spec_Clauses
           (Context_List : List_Id;
            Clause       : Node_Id;
-           Used         : in out Boolean;
-           Withed       : in out Boolean;
+           Used         : out Boolean;
+           Withed       : out Boolean;
            Exit_On_Self : Boolean := False)
          is
             Nam_Ent   : constant Entity_Id := Entity (Name (Clause));
@@ -515,10 +515,10 @@ package body Sem_Ch10 is
 
                if Present (Spec_Context_Items) then
                   declare
-                     Used_In_Body      : Boolean := False;
-                     Used_In_Spec      : Boolean := False;
-                     Used_Type_Or_Elab : Boolean := False;
-                     Withed_In_Spec    : Boolean := False;
+                     Used_In_Body      : Boolean;
+                     Used_In_Spec      : Boolean;
+                     Used_Type_Or_Elab : Boolean;
+                     Withed_In_Spec    : Boolean;
 
                   begin
                      Process_Spec_Clauses
@@ -1834,9 +1834,8 @@ package body Sem_Ch10 is
             --  Give message if we did not get the unit Emit warning even if
             --  missing subunit is not within main unit, to simplify debugging.
 
-            if Original_Operating_Mode = Generate_Code
-              and then Unum = No_Unit
-            then
+            pragma Assert (Original_Operating_Mode = Generate_Code);
+            if Unum = No_Unit then
                Error_Msg_Unit_1 := Subunit_Name;
                Error_Msg_File_1 :=
                  Get_File_Name (Subunit_Name, Subunit => True);
diff --git a/gcc/ada/sem_ch12.adb b/gcc/ada/sem_ch12.adb
index f62c30f1aec..8533af0ecc7 100644
--- a/gcc/ada/sem_ch12.adb
+++ b/gcc/ada/sem_ch12.adb
@@ -713,7 +713,10 @@ package body Sem_Ch12 is
    --  body. Early instantiations can also appear if generic, instance and
    --  body are all in the declarative part of a subprogram or entry. Entities
    --  of packages that are early instantiations are delayed, and their freeze
-   --  node appears after the generic body.
+   --  node appears after the generic body. This rather complex machinery is
+   --  needed when nested instantiations are present, because the source does
+   --  not carry any indication of where the corresponding instance bodies must
+   --  be installed and frozen.
 
    procedure Install_Formal_Packages (Par : Entity_Id);
    --  Install the visible part of any formal of the parent that is a formal
@@ -1052,6 +1055,15 @@ package body Sem_Ch12 is
           SPARK_Mode_Pragma        => SPARK_Mode_Pragma));
    end Add_Pending_Instantiation;
 
+   ----------------------------------
+   -- Adjust_Inherited_Pragma_Sloc --
+   ----------------------------------
+
+   procedure Adjust_Inherited_Pragma_Sloc (N : Node_Id) is
+   begin
+      Adjust_Instantiation_Sloc (N, S_Adjustment);
+   end Adjust_Inherited_Pragma_Sloc;
+
    --------------------------
    -- Analyze_Associations --
    --------------------------
@@ -1096,6 +1108,12 @@ package body Sem_Ch12 is
       --  In Ada 2005, indicates partial parameterization of a formal
       --  package. As usual an other association must be last in the list.
 
+      procedure Check_Fixed_Point_Actual (Actual : Node_Id);
+      --  Warn if an actual fixed-point type has user-defined arithmetic
+      --  operations, but there is no corresponding formal in the generic,
+      --  in which case the predefined operations will be used. This merits
+      --  a warning because of the special semantics of fixed point ops.
+
       procedure Check_Overloaded_Formal_Subprogram (Formal : Entity_Id);
       --  Apply RM 12.3(9): if a formal subprogram is overloaded, the instance
       --  cannot have a named association for it. AI05-0025 extends this rule
@@ -1178,6 +1196,52 @@ package body Sem_Ch12 is
       end Check_Overloaded_Formal_Subprogram;
 
       -------------------------------
+      --  Check_Fixed_Point_Actual --
+      -------------------------------
+
+      procedure Check_Fixed_Point_Actual (Actual : Node_Id) is
+         Typ    : constant Entity_Id := Entity (Actual);
+         Prims  : constant Elist_Id  := Collect_Primitive_Operations (Typ);
+         Elem   : Elmt_Id;
+         Formal : Node_Id;
+
+      begin
+         --  Locate primitive operations of the type that are arithmetic
+         --  operations.
+
+         Elem := First_Elmt (Prims);
+         while Present (Elem) loop
+            if Nkind (Node (Elem)) = N_Defining_Operator_Symbol then
+
+               --  Check whether the generic unit has a formal subprogram of
+               --  the same name. This does not check types but is good enough
+               --  to justify a warning.
+
+               Formal := First_Non_Pragma (Formals);
+               while Present (Formal) loop
+                  if Nkind (Formal) = N_Formal_Concrete_Subprogram_Declaration
+                    and then Chars (Defining_Entity (Formal)) =
+                               Chars (Node (Elem))
+                  then
+                     exit;
+                  end if;
+
+                  Next (Formal);
+               end loop;
+
+               if No (Formal) then
+                  Error_Msg_Sloc := Sloc (Node (Elem));
+                  Error_Msg_NE
+                    ("?instance does not use primitive operation&#",
+                      Actual, Node (Elem));
+               end if;
+            end if;
+
+            Next_Elmt (Elem);
+         end loop;
+      end Check_Fixed_Point_Actual;
+
+      -------------------------------
       -- Has_Fully_Defined_Profile --
       -------------------------------
 
@@ -1604,6 +1668,10 @@ package body Sem_Ch12 is
                           (Formal, Match, Analyzed_Formal, Assoc),
                         Assoc);
 
+                     if Is_Fixed_Point_Type (Entity (Match)) then
+                        Check_Fixed_Point_Actual (Match);
+                     end if;
+
                      --  An instantiation is a freeze point for the actuals,
                      --  unless this is a rewritten formal package, or the
                      --  formal is an Ada 2012 formal incomplete type.
@@ -2641,7 +2709,7 @@ package body Sem_Ch12 is
       end if;
 
       Formal := New_Copy (Pack_Id);
-      Create_Instantiation_Source (N, Gen_Unit, False, S_Adjustment);
+      Create_Instantiation_Source (N, Gen_Unit, S_Adjustment);
 
       --  Make local generic without formals. The formals will be replaced with
       --  internal declarations.
@@ -3786,7 +3854,7 @@ package body Sem_Ch12 is
          --  validate an actual package, the instantiation environment is that
          --  of the enclosing instance.
 
-         Create_Instantiation_Source (N, Gen_Unit, False, S_Adjustment);
+         Create_Instantiation_Source (N, Gen_Unit, S_Adjustment);
 
          --  Copy original generic tree, to produce text for instantiation
 
@@ -4347,10 +4415,6 @@ package body Sem_Ch12 is
       SPARK_Mode_Pragma        := Save_SMP;
       Style_Check              := Save_Style_Check;
 
-      if SPARK_Mode = On then
-         Dynamic_Elaboration_Checks := False;
-      end if;
-
       --  Check that if N is an instantiation of System.Dim_Float_IO or
       --  System.Dim_Integer_IO, the formal type has a dimension system.
 
@@ -4387,10 +4451,6 @@ package body Sem_Ch12 is
          SPARK_Mode               := Save_SM;
          SPARK_Mode_Pragma        := Save_SMP;
          Style_Check              := Save_Style_Check;
-
-         if SPARK_Mode = On then
-            Dynamic_Elaboration_Checks := False;
-         end if;
    end Analyze_Package_Instantiation;
 
    --------------------------
@@ -5138,7 +5198,7 @@ package body Sem_Ch12 is
          Generic_Renamings.Set_Last (0);
          Generic_Renamings_HTable.Reset;
 
-         Create_Instantiation_Source (N, Gen_Unit, False, S_Adjustment);
+         Create_Instantiation_Source (N, Gen_Unit, S_Adjustment);
 
          --  Copy original generic tree, to produce text for instantiation
 
@@ -5319,10 +5379,6 @@ package body Sem_Ch12 is
          Ignore_Pragma_SPARK_Mode := Save_IPSM;
          SPARK_Mode               := Save_SM;
          SPARK_Mode_Pragma        := Save_SMP;
-
-         if SPARK_Mode = On then
-            Dynamic_Elaboration_Checks := False;
-         end if;
       end if;
 
    <<Leave>>
@@ -5343,10 +5399,6 @@ package body Sem_Ch12 is
          Ignore_Pragma_SPARK_Mode := Save_IPSM;
          SPARK_Mode               := Save_SM;
          SPARK_Mode_Pragma        := Save_SMP;
-
-         if SPARK_Mode = On then
-            Dynamic_Elaboration_Checks := False;
-         end if;
    end Analyze_Subprogram_Instantiation;
 
    -------------------------
@@ -6702,17 +6754,23 @@ package body Sem_Ch12 is
 
       elsif Nkind (Gen_Id) = N_Expanded_Name then
 
-         --  Entity already present, analyze prefix, whose meaning may be
-         --  an instance in the current context. If it is an instance of
-         --  a relative within another, the proper parent may still have
-         --  to be installed, if they are not of the same generation.
+         --  Entity already present, analyze prefix, whose meaning may be an
+         --  instance in the current context. If it is an instance of a
+         --  relative within another, the proper parent may still have to be
+         --  installed, if they are not of the same generation.
 
          Analyze (Prefix (Gen_Id));
 
-         --  In the unlikely case that a local declaration hides the name
-         --  of the parent package, locate it on the homonym chain. If the
-         --  context is an instance of the parent, the renaming entity is
-         --  flagged as such.
+         --  Prevent cascaded errors
+
+         if Etype (Prefix (Gen_Id)) = Any_Type then
+            return;
+         end if;
+
+         --  In the unlikely case that a local declaration hides the name of
+         --  the parent package, locate it on the homonym chain. If the context
+         --  is an instance of the parent, the renaming entity is flagged as
+         --  such.
 
          Inst_Par := Entity (Prefix (Gen_Id));
          while Present (Inst_Par)
@@ -7646,7 +7704,6 @@ package body Sem_Ch12 is
                Create_Instantiation_Source
                  (Instantiation_Node,
                   Defining_Entity (N),
-                  False,
                   S_Adjustment);
             end if;
 
@@ -8873,22 +8930,13 @@ package body Sem_Ch12 is
       Gen_Body : Node_Id;
       Gen_Decl : Node_Id)
    is
-      Act_Id    : constant Entity_Id := Corresponding_Spec (Act_Body);
-      Act_Unit  : constant Node_Id   := Unit (Cunit (Get_Source_Unit (N)));
-      Gen_Id    : constant Entity_Id := Corresponding_Spec (Gen_Body);
-      Par       : constant Entity_Id := Scope (Gen_Id);
-      Gen_Unit  : constant Node_Id   :=
-                    Unit (Cunit (Get_Source_Unit (Gen_Decl)));
-      Orig_Body : Node_Id := Gen_Body;
-      F_Node    : Node_Id;
-      Body_Unit : Node_Id;
-
-      Must_Delay : Boolean;
 
-      function In_Same_Enclosing_Subp return Boolean;
-      --  Check whether instance and generic body are within same subprogram.
+      function In_Same_Scope (Gen_Id, Act_Id : Node_Id) return Boolean;
+      --  Check if the generic definition and the instantiation come from
+      --  a common scope, in which case the instance must be frozen after
+      --  the generic body.
 
-      function True_Sloc (N : Node_Id) return Source_Ptr;
+      function True_Sloc (N, Act_Unit : Node_Id) return Source_Ptr;
       --  If the instance is nested inside a generic unit, the Sloc of the
       --  instance indicates the place of the original definition, not the
       --  point of the current enclosing instance. Pending a better usage of
@@ -8896,45 +8944,34 @@ package body Sem_Ch12 is
       --  origin of a node by finding the maximum sloc of any ancestor node.
       --  Why is this not equivalent to Top_Level_Location ???
 
-      ----------------------------
-      -- In_Same_Enclosing_Subp --
-      ----------------------------
+      -------------------
+      -- In_Same_Scope --
+      -------------------
 
-      function In_Same_Enclosing_Subp return Boolean is
-         Scop : Entity_Id;
-         Subp : Entity_Id;
+      function In_Same_Scope (Gen_Id, Act_Id : Node_Id) return Boolean is
+         Act_Scop : Entity_Id := Scope (Act_Id);
+         Gen_Scop : Entity_Id := Scope (Gen_Id);
 
       begin
-         Scop := Scope (Act_Id);
-         while Scop /= Standard_Standard
-           and then not Is_Overloadable (Scop)
+         while Act_Scop /= Standard_Standard
+           and then Gen_Scop /= Standard_Standard
          loop
-            Scop := Scope (Scop);
-         end loop;
-
-         if Scop = Standard_Standard then
-            return False;
-         else
-            Subp := Scop;
-         end if;
-
-         Scop := Scope (Gen_Id);
-         while Scop /= Standard_Standard loop
-            if Scop = Subp then
+            if Act_Scop = Gen_Scop then
                return True;
-            else
-               Scop := Scope (Scop);
             end if;
+
+            Act_Scop := Scope (Act_Scop);
+            Gen_Scop := Scope (Gen_Scop);
          end loop;
 
          return False;
-      end In_Same_Enclosing_Subp;
+      end In_Same_Scope;
 
       ---------------
       -- True_Sloc --
       ---------------
 
-      function True_Sloc (N : Node_Id) return Source_Ptr is
+      function True_Sloc (N, Act_Unit : Node_Id) return Source_Ptr is
          Res : Source_Ptr;
          N1  : Node_Id;
 
@@ -8952,6 +8989,18 @@ package body Sem_Ch12 is
          return Res;
       end True_Sloc;
 
+      Act_Id    : constant Entity_Id := Corresponding_Spec (Act_Body);
+      Act_Unit  : constant Node_Id   := Unit (Cunit (Get_Source_Unit (N)));
+      Gen_Id    : constant Entity_Id := Corresponding_Spec (Gen_Body);
+      Par       : constant Entity_Id := Scope (Gen_Id);
+      Gen_Unit  : constant Node_Id   :=
+                    Unit (Cunit (Get_Source_Unit (Gen_Decl)));
+      Orig_Body : Node_Id := Gen_Body;
+      F_Node    : Node_Id;
+      Body_Unit : Node_Id;
+
+      Must_Delay : Boolean;
+
    --  Start of processing for Install_Body
 
    begin
@@ -9016,10 +9065,10 @@ package body Sem_Ch12 is
           and then (Nkind_In (Gen_Unit, N_Package_Declaration,
                                         N_Generic_Package_Declaration)
                      or else (Gen_Unit = Body_Unit
-                               and then True_Sloc (N) < Sloc (Orig_Body)))
-          and then Is_In_Main_Unit (Gen_Unit)
-          and then (Scope (Act_Id) = Scope (Gen_Id)
-                     or else In_Same_Enclosing_Subp));
+                               and then True_Sloc (N, Act_Unit)
+                                          < Sloc (Orig_Body)))
+          and then Is_In_Main_Unit (Original_Node (Gen_Unit))
+          and then (In_Same_Scope (Gen_Id, Act_Id)));
 
       --  If this is an early instantiation, the freeze node is placed after
       --  the generic body. Otherwise, if the generic appears in an instance,
@@ -10689,10 +10738,11 @@ package body Sem_Ch12 is
       --  An effectively volatile object cannot be used as an actual in a
       --  generic instantiation (SPARK RM 7.1.3(7)). The following check is
       --  relevant only when SPARK_Mode is on as it is not a standard Ada
-      --  legality rule.
+      --  legality rule, and also verifies that the actual is an object.
 
       if SPARK_Mode = On
         and then Present (Actual)
+        and then Is_Object_Reference (Actual)
         and then Is_Effectively_Volatile_Object (Actual)
       then
          Error_Msg_N
@@ -10888,7 +10938,7 @@ package body Sem_Ch12 is
          Gen_Body := Unit_Declaration_Node (Gen_Body_Id);
 
          Create_Instantiation_Source
-           (Inst_Node, Gen_Body_Id, False, S_Adjustment);
+           (Inst_Node, Gen_Body_Id, S_Adjustment);
 
          Act_Body :=
            Copy_Generic_Node
@@ -10933,6 +10983,7 @@ package body Sem_Ch12 is
             E := First_Entity (Act_Decl_Id);
             while Present (E) loop
                if Is_Type (E)
+                 and then not Is_Itype (E)
                  and then Is_Generic_Actual_Type (E)
                  and then Is_Tagged_Type (E)
                then
@@ -11229,7 +11280,6 @@ package body Sem_Ch12 is
          Create_Instantiation_Source
            (Inst_Node,
             Gen_Body_Id,
-            False,
             S_Adjustment);
 
          Act_Body :=
@@ -12846,6 +12896,7 @@ package body Sem_Ch12 is
       end if;
 
       Current_Unit := Parent (N);
+
       while Present (Current_Unit)
         and then Nkind (Current_Unit) /= N_Compilation_Unit
       loop
@@ -12857,11 +12908,12 @@ package body Sem_Ch12 is
       --  or in the declaration of the main unit, which in this last case must
       --  be a body.
 
-      return Unum = Main_Unit
-        or else Current_Unit = Cunit (Main_Unit)
-        or else Current_Unit = Library_Unit (Cunit (Main_Unit))
-        or else (Present (Library_Unit (Current_Unit))
-                  and then Is_In_Main_Unit (Library_Unit (Current_Unit)));
+      return
+        Current_Unit = Cunit (Main_Unit)
+          or else Current_Unit = Library_Unit (Cunit (Main_Unit))
+          or else (Present (Current_Unit)
+                    and then Present (Library_Unit (Current_Unit))
+                    and then Is_In_Main_Unit (Library_Unit (Current_Unit)));
    end Is_In_Main_Unit;
 
    ----------------------------
@@ -14577,7 +14629,10 @@ package body Sem_Ch12 is
             end if;
 
          elsif D in List_Range then
-            if D = Union_Id (No_List) or else Is_Empty_List (List_Id (D)) then
+            pragma Assert (D /= Union_Id (No_List));
+            --  Because No_List = Empty, which is in Node_Range above
+
+            if Is_Empty_List (List_Id (D)) then
                null;
 
             else
@@ -14802,14 +14857,41 @@ package body Sem_Ch12 is
             --  The node did not undergo a transformation
 
             if Nkind (N) = Nkind (Get_Associated_Node (N)) then
+               declare
+                  Aux_N2         : constant Node_Id := Get_Associated_Node (N);
+                  Orig_N2_Parent : constant Node_Id :=
+                                     Original_Node (Parent (Aux_N2));
+               begin
+                  --  The parent of this identifier is a selected component
+                  --  which denotes a named number that was constant folded.
+                  --  Preserve the original name for ASIS and link the parent
+                  --  with its expanded name. The constant folding will be
+                  --  repeated in the instance.
+
+                  if Nkind (Parent (N)) = N_Selected_Component
+                    and then Nkind_In (Parent (Aux_N2), N_Integer_Literal,
+                                                        N_Real_Literal)
+                    and then Is_Entity_Name (Orig_N2_Parent)
+                    and then Ekind (Entity (Orig_N2_Parent)) in Named_Kind
+                    and then Is_Global (Entity (Orig_N2_Parent))
+                  then
+                     N2 := Aux_N2;
+                     Set_Associated_Node
+                       (Parent (N), Original_Node (Parent (N2)));
 
-               --  If this is a discriminant reference, always save it. It is
-               --  used in the instance to find the corresponding discriminant
-               --  positionally rather than by name.
+                  --  Common case
 
-               Set_Original_Discriminant
-                 (N, Original_Discriminant (Get_Associated_Node (N)));
-               Reset_Entity (N);
+                  else
+                     --  If this is a discriminant reference, always save it.
+                     --  It is used in the instance to find the corresponding
+                     --  discriminant positionally rather than by name.
+
+                     Set_Original_Discriminant
+                       (N, Original_Discriminant (Get_Associated_Node (N)));
+                  end if;
+
+                  Reset_Entity (N);
+               end;
 
             --  The analysis of the generic copy transformed the identifier
             --  into another construct. Propagate the changes to the template.
@@ -15139,13 +15221,31 @@ package body Sem_Ch12 is
       end loop;
    end Save_Global_References_In_Aspects;
 
+   ------------------------------------------
+   -- Set_Copied_Sloc_For_Inherited_Pragma --
+   ------------------------------------------
+
+   procedure Set_Copied_Sloc_For_Inherited_Pragma
+     (N : Node_Id;
+      E : Entity_Id)
+   is
+   begin
+      Create_Instantiation_Source (N, E,
+        Inlined_Body     => False,
+        Inherited_Pragma => True,
+        Factor           => S_Adjustment);
+   end Set_Copied_Sloc_For_Inherited_Pragma;
+
    --------------------------------------
    -- Set_Copied_Sloc_For_Inlined_Body --
    --------------------------------------
 
    procedure Set_Copied_Sloc_For_Inlined_Body (N : Node_Id; E : Entity_Id) is
    begin
-      Create_Instantiation_Source (N, E, True, S_Adjustment);
+      Create_Instantiation_Source (N, E,
+        Inlined_Body     => True,
+        Inherited_Pragma => False,
+        Factor           => S_Adjustment);
    end Set_Copied_Sloc_For_Inlined_Body;
 
    ---------------------
@@ -15222,12 +15322,6 @@ package body Sem_Ch12 is
 
          SPARK_Mode := Save_SPARK_Mode;
          SPARK_Mode_Pragma := Save_SPARK_Mode_Pragma;
-
-         --  Make sure dynamic elaboration checks are off in SPARK Mode
-
-         if SPARK_Mode = On then
-            Dynamic_Elaboration_Checks := False;
-         end if;
       end if;
 
       Current_Instantiated_Parent :=
diff --git a/gcc/ada/sem_ch12.ads b/gcc/ada/sem_ch12.ads
index c95396a35e6..82a093afae3 100644
--- a/gcc/ada/sem_ch12.ads
+++ b/gcc/ada/sem_ch12.ads
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 S p e c                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -172,6 +172,32 @@ package Sem_Ch12 is
    --  saved as part of the internal state of the Sem_Ch12 package for use
    --  in subsequent calls to copy nodes.
 
+   procedure Set_Copied_Sloc_For_Inherited_Pragma
+     (N : Node_Id;
+      E : Entity_Id);
+   --  This procedure is used when a class-wide pre- or postcondition is
+   --  inherited. This process shares the same circuitry as the creation of
+   --  an instantiated copy of a generic template. The call to this procedure
+   --  establishes a new source file entry representing the inherited pragma
+   --  as an instantiation, marked as an inherited pragma (so that errout can
+   --  distinguish cases for generating error messages, otherwise the treatment
+   --  is identical). In this call, N is the subprogram declaration from
+   --  which the pragma is inherited and E is the defining identifier of
+   --  the overriding subprogram (when the subprogram is redefined) or the
+   --  defining identifier of the extension type (when the subprogram is
+   --  inherited). The resulting Sloc adjustment factor is saved as part of the
+   --  internal state of the Sem_Ch12 package for use in subsequent calls to
+   --  copy nodes.
+
+   procedure Adjust_Inherited_Pragma_Sloc (N : Node_Id);
+   --  This procedure is used when a class-wide pre- or postcondition
+   --  is inherited. It is called on each node of the pragma expression
+   --  to adjust its sloc. These call should be preceded by a call to
+   --  Set_Copied_Sloc_For_Inherited_Pragma that sets the required sloc
+   --  adjustment. This is done directly, instead of using Copy_Generic_Node
+   --  to copy nodes and adjust slocs, as Copy_Generic_Node expects a specific
+   --  structure to be in place, which is not the case for inherited pragmas.
+
    procedure Save_Env
      (Gen_Unit : Entity_Id;
       Act_Unit : Entity_Id);
diff --git a/gcc/ada/sem_ch13.adb b/gcc/ada/sem_ch13.adb
index b631b9c9417..c0ff2edb1e7 100644
--- a/gcc/ada/sem_ch13.adb
+++ b/gcc/ada/sem_ch13.adb
@@ -1937,9 +1937,11 @@ package body Sem_Ch13 is
             if not Implementation_Defined_Aspect (A_Id) then
                Error_Msg_Name_1 := Nam;
 
-               --  Not allowed for renaming declarations
+               --  Not allowed for renaming declarations. Examine the original
+               --  node because a subprogram renaming may have been rewritten
+               --  as a body.
 
-               if Nkind (N) in N_Renaming_Declaration then
+               if Nkind (Original_Node (N)) in N_Renaming_Declaration then
                   Error_Msg_N
                     ("aspect % not allowed for renaming declaration",
                      Aspect);
@@ -3821,8 +3823,8 @@ package body Sem_Ch13 is
       U_Ent : Entity_Id;
       --  The underlying entity to which the attribute applies. Generally this
       --  is the Underlying_Type of Ent, except in the case where the clause
-      --  applies to full view of incomplete type or private type in which case
-      --  U_Ent is just a copy of Ent.
+      --  applies to the full view of an incomplete or private type, in which
+      --  case U_Ent is just a copy of Ent.
 
       FOnly : Boolean := False;
       --  Reset to True for subtype specific attribute (Alignment, Size)
@@ -6616,7 +6618,13 @@ package body Sem_Ch13 is
    -----------------------------------
 
    procedure Analyze_Freeze_Generic_Entity (N : Node_Id) is
+      E : constant Entity_Id := Entity (N);
+
    begin
+      if not Is_Frozen (E) and then Has_Delayed_Aspects (E) then
+         Analyze_Aspects_At_Freeze_Point (E);
+      end if;
+
       Freeze_Entity_Checks (N);
    end Analyze_Freeze_Generic_Entity;
 
@@ -11941,7 +11949,9 @@ package body Sem_Ch13 is
       --  at the freeze point, and we must generate only a completion of this
       --  declaration. We do the same for private types, because the full view
       --  might be tagged. Otherwise we generate a declaration at the point of
-      --  the attribute definition clause.
+      --  the attribute definition clause. If the attribute definition comes
+      --  from an aspect specification the declaration is part of the freeze
+      --  actions of the type.
 
       function Build_Spec return Node_Id;
       --  Used for declaration and renaming declaration, so that this is
@@ -12033,18 +12043,32 @@ package body Sem_Ch13 is
              Object_Definition   => New_Occurrence_Of (Standard_Boolean, Loc));
       end if;
 
-      Insert_Action (N, Subp_Decl);
-      Set_Entity (N, Subp_Id);
+      if not Defer_Declaration
+        and then From_Aspect_Specification (N)
+        and then Has_Delayed_Freeze (Ent)
+      then
+         Append_Freeze_Action (Ent, Subp_Decl);
+
+      else
+         Insert_Action (N, Subp_Decl);
+         Set_Entity (N, Subp_Id);
+      end if;
 
       Subp_Decl :=
         Make_Subprogram_Renaming_Declaration (Loc,
           Specification => Build_Spec,
-          Name => New_Occurrence_Of (Subp, Loc));
+          Name          => New_Occurrence_Of (Subp, Loc));
 
       if Defer_Declaration then
          Set_TSS (Base_Type (Ent), Subp_Id);
+
       else
-         Insert_Action (N, Subp_Decl);
+         if From_Aspect_Specification (N) then
+            Append_Freeze_Action (Ent, Subp_Decl);
+         else
+            Insert_Action (N, Subp_Decl);
+         end if;
+
          Copy_TSS (Subp_Id, Base_Type (Ent));
       end if;
    end New_Stream_Subprogram;
diff --git a/gcc/ada/sem_ch3.adb b/gcc/ada/sem_ch3.adb
index be0fa8f6506..4053ead57d6 100644
--- a/gcc/ada/sem_ch3.adb
+++ b/gcc/ada/sem_ch3.adb
@@ -1415,7 +1415,7 @@ package body Sem_Ch3 is
       elsif Is_Class_Wide_Type (Full_Desig) and then Etype (Full_Desig) = T
       then
          Error_Msg_N
-           ("access type cannot designate its own classwide type", S);
+           ("access type cannot designate its own class-wide type", S);
 
          --  Clean up indication of tagged status to prevent cascaded errors
 
@@ -3466,7 +3466,17 @@ package body Sem_Ch3 is
                                                N_Package_Renaming_Declaration
                    and then not Comes_From_Source (Prev_Entity)
                    and then
-                     Is_Generic_Instance (Renamed_Entity (Prev_Entity))))
+                     Is_Generic_Instance (Renamed_Entity (Prev_Entity)))
+
+               --  The entity may be a homonym of a private component of the
+               --  enclosing protected object, for which we create a local
+               --  renaming declaration. The declaration is legal, even if
+               --  useless when it just captures that component.
+
+               or else
+                 (Ekind (Scope (Current_Scope)) = E_Protected_Type
+                   and then Nkind (Parent (Prev_Entity)) =
+                              N_Object_Renaming_Declaration))
          then
             Prev_Entity := Empty;
          end if;
@@ -4384,7 +4394,7 @@ package body Sem_Ch3 is
       --  type, rewrite the declaration as a renaming of the result of the
       --  call. The exceptions below are cases where the copy is expected,
       --  either by the back end (Aliased case) or by the semantics, as for
-      --  initializing controlled types or copying tags for classwide types.
+      --  initializing controlled types or copying tags for class-wide types.
 
       if Present (E)
         and then Nkind (E) = N_Explicit_Dereference
@@ -4792,6 +4802,24 @@ package body Sem_Ch3 is
       then
          Set_Has_Predicates (Id);
          Set_Has_Delayed_Freeze (Id);
+
+         --  Generated subtypes inherit the predicate function from the parent
+         --  (no aspects to examine on the generated declaration).
+
+         if not Comes_From_Source (N) then
+            Set_Ekind (Id, Ekind (T));
+
+            if Present (Predicate_Function (T)) then
+               Set_Predicate_Function (Id, Predicate_Function (T));
+
+            elsif Present (Ancestor_Subtype (T))
+              and then Has_Predicates (Ancestor_Subtype (T))
+              and then Present (Predicate_Function (Ancestor_Subtype (T)))
+            then
+               Set_Predicate_Function (Id,
+                 Predicate_Function (Ancestor_Subtype (T)));
+            end if;
+         end if;
       end if;
 
       --  Subtype of Boolean cannot have a constraint in SPARK
@@ -14491,7 +14519,7 @@ package body Sem_Ch3 is
    -----------------------
 
    procedure Derive_Subprogram
-     (New_Subp     : in out Entity_Id;
+     (New_Subp     : out Entity_Id;
       Parent_Subp  : Entity_Id;
       Derived_Type : Entity_Id;
       Parent_Type  : Entity_Id;
@@ -15072,7 +15100,7 @@ package body Sem_Ch3 is
       --  the list of primitives of Derived_Type exactly in the same order.
 
       procedure Derive_Interface_Subprogram
-        (New_Subp    : in out Entity_Id;
+        (New_Subp    : out Entity_Id;
          Subp        : Entity_Id;
          Actual_Subp : Entity_Id);
       --  Derive New_Subp from the ultimate alias of the parent subprogram Subp
@@ -15158,7 +15186,7 @@ package body Sem_Ch3 is
       ---------------------------------
 
       procedure Derive_Interface_Subprogram
-        (New_Subp    : in out Entity_Id;
+        (New_Subp    : out Entity_Id;
          Subp        : Entity_Id;
          Actual_Subp : Entity_Id)
       is
@@ -16651,9 +16679,9 @@ package body Sem_Ch3 is
                Set_Ekind (Id, Ekind (Prev));         --  will be reset later
                Set_Class_Wide_Type (Id, Class_Wide_Type (Prev));
 
-               --  The type of the classwide type is the current Id. Previously
+               --  Type of the class-wide type is the current Id. Previously
                --  this was not done for private declarations because of order-
-               --  of elaboration issues in the back-end, but gigi now handles
+               --  of-elaboration issues in the back end, but gigi now handles
                --  this properly.
 
                Set_Etype (Class_Wide_Type (Id), Id);
diff --git a/gcc/ada/sem_ch3.ads b/gcc/ada/sem_ch3.ads
index 57184ed58ad..9f4c6cf05e4 100644
--- a/gcc/ada/sem_ch3.ads
+++ b/gcc/ada/sem_ch3.ads
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 S p e c                                  --
 --                                                                          --
---          Copyright (C) 1992-2014, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -120,7 +120,7 @@ package Sem_Ch3 is
    --  expressions because the constructor (if any) is on the C++ side.
 
    procedure Derive_Subprogram
-     (New_Subp     : in out Entity_Id;
+     (New_Subp     : out Entity_Id;
       Parent_Subp  : Entity_Id;
       Derived_Type : Entity_Id;
       Parent_Type  : Entity_Id;
diff --git a/gcc/ada/sem_ch4.adb b/gcc/ada/sem_ch4.adb
index 66a2acf6ca0..5c0f4f66c0c 100644
--- a/gcc/ada/sem_ch4.adb
+++ b/gcc/ada/sem_ch4.adb
@@ -1490,7 +1490,7 @@ package body Sem_Ch4 is
       Others_Present : Boolean;
       --  Indicates if Others was present
 
-      Wrong_Alt : Node_Id;
+      Wrong_Alt : Node_Id := Empty;
       --  For error reporting
 
    --  Start of processing for Analyze_Case_Expression
@@ -3087,6 +3087,21 @@ package body Sem_Ch4 is
       Subp_Type   : constant Entity_Id := Etype (Nam);
       Norm_OK     : Boolean;
 
+      function Compatible_Types_In_Predicate
+        (T1 : Entity_Id;
+         T2 : Entity_Id) return Boolean;
+      --  For an Ada 2012 predicate or invariant, a call may mention an
+      --  incomplete type, while resolution of the corresponding predicate
+      --  function may see the full view, as a consequence of the delayed
+      --  resolution of the corresponding expressions. This may occur in
+      --  the body of a predicate function, or in a call to such. Anomalies
+      --  involving private and full views can also happen. In each case,
+      --  rewrite node or add conversions to remove spurious type errors.
+
+      procedure Indicate_Name_And_Type;
+      --  If candidate interpretation matches, indicate name and type of result
+      --  on call node.
+
       function Operator_Hidden_By (Fun : Entity_Id) return Boolean;
       --  There may be a user-defined operator that hides the current
       --  interpretation. We must check for this independently of the
@@ -3100,9 +3115,59 @@ package body Sem_Ch4 is
       --  Finally, The abstract operations on address do not hide the
       --  predefined operator (this is the purpose of making them abstract).
 
-      procedure Indicate_Name_And_Type;
-      --  If candidate interpretation matches, indicate name and type of
-      --  result on call node.
+      -----------------------------------
+      -- Compatible_Types_In_Predicate --
+      -----------------------------------
+
+      function Compatible_Types_In_Predicate
+        (T1 : Entity_Id;
+         T2 : Entity_Id) return Boolean
+      is
+         function Common_Type (T : Entity_Id) return Entity_Id;
+         --  Find non-private full view if any, without going to ancestor type
+         --  (as opposed to Underlying_Type).
+
+         -----------------
+         -- Common_Type --
+         -----------------
+
+         function Common_Type (T : Entity_Id) return Entity_Id is
+         begin
+            if Is_Private_Type (T) and then Present (Full_View (T)) then
+               return Base_Type (Full_View (T));
+            else
+               return Base_Type (T);
+            end if;
+         end Common_Type;
+
+      --  Start of processing for Compatible_Types_In_Predicate
+
+      begin
+         if (Ekind (Current_Scope) = E_Function
+              and then Is_Predicate_Function (Current_Scope))
+           or else
+            (Ekind (Nam) = E_Function
+              and then Is_Predicate_Function (Nam))
+         then
+            if Is_Incomplete_Type (T1)
+              and then Present (Full_View (T1))
+              and then Full_View (T1) = T2
+            then
+               Set_Etype (Formal, Etype (Actual));
+               return True;
+
+            elsif Common_Type (T1) = Common_Type (T2) then
+               Rewrite (Actual, Unchecked_Convert_To (Etype (Formal), Actual));
+               return True;
+
+            else
+               return False;
+            end if;
+
+         else
+            return False;
+         end if;
+      end Compatible_Types_In_Predicate;
 
       ----------------------------
       -- Indicate_Name_And_Type --
@@ -3409,18 +3474,67 @@ package body Sem_Ch4 is
                   Next_Actual (Actual);
                   Next_Formal (Formal);
 
-               --  For an Ada 2012 predicate or invariant, a call may mention
-               --  an incomplete type, while resolution of the corresponding
-               --  predicate function may see the full view, as a consequence
-               --  of the delayed resolution of the corresponding expressions.
+               elsif Compatible_Types_In_Predicate
+                       (Etype (Formal), Etype (Actual))
+               then
+                  Next_Actual (Actual);
+                  Next_Formal (Formal);
 
-               elsif Ekind (Etype (Formal)) = E_Incomplete_Type
-                 and then Full_View (Etype (Formal)) = Etype (Actual)
+               --  In a complex case where an enclosing generic and a nested
+               --  generic package, both declared with partially parameterized
+               --  formal subprograms with the same names, are instantiated
+               --  with the same type, the types of the actual parameter and
+               --  that of the formal may appear incompatible at first sight.
+
+               --   generic
+               --      type Outer_T is private;
+               --      with function Func (Formal : Outer_T)
+               --                         return ... is <>;
+
+               --   package Outer_Gen is
+               --      generic
+               --         type Inner_T is private;
+               --         with function Func (Formal : Inner_T)   --  (1)
+               --           return ... is <>;
+
+               --      package Inner_Gen is
+               --         function Inner_Func (Formal : Inner_T)  --  (2)
+               --           return ... is (Func (Formal));
+               --      end Inner_Gen;
+               --   end Outer_Generic;
+
+               --   package Outer_Inst is new Outer_Gen (Actual_T);
+               --   package Inner_Inst is new Outer_Inst.Inner_Gen (Actual_T);
+
+               --  In the example above, the type of parameter
+               --  Inner_Func.Formal at (2) is incompatible with the type of
+               --  Func.Formal at (1) in the context of instantiations
+               --  Outer_Inst and Inner_Inst. In reality both types are generic
+               --  actual subtypes renaming base type Actual_T as part of the
+               --  generic prologues for the instantiations.
+
+               --  Recognize this case and add a type conversion to allow this
+               --  kind of generic actual subtype conformance. Note that this
+               --  is done only when the call is non-overloaded because the
+               --  resolution mechanism already has the means to disambiguate
+               --  similar cases.
+
+               elsif not Is_Overloaded (Name (N))
+                 and then Is_Type (Etype (Actual))
+                 and then Is_Type (Etype (Formal))
+                 and then Is_Generic_Actual_Type (Etype (Actual))
+                 and then Is_Generic_Actual_Type (Etype (Formal))
+                 and then Base_Type (Etype (Actual)) =
+                          Base_Type (Etype (Formal))
                then
-                  Set_Etype (Formal, Etype (Actual));
+                  Rewrite (Actual,
+                    Convert_To (Etype (Formal), Relocate_Node (Actual)));
+                  Analyze_And_Resolve (Actual, Etype (Formal));
                   Next_Actual (Actual);
                   Next_Formal (Formal);
 
+               --  Handle failed type check
+
                else
                   if Debug_Flag_E then
                      Write_Str (" type checking fails in call ");
@@ -4690,8 +4804,14 @@ package body Sem_Ch4 is
          In_Scope := In_Open_Scopes (Prefix_Type);
 
          while Present (Comp) loop
+            --  Do not examine private operations of the type if not within
+            --  its scope.
+
             if Chars (Comp) = Chars (Sel) then
-               if Is_Overloadable (Comp) then
+               if Is_Overloadable (Comp)
+                 and then (In_Scope
+                            or else Comp /= First_Private_Entity (Type_To_Use))
+               then
                   Add_One_Interp (Sel, Comp, Etype (Comp));
 
                   --  If the prefix is tagged, the correct interpretation may
@@ -5687,7 +5807,7 @@ package body Sem_Ch4 is
                case Nr_Of_Suggestions is
                   when 1      => Suggestion_1 := Comp;
                   when 2      => Suggestion_2 := Comp;
-                  when others => exit;
+                  when others => null;
                end case;
             end if;
          end if;
diff --git a/gcc/ada/sem_ch6.adb b/gcc/ada/sem_ch6.adb
index 5865b874f38..4544e0b7861 100644
--- a/gcc/ada/sem_ch6.adb
+++ b/gcc/ada/sem_ch6.adb
@@ -486,6 +486,15 @@ package body Sem_Ch6 is
 
          Set_Is_Inlined (Defining_Entity (N));
 
+         --  If the expression function is Ghost, mark its body entity as
+         --  Ghost too. This avoids spurious errors on unanalyzed body entities
+         --  of expression functions, which are not yet marked as ghost, yet
+         --  identified as the Corresponding_Body of the ghost declaration.
+
+         if Is_Ghost_Entity (Def_Id) then
+            Set_Is_Ghost_Entity (Defining_Entity (New_Body));
+         end if;
+
          --  Establish the linkages between the spec and the body. These are
          --  used when the expression function acts as the prefix of attribute
          --  'Access in order to freeze the original expression which has been
@@ -774,9 +783,8 @@ package body Sem_Ch6 is
          --  If the return object is of an anonymous access type, then report
          --  an error if the function's result type is not also anonymous.
 
-         elsif R_Stm_Type_Is_Anon_Access
-           and then not R_Type_Is_Anon_Access
-         then
+         elsif R_Stm_Type_Is_Anon_Access then
+            pragma Assert (not R_Type_Is_Anon_Access);
             Error_Msg_N ("anonymous access not allowed for function with "
                          & "named access result", Subtype_Ind);
 
@@ -2144,17 +2152,18 @@ package body Sem_Ch6 is
    --  the subprogram, or to perform conformance checks.
 
    procedure Analyze_Subprogram_Body_Helper (N : Node_Id) is
-      Loc          : constant Source_Ptr := Sloc (N);
-      Body_Spec    : Node_Id             := Specification (N);
-      Body_Id      : Entity_Id           := Defining_Entity (Body_Spec);
-      Prev_Id      : constant Entity_Id  := Current_Entity_In_Scope (Body_Id);
-      Exch_Views   : Elist_Id            := No_Elist;
-      Desig_View   : Entity_Id           := Empty;
-      Conformant   : Boolean;
-      HSS          : Node_Id;
-      Prot_Typ     : Entity_Id := Empty;
-      Spec_Id      : Entity_Id;
-      Spec_Decl    : Node_Id   := Empty;
+      Body_Spec : Node_Id             := Specification (N);
+      Body_Id   : Entity_Id           := Defining_Entity (Body_Spec);
+      Loc       : constant Source_Ptr := Sloc (N);
+      Prev_Id   : constant Entity_Id  := Current_Entity_In_Scope (Body_Id);
+
+      Conformant : Boolean;
+      Desig_View : Entity_Id := Empty;
+      Exch_Views : Elist_Id  := No_Elist;
+      HSS        : Node_Id;
+      Prot_Typ   : Entity_Id := Empty;
+      Spec_Decl  : Node_Id   := Empty;
+      Spec_Id    : Entity_Id;
 
       Last_Real_Spec_Entity : Entity_Id := Empty;
       --  When we analyze a separate spec, the entity chain ends up containing
@@ -2656,6 +2665,12 @@ package body Sem_Ch6 is
                        (Specification (Decl), Plist);
                   end if;
 
+                  --  Move aspects to the new spec
+
+                  if Has_Aspects (N) then
+                     Move_Aspects (N, To => Decl);
+                  end if;
+
                   Insert_Before (N, Decl);
                   Analyze (Decl);
                   Analyze (Prag);
@@ -3716,7 +3731,7 @@ package body Sem_Ch6 is
          return;
       end if;
 
-      --  Handle front-end inlining
+      --  Handle inlining
 
       --  Note: Normally we don't do any inlining if expansion is off, since
       --  we won't generate code in any case. An exception arises in GNATprove
@@ -3733,15 +3748,14 @@ package body Sem_Ch6 is
 
          if not Back_End_Inlining then
             if (Has_Pragma_Inline_Always (Spec_Id)
-                  and then not Opt.Disable_FE_Inline_Always)
-              or else
-              (Has_Pragma_Inline (Spec_Id) and then Front_End_Inlining
-                 and then not Opt.Disable_FE_Inline)
+                 and then not Opt.Disable_FE_Inline_Always)
+              or else (Front_End_Inlining
+                        and then not Opt.Disable_FE_Inline)
             then
                Build_Body_To_Inline (N, Spec_Id);
             end if;
 
-         --  New implementation (relying on backend inlining)
+         --  New implementation (relying on back-end inlining)
 
          else
             if Has_Pragma_Inline_Always (Spec_Id)
@@ -9077,6 +9091,7 @@ package body Sem_Ch6 is
          --  tested.
 
          Formal := First_Formal (Prev_E);
+         F_Typ  := Empty;
          while Present (Formal) loop
             F_Typ := Base_Type (Etype (Formal));
 
@@ -9090,6 +9105,8 @@ package body Sem_Ch6 is
             Next_Formal (Formal);
          end loop;
 
+         --  If the function dispatches on result check the result type
+
          if No (G_Typ) and then Ekind (Prev_E) = E_Function then
             G_Typ := Get_Generic_Parent_Type (Base_Type (Etype (Prev_E)));
          end if;
@@ -9168,7 +9185,7 @@ package body Sem_Ch6 is
                --  private part of the instance. Emit a warning now, which will
                --  make the subsequent error message easier to understand.
 
-               if not Is_Abstract_Type (F_Typ)
+               if Present (F_Typ) and then not Is_Abstract_Type (F_Typ)
                  and then Is_Abstract_Subprogram (Prev_E)
                  and then In_Private_Part (Current_Scope)
                then
@@ -10957,6 +10974,13 @@ package body Sem_Ch6 is
 
          Set_Etype (Formal, Formal_Type);
 
+         --  A formal parameter declared within a Ghost region is automatically
+         --  Ghost (SPARK RM 6.9(2)).
+
+         if Ghost_Mode > None then
+            Set_Is_Ghost_Entity (Formal);
+         end if;
+
          --  Deal with default expression if present
 
          Default := Expression (Param_Spec);
diff --git a/gcc/ada/sem_ch7.adb b/gcc/ada/sem_ch7.adb
index 01a5edbbc3a..4a3b2de0429 100644
--- a/gcc/ada/sem_ch7.adb
+++ b/gcc/ada/sem_ch7.adb
@@ -39,6 +39,7 @@ with Exp_Ch7;   use Exp_Ch7;
 with Exp_Disp;  use Exp_Disp;
 with Exp_Dist;  use Exp_Dist;
 with Exp_Dbug;  use Exp_Dbug;
+with Freeze;    use Freeze;
 with Ghost;     use Ghost;
 with Lib;       use Lib;
 with Lib.Xref;  use Lib.Xref;
@@ -1392,7 +1393,7 @@ package body Sem_Ch7 is
                --  If one of the non-generic parents is itself on the scope
                --  stack, do not install its private declarations: they are
                --  installed in due time when the private part of that parent
-               --  is analyzed. This is delicate ???
+               --  is analyzed.
 
                else
                   while Present (Inst_Par)
@@ -1400,11 +1401,20 @@ package body Sem_Ch7 is
                     and then (not In_Open_Scopes (Inst_Par)
                                or else not In_Private_Part (Inst_Par))
                   loop
-                     Install_Private_Declarations (Inst_Par);
-                     Set_Use (Private_Declarations
-                                (Specification
-                                   (Unit_Declaration_Node (Inst_Par))));
-                     Inst_Par := Scope (Inst_Par);
+                     if Nkind (Inst_Node) = N_Formal_Package_Declaration
+                       or else
+                         not Is_Ancestor_Package
+                               (Inst_Par, Cunit_Entity (Current_Sem_Unit))
+                     then
+                        Install_Private_Declarations (Inst_Par);
+                        Set_Use
+                          (Private_Declarations
+                            (Specification
+                              (Unit_Declaration_Node (Inst_Par))));
+                        Inst_Par := Scope (Inst_Par);
+                     else
+                        exit;
+                     end if;
                   end loop;
 
                   exit;
@@ -1493,7 +1503,20 @@ package body Sem_Ch7 is
          declare
             Orig_Spec : constant Node_Id := Specification (Orig_Decl);
             Save_Priv : constant List_Id := Private_Declarations (Orig_Spec);
+
          begin
+            --  Insert the freezing nodes after the visible declarations to
+            --  ensure that we analyze its aspects; needed to ensure that
+            --  global entities referenced in the aspects are properly handled.
+
+            if Ada_Version >= Ada_2012
+              and then Is_Non_Empty_List (Vis_Decls)
+              and then Is_Empty_List (Priv_Decls)
+            then
+               Insert_List_After_And_Analyze
+                 (Last (Vis_Decls), Freeze_Entity (Id, Last (Vis_Decls)));
+            end if;
+
             Set_Private_Declarations (Orig_Spec, Empty_List);
             Save_Global_References   (Orig_Decl);
             Set_Private_Declarations (Orig_Spec, Save_Priv);
@@ -1681,6 +1704,17 @@ package body Sem_Ch7 is
                           Generic_Formal_Declarations (Orig_Decl);
 
          begin
+            --  Insert the freezing nodes after the private declarations to
+            --  ensure that we analyze its aspects; needed to ensure that
+            --  global entities referenced in the aspects are properly handled.
+
+            if Ada_Version >= Ada_2012
+              and then Is_Non_Empty_List (Priv_Decls)
+            then
+               Insert_List_After_And_Analyze
+                 (Last (Priv_Decls), Freeze_Entity (Id, Last (Priv_Decls)));
+            end if;
+
             Set_Visible_Declarations        (Orig_Spec, Empty_List);
             Set_Generic_Formal_Declarations (Orig_Decl, Empty_List);
             Save_Global_References          (Orig_Decl);
diff --git a/gcc/ada/sem_ch8.adb b/gcc/ada/sem_ch8.adb
index 0f43ecf4d75..1f2a985be58 100644
--- a/gcc/ada/sem_ch8.adb
+++ b/gcc/ada/sem_ch8.adb
@@ -6983,7 +6983,8 @@ package body Sem_Ch8 is
             elsif Nkind (P) /= N_Attribute_Reference then
 
                --  This may have been meant as a prefixed call to a primitive
-               --  of an untagged type.
+               --  of an untagged type. If it is a function call check type of
+               --  its first formal and add explanation.
 
                declare
                   F : constant Entity_Id :=
@@ -6992,12 +6993,11 @@ package body Sem_Ch8 is
                   if Present (F)
                     and then Is_Overloadable (F)
                     and then Present (First_Entity (F))
-                    and then Etype (First_Entity (F)) = Etype (P)
-                    and then not Is_Tagged_Type (Etype (P))
+                    and then not Is_Tagged_Type (Etype (First_Entity (F)))
                   then
                      Error_Msg_N
-                       ("prefixed call is only allowed for objects "
-                        & "of a tagged type", N);
+                       ("prefixed call is only allowed for objects of a "
+                        & "tagged type", N);
                   end if;
                end;
 
diff --git a/gcc/ada/sem_ch9.adb b/gcc/ada/sem_ch9.adb
index 39e8dc174ea..8297db8fe74 100644
--- a/gcc/ada/sem_ch9.adb
+++ b/gcc/ada/sem_ch9.adb
@@ -1875,7 +1875,9 @@ package body Sem_Ch9 is
       --  composite types with inner components, we traverse recursively
       --  the private components of the protected type, and indicate that
       --  all itypes within are frozen. This ensures that no freeze nodes
-      --  will be generated for them.
+      --  will be generated for them. In the case of itypes that are access
+      --  types we need to complete their representation by calling layout,
+      --  which would otherwise be invoked when freezing a type.
       --
       --  On the other hand, components of the corresponding record are
       --  frozen (or receive itype references) as for other records.
@@ -1903,6 +1905,10 @@ package body Sem_Ch9 is
                Set_Has_Delayed_Freeze (Comp, False);
                Set_Is_Frozen (Comp);
 
+               if Is_Access_Type (Comp) then
+                  Layout_Type (Comp);
+               end if;
+
                if Is_Record_Type (Comp)
                  or else Is_Protected_Type (Comp)
                then
diff --git a/gcc/ada/sem_elab.adb b/gcc/ada/sem_elab.adb
index 1b3015aaf42..8e82d281795 100644
--- a/gcc/ada/sem_elab.adb
+++ b/gcc/ada/sem_elab.adb
@@ -1018,7 +1018,9 @@ package body Sem_Elab is
       --  expression, which in turn may have side effects.
 
       Issue_In_SPARK :=
-        SPARK_Mode = On and (Comes_From_Source (Ent) or Is_DIC_Proc);
+        SPARK_Mode = On
+          and then Dynamic_Elaboration_Checks
+          and then (Comes_From_Source (Ent) or Is_DIC_Proc);
 
       --  Now check if an Elaborate_All (or dynamic check) is needed
 
@@ -1097,7 +1099,8 @@ package body Sem_Elab is
          --  is an error, so give an error message.
 
          if Issue_In_SPARK then
-            Error_Msg_NE ("\Elaborate_All pragma required for&", N, W_Scope);
+            Error_Msg_NE -- CODEFIX
+              ("\Elaborate_All pragma required for&", N, W_Scope);
 
          --  Otherwise we generate an implicit pragma. For a subprogram
          --  instantiation, Elaborate is good enough, since no transitive
diff --git a/gcc/ada/sem_elim.adb b/gcc/ada/sem_elim.adb
index b784f6d7534..f61a41ce388 100644
--- a/gcc/ada/sem_elim.adb
+++ b/gcc/ada/sem_elim.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1997-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1997-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -599,9 +599,8 @@ package body Sem_Elim is
                               Idx := Idx + 1;
                            end loop;
 
-                           if Idx <= Last and then
-                             Sloc_Trace (Idx) = '['
-                           then
+                           if Idx <= Last then
+                              pragma Assert (Sloc_Trace (Idx) = '[');
                               Idx := Idx + 1;
                               Idx := Skip_Spaces;
                            else
diff --git a/gcc/ada/sem_eval.adb b/gcc/ada/sem_eval.adb
index 5589394ede2..314c110fb8d 100644
--- a/gcc/ada/sem_eval.adb
+++ b/gcc/ada/sem_eval.adb
@@ -445,11 +445,24 @@ package body Sem_Eval is
       --  that an infinity will result.
 
       if not Is_Static_Expression (N) then
-         if Is_Floating_Point_Type (T)
-           and then Is_Out_Of_Range (N, Base_Type (T), Assume_Valid => True)
-         then
-            Error_Msg_N
-              ("??float value out of range, infinity will be generated", N);
+         if Is_Floating_Point_Type (T) then
+            if Is_Out_Of_Range (N, Base_Type (T), Assume_Valid => True) then
+               Error_Msg_N
+                 ("??float value out of range, infinity will be generated", N);
+
+            --  The literal may be the result of constant-folding of a non-
+            --  static subexpression of a larger expression (e.g. a conversion
+            --  of a non-static variable whose value happens to be known). At
+            --  this point we must reduce the value of the subexpression to a
+            --  machine number (RM 4.9 (38/2)).
+
+            elsif Nkind (N) = N_Real_Literal
+              and then Nkind (Parent (N)) in N_Subexpr
+            then
+               Rewrite (N, New_Copy (N));
+               Set_Realval
+                 (N, Machine (Base_Type (T), Realval (N), Round_Even, N));
+            end if;
          end if;
 
          return;
@@ -3224,6 +3237,11 @@ package body Sem_Eval is
                   begin
                      Ent := Empty;
 
+                     --  Ignored values:
+
+                     Kind := '?';
+                     Cons := No_Uint;
+
                      if Nkind (Expr) = N_Op_Add
                        and then Compile_Time_Known_Value (Right_Opnd (Expr))
                      then
@@ -3311,8 +3329,8 @@ package body Sem_Eval is
                     (Original_Node (Type_High_Bound (T)), Ent2, Kind2, Cons2);
 
                   if Present (Ent1)
-                    and then Kind1 = Kind2
                     and then Ent1 = Ent2
+                    and then Kind1 = Kind2
                   then
                      Len := Cons2 - Cons1 + 1;
                   else
diff --git a/gcc/ada/sem_intr.adb b/gcc/ada/sem_intr.adb
index a15e95cb3cf..c038dc4d799 100644
--- a/gcc/ada/sem_intr.adb
+++ b/gcc/ada/sem_intr.adb
@@ -31,6 +31,7 @@ with Errout;   use Errout;
 with Fname;    use Fname;
 with Lib;      use Lib;
 with Namet;    use Namet;
+with Opt;      use Opt;
 with Sem_Aux;  use Sem_Aux;
 with Sem_Eval; use Sem_Eval;
 with Sem_Util; use Sem_Util;
@@ -61,11 +62,14 @@ package body Sem_Intr is
    --  as for Check_Intrinsic_Subprogram (i.e. the entity of the subprogram
    --  declaration, and the node for the pragma argument, used for messages).
 
-   procedure Errint (Msg : String; S : Node_Id; N : Node_Id);
+   procedure Errint
+     (Msg : String; S : Node_Id; N : Node_Id; Relaxed : Boolean := False);
    --  Post error message for bad intrinsic, the message itself is posted
    --  on the appropriate spec node and another message is placed on the
    --  pragma itself, referring to the spec. S is the node in the spec on
    --  which the message is to be placed, and N is the pragma argument node.
+   --  Relaxed is True if the message should not be emitted in
+   --  Relaxed_RM_Semantics mode.
 
    ------------------------------
    -- Check_Exception_Function --
@@ -431,7 +435,7 @@ package body Sem_Intr is
       then
          Errint
            ("first argument for shift must have size 8, 16, 32 or 64",
-            Ptyp1, N);
+            Ptyp1, N, Relaxed => True);
          return;
 
       elsif Non_Binary_Modulus (Typ1) then
@@ -449,7 +453,7 @@ package body Sem_Intr is
       then
          Errint
            ("modular type for shift must have modulus of 2'*'*8, "
-            & "2'*'*16, 2'*'*32, or 2'*'*64", Ptyp1, N);
+            & "2'*'*16, 2'*'*32, or 2'*'*64", Ptyp1, N, Relaxed => True);
 
       elsif Etype (Arg1) /= Etype (E) then
          Errint
@@ -464,10 +468,16 @@ package body Sem_Intr is
    -- Errint --
    ------------
 
-   procedure Errint (Msg : String; S : Node_Id; N : Node_Id) is
+   procedure Errint
+     (Msg : String; S : Node_Id; N : Node_Id; Relaxed : Boolean := False) is
    begin
-      Error_Msg_N (Msg, S);
-      Error_Msg_N ("incorrect intrinsic subprogram, see spec", N);
+      --  Ignore errors on Intrinsic in Relaxed_RM_Semantics mode where we can
+      --  be more liberal.
+
+      if not (Relaxed and Relaxed_RM_Semantics) then
+         Error_Msg_N (Msg, S);
+         Error_Msg_N ("incorrect intrinsic subprogram, see spec", N);
+      end if;
    end Errint;
 
 end Sem_Intr;
diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb
index c9213f18fbd..9128294556f 100644
--- a/gcc/ada/sem_prag.adb
+++ b/gcc/ada/sem_prag.adb
@@ -44,6 +44,7 @@ with Exp_Dist;  use Exp_Dist;
 with Exp_Util;  use Exp_Util;
 with Freeze;    use Freeze;
 with Ghost;     use Ghost;
+with Gnatvsn;   use Gnatvsn;
 with Lib;       use Lib;
 with Lib.Writ;  use Lib.Writ;
 with Lib.Xref;  use Lib.Xref;
@@ -165,11 +166,11 @@ package body Sem_Prag is
      Table_Increment      => 100,
      Table_Name           => "Name_Externals");
 
-   --------------------------------------------------------
-   -- Handling of inherited classwide pre/postconditions --
-   --------------------------------------------------------
+   ---------------------------------------------------------
+   -- Handling of inherited class-wide pre/postconditions --
+   ---------------------------------------------------------
 
-   --  Following AI12-0113, the expression for a classwide condition is
+   --  Following AI12-0113, the expression for a class-wide condition is
    --  transformed for a subprogram that inherits it, by replacing calls
    --  to primitive operations of the original controlling type into the
    --  corresponding overriding operations of the derived type. The following
@@ -321,13 +322,6 @@ package body Sem_Prag is
    --  pragma. Entity name for unit and its parents is taken from item in
    --  previous with_clause that mentions the unit.
 
-   procedure Update_Primitives_Mapping
-     (Inher_Id : Entity_Id;
-      Subp_Id  : Entity_Id);
-   --  Map primitive operations of the parent type to the corresponding
-   --  operations of the descendant. Note that the descendant type may
-   --  not be frozen yet, so we cannot use the dispatch table directly.
-
    Dummy : Integer := 0;
    pragma Volatile (Dummy);
    --  Dummy volatile integer used in bodies of ip/rv to prevent optimization
@@ -3508,6 +3502,16 @@ package body Sem_Prag is
       --  related subprogram. Body_Id is the entity of the subprogram body.
       --  Flag Legal is set when the pragma is legal.
 
+      procedure Analyze_Unmodified_Or_Unused (Is_Unused : Boolean := False);
+      --  Perform full analysis of pragma Unmodified and the write aspect of
+      --  pragma Unused. Flag Is_Unused should be set when verifying the
+      --  semantics of pragma Unused.
+
+      procedure Analyze_Unreferenced_Or_Unused (Is_Unused : Boolean := False);
+      --  Perform full analysis of pragma Unreferenced and the read aspect of
+      --  pragma Unused. Flag Is_Unused should be set when verifying the
+      --  semantics of pragma Unused.
+
       procedure Check_Ada_83_Warning;
       --  Issues a warning message for the current pragma if operating in Ada
       --  83 mode (used for language pragmas that are not a standard part of
@@ -3928,7 +3932,7 @@ package body Sem_Prag is
       --    Enabled:    inlining is requested/required for the subprogram
 
       procedure Process_Inline (Status : Inline_Status);
-      --  Common processing for Inline, Inline_Always and No_Inline. Parameter
+      --  Common processing for No_Inline, Inline and Inline_Always. Parameter
       --  indicates the inline status specified by the pragma.
 
       procedure Process_Interface_Name
@@ -4471,6 +4475,277 @@ package body Sem_Prag is
          end if;
       end Analyze_Refined_Depends_Global_Post;
 
+      ----------------------------------
+      -- Analyze_Unmodified_Or_Unused --
+      ----------------------------------
+
+      procedure Analyze_Unmodified_Or_Unused (Is_Unused : Boolean := False) is
+         Arg      : Node_Id;
+         Arg_Expr : Node_Id;
+         Arg_Id   : Entity_Id;
+
+         Ghost_Error_Posted : Boolean := False;
+         --  Flag set when an error concerning the illegal mix of Ghost and
+         --  non-Ghost variables is emitted.
+
+         Ghost_Id : Entity_Id := Empty;
+         --  The entity of the first Ghost variable encountered while
+         --  processing the arguments of the pragma.
+
+      begin
+         GNAT_Pragma;
+         Check_At_Least_N_Arguments (1);
+
+         --  Loop through arguments
+
+         Arg := Arg1;
+         while Present (Arg) loop
+            Check_No_Identifier (Arg);
+
+            --  Note: the analyze call done by Check_Arg_Is_Local_Name will
+            --  in fact generate reference, so that the entity will have a
+            --  reference, which will inhibit any warnings about it not
+            --  being referenced, and also properly show up in the ali file
+            --  as a reference. But this reference is recorded before the
+            --  Has_Pragma_Unreferenced flag is set, so that no warning is
+            --  generated for this reference.
+
+            Check_Arg_Is_Local_Name (Arg);
+            Arg_Expr := Get_Pragma_Arg (Arg);
+
+            if Is_Entity_Name (Arg_Expr) then
+               Arg_Id := Entity (Arg_Expr);
+
+               --  Skip processing the argument if already flagged
+
+               if Is_Assignable (Arg_Id)
+                 and then not Has_Pragma_Unmodified (Arg_Id)
+                 and then not Has_Pragma_Unused (Arg_Id)
+               then
+                  Set_Has_Pragma_Unmodified (Arg_Id);
+
+                  if Is_Unused then
+                     Set_Has_Pragma_Unused (Arg_Id);
+                  end if;
+
+                  --  A pragma that applies to a Ghost entity becomes Ghost for
+                  --  the purposes of legality checks and removal of ignored
+                  --  Ghost code.
+
+                  Mark_Pragma_As_Ghost (N, Arg_Id);
+
+                  --  Capture the entity of the first Ghost variable being
+                  --  processed for error detection purposes.
+
+                  if Is_Ghost_Entity (Arg_Id) then
+                     if No (Ghost_Id) then
+                        Ghost_Id := Arg_Id;
+                     end if;
+
+                  --  Otherwise the variable is non-Ghost. It is illegal to mix
+                  --  references to Ghost and non-Ghost entities
+                  --  (SPARK RM 6.9).
+
+                  elsif Present (Ghost_Id)
+                    and then not Ghost_Error_Posted
+                  then
+                     Ghost_Error_Posted := True;
+
+                     Error_Msg_Name_1 := Pname;
+                     Error_Msg_N
+                       ("pragma % cannot mention ghost and non-ghost "
+                        & "variables", N);
+
+                     Error_Msg_Sloc := Sloc (Ghost_Id);
+                     Error_Msg_NE ("\& # declared as ghost", N, Ghost_Id);
+
+                     Error_Msg_Sloc := Sloc (Arg_Id);
+                     Error_Msg_NE ("\& # declared as non-ghost", N, Arg_Id);
+                  end if;
+
+               --  Warn if already flagged as Unused or Unmodified
+
+               elsif Has_Pragma_Unmodified (Arg_Id) then
+                  if Has_Pragma_Unused (Arg_Id) then
+                     Error_Msg_NE
+                       ("??pragma Unused already given for &!", Arg_Expr,
+                         Arg_Id);
+                  else
+                     Error_Msg_NE
+                       ("??pragma Unmodified already given for &!", Arg_Expr,
+                         Arg_Id);
+                  end if;
+
+               --  Otherwise the pragma referenced an illegal entity
+
+               else
+                  Error_Pragma_Arg
+                    ("pragma% can only be applied to a variable", Arg_Expr);
+               end if;
+            end if;
+
+            Next (Arg);
+         end loop;
+      end Analyze_Unmodified_Or_Unused;
+
+      -----------------------------------
+      -- Analyze_Unreference_Or_Unused --
+      -----------------------------------
+
+      procedure Analyze_Unreferenced_Or_Unused
+        (Is_Unused : Boolean := False)
+      is
+         Arg      : Node_Id;
+         Arg_Expr : Node_Id;
+         Arg_Id   : Entity_Id;
+         Citem    : Node_Id;
+
+         Ghost_Error_Posted : Boolean := False;
+         --  Flag set when an error concerning the illegal mix of Ghost and
+         --  non-Ghost names is emitted.
+
+         Ghost_Id : Entity_Id := Empty;
+         --  The entity of the first Ghost name encountered while processing
+         --  the arguments of the pragma.
+
+      begin
+         GNAT_Pragma;
+         Check_At_Least_N_Arguments (1);
+
+         --  Check case of appearing within context clause
+
+         if not Is_Unused and then Is_In_Context_Clause then
+
+            --  The arguments must all be units mentioned in a with clause in
+            --  the same context clause. Note that Par.Prag already checked
+            --  that the arguments are either identifiers or selected
+            --  components.
+
+            Arg := Arg1;
+            while Present (Arg) loop
+               Citem := First (List_Containing (N));
+               while Citem /= N loop
+                  Arg_Expr := Get_Pragma_Arg (Arg);
+
+                  if Nkind (Citem) = N_With_Clause
+                    and then Same_Name (Name (Citem), Arg_Expr)
+                  then
+                     Set_Has_Pragma_Unreferenced
+                       (Cunit_Entity
+                         (Get_Source_Unit
+                           (Library_Unit (Citem))));
+                     Set_Elab_Unit_Name (Arg_Expr, Name (Citem));
+                     exit;
+                  end if;
+
+                  Next (Citem);
+               end loop;
+
+               if Citem = N then
+                  Error_Pragma_Arg
+                    ("argument of pragma% is not withed unit", Arg);
+               end if;
+
+               Next (Arg);
+            end loop;
+
+         --  Case of not in list of context items
+
+         else
+            Arg := Arg1;
+            while Present (Arg) loop
+               Check_No_Identifier (Arg);
+
+               --  Note: the analyze call done by Check_Arg_Is_Local_Name will
+               --  in fact generate reference, so that the entity will have a
+               --  reference, which will inhibit any warnings about it not
+               --  being referenced, and also properly show up in the ali file
+               --  as a reference. But this reference is recorded before the
+               --  Has_Pragma_Unreferenced flag is set, so that no warning is
+               --  generated for this reference.
+
+               Check_Arg_Is_Local_Name (Arg);
+               Arg_Expr := Get_Pragma_Arg (Arg);
+
+               if Is_Entity_Name (Arg_Expr) then
+                  Arg_Id := Entity (Arg_Expr);
+
+                  --  Warn if already flagged as Unused or Unreferenced and
+                  --  skip processing the argument.
+
+                  if Has_Pragma_Unreferenced (Arg_Id) then
+                     if Has_Pragma_Unused (Arg_Id) then
+                        Error_Msg_NE
+                          ("??pragma Unused already given for &!", Arg_Expr,
+                            Arg_Id);
+                     else
+                        Error_Msg_NE
+                          ("??pragma Unreferenced already given for &!",
+                            Arg_Expr, Arg_Id);
+                     end if;
+
+                  --  Apply Unreferenced to the entity
+
+                  else
+                     --  If the entity is overloaded, the pragma applies to the
+                     --  most recent overloading, as documented. In this case,
+                     --  name resolution does not generate a reference, so it
+                     --  must be done here explicitly.
+
+                     if Is_Overloaded (Arg_Expr) then
+                        Generate_Reference (Arg_Id, N);
+                     end if;
+
+                     Set_Has_Pragma_Unreferenced (Arg_Id);
+
+                     if Is_Unused then
+                        Set_Has_Pragma_Unused (Arg_Id);
+                     end if;
+
+                     --  A pragma that applies to a Ghost entity becomes Ghost
+                     --  for the purposes of legality checks and removal of
+                     --  ignored Ghost code.
+
+                     Mark_Pragma_As_Ghost (N, Arg_Id);
+
+                     --  Capture the entity of the first Ghost name being
+                     --  processed for error detection purposes.
+
+                     if Is_Ghost_Entity (Arg_Id) then
+                        if No (Ghost_Id) then
+                           Ghost_Id := Arg_Id;
+                        end if;
+
+                     --  Otherwise the name is non-Ghost. It is illegal to mix
+                     --  references to Ghost and non-Ghost entities
+                     --  (SPARK RM 6.9).
+
+                     elsif Present (Ghost_Id)
+                       and then not Ghost_Error_Posted
+                     then
+                        Ghost_Error_Posted := True;
+
+                        Error_Msg_Name_1 := Pname;
+                        Error_Msg_N
+                          ("pragma % cannot mention ghost and non-ghost "
+                           & "names", N);
+
+                        Error_Msg_Sloc := Sloc (Ghost_Id);
+                        Error_Msg_NE
+                          ("\& # declared as ghost", N, Ghost_Id);
+
+                        Error_Msg_Sloc := Sloc (Arg_Id);
+                        Error_Msg_NE
+                          ("\& # declared as non-ghost", N, Arg_Id);
+                     end if;
+                  end if;
+               end if;
+
+               Next (Arg);
+            end loop;
+         end if;
+      end Analyze_Unreferenced_Or_Unused;
+
       --------------------------
       -- Check_Ada_83_Warning --
       --------------------------
@@ -8516,21 +8791,20 @@ package body Sem_Prag is
          --  processing the arguments of the pragma.
 
          procedure Make_Inline (Subp : Entity_Id);
-         --  Subp is the defining unit name of the subprogram declaration. Set
-         --  the flag, as well as the flag in the corresponding body, if there
-         --  is one present.
+         --  Subp is the defining unit name of the subprogram declaration. If
+         --  the pragma is valid, call Set_Inline_Flags on Subp, as well as on
+         --  the corresponding body, if there is one present.
 
          procedure Set_Inline_Flags (Subp : Entity_Id);
-         --  Sets Is_Inlined and Has_Pragma_Inline flags for Subp and also
-         --  Has_Pragma_Inline_Always for the Inline_Always case.
+         --  Set Has_Pragma_{No_Inline,Inline,Inline_Always} flag on Subp.
+         --  Also set or clear Is_Inlined flag on Subp depending on Status.
 
          function Inlining_Not_Possible (Subp : Entity_Id) return Boolean;
          --  Returns True if it can be determined at this stage that inlining
          --  is not possible, for example if the body is available and contains
          --  exception handlers, we prevent inlining, since otherwise we can
          --  get undefined symbols at link time. This function also emits a
-         --  warning if front-end inlining is enabled and the pragma appears
-         --  too late.
+         --  warning if the pragma appears too late.
          --
          --  ??? is business with link symbols still valid, or does it relate
          --  to front end ZCX which is being phased out ???
@@ -8552,9 +8826,7 @@ package body Sem_Prag is
             elsif Nkind (Decl) = N_Subprogram_Declaration
               and then Present (Corresponding_Body (Decl))
             then
-               if Front_End_Inlining
-                 and then Analyzed (Corresponding_Body (Decl))
-               then
+               if Analyzed (Corresponding_Body (Decl)) then
                   Error_Msg_N ("pragma appears too late, ignored??", N);
                   return True;
 
@@ -8604,6 +8876,7 @@ package body Sem_Prag is
             --  If inlining is not possible, for now do not treat as an error
 
             elsif Status /= Suppressed
+              and then Front_End_Inlining
               and then Inlining_Not_Possible (Subp)
             then
                Applies := True;
@@ -8773,9 +9046,7 @@ package body Sem_Prag is
                   end if;
                end if;
 
-               if not Has_Pragma_Inline (Subp) then
-                  Set_Has_Pragma_Inline (Subp);
-               end if;
+               Set_Has_Pragma_Inline (Subp);
             end if;
 
             --  Then adjust the Is_Inlined flag. It can never be set if the
@@ -14214,8 +14485,7 @@ package body Sem_Prag is
             --  checks in SPARK mode).
 
             Dynamic_Elaboration_Checks :=
-              (Chars (Get_Pragma_Arg (Arg1)) = Name_Dynamic)
-                and then SPARK_Mode /= On;
+              Chars (Get_Pragma_Arg (Arg1)) = Name_Dynamic;
 
          ---------------
          -- Eliminate --
@@ -16124,7 +16394,23 @@ package body Sem_Prag is
 
             if not GNATprove_Mode then
 
-               --  Inline status is Enabled if inlining option is active
+               --  Inline status is Enabled if option -gnatn is specified.
+               --  However this status determines only the value of the
+               --  Is_Inlined flag on the subprogram and does not prevent
+               --  the pragma itself from being recorded for later use,
+               --  in particular for a later modification of Is_Inlined
+               --  independently of the -gnatn option.
+
+               --  In other words, if -gnatn is specified for a unit, then
+               --  all Inline pragmas processed for the compilation of this
+               --  unit, including those in the spec of other units, are
+               --  activated, so subprograms will be inlined across units.
+
+               --  If -gnatn is not specified, no Inline pragma is activated
+               --  here, which means that subprograms will not be inlined
+               --  across units. The Is_Inlined flag will nevertheless be
+               --  set later when bodies are analyzed, so subprograms will
+               --  be inlined within the unit.
 
                if Inline_Active then
                   Process_Inline (Enabled);
@@ -17623,28 +17909,38 @@ package body Sem_Prag is
             Check_Valid_Configuration_Pragma;
             Check_Arg_Count (0);
 
-            No_Run_Time_Mode           := True;
-            Configurable_Run_Time_Mode := True;
+            --  Remove backward compatibility if Build_Type is FSF or GPL and
+            --  generate a warning.
 
-            --  Set Duration to 32 bits if word size is 32
+            declare
+               Ignore : constant Boolean := Build_Type in FSF .. GPL;
+            begin
+               if Ignore then
+                  Error_Pragma ("pragma% is ignored, has no effect??");
+               else
+                  No_Run_Time_Mode           := True;
+                  Configurable_Run_Time_Mode := True;
 
-            if Ttypes.System_Word_Size = 32 then
-               Duration_32_Bits_On_Target := True;
-            end if;
+                  --  Set Duration to 32 bits if word size is 32
 
-            --  Set appropriate restrictions
+                  if Ttypes.System_Word_Size = 32 then
+                     Duration_32_Bits_On_Target := True;
+                  end if;
 
-            Set_Restriction (No_Finalization, N);
-            Set_Restriction (No_Exception_Handlers, N);
-            Set_Restriction (Max_Tasks, N, 0);
-            Set_Restriction (No_Tasking, N);
+                  --  Set appropriate restrictions
 
-            -----------------------
-            -- No_Tagged_Streams --
-            -----------------------
+                  Set_Restriction (No_Finalization, N);
+                  Set_Restriction (No_Exception_Handlers, N);
+                  Set_Restriction (Max_Tasks, N, 0);
+                  Set_Restriction (No_Tasking, N);
+               end if;
+            end;
+
+         -----------------------
+         -- No_Tagged_Streams --
+         -----------------------
 
-            --  pragma No_Tagged_Streams;
-            --  pragma No_Tagged_Streams ([Entity => ]tagged_type_local_NAME);
+         --  pragma No_Tagged_Streams [([Entity => ]tagged_type_local_NAME)];
 
          when Pragma_No_Tagged_Streams => No_Tagged_Strms : declare
             E    : Entity_Id;
@@ -20043,7 +20339,7 @@ package body Sem_Prag is
 
             else
                Error_Pragma_Arg
-                 ("pragma% applies only to formal access to classwide types",
+                 ("pragma% applies only to formal access-to-class-wide types",
                   Arg1);
             end if;
          end Remote_Access_Type;
@@ -20915,10 +21211,6 @@ package body Sem_Prag is
             begin
                SPARK_Mode := Mode_Id;
                SPARK_Mode_Pragma := N;
-
-               if SPARK_Mode = On then
-                  Dynamic_Elaboration_Checks := False;
-               end if;
             end Set_SPARK_Context;
 
             --  Local variables
@@ -22266,6 +22558,30 @@ package body Sem_Prag is
             Set_Is_Unchecked_Union  (Base_Type (Typ));
          end Unchecked_Union;
 
+         ----------------------------
+         -- Unevaluated_Use_Of_Old --
+         ----------------------------
+
+         --  pragma Unevaluated_Use_Of_Old (Error | Warn | Allow);
+
+         when Pragma_Unevaluated_Use_Of_Old =>
+            GNAT_Pragma;
+            Check_Arg_Count (1);
+            Check_No_Identifiers;
+            Check_Arg_Is_One_Of (Arg1, Name_Error, Name_Warn, Name_Allow);
+
+            --  Suppress/Unsuppress can appear as a configuration pragma, or in
+            --  a declarative part or a package spec.
+
+            if not Is_Configuration_Pragma then
+               Check_Is_In_Decl_Part_Or_Package_Spec;
+            end if;
+
+            --  Store proper setting of Uneval_Old
+
+            Get_Name_String (Chars (Get_Pragma_Arg (Arg1)));
+            Uneval_Old := Fold_Upper (Name_Buffer (1));
+
          ------------------------
          -- Unimplemented_Unit --
          ------------------------
@@ -22277,10 +22593,9 @@ package body Sem_Prag is
          --  body, not in the spec).
 
          when Pragma_Unimplemented_Unit => Unimplemented_Unit : declare
-            Cunitent : constant Entity_Id :=
+            Cunitent : constant Entity_Id   :=
                          Cunit_Entity (Get_Source_Unit (Loc));
-            Ent_Kind : constant Entity_Kind :=
-                         Ekind (Cunitent);
+            Ent_Kind : constant Entity_Kind := Ekind (Cunitent);
 
          begin
             GNAT_Pragma;
@@ -22338,22 +22653,7 @@ package body Sem_Prag is
 
          when Pragma_Universal_Data =>
             GNAT_Pragma;
-
-            --  If this is a configuration pragma, then set the universal
-            --  addressing option, otherwise confirm that the pragma satisfies
-            --  the requirements of library unit pragma placement and leave it
-            --  to the GNAAMP back end to detect the pragma (avoids transitive
-            --  setting of the option due to withed units).
-
-            if Is_Configuration_Pragma then
-               Universal_Addressing_On_AAMP := True;
-            else
-               Check_Valid_Library_Unit_Pragma;
-            end if;
-
-            if not AAMP_On_Target then
-               Error_Pragma ("??pragma% ignored (applies only to AAMP)");
-            end if;
+            Error_Pragma ("??pragma% ignored (applies only to AAMP)");
 
          ----------------
          -- Unmodified --
@@ -22361,92 +22661,8 @@ package body Sem_Prag is
 
          --  pragma Unmodified (LOCAL_NAME {, LOCAL_NAME});
 
-         when Pragma_Unmodified => Unmodified : declare
-            Arg      : Node_Id;
-            Arg_Expr : Node_Id;
-            Arg_Id   : Entity_Id;
-
-            Ghost_Error_Posted : Boolean := False;
-            --  Flag set when an error concerning the illegal mix of Ghost and
-            --  non-Ghost variables is emitted.
-
-            Ghost_Id : Entity_Id := Empty;
-            --  The entity of the first Ghost variable encountered while
-            --  processing the arguments of the pragma.
-
-         begin
-            GNAT_Pragma;
-            Check_At_Least_N_Arguments (1);
-
-            --  Loop through arguments
-
-            Arg := Arg1;
-            while Present (Arg) loop
-               Check_No_Identifier (Arg);
-
-               --  Note: the analyze call done by Check_Arg_Is_Local_Name will
-               --  in fact generate reference, so that the entity will have a
-               --  reference, which will inhibit any warnings about it not
-               --  being referenced, and also properly show up in the ali file
-               --  as a reference. But this reference is recorded before the
-               --  Has_Pragma_Unreferenced flag is set, so that no warning is
-               --  generated for this reference.
-
-               Check_Arg_Is_Local_Name (Arg);
-               Arg_Expr := Get_Pragma_Arg (Arg);
-
-               if Is_Entity_Name (Arg_Expr) then
-                  Arg_Id := Entity (Arg_Expr);
-
-                  if Is_Assignable (Arg_Id) then
-                     Set_Has_Pragma_Unmodified (Arg_Id);
-
-                     --  A pragma that applies to a Ghost entity becomes Ghost
-                     --  for the purposes of legality checks and removal of
-                     --  ignored Ghost code.
-
-                     Mark_Pragma_As_Ghost (N, Arg_Id);
-
-                     --  Capture the entity of the first Ghost variable being
-                     --  processed for error detection purposes.
-
-                     if Is_Ghost_Entity (Arg_Id) then
-                        if No (Ghost_Id) then
-                           Ghost_Id := Arg_Id;
-                        end if;
-
-                     --  Otherwise the variable is non-Ghost. It is illegal
-                     --  to mix references to Ghost and non-Ghost entities
-                     --  (SPARK RM 6.9).
-
-                     elsif Present (Ghost_Id)
-                       and then not Ghost_Error_Posted
-                     then
-                        Ghost_Error_Posted := True;
-
-                        Error_Msg_Name_1 := Pname;
-                        Error_Msg_N
-                          ("pragma % cannot mention ghost and non-ghost "
-                           & "variables", N);
-
-                        Error_Msg_Sloc := Sloc (Ghost_Id);
-                        Error_Msg_NE ("\& # declared as ghost", N, Ghost_Id);
-
-                        Error_Msg_Sloc := Sloc (Arg_Id);
-                        Error_Msg_NE ("\& # declared as non-ghost", N, Arg_Id);
-                     end if;
-
-                  --  Otherwise the pragma referenced an illegal entity
-
-                  else
-                     Error_Pragma_Arg
-                       ("pragma% can only be applied to a variable", Arg_Expr);
-                  end if;
-               end if;
-
-               Next (Arg);
-            end loop;
-         end Unmodified;
+         when Pragma_Unmodified =>
+            Analyze_Unmodified_Or_Unused;
 
          ------------------
          -- Unreferenced --
@@ -22458,133 +22674,8 @@ package body Sem_Prag is
 
          --  pragma Unreferenced (library_unit_NAME {, library_unit_NAME}
 
-         when Pragma_Unreferenced => Unreferenced : declare
-            Arg      : Node_Id;
-            Arg_Expr : Node_Id;
-            Arg_Id   : Entity_Id;
-            Citem    : Node_Id;
-
-            Ghost_Error_Posted : Boolean := False;
-            --  Flag set when an error concerning the illegal mix of Ghost and
-            --  non-Ghost names is emitted.
-
-            Ghost_Id : Entity_Id := Empty;
-            --  The entity of the first Ghost name encountered while processing
-            --  the arguments of the pragma.
-
-         begin
-            GNAT_Pragma;
-            Check_At_Least_N_Arguments (1);
-
-            --  Check case of appearing within context clause
-
-            if Is_In_Context_Clause then
-
-               --  The arguments must all be units mentioned in a with clause
-               --  in the same context clause. Note we already checked (in
-               --  Par.Prag) that the arguments are either identifiers or
-               --  selected components.
-
-               Arg := Arg1;
-               while Present (Arg) loop
-                  Citem := First (List_Containing (N));
-                  while Citem /= N loop
-                     Arg_Expr := Get_Pragma_Arg (Arg);
-
-                     if Nkind (Citem) = N_With_Clause
-                       and then Same_Name (Name (Citem), Arg_Expr)
-                     then
-                        Set_Has_Pragma_Unreferenced
-                          (Cunit_Entity
-                             (Get_Source_Unit
-                                (Library_Unit (Citem))));
-                        Set_Elab_Unit_Name (Arg_Expr, Name (Citem));
-                        exit;
-                     end if;
-
-                     Next (Citem);
-                  end loop;
-
-                  if Citem = N then
-                     Error_Pragma_Arg
-                       ("argument of pragma% is not withed unit", Arg);
-                  end if;
-
-                  Next (Arg);
-               end loop;
-
-            --  Case of not in list of context items
-
-            else
-               Arg := Arg1;
-               while Present (Arg) loop
-                  Check_No_Identifier (Arg);
-
-                  --  Note: the analyze call done by Check_Arg_Is_Local_Name
-                  --  will in fact generate reference, so that the entity will
-                  --  have a reference, which will inhibit any warnings about
-                  --  it not being referenced, and also properly show up in the
-                  --  ali file as a reference. But this reference is recorded
-                  --  before the Has_Pragma_Unreferenced flag is set, so that
-                  --  no warning is generated for this reference.
-
-                  Check_Arg_Is_Local_Name (Arg);
-                  Arg_Expr := Get_Pragma_Arg (Arg);
-
-                  if Is_Entity_Name (Arg_Expr) then
-                     Arg_Id := Entity (Arg_Expr);
-
-                     --  If the entity is overloaded, the pragma applies to the
-                     --  most recent overloading, as documented. In this case,
-                     --  name resolution does not generate a reference, so it
-                     --  must be done here explicitly.
-
-                     if Is_Overloaded (Arg_Expr) then
-                        Generate_Reference (Arg_Id, N);
-                     end if;
-
-                     Set_Has_Pragma_Unreferenced (Arg_Id);
-
-                     --  A pragma that applies to a Ghost entity becomes Ghost
-                     --  for the purposes of legality checks and removal of
-                     --  ignored Ghost code.
-
-                     Mark_Pragma_As_Ghost (N, Arg_Id);
-
-                     --  Capture the entity of the first Ghost name being
-                     --  processed for error detection purposes.
-
-                     if Is_Ghost_Entity (Arg_Id) then
-                        if No (Ghost_Id) then
-                           Ghost_Id := Arg_Id;
-                        end if;
-
-                     --  Otherwise the name is non-Ghost. It is illegal to mix
-                     --  references to Ghost and non-Ghost entities
-                     --  (SPARK RM 6.9).
-
-                     elsif Present (Ghost_Id)
-                       and then not Ghost_Error_Posted
-                     then
-                        Ghost_Error_Posted := True;
-
-                        Error_Msg_Name_1 := Pname;
-                        Error_Msg_N
-                          ("pragma % cannot mention ghost and non-ghost names",
-                           N);
-
-                        Error_Msg_Sloc := Sloc (Ghost_Id);
-                        Error_Msg_NE ("\& # declared as ghost", N, Ghost_Id);
-
-                        Error_Msg_Sloc := Sloc (Arg_Id);
-                        Error_Msg_NE ("\& # declared as non-ghost", N, Arg_Id);
-                     end if;
-                  end if;
-
-                  Next (Arg);
-               end loop;
-            end if;
-         end Unreferenced;
+         when Pragma_Unreferenced =>
+            Analyze_Unreferenced_Or_Unused;
 
          --------------------------
          -- Unreferenced_Objects --
@@ -22692,29 +22783,15 @@ package body Sem_Prag is
             Ada_2005_Pragma;
             Process_Suppress_Unsuppress (Suppress_Case => False);
 
-         ----------------------------
-         -- Unevaluated_Use_Of_Old --
-         ----------------------------
-
-         --  pragma Unevaluated_Use_Of_Old (Error | Warn | Allow);
-
-         when Pragma_Unevaluated_Use_Of_Old =>
-            GNAT_Pragma;
-            Check_Arg_Count (1);
-            Check_No_Identifiers;
-            Check_Arg_Is_One_Of (Arg1, Name_Error, Name_Warn, Name_Allow);
-
-            --  Suppress/Unsuppress can appear as a configuration pragma, or in
-            --  a declarative part or a package spec.
-
-            if not Is_Configuration_Pragma then
-               Check_Is_In_Decl_Part_Or_Package_Spec;
-            end if;
+         ------------
+         -- Unused --
+         ------------
 
-            --  Store proper setting of Uneval_Old
+         --  pragma Unused (LOCAL_NAME {, LOCAL_NAME});
 
-            Get_Name_String (Chars (Get_Pragma_Arg (Arg1)));
-            Uneval_Old := Fold_Upper (Name_Buffer (1));
+         when Pragma_Unused =>
+            Analyze_Unmodified_Or_Unused   (Is_Unused => True);
+            Analyze_Unreferenced_Or_Unused (Is_Unused => True);
 
          -------------------
          -- Use_VADS_Size --
@@ -26324,15 +26401,23 @@ package body Sem_Prag is
       return False;
    end Appears_In;
 
-   --------------------------------
-   -- Build_Classwide_Expression --
-   --------------------------------
+   ---------------------------------
+   -- Build_Class_Wide_Expression --
+   ---------------------------------
+
+   procedure Build_Class_Wide_Expression
+     (Prag        : Node_Id;
+      Subp        : Entity_Id;
+      Par_Subp    : Entity_Id;
+      Adjust_Sloc : Boolean)
+   is
+      Par_Formal  : Entity_Id;
+      Subp_Formal : Entity_Id;
 
-   procedure Build_Classwide_Expression (Prag : Node_Id; Subp : Entity_Id) is
       function Replace_Entity (N : Node_Id) return Traverse_Result;
       --  Replace reference to formal of inherited operation or to primitive
       --  operation of root type, with corresponding entity for derived type,
-      --  when constructing the classwide condition of an overridding
+      --  when constructing the class-wide condition of an overriding
       --  subprogram.
 
       --------------------
@@ -26343,6 +26428,10 @@ package body Sem_Prag is
          New_E : Entity_Id;
 
       begin
+         if Adjust_Sloc then
+            Adjust_Inherited_Pragma_Sloc (N);
+         end if;
+
          if Nkind (N) = N_Identifier
            and then Present (Entity (N))
            and then
@@ -26384,13 +26473,25 @@ package body Sem_Prag is
                     ("cannot call abstract subprogram in inherited condition "
                       & "for&#", N, Current_Scope);
 
+               --  In SPARK mode, reject an inherited condition for an
+               --  inherited operation if it contains a call to an overriding
+               --  operation, because this implies that the pre/postcondition
+               --  of the inherited operation have changed silently.
+
                elsif SPARK_Mode = On
                  and then Warn_On_Suspicious_Contract
                  and then Present (Alias (Subp))
+                 and then Present (New_E)
+                 and then Comes_From_Source (New_E)
                then
+                  Error_Msg_N
+                    ("cannot modify inherited condition (SPARK RM 6.1.1(1))",
+                     Parent (Subp));
+                  Error_Msg_Sloc   := Sloc (New_E);
+                  Error_Msg_Node_2 := Subp;
                   Error_Msg_NE
-                    ("?inherited condition is modified, build a wrapper "
-                     & "for&", Parent (Subp), Subp);
+                    ("\overriding of&# forces overriding of&",
+                     Parent (Subp), New_E);
                end if;
             end if;
 
@@ -26415,11 +26516,22 @@ package body Sem_Prag is
       procedure Replace_Condition_Entities is
         new Traverse_Proc (Replace_Entity);
 
-   --  Start of processing for Build_Classwide_Expression
+   --  Start of processing for Build_Class_Wide_Expression
 
    begin
+      --  Add mapping from old formals to new formals
+
+      Par_Formal := First_Formal (Par_Subp);
+      Subp_Formal  := First_Formal (Subp);
+
+      while Present (Par_Formal) and then Present (Subp_Formal) loop
+         Primitives_Mapping.Set (Par_Formal, Subp_Formal);
+         Next_Formal (Par_Formal);
+         Next_Formal (Subp_Formal);
+      end loop;
+
       Replace_Condition_Entities (Prag);
-   end Build_Classwide_Expression;
+   end Build_Class_Wide_Expression;
 
    -----------------------------------
    -- Build_Pragma_Check_Equivalent --
@@ -26470,10 +26582,8 @@ package body Sem_Prag is
       Loc          : constant Source_Ptr := Sloc (Prag);
       Prag_Nam     : constant Name_Id    := Pragma_Name (Prag);
       Check_Prag   : Node_Id;
-      Inher_Formal : Entity_Id;
       Msg_Arg      : Node_Id;
       Nam          : Name_Id;
-      Subp_Formal  : Entity_Id;
 
    --  Start of processing for Build_Pragma_Check_Equivalent
 
@@ -26488,24 +26598,25 @@ package body Sem_Prag is
 
          Update_Primitives_Mapping (Inher_Id, Subp_Id);
 
-         --  Add mapping from old formals to new formals.
+         --  Use generic machinery to copy inherited pragma, as if it were an
+         --  instantiation, resetting source locations appropriately, so that
+         --  expressions inside the inherited pragma use chained locations.
+         --  This is used in particular in GNATprove to locate precisely
+         --  messages on a given inherited pragma.
 
-         Inher_Formal := First_Formal (Inher_Id);
-         Subp_Formal  := First_Formal (Subp_Id);
-         while Present (Inher_Formal) and then Present (Subp_Formal) loop
-            Primitives_Mapping.Set (Inher_Formal, Subp_Formal);
-            Next_Formal (Inher_Formal);
-            Next_Formal (Subp_Formal);
-         end loop;
-      end if;
+         Set_Copied_Sloc_For_Inherited_Pragma
+           (Unit_Declaration_Node (Subp_Id), Inher_Id);
+         Check_Prag := New_Copy_Tree (Source => Prag);
 
-      --  Copy the original pragma while performing substitutions (if
-      --  applicable).
+         --  Build the inherited class-wide condition
 
-      Check_Prag := New_Copy_Tree (Source => Prag);
+         Build_Class_Wide_Expression
+           (Check_Prag, Subp_Id, Inher_Id, Adjust_Sloc => True);
 
-      if Present (Inher_Id) then
-         Build_Classwide_Expression (Check_Prag, Subp_Id);
+      --  If not an inherited condition simply copy the original pragma
+
+      else
+         Check_Prag := New_Copy_Tree (Source => Prag);
       end if;
 
       --  Mark the pragma as being internally generated and reset the Analyzed
@@ -28377,6 +28488,7 @@ package body Sem_Prag is
       Pragma_Type_Invariant                 => -1,
       Pragma_Type_Invariant_Class           => -1,
       Pragma_Unchecked_Union                =>  0,
+      Pragma_Unevaluated_Use_Of_Old         =>  0,
       Pragma_Unimplemented_Unit             =>  0,
       Pragma_Universal_Aliasing             =>  0,
       Pragma_Universal_Data                 =>  0,
@@ -28385,7 +28497,7 @@ package body Sem_Prag is
       Pragma_Unreferenced_Objects           =>  0,
       Pragma_Unreserve_All_Interrupts       =>  0,
       Pragma_Unsuppress                     =>  0,
-      Pragma_Unevaluated_Use_Of_Old         =>  0,
+      Pragma_Unused                         =>  0,
       Pragma_Use_VADS_Size                  =>  0,
       Pragma_Validity_Checks                =>  0,
       Pragma_Volatile                       =>  0,
@@ -29208,7 +29320,8 @@ package body Sem_Prag is
       Subp_Id  : Entity_Id)
    is
       function Overridden_Ancestor (S : Entity_Id) return Entity_Id;
-      --  ??? what does this routine do?
+      --  Locate the primitive operation with the name of S whose controlling
+      --  type is the dispatching type of Inher_Id.
 
       -------------------------
       -- Overridden_Ancestor --
@@ -29240,7 +29353,7 @@ package body Sem_Prag is
       Old_Prim : Entity_Id;
       Prim     : Entity_Id;
 
-   --  Start of processing for Primitive_Mapping
+   --  Start of processing for Update_Primitives_Mapping
 
    begin
       --  If the types are already in the map, it has been previously built for
diff --git a/gcc/ada/sem_prag.ads b/gcc/ada/sem_prag.ads
index 064534f6ee3..c442d55246a 100644
--- a/gcc/ada/sem_prag.ads
+++ b/gcc/ada/sem_prag.ads
@@ -244,16 +244,23 @@ package Sem_Prag is
    procedure Analyze_Test_Case_In_Decl_Part (N : Node_Id);
    --  Perform preanalysis of pragma Test_Case
 
-   procedure Build_Classwide_Expression (Prag : Node_Id; Subp : Entity_Id);
-   --  Build the expression for an inherited classwide condition. Prag is
+   procedure Build_Class_Wide_Expression
+     (Prag        : Node_Id;
+      Subp        : Entity_Id;
+      Par_Subp    : Entity_Id;
+      Adjust_Sloc : Boolean);
+   --  Build the expression for an inherited class-wide condition. Prag is
    --  the pragma constructed from the corresponding aspect of the parent
-   --  subprogram, and Subp is the overridding operation.
-   --  The routine is also called to check whether an inherited operation
-   --  that is not overridden but has inherited conditions need a wrapper,
-   --  because the inherited condition includes calls to other primitives that
-   --  have been overridden. In that case the first argument is the expression
-   --  of the original classwide aspect. In SPARK_Mode, such operation which
-   --  are just inherited but have modified pre/postconditions are illegal.
+   --  subprogram, and Subp is the overriding operation and Par_Subp is
+   --  the overridden operation that has the condition. Adjust_Sloc is True
+   --  when the sloc of nodes traversed should be adjusted for the inherited
+   --  pragma. The routine is also called to check whether an inherited
+   --  operation that is not overridden but has inherited conditions need
+   --  a wrapper, because the inherited condition includes calls to other
+   --  primitives that have been overridden. In that case the first argument
+   --  is the expression of the original class-wide aspect. In SPARK_Mode, such
+   --  operation which are just inherited but have modified pre/postconditions
+   --  are illegal.
 
    function Build_Pragma_Check_Equivalent
      (Prag           : Node_Id;
@@ -528,4 +535,13 @@ package Sem_Prag is
    --
    --    Empty if there is no such argument
 
+   procedure Update_Primitives_Mapping
+     (Inher_Id : Entity_Id;
+      Subp_Id  : Entity_Id);
+   --  Map primitive operations of the parent type to the corresponding
+   --  operations of the descendant. Note that the descendant type may not be
+   --  frozen yet, so we cannot use the dispatch table directly. This is called
+   --  when elaborating a contract for a subprogram, and when freezing a type
+   --  extension to verify legality rules on inherited conditions.
+
 end Sem_Prag;
diff --git a/gcc/ada/sem_res.adb b/gcc/ada/sem_res.adb
index ffd2ea15fbd..f35c9e25145 100644
--- a/gcc/ada/sem_res.adb
+++ b/gcc/ada/sem_res.adb
@@ -7119,6 +7119,7 @@ package body Sem_Res is
             --  read as it simply establishes an alias.
 
             if Ekind (E) = E_Variable
+              and then Dynamic_Elaboration_Checks
               and then Nkind (Par) /= N_Object_Renaming_Declaration
             then
                Check_Elab_Call (N);
@@ -9950,10 +9951,10 @@ package body Sem_Res is
 
    begin
       --  Ensure all actions associated with the left operand (e.g.
-      --  finalization of transient controlled objects) are fully evaluated
-      --  locally within an expression with actions. This is particularly
-      --  helpful for coverage analysis. However this should not happen in
-      --  generics or if Minimize_Expression_With_Actions is set.
+      --  finalization of transient objects) are fully evaluated locally within
+      --  an expression with actions. This is particularly helpful for coverage
+      --  analysis. However this should not happen in generics or if option
+      --  Minimize_Expression_With_Actions is set.
 
       if Expander_Active and not Minimize_Expression_With_Actions then
          declare
diff --git a/gcc/ada/sem_type.adb b/gcc/ada/sem_type.adb
index 2879c3cf9d7..3bc27db937b 100644
--- a/gcc/ada/sem_type.adb
+++ b/gcc/ada/sem_type.adb
@@ -1607,9 +1607,9 @@ package body Sem_Type is
                   Act1 := Left_Opnd (N);
                   Act2 := Right_Opnd (N);
 
-                  --  Use type of second formal, so as to include
-                  --  exponentiation, where the exponent may be
-                  --  ambiguous and the result non-universal.
+                  --  Use the type of the second formal, so as to include
+                  --  exponentiation, where the exponent may be ambiguous and
+                  --  the result non-universal.
 
                   Next_Formal (F1);
 
@@ -1619,8 +1619,10 @@ package body Sem_Type is
 
                if Nkind (Act1) in N_Op
                  and then Is_Overloaded (Act1)
-                 and then Nkind_In (Left_Opnd (Act1), N_Integer_Literal,
-                                                      N_Real_Literal)
+                 and then
+                   (Nkind (Act1) in N_Unary_Op
+                     or else Nkind_In (Left_Opnd (Act1), N_Integer_Literal,
+                                                         N_Real_Literal))
                  and then Nkind_In (Right_Opnd (Act1), N_Integer_Literal,
                                                        N_Real_Literal)
                  and then Has_Compatible_Type (Act1, Standard_Boolean)
diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index 0c4f9ebe46a..e8a22fa64e1 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -4865,7 +4865,7 @@ package body Sem_Util is
          Msgl := Msg'Length;
 
          for J in 1 .. Msgl loop
-            if Msg (J) = '?' and then (J = 1 or else Msg (J) /= ''') then
+            if Msg (J) = '?' and then (J = 1 or else Msg (J - 1) /= ''') then
                Msgc (J) := '<';
             else
                Msgc (J) := Msg (J);
@@ -11500,7 +11500,7 @@ package body Sem_Util is
    ------------------------------------------
 
    procedure Inspect_Deferred_Constant_Completion (Decls : List_Id) is
-      Decl   : Node_Id;
+      Decl : Node_Id;
 
    begin
       Decl := First (Decls);
@@ -17618,11 +17618,20 @@ package body Sem_Util is
                if Comes_From_Source (Exp)
                  or else Modification_Comes_From_Source
                then
-                  --  Give warning if pragma unmodified given and we are
+                  --  Give warning if pragma unmodified is given and we are
                   --  sure this is a modification.
 
                   if Has_Pragma_Unmodified (Ent) and then Sure then
-                     Error_Msg_NE ("??pragma Unmodified given for &!", N, Ent);
+
+                     --  Note that the entity may be present only as a result
+                     --  of pragma Unused.
+
+                     if Has_Pragma_Unused (Ent) then
+                        Error_Msg_NE ("??pragma Unused given for &!", N, Ent);
+                     else
+                        Error_Msg_NE
+                          ("??pragma Unmodified given for &!", N, Ent);
+                     end if;
                   end if;
 
                   Set_Never_Set_In_Source (Ent, False);
diff --git a/gcc/ada/sem_warn.adb b/gcc/ada/sem_warn.adb
index cb0a09293aa..d9050959ff2 100644
--- a/gcc/ada/sem_warn.adb
+++ b/gcc/ada/sem_warn.adb
@@ -314,6 +314,11 @@ package body Sem_Warn is
             elsif Is_Suspicious_Function_Name (Entity (Name (N))) then
                return;
 
+            --  Forget it if function is marked Volatile_Function
+
+            elsif Is_Volatile_Function (Entity (Name (N))) then
+               return;
+
             --  Forget it if warnings are suppressed on function entity
 
             elsif Has_Warnings_Off (Entity (Name (N))) then
diff --git a/gcc/ada/sinfo.adb b/gcc/ada/sinfo.adb
index f8ed04c9ed6..9738101d86c 100644
--- a/gcc/ada/sinfo.adb
+++ b/gcc/ada/sinfo.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -1752,6 +1752,14 @@ package body Sinfo is
       return Uint3 (N);
    end Intval;
 
+   function Is_Abort_Block
+     (N : Node_Id) return Boolean is
+   begin
+      pragma Assert (False
+        or else NT (N).Nkind = N_Block_Statement);
+      return Flag4 (N);
+   end Is_Abort_Block;
+
    function Is_Accessibility_Actual
      (N : Node_Id) return Boolean is
    begin
@@ -2409,6 +2417,14 @@ package body Sinfo is
       return Flag17 (N);
    end No_Minimize_Eliminate;
 
+   function No_Side_Effect_Removal
+      (N : Node_Id) return Boolean is
+   begin
+      pragma Assert (False
+        or else NT (N).Nkind = N_Function_Call);
+      return Flag1 (N);
+   end No_Side_Effect_Removal;
+
    function No_Truncation
       (N : Node_Id) return Boolean is
    begin
@@ -5007,6 +5023,14 @@ package body Sinfo is
       Set_Uint3 (N, Val);
    end Set_Intval;
 
+   procedure Set_Is_Abort_Block
+      (N : Node_Id; Val : Boolean := True) is
+   begin
+      pragma Assert (False
+        or else NT (N).Nkind = N_Block_Statement);
+      Set_Flag4 (N, Val);
+   end Set_Is_Abort_Block;
+
    procedure Set_Is_Accessibility_Actual
       (N : Node_Id; Val : Boolean := True) is
    begin
@@ -5664,6 +5688,14 @@ package body Sinfo is
       Set_Flag17 (N, Val);
    end Set_No_Minimize_Eliminate;
 
+   procedure Set_No_Side_Effect_Removal
+      (N : Node_Id; Val : Boolean := True) is
+   begin
+      pragma Assert (False
+        or else NT (N).Nkind = N_Function_Call);
+      Set_Flag1 (N, Val);
+   end Set_No_Side_Effect_Removal;
+
    procedure Set_No_Truncation
       (N : Node_Id; Val : Boolean := True) is
    begin
diff --git a/gcc/ada/sinfo.ads b/gcc/ada/sinfo.ads
index 860f0d1c978..01d9be531d3 100644
--- a/gcc/ada/sinfo.ads
+++ b/gcc/ada/sinfo.ads
@@ -1535,6 +1535,10 @@ package Sinfo is
    --    to the node for the spec of the instance, inserted as part of the
    --    semantic processing for instantiations in Sem_Ch12.
 
+   --  Is_Abort_Block (Flag4-Sem)
+   --    Present in N_Block_Statement nodes. True if the block protects a list
+   --    of statements with an Abort_Defer / Abort_Undefer_Direct pair.
+
    --  Is_Accessibility_Actual (Flag13-Sem)
    --    Present in N_Parameter_Association nodes. True if the parameter is
    --    an extra actual that carries the accessibility level of the actual
@@ -1946,6 +1950,12 @@ package Sinfo is
    --    It is used to indicate that processing for extended overflow checking
    --    modes is not required (this is used to prevent infinite recursion).
 
+   --  No_Side_Effect_Removal (Flag1-Sem)
+   --    Present in N_Function_Call nodes. Set when a function call does not
+   --    require side effect removal. This attribute suppresses the generation
+   --    of a temporary to capture the result of the function which eventually
+   --    replaces the function call.
+
    --  No_Truncation (Flag17-Sem)
    --    Present in N_Unchecked_Type_Conversion node. This flag has an effect
    --    only if the RM_Size of the source is greater than the RM_Size of the
@@ -4931,6 +4941,7 @@ package Sinfo is
       --  Declarations (List2) (set to No_List if no DECLARE part)
       --  Handled_Statement_Sequence (Node4)
       --  Cleanup_Actions (List5-Sem)
+      --  Is_Abort_Block (Flag4-Sem)
       --  Is_Task_Master (Flag5-Sem)
       --  Activation_Chain_Entity (Node3-Sem)
       --  Has_Created_Identifier (Flag15)
@@ -5296,6 +5307,7 @@ package Sinfo is
       --   actual parameter part)
       --  First_Named_Actual (Node4-Sem)
       --  Controlling_Argument (Node1-Sem) (set to Empty if not dispatching)
+      --  No_Side_Effect_Removal (Flag1-Sem)
       --  Is_Expanded_Build_In_Place_Call (Flag11-Sem)
       --  Do_Tag_Check (Flag13-Sem)
       --  No_Elaboration_Check (Flag14-Sem)
@@ -9324,6 +9336,9 @@ package Sinfo is
    function Intval
      (N : Node_Id) return Uint;       -- Uint3
 
+   function Is_Abort_Block
+     (N : Node_Id) return Boolean;    -- Flag4
+
    function Is_Accessibility_Actual
      (N : Node_Id) return Boolean;    -- Flag13
 
@@ -9540,6 +9555,9 @@ package Sinfo is
    function No_Minimize_Eliminate
      (N : Node_Id) return Boolean;    -- Flag17
 
+   function No_Side_Effect_Removal
+     (N : Node_Id) return Boolean;    -- Flag1
+
    function No_Truncation
      (N : Node_Id) return Boolean;    -- Flag17
 
@@ -10365,6 +10383,9 @@ package Sinfo is
    procedure Set_Intval
      (N : Node_Id; Val : Uint);               -- Uint3
 
+   procedure Set_Is_Abort_Block
+     (N : Node_Id; Val : Boolean := True);    -- Flag4
+
    procedure Set_Is_Accessibility_Actual
      (N : Node_Id; Val : Boolean := True);    -- Flag13
 
@@ -10581,6 +10602,9 @@ package Sinfo is
    procedure Set_No_Minimize_Eliminate
      (N : Node_Id; Val : Boolean := True);    -- Flag17
 
+   procedure Set_No_Side_Effect_Removal
+     (N : Node_Id; Val : Boolean := True);    -- Flag1
+
    procedure Set_No_Truncation
      (N : Node_Id; Val : Boolean := True);    -- Flag17
 
@@ -12806,6 +12830,7 @@ package Sinfo is
    pragma Inline (Instance_Spec);
    pragma Inline (Intval);
    pragma Inline (Iterator_Specification);
+   pragma Inline (Is_Abort_Block);
    pragma Inline (Is_Accessibility_Actual);
    pragma Inline (Is_Analyzed_Pragma);
    pragma Inline (Is_Asynchronous_Call_Block);
@@ -12877,6 +12902,7 @@ package Sinfo is
    pragma Inline (No_Entities_Ref_In_Spec);
    pragma Inline (No_Initialization);
    pragma Inline (No_Minimize_Eliminate);
+   pragma Inline (No_Side_Effect_Removal);
    pragma Inline (No_Truncation);
    pragma Inline (Non_Aliased_Prefix);
    pragma Inline (Null_Present);
@@ -13148,6 +13174,7 @@ package Sinfo is
    pragma Inline (Set_Interface_List);
    pragma Inline (Set_Interface_Present);
    pragma Inline (Set_Intval);
+   pragma Inline (Set_Is_Abort_Block);
    pragma Inline (Set_Is_Accessibility_Actual);
    pragma Inline (Set_Is_Analyzed_Pragma);
    pragma Inline (Set_Is_Asynchronous_Call_Block);
@@ -13220,6 +13247,7 @@ package Sinfo is
    pragma Inline (Set_No_Entities_Ref_In_Spec);
    pragma Inline (Set_No_Initialization);
    pragma Inline (Set_No_Minimize_Eliminate);
+   pragma Inline (Set_No_Side_Effect_Removal);
    pragma Inline (Set_No_Truncation);
    pragma Inline (Set_Non_Aliased_Prefix);
    pragma Inline (Set_Null_Excluding_Subtype);
diff --git a/gcc/ada/sinput-c.adb b/gcc/ada/sinput-c.adb
index 6c3d58254fe..3ef0f5af35b 100644
--- a/gcc/ada/sinput-c.adb
+++ b/gcc/ada/sinput-c.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2014, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -183,6 +183,7 @@ package body Sinput.C is
                Identifier_Casing   => Unknown,
                Inlined_Call        => No_Location,
                Inlined_Body        => False,
+               Inherited_Pragma    => False,
                Keyword_Casing      => Unknown,
                Last_Source_Line    => 1,
                License             => Unknown,
diff --git a/gcc/ada/sinput-l.adb b/gcc/ada/sinput-l.adb
index c084555cd93..aa9acb897d2 100644
--- a/gcc/ada/sinput-l.adb
+++ b/gcc/ada/sinput-l.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2014, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -91,7 +91,10 @@ package body Sinput.L is
    -- Adjust_Instantiation_Sloc --
    -------------------------------
 
-   procedure Adjust_Instantiation_Sloc (N : Node_Id; A : Sloc_Adjustment) is
+   procedure Adjust_Instantiation_Sloc
+     (N      : Node_Id;
+      Factor : Sloc_Adjustment)
+   is
       Loc : constant Source_Ptr := Sloc (N);
 
    begin
@@ -100,8 +103,8 @@ package body Sinput.L is
       --  case, but in practice there seem to be some nodes that get copied
       --  twice, and this is a defence against that happening.
 
-      if A.Lo <= Loc and then Loc <= A.Hi then
-         Set_Sloc (N, Loc + A.Adjust);
+      if Factor.Lo <= Loc and then Loc <= Factor.Hi then
+         Set_Sloc (N, Loc + Factor.Adjust);
       end if;
    end Adjust_Instantiation_Sloc;
 
@@ -121,19 +124,20 @@ package body Sinput.L is
    ---------------------------------
 
    procedure Create_Instantiation_Source
-     (Inst_Node    : Entity_Id;
-      Template_Id  : Entity_Id;
-      Inlined_Body : Boolean;
-      A            : out Sloc_Adjustment)
+     (Inst_Node        : Entity_Id;
+      Template_Id      : Entity_Id;
+      Factor           : out Sloc_Adjustment;
+      Inlined_Body     : Boolean := False;
+      Inherited_Pragma : Boolean := False)
    is
       Dnod : constant Node_Id := Declaration_Node (Template_Id);
       Xold : Source_File_Index;
       Xnew : Source_File_Index;
 
    begin
-      Xold := Get_Source_File_Index (Sloc (Template_Id));
-      A.Lo := Source_File.Table (Xold).Source_First;
-      A.Hi := Source_File.Table (Xold).Source_Last;
+      Xold      := Get_Source_File_Index (Sloc (Template_Id));
+      Factor.Lo := Source_File.Table (Xold).Source_First;
+      Factor.Hi := Source_File.Table (Xold).Source_Last;
 
       Source_File.Append (Source_File.Table (Xold));
       Xnew := Source_File.Last;
@@ -145,14 +149,15 @@ package body Sinput.L is
          Inst_Spec : Node_Id;
 
       begin
-         Snew.Inlined_Body  := Inlined_Body;
-         Snew.Template      := Xold;
+         Snew.Inlined_Body     := Inlined_Body;
+         Snew.Inherited_Pragma := Inherited_Pragma;
+         Snew.Template         := Xold;
 
-         --  For a genuine generic instantiation, assign new instance id.
-         --  For inlined bodies, we retain that of the template, but we
-         --  save the call location.
+         --  For a genuine generic instantiation, assign new instance id. For
+         --  inlined bodies or inherited pragmas, we retain that of the
+         --  template, but we save the call location.
 
-         if Inlined_Body then
+         if Inlined_Body or Inherited_Pragma then
             Snew.Inlined_Call := Sloc (Inst_Node);
 
          else
@@ -207,22 +212,22 @@ package body Sinput.L is
             end if;
          end if;
 
-         --  Now we need to compute the new values of Source_First and
-         --  Source_Last and adjust the source file pointer to have the
-         --  correct virtual origin for the new range of values.
+         --  Now compute the new values of Source_First and Source_Last and
+         --  adjust the source file pointer to have the correct virtual origin
+         --  for the new range of values.
 
-         --  Source_First must be greater than the last Source_Last value
-         --  and also must be a multiple of Source_Align
+         --  Source_First must be greater than the last Source_Last value and
+         --  also must be a multiple of Source_Align.
 
          Snew.Source_First :=
            ((Source_File.Table (Xnew - 1).Source_Last + Source_Align) /
               Source_Align) * Source_Align;
-         A.Adjust := Snew.Source_First - A.Lo;
-         Snew.Source_Last := A.Hi + A.Adjust;
+         Factor.Adjust := Snew.Source_First - Factor.Lo;
+         Snew.Source_Last := Factor.Hi + Factor.Adjust;
 
          Set_Source_File_Index_Table (Xnew);
 
-         Snew.Sloc_Adjust := Sold.Sloc_Adjust - A.Adjust;
+         Snew.Sloc_Adjust := Sold.Sloc_Adjust - Factor.Adjust;
 
          if Debug_Flag_L then
             Write_Eol;
@@ -256,7 +261,6 @@ package body Sinput.L is
                Write_Str ("body of package ");
 
             else pragma Assert (Ekind (Template_Id) = E_Subprogram_Body);
-
                if Nkind (Dnod) = N_Procedure_Specification then
                   Write_Str ("body of procedure ");
                else
@@ -280,11 +284,11 @@ package body Sinput.L is
             Write_Eol;
 
             Write_Str ("  old lo = ");
-            Write_Int (Int (A.Lo));
+            Write_Int (Int (Factor.Lo));
             Write_Eol;
 
             Write_Str ("  old hi = ");
-            Write_Int (Int (A.Hi));
+            Write_Int (Int (Factor.Hi));
             Write_Eol;
 
             Write_Str ("  new lo = ");
@@ -296,7 +300,7 @@ package body Sinput.L is
             Write_Eol;
 
             Write_Str ("  adjustment factor = ");
-            Write_Int (Int (A.Adjust));
+            Write_Int (Int (Factor.Adjust));
             Write_Eol;
 
             Write_Str ("  instantiation location: ");
@@ -326,7 +330,7 @@ package body Sinput.L is
          begin
             Snew.Source_Text :=
               To_Source_Buffer_Ptr
-                (Sold.Source_Text (-A.Adjust)'Address);
+                (Sold.Source_Text (-Factor.Adjust)'Address);
          end;
       end;
    end Create_Instantiation_Source;
@@ -509,6 +513,7 @@ package body Sinput.L is
                   Identifier_Casing   => Unknown,
                   Inlined_Call        => No_Location,
                   Inlined_Body        => False,
+                  Inherited_Pragma    => False,
                   Keyword_Casing      => Unknown,
                   Last_Source_Line    => 1,
                   License             => Unknown,
diff --git a/gcc/ada/sinput-l.ads b/gcc/ada/sinput-l.ads
index 9cb29482f61..f3af4c90b50 100644
--- a/gcc/ada/sinput-l.ads
+++ b/gcc/ada/sinput-l.ads
@@ -79,29 +79,34 @@ package Sinput.L is
    -------------------------------------------------
 
    type Sloc_Adjustment is private;
-   --  Type returned by Create_Instantiation_Source for use in subsequent
-   --  calls to Adjust_Instantiation_Sloc.
+   --  Type returned by Create_Instantiation_Source for use in subsequent calls
+   --  to Adjust_Instantiation_Sloc.
+
+   procedure Adjust_Instantiation_Sloc
+     (N      : Node_Id;
+      Factor : Sloc_Adjustment);
+   --  The instantiation tree is created by copying the tree of the generic
+   --  template (including the original Sloc values), and then applying
+   --  Adjust_Instantiation_Sloc to each copied node to adjust the Sloc to
+   --  reference the source entry for the instantiation.
 
    procedure Create_Instantiation_Source
-     (Inst_Node    : Entity_Id;
-      Template_Id  : Entity_Id;
-      Inlined_Body : Boolean;
-      A            : out Sloc_Adjustment);
+     (Inst_Node        : Entity_Id;
+      Template_Id      : Entity_Id;
+      Factor           : out Sloc_Adjustment;
+      Inlined_Body     : Boolean := False;
+      Inherited_Pragma : Boolean := False);
    --  This procedure creates the source table entry for an instantiation.
    --  Inst_Node is the instantiation node, and Template_Id is the defining
    --  identifier of the generic declaration or body unit as appropriate.
-   --  A is set to an adjustment factor to be used in subsequent calls to
-   --  Adjust_Instantiation_Sloc. The instantiation mechanism is also used
-   --  for inlined function and procedure calls. The parameter Inlined_Body
-   --  is set to True in such cases, and False for a generic instantiation.
-   --  This is used for generating error messages that distinguish these
-   --  two cases, otherwise the two cases are handled identically.
-
-   procedure Adjust_Instantiation_Sloc (N : Node_Id; A : Sloc_Adjustment);
-   --  The instantiation tree is created by copying the tree of the generic
-   --  template (including the original Sloc values), and then applying
-   --  Adjust_Instantiation_Sloc to each copied node to adjust the Sloc
-   --  to reference the source entry for the instantiation.
+   --  Factor is set to an adjustment factor to be used in subsequent calls to
+   --  Adjust_Instantiation_Sloc. The instantiation mechanism is also used for
+   --  inlined function and procedure calls. The parameter Inlined_Body is set
+   --  to True in such cases. This is used for generating error messages that
+   --  distinguish these two cases, otherwise the two cases are handled
+   --  identically. Similarly, the instantiation mechanism is also used for
+   --  inherited class-wide pre- and postconditions. Parameter Inherited_Pragma
+   --  is set to True in such cases.
 
 private
 
diff --git a/gcc/ada/sinput.adb b/gcc/ada/sinput.adb
index 0800f3196a6..a03949463e9 100644
--- a/gcc/ada/sinput.adb
+++ b/gcc/ada/sinput.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -300,6 +300,17 @@ package body Sinput is
       end case;
    end Check_For_BOM;
 
+   ---------------------------------
+   -- Comes_From_Inherited_Pragma --
+   ---------------------------------
+
+   function Comes_From_Inherited_Pragma (S : Source_Ptr) return Boolean is
+      SIE : Source_File_Record renames
+              Source_File.Table (Get_Source_File_Index (S));
+   begin
+      return SIE.Inherited_Pragma;
+   end Comes_From_Inherited_Pragma;
+
    -----------------------------
    -- Comes_From_Inlined_Body --
    -----------------------------
@@ -482,7 +493,7 @@ package body Sinput is
    function Instantiation (S : SFI) return Source_Ptr is
       SIE : Source_File_Record renames Source_File.Table (S);
    begin
-      if SIE.Inlined_Body then
+      if SIE.Inlined_Body or SIE.Inherited_Pragma then
          return SIE.Inlined_Call;
       else
          return Instances.Table (SIE.Instance);
@@ -1190,6 +1201,11 @@ package body Sinput is
       return Source_File.Table (S).Identifier_Casing;
    end Identifier_Casing;
 
+   function Inherited_Pragma (S : SFI) return Boolean is
+   begin
+      return Source_File.Table (S).Inherited_Pragma;
+   end Inherited_Pragma;
+
    function Inlined_Body (S : SFI) return Boolean is
    begin
       return Source_File.Table (S).Inlined_Body;
diff --git a/gcc/ada/sinput.ads b/gcc/ada/sinput.ads
index 24f1a68cf31..8165a8f6dea 100644
--- a/gcc/ada/sinput.ads
+++ b/gcc/ada/sinput.ads
@@ -260,14 +260,18 @@ package Sinput is
 
    --  Inlined_Call : Source_Ptr;
    --    Source file location of the subprogram call if this source file entry
-   --    represents an inlined body. Set to No_Location otherwise.
-   --    This field is read-only for clients.
+   --    represents an inlined body or an inherited pragma. Set to No_Location
+   --    otherwise. This field is read-only for clients.
 
    --  Inlined_Body : Boolean;
    --    This can only be set True if Instantiation has a value other than
    --    No_Location. If true it indicates that the instantiation is actually
    --    an instance of an inlined body.
-   --    ??? Redundant, always equal to (Inlined_Call /= No_Location)
+
+   --  Inherited_Pragma : Boolean;
+   --    This can only be set True if Instantiation has a value other than
+   --    No_Location. If true it indicates that the instantiation is actually
+   --    an inherited class-wide pre- or postcondition.
 
    --  Template : Source_File_Index; (read-only)
    --    Source file index of the source file containing the template if this
@@ -298,6 +302,7 @@ package Sinput is
    function Full_Ref_Name     (S : SFI) return File_Name_Type;
    function Identifier_Casing (S : SFI) return Casing_Type;
    function Inlined_Body      (S : SFI) return Boolean;
+   function Inherited_Pragma  (S : SFI) return Boolean;
    function Inlined_Call      (S : SFI) return Source_Ptr;
    function Instance          (S : SFI) return Instance_Id;
    function Keyword_Casing    (S : SFI) return Casing_Type;
@@ -420,9 +425,11 @@ package Sinput is
 
    function Instantiation (S : SFI) return Source_Ptr;
    --  For a source file entry that represents an inlined body, source location
-   --  of the inlined call. Otherwise, for a source file entry that represents
-   --  a generic instantiation, source location of the instantiation. Returns
-   --  No_Location in all other cases.
+   --  of the inlined call. For a source file entry that represents an
+   --  inherited pragma, source location of the declaration to which the
+   --  overriding subprogram for the inherited pragma is attached. Otherwise,
+   --  for a source file entry that represents a generic instantiation, source
+   --  location of the instantiation. Returns No_Location in all other cases.
 
    -----------------
    -- Global Data --
@@ -644,6 +651,13 @@ package Sinput is
    --  from instantiation of generics, since Instantiation_Location returns a
    --  valid location in both cases.
 
+   function Comes_From_Inherited_Pragma (S : Source_Ptr) return Boolean;
+   pragma Inline (Comes_From_Inherited_Pragma);
+   --  Given a source pointer S, returns whether it comes from an inherited
+   --  pragma. This allows distinguishing these source pointers from those
+   --  that come from instantiation of generics, since Instantiation_Location
+   --  returns a valid location in both cases.
+
    function Top_Level_Location (S : Source_Ptr) return Source_Ptr;
    --  Given a source pointer S, returns the argument unchanged if it is
    --  not in an instantiation. If S is in an instantiation, then it returns
@@ -759,6 +773,7 @@ private
    pragma Inline (Identifier_Casing);
    pragma Inline (Inlined_Call);
    pragma Inline (Inlined_Body);
+   pragma Inline (Inherited_Pragma);
    pragma Inline (Template);
    pragma Inline (Unit);
 
@@ -824,6 +839,7 @@ private
       File_Type         : Type_Of_File;
       Inlined_Call      : Source_Ptr;
       Inlined_Body      : Boolean;
+      Inherited_Pragma  : Boolean;
       License           : License_Type;
       Keyword_Casing    : Casing_Type;
       Identifier_Casing : Casing_Type;
@@ -881,7 +897,8 @@ private
       Time_Stamp          at 60 range 0 .. 8 * Time_Stamp_Length - 1;
       File_Type           at 74 range 0 .. 7;
       Inlined_Call        at 88 range 0 .. 31;
-      Inlined_Body        at 75 range 0 .. 7;
+      Inlined_Body        at 75 range 0 .. 0;
+      Inherited_Pragma    at 75 range 1 .. 1;
       License             at 76 range 0 .. 7;
       Keyword_Casing      at 77 range 0 .. 7;
       Identifier_Casing   at 78 range 0 .. 15;
diff --git a/gcc/ada/snames.adb-tmpl b/gcc/ada/snames.adb-tmpl
index 3de2b82cc6b..6b6c598bf83 100644
--- a/gcc/ada/snames.adb-tmpl
+++ b/gcc/ada/snames.adb-tmpl
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2012, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -455,7 +455,6 @@ package body Snames is
         or else N = Name_Interface
         or else N = Name_Interrupt_Priority
         or else N = Name_Lock_Free
-        or else N = Name_Relative_Deadline
         or else N = Name_Priority
         or else N = Name_Storage_Size
         or else N = Name_Storage_Unit;
diff --git a/gcc/ada/snames.ads-tmpl b/gcc/ada/snames.ads-tmpl
index 76b353bad7b..920b24ef12e 100644
--- a/gcc/ada/snames.ads-tmpl
+++ b/gcc/ada/snames.ads-tmpl
@@ -653,6 +653,7 @@ package Snames is
    Name_Unreferenced                   : constant Name_Id := N + $; -- GNAT
    Name_Unreferenced_Objects           : constant Name_Id := N + $; -- GNAT
    Name_Unreserve_All_Interrupts       : constant Name_Id := N + $; -- GNAT
+   Name_Unused                         : constant Name_Id := N + $; -- GNAT
    Name_Volatile                       : constant Name_Id := N + $;
    Name_Volatile_Components            : constant Name_Id := N + $;
    Name_Volatile_Full_Access           : constant Name_Id := N + $; -- GNAT
@@ -1965,6 +1966,7 @@ package Snames is
       Pragma_Unreferenced,
       Pragma_Unreferenced_Objects,
       Pragma_Unreserve_All_Interrupts,
+      Pragma_Unused,
       Pragma_Volatile,
       Pragma_Volatile_Components,
       Pragma_Volatile_Full_Access,
diff --git a/gcc/ada/treepr.adb b/gcc/ada/treepr.adb
index 9933cf78a03..27662dd3fca 100644
--- a/gcc/ada/treepr.adb
+++ b/gcc/ada/treepr.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1992-2015, Free Software Foundation, Inc.         --
+--          Copyright (C) 1992-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -1998,8 +1998,10 @@ package body Treepr is
 
             --  Don't bother with a missing list, empty list or error list
 
-            if D = Union_Id (No_List)
-              or else D = Union_Id (Error_List)
+            pragma Assert (D /= Union_Id (No_List));
+            --  Because No_List = Empty, which is in Node_Range above
+
+            if D = Union_Id (Error_List)
               or else Is_Empty_List (List_Id (D))
             then
                return;
diff --git a/gcc/ada/xref_lib.adb b/gcc/ada/xref_lib.adb
index 2afec821079..3f882b0a570 100644
--- a/gcc/ada/xref_lib.adb
+++ b/gcc/ada/xref_lib.adb
@@ -6,7 +6,7 @@
 --                                                                          --
 --                                 B o d y                                  --
 --                                                                          --
---          Copyright (C) 1998-2013, Free Software Foundation, Inc.         --
+--          Copyright (C) 1998-2016, Free Software Foundation, Inc.         --
 --                                                                          --
 -- GNAT is free software;  you can  redistribute it  and/or modify it under --
 -- terms of the  GNU General Public License as published  by the Free Soft- --
@@ -890,8 +890,12 @@ package body Xref_Lib is
 
       Parse_Token (Ali, Ptr, E_Name);
 
-      --  Exit if the symbol does not match
-      --  or if we have a local symbol and we do not want it
+      --  Exit if the symbol does not match or if we have a local symbol and we
+      --  do not want it or if the file is unknown.
+
+      if File.X_File = Empty_File then
+         return;
+      end if;
 
       if (not Local_Symbols and not E_Global)
         or else (Pattern.Initialized
@@ -1261,8 +1265,12 @@ package body Xref_Lib is
          Ptr := Ptr + 1;
          Parse_Number (Ali, Ptr, File_Nr);
 
-         if File_Nr > 0 then
+         --  If the referenced file is unknown, we simply ignore it
+
+         if File_Nr in Dependencies_Tables.First .. Last (File.Dep) then
             File.X_File := File.Dep.Table (File_Nr);
+         else
+            File.X_File := Empty_File;
          end if;
 
          Parse_EOL (Ali, Ptr);
diff --git a/gcc/alias.c b/gcc/alias.c
index 1e4c4d19e69..dd1dfd38920 100644
--- a/gcc/alias.c
+++ b/gcc/alias.c
@@ -619,6 +619,14 @@ component_uses_parent_alias_set_from (const_tree t)
 	case COMPONENT_REF:
 	  if (DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1)))
 	    found = t;
+	  /* Permit type-punning when accessing a union, provided the access
+	     is directly through the union.  For example, this code does not
+	     permit taking the address of a union member and then storing
+	     through it.  Even the type-punning allowed here is a GCC
+	     extension, albeit a common and useful one; the C standard says
+	     that such accesses have implementation-defined behavior.  */
+	  else if (TREE_CODE (TREE_TYPE (TREE_OPERAND (t, 0))) == UNION_TYPE)
+	    found = t;
 	  break;
 
 	case ARRAY_REF:
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 86ce14a968e..9c002f61fc6 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,25 @@
+2016-07-08  Jason Merrill  <jason@redhat.com>
+
+	P0145: Refining Expression Order for C++.
+	* c.opts (-fargs-in-order): Rename to -fstrong-eval-order.
+	* c-opts.c: Adjust.
+
+2016-07-05  Markus Trippelsdorf  <markus@trippelsdorf.de>
+
+	PR c++/71214
+	* c-cppbuiltin.c (c_cpp_builtins): Define __cpp_rvalue_references.
+
+2016-06-29  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* c-pragma.h (enum pragma_kind): Rename
+	PRAGMA_OMP_DECLARE_REDUCTION to PRAGMA_OMP_DECLARE.  Adjust all
+	users.
+
+2016-06-29  Richard Biener  <rguenther@suse.de>
+
+	PR middle-end/71002
+	* c-common.c (c_common_get_alias_set): Remove union type punning case.
+
 2016-06-24  Jason Merrill  <jason@redhat.com>
 
 	P0145R2: Refining Expression Order for C++.
diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c
index 3301c313998..936ddfb87e5 100644
--- a/gcc/c-family/c-common.c
+++ b/gcc/c-family/c-common.c
@@ -4736,8 +4736,6 @@ static GTY(()) hash_table<c_type_hasher> *type_hash_table;
 alias_set_type
 c_common_get_alias_set (tree t)
 {
-  tree u;
-
   /* For VLAs, use the alias set of the element type rather than the
      default of alias set 0 for types compared structurally.  */
   if (TYPE_P (t) && TYPE_STRUCTURAL_EQUALITY_P (t))
@@ -4747,19 +4745,6 @@ c_common_get_alias_set (tree t)
       return -1;
     }
 
-  /* Permit type-punning when accessing a union, provided the access
-     is directly through the union.  For example, this code does not
-     permit taking the address of a union member and then storing
-     through it.  Even the type-punning allowed here is a GCC
-     extension, albeit a common and useful one; the C standard says
-     that such accesses have implementation-defined behavior.  */
-  for (u = t;
-       TREE_CODE (u) == COMPONENT_REF || TREE_CODE (u) == ARRAY_REF;
-       u = TREE_OPERAND (u, 0))
-    if (TREE_CODE (u) == COMPONENT_REF
-	&& TREE_CODE (TREE_TYPE (TREE_OPERAND (u, 0))) == UNION_TYPE)
-      return 0;
-
   /* That's all the expressions we handle specially.  */
   if (!TYPE_P (t))
     return -1;
diff --git a/gcc/c-family/c-cppbuiltin.c b/gcc/c-family/c-cppbuiltin.c
index 408ad4747a3..3d4587e6db6 100644
--- a/gcc/c-family/c-cppbuiltin.c
+++ b/gcc/c-family/c-cppbuiltin.c
@@ -848,6 +848,7 @@ c_cpp_builtins (cpp_reader *pfile)
 	  cpp_define (pfile, "__cpp_decltype=200707");
 	  cpp_define (pfile, "__cpp_attributes=200809");
 	  cpp_define (pfile, "__cpp_rvalue_reference=200610");
+	  cpp_define (pfile, "__cpp_rvalue_references=200610");
 	  cpp_define (pfile, "__cpp_variadic_templates=200704");
 	  cpp_define (pfile, "__cpp_initializer_lists=200806");
 	  cpp_define (pfile, "__cpp_delegating_constructors=200604");
diff --git a/gcc/c-family/c-opts.c b/gcc/c-family/c-opts.c
index ff6339c44b6..d945825cc64 100644
--- a/gcc/c-family/c-opts.c
+++ b/gcc/c-family/c-opts.c
@@ -910,11 +910,11 @@ c_common_post_options (const char **pfilename)
   else if (warn_narrowing == -1)
     warn_narrowing = 0;
 
-  /* C++17 requires that function arguments be evaluated left-to-right even on
-     PUSH_ARGS_REVERSED targets.  */
+  /* C++17 has stricter evaluation order requirements; let's use some of them
+     for earlier C++ as well, so chaining works as expected.  */
   if (c_dialect_cxx ()
-      && flag_args_in_order == -1)
-    flag_args_in_order = 2 /*(cxx_dialect >= cxx1z) ? 2 : 0*/;
+      && flag_strong_eval_order == -1)
+    flag_strong_eval_order = (cxx_dialect >= cxx1z ? 2 : 1);
 
   /* Global sized deallocation is new in C++14.  */
   if (flag_sized_deallocation == -1)
diff --git a/gcc/c-family/c-pragma.c b/gcc/c-family/c-pragma.c
index c73aa822104..277bc560318 100644
--- a/gcc/c-family/c-pragma.c
+++ b/gcc/c-family/c-pragma.c
@@ -1286,7 +1286,7 @@ static const struct omp_pragma_def omp_pragmas[] = {
   { "threadprivate", PRAGMA_OMP_THREADPRIVATE }
 };
 static const struct omp_pragma_def omp_pragmas_simd[] = {
-  { "declare", PRAGMA_OMP_DECLARE_REDUCTION },
+  { "declare", PRAGMA_OMP_DECLARE },
   { "distribute", PRAGMA_OMP_DISTRIBUTE },
   { "for", PRAGMA_OMP_FOR },
   { "parallel", PRAGMA_OMP_PARALLEL },
diff --git a/gcc/c-family/c-pragma.h b/gcc/c-family/c-pragma.h
index 65f10db6e6f..6d9cb086ea3 100644
--- a/gcc/c-family/c-pragma.h
+++ b/gcc/c-family/c-pragma.h
@@ -46,7 +46,7 @@ enum pragma_kind {
   PRAGMA_OMP_CANCEL,
   PRAGMA_OMP_CANCELLATION_POINT,
   PRAGMA_OMP_CRITICAL,
-  PRAGMA_OMP_DECLARE_REDUCTION,
+  PRAGMA_OMP_DECLARE,
   PRAGMA_OMP_DISTRIBUTE,
   PRAGMA_OMP_END_DECLARE_TARGET,
   PRAGMA_OMP_FLUSH,
diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt
index 83fd84ccc0f..8c701523c38 100644
--- a/gcc/c-family/c.opt
+++ b/gcc/c-family/c.opt
@@ -1043,14 +1043,6 @@ falt-external-templates
 C++ ObjC++ Ignore Warn(switch %qs is no longer supported)
 No longer supported.
 
-fargs-in-order
-C++ ObjC++ Alias(fargs-in-order=, 2, 0)
-Always evaluate function arguments in left-to-right order.
-
-fargs-in-order=
-C++ ObjC++ Var(flag_args_in_order) Joined UInteger Init(-1)
-Always evaluate function arguments in left-to-right order.
-
 fasm
 C ObjC C++ ObjC++ Var(flag_no_asm, 0)
 Recognize the \"asm\" keyword.
@@ -1518,6 +1510,28 @@ Assume that values of enumeration type are always within the minimum range of th
 fstrict-prototype
 C++ ObjC++ Ignore Warn(switch %qs is no longer supported)
 
+fstrong-eval-order
+C++ ObjC++ Common Alias(fstrong-eval-order=, all, none)
+Follow the C++17 evaluation order requirements for assignment expressions,
+shift, member function calls, etc.
+
+fstrong-eval-order=
+C++ ObjC++ Common Var(flag_strong_eval_order) Joined Enum(strong_eval_order) Init(-1)
+Follow the C++17 evaluation order requirements for assignment expressions,
+shift, member function calls, etc.
+
+Enum
+Name(strong_eval_order) Type(int)
+
+EnumValue
+Enum(strong_eval_order) String(none) Value(0)
+
+EnumValue
+Enum(strong_eval_order) String(some) Value(1)
+
+EnumValue
+Enum(strong_eval_order) String(all) Value(2)
+
 ftabstop=
 C ObjC C++ ObjC++ Joined RejectNegative UInteger
 -ftabstop=<number>	Distance between tab stops for column reporting.
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index d32049c13e6..41d35470bed 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,29 @@
+2016-07-02  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/71719
+	* c-typeck.c (mark_exp_read): Handle VIEW_CONVERT_EXPR.
+
+2016-06-29  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* c-parser.c (c_parser_pragma) <PRAGMA_OMP_CANCELLATION_POINT>:
+	Move pragma context checking into...
+	(c_parser_omp_cancellation_point): ... here, and improve
+	diagnostic messages.
+	* c-typeck.c (c_finish_omp_cancel)
+	(c_finish_omp_cancellation_point): Improve diagnostic messages.
+
+2016-06-29  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/71685
+	* c-typeck.c (c_build_qualified_type): Don't clear
+	C_TYPE_INCOMPLETE_VARS for the main variant.
+
+2016-06-28  Martin Sebor  <msebor@redhat.com>
+
+	PR c/71552
+	* c-typeck.c (output_init_element): Diagnose incompatible types
+	before non-constant initializers.
+
 2016-06-28  Jakub Jelinek  <jakub@redhat.com>
 
 	* Make-lang.in: Don't cat ../stage_current if it does not exist.
diff --git a/gcc/c/c-parser.c b/gcc/c/c-parser.c
index 7f491f1dc06..1a50dea228b 100644
--- a/gcc/c/c-parser.c
+++ b/gcc/c/c-parser.c
@@ -1358,11 +1358,11 @@ static tree c_parser_omp_for_loop (location_t, c_parser *, enum tree_code,
 static void c_parser_omp_taskwait (c_parser *);
 static void c_parser_omp_taskyield (c_parser *);
 static void c_parser_omp_cancel (c_parser *);
-static void c_parser_omp_cancellation_point (c_parser *);
 
 enum pragma_context { pragma_external, pragma_struct, pragma_param,
 		      pragma_stmt, pragma_compound };
 static bool c_parser_pragma (c_parser *, enum pragma_context, bool *);
+static void c_parser_omp_cancellation_point (c_parser *, enum pragma_context);
 static bool c_parser_omp_target (c_parser *, enum pragma_context, bool *);
 static void c_parser_omp_end_declare_target (c_parser *);
 static void c_parser_omp_declare (c_parser *, enum pragma_context);
@@ -10187,14 +10187,7 @@ c_parser_pragma (c_parser *parser, enum pragma_context context, bool *if_p)
       return false;
 
     case PRAGMA_OMP_CANCELLATION_POINT:
-      if (context != pragma_compound)
-	{
-	  if (context == pragma_stmt)
-	    c_parser_error (parser, "%<#pragma omp cancellation point%> may "
-				    "only be used in compound statements");
-	  goto bad_stmt;
-	}
-      c_parser_omp_cancellation_point (parser);
+      c_parser_omp_cancellation_point (parser, context);
       return false;
 
     case PRAGMA_OMP_THREADPRIVATE:
@@ -10215,7 +10208,7 @@ c_parser_pragma (c_parser *parser, enum pragma_context context, bool *if_p)
       c_parser_skip_until_found (parser, CPP_PRAGMA_EOL, NULL);
       return false;
 
-    case PRAGMA_OMP_DECLARE_REDUCTION:
+    case PRAGMA_OMP_DECLARE:
       c_parser_omp_declare (parser, context);
       return false;
 
@@ -15668,7 +15661,7 @@ c_parser_omp_cancel (c_parser *parser)
 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_TASKGROUP))
 
 static void
-c_parser_omp_cancellation_point (c_parser *parser)
+c_parser_omp_cancellation_point (c_parser *parser, enum pragma_context context)
 {
   location_t loc = c_parser_peek_token (parser)->location;
   tree clauses;
@@ -15691,6 +15684,17 @@ c_parser_omp_cancellation_point (c_parser *parser)
       return;
     }
 
+  if (context != pragma_compound)
+    {
+      if (context == pragma_stmt)
+	error_at (loc, "%<#pragma omp cancellation point%> may only be used in"
+		  " compound statements");
+      else
+	c_parser_error (parser, "expected declaration specifiers");
+      c_parser_skip_to_pragma_eol (parser, false);
+      return;
+    }
+
   clauses
     = c_parser_omp_all_clauses (parser, OMP_CANCELLATION_POINT_CLAUSE_MASK,
 				"#pragma omp cancellation point");
@@ -16381,7 +16385,7 @@ c_parser_omp_declare_simd (c_parser *parser, enum pragma_context context)
   while (c_parser_next_token_is (parser, CPP_PRAGMA))
     {
       if (c_parser_peek_token (parser)->pragma_kind
-	  != PRAGMA_OMP_DECLARE_REDUCTION
+	  != PRAGMA_OMP_DECLARE
 	  || c_parser_peek_2nd_token (parser)->type != CPP_NAME
 	  || strcmp (IDENTIFIER_POINTER
 				(c_parser_peek_2nd_token (parser)->value),
diff --git a/gcc/c/c-typeck.c b/gcc/c/c-typeck.c
index 7c6241c22d6..bafd0d23195 100644
--- a/gcc/c/c-typeck.c
+++ b/gcc/c/c-typeck.c
@@ -1896,6 +1896,7 @@ mark_exp_read (tree exp)
     case IMAGPART_EXPR:
     CASE_CONVERT:
     case ADDR_EXPR:
+    case VIEW_CONVERT_EXPR:
       mark_exp_read (TREE_OPERAND (exp, 0));
       break;
     case COMPOUND_EXPR:
@@ -8754,6 +8755,22 @@ output_init_element (location_t loc, tree value, tree origtype,
   if (!maybe_const)
     constructor_nonconst = 1;
 
+  /* Digest the initializer and issue any errors about incompatible
+     types before issuing errors about non-constant initializers.  */
+  tree new_value = value;
+  if (semantic_type)
+    new_value = build1 (EXCESS_PRECISION_EXPR, semantic_type, value);
+  new_value = digest_init (loc, type, new_value, origtype, npc, strict_string,
+			   require_constant_value);
+  if (new_value == error_mark_node)
+    {
+      constructor_erroneous = 1;
+      return;
+    }
+  if (require_constant_value || require_constant_elements)
+    constant_expression_warning (new_value);
+
+  /* Proceed to check the constness of the original initializer.  */
   if (!initializer_constant_valid_p (value, TREE_TYPE (value)))
     {
       if (require_constant_value)
@@ -8798,17 +8815,8 @@ output_init_element (location_t loc, tree value, tree origtype,
 		  || DECL_CHAIN (field)))))
     return;
 
-  if (semantic_type)
-    value = build1 (EXCESS_PRECISION_EXPR, semantic_type, value);
-  value = digest_init (loc, type, value, origtype, npc, strict_string,
-		       require_constant_value);
-  if (value == error_mark_node)
-    {
-      constructor_erroneous = 1;
-      return;
-    }
-  if (require_constant_value || require_constant_elements)
-    constant_expression_warning (value);
+  /* Finally, set VALUE to the initializer value digested above.  */
+  value = new_value;
 
   /* If this element doesn't come next in sequence,
      put it on constructor_pending_elts.  */
@@ -11926,7 +11934,7 @@ c_finish_omp_cancel (location_t loc, tree clauses)
     mask = 8;
   else
     {
-      error_at (loc, "%<#pragma omp cancel must specify one of "
+      error_at (loc, "%<#pragma omp cancel%> must specify one of "
 		     "%<parallel%>, %<for%>, %<sections%> or %<taskgroup%> "
 		     "clauses");
       return;
@@ -11965,7 +11973,7 @@ c_finish_omp_cancellation_point (location_t loc, tree clauses)
     mask = 8;
   else
     {
-      error_at (loc, "%<#pragma omp cancellation point must specify one of "
+      error_at (loc, "%<#pragma omp cancellation point%> must specify one of "
 		     "%<parallel%>, %<for%>, %<sections%> or %<taskgroup%> "
 		     "clauses");
       return;
@@ -13669,7 +13677,8 @@ c_build_qualified_type (tree type, int type_quals, tree orig_qual_type,
 		   : build_qualified_type (type, type_quals));
   /* A variant type does not inherit the list of incomplete vars from the
      type main variant.  */
-  if (RECORD_OR_UNION_TYPE_P (var_type))
+  if (RECORD_OR_UNION_TYPE_P (var_type)
+      && TYPE_MAIN_VARIANT (var_type) != var_type)
     C_TYPE_INCOMPLETE_VARS (var_type) = 0;
   return var_type;
 }
diff --git a/gcc/common.opt b/gcc/common.opt
index 5d90385eaea..a7c5125bf08 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2221,19 +2221,19 @@ Common RejectNegative Joined Var(common_deferred_options) Defer
 -fstack-limit-symbol=<name>	Trap if the stack goes past symbol <name>.
 
 fstack-protector
-Common Report Var(flag_stack_protect, 1) Init(-1)
+Common Report Var(flag_stack_protect, 1) Init(-1) Optimization
 Use propolice as a stack protection method.
 
 fstack-protector-all
-Common Report RejectNegative Var(flag_stack_protect, 2) Init(-1)
+Common Report RejectNegative Var(flag_stack_protect, 2) Init(-1) Optimization
 Use a stack protection method for every function.
 
 fstack-protector-strong
-Common Report RejectNegative Var(flag_stack_protect, 3) Init(-1)
+Common Report RejectNegative Var(flag_stack_protect, 3) Init(-1) Optimization
 Use a smart stack protection method for certain functions.
 
 fstack-protector-explicit
-Common Report RejectNegative Var(flag_stack_protect, 4)
+Common Report RejectNegative Var(flag_stack_protect, 4) Optimization
 Use stack protection method only for functions with the stack_protect attribute.
 
 fstack-usage
diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
index 1e9d90b1b66..7dcf140411f 100644
--- a/gcc/config/aarch64/aarch64-arches.def
+++ b/gcc/config/aarch64/aarch64-arches.def
@@ -32,4 +32,5 @@
 
 AARCH64_ARCH("armv8-a",	      generic,	     8A,	8,  AARCH64_FL_FOR_ARCH8)
 AARCH64_ARCH("armv8.1-a",     generic,	     8_1A,	8,  AARCH64_FL_FOR_ARCH8_1)
+AARCH64_ARCH("armv8.2-a",     generic,	     8_2A,	8,  AARCH64_FL_FOR_ARCH8_2)
 
diff --git a/gcc/config/aarch64/aarch64-c.c b/gcc/config/aarch64/aarch64-c.c
index e64dc7676cc..3380ed6f2cd 100644
--- a/gcc/config/aarch64/aarch64-c.c
+++ b/gcc/config/aarch64/aarch64-c.c
@@ -95,6 +95,11 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
   else
     cpp_undef (pfile, "__ARM_FP");
 
+  aarch64_def_or_undef (TARGET_FP_F16INST,
+			"__ARM_FEATURE_FP16_SCALAR_ARITHMETIC", pfile);
+  aarch64_def_or_undef (TARGET_SIMD_F16INST,
+			"__ARM_FEATURE_FP16_VECTOR_ARITHMETIC", pfile);
+
   aarch64_def_or_undef (TARGET_SIMD, "__ARM_FEATURE_NUMERIC_MAXMIN", pfile);
   aarch64_def_or_undef (TARGET_SIMD, "__ARM_NEON", pfile);
 
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 329f8f9a945..c4b31186bed 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -46,7 +46,7 @@ AARCH64_CORE("cortex-a57",  cortexa57, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AA
 AARCH64_CORE("cortex-a72",  cortexa72, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08")
 AARCH64_CORE("cortex-a73",  cortexa73, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, "0x41", "0xd09")
 AARCH64_CORE("exynos-m1",   exynosm1,  exynosm1,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1,  "0x53", "0x001")
-AARCH64_CORE("qdf24xx",     qdf24xx,   cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x51", "0x800")
+AARCH64_CORE("qdf24xx",     qdf24xx,   cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx,   "0x51", "0x800")
 AARCH64_CORE("thunderx",    thunderx,  thunderx,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx,  "0x43", "0x0a1")
 AARCH64_CORE("xgene1",      xgene1,    xgene1,    8A,  AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000")
 
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index e8706d1c2e7..a10ccf2254c 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -39,8 +39,8 @@
    that are required.  Their order is not important.  */
 
 /* Enabling "fp" just enables "fp".
-   Disabling "fp" also disables "simd", "crypto".  */
-AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, 0, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO, "fp")
+   Disabling "fp" also disables "simd", "crypto" and "fp16".  */
+AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, 0, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO | AARCH64_FL_F16, "fp")
 
 /* Enabling "simd" also enables "fp".
    Disabling "simd" also disables "crypto".  */
@@ -55,3 +55,7 @@ AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, 0, 0, "crc32")
 
 /* Enabling or disabling "lse" only changes "lse".  */
 AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, 0, 0, "atomics")
+
+/* Enabling "fp16" also enables "fp".
+   Disabling "fp16" just disables "fp16".  */
+AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, 0, "fp16")
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 02d465b8a08..f1ad325f464 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -244,13 +244,17 @@
   /* Implemented by <maxmin><mode>3.
      smax variants map to fmaxnm,
      smax_nan variants map to fmax.  */
-  BUILTIN_VDQIF (BINOP, smax, 3)
-  BUILTIN_VDQIF (BINOP, smin, 3)
+  BUILTIN_VDQ_BHSI (BINOP, smax, 3)
+  BUILTIN_VDQ_BHSI (BINOP, smin, 3)
   BUILTIN_VDQ_BHSI (BINOP, umax, 3)
   BUILTIN_VDQ_BHSI (BINOP, umin, 3)
   BUILTIN_VDQF (BINOP, smax_nan, 3)
   BUILTIN_VDQF (BINOP, smin_nan, 3)
 
+  /* Implemented by <fmaxmin><mode>3.  */
+  BUILTIN_VDQF (BINOP, fmax, 3)
+  BUILTIN_VDQF (BINOP, fmin, 3)
+
   /* Implemented by aarch64_<maxmin_uns>p<mode>.  */
   BUILTIN_VDQ_BHSI (BINOP, smaxp, 0)
   BUILTIN_VDQ_BHSI (BINOP, sminp, 0)
@@ -432,7 +436,7 @@
   VAR1 (TERNOP, qtbx4, 0, v8qi)
   VAR1 (TERNOP, qtbx4, 0, v16qi)
 
-  /* Builtins for ARMv8.1 Adv.SIMD instructions.  */
+  /* Builtins for ARMv8.1-A Adv.SIMD instructions.  */
 
   /* Implemented by aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>.  */
   BUILTIN_VSDQ_HSI (TERNOP, sqrdmlah, 0)
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 3f8289cf7dc..a19d1711b5b 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -546,6 +546,49 @@
   [(set_attr "type" "neon_from_gp<q>, neon_ins<q>, neon_load1_1reg<q>")]
 )
 
+(define_insn "*aarch64_simd_vec_copy_lane<mode>"
+  [(set (match_operand:VALL 0 "register_operand" "=w")
+	(vec_merge:VALL
+	    (vec_duplicate:VALL
+	      (vec_select:<VEL>
+		(match_operand:VALL 3 "register_operand" "w")
+		(parallel
+		  [(match_operand:SI 4 "immediate_operand" "i")])))
+	    (match_operand:VALL 1 "register_operand" "0")
+	    (match_operand:SI 2 "immediate_operand" "i")))]
+  "TARGET_SIMD"
+  {
+    int elt = ENDIAN_LANE_N (<MODE>mode, exact_log2 (INTVAL (operands[2])));
+    operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
+    operands[4] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[4])));
+
+    return "ins\t%0.<Vetype>[%p2], %3.<Vetype>[%4]";
+  }
+  [(set_attr "type" "neon_ins<q>")]
+)
+
+(define_insn "*aarch64_simd_vec_copy_lane_<vswap_width_name><mode>"
+  [(set (match_operand:VALL 0 "register_operand" "=w")
+	(vec_merge:VALL
+	    (vec_duplicate:VALL
+	      (vec_select:<VEL>
+		(match_operand:<VSWAP_WIDTH> 3 "register_operand" "w")
+		(parallel
+		  [(match_operand:SI 4 "immediate_operand" "i")])))
+	    (match_operand:VALL 1 "register_operand" "0")
+	    (match_operand:SI 2 "immediate_operand" "i")))]
+  "TARGET_SIMD"
+  {
+    int elt = ENDIAN_LANE_N (<MODE>mode, exact_log2 (INTVAL (operands[2])));
+    operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
+    operands[4] = GEN_INT (ENDIAN_LANE_N (<VSWAP_WIDTH>mode,
+			   INTVAL (operands[4])));
+
+    return "ins\t%0.<Vetype>[%p2], %3.<Vetype>[%4]";
+  }
+  [(set_attr "type" "neon_ins<q>")]
+)
+
 (define_insn "aarch64_simd_lshr<mode>"
  [(set (match_operand:VDQ_I 0 "register_operand" "=w")
        (lshiftrt:VDQ_I (match_operand:VDQ_I 1 "register_operand" "w")
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 7617f9fb273..512ef10d158 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -250,6 +250,22 @@ static const struct cpu_addrcost_table xgene1_addrcost_table =
   0, /* imm_offset  */
 };
 
+static const struct cpu_addrcost_table qdf24xx_addrcost_table =
+{
+    {
+      1, /* hi  */
+      0, /* si  */
+      0, /* di  */
+      1, /* ti  */
+    },
+  0, /* pre_modify  */
+  0, /* post_modify  */
+  0, /* register_offset  */
+  0, /* register_sextend  */
+  0, /* register_zextend  */
+  0 /* imm_offset  */
+};
+
 static const struct cpu_regmove_cost generic_regmove_cost =
 {
   1, /* GP2GP  */
@@ -308,6 +324,15 @@ static const struct cpu_regmove_cost xgene1_regmove_cost =
   2 /* FP2FP  */
 };
 
+static const struct cpu_regmove_cost qdf24xx_regmove_cost =
+{
+  2, /* GP2GP  */
+  /* Avoid the use of int<->fp moves for spilling.  */
+  6, /* GP2FP  */
+  6, /* FP2GP  */
+  4 /* FP2FP  */
+};
+
 /* Generic costs for vector insn classes.  */
 static const struct cpu_vector_cost generic_vector_cost =
 {
@@ -448,15 +473,15 @@ static const struct tune_params cortexa35_tunings =
   &generic_addrcost_table,
   &cortexa53_regmove_cost,
   &generic_vector_cost,
-  &generic_branch_cost,
+  &cortexa57_branch_cost,
   &generic_approx_modes,
   4, /* memmov_cost  */
   1, /* issue_rate  */
-  (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
+  (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
    | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
-  8,	/* function_align.  */
+  16,	/* function_align.  */
   8,	/* jump_align.  */
-  4,	/* loop_align.  */
+  8,	/* loop_align.  */
   2,	/* int_reassoc_width.  */
   4,	/* fp_reassoc_width.  */
   1,	/* vec_reassoc_width.  */
@@ -474,15 +499,15 @@ static const struct tune_params cortexa53_tunings =
   &generic_addrcost_table,
   &cortexa53_regmove_cost,
   &generic_vector_cost,
-  &generic_branch_cost,
+  &cortexa57_branch_cost,
   &generic_approx_modes,
   4, /* memmov_cost  */
   2, /* issue_rate  */
   (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
    | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
-  8,	/* function_align.  */
+  16,	/* function_align.  */
   8,	/* jump_align.  */
-  4,	/* loop_align.  */
+  8,	/* loop_align.  */
   2,	/* int_reassoc_width.  */
   4,	/* fp_reassoc_width.  */
   1,	/* vec_reassoc_width.  */
@@ -508,7 +533,7 @@ static const struct tune_params cortexa57_tunings =
    | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops  */
   16,	/* function_align.  */
   8,	/* jump_align.  */
-  4,	/* loop_align.  */
+  8,	/* loop_align.  */
   2,	/* int_reassoc_width.  */
   4,	/* fp_reassoc_width.  */
   1,	/* vec_reassoc_width.  */
@@ -526,7 +551,7 @@ static const struct tune_params cortexa72_tunings =
   &cortexa57_addrcost_table,
   &cortexa57_regmove_cost,
   &cortexa57_vector_cost,
-  &generic_branch_cost,
+  &cortexa57_branch_cost,
   &generic_approx_modes,
   4, /* memmov_cost  */
   3, /* issue_rate  */
@@ -534,7 +559,7 @@ static const struct tune_params cortexa72_tunings =
    | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops  */
   16,	/* function_align.  */
   8,	/* jump_align.  */
-  4,	/* loop_align.  */
+  8,	/* loop_align.  */
   2,	/* int_reassoc_width.  */
   4,	/* fp_reassoc_width.  */
   1,	/* vec_reassoc_width.  */
@@ -542,7 +567,7 @@ static const struct tune_params cortexa72_tunings =
   2,	/* min_div_recip_mul_df.  */
   0,	/* max_case_values.  */
   0,	/* cache_line_size.  */
-  tune_params::AUTOPREFETCHER_OFF,	/* autoprefetcher_model.  */
+  tune_params::AUTOPREFETCHER_WEAK,	/* autoprefetcher_model.  */
   (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
 };
 
@@ -552,7 +577,7 @@ static const struct tune_params cortexa73_tunings =
   &cortexa57_addrcost_table,
   &cortexa57_regmove_cost,
   &cortexa57_vector_cost,
-  &generic_branch_cost,
+  &cortexa57_branch_cost,
   &generic_approx_modes,
   4, /* memmov_cost.  */
   2, /* issue_rate.  */
@@ -560,7 +585,7 @@ static const struct tune_params cortexa73_tunings =
    | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
   16,	/* function_align.  */
   8,	/* jump_align.  */
-  4,	/* loop_align.  */
+  8,	/* loop_align.  */
   2,	/* int_reassoc_width.  */
   4,	/* fp_reassoc_width.  */
   1,	/* vec_reassoc_width.  */
@@ -647,6 +672,32 @@ static const struct tune_params xgene1_tunings =
   (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
 };
 
+static const struct tune_params qdf24xx_tunings =
+{
+  &qdf24xx_extra_costs,
+  &qdf24xx_addrcost_table,
+  &qdf24xx_regmove_cost,
+  &generic_vector_cost,
+  &generic_branch_cost,
+  &generic_approx_modes,
+  4, /* memmov_cost  */
+  4, /* issue_rate  */
+  (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
+   | AARCH64_FUSE_MOVK_MOVK), /* fuseable_ops  */
+  16,	/* function_align.  */
+  8,	/* jump_align.  */
+  16,	/* loop_align.  */
+  2,	/* int_reassoc_width.  */
+  4,	/* fp_reassoc_width.  */
+  1,	/* vec_reassoc_width.  */
+  2,	/* min_div_recip_mul_sf.  */
+  2,	/* min_div_recip_mul_df.  */
+  0,	/* max_case_values.  */
+  64,	/* cache_line_size.  */
+  tune_params::AUTOPREFETCHER_STRONG,	/* autoprefetcher_model.  */
+  (AARCH64_EXTRA_TUNE_NONE)		/* tune_flags.  */
+};
+
 /* Support for fine-grained override of the tuning structures.  */
 struct aarch64_tuning_override_function
 {
@@ -9372,15 +9423,18 @@ aarch64_classify_symbol (rtx x, rtx offset)
       switch (aarch64_cmodel)
 	{
 	case AARCH64_CMODEL_TINY:
-	  /* When we retreive symbol + offset address, we have to make sure
+	  /* When we retrieve symbol + offset address, we have to make sure
 	     the offset does not cause overflow of the final address.  But
 	     we have no way of knowing the address of symbol at compile time
 	     so we can't accurately say if the distance between the PC and
 	     symbol + offset is outside the addressible range of +/-1M in the
 	     TINY code model.  So we rely on images not being greater than
 	     1M and cap the offset at 1M and anything beyond 1M will have to
-	     be loaded using an alternative mechanism.  */
-	  if (SYMBOL_REF_WEAK (x)
+	     be loaded using an alternative mechanism.  Furthermore if the
+	     symbol is a weak reference to something that isn't known to
+	     resolve to a symbol in this module, then force to memory.  */
+	  if ((SYMBOL_REF_WEAK (x)
+	       && !aarch64_symbol_binds_local_p (x))
 	      || INTVAL (offset) < -1048575 || INTVAL (offset) > 1048575)
 	    return SYMBOL_FORCE_TO_MEM;
 	  return SYMBOL_TINY_ABSOLUTE;
@@ -9388,7 +9442,8 @@ aarch64_classify_symbol (rtx x, rtx offset)
 	case AARCH64_CMODEL_SMALL:
 	  /* Same reasoning as the tiny code model, but the offset cap here is
 	     4G.  */
-	  if (SYMBOL_REF_WEAK (x)
+	  if ((SYMBOL_REF_WEAK (x)
+	       && !aarch64_symbol_binds_local_p (x))
 	      || !IN_RANGE (INTVAL (offset), HOST_WIDE_INT_C (-4294967263),
 			    HOST_WIDE_INT_C (4294967264)))
 	    return SYMBOL_FORCE_TO_MEM;
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index b15c23f056d..19159802d6b 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -132,9 +132,12 @@ extern unsigned aarch64_architecture_version;
 #define AARCH64_FL_FP         (1 << 1)	/* Has FP.  */
 #define AARCH64_FL_CRYPTO     (1 << 2)	/* Has crypto.  */
 #define AARCH64_FL_CRC        (1 << 3)	/* Has CRC.  */
-/* ARMv8.1 architecture extensions.  */
+/* ARMv8.1-A architecture extensions.  */
 #define AARCH64_FL_LSE	      (1 << 4)  /* Has Large System Extensions.  */
-#define AARCH64_FL_V8_1	      (1 << 5)  /* Has ARMv8.1 extensions.  */
+#define AARCH64_FL_V8_1	      (1 << 5)  /* Has ARMv8.1-A extensions.  */
+/* ARMv8.2-A architecture extensions.  */
+#define AARCH64_FL_V8_2	      (1 << 8)  /* Has ARMv8.2-A features.  */
+#define AARCH64_FL_F16	      (1 << 9)  /* Has ARMv8.2-A FP16 extensions.  */
 
 /* Has FP and SIMD.  */
 #define AARCH64_FL_FPSIMD     (AARCH64_FL_FP | AARCH64_FL_SIMD)
@@ -146,6 +149,8 @@ extern unsigned aarch64_architecture_version;
 #define AARCH64_FL_FOR_ARCH8       (AARCH64_FL_FPSIMD)
 #define AARCH64_FL_FOR_ARCH8_1			       \
   (AARCH64_FL_FOR_ARCH8 | AARCH64_FL_LSE | AARCH64_FL_CRC | AARCH64_FL_V8_1)
+#define AARCH64_FL_FOR_ARCH8_2			\
+  (AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_V8_2)
 
 /* Macros to test ISA flags.  */
 
@@ -155,6 +160,8 @@ extern unsigned aarch64_architecture_version;
 #define AARCH64_ISA_SIMD           (aarch64_isa_flags & AARCH64_FL_SIMD)
 #define AARCH64_ISA_LSE		   (aarch64_isa_flags & AARCH64_FL_LSE)
 #define AARCH64_ISA_RDMA	   (aarch64_isa_flags & AARCH64_FL_V8_1)
+#define AARCH64_ISA_V8_2	   (aarch64_isa_flags & AARCH64_FL_V8_2)
+#define AARCH64_ISA_F16		   (aarch64_isa_flags & AARCH64_FL_F16)
 
 /* Crypto is an optional extension to AdvSIMD.  */
 #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
@@ -165,6 +172,10 @@ extern unsigned aarch64_architecture_version;
 /* Atomic instructions that can be enabled through the +lse extension.  */
 #define TARGET_LSE (AARCH64_ISA_LSE)
 
+/* ARMv8.2-A FP16 support that can be enabled through the +fp16 extension.  */
+#define TARGET_FP_F16INST (TARGET_FLOAT && AARCH64_ISA_F16)
+#define TARGET_SIMD_F16INST (TARGET_SIMD && AARCH64_ISA_F16)
+
 /* Make sure this is always defined so we don't have to check for ifdefs
    but rather use normal ifs.  */
 #ifndef TARGET_FIX_ERR_A53_835769_DEFAULT
@@ -193,7 +204,7 @@ extern unsigned aarch64_architecture_version;
   ((aarch64_fix_a53_err843419 == 2)	\
   ? TARGET_FIX_ERR_A53_843419_DEFAULT : aarch64_fix_a53_err843419)
 
-/* ARMv8.1 Adv.SIMD support.  */
+/* ARMv8.1-A Adv.SIMD support.  */
 #define TARGET_SIMD_RDMA (TARGET_SIMD && AARCH64_ISA_RDMA)
 
 /* Standard register usage.  */
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index ebf6fa2b63e..b0ab1d33d37 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -5814,162 +5814,6 @@ vaddlvq_u32 (uint32x4_t a)
   return result;
 }
 
-#define vcopyq_lane_f32(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       float32x4_t c_ = (c);                                            \
-       float32x4_t a_ = (a);                                            \
-       float32x4_t result;                                              \
-       __asm__ ("ins %0.s[%2], %3.s[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_f64(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       float64x2_t c_ = (c);                                            \
-       float64x2_t a_ = (a);                                            \
-       float64x2_t result;                                              \
-       __asm__ ("ins %0.d[%2], %3.d[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_p8(a, b, c, d)                                      \
-  __extension__                                                         \
-    ({                                                                  \
-       poly8x16_t c_ = (c);                                             \
-       poly8x16_t a_ = (a);                                             \
-       poly8x16_t result;                                               \
-       __asm__ ("ins %0.b[%2], %3.b[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_p16(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       poly16x8_t c_ = (c);                                             \
-       poly16x8_t a_ = (a);                                             \
-       poly16x8_t result;                                               \
-       __asm__ ("ins %0.h[%2], %3.h[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_s8(a, b, c, d)                                      \
-  __extension__                                                         \
-    ({                                                                  \
-       int8x16_t c_ = (c);                                              \
-       int8x16_t a_ = (a);                                              \
-       int8x16_t result;                                                \
-       __asm__ ("ins %0.b[%2], %3.b[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_s16(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       int16x8_t c_ = (c);                                              \
-       int16x8_t a_ = (a);                                              \
-       int16x8_t result;                                                \
-       __asm__ ("ins %0.h[%2], %3.h[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_s32(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       int32x4_t c_ = (c);                                              \
-       int32x4_t a_ = (a);                                              \
-       int32x4_t result;                                                \
-       __asm__ ("ins %0.s[%2], %3.s[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_s64(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       int64x2_t c_ = (c);                                              \
-       int64x2_t a_ = (a);                                              \
-       int64x2_t result;                                                \
-       __asm__ ("ins %0.d[%2], %3.d[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_u8(a, b, c, d)                                      \
-  __extension__                                                         \
-    ({                                                                  \
-       uint8x16_t c_ = (c);                                             \
-       uint8x16_t a_ = (a);                                             \
-       uint8x16_t result;                                               \
-       __asm__ ("ins %0.b[%2], %3.b[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_u16(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       uint16x8_t c_ = (c);                                             \
-       uint16x8_t a_ = (a);                                             \
-       uint16x8_t result;                                               \
-       __asm__ ("ins %0.h[%2], %3.h[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_u32(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       uint32x4_t c_ = (c);                                             \
-       uint32x4_t a_ = (a);                                             \
-       uint32x4_t result;                                               \
-       __asm__ ("ins %0.s[%2], %3.s[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
-#define vcopyq_lane_u64(a, b, c, d)                                     \
-  __extension__                                                         \
-    ({                                                                  \
-       uint64x2_t c_ = (c);                                             \
-       uint64x2_t a_ = (a);                                             \
-       uint64x2_t result;                                               \
-       __asm__ ("ins %0.d[%2], %3.d[%4]"                                \
-                : "=w"(result)                                          \
-                : "0"(a_), "i"(b), "w"(c_), "i"(d)                      \
-                : /* No clobbers */);                                   \
-       result;                                                          \
-     })
-
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vcvtx_f32_f64 (float64x2_t a)
 {
@@ -10516,7 +10360,7 @@ vbslq_u64 (uint64x2_t __a, uint64x2_t __b, uint64x2_t __c)
   return __builtin_aarch64_simd_bslv2di_uuuu (__a, __b, __c);
 }
 
-/* ARMv8.1 instrinsics.  */
+/* ARMv8.1-A instrinsics.  */
 #pragma GCC push_options
 #pragma GCC target ("arch=armv8.1-a")
 
@@ -12356,6 +12200,398 @@ vcntq_u8 (uint8x16_t __a)
   return (uint8x16_t) __builtin_aarch64_popcountv16qi ((int8x16_t) __a);
 }
 
+/* vcopy_lane.  */
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcopy_lane_f32 (float32x2_t __a, const int __lane1,
+		float32x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
+vcopy_lane_f64 (float64x1_t __a, const int __lane1,
+		float64x1_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vcopy_lane_p8 (poly8x8_t __a, const int __lane1,
+	       poly8x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				 __a, __lane1);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vcopy_lane_p16 (poly16x4_t __a, const int __lane1,
+		poly16x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcopy_lane_s8 (int8x8_t __a, const int __lane1,
+	       int8x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				 __a, __lane1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vcopy_lane_s16 (int16x4_t __a, const int __lane1,
+		int16x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcopy_lane_s32 (int32x2_t __a, const int __lane1,
+		int32x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vcopy_lane_s64 (int64x1_t __a, const int __lane1,
+		int64x1_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcopy_lane_u8 (uint8x8_t __a, const int __lane1,
+	       uint8x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				 __a, __lane1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcopy_lane_u16 (uint16x4_t __a, const int __lane1,
+		uint16x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcopy_lane_u32 (uint32x2_t __a, const int __lane1,
+		uint32x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vcopy_lane_u64 (uint64x1_t __a, const int __lane1,
+		uint64x1_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+/* vcopy_laneq.  */
+
+__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+vcopy_laneq_f32 (float32x2_t __a, const int __lane1,
+		 float32x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
+vcopy_laneq_f64 (float64x1_t __a, const int __lane1,
+		 float64x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vcopy_laneq_p8 (poly8x8_t __a, const int __lane1,
+		poly8x16_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				 __a, __lane1);
+}
+
+__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+vcopy_laneq_p16 (poly16x4_t __a, const int __lane1,
+		 poly16x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vcopy_laneq_s8 (int8x8_t __a, const int __lane1,
+		int8x16_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				 __a, __lane1);
+}
+
+__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+vcopy_laneq_s16 (int16x4_t __a, const int __lane1,
+		 int16x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcopy_laneq_s32 (int32x2_t __a, const int __lane1,
+		 int32x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+vcopy_laneq_s64 (int64x1_t __a, const int __lane1,
+		 int64x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vcopy_laneq_u8 (uint8x8_t __a, const int __lane1,
+		uint8x16_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				 __a, __lane1);
+}
+
+__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+vcopy_laneq_u16 (uint16x4_t __a, const int __lane1,
+		 uint16x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcopy_laneq_u32 (uint32x2_t __a, const int __lane1,
+		 uint32x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+vcopy_laneq_u64 (uint64x1_t __a, const int __lane1,
+		 uint64x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+/* vcopyq_lane.  */
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcopyq_lane_f32 (float32x4_t __a, const int __lane1,
+		 float32x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
+vcopyq_lane_f64 (float64x2_t __a, const int __lane1,
+		 float64x1_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vcopyq_lane_p8 (poly8x16_t __a, const int __lane1,
+		poly8x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vcopyq_lane_p16 (poly16x8_t __a, const int __lane1,
+		 poly16x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vcopyq_lane_s8 (int8x16_t __a, const int __lane1,
+		int8x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vcopyq_lane_s16 (int16x8_t __a, const int __lane1,
+		 int16x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcopyq_lane_s32 (int32x4_t __a, const int __lane1,
+		 int32x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vcopyq_lane_s64 (int64x2_t __a, const int __lane1,
+		 int64x1_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcopyq_lane_u8 (uint8x16_t __a, const int __lane1,
+		uint8x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcopyq_lane_u16 (uint16x8_t __a, const int __lane1,
+		 uint16x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcopyq_lane_u32 (uint32x4_t __a, const int __lane1,
+		 uint32x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vcopyq_lane_u64 (uint64x2_t __a, const int __lane1,
+		 uint64x1_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+/* vcopyq_laneq.  */
+
+__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+vcopyq_laneq_f32 (float32x4_t __a, const int __lane1,
+		  float32x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
+vcopyq_laneq_f64 (float64x2_t __a, const int __lane1,
+		  float64x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vcopyq_laneq_p8 (poly8x16_t __a, const int __lane1,
+		 poly8x16_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+vcopyq_laneq_p16 (poly16x8_t __a, const int __lane1,
+		  poly16x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vcopyq_laneq_s8 (int8x16_t __a, const int __lane1,
+		 int8x16_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+vcopyq_laneq_s16 (int16x8_t __a, const int __lane1,
+		  int16x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcopyq_laneq_s32 (int32x4_t __a, const int __lane1,
+		  int32x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+vcopyq_laneq_s64 (int64x2_t __a, const int __lane1,
+		  int64x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vcopyq_laneq_u8 (uint8x16_t __a, const int __lane1,
+		 uint8x16_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				  __a, __lane1);
+}
+
+__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+vcopyq_laneq_u16 (uint16x8_t __a, const int __lane1,
+		  uint16x8_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcopyq_laneq_u32 (uint32x4_t __a, const int __lane1,
+		  uint32x4_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
+__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+vcopyq_laneq_u64 (uint64x2_t __a, const int __lane1,
+		  uint64x2_t __b, const int __lane2)
+{
+  return __aarch64_vset_lane_any (__aarch64_vget_lane_any (__b, __lane2),
+				   __a, __lane1);
+}
+
 /* vcvt (double -> float).  */
 
 __extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
@@ -17352,19 +17588,19 @@ vpminnms_f32 (float32x2_t a)
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vmaxnm_f32 (float32x2_t __a, float32x2_t __b)
 {
-  return __builtin_aarch64_smaxv2sf (__a, __b);
+  return __builtin_aarch64_fmaxv2sf (__a, __b);
 }
 
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vmaxnmq_f32 (float32x4_t __a, float32x4_t __b)
 {
-  return __builtin_aarch64_smaxv4sf (__a, __b);
+  return __builtin_aarch64_fmaxv4sf (__a, __b);
 }
 
 __extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
 vmaxnmq_f64 (float64x2_t __a, float64x2_t __b)
 {
-  return __builtin_aarch64_smaxv2df (__a, __b);
+  return __builtin_aarch64_fmaxv2df (__a, __b);
 }
 
 /* vmaxv  */
@@ -17582,19 +17818,19 @@ vminq_u32 (uint32x4_t __a, uint32x4_t __b)
 __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
 vminnm_f32 (float32x2_t __a, float32x2_t __b)
 {
-  return __builtin_aarch64_sminv2sf (__a, __b);
+  return __builtin_aarch64_fminv2sf (__a, __b);
 }
 
 __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
 vminnmq_f32 (float32x4_t __a, float32x4_t __b)
 {
-  return __builtin_aarch64_sminv4sf (__a, __b);
+  return __builtin_aarch64_fminv4sf (__a, __b);
 }
 
 __extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
 vminnmq_f64 (float64x2_t __a, float64x2_t __b)
 {
-  return __builtin_aarch64_sminv2df (__a, __b);
+  return __builtin_aarch64_fminv2df (__a, __b);
 }
 
 /* vminv  */
diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md
index 3b65b4b238f..d84339db2a8 100644
--- a/gcc/config/aarch64/atomics.md
+++ b/gcc/config/aarch64/atomics.md
@@ -583,7 +583,7 @@
   }
 )
 
-;; ARMv8.1 LSE instructions.
+;; ARMv8.1-A LSE instructions.
 
 ;; Atomic swap with memory.
 (define_insn "aarch64_atomic_swp<mode>"
diff --git a/gcc/config/arm/aarch-cost-tables.h b/gcc/config/arm/aarch-cost-tables.h
index 8bcfcb4b934..b30c84f1656 100644
--- a/gcc/config/arm/aarch-cost-tables.h
+++ b/gcc/config/arm/aarch-cost-tables.h
@@ -537,4 +537,107 @@ const struct cpu_cost_table xgene1_extra_costs =
   }
 };
 
+const struct cpu_cost_table qdf24xx_extra_costs =
+{
+  /* ALU */
+  {
+    0,                 /* arith.  */
+    0,                 /* logical.  */
+    0,                 /* shift.  */
+    0,                 /* shift_reg.  */
+    COSTS_N_INSNS (1), /* arith_shift.  */
+    COSTS_N_INSNS (1), /* arith_shift_reg.  */
+    0,                 /* log_shift.  */
+    0,                 /* log_shift_reg.  */
+    0,                 /* extend.  */
+    0,                 /* extend_arith.  */
+    0,                 /* bfi.  */
+    0,                 /* bfx.  */
+    0,                 /* clz.  */
+    0,	               /* rev.  */
+    0,                 /* non_exec.  */
+    true               /* non_exec_costs_exec.  */
+  },
+  {
+    /* MULT SImode */
+    {
+      COSTS_N_INSNS (2),       /* simple.  */
+      COSTS_N_INSNS (2),       /* flag_setting.  */
+      COSTS_N_INSNS (2),       /* extend.  */
+      COSTS_N_INSNS (2),       /* add.  */
+      COSTS_N_INSNS (2),       /* extend_add.  */
+      COSTS_N_INSNS (4)       /* idiv.  */
+    },
+    /* MULT DImode */
+    {
+      COSTS_N_INSNS (3),       /* simple.  */
+      0,                       /* flag_setting (N/A).  */
+      COSTS_N_INSNS (3),       /* extend.  */
+      COSTS_N_INSNS (3),       /* add.  */
+      COSTS_N_INSNS (3),       /* extend_add.  */
+      COSTS_N_INSNS (9)       /* idiv.  */
+    }
+  },
+  /* LD/ST */
+  {
+    COSTS_N_INSNS (2),         /* load.  */
+    COSTS_N_INSNS (2),         /* load_sign_extend.  */
+    COSTS_N_INSNS (2),         /* ldrd.  */
+    COSTS_N_INSNS (2),         /* ldm_1st.  */
+    1,                         /* ldm_regs_per_insn_1st.  */
+    2,                         /* ldm_regs_per_insn_subsequent.  */
+    COSTS_N_INSNS (2),         /* loadf.  */
+    COSTS_N_INSNS (2),         /* loadd.  */
+    COSTS_N_INSNS (3),         /* load_unaligned.  */
+    0,                         /* store.  */
+    0,                         /* strd.  */
+    0,                         /* stm_1st.  */
+    1,                         /* stm_regs_per_insn_1st.  */
+    2,                         /* stm_regs_per_insn_subsequent.  */
+    0,                         /* storef.  */
+    0,                         /* stored.  */
+    COSTS_N_INSNS (1),         /* store_unaligned.  */
+    COSTS_N_INSNS (1),         /* loadv.  */
+    COSTS_N_INSNS (1)          /* storev.  */
+  },
+  {
+    /* FP SFmode */
+    {
+      COSTS_N_INSNS (6),      /* div.  */
+      COSTS_N_INSNS (5),       /* mult.  */
+      COSTS_N_INSNS (5),       /* mult_addsub. */
+      COSTS_N_INSNS (5),       /* fma.  */
+      COSTS_N_INSNS (3),       /* addsub.  */
+      COSTS_N_INSNS (1),       /* fpconst. */
+      COSTS_N_INSNS (1),       /* neg.  */
+      COSTS_N_INSNS (2),       /* compare.  */
+      COSTS_N_INSNS (4),       /* widen.  */
+      COSTS_N_INSNS (4),       /* narrow.  */
+      COSTS_N_INSNS (4),       /* toint.  */
+      COSTS_N_INSNS (4),       /* fromint.  */
+      COSTS_N_INSNS (2)        /* roundint.  */
+    },
+    /* FP DFmode */
+    {
+      COSTS_N_INSNS (11),      /* div.  */
+      COSTS_N_INSNS (6),       /* mult.  */
+      COSTS_N_INSNS (6),       /* mult_addsub.  */
+      COSTS_N_INSNS (6),       /* fma.  */
+      COSTS_N_INSNS (3),       /* addsub.  */
+      COSTS_N_INSNS (1),       /* fpconst.  */
+      COSTS_N_INSNS (1),       /* neg.  */
+      COSTS_N_INSNS (2),       /* compare.  */
+      COSTS_N_INSNS (4),       /* widen.  */
+      COSTS_N_INSNS (4),       /* narrow.  */
+      COSTS_N_INSNS (4),       /* toint.  */
+      COSTS_N_INSNS (4),       /* fromint.  */
+      COSTS_N_INSNS (2)        /* roundint.  */
+    }
+  },
+  /* Vector */
+  {
+    COSTS_N_INSNS (1)  /* alu.  */
+  }
+};
+
 #endif /* GCC_AARCH_COST_TABLES_H */
diff --git a/gcc/config/arm/arm-arches.def b/gcc/config/arm/arm-arches.def
index fd02b18db01..be46521c9ea 100644
--- a/gcc/config/arm/arm-arches.def
+++ b/gcc/config/arm/arm-arches.def
@@ -62,6 +62,12 @@ ARM_ARCH("armv8.1-a", cortexa53,  8A,
 ARM_ARCH("armv8.1-a+crc",cortexa53, 8A,
 	  ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A,
 			 FL2_FOR_ARCH8_1A))
+ARM_ARCH("armv8-m.base", cortexm0, 8M_BASE,
+	 ARM_FSET_MAKE_CPU1 (			      FL_FOR_ARCH8M_BASE))
+ARM_ARCH("armv8-m.main", cortexm7, 8M_MAIN,
+	 ARM_FSET_MAKE_CPU1(FL_CO_PROC |	      FL_FOR_ARCH8M_MAIN))
+ARM_ARCH("armv8-m.main+dsp", cortexm7, 8M_MAIN,
+	 ARM_FSET_MAKE_CPU1(FL_CO_PROC | FL_ARCH7EM | FL_FOR_ARCH8M_MAIN))
 ARM_ARCH("iwmmxt",  iwmmxt,     5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT))
 ARM_ARCH("iwmmxt2", iwmmxt2,    5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2))
 
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index a53c7d819f5..2072e1e6f8d 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -173,7 +173,7 @@ ARM_CORE("cortex-a57",	cortexa57, cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED
 ARM_CORE("cortex-a72",	cortexa72, cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
 ARM_CORE("cortex-a73",	cortexa73, cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a73)
 ARM_CORE("exynos-m1",	exynosm1,  exynosm1,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), exynosm1)
-ARM_CORE("qdf24xx",	qdf24xx,   cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
+ARM_CORE("qdf24xx",	qdf24xx,   cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), qdf24xx)
 ARM_CORE("xgene1",      xgene1,    xgene1,      8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH8A),            xgene1)
 
 /* V8 big.LITTLE implementations */
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 1ba2ebb630e..49c3a92dba8 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -195,7 +195,6 @@ extern const char *thumb_call_via_reg (rtx);
 extern void thumb_expand_movmemqi (rtx *);
 extern rtx arm_return_addr (int, rtx);
 extern void thumb_reload_out_hi (rtx *);
-extern void thumb_reload_in_hi (rtx *);
 extern void thumb_set_return_address (rtx, rtx);
 extern const char *thumb1_output_casesi (rtx *);
 extern const char *thumb2_output_casesi (rtx *);
@@ -397,31 +396,34 @@ extern bool arm_is_constant_pool_ref (rtx);
 #define FL_TUNE		(FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
 			 | FL_CO_PROC)
 
-#define FL_FOR_ARCH2	FL_NOTM
-#define FL_FOR_ARCH3	(FL_FOR_ARCH2 | FL_MODE32)
-#define FL_FOR_ARCH3M	(FL_FOR_ARCH3 | FL_ARCH3M)
-#define FL_FOR_ARCH4	(FL_FOR_ARCH3M | FL_ARCH4)
-#define FL_FOR_ARCH4T	(FL_FOR_ARCH4 | FL_THUMB)
-#define FL_FOR_ARCH5	(FL_FOR_ARCH4 | FL_ARCH5)
-#define FL_FOR_ARCH5T	(FL_FOR_ARCH5 | FL_THUMB)
-#define FL_FOR_ARCH5E	(FL_FOR_ARCH5 | FL_ARCH5E)
-#define FL_FOR_ARCH5TE	(FL_FOR_ARCH5E | FL_THUMB)
-#define FL_FOR_ARCH5TEJ	FL_FOR_ARCH5TE
-#define FL_FOR_ARCH6	(FL_FOR_ARCH5TE | FL_ARCH6)
-#define FL_FOR_ARCH6J	FL_FOR_ARCH6
-#define FL_FOR_ARCH6K	(FL_FOR_ARCH6 | FL_ARCH6K)
-#define FL_FOR_ARCH6Z	FL_FOR_ARCH6
-#define FL_FOR_ARCH6KZ	(FL_FOR_ARCH6K | FL_ARCH6KZ)
-#define FL_FOR_ARCH6T2	(FL_FOR_ARCH6 | FL_THUMB2)
-#define FL_FOR_ARCH6M	(FL_FOR_ARCH6 & ~FL_NOTM)
-#define FL_FOR_ARCH7	((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
-#define FL_FOR_ARCH7A	(FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
-#define FL_FOR_ARCH7VE	(FL_FOR_ARCH7A | FL_THUMB_DIV | FL_ARM_DIV)
-#define FL_FOR_ARCH7R	(FL_FOR_ARCH7A | FL_THUMB_DIV)
-#define FL_FOR_ARCH7M	(FL_FOR_ARCH7 | FL_THUMB_DIV)
-#define FL_FOR_ARCH7EM  (FL_FOR_ARCH7M | FL_ARCH7EM)
-#define FL_FOR_ARCH8A	(FL_FOR_ARCH7VE | FL_ARCH8)
+#define FL_FOR_ARCH2		FL_NOTM
+#define FL_FOR_ARCH3		(FL_FOR_ARCH2 | FL_MODE32)
+#define FL_FOR_ARCH3M		(FL_FOR_ARCH3 | FL_ARCH3M)
+#define FL_FOR_ARCH4		(FL_FOR_ARCH3M | FL_ARCH4)
+#define FL_FOR_ARCH4T		(FL_FOR_ARCH4 | FL_THUMB)
+#define FL_FOR_ARCH5		(FL_FOR_ARCH4 | FL_ARCH5)
+#define FL_FOR_ARCH5T		(FL_FOR_ARCH5 | FL_THUMB)
+#define FL_FOR_ARCH5E		(FL_FOR_ARCH5 | FL_ARCH5E)
+#define FL_FOR_ARCH5TE		(FL_FOR_ARCH5E | FL_THUMB)
+#define FL_FOR_ARCH5TEJ		FL_FOR_ARCH5TE
+#define FL_FOR_ARCH6		(FL_FOR_ARCH5TE | FL_ARCH6)
+#define FL_FOR_ARCH6J		FL_FOR_ARCH6
+#define FL_FOR_ARCH6K		(FL_FOR_ARCH6 | FL_ARCH6K)
+#define FL_FOR_ARCH6Z		FL_FOR_ARCH6
+#define FL_FOR_ARCH6ZK		FL_FOR_ARCH6K
+#define FL_FOR_ARCH6KZ		(FL_FOR_ARCH6K | FL_ARCH6KZ)
+#define FL_FOR_ARCH6T2		(FL_FOR_ARCH6 | FL_THUMB2)
+#define FL_FOR_ARCH6M		(FL_FOR_ARCH6 & ~FL_NOTM)
+#define FL_FOR_ARCH7		((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
+#define FL_FOR_ARCH7A		(FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
+#define FL_FOR_ARCH7VE		(FL_FOR_ARCH7A | FL_THUMB_DIV | FL_ARM_DIV)
+#define FL_FOR_ARCH7R		(FL_FOR_ARCH7A | FL_THUMB_DIV)
+#define FL_FOR_ARCH7M		(FL_FOR_ARCH7 | FL_THUMB_DIV)
+#define FL_FOR_ARCH7EM		(FL_FOR_ARCH7M | FL_ARCH7EM)
+#define FL_FOR_ARCH8A		(FL_FOR_ARCH7VE | FL_ARCH8)
 #define FL2_FOR_ARCH8_1A	FL2_ARCH8_1
+#define FL_FOR_ARCH8M_BASE	(FL_FOR_ARCH6M | FL_ARCH8 | FL_THUMB_DIV)
+#define FL_FOR_ARCH8M_MAIN	(FL_FOR_ARCH7M | FL_ARCH8)
 
 /* There are too many feature bits to fit in a single word so the set of cpu and
    fpu capabilities is a structure.  A feature set is created and manipulated
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index a5fe2c36da2..b92cb17f012 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -437,10 +437,19 @@ EnumValue
 Enum(arm_arch) String(armv8.1-a+crc) Value(28)
 
 EnumValue
-Enum(arm_arch) String(iwmmxt) Value(29)
+Enum(arm_arch) String(armv8-m.base) Value(29)
 
 EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(30)
+Enum(arm_arch) String(armv8-m.main) Value(30)
+
+EnumValue
+Enum(arm_arch) String(armv8-m.main+dsp) Value(31)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt) Value(32)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(33)
 
 Enum
 Name(arm_fpu) Type(int)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index f60955438d6..2394a173f05 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2052,6 +2052,29 @@ const struct tune_params arm_xgene1_tune =
   tune_params::SCHED_AUTOPREF_OFF
 };
 
+const struct tune_params arm_qdf24xx_tune =
+{
+  arm_9e_rtx_costs,
+  &qdf24xx_extra_costs,
+  NULL,                                         /* Scheduler cost adjustment.  */
+  arm_default_branch_cost,
+  &arm_default_vec_cost,			/* Vectorizer costs.  */
+  1,						/* Constant limit.  */
+  2,						/* Max cond insns.  */
+  8,						/* Memset max inline.  */
+  4,						/* Issue rate.  */
+  ARM_PREFETCH_BENEFICIAL (0, -1, 64),
+  tune_params::PREF_CONST_POOL_FALSE,
+  tune_params::PREF_LDRD_TRUE,
+  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,	/* Thumb.  */
+  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,	/* ARM.  */
+  tune_params::DISPARAGE_FLAGS_ALL,
+  tune_params::PREF_NEON_64_FALSE,
+  tune_params::PREF_NEON_STRINGOPS_TRUE,
+  FUSE_OPS (tune_params::FUSE_MOVW_MOVT),
+  tune_params::SCHED_AUTOPREF_FULL
+};
+
 /* Branches can be dual-issued on Cortex-A5, so conditional execution is
    less appealing.  Set max_insns_skipped to a low value.  */
 
@@ -2284,9 +2307,11 @@ static const struct processors *arm_selected_arch;
 static const struct processors *arm_selected_cpu;
 static const struct processors *arm_selected_tune;
 
-/* The name of the preprocessor macro to define for this architecture.  */
+/* The name of the preprocessor macro to define for this architecture.  PROFILE
+   is replaced by the architecture name (eg. 8A) in arm_option_override () and
+   is thus chosen to be big enough to hold the longest architecture name.  */
 
-char arm_arch_name[] = "__ARM_ARCH_0UNK__";
+char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
 
 /* Available values for -mfpu=.  */
 
@@ -2927,7 +2952,8 @@ arm_option_override_internal (struct gcc_options *opts,
   if (! opts_set->x_arm_restrict_it)
     opts->x_arm_restrict_it = arm_arch8;
 
-  if (!TARGET_THUMB2_P (opts->x_target_flags))
+  /* ARM execution state and M profile don't have [restrict] IT.  */
+  if (!TARGET_THUMB2_P (opts->x_target_flags) || !arm_arch_notm)
     opts->x_arm_restrict_it = 0;
 
   /* Enable -munaligned-access by default for
@@ -2938,7 +2964,8 @@ arm_option_override_internal (struct gcc_options *opts,
 
      Disable -munaligned-access by default for
      - all pre-ARMv6 architecture-based processors
-     - ARMv6-M architecture-based processors.  */
+     - ARMv6-M architecture-based processors
+     - ARMv8-M Baseline processors.  */
 
   if (! opts_set->x_unaligned_access)
     {
@@ -3920,7 +3947,7 @@ const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code)
     {
     case SET:
       /* See if we can use movw.  */
-      if (arm_arch_thumb2 && (i & 0xffff0000) == 0)
+      if (TARGET_HAVE_MOVT && (i & 0xffff0000) == 0)
 	return 1;
       else
 	/* Otherwise, try mvn.  */
@@ -6733,7 +6760,7 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
 
   /* The PIC register is live on entry to VxWorks PLT entries, so we
      must make the call before restoring the PIC register.  */
-  if (TARGET_VXWORKS_RTP && flag_pic && !targetm.binds_local_p (decl))
+  if (TARGET_VXWORKS_RTP && flag_pic && decl && !targetm.binds_local_p (decl))
     return false;
 
   /* If we are interworking and the function is not declared static
@@ -25845,13 +25872,6 @@ thumb_reload_out_hi (rtx *operands)
   emit_insn (gen_thumb_movhi_clobber (operands[0], operands[1], operands[2]));
 }
 
-/* Handle reading a half-word from memory during reload.  */
-void
-thumb_reload_in_hi (rtx *operands ATTRIBUTE_UNUSED)
-{
-  gcc_unreachable ();
-}
-
 /* Return the length of a function name prefix
     that starts with the character 'c'.  */
 static int
@@ -25989,7 +26009,7 @@ arm_file_start (void)
 	      const char* pos = strchr (arm_selected_arch->name, '+');
 	      if (pos)
 		{
-		  char buf[15];
+		  char buf[32];
 		  gcc_assert (strlen (arm_selected_arch->name)
 			      <= sizeof (buf) / sizeof (*pos));
 		  strncpy (buf, arm_selected_arch->name,
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index f0cdd669191..c9aaa609087 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -232,7 +232,7 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
 
 /* Should MOVW/MOVT be used in preference to a constant pool.  */
 #define TARGET_USE_MOVT \
-  (arm_arch_thumb2 \
+  (TARGET_HAVE_MOVT \
    && (arm_disable_literal_pool \
        || (!optimize_size && !current_tune->prefer_constant_pool)))
 
@@ -261,7 +261,10 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
 			     || arm_arch7) && arm_arch_notm)
 
 /* Nonzero if this chip supports load-acquire and store-release.  */
-#define TARGET_HAVE_LDACQ	(TARGET_ARM_ARCH >= 8)
+#define TARGET_HAVE_LDACQ	(TARGET_ARM_ARCH >= 8 && arm_arch_notm)
+
+/* Nonzero if this chip provides the MOVW and MOVW instructions.  */
+#define TARGET_HAVE_MOVT	(arm_arch_thumb2)
 
 /* Nonzero if integer division instructions supported.  */
 #define TARGET_IDIV	((TARGET_ARM && arm_arch_arm_hwdiv)	\
@@ -398,7 +401,9 @@ enum base_architecture
   BASE_ARCH_7R = 7,
   BASE_ARCH_7M = 7,
   BASE_ARCH_7EM = 7,
-  BASE_ARCH_8A = 8
+  BASE_ARCH_8A = 8,
+  BASE_ARCH_8M_BASE = 8,
+  BASE_ARCH_8M_MAIN = 8
 };
 
 /* The major revision number of the ARM Architecture implemented by the target.  */
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 16498316bee..3cd76f935a4 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -5702,7 +5702,7 @@
   [(set (match_operand:SI 0 "nonimmediate_operand" "=r")
 	(lo_sum:SI (match_operand:SI 1 "nonimmediate_operand" "0")
 		   (match_operand:SI 2 "general_operand"      "i")))]
-  "arm_arch_thumb2 && arm_valid_symbolic_address_p (operands[2])"
+  "TARGET_HAVE_MOVT && arm_valid_symbolic_address_p (operands[2])"
   "movt%?\t%0, #:upper16:%c2"
   [(set_attr "predicable" "yes")
    (set_attr "predicable_short_it" "no")
@@ -5762,7 +5762,8 @@
   [(set (match_operand:SI 0 "arm_general_register_operand" "")
 	(const:SI (plus:SI (match_operand:SI 1 "general_operand" "")
 			   (match_operand:SI 2 "const_int_operand" ""))))]
-  "TARGET_THUMB2
+  "TARGET_THUMB
+   && TARGET_HAVE_MOVT
    && arm_disable_literal_pool
    && reload_completed
    && GET_CODE (operands[1]) == SYMBOL_REF"
@@ -5793,8 +5794,7 @@
 (define_split
   [(set (match_operand:SI 0 "arm_general_register_operand" "")
        (match_operand:SI 1 "general_operand" ""))]
-  "TARGET_32BIT
-   && TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF
+  "TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF
    && !flag_pic && !target_word_relocations
    && !arm_tls_referenced_p (operands[1])"
   [(clobber (const_int 0))]
@@ -10975,7 +10975,7 @@
                    (const_int 16)
                    (const_int 16))
         (match_operand:SI 1 "const_int_operand" ""))]
-  "arm_arch_thumb2"
+  "TARGET_HAVE_MOVT"
   "movt%?\t%0, %L1"
  [(set_attr "predicable" "yes")
   (set_attr "predicable_short_it" "no")
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index d6d394ace44..ff216607524 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -93,6 +93,9 @@
    |march=armv8-a+crc					\
    |march=armv8.1-a					\
    |march=armv8.1-a+crc					\
+   |march=armv8-m.base					\
+   |march=armv8-m.main					\
+   |march=armv8-m.main+dsp				\
    :%{!r:--be8}}}"
 #else
 #define BE8_LINK_SPEC \
@@ -127,6 +130,9 @@
    |march=armv8-a+crc					\
    |march=armv8.1-a					\
    |march=armv8.1-a+crc					\
+   |march=armv8-m.base					\
+   |march=armv8-m.main					\
+   |march=armv8-m.main+dsp				\
    :%{!r:--be8}}}"
 #endif
 
diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md
index 3b71c4a5270..4ece5f013c9 100644
--- a/gcc/config/arm/constraints.md
+++ b/gcc/config/arm/constraints.md
@@ -66,7 +66,7 @@
 
 (define_constraint "j"
  "A constant suitable for a MOVW instruction. (ARM/Thumb-2)"
- (and (match_test "TARGET_32BIT && arm_arch_thumb2")
+ (and (match_test "TARGET_HAVE_MOVT")
       (ior (and (match_code "high")
 		(match_test "arm_valid_symbolic_address_p (XEXP (op, 0))"))
 	   (and (match_code "const_int")
diff --git a/gcc/config/arm/cortex-a53.md b/gcc/config/arm/cortex-a53.md
index fc60bc26c7c..70c0f4daabe 100644
--- a/gcc/config/arm/cortex-a53.md
+++ b/gcc/config/arm/cortex-a53.md
@@ -30,6 +30,7 @@
 
 (define_cpu_unit "cortex_a53_slot0" "cortex_a53")
 (define_cpu_unit "cortex_a53_slot1" "cortex_a53")
+(final_presence_set "cortex_a53_slot1" "cortex_a53_slot0")
 
 (define_reservation "cortex_a53_slot_any"
 		    "cortex_a53_slot0\
@@ -71,41 +72,43 @@
 
 (define_insn_reservation "cortex_a53_shift" 2
   (and (eq_attr "tune" "cortexa53")
-       (eq_attr "type" "adr,shift_imm,shift_reg,mov_imm,mvn_imm"))
+       (eq_attr "type" "adr,shift_imm,mov_imm,mvn_imm,mov_shift"))
   "cortex_a53_slot_any")
 
-(define_insn_reservation "cortex_a53_alu_rotate_imm" 2
+(define_insn_reservation "cortex_a53_shift_reg" 2
   (and (eq_attr "tune" "cortexa53")
-       (eq_attr "type" "rotate_imm"))
-  "(cortex_a53_slot1)
-   | (cortex_a53_single_issue)")
+       (eq_attr "type" "shift_reg,mov_shift_reg"))
+  "cortex_a53_slot_any+cortex_a53_hazard")
 
 (define_insn_reservation "cortex_a53_alu" 3
   (and (eq_attr "tune" "cortexa53")
        (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,
 			alu_sreg,alus_sreg,logic_reg,logics_reg,
 			adc_imm,adcs_imm,adc_reg,adcs_reg,
-			bfm,csel,clz,rbit,rev,alu_dsp_reg,
-			mov_reg,mvn_reg,
-			mrs,multiple,no_insn"))
+			csel,clz,rbit,rev,alu_dsp_reg,
+			mov_reg,mvn_reg,mrs,multiple,no_insn"))
   "cortex_a53_slot_any")
 
 (define_insn_reservation "cortex_a53_alu_shift" 3
   (and (eq_attr "tune" "cortexa53")
        (eq_attr "type" "alu_shift_imm,alus_shift_imm,
 			crc,logic_shift_imm,logics_shift_imm,
-			alu_ext,alus_ext,
-			extend,mov_shift,mvn_shift"))
+			alu_ext,alus_ext,bfm,extend,mvn_shift"))
   "cortex_a53_slot_any")
 
 (define_insn_reservation "cortex_a53_alu_shift_reg" 3
   (and (eq_attr "tune" "cortexa53")
        (eq_attr "type" "alu_shift_reg,alus_shift_reg,
 			logic_shift_reg,logics_shift_reg,
-			mov_shift_reg,mvn_shift_reg"))
+			mvn_shift_reg"))
   "cortex_a53_slot_any+cortex_a53_hazard")
 
-(define_insn_reservation "cortex_a53_mul" 3
+(define_insn_reservation "cortex_a53_alu_extr" 3
+  (and (eq_attr "tune" "cortexa53")
+       (eq_attr "type" "rotate_imm"))
+  "cortex_a53_slot1|cortex_a53_single_issue")
+
+(define_insn_reservation "cortex_a53_mul" 4
   (and (eq_attr "tune" "cortexa53")
        (ior (eq_attr "mul32" "yes")
 	    (eq_attr "mul64" "yes")))
@@ -189,49 +192,43 @@
 (define_insn_reservation "cortex_a53_branch" 0
   (and (eq_attr "tune" "cortexa53")
        (eq_attr "type" "branch,call"))
-  "cortex_a53_slot_any,cortex_a53_branch")
+  "cortex_a53_slot_any+cortex_a53_branch")
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;; General-purpose register bypasses
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-;; Model bypasses for unshifted operands to ALU instructions.
+;; Model bypasses for ALU to ALU instructions.
 
-(define_bypass 1 "cortex_a53_shift"
-		 "cortex_a53_shift")
+(define_bypass 0 "cortex_a53_shift*"
+		 "cortex_a53_alu")
 
-(define_bypass 1 "cortex_a53_alu,
-		  cortex_a53_alu_shift*,
-		  cortex_a53_alu_rotate_imm,
-		  cortex_a53_shift"
+(define_bypass 1 "cortex_a53_shift*"
+		 "cortex_a53_shift*,cortex_a53_alu_*")
+
+(define_bypass 1 "cortex_a53_alu*"
 		 "cortex_a53_alu")
 
-(define_bypass 2 "cortex_a53_alu,
-		  cortex_a53_alu_shift*"
+(define_bypass 1 "cortex_a53_alu*"
 		 "cortex_a53_alu_shift*"
 		 "aarch_forward_to_shift_is_not_shifted_reg")
 
-;; In our model, we allow any general-purpose register operation to
-;; bypass to the accumulator operand of an integer MADD-like operation.
+(define_bypass 2 "cortex_a53_alu*"
+		 "cortex_a53_alu_*,cortex_a53_shift*")
 
-(define_bypass 1 "cortex_a53_alu*,
-		  cortex_a53_load*,
-		  cortex_a53_mul"
+;; Model a bypass from MUL/MLA to MLA instructions.
+
+(define_bypass 1 "cortex_a53_mul"
 		 "cortex_a53_mul"
 		 "aarch_accumulator_forwarding")
 
-;; Model a bypass from MLA/MUL to many ALU instructions.
+;; Model a bypass from MUL/MLA to ALU instructions.
 
 (define_bypass 2 "cortex_a53_mul"
-		 "cortex_a53_alu,
-		  cortex_a53_alu_shift*")
-
-;; We get neater schedules by allowing an MLA/MUL to feed an
-;; early load address dependency to a load.
+		 "cortex_a53_alu")
 
-(define_bypass 2 "cortex_a53_mul"
-		 "cortex_a53_load*"
-		 "arm_early_load_addr_dep")
+(define_bypass 3 "cortex_a53_mul"
+		 "cortex_a53_alu_*,cortex_a53_shift*")
 
 ;; Model bypasses for loads which are to be consumed by the ALU.
 
@@ -239,47 +236,37 @@
 		 "cortex_a53_alu")
 
 (define_bypass 3 "cortex_a53_load1"
-		 "cortex_a53_alu_shift*")
+		 "cortex_a53_alu_*,cortex_a53_shift*")
+
+(define_bypass 3 "cortex_a53_load2"
+		 "cortex_a53_alu")
 
 ;; Model a bypass for ALU instructions feeding stores.
 
-(define_bypass 1 "cortex_a53_alu*"
-		 "cortex_a53_store1,
-		  cortex_a53_store2,
-		  cortex_a53_store3plus"
+(define_bypass 0 "cortex_a53_alu*,cortex_a53_shift*"
+		 "cortex_a53_store*"
 		 "arm_no_early_store_addr_dep")
 
 ;; Model a bypass for load and multiply instructions feeding stores.
 
-(define_bypass 2 "cortex_a53_mul,
-		  cortex_a53_load1,
-		  cortex_a53_load2,
-		  cortex_a53_load3plus"
-		 "cortex_a53_store1,
-		  cortex_a53_store2,
-		  cortex_a53_store3plus"
+(define_bypass 1 "cortex_a53_mul,
+		  cortex_a53_load*"
+		 "cortex_a53_store*"
 		 "arm_no_early_store_addr_dep")
 
 ;; Model a GP->FP register move as similar to stores.
 
-(define_bypass 1 "cortex_a53_alu*"
+(define_bypass 0 "cortex_a53_alu*,cortex_a53_shift*"
 		 "cortex_a53_r2f")
 
-(define_bypass 2 "cortex_a53_mul,
-		  cortex_a53_load1,
-		  cortex_a53_load2,
-		  cortex_a53_load3plus"
+(define_bypass 1 "cortex_a53_mul,
+		  cortex_a53_load*"
 		 "cortex_a53_r2f")
 
-;; Shifts feeding Load/Store addresses may not be ready in time.
+;; Model flag forwarding to branches.
 
-(define_bypass 3 "cortex_a53_shift"
-		 "cortex_a53_load*"
-		 "arm_early_load_addr_dep")
-
-(define_bypass 3 "cortex_a53_shift"
-		 "cortex_a53_store*"
-		 "arm_early_store_addr_dep")
+(define_bypass 0 "cortex_a53_alu*,cortex_a53_shift*"
+		 "cortex_a53_branch")
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;; Floating-point/Advanced SIMD.
diff --git a/gcc/config/arm/driver-arm.c b/gcc/config/arm/driver-arm.c
index 95dc9d53b6c..45f2f2a1a1d 100644
--- a/gcc/config/arm/driver-arm.c
+++ b/gcc/config/arm/driver-arm.c
@@ -46,6 +46,12 @@ static struct vendor_cpu arm_cpu_table[] = {
     {"0xc0d", "armv7ve", "cortex-a12"},
     {"0xc0e", "armv7ve", "cortex-a17"},
     {"0xc0f", "armv7ve", "cortex-a15"},
+    {"0xd01", "armv8-a+crc", "cortex-a32"},
+    {"0xd04", "armv8-a+crc", "cortex-a35"},
+    {"0xd03", "armv8-a+crc", "cortex-a53"},
+    {"0xd07", "armv8-a+crc", "cortex-a57"},
+    {"0xd08", "armv8-a+crc", "cortex-a72"},
+    {"0xd09", "armv8-a+crc", "cortex-a73"},
     {"0xc14", "armv7-r", "cortex-r4"},
     {"0xc15", "armv7-r", "cortex-r5"},
     {"0xc20", "armv6-m", "cortex-m0"},
diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h
index 77f30554d52..246de549266 100644
--- a/gcc/config/arm/elf.h
+++ b/gcc/config/arm/elf.h
@@ -148,8 +148,9 @@
   while (0)
 
 /* Horrible hack: We want to prevent some libgcc routines being included
-   for some multilibs.  */
-#ifndef __ARM_ARCH_6M__
+   for some multilibs.  The condition should match the one in
+   libgcc/config/arm/lib1funcs.S.  */
+#if __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1
 #undef L_fixdfsi
 #undef L_fixunsdfsi
 #undef L_truncdfsf2
diff --git a/gcc/config/arm/neon-testgen.ml b/gcc/config/arm/neon-testgen.ml
deleted file mode 100644
index c1af5de5ea1..00000000000
--- a/gcc/config/arm/neon-testgen.ml
+++ /dev/null
@@ -1,324 +0,0 @@
-(* Auto-generate ARM Neon intrinsics tests.
-   Copyright (C) 2006-2016 Free Software Foundation, Inc.
-   Contributed by CodeSourcery.
-
-   This file is part of GCC.
-
-   GCC is free software; you can redistribute it and/or modify it under
-   the terms of the GNU General Public License as published by the Free
-   Software Foundation; either version 3, or (at your option) any later
-   version.
-
-   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-   WARRANTY; without even the implied warranty of MERCHANTABILITY or
-   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-   for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GCC; see the file COPYING3.  If not see
-   <http://www.gnu.org/licenses/>.
-
-   This is an O'Caml program.  The O'Caml compiler is available from:
-
-     http://caml.inria.fr/
-
-   Or from your favourite OS's friendly packaging system. Tested with version
-   3.09.2, though other versions will probably work too.
-
-   Compile with:
-     ocamlc -c neon.ml
-     ocamlc -o neon-testgen neon.cmo neon-testgen.ml
-
-   Run with:
-     cd /path/to/gcc/testsuite/gcc.target/arm/neon
-     /path/to/neon-testgen
-*)
-
-open Neon
-
-type c_type_flags = Pointer | Const
-
-(* Open a test source file.  *)
-let open_test_file dir name =
-  try
-    open_out (dir ^ "/" ^ name ^ ".c")
-  with Sys_error str ->
-    failwith ("Could not create test source file " ^ name ^ ": " ^ str)
-
-(* Emit prologue code to a test source file.  *)
-let emit_prologue chan test_name effective_target compile_test_optim =
-  Printf.fprintf chan "/* Test the `%s' ARM Neon intrinsic.  */\n" test_name;
-  Printf.fprintf chan "/* This file was autogenerated by neon-testgen.  */\n\n";
-  Printf.fprintf chan "/* { dg-do assemble } */\n";
-  Printf.fprintf chan "/* { dg-require-effective-target %s_ok } */\n"
-                 effective_target;
-  Printf.fprintf chan "/* { dg-options \"-save-temps %s\" } */\n" compile_test_optim;
-  Printf.fprintf chan "/* { dg-add-options %s } */\n" effective_target;
-  Printf.fprintf chan "\n#include \"arm_neon.h\"\n\n"
-
-(* Emit declarations of variables that are going to be passed
-   to an intrinsic, together with one to take a returned value if needed.  *)
-let emit_variables chan c_types features spaces =
-  let emit () =
-    ignore (
-      List.fold_left (fun arg_number -> fun (flags, ty) ->
-                        let pointer_bit =
-                          if List.mem Pointer flags then "*" else ""
-                        in
-                          (* Const arguments to builtins are directly
-                             written in as constants.  *)
-                          if not (List.mem Const flags) then
-                            Printf.fprintf chan "%s%s %sarg%d_%s;\n"
-                                           spaces ty pointer_bit arg_number ty;
-                        arg_number + 1)
-                     0 (List.tl c_types))
-  in
-    match c_types with
-      (_, return_ty) :: tys ->
-        if return_ty <> "void" then begin
-          (* The intrinsic returns a value.  We need to do explicit register
-             allocation for vget_low tests or they fail because of copy
-             elimination.  *)
-          ((if List.mem Fixed_vector_reg features then
-              Printf.fprintf chan "%sregister %s out_%s asm (\"d18\");\n"
-                             spaces return_ty return_ty
-            else if List.mem Fixed_core_reg features then
-              Printf.fprintf chan "%sregister %s out_%s asm (\"r0\");\n"
-                             spaces return_ty return_ty
-            else
-              Printf.fprintf chan "%s%s out_%s;\n" spaces return_ty return_ty);
-	   emit ())
-        end else
-          (* The intrinsic does not return a value.  *)
-          emit ()
-    | _ -> assert false
-
-(* Emit code to call an intrinsic.  *)
-let emit_call chan const_valuator c_types name elt_ty =
-  (if snd (List.hd c_types) <> "void" then
-     Printf.fprintf chan "  out_%s = " (snd (List.hd c_types))
-   else
-     Printf.fprintf chan "  ");
-  Printf.fprintf chan "%s_%s (" (intrinsic_name name) (string_of_elt elt_ty);
-  let print_arg chan arg_number (flags, ty) =
-    (* If the argument is of const type, then directly write in the
-       constant now.  *)
-    if List.mem Const flags then
-      match const_valuator with
-        None ->
-          if List.mem Pointer flags then
-            Printf.fprintf chan "0"
-          else
-            Printf.fprintf chan "1"
-      | Some f -> Printf.fprintf chan "%s" (string_of_int (f arg_number))
-    else
-      Printf.fprintf chan "arg%d_%s" arg_number ty
-  in
-  let rec print_args arg_number tys =
-    match tys with
-      [] -> ()
-    | [ty] -> print_arg chan arg_number ty
-    | ty::tys ->
-      print_arg chan arg_number ty;
-      Printf.fprintf chan ", ";
-      print_args (arg_number + 1) tys
-  in
-    print_args 0 (List.tl c_types);
-    Printf.fprintf chan ");\n"
-
-(* Emit epilogue code to a test source file.  *)
-let emit_epilogue chan features regexps =
-  let no_op = List.exists (fun feature -> feature = No_op) features in
-    Printf.fprintf chan "}\n\n";
-    if not no_op then
-      List.iter (fun regexp ->
-                  Printf.fprintf chan
-                    "/* { dg-final { scan-assembler \"%s\" } } */\n" regexp)
-                regexps
-    else
-      ()
-    
-
-(* Check a list of C types to determine which ones are pointers and which
-   ones are const.  *)
-let check_types tys =
-  let tys' =
-    List.map (fun ty ->
-                let len = String.length ty in
-                  if len > 2 && String.get ty (len - 2) = ' '
-                             && String.get ty (len - 1) = '*'
-                  then ([Pointer], String.sub ty 0 (len - 2))
-                  else ([], ty)) tys
-  in
-    List.map (fun (flags, ty) ->
-                if String.length ty > 6 && String.sub ty 0 6 = "const "
-                then (Const :: flags, String.sub ty 6 ((String.length ty) - 6))
-                else (flags, ty)) tys'
-
-(* Work out what the effective target should be.  *)
-let effective_target features =
-  try
-    match List.find (fun feature ->
-                       match feature with Requires_feature _ -> true
-                                        | Requires_arch _ -> true
-                                        | Requires_FP_bit 1 -> true
-                                        | _ -> false)
-                     features with
-      Requires_feature "FMA" -> "arm_neonv2"
-    | Requires_feature "CRYPTO" -> "arm_crypto"
-    | Requires_arch 8 -> "arm_v8_neon"
-    | Requires_FP_bit 1 -> "arm_neon_fp16"
-    | _ -> assert false
-  with Not_found -> "arm_neon"
-
-(* Work out what the testcase optimization level should be, default to -O0.  *)
-let compile_test_optim features =
-  try
-    match List.find (fun feature ->
-                       match feature with Compiler_optim _ -> true
-                                        | _ -> false)
-                     features with
-      Compiler_optim opt -> opt
-    | _ -> assert false
-  with Not_found -> "-O0"
-
-(* Given an intrinsic shape, produce a regexp that will match
-   the right-hand sides of instructions generated by an intrinsic of
-   that shape.  *)
-let rec analyze_shape shape =
-  let rec n_things n thing =
-    match n with
-      0 -> []
-    | n -> thing :: (n_things (n - 1) thing)
-  in
-  let rec analyze_shape_elt elt =
-    match elt with
-      Dreg -> "\\[dD\\]\\[0-9\\]+"
-    | Qreg -> "\\[qQ\\]\\[0-9\\]+"
-    | Corereg -> "\\[rR\\]\\[0-9\\]+"
-    | Immed -> "#\\[0-9\\]+"
-    | VecArray (1, elt) ->
-        let elt_regexp = analyze_shape_elt elt in
-          "((\\\\\\{" ^ elt_regexp ^ "\\\\\\})|(" ^ elt_regexp ^ "))"
-    | VecArray (n, elt) ->
-      let elt_regexp = analyze_shape_elt elt in
-      let alt1 = elt_regexp ^ "-" ^ elt_regexp in
-      let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in
-        "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}"
-    | (PtrTo elt | CstPtrTo elt) ->
-      "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]"
-    | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
-    | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
-    | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]"
-    | Alternatives (elts) -> "(" ^ (String.concat "|" (List.map analyze_shape_elt elts)) ^ ")"
-  in
-    match shape with
-      All (n, elt) -> commas analyze_shape_elt (n_things n elt) ""
-    | Long -> (analyze_shape_elt Qreg) ^ ", " ^ (analyze_shape_elt Dreg) ^
-              ", " ^ (analyze_shape_elt Dreg)
-    | Long_noreg elt -> (analyze_shape_elt elt) ^ ", " ^ (analyze_shape_elt elt)
-    | Wide -> (analyze_shape_elt Qreg) ^ ", " ^ (analyze_shape_elt Qreg) ^
-              ", " ^ (analyze_shape_elt Dreg)
-    | Wide_noreg elt -> analyze_shape (Long_noreg elt)
-    | Narrow -> (analyze_shape_elt Dreg) ^ ", " ^ (analyze_shape_elt Qreg) ^
-                ", " ^ (analyze_shape_elt Qreg)
-    | Use_operands elts -> commas analyze_shape_elt (Array.to_list elts) ""
-    | By_scalar Dreg ->
-        analyze_shape (Use_operands [| Dreg; Dreg; Element_of_dreg |])
-    | By_scalar Qreg ->
-        analyze_shape (Use_operands [| Qreg; Qreg; Element_of_dreg |])
-    | By_scalar _ -> assert false
-    | Wide_lane ->
-        analyze_shape (Use_operands [| Qreg; Dreg; Element_of_dreg |])
-    | Wide_scalar ->
-        analyze_shape (Use_operands [| Qreg; Dreg; Element_of_dreg |])
-    | Pair_result elt ->
-      let elt_regexp = analyze_shape_elt elt in
-        elt_regexp ^ ", " ^ elt_regexp
-    | Unary_scalar _ -> "FIXME Unary_scalar"
-    | Binary_imm elt -> analyze_shape (Use_operands [| elt; elt; Immed |])
-    | Narrow_imm -> analyze_shape (Use_operands [| Dreg; Qreg; Immed |])
-    | Long_imm -> analyze_shape (Use_operands [| Qreg; Dreg; Immed |])
-
-(* Generate tests for one intrinsic.  *)
-let test_intrinsic dir opcode features shape name munge elt_ty =
-  (* Open the test source file.  *)
-  let test_name = name ^ (string_of_elt elt_ty) in
-  let chan = open_test_file dir test_name in
-  (* Work out what argument and return types the intrinsic has.  *)
-  let c_arity, new_elt_ty = munge shape elt_ty in
-  let c_types = check_types (strings_of_arity c_arity) in
-  (* Extract any constant valuator (a function specifying what constant
-     values are to be written into the intrinsic call) from the features
-     list.  *)
-  let const_valuator =
-    try
-      match (List.find (fun feature -> match feature with
-                                         Const_valuator _ -> true
-				       | _ -> false) features) with
-        Const_valuator f -> Some f
-      | _ -> assert false
-    with Not_found -> None
-  in
-  (* Work out what instruction name(s) to expect.  *)
-  let insns = get_insn_names features name in
-  let no_suffix = (new_elt_ty = NoElts) in
-  let insns =
-    if no_suffix then insns
-                 else List.map (fun insn ->
-                                  let suffix = string_of_elt_dots new_elt_ty in
-                                    insn ^ "\\." ^ suffix) insns
-  in
-  (* Construct a regexp to match against the expected instruction name(s).  *)
-  let insn_regexp =
-    match insns with
-      [] -> assert false
-    | [insn] -> insn
-    | _ ->
-      let rec calc_regexp insns cur_regexp =
-        match insns with
-          [] -> cur_regexp
-        | [insn] -> cur_regexp ^ "(" ^ insn ^ "))"
-        | insn::insns -> calc_regexp insns (cur_regexp ^ "(" ^ insn ^ ")|")
-      in calc_regexp insns "("
-  in
-  (* Construct regexps to match against the instructions that this
-     intrinsic expands to.  Watch out for any writeback character and
-     comments after the instruction.  *)
-  let regexps = List.map (fun regexp -> insn_regexp ^ "\\[ \t\\]+" ^ regexp ^
-			  "!?\\(\\[ \t\\]+@\\[a-zA-Z0-9 \\]+\\)?\\n")
-                         (analyze_all_shapes features shape analyze_shape)
-  in
-  let effective_target = effective_target features in
-  let compile_test_optim = compile_test_optim features
-  in
-    (* Emit file and function prologues.  *)
-    emit_prologue chan test_name effective_target compile_test_optim;
-
-    if (compare compile_test_optim "-O0") <> 0 then
-        (* Emit variable declarations.  *)
-        emit_variables chan c_types features "";
-
-    Printf.fprintf chan "void test_%s (void)\n{\n" test_name;
-
-    if compare compile_test_optim "-O0" = 0 then
-        (* Emit variable declarations.  *)
-        emit_variables chan c_types features "  ";
-
-    Printf.fprintf chan "\n";
-    (* Emit the call to the intrinsic.  *)
-    emit_call chan const_valuator c_types name elt_ty;
-    (* Emit the function epilogue and the DejaGNU scan-assembler directives.  *)
-    emit_epilogue chan features regexps;
-    (* Close the test file.  *)
-    close_out chan
-
-(* Generate tests for one element of the "ops" table.  *)
-let test_intrinsic_group dir (opcode, features, shape, name, munge, types) =
-  List.iter (test_intrinsic dir opcode features shape name munge) types
-
-(* Program entry point.  *)
-let _ =
-  let directory = if Array.length Sys.argv <> 1 then Sys.argv.(1) else "." in
-    List.iter (test_intrinsic_group directory) (reinterp @ reinterpq @ ops)
-
diff --git a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml
deleted file mode 100644
index 99350bef727..00000000000
--- a/gcc/config/arm/neon.ml
+++ /dev/null
@@ -1,2357 +0,0 @@
-(* Common code for ARM NEON header file, documentation and test case
-   generators.
-
-   Copyright (C) 2006-2016 Free Software Foundation, Inc.
-   Contributed by CodeSourcery.
-
-   This file is part of GCC.
-
-   GCC is free software; you can redistribute it and/or modify it under
-   the terms of the GNU General Public License as published by the Free
-   Software Foundation; either version 3, or (at your option) any later
-   version.
-
-   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
-   WARRANTY; without even the implied warranty of MERCHANTABILITY or
-   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-   for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with GCC; see the file COPYING3.  If not see
-   <http://www.gnu.org/licenses/>.  *)
-
-(* Shorthand types for vector elements.  *)
-type elts = S8 | S16 | S32 | S64 | F16 | F32 | U8 | U16 | U32 | U64 | P8 | P16
-          | P64 | P128 | I8 | I16 | I32 | I64 | B8 | B16 | B32 | B64 | Conv of elts * elts
-          | Cast of elts * elts | NoElts
-
-type eltclass = Signed | Unsigned | Float | Poly | Int | Bits
-	      | ConvClass of eltclass * eltclass | NoType
-
-(* These vector types correspond directly to C types.  *)
-type vectype = T_int8x8    | T_int8x16
-             | T_int16x4   | T_int16x8
-	     | T_int32x2   | T_int32x4
-	     | T_int64x1   | T_int64x2
-	     | T_uint8x8   | T_uint8x16
-	     | T_uint16x4  | T_uint16x8
-	     | T_uint32x2  | T_uint32x4
-	     | T_uint64x1  | T_uint64x2
-	     | T_float16x4
-	     | T_float32x2 | T_float32x4
-	     | T_poly8x8   | T_poly8x16
-	     | T_poly16x4  | T_poly16x8
-	     | T_immediate of int * int
-             | T_int8      | T_int16
-             | T_int32     | T_int64
-             | T_uint8     | T_uint16
-             | T_uint32    | T_uint64
-             | T_poly8     | T_poly16
-             | T_poly64    | T_poly64x1
-             | T_poly64x2  | T_poly128
-             | T_float16   | T_float32
-             | T_arrayof of int * vectype
-             | T_ptrto of vectype | T_const of vectype
-             | T_void      | T_intQI
-             | T_intHI     | T_intSI
-             | T_intDI     | T_intTI
-             | T_floatHF   | T_floatSF
-
-(* The meanings of the following are:
-     TImode : "Tetra", two registers (four words).
-     EImode : "hExa", three registers (six words).
-     OImode : "Octa", four registers (eight words).
-     CImode : "dodeCa", six registers (twelve words).
-     XImode : "heXadeca", eight registers (sixteen words).
-*)
-
-type inttype = B_TImode | B_EImode | B_OImode | B_CImode | B_XImode
-
-type shape_elt = Dreg | Qreg | Corereg | Immed | VecArray of int * shape_elt
-               | PtrTo of shape_elt | CstPtrTo of shape_elt
-	       (* These next ones are used only in the test generator.  *)
-	       | Element_of_dreg	(* Used for "lane" variants.  *)
-	       | Element_of_qreg	(* Likewise.  *)
-	       | All_elements_of_dreg	(* Used for "dup" variants.  *)
-	       | Alternatives of shape_elt list (* Used for multiple valid operands *)
-
-type shape_form = All of int * shape_elt
-                | Long
-		| Long_noreg of shape_elt
-		| Wide
-		| Wide_noreg of shape_elt
-		| Narrow
-                | Long_imm
-                | Narrow_imm
-                | Binary_imm of shape_elt
-                | Use_operands of shape_elt array
-                | By_scalar of shape_elt
-                | Unary_scalar of shape_elt
-                | Wide_lane
-                | Wide_scalar
-                | Pair_result of shape_elt
-
-type arity = Arity0 of vectype
-           | Arity1 of vectype * vectype
-	   | Arity2 of vectype * vectype * vectype
-	   | Arity3 of vectype * vectype * vectype * vectype
-           | Arity4 of vectype * vectype * vectype * vectype * vectype
-
-type vecmode = V8QI | V4HI | V4HF |V2SI | V2SF | DI
-             | V16QI | V8HI | V4SI | V4SF | V2DI | TI
-             | QI | HI | SI | SF
-
-type opcode =
-  (* Binary ops.  *)
-    Vadd
-  | Vmul
-  | Vmla
-  | Vmls
-  | Vfma
-  | Vfms
-  | Vsub
-  | Vceq
-  | Vcge
-  | Vcgt
-  | Vcle
-  | Vclt
-  | Vcage
-  | Vcagt
-  | Vcale
-  | Vcalt
-  | Vtst
-  | Vabd
-  | Vaba
-  | Vmax
-  | Vmin
-  | Vpadd
-  | Vpada
-  | Vpmax
-  | Vpmin
-  | Vrecps
-  | Vrsqrts
-  | Vshl
-  | Vshr_n
-  | Vshl_n
-  | Vsra_n
-  | Vsri
-  | Vsli
-  (* Logic binops.  *)
-  | Vand
-  | Vorr
-  | Veor
-  | Vbic
-  | Vorn
-  | Vbsl
-  (* Ops with scalar.  *)
-  | Vmul_lane
-  | Vmla_lane
-  | Vmls_lane
-  | Vmul_n
-  | Vmla_n
-  | Vmls_n
-  | Vmull_n
-  | Vmull_lane
-  | Vqdmull_n
-  | Vqdmull_lane
-  | Vqdmulh_n
-  | Vqdmulh_lane
-  (* Unary ops.  *)
-  | Vrintn
-  | Vrinta
-  | Vrintp
-  | Vrintm
-  | Vrintz
-  | Vabs
-  | Vneg
-  | Vcls
-  | Vclz
-  | Vcnt
-  | Vrecpe
-  | Vrsqrte
-  | Vmvn
-  (* Vector extract.  *)
-  | Vext
-  (* Reverse elements.  *)
-  | Vrev64
-  | Vrev32
-  | Vrev16
-  (* Transposition ops.  *)
-  | Vtrn
-  | Vzip
-  | Vuzp
-  (* Loads and stores (VLD1/VST1/VLD2...), elements and structures.  *)
-  | Vldx of int
-  | Vstx of int
-  | Vldx_lane of int
-  | Vldx_dup of int
-  | Vstx_lane of int
-  (* Set/extract lanes from a vector.  *)
-  | Vget_lane
-  | Vset_lane
-  (* Initialize vector from bit pattern.  *)
-  | Vcreate
-  (* Set all lanes to same value.  *)
-  | Vdup_n
-  | Vmov_n  (* Is this the same?  *)
-  (* Duplicate scalar to all lanes of vector.  *)
-  | Vdup_lane
-  (* Combine vectors.  *)
-  | Vcombine
-  (* Get quadword high/low parts.  *)
-  | Vget_high
-  | Vget_low
-  (* Convert vectors.  *)
-  | Vcvt
-  | Vcvt_n
-  (* Narrow/lengthen vectors.  *)
-  | Vmovn
-  | Vmovl
-  (* Table lookup.  *)
-  | Vtbl of int
-  | Vtbx of int
-  (* Reinterpret casts.  *)
-  | Vreinterp
-
-let rev_elems revsize elsize nelts _ =
-  let mask = (revsize / elsize) - 1 in
-  let arr = Array.init nelts
-    (fun i -> i lxor mask) in
-  Array.to_list arr
-
-let permute_range i stride nelts increment =
-  let rec build i = function
-    0 -> []
-  | nelts -> i :: (i + stride) :: build (i + increment) (pred nelts) in
-  build i nelts
-
-(* Generate a list of integers suitable for vzip.  *)
-let zip_range i stride nelts = permute_range i stride nelts 1
-
-(* Generate a list of integers suitable for vunzip.  *)
-let uzip_range i stride nelts = permute_range i stride nelts 4
-
-(* Generate a list of integers suitable for trn.  *)
-let trn_range i stride nelts = permute_range i stride nelts 2
-
-let zip_elems _ nelts part =
-  match part with
-    `lo -> zip_range 0 nelts (nelts / 2)
-  | `hi -> zip_range (nelts / 2) nelts (nelts / 2)
-
-let uzip_elems _ nelts part =
-  match part with
-    `lo -> uzip_range 0 2 (nelts / 2)
-  | `hi -> uzip_range 1 2 (nelts / 2)
-
-let trn_elems _ nelts part =
-  match part with
-    `lo -> trn_range 0 nelts (nelts / 2)
-  | `hi -> trn_range 1 nelts (nelts / 2)
-
-(* Features used for documentation, to distinguish between some instruction
-   variants, and to signal special requirements (e.g. swapping arguments).  *)
-
-type features =
-    Halving
-  | Rounding
-  | Saturating
-  | Dst_unsign
-  | High_half
-  | Doubling
-  | Flipped of string  (* Builtin name to use with flipped arguments.  *)
-  | InfoWord  (* Pass an extra word for signage/rounding etc. (always passed
-                 for All _, Long, Wide, Narrow shape_forms.  *)
-    (* Implement builtin as shuffle.  The parameter is a function which returns
-       masks suitable for __builtin_shuffle: arguments are (element size,
-       number of elements, high/low part selector).  *)
-  | Use_shuffle of (int -> int -> [`lo|`hi] -> int list)
-    (* A specification as to the shape of instruction expected upon
-       disassembly, used if it differs from the shape used to build the
-       intrinsic prototype.  Multiple entries in the constructor's argument
-       indicate that the intrinsic expands to more than one assembly
-       instruction, each with a corresponding shape specified here.  *)
-  | Disassembles_as of shape_form list
-  | Builtin_name of string  (* Override the name of the builtin.  *)
-    (* Override the name of the instruction.  If more than one name
-       is specified, it means that the instruction can have any of those
-       names.  *)
-  | Instruction_name of string list
-    (* Mark that the intrinsic yields no instructions, or expands to yield
-       behavior that the test generator cannot test.  *)
-  | No_op
-    (* Mark that the intrinsic has constant arguments that cannot be set
-       to the defaults (zero for pointers and one otherwise) in the test
-       cases.  The function supplied must return the integer to be written
-       into the testcase for the argument number (0-based) supplied to it.  *)
-  | Const_valuator of (int -> int)
-  | Fixed_vector_reg
-  | Fixed_core_reg
-    (* Mark that the intrinsic requires __ARM_FEATURE_string to be defined.  *)
-  | Requires_feature of string
-    (* Mark that the intrinsic requires a particular architecture version.  *)
-  | Requires_arch of int
-    (* Mark that the intrinsic requires a particular bit in __ARM_FP to
-    be set.   *)
-  | Requires_FP_bit of int
-    (* Compiler optimization level for the test.  *)
-  | Compiler_optim of string
-
-exception MixedMode of elts * elts
-
-let rec elt_width = function
-    S8 | U8 | P8 | I8 | B8 -> 8
-  | S16 | U16 | P16 | I16 | B16 | F16 -> 16
-  | S32 | F32 | U32 | I32 | B32 -> 32
-  | S64 | U64 | P64 | I64 | B64 -> 64
-  | P128 -> 128
-  | Conv (a, b) ->
-      let wa = elt_width a and wb = elt_width b in
-      if wa = wb then wa else raise (MixedMode (a, b))
-  | Cast (a, b) -> raise (MixedMode (a, b))
-  | NoElts -> failwith "No elts"
-
-let rec elt_class = function
-    S8 | S16 | S32 | S64 -> Signed
-  | U8 | U16 | U32 | U64 -> Unsigned
-  | P8 | P16 | P64 | P128 -> Poly
-  | F16 | F32 -> Float
-  | I8 | I16 | I32 | I64 -> Int
-  | B8 | B16 | B32 | B64 -> Bits
-  | Conv (a, b) | Cast (a, b) -> ConvClass (elt_class a, elt_class b)
-  | NoElts -> NoType
-
-let elt_of_class_width c w =
-  match c, w with
-    Signed, 8 -> S8
-  | Signed, 16 -> S16
-  | Signed, 32 -> S32
-  | Signed, 64 -> S64
-  | Float, 16 -> F16
-  | Float, 32 -> F32
-  | Unsigned, 8 -> U8
-  | Unsigned, 16 -> U16
-  | Unsigned, 32 -> U32
-  | Unsigned, 64 -> U64
-  | Poly, 8 -> P8
-  | Poly, 16 -> P16
-  | Poly, 64 -> P64
-  | Poly, 128 -> P128
-  | Int, 8 -> I8
-  | Int, 16 -> I16
-  | Int, 32 -> I32
-  | Int, 64 -> I64
-  | Bits, 8 -> B8
-  | Bits, 16 -> B16
-  | Bits, 32 -> B32
-  | Bits, 64 -> B64
-  | _ -> failwith "Bad element type"
-
-(* Return unsigned integer element the same width as argument.  *)
-let unsigned_of_elt elt =
-  elt_of_class_width Unsigned (elt_width elt)
-
-let signed_of_elt elt =
-  elt_of_class_width Signed (elt_width elt)
-
-(* Return untyped bits element the same width as argument.  *)
-let bits_of_elt elt =
-  elt_of_class_width Bits (elt_width elt)
-
-let non_signed_variant = function
-    S8 -> I8
-  | S16 -> I16
-  | S32 -> I32
-  | S64 -> I64
-  | U8 -> I8
-  | U16 -> I16
-  | U32 -> I32
-  | U64 -> I64
-  | x -> x
-
-let poly_unsigned_variant v =
-  let elclass = match elt_class v with
-    Poly -> Unsigned
-  | x -> x in
-  elt_of_class_width elclass (elt_width v)
-
-let widen_elt elt =
-  let w = elt_width elt
-  and c = elt_class elt in
-  elt_of_class_width c (w * 2)
-
-let narrow_elt elt =
-  let w = elt_width elt
-  and c = elt_class elt in
-  elt_of_class_width c (w / 2)
-
-(* If we're trying to find a mode from a "Use_operands" instruction, use the
-   last vector operand as the dominant mode used to invoke the correct builtin.
-   We must stick to this rule in neon.md.  *)
-let find_key_operand operands =
-  let rec scan opno =
-    match operands.(opno) with
-      Qreg -> Qreg
-    | Dreg -> Dreg
-    | VecArray (_, Qreg) -> Qreg
-    | VecArray (_, Dreg) -> Dreg
-    | _ -> scan (opno-1)
-  in
-    scan ((Array.length operands) - 1)
-
-(* Find a vecmode from a shape_elt ELT for an instruction with shape_form
-   SHAPE.  For a Use_operands shape, if ARGPOS is passed then return the mode
-   for the given argument position, else determine which argument to return a
-   mode for automatically.  *)
-
-let rec mode_of_elt ?argpos elt shape =
-  let flt = match elt_class elt with
-    Float | ConvClass(_, Float) -> true | _ -> false in
-  let idx =
-    match elt_width elt with
-      8 -> 0 | 16 -> 1 | 32 -> 2 | 64 -> 3 | 128 -> 4
-    | _ -> failwith "Bad element width"
-  in match shape with
-    All (_, Dreg) | By_scalar Dreg | Pair_result Dreg | Unary_scalar Dreg
-  | Binary_imm Dreg | Long_noreg Dreg | Wide_noreg Dreg ->
-      if flt then
-        [| V8QI; V4HF; V2SF; DI |].(idx)
-      else
-        [| V8QI; V4HI; V2SI; DI |].(idx)
-  | All (_, Qreg) | By_scalar Qreg | Pair_result Qreg | Unary_scalar Qreg
-  | Binary_imm Qreg | Long_noreg Qreg | Wide_noreg Qreg ->
-      [| V16QI; V8HI; if flt then V4SF else V4SI; V2DI; TI|].(idx)
-  | All (_, (Corereg | PtrTo _ | CstPtrTo _)) ->
-      [| QI; HI; if flt then SF else SI; DI |].(idx)
-  | Long | Wide | Wide_lane | Wide_scalar
-  | Long_imm ->
-      [| V8QI; V4HI; V2SI; DI |].(idx)
-  | Narrow | Narrow_imm -> [| V16QI; V8HI; V4SI; V2DI |].(idx)
-  | Use_operands ops ->
-      begin match argpos with
-        None -> mode_of_elt ?argpos elt (All (0, (find_key_operand ops)))
-      | Some pos -> mode_of_elt ?argpos elt (All (0, ops.(pos)))
-      end
-  | _ -> failwith "invalid shape"
-
-(* Modify an element type dependent on the shape of the instruction and the
-   operand number.  *)
-
-let shapemap shape no =
-  let ident = fun x -> x in
-  match shape with
-    All _ | Use_operands _ | By_scalar _ | Pair_result _ | Unary_scalar _
-  | Binary_imm _ -> ident
-  | Long | Long_noreg _ | Wide_scalar | Long_imm ->
-      [| widen_elt; ident; ident |].(no)
-  | Wide | Wide_noreg _ -> [| widen_elt; widen_elt; ident |].(no)
-  | Wide_lane -> [| widen_elt; ident; ident; ident |].(no)
-  | Narrow | Narrow_imm -> [| narrow_elt; ident; ident |].(no)
-
-(* Register type (D/Q) of an operand, based on shape and operand number.  *)
-
-let regmap shape no =
-  match shape with
-    All (_, reg) | Long_noreg reg | Wide_noreg reg -> reg
-  | Long -> [| Qreg; Dreg; Dreg |].(no)
-  | Wide -> [| Qreg; Qreg; Dreg |].(no)
-  | Narrow -> [| Dreg; Qreg; Qreg |].(no)
-  | Wide_lane -> [| Qreg; Dreg; Dreg; Immed |].(no)
-  | Wide_scalar -> [| Qreg; Dreg; Corereg |].(no)
-  | By_scalar reg -> [| reg; reg; Dreg; Immed |].(no)
-  | Unary_scalar reg -> [| reg; Dreg; Immed |].(no)
-  | Pair_result reg -> [| VecArray (2, reg); reg; reg |].(no)
-  | Binary_imm reg -> [| reg; reg; Immed |].(no)
-  | Long_imm -> [| Qreg; Dreg; Immed |].(no)
-  | Narrow_imm -> [| Dreg; Qreg; Immed |].(no)
-  | Use_operands these -> these.(no)
-
-let type_for_elt shape elt no =
-  let elt = (shapemap shape no) elt in
-  let reg = regmap shape no in
-  let rec type_for_reg_elt reg elt =
-    match reg with
-      Dreg ->
-        begin match elt with
-          S8 -> T_int8x8
-        | S16 -> T_int16x4
-        | S32 -> T_int32x2
-        | S64 -> T_int64x1
-        | U8 -> T_uint8x8
-        | U16 -> T_uint16x4
-        | U32 -> T_uint32x2
-        | U64 -> T_uint64x1
-        | P64 -> T_poly64x1
-        | P128 -> T_poly128
-        | F16 -> T_float16x4
-        | F32 -> T_float32x2
-        | P8 -> T_poly8x8
-        | P16 -> T_poly16x4
-        | _ -> failwith "Bad elt type for Dreg"
-        end
-    | Qreg ->
-        begin match elt with
-          S8 -> T_int8x16
-        | S16 -> T_int16x8
-        | S32 -> T_int32x4
-        | S64 -> T_int64x2
-        | U8 -> T_uint8x16
-        | U16 -> T_uint16x8
-        | U32 -> T_uint32x4
-        | U64 -> T_uint64x2
-        | F32 -> T_float32x4
-        | P8 -> T_poly8x16
-        | P16 -> T_poly16x8
-        | P64 -> T_poly64x2
-        | P128 -> T_poly128
-        | _ -> failwith "Bad elt type for Qreg"
-        end
-    | Corereg ->
-        begin match elt with
-          S8 -> T_int8
-        | S16 -> T_int16
-        | S32 -> T_int32
-        | S64 -> T_int64
-        | U8 -> T_uint8
-        | U16 -> T_uint16
-        | U32 -> T_uint32
-        | U64 -> T_uint64
-        | P8 -> T_poly8
-        | P16 -> T_poly16
-        | P64 -> T_poly64
-        | P128 -> T_poly128
-        | F32 -> T_float32
-        | _ -> failwith "Bad elt type for Corereg"
-        end
-    | Immed ->
-        T_immediate (0, 0)
-    | VecArray (num, sub) ->
-        T_arrayof (num, type_for_reg_elt sub elt)
-    | PtrTo x ->
-        T_ptrto (type_for_reg_elt x elt)
-    | CstPtrTo x ->
-        T_ptrto (T_const (type_for_reg_elt x elt))
-    (* Anything else is solely for the use of the test generator.  *)
-    | _ -> assert false
-  in
-    type_for_reg_elt reg elt
-
-(* Return size of a vector type, in bits.  *)
-let vectype_size = function
-    T_int8x8 | T_int16x4 | T_int32x2 | T_int64x1
-  | T_uint8x8 | T_uint16x4 | T_uint32x2 | T_uint64x1
-  | T_float32x2 | T_poly8x8 | T_poly64x1 | T_poly16x4 | T_float16x4 -> 64
-  | T_int8x16 | T_int16x8 | T_int32x4 | T_int64x2
-  | T_uint8x16 | T_uint16x8  | T_uint32x4  | T_uint64x2
-  | T_float32x4 | T_poly8x16 | T_poly64x2 | T_poly16x8 -> 128
-  | _ -> raise Not_found
-
-let inttype_for_array num elttype =
-  let eltsize = vectype_size elttype in
-  let numwords = (num * eltsize) / 32 in
-  match numwords with
-    4 -> B_TImode
-  | 6 -> B_EImode
-  | 8 -> B_OImode
-  | 12 -> B_CImode
-  | 16 -> B_XImode
-  | _ -> failwith ("no int type for size " ^ string_of_int numwords)
-
-(* These functions return pairs of (internal, external) types, where "internal"
-   types are those seen by GCC, and "external" are those seen by the assembler.
-   These types aren't necessarily the same, since the intrinsics can munge more
-   than one C type into each assembler opcode.  *)
-
-let make_sign_invariant func shape elt =
-  let arity, elt' = func shape elt in
-  arity, non_signed_variant elt'
-
-(* Don't restrict any types.  *)
-
-let elts_same make_arity shape elt =
-  let vtype = type_for_elt shape elt in
-  make_arity vtype, elt
-
-(* As sign_invar_*, but when sign matters.  *)
-let elts_same_io_lane =
-  elts_same (fun vtype -> Arity4 (vtype 0, vtype 0, vtype 1, vtype 2, vtype 3))
-
-let elts_same_io =
-  elts_same (fun vtype -> Arity3 (vtype 0, vtype 0, vtype 1, vtype 2))
-
-let elts_same_2_lane =
-  elts_same (fun vtype -> Arity3 (vtype 0, vtype 1, vtype 2, vtype 3))
-
-let elts_same_3 = elts_same_2_lane
-
-let elts_same_2 =
-  elts_same (fun vtype -> Arity2 (vtype 0, vtype 1, vtype 2))
-
-let elts_same_1 =
-  elts_same (fun vtype -> Arity1 (vtype 0, vtype 1))
-
-(* Use for signed/unsigned invariant operations (i.e. where the operation
-   doesn't depend on the sign of the data.  *)
-
-let sign_invar_io_lane = make_sign_invariant elts_same_io_lane
-let sign_invar_io = make_sign_invariant elts_same_io
-let sign_invar_2_lane = make_sign_invariant elts_same_2_lane
-let sign_invar_2 = make_sign_invariant elts_same_2
-let sign_invar_1 = make_sign_invariant elts_same_1
-
-(* Sign-sensitive comparison.  *)
-
-let cmp_sign_matters shape elt =
-  let vtype = type_for_elt shape elt
-  and rtype = type_for_elt shape (unsigned_of_elt elt) 0 in
-  Arity2 (rtype, vtype 1, vtype 2), elt
-
-(* Signed/unsigned invariant comparison.  *)
-
-let cmp_sign_invar shape elt =
-  let shape', elt' = cmp_sign_matters shape elt in
-  let elt'' =
-    match non_signed_variant elt' with
-      P8 -> I8
-    | x -> x
-  in
-    shape', elt''
-
-(* Comparison (VTST) where only the element width matters.  *)
-
-let cmp_bits shape elt =
-  let vtype = type_for_elt shape elt
-  and rtype = type_for_elt shape (unsigned_of_elt elt) 0
-  and bits_only = bits_of_elt elt in
-  Arity2 (rtype, vtype 1, vtype 2), bits_only
-
-let reg_shift shape elt =
-  let vtype = type_for_elt shape elt
-  and op2type = type_for_elt shape (signed_of_elt elt) 2 in
-  Arity2 (vtype 0, vtype 1, op2type), elt
-
-(* Genericised constant-shift type-generating function.  *)
-
-let const_shift mkimm ?arity ?result shape elt =
-  let op2type = (shapemap shape 2) elt in
-  let op2width = elt_width op2type in
-  let op2 = mkimm op2width
-  and op1 = type_for_elt shape elt 1
-  and r_elt =
-    match result with
-      None -> elt
-    | Some restriction -> restriction elt in
-  let rtype = type_for_elt shape r_elt 0 in
-  match arity with
-    None -> Arity2 (rtype, op1, op2), elt
-  | Some mkarity -> mkarity rtype op1 op2, elt
-
-(* Use for immediate right-shifts.  *)
-
-let shift_right shape elt =
-  const_shift (fun imm -> T_immediate (1, imm)) shape elt
-
-let shift_right_acc shape elt =
-  const_shift (fun imm -> T_immediate (1, imm))
-    ~arity:(fun dst op1 op2 -> Arity3 (dst, dst, op1, op2)) shape elt
-
-(* Use for immediate right-shifts when the operation doesn't care about
-   signedness.  *)
-
-let shift_right_sign_invar =
-  make_sign_invariant shift_right
-
-(* Immediate right-shift; result is unsigned even when operand is signed.  *)
-
-let shift_right_to_uns shape elt =
-  const_shift (fun imm -> T_immediate (1, imm)) ~result:unsigned_of_elt
-    shape elt
-
-(* Immediate left-shift.  *)
-
-let shift_left shape elt =
-  const_shift (fun imm -> T_immediate (0, imm - 1)) shape elt
-
-(* Immediate left-shift, unsigned result.  *)
-
-let shift_left_to_uns shape elt =
-  const_shift (fun imm -> T_immediate (0, imm - 1)) ~result:unsigned_of_elt
-    shape elt
-
-(* Immediate left-shift, don't care about signs.  *)
-
-let shift_left_sign_invar =
-  make_sign_invariant shift_left
-
-(* Shift left/right and insert: only element size matters.  *)
-
-let shift_insert shape elt =
-  let arity, elt =
-    const_shift (fun imm -> T_immediate (1, imm))
-    ~arity:(fun dst op1 op2 -> Arity3 (dst, dst, op1, op2)) shape elt in
-  arity, bits_of_elt elt
-
-(* Get/set lane.  *)
-
-let get_lane shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity2 (vtype 0, vtype 1, vtype 2),
-    (match elt with P8 -> U8 | P16 -> U16 | S32 | U32 | F32 -> B32 | x -> x)
-
-let set_lane shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (vtype 0, vtype 1, vtype 2, vtype 3), bits_of_elt elt
-
-let set_lane_notype shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (vtype 0, vtype 1, vtype 2, vtype 3), NoElts
-
-let create_vector shape elt =
-  let vtype = type_for_elt shape U64 1
-  and rtype = type_for_elt shape elt 0 in
-  Arity1 (rtype, vtype), elt
-
-let conv make_arity shape elt =
-  let edest, esrc = match elt with
-    Conv (edest, esrc) | Cast (edest, esrc) -> edest, esrc
-  | _ -> failwith "Non-conversion element in conversion" in
-  let vtype = type_for_elt shape esrc
-  and rtype = type_for_elt shape edest 0 in
-  make_arity rtype vtype, elt
-
-let conv_1 = conv (fun rtype vtype -> Arity1 (rtype, vtype 1))
-let conv_2 = conv (fun rtype vtype -> Arity2 (rtype, vtype 1, vtype 2))
-
-(* Operation has an unsigned result even if operands are signed.  *)
-
-let dst_unsign make_arity shape elt =
-  let vtype = type_for_elt shape elt
-  and rtype = type_for_elt shape (unsigned_of_elt elt) 0 in
-  make_arity rtype vtype, elt
-
-let dst_unsign_1 = dst_unsign (fun rtype vtype -> Arity1 (rtype, vtype 1))
-
-let make_bits_only func shape elt =
-  let arity, elt' = func shape elt in
-  arity, bits_of_elt elt'
-
-(* Extend operation.  *)
-
-let extend shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (vtype 0, vtype 1, vtype 2, vtype 3), bits_of_elt elt
-
-(* Table look-up operations. Operand 2 is signed/unsigned for signed/unsigned
-   integer ops respectively, or unsigned for polynomial ops.  *)
-
-let table mkarity shape elt =
-  let vtype = type_for_elt shape elt in
-  let op2 = type_for_elt shape (poly_unsigned_variant elt) 2 in
-  mkarity vtype op2, bits_of_elt elt
-
-let table_2 = table (fun vtype op2 -> Arity2 (vtype 0, vtype 1, op2))
-let table_io = table (fun vtype op2 -> Arity3 (vtype 0, vtype 0, vtype 1, op2))
-
-(* Operations where only bits matter.  *)
-
-let bits_1 = make_bits_only elts_same_1
-let bits_2 = make_bits_only elts_same_2
-let bits_3 = make_bits_only elts_same_3
-
-(* Store insns.  *)
-let store_1 shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity2 (T_void, vtype 0, vtype 1), bits_of_elt elt
-
-let store_3 shape elt =
-  let vtype = type_for_elt shape elt in
-  Arity3 (T_void, vtype 0, vtype 1, vtype 2), bits_of_elt elt
-
-let make_notype func shape elt =
-  let arity, _ = func shape elt in
-  arity, NoElts
-
-let notype_1 = make_notype elts_same_1
-let notype_2 = make_notype elts_same_2
-let notype_3 = make_notype elts_same_3
-
-(* Bit-select operations (first operand is unsigned int).  *)
-
-let bit_select shape elt =
-  let vtype = type_for_elt shape elt
-  and itype = type_for_elt shape (unsigned_of_elt elt) in
-  Arity3 (vtype 0, itype 1, vtype 2, vtype 3), NoElts
-
-(* Common lists of supported element types.  *)
-
-let s_8_32 = [S8; S16; S32]
-let u_8_32 = [U8; U16; U32]
-let su_8_32 = [S8; S16; S32; U8; U16; U32]
-let su_8_64 = S64 :: U64 :: su_8_32
-let su_16_64 = [S16; S32; S64; U16; U32; U64]
-let pf_su_8_16 = [P8; P16; S8; S16; U8; U16]
-let pf_su_8_32 = P8 :: P16 :: F32 :: su_8_32
-let pf_su_8_64 = P8 :: P16 :: F32 :: su_8_64
-let suf_32 = [S32; U32; F32]
-
-let ops =
-  [
-    (* Addition.  *)
-    Vadd, [], All (3, Dreg), "vadd", sign_invar_2, F32 :: su_8_32;
-    Vadd, [No_op], All (3, Dreg), "vadd", sign_invar_2, [S64; U64];
-    Vadd, [], All (3, Qreg), "vaddQ", sign_invar_2, F32 :: su_8_64;
-    Vadd, [], Long, "vaddl", elts_same_2, su_8_32;
-    Vadd, [], Wide, "vaddw", elts_same_2, su_8_32;
-    Vadd, [Halving], All (3, Dreg), "vhadd", elts_same_2, su_8_32;
-    Vadd, [Halving], All (3, Qreg), "vhaddQ", elts_same_2, su_8_32;
-    Vadd, [Instruction_name ["vrhadd"]; Rounding; Halving],
-      All (3, Dreg), "vRhadd", elts_same_2, su_8_32;
-    Vadd, [Instruction_name ["vrhadd"]; Rounding; Halving],
-      All (3, Qreg), "vRhaddQ", elts_same_2, su_8_32;
-    Vadd, [Saturating], All (3, Dreg), "vqadd", elts_same_2, su_8_64;
-    Vadd, [Saturating], All (3, Qreg), "vqaddQ", elts_same_2, su_8_64;
-    Vadd, [High_half], Narrow, "vaddhn", sign_invar_2, su_16_64;
-    Vadd, [Instruction_name ["vraddhn"]; Rounding; High_half],
-      Narrow, "vRaddhn", sign_invar_2, su_16_64;
-
-    (* Multiplication.  *)
-    Vmul, [], All (3, Dreg), "vmul", sign_invar_2, P8 :: F32 :: su_8_32;
-    Vmul, [], All (3, Qreg), "vmulQ", sign_invar_2, P8 :: F32 :: su_8_32;
-    Vmul, [Saturating; Doubling; High_half], All (3, Dreg), "vqdmulh",
-      elts_same_2, [S16; S32];
-    Vmul, [Saturating; Doubling; High_half], All (3, Qreg), "vqdmulhQ",
-      elts_same_2, [S16; S32];
-    Vmul,
-      [Saturating; Rounding; Doubling; High_half;
-       Instruction_name ["vqrdmulh"]],
-      All (3, Dreg), "vqRdmulh",
-      elts_same_2, [S16; S32];
-    Vmul,
-      [Saturating; Rounding; Doubling; High_half;
-       Instruction_name ["vqrdmulh"]],
-      All (3, Qreg), "vqRdmulhQ",
-      elts_same_2, [S16; S32];
-    Vmul, [], Long, "vmull", elts_same_2, P8 :: su_8_32;
-    Vmul, [Saturating; Doubling], Long, "vqdmull", elts_same_2, [S16; S32];
-
-    (* Multiply-accumulate. *)
-    Vmla, [], All (3, Dreg), "vmla", sign_invar_io, F32 :: su_8_32;
-    Vmla, [], All (3, Qreg), "vmlaQ", sign_invar_io, F32 :: su_8_32;
-    Vmla, [], Long, "vmlal", elts_same_io, su_8_32;
-    Vmla, [Saturating; Doubling], Long, "vqdmlal", elts_same_io, [S16; S32];
-
-    (* Multiply-subtract.  *)
-    Vmls, [], All (3, Dreg), "vmls", sign_invar_io, F32 :: su_8_32;
-    Vmls, [], All (3, Qreg), "vmlsQ", sign_invar_io, F32 :: su_8_32;
-    Vmls, [], Long, "vmlsl", elts_same_io, su_8_32;
-    Vmls, [Saturating; Doubling], Long, "vqdmlsl", elts_same_io, [S16; S32];
-
-    (* Fused-multiply-accumulate. *)
-    Vfma, [Requires_feature "FMA"], All (3, Dreg), "vfma", elts_same_io, [F32];
-    Vfma, [Requires_feature "FMA"], All (3, Qreg), "vfmaQ", elts_same_io, [F32];
-    Vfms, [Requires_feature "FMA"], All (3, Dreg), "vfms", elts_same_io, [F32];
-    Vfms, [Requires_feature "FMA"], All (3, Qreg), "vfmsQ", elts_same_io, [F32];
-
-    (* Round to integral. *)
-    Vrintn, [Builtin_name "vrintn"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrndn", elts_same_1, [F32];
-    Vrintn, [Builtin_name "vrintn"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqn", elts_same_1, [F32];
-    Vrinta, [Builtin_name "vrinta"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrnda", elts_same_1, [F32];
-    Vrinta, [Builtin_name "vrinta"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqa", elts_same_1, [F32];
-    Vrintp, [Builtin_name "vrintp"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrndp", elts_same_1, [F32];
-    Vrintp, [Builtin_name "vrintp"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqp", elts_same_1, [F32];
-    Vrintm, [Builtin_name "vrintm"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrndm", elts_same_1, [F32];
-    Vrintm, [Builtin_name "vrintm"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndqm", elts_same_1, [F32];
-    Vrintz, [Builtin_name "vrintz"; Requires_arch 8], Use_operands [| Dreg; Dreg |],
-            "vrnd", elts_same_1, [F32];
-    Vrintz, [Builtin_name "vrintz"; Requires_arch 8], Use_operands [| Qreg; Qreg |],
-            "vrndq", elts_same_1, [F32];
-    (* Subtraction.  *)
-    Vsub, [], All (3, Dreg), "vsub", sign_invar_2, F32 :: su_8_32;
-    Vsub, [No_op], All (3, Dreg), "vsub", sign_invar_2,  [S64; U64];
-    Vsub, [], All (3, Qreg), "vsubQ", sign_invar_2, F32 :: su_8_64;
-    Vsub, [], Long, "vsubl", elts_same_2, su_8_32;
-    Vsub, [], Wide, "vsubw", elts_same_2, su_8_32;
-    Vsub, [Halving], All (3, Dreg), "vhsub", elts_same_2, su_8_32;
-    Vsub, [Halving], All (3, Qreg), "vhsubQ", elts_same_2, su_8_32;
-    Vsub, [Saturating], All (3, Dreg), "vqsub", elts_same_2, su_8_64;
-    Vsub, [Saturating], All (3, Qreg), "vqsubQ", elts_same_2, su_8_64;
-    Vsub, [High_half], Narrow, "vsubhn", sign_invar_2, su_16_64;
-    Vsub, [Instruction_name ["vrsubhn"]; Rounding; High_half],
-      Narrow, "vRsubhn", sign_invar_2, su_16_64;
-
-    (* Comparison, equal.  *)
-    Vceq, [], All (3, Dreg), "vceq", cmp_sign_invar, P8 :: F32 :: su_8_32;
-    Vceq, [], All (3, Qreg), "vceqQ", cmp_sign_invar, P8 :: F32 :: su_8_32;
-
-    (* Comparison, greater-than or equal.  *)
-    Vcge, [], All (3, Dreg), "vcge", cmp_sign_matters, F32 :: s_8_32;
-    Vcge, [Instruction_name ["vcge"]; Builtin_name "vcgeu"],
-      All (3, Dreg), "vcge", cmp_sign_matters,
-      u_8_32;
-    Vcge, [], All (3, Qreg), "vcgeQ", cmp_sign_matters, F32 :: s_8_32;
-    Vcge, [Instruction_name ["vcge"]; Builtin_name "vcgeu"],
-      All (3, Qreg), "vcgeQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Comparison, less-than or equal.  *)
-    Vcle, [Flipped "vcge"], All (3, Dreg), "vcle", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vcle, [Instruction_name ["vcge"]; Flipped "vcgeu"],
-      All (3, Dreg), "vcle", cmp_sign_matters,
-      u_8_32;
-    Vcle, [Instruction_name ["vcge"]; Flipped "vcgeQ"],
-      All (3, Qreg), "vcleQ", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vcle, [Instruction_name ["vcge"]; Flipped "vcgeuQ"],
-      All (3, Qreg), "vcleQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Comparison, greater-than.  *)
-    Vcgt, [], All (3, Dreg), "vcgt", cmp_sign_matters, F32 :: s_8_32;
-    Vcgt, [Instruction_name ["vcgt"]; Builtin_name "vcgtu"],
-      All (3, Dreg), "vcgt", cmp_sign_matters,
-      u_8_32;
-    Vcgt, [], All (3, Qreg), "vcgtQ", cmp_sign_matters, F32 :: s_8_32;
-    Vcgt, [Instruction_name ["vcgt"]; Builtin_name "vcgtu"],
-      All (3, Qreg), "vcgtQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Comparison, less-than.  *)
-    Vclt, [Flipped "vcgt"], All (3, Dreg), "vclt", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtu"],
-      All (3, Dreg), "vclt", cmp_sign_matters,
-      u_8_32;
-    Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtQ"],
-      All (3, Qreg), "vcltQ", cmp_sign_matters,
-      F32 :: s_8_32;
-    Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtuQ"],
-      All (3, Qreg), "vcltQ", cmp_sign_matters,
-      u_8_32;
-
-    (* Compare absolute greater-than or equal.  *)
-    Vcage, [Instruction_name ["vacge"]],
-      All (3, Dreg), "vcage", cmp_sign_matters, [F32];
-    Vcage, [Instruction_name ["vacge"]],
-      All (3, Qreg), "vcageQ", cmp_sign_matters, [F32];
-
-    (* Compare absolute less-than or equal.  *)
-    Vcale, [Instruction_name ["vacge"]; Flipped "vcage"],
-      All (3, Dreg), "vcale", cmp_sign_matters, [F32];
-    Vcale, [Instruction_name ["vacge"]; Flipped "vcageQ"],
-      All (3, Qreg), "vcaleQ", cmp_sign_matters, [F32];
-
-    (* Compare absolute greater-than or equal.  *)
-    Vcagt, [Instruction_name ["vacgt"]],
-      All (3, Dreg), "vcagt", cmp_sign_matters, [F32];
-    Vcagt, [Instruction_name ["vacgt"]],
-      All (3, Qreg), "vcagtQ", cmp_sign_matters, [F32];
-
-    (* Compare absolute less-than or equal.  *)
-    Vcalt, [Instruction_name ["vacgt"]; Flipped "vcagt"],
-      All (3, Dreg), "vcalt", cmp_sign_matters, [F32];
-    Vcalt, [Instruction_name ["vacgt"]; Flipped "vcagtQ"],
-      All (3, Qreg), "vcaltQ", cmp_sign_matters, [F32];
-
-    (* Test bits.  *)
-    Vtst, [], All (3, Dreg), "vtst", cmp_bits, P8 :: su_8_32;
-    Vtst, [], All (3, Qreg), "vtstQ", cmp_bits, P8 :: su_8_32;
-
-    (* Absolute difference.  *)
-    Vabd, [], All (3, Dreg), "vabd", elts_same_2, F32 :: su_8_32;
-    Vabd, [], All (3, Qreg), "vabdQ", elts_same_2, F32 :: su_8_32;
-    Vabd, [], Long, "vabdl", elts_same_2, su_8_32;
-
-    (* Absolute difference and accumulate.  *)
-    Vaba, [], All (3, Dreg), "vaba", elts_same_io, su_8_32;
-    Vaba, [], All (3, Qreg), "vabaQ", elts_same_io, su_8_32;
-    Vaba, [], Long, "vabal", elts_same_io, su_8_32;
-
-    (* Max.  *)
-    Vmax, [], All (3, Dreg), "vmax", elts_same_2, F32 :: su_8_32;
-    Vmax, [], All (3, Qreg), "vmaxQ", elts_same_2, F32 :: su_8_32;
-
-    (* Min.  *)
-    Vmin, [], All (3, Dreg), "vmin", elts_same_2, F32 :: su_8_32;
-    Vmin, [], All (3, Qreg), "vminQ", elts_same_2, F32 :: su_8_32;
-
-    (* Pairwise add.  *)
-    Vpadd, [], All (3, Dreg), "vpadd", sign_invar_2, F32 :: su_8_32;
-    Vpadd, [], Long_noreg Dreg, "vpaddl", elts_same_1, su_8_32;
-    Vpadd, [], Long_noreg Qreg, "vpaddlQ", elts_same_1, su_8_32;
-
-    (* Pairwise add, widen and accumulate.  *)
-    Vpada, [], Wide_noreg Dreg, "vpadal", elts_same_2, su_8_32;
-    Vpada, [], Wide_noreg Qreg, "vpadalQ", elts_same_2, su_8_32;
-
-    (* Folding maximum, minimum.  *)
-    Vpmax, [], All (3, Dreg), "vpmax", elts_same_2, F32 :: su_8_32;
-    Vpmin, [], All (3, Dreg), "vpmin", elts_same_2, F32 :: su_8_32;
-
-    (* Reciprocal step.  *)
-    Vrecps, [], All (3, Dreg), "vrecps", elts_same_2, [F32];
-    Vrecps, [], All (3, Qreg), "vrecpsQ", elts_same_2, [F32];
-    Vrsqrts, [], All (3, Dreg), "vrsqrts", elts_same_2, [F32];
-    Vrsqrts, [], All (3, Qreg), "vrsqrtsQ", elts_same_2, [F32];
-
-    (* Vector shift left.  *)
-    Vshl, [], All (3, Dreg), "vshl", reg_shift, su_8_64;
-    Vshl, [], All (3, Qreg), "vshlQ", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vrshl"]; Rounding],
-      All (3, Dreg), "vRshl", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vrshl"]; Rounding],
-      All (3, Qreg), "vRshlQ", reg_shift, su_8_64;
-    Vshl, [Saturating], All (3, Dreg), "vqshl", reg_shift, su_8_64;
-    Vshl, [Saturating], All (3, Qreg), "vqshlQ", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vqrshl"]; Saturating; Rounding],
-      All (3, Dreg), "vqRshl", reg_shift, su_8_64;
-    Vshl, [Instruction_name ["vqrshl"]; Saturating; Rounding],
-      All (3, Qreg), "vqRshlQ", reg_shift, su_8_64;
-
-    (* Vector shift right by constant.  *)
-    Vshr_n, [], Binary_imm Dreg, "vshr_n", shift_right, su_8_64;
-    Vshr_n, [], Binary_imm Qreg, "vshrQ_n", shift_right, su_8_64;
-    Vshr_n, [Instruction_name ["vrshr"]; Rounding], Binary_imm Dreg,
-      "vRshr_n", shift_right, su_8_64;
-    Vshr_n, [Instruction_name ["vrshr"]; Rounding], Binary_imm Qreg,
-      "vRshrQ_n", shift_right, su_8_64;
-    Vshr_n, [], Narrow_imm, "vshrn_n", shift_right_sign_invar, su_16_64;
-    Vshr_n, [Instruction_name ["vrshrn"]; Rounding], Narrow_imm, "vRshrn_n",
-      shift_right_sign_invar, su_16_64;
-    Vshr_n, [Saturating], Narrow_imm, "vqshrn_n", shift_right, su_16_64;
-    Vshr_n, [Instruction_name ["vqrshrn"]; Saturating; Rounding], Narrow_imm,
-      "vqRshrn_n", shift_right, su_16_64;
-    Vshr_n, [Saturating; Dst_unsign], Narrow_imm, "vqshrun_n",
-      shift_right_to_uns, [S16; S32; S64];
-    Vshr_n, [Instruction_name ["vqrshrun"]; Saturating; Dst_unsign; Rounding],
-      Narrow_imm, "vqRshrun_n", shift_right_to_uns, [S16; S32; S64];
-
-    (* Vector shift left by constant.  *)
-    Vshl_n, [], Binary_imm Dreg, "vshl_n", shift_left_sign_invar, su_8_64;
-    Vshl_n, [], Binary_imm Qreg, "vshlQ_n", shift_left_sign_invar, su_8_64;
-    Vshl_n, [Saturating], Binary_imm Dreg, "vqshl_n", shift_left, su_8_64;
-    Vshl_n, [Saturating], Binary_imm Qreg, "vqshlQ_n", shift_left, su_8_64;
-    Vshl_n, [Saturating; Dst_unsign], Binary_imm Dreg, "vqshlu_n",
-      shift_left_to_uns, [S8; S16; S32; S64];
-    Vshl_n, [Saturating; Dst_unsign], Binary_imm Qreg, "vqshluQ_n",
-      shift_left_to_uns, [S8; S16; S32; S64];
-    Vshl_n, [], Long_imm, "vshll_n", shift_left, su_8_32;
-
-    (* Vector shift right by constant and accumulate.  *)
-    Vsra_n, [], Binary_imm Dreg, "vsra_n", shift_right_acc, su_8_64;
-    Vsra_n, [], Binary_imm Qreg, "vsraQ_n", shift_right_acc, su_8_64;
-    Vsra_n, [Instruction_name ["vrsra"]; Rounding], Binary_imm Dreg,
-      "vRsra_n", shift_right_acc, su_8_64;
-    Vsra_n, [Instruction_name ["vrsra"]; Rounding], Binary_imm Qreg,
-      "vRsraQ_n", shift_right_acc, su_8_64;
-
-    (* Vector shift right and insert.  *)
-    Vsri, [Requires_feature "CRYPTO"], Use_operands [| Dreg; Dreg; Immed |], "vsri_n", shift_insert,
-      [P64];
-    Vsri, [], Use_operands [| Dreg; Dreg; Immed |], "vsri_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-    Vsri, [Requires_feature "CRYPTO"], Use_operands [| Qreg; Qreg; Immed |], "vsriQ_n", shift_insert,
-      [P64];
-    Vsri, [], Use_operands [| Qreg; Qreg; Immed |], "vsriQ_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-
-    (* Vector shift left and insert.  *)
-    Vsli, [Requires_feature "CRYPTO"], Use_operands [| Dreg; Dreg; Immed |], "vsli_n", shift_insert,
-      [P64];
-    Vsli, [], Use_operands [| Dreg; Dreg; Immed |], "vsli_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-    Vsli, [Requires_feature "CRYPTO"], Use_operands [| Qreg; Qreg; Immed |], "vsliQ_n", shift_insert,
-      [P64];
-    Vsli, [], Use_operands [| Qreg; Qreg; Immed |], "vsliQ_n", shift_insert,
-      P8 :: P16 :: su_8_64;
-
-    (* Absolute value.  *)
-    Vabs, [], All (2, Dreg), "vabs", elts_same_1, [S8; S16; S32; F32];
-    Vabs, [], All (2, Qreg), "vabsQ", elts_same_1, [S8; S16; S32; F32];
-    Vabs, [Saturating], All (2, Dreg), "vqabs", elts_same_1, [S8; S16; S32];
-    Vabs, [Saturating], All (2, Qreg), "vqabsQ", elts_same_1, [S8; S16; S32];
-
-    (* Negate.  *)
-    Vneg, [], All (2, Dreg), "vneg", elts_same_1, [S8; S16; S32; F32];
-    Vneg, [], All (2, Qreg), "vnegQ", elts_same_1, [S8; S16; S32; F32];
-    Vneg, [Saturating], All (2, Dreg), "vqneg", elts_same_1, [S8; S16; S32];
-    Vneg, [Saturating], All (2, Qreg), "vqnegQ", elts_same_1, [S8; S16; S32];
-
-    (* Bitwise not.  *)
-    Vmvn, [], All (2, Dreg), "vmvn", notype_1, P8 :: su_8_32;
-    Vmvn, [], All (2, Qreg), "vmvnQ", notype_1, P8 :: su_8_32;
-
-    (* Count leading sign bits.  *)
-    Vcls, [], All (2, Dreg), "vcls", elts_same_1, [S8; S16; S32];
-    Vcls, [], All (2, Qreg), "vclsQ", elts_same_1, [S8; S16; S32];
-
-    (* Count leading zeros.  *)
-    Vclz, [], All (2, Dreg), "vclz", sign_invar_1, su_8_32;
-    Vclz, [], All (2, Qreg), "vclzQ", sign_invar_1, su_8_32;
-
-    (* Count number of set bits.  *)
-    Vcnt, [], All (2, Dreg), "vcnt", bits_1, [P8; S8; U8];
-    Vcnt, [], All (2, Qreg), "vcntQ", bits_1, [P8; S8; U8];
-
-    (* Reciprocal estimate.  *)
-    Vrecpe, [], All (2, Dreg), "vrecpe", elts_same_1, [U32; F32];
-    Vrecpe, [], All (2, Qreg), "vrecpeQ", elts_same_1, [U32; F32];
-
-    (* Reciprocal square-root estimate.  *)
-    Vrsqrte, [], All (2, Dreg), "vrsqrte", elts_same_1, [U32; F32];
-    Vrsqrte, [], All (2, Qreg), "vrsqrteQ", elts_same_1, [U32; F32];
-
-    (* Get lanes from a vector.  *)
-    Vget_lane,
-      [InfoWord; Disassembles_as [Use_operands [| Corereg; Element_of_dreg |]];
-       Instruction_name ["vmov"]],
-      Use_operands [| Corereg; Dreg; Immed |],
-      "vget_lane", get_lane, pf_su_8_32;
-    Vget_lane,
-      [No_op;
-       InfoWord;
-       Disassembles_as [Use_operands [| Corereg; Corereg; Dreg |]];
-       Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
-      Use_operands [| Corereg; Dreg; Immed |],
-      "vget_lane", notype_2, [S64; U64];
-    Vget_lane,
-      [InfoWord; Disassembles_as [Use_operands [| Corereg; Element_of_dreg |]];
-       Instruction_name ["vmov"]],
-      Use_operands [| Corereg; Qreg; Immed |],
-      "vgetQ_lane", get_lane, pf_su_8_32;
-    Vget_lane,
-      [InfoWord;
-       Disassembles_as [Use_operands [| Corereg; Corereg; Dreg |]];
-       Instruction_name ["vmov"; "fmrrd"]; Const_valuator (fun _ -> 0);
-       Fixed_core_reg],
-      Use_operands [| Corereg; Qreg; Immed |],
-      "vgetQ_lane", notype_2, [S64; U64];
-
-    (* Set lanes in a vector.  *)
-    Vset_lane, [Disassembles_as [Use_operands [| Element_of_dreg; Corereg |]];
-                Instruction_name ["vmov"]],
-      Use_operands [| Dreg; Corereg; Dreg; Immed |], "vset_lane",
-      set_lane, pf_su_8_32;
-    Vset_lane, [No_op;
-                Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]];
-                Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; Corereg; Dreg; Immed |], "vset_lane",
-      set_lane_notype, [S64; U64];
-    Vset_lane, [Disassembles_as [Use_operands [| Element_of_dreg; Corereg |]];
-                Instruction_name ["vmov"]],
-      Use_operands [| Qreg; Corereg; Qreg; Immed |], "vsetQ_lane",
-      set_lane, pf_su_8_32;
-    Vset_lane, [Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]];
-                Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
-      Use_operands [| Qreg; Corereg; Qreg; Immed |], "vsetQ_lane",
-      set_lane_notype, [S64; U64];
-
-    (* Create vector from literal bit pattern.  *)
-    Vcreate,
-      [Requires_feature "CRYPTO"; No_op], (* Not really, but it can yield various things that are too
-                                   hard for the test generator at this time.  *)
-      Use_operands [| Dreg; Corereg |], "vcreate", create_vector,
-      [P64];
-    Vcreate,
-      [No_op], (* Not really, but it can yield various things that are too
-                  hard for the test generator at this time.  *)
-      Use_operands [| Dreg; Corereg |], "vcreate", create_vector,
-      pf_su_8_64;
-
-    (* Set all lanes to the same value.  *)
-    Vdup_n,
-      [Disassembles_as [Use_operands [| Dreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Dreg; Corereg |], "vdup_n", bits_1,
-      pf_su_8_32;
-    Vdup_n,
-      [No_op; Requires_feature "CRYPTO";
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Dreg; Corereg |], "vdup_n", notype_1,
-      [P64];
-    Vdup_n,
-      [No_op;
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Dreg; Corereg |], "vdup_n", notype_1,
-      [S64; U64];
-    Vdup_n,
-      [No_op; Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| Qreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Qreg; Corereg |], "vdupQ_n", bits_1,
-      [P64];
-    Vdup_n,
-      [Disassembles_as [Use_operands [| Qreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Qreg; Corereg |], "vdupQ_n", bits_1,
-      pf_su_8_32;
-    Vdup_n,
-      [No_op;
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |];
-                        Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Qreg; Corereg |], "vdupQ_n", notype_1,
-      [S64; U64];
-
-    (* These are just aliases for the above.  *)
-    Vmov_n,
-      [Builtin_name "vdup_n";
-       Disassembles_as [Use_operands [| Dreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Dreg; Corereg |],
-      "vmov_n", bits_1, pf_su_8_32;
-    Vmov_n,
-      [No_op;
-       Builtin_name "vdup_n";
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Dreg; Corereg |],
-      "vmov_n", notype_1, [S64; U64];
-    Vmov_n,
-      [Builtin_name "vdupQ_n";
-       Disassembles_as [Use_operands [| Qreg;
-                                        Alternatives [ Corereg;
-                                                       Element_of_dreg ] |]]],
-      Use_operands [| Qreg; Corereg |],
-      "vmovQ_n", bits_1, pf_su_8_32;
-    Vmov_n,
-      [No_op;
-       Builtin_name "vdupQ_n";
-       Instruction_name ["vmov"];
-       Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |];
-                        Use_operands [| Dreg; Corereg; Corereg |]]],
-      Use_operands [| Qreg; Corereg |],
-      "vmovQ_n", notype_1, [S64; U64];
-
-    (* Duplicate, lane version.  We can't use Use_operands here because the
-       rightmost register (always Dreg) would be picked up by find_key_operand,
-       when we want the leftmost register to be used in this case (otherwise
-       the modes are indistinguishable in neon.md, etc.  *)
-    Vdup_lane,
-      [Disassembles_as [Use_operands [| Dreg; Element_of_dreg |]]],
-      Unary_scalar Dreg, "vdup_lane", bits_2, pf_su_8_32;
-    Vdup_lane,
-      [No_op; Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Unary_scalar Dreg, "vdup_lane", bits_2, [P64];
-    Vdup_lane,
-      [No_op; Const_valuator (fun _ -> 0)],
-      Unary_scalar Dreg, "vdup_lane", bits_2, [S64; U64];
-    Vdup_lane,
-      [Disassembles_as [Use_operands [| Qreg; Element_of_dreg |]]],
-      Unary_scalar Qreg, "vdupQ_lane", bits_2, pf_su_8_32;
-    Vdup_lane,
-      [No_op; Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Unary_scalar Qreg, "vdupQ_lane", bits_2, [P64];
-    Vdup_lane,
-      [No_op; Const_valuator (fun _ -> 0)],
-      Unary_scalar Qreg, "vdupQ_lane", bits_2, [S64; U64];
-
-    (* Combining vectors.  *)
-    Vcombine, [Requires_feature "CRYPTO"; No_op],
-      Use_operands [| Qreg; Dreg; Dreg |], "vcombine", notype_2,
-      [P64];
-    Vcombine, [No_op],
-      Use_operands [| Qreg; Dreg; Dreg |], "vcombine", notype_2,
-      pf_su_8_64;
-
-    (* Splitting vectors.  *)
-    Vget_high, [Requires_feature "CRYPTO"; No_op],
-      Use_operands [| Dreg; Qreg |], "vget_high",
-      notype_1, [P64];
-    Vget_high, [No_op],
-      Use_operands [| Dreg; Qreg |], "vget_high",
-      notype_1, pf_su_8_64;
-    Vget_low, [Instruction_name ["vmov"];
-               Disassembles_as [Use_operands [| Dreg; Dreg |]];
-	       Fixed_vector_reg],
-      Use_operands [| Dreg; Qreg |], "vget_low",
-      notype_1, pf_su_8_32;
-    Vget_low, [Requires_feature "CRYPTO"; No_op],
-      Use_operands [| Dreg; Qreg |], "vget_low",
-      notype_1, [P64];
-    Vget_low, [No_op],
-      Use_operands [| Dreg; Qreg |], "vget_low",
-      notype_1, [S64; U64];
-
-    (* Conversions.  *)
-    Vcvt, [InfoWord], All (2, Dreg), "vcvt", conv_1,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-    Vcvt, [InfoWord], All (2, Qreg), "vcvtQ", conv_1,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-    Vcvt, [Builtin_name "vcvt" ; Requires_FP_bit 1],
-          Use_operands [| Dreg; Qreg; |], "vcvt", conv_1, [Conv (F16, F32)];
-    Vcvt, [Builtin_name "vcvt" ; Requires_FP_bit 1],
-          Use_operands [| Qreg; Dreg; |], "vcvt", conv_1, [Conv (F32, F16)];
-    Vcvt_n, [InfoWord], Use_operands [| Dreg; Dreg; Immed |], "vcvt_n", conv_2,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-    Vcvt_n, [InfoWord], Use_operands [| Qreg; Qreg; Immed |], "vcvtQ_n", conv_2,
-      [Conv (S32, F32); Conv (U32, F32); Conv (F32, S32); Conv (F32, U32)];
-
-    (* Move, narrowing.  *)
-    Vmovn, [Disassembles_as [Use_operands [| Dreg; Qreg |]]],
-      Narrow, "vmovn", sign_invar_1, su_16_64;
-    Vmovn, [Disassembles_as [Use_operands [| Dreg; Qreg |]]; Saturating],
-      Narrow, "vqmovn", elts_same_1, su_16_64;
-    Vmovn,
-      [Disassembles_as [Use_operands [| Dreg; Qreg |]]; Saturating; Dst_unsign],
-      Narrow, "vqmovun", dst_unsign_1,
-      [S16; S32; S64];
-
-    (* Move, long.  *)
-    Vmovl, [Disassembles_as [Use_operands [| Qreg; Dreg |]]],
-      Long, "vmovl", elts_same_1, su_8_32;
-
-    (* Table lookup.  *)
-    Vtbl 1,
-      [Instruction_name ["vtbl"];
-       Disassembles_as [Use_operands [| Dreg; VecArray (1, Dreg); Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg |], "vtbl1", table_2, [U8; S8; P8];
-    Vtbl 2, [Instruction_name ["vtbl"]],
-      Use_operands [| Dreg; VecArray (2, Dreg); Dreg |], "vtbl2", table_2,
-      [U8; S8; P8];
-    Vtbl 3, [Instruction_name ["vtbl"]],
-      Use_operands [| Dreg; VecArray (3, Dreg); Dreg |], "vtbl3", table_2,
-      [U8; S8; P8];
-    Vtbl 4, [Instruction_name ["vtbl"]],
-      Use_operands [| Dreg; VecArray (4, Dreg); Dreg |], "vtbl4", table_2,
-      [U8; S8; P8];
-
-    (* Extended table lookup.  *)
-    Vtbx 1,
-      [Instruction_name ["vtbx"];
-       Disassembles_as [Use_operands [| Dreg; VecArray (1, Dreg); Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg |], "vtbx1", table_io, [U8; S8; P8];
-    Vtbx 2, [Instruction_name ["vtbx"]],
-      Use_operands [| Dreg; VecArray (2, Dreg); Dreg |], "vtbx2", table_io,
-      [U8; S8; P8];
-    Vtbx 3, [Instruction_name ["vtbx"]],
-      Use_operands [| Dreg; VecArray (3, Dreg); Dreg |], "vtbx3", table_io,
-      [U8; S8; P8];
-    Vtbx 4, [Instruction_name ["vtbx"]],
-      Use_operands [| Dreg; VecArray (4, Dreg); Dreg |], "vtbx4", table_io,
-      [U8; S8; P8];
-
-    (* Multiply, lane.  (note: these were undocumented at the time of
-       writing).  *)
-    Vmul_lane, [], By_scalar Dreg, "vmul_lane", sign_invar_2_lane,
-      [S16; S32; U16; U32; F32];
-    Vmul_lane, [], By_scalar Qreg, "vmulQ_lane", sign_invar_2_lane,
-      [S16; S32; U16; U32; F32];
-
-    (* Multiply-accumulate, lane.  *)
-    Vmla_lane, [], By_scalar Dreg, "vmla_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmla_lane, [], By_scalar Qreg, "vmlaQ_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmla_lane, [], Wide_lane, "vmlal_lane", elts_same_io_lane,
-      [S16; S32; U16; U32];
-    Vmla_lane, [Saturating; Doubling], Wide_lane, "vqdmlal_lane",
-      elts_same_io_lane, [S16; S32];
-
-    (* Multiply-subtract, lane.  *)
-    Vmls_lane, [], By_scalar Dreg, "vmls_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmls_lane, [], By_scalar Qreg, "vmlsQ_lane", sign_invar_io_lane,
-      [S16; S32; U16; U32; F32];
-    Vmls_lane, [], Wide_lane, "vmlsl_lane", elts_same_io_lane,
-      [S16; S32; U16; U32];
-    Vmls_lane, [Saturating; Doubling], Wide_lane, "vqdmlsl_lane",
-      elts_same_io_lane, [S16; S32];
-
-    (* Long multiply, lane.  *)
-    Vmull_lane, [],
-      Wide_lane, "vmull_lane", elts_same_2_lane, [S16; S32; U16; U32];
-
-    (* Saturating doubling long multiply, lane.  *)
-    Vqdmull_lane, [Saturating; Doubling],
-      Wide_lane, "vqdmull_lane", elts_same_2_lane, [S16; S32];
-
-    (* Saturating doubling long multiply high, lane.  *)
-    Vqdmulh_lane, [Saturating; Halving],
-      By_scalar Qreg, "vqdmulhQ_lane", elts_same_2_lane, [S16; S32];
-    Vqdmulh_lane, [Saturating; Halving],
-      By_scalar Dreg, "vqdmulh_lane", elts_same_2_lane, [S16; S32];
-    Vqdmulh_lane, [Saturating; Halving; Rounding;
-		   Instruction_name ["vqrdmulh"]],
-      By_scalar Qreg, "vqRdmulhQ_lane", elts_same_2_lane, [S16; S32];
-    Vqdmulh_lane, [Saturating; Halving; Rounding;
-		   Instruction_name ["vqrdmulh"]],
-      By_scalar Dreg, "vqRdmulh_lane", elts_same_2_lane, [S16; S32];
-
-    (* Vector multiply by scalar.  *)
-    Vmul_n, [InfoWord;
-             Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-             Use_operands [| Dreg; Dreg; Corereg |], "vmul_n",
-      sign_invar_2, [S16; S32; U16; U32; F32];
-    Vmul_n, [InfoWord;
-             Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-             Use_operands [| Qreg; Qreg; Corereg |], "vmulQ_n",
-      sign_invar_2, [S16; S32; U16; U32; F32];
-
-    (* Vector long multiply by scalar.  *)
-    Vmull_n, [Instruction_name ["vmull"];
-              Disassembles_as [Use_operands [| Qreg; Dreg; Element_of_dreg |]]],
-              Wide_scalar, "vmull_n",
-      elts_same_2, [S16; S32; U16; U32];
-
-    (* Vector saturating doubling long multiply by scalar.  *)
-    Vqdmull_n, [Saturating; Doubling;
-	        Disassembles_as [Use_operands [| Qreg; Dreg;
-						 Element_of_dreg |]]],
-                Wide_scalar, "vqdmull_n",
-      elts_same_2, [S16; S32];
-
-    (* Vector saturating doubling long multiply high by scalar.  *)
-    Vqdmulh_n,
-      [Saturating; Halving; InfoWord;
-       Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |],
-      "vqdmulhQ_n", elts_same_2, [S16; S32];
-    Vqdmulh_n,
-      [Saturating; Halving; InfoWord;
-       Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |],
-      "vqdmulh_n", elts_same_2, [S16; S32];
-    Vqdmulh_n,
-      [Saturating; Halving; Rounding; InfoWord;
-       Instruction_name ["vqrdmulh"];
-       Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |],
-      "vqRdmulhQ_n", elts_same_2, [S16; S32];
-    Vqdmulh_n,
-      [Saturating; Halving; Rounding; InfoWord;
-       Instruction_name ["vqrdmulh"];
-       Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |],
-      "vqRdmulh_n", elts_same_2, [S16; S32];
-
-    (* Vector multiply-accumulate by scalar.  *)
-    Vmla_n, [InfoWord;
-             Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |], "vmla_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmla_n, [InfoWord;
-             Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |], "vmlaQ_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmla_n, [], Wide_scalar, "vmlal_n", elts_same_io, [S16; S32; U16; U32];
-    Vmla_n, [Saturating; Doubling], Wide_scalar, "vqdmlal_n", elts_same_io,
-      [S16; S32];
-
-    (* Vector multiply subtract by scalar.  *)
-    Vmls_n, [InfoWord;
-             Disassembles_as [Use_operands [| Dreg; Dreg; Element_of_dreg |]]],
-      Use_operands [| Dreg; Dreg; Corereg |], "vmls_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmls_n, [InfoWord;
-             Disassembles_as [Use_operands [| Qreg; Qreg; Element_of_dreg |]]],
-      Use_operands [| Qreg; Qreg; Corereg |], "vmlsQ_n",
-      sign_invar_io, [S16; S32; U16; U32; F32];
-    Vmls_n, [], Wide_scalar, "vmlsl_n", elts_same_io, [S16; S32; U16; U32];
-    Vmls_n, [Saturating; Doubling], Wide_scalar, "vqdmlsl_n", elts_same_io,
-      [S16; S32];
-
-    (* Vector extract.  *)
-    Vext, [Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; Dreg; Dreg; Immed |], "vext", extend,
-      [P64];
-    Vext, [Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; Dreg; Dreg; Immed |], "vext", extend,
-      pf_su_8_64;
-    Vext, [Requires_feature "CRYPTO"; Const_valuator (fun _ -> 0)],
-      Use_operands [| Qreg; Qreg; Qreg; Immed |], "vextQ", extend,
-      [P64];
-    Vext, [Const_valuator (fun _ -> 0)],
-      Use_operands [| Qreg; Qreg; Qreg; Immed |], "vextQ", extend,
-      pf_su_8_64;
-
-    (* Reverse elements.  *)
-    Vrev64, [Use_shuffle (rev_elems 64)], All (2, Dreg), "vrev64", bits_1,
-      P8 :: P16 :: F32 :: su_8_32;
-    Vrev64, [Use_shuffle (rev_elems 64)], All (2, Qreg), "vrev64Q", bits_1,
-      P8 :: P16 :: F32 :: su_8_32;
-    Vrev32, [Use_shuffle (rev_elems 32)], All (2, Dreg), "vrev32", bits_1,
-      [P8; P16; S8; U8; S16; U16];
-    Vrev32, [Use_shuffle (rev_elems 32)], All (2, Qreg), "vrev32Q", bits_1,
-      [P8; P16; S8; U8; S16; U16];
-    Vrev16, [Use_shuffle (rev_elems 16)], All (2, Dreg), "vrev16", bits_1,
-      [P8; S8; U8];
-    Vrev16, [Use_shuffle (rev_elems 16)], All (2, Qreg), "vrev16Q", bits_1,
-      [P8; S8; U8];
-
-    (* Bit selection.  *)
-    Vbsl,
-      [Requires_feature "CRYPTO"; Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Dreg; Dreg; Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg; Dreg |], "vbsl", bit_select,
-      [P64];
-    Vbsl,
-      [Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Dreg; Dreg; Dreg |]]],
-      Use_operands [| Dreg; Dreg; Dreg; Dreg |], "vbsl", bit_select,
-      pf_su_8_64;
-    Vbsl,
-      [Requires_feature "CRYPTO"; Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Qreg; Qreg; Qreg |]]],
-      Use_operands [| Qreg; Qreg; Qreg; Qreg |], "vbslQ", bit_select,
-      [P64];
-    Vbsl,
-      [Instruction_name ["vbsl"; "vbit"; "vbif"];
-       Disassembles_as [Use_operands [| Qreg; Qreg; Qreg |]]],
-      Use_operands [| Qreg; Qreg; Qreg; Qreg |], "vbslQ", bit_select,
-      pf_su_8_64;
-
-    Vtrn, [Use_shuffle trn_elems], Pair_result Dreg, "vtrn", bits_2, pf_su_8_16;
-    Vtrn, [Use_shuffle trn_elems; Instruction_name ["vuzp"]], Pair_result Dreg, "vtrn", bits_2, suf_32;
-    Vtrn, [Use_shuffle trn_elems], Pair_result Qreg, "vtrnQ", bits_2, pf_su_8_32;
-    (* Zip elements.  *)
-    Vzip, [Use_shuffle zip_elems], Pair_result Dreg, "vzip", bits_2, pf_su_8_16;
-    Vzip, [Use_shuffle zip_elems; Instruction_name ["vuzp"]], Pair_result Dreg, "vzip", bits_2, suf_32;
-    Vzip, [Use_shuffle zip_elems], Pair_result Qreg, "vzipQ", bits_2, pf_su_8_32; 
-
-    (* Unzip elements.  *)
-    Vuzp, [Use_shuffle uzip_elems], Pair_result Dreg, "vuzp", bits_2,
-      pf_su_8_32;
-    Vuzp, [Use_shuffle uzip_elems], Pair_result Qreg, "vuzpQ", bits_2,
-      pf_su_8_32;
-
-    (* Element/structure loads.  VLD1 variants.  *)
-    Vldx 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1", bits_1,
-      [P64];
-    Vldx 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1", bits_1,
-      pf_su_8_64;
-    Vldx 1, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (2, Dreg);
-					      CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q", bits_1,
-      [P64];
-    Vldx 1, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-					      CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q", bits_1,
-      pf_su_8_64;
-
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |],
-      "vld1_lane", bits_3, pf_su_8_32;
-    Vldx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |],
-      "vld1_lane", bits_3, [P64];
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| Dreg; CstPtrTo Corereg; Dreg; Immed |],
-      "vld1_lane", bits_3, [S64; U64];
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |],
-      "vld1Q_lane", bits_3, pf_su_8_32;
-    Vldx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |],
-      "vld1Q_lane", bits_3, [P64];
-    Vldx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg; Qreg; Immed |],
-      "vld1Q_lane", bits_3, [S64; U64];
-
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (1, All_elements_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup",
-      bits_1, pf_su_8_32;
-    Vldx_dup 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup",
-      bits_1, [P64];
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Dreg; CstPtrTo Corereg |], "vld1_dup",
-      bits_1, [S64; U64];
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (2, All_elements_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
-      bits_1, pf_su_8_32;
-    (* Treated identically to vld1_dup above as we now
-       do a single load followed by a duplicate.  *)
-    Vldx_dup 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
-      bits_1, [P64];
-    Vldx_dup 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| Qreg; CstPtrTo Corereg |], "vld1Q_dup",
-      bits_1, [S64; U64];
-
-    (* VST1 variants.  *)
-    Vstx 1, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Dreg |], "vst1",
-      store_1, [P64];
-    Vstx 1, [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Dreg |], "vst1",
-      store_1, pf_su_8_64;
-    Vstx 1, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (2, Dreg);
-					      PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg |], "vst1Q",
-      store_1, [P64];
-    Vstx 1, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-					      PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg |], "vst1Q",
-      store_1, pf_su_8_64;
-
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Dreg; Immed |],
-      "vst1_lane", store_3, pf_su_8_32;
-    Vstx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| PtrTo Corereg; Dreg; Immed |],
-      "vst1_lane", store_3, [P64];
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]];
-       Const_valuator (fun _ -> 0)],
-      Use_operands [| PtrTo Corereg; Dreg; Immed |],
-      "vst1_lane", store_3, [U64; S64];
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Element_of_dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg; Immed |],
-      "vst1Q_lane", store_3, pf_su_8_32;
-    Vstx_lane 1,
-      [Requires_feature "CRYPTO";
-       Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg; Immed |],
-      "vst1Q_lane", store_3, [P64];
-    Vstx_lane 1,
-      [Disassembles_as [Use_operands [| VecArray (1, Dreg);
-                                        CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; Qreg; Immed |],
-      "vst1Q_lane", store_3, [U64; S64];
-
-    (* VLD2 variants.  *)
-    Vldx 2, [], Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2", bits_1, pf_su_8_32;
-    Vldx 2, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]],
-       Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2", bits_1, [P64];
-    Vldx 2, [Instruction_name ["vld1"]],
-       Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2", bits_1, [S64; U64];
-    Vldx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              CstPtrTo Corereg |];
-                              Use_operands [| VecArray (2, Dreg);
-					      CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Qreg); CstPtrTo Corereg |],
-      "vld2Q", bits_1, pf_su_8_32;
-
-    Vldx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg;
-                      VecArray (2, Dreg); Immed |],
-      "vld2_lane", bits_3, P8 :: P16 :: F32 :: su_8_32;
-    Vldx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Qreg); CstPtrTo Corereg;
- 	              VecArray (2, Qreg); Immed |],
-      "vld2Q_lane", bits_3, [P16; F32; U16; U32; S16; S32];
-
-    Vldx_dup 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, All_elements_of_dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2_dup", bits_1, pf_su_8_32;
-    Vldx_dup 2,
-      [Requires_feature "CRYPTO";
-       Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (2, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2_dup", bits_1, [P64];
-    Vldx_dup 2,
-      [Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (2, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (2, Dreg); CstPtrTo Corereg |],
-      "vld2_dup", bits_1, [S64; U64];
-
-    (* VST2 variants.  *)
-    Vstx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2",
-      store_1, pf_su_8_32;
-    Vstx 2, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2",
-      store_1, [P64];
-    Vstx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg) |], "vst2",
-      store_1, [S64; U64];
-    Vstx 2, [Disassembles_as [Use_operands [| VecArray (2, Dreg);
-					      PtrTo Corereg |];
-                              Use_operands [| VecArray (2, Dreg);
-				              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Qreg) |], "vst2Q",
-      store_1, pf_su_8_32;
-
-    Vstx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Dreg); Immed |], "vst2_lane",
-      store_3, P8 :: P16 :: F32 :: su_8_32;
-    Vstx_lane 2,
-      [Disassembles_as [Use_operands
-        [| VecArray (2, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (2, Qreg); Immed |], "vst2Q_lane",
-      store_3, [P16; F32; U16; U32; S16; S32];
-
-    (* VLD3 variants.  *)
-    Vldx 3, [], Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3", bits_1, pf_su_8_32;
-    Vldx 3, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3", bits_1, [P64];
-    Vldx 3, [Instruction_name ["vld1"]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3", bits_1, [S64; U64];
-    Vldx 3, [Disassembles_as [Use_operands [| VecArray (3, Dreg);
-					      CstPtrTo Corereg |];
-                              Use_operands [| VecArray (3, Dreg);
-					      CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Qreg); CstPtrTo Corereg |],
-      "vld3Q", bits_1, P8 :: P16 :: F32 :: su_8_32;
-
-    Vldx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg;
-                                     VecArray (3, Dreg); Immed |],
-      "vld3_lane", bits_3, P8 :: P16 :: F32 :: su_8_32;
-    Vldx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Qreg); CstPtrTo Corereg;
-				     VecArray (3, Qreg); Immed |],
-      "vld3Q_lane", bits_3, [P16; F32; U16; U32; S16; S32];
-
-    Vldx_dup 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, All_elements_of_dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3_dup", bits_1, pf_su_8_32;
-    Vldx_dup 3,
-      [Requires_feature "CRYPTO";
-       Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (3, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3_dup", bits_1, [P64];
-    Vldx_dup 3,
-      [Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (3, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (3, Dreg); CstPtrTo Corereg |],
-      "vld3_dup", bits_1, [S64; U64];
-
-    (* VST3 variants.  *)
-    Vstx 3, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3",
-      store_1, pf_su_8_32;
-    Vstx 3, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3",
-      store_1, [P64];
-    Vstx 3, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg) |], "vst3",
-      store_1, [S64; U64];
-    Vstx 3, [Disassembles_as [Use_operands [| VecArray (3, Dreg);
-					      PtrTo Corereg |];
-                              Use_operands [| VecArray (3, Dreg);
-					      PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Qreg) |], "vst3Q",
-      store_1, pf_su_8_32;
-
-    Vstx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Dreg); Immed |], "vst3_lane",
-      store_3, P8 :: P16 :: F32 :: su_8_32;
-    Vstx_lane 3,
-      [Disassembles_as [Use_operands
-        [| VecArray (3, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (3, Qreg); Immed |], "vst3Q_lane",
-      store_3, [P16; F32; U16; U32; S16; S32];
-
-    (* VLD4/VST4 variants.  *)
-    Vldx 4, [], Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4", bits_1, pf_su_8_32;
-    Vldx 4, [Requires_feature "CRYPTO"; Instruction_name ["vld1"]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4", bits_1, [P64];
-    Vldx 4, [Instruction_name ["vld1"]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4", bits_1, [S64; U64];
-    Vldx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-					      CstPtrTo Corereg |];
-                              Use_operands [| VecArray (4, Dreg);
-					      CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Qreg); CstPtrTo Corereg |],
-      "vld4Q", bits_1, P8 :: P16 :: F32 :: su_8_32;
-
-    Vldx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg;
-                                     VecArray (4, Dreg); Immed |],
-      "vld4_lane", bits_3, P8 :: P16 :: F32 :: su_8_32;
-    Vldx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Qreg); CstPtrTo Corereg;
-   	              VecArray (4, Qreg); Immed |],
-      "vld4Q_lane", bits_3, [P16; F32; U16; U32; S16; S32];
-
-    Vldx_dup 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, All_elements_of_dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4_dup", bits_1, pf_su_8_32;
-    Vldx_dup 4,
-      [Requires_feature "CRYPTO";
-       Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (4, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4_dup", bits_1, [P64];
-    Vldx_dup 4,
-      [Instruction_name ["vld1"]; Disassembles_as [Use_operands
-        [| VecArray (4, Dreg); CstPtrTo Corereg |]]],
-      Use_operands [| VecArray (4, Dreg); CstPtrTo Corereg |],
-      "vld4_dup", bits_1, [S64; U64];
-
-    Vstx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4",
-      store_1, pf_su_8_32;
-    Vstx 4, [Requires_feature "CRYPTO";
-             Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4",
-      store_1, [P64];
-    Vstx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-                                              PtrTo Corereg |]];
-             Instruction_name ["vst1"]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg) |], "vst4",
-      store_1, [S64; U64];
-    Vstx 4, [Disassembles_as [Use_operands [| VecArray (4, Dreg);
-					      PtrTo Corereg |];
-                              Use_operands [| VecArray (4, Dreg);
-					      PtrTo Corereg |]]],
-     Use_operands [| PtrTo Corereg; VecArray (4, Qreg) |], "vst4Q",
-      store_1, pf_su_8_32;
-
-    Vstx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Dreg); Immed |], "vst4_lane",
-      store_3, P8 :: P16 :: F32 :: su_8_32;
-    Vstx_lane 4,
-      [Disassembles_as [Use_operands
-        [| VecArray (4, Element_of_dreg);
-           CstPtrTo Corereg |]]],
-      Use_operands [| PtrTo Corereg; VecArray (4, Qreg); Immed |], "vst4Q_lane",
-      store_3, [P16; F32; U16; U32; S16; S32];
-
-    (* Logical operations. And.  *)
-    Vand, [], All (3, Dreg), "vand", notype_2, su_8_32;
-    Vand, [No_op], All (3, Dreg), "vand", notype_2, [S64; U64];
-    Vand, [], All (3, Qreg), "vandQ", notype_2, su_8_64;
-
-    (* Or.  *)
-    Vorr, [], All (3, Dreg), "vorr", notype_2, su_8_32;
-    Vorr, [No_op], All (3, Dreg), "vorr", notype_2, [S64; U64];
-    Vorr, [], All (3, Qreg), "vorrQ", notype_2, su_8_64;
-
-    (* Eor.  *)
-    Veor, [], All (3, Dreg), "veor", notype_2, su_8_32;
-    Veor, [No_op], All (3, Dreg), "veor", notype_2, [S64; U64];
-    Veor, [], All (3, Qreg), "veorQ", notype_2, su_8_64;
-
-    (* Bic (And-not).  *)
-    Vbic, [Compiler_optim "-O2"], All (3, Dreg), "vbic", notype_2, su_8_32;
-    Vbic, [No_op; Compiler_optim "-O2"], All (3, Dreg), "vbic", notype_2, [S64; U64];
-    Vbic, [Compiler_optim "-O2"], All (3, Qreg), "vbicQ", notype_2, su_8_64;
-
-    (* Or-not.  *)
-    Vorn, [Compiler_optim "-O2"], All (3, Dreg), "vorn", notype_2, su_8_32;
-    Vorn, [No_op; Compiler_optim "-O2"], All (3, Dreg), "vorn", notype_2, [S64; U64];
-    Vorn, [Compiler_optim "-O2"], All (3, Qreg), "vornQ", notype_2, su_8_64;
-  ]
-
-let type_in_crypto_only t
-  = (t == P64) || (t == P128)
-
-let cross_product s1 s2
-  = List.filter (fun (e, e') -> e <> e')
-                (List.concat (List.map (fun e1 -> List.map (fun e2 -> (e1,e2)) s1) s2))
-
-let reinterp =
-  let elems = P8 :: P16 :: F32 :: P64 :: su_8_64 in
-  let casts = cross_product elems elems in
-  List.map
-    (fun (convto, convfrom) ->
-       Vreinterp, (if (type_in_crypto_only convto) || (type_in_crypto_only convfrom)
-                   then [Requires_feature "CRYPTO"] else []) @ [No_op], Use_operands [| Dreg; Dreg |],
-                   "vreinterpret", conv_1, [Cast (convto, convfrom)])
-    casts
-
-let reinterpq =
-  let elems = P8 :: P16 :: F32 :: P64 :: P128 :: su_8_64 in
-  let casts = cross_product elems elems in
-  List.map
-    (fun (convto, convfrom) ->
-       Vreinterp, (if (type_in_crypto_only convto) || (type_in_crypto_only convfrom)
-                   then [Requires_feature "CRYPTO"] else []) @ [No_op], Use_operands [| Qreg; Qreg |],
-                   "vreinterpretQ", conv_1, [Cast (convto, convfrom)])
-    casts
-
-(* Output routines.  *)
-
-let rec string_of_elt = function
-    S8 -> "s8" | S16 -> "s16" | S32 -> "s32" | S64 -> "s64"
-  | U8 -> "u8" | U16 -> "u16" | U32 -> "u32" | U64 -> "u64"
-  | I8 -> "i8" | I16 -> "i16" | I32 -> "i32" | I64 -> "i64"
-  | B8 -> "8" | B16 -> "16" | B32 -> "32" | B64 -> "64"
-  | F16 -> "f16" | F32 -> "f32" | P8 -> "p8" | P16 -> "p16"
-  | P64 -> "p64" | P128 -> "p128"
-  | Conv (a, b) | Cast (a, b) -> string_of_elt a ^ "_" ^ string_of_elt b
-  | NoElts -> failwith "No elts"
-
-let string_of_elt_dots elt =
-  match elt with
-    Conv (a, b) | Cast (a, b) -> string_of_elt a ^ "." ^ string_of_elt b
-  | _ -> string_of_elt elt
-
-let string_of_vectype vt =
-  let rec name affix = function
-    T_int8x8 -> affix "int8x8"
-  | T_int8x16 -> affix "int8x16"
-  | T_int16x4 -> affix "int16x4"
-  | T_int16x8 -> affix "int16x8"
-  | T_int32x2 -> affix "int32x2"
-  | T_int32x4 -> affix "int32x4"
-  | T_int64x1 -> affix "int64x1"
-  | T_int64x2 -> affix "int64x2"
-  | T_uint8x8 -> affix "uint8x8"
-  | T_uint8x16 -> affix "uint8x16"
-  | T_uint16x4 -> affix "uint16x4"
-  | T_uint16x8 -> affix "uint16x8"
-  | T_uint32x2 -> affix "uint32x2"
-  | T_uint32x4 -> affix "uint32x4"
-  | T_uint64x1 -> affix "uint64x1"
-  | T_uint64x2 -> affix "uint64x2"
-  | T_float16x4 -> affix "float16x4"
-  | T_float32x2 -> affix "float32x2"
-  | T_float32x4 -> affix "float32x4"
-  | T_poly8x8 -> affix "poly8x8"
-  | T_poly8x16 -> affix "poly8x16"
-  | T_poly16x4 -> affix "poly16x4"
-  | T_poly16x8 -> affix "poly16x8"
-  | T_int8 -> affix "int8"
-  | T_int16 -> affix "int16"
-  | T_int32 -> affix "int32"
-  | T_int64 -> affix "int64"
-  | T_uint8 -> affix "uint8"
-  | T_uint16 -> affix "uint16"
-  | T_uint32 -> affix "uint32"
-  | T_uint64 -> affix "uint64"
-  | T_poly8 -> affix "poly8"
-  | T_poly16 -> affix "poly16"
-  | T_poly64 -> affix "poly64"
-  | T_poly64x1 -> affix "poly64x1"
-  | T_poly64x2 -> affix "poly64x2"
-  | T_poly128 -> affix "poly128"
-  | T_float16 -> affix "float16"
-  | T_float32 -> affix "float32"
-  | T_immediate _ -> "const int"
-  | T_void -> "void"
-  | T_intQI -> "__builtin_neon_qi"
-  | T_intHI -> "__builtin_neon_hi"
-  | T_intSI -> "__builtin_neon_si"
-  | T_intDI -> "__builtin_neon_di"
-  | T_intTI -> "__builtin_neon_ti"
-  | T_floatHF -> "__builtin_neon_hf"
-  | T_floatSF -> "__builtin_neon_sf"
-  | T_arrayof (num, base) ->
-      let basename = name (fun x -> x) base in
-      affix (Printf.sprintf "%sx%d" basename num)
-  | T_ptrto x ->
-      let basename = name affix x in
-      Printf.sprintf "%s *" basename
-  | T_const x ->
-      let basename = name affix x in
-      Printf.sprintf "const %s" basename
-  in
-    name (fun x -> x ^ "_t") vt
-
-let string_of_inttype = function
-    B_TImode -> "__builtin_neon_ti"
-  | B_EImode -> "__builtin_neon_ei"
-  | B_OImode -> "__builtin_neon_oi"
-  | B_CImode -> "__builtin_neon_ci"
-  | B_XImode -> "__builtin_neon_xi"
-
-let string_of_mode = function
-    V8QI -> "v8qi" | V4HI -> "v4hi" | V4HF  -> "v4hf"  | V2SI -> "v2si"
-  | V2SF -> "v2sf" | DI   -> "di"   | V16QI -> "v16qi" | V8HI -> "v8hi"
-  | V4SI -> "v4si" | V4SF -> "v4sf" | V2DI  -> "v2di"  | QI   -> "qi"
-  | HI -> "hi" | SI -> "si" | SF -> "sf" | TI -> "ti"
-
-(* Use uppercase chars for letters which form part of the intrinsic name, but
-   should be omitted from the builtin name (the info is passed in an extra
-   argument, instead).  *)
-let intrinsic_name name = String.lowercase name
-
-(* Allow the name of the builtin to be overridden by things (e.g. Flipped)
-   found in the features list.  *)
-let builtin_name features name =
-  let name = List.fold_right
-               (fun el name ->
-                 match el with
-                   Flipped x | Builtin_name x -> x
-                 | _ -> name)
-               features name in
-  let islower x = let str = String.make 1 x in (String.lowercase str) = str
-  and buf = Buffer.create (String.length name) in
-  String.iter (fun c -> if islower c then Buffer.add_char buf c) name;
-  Buffer.contents buf
-
-(* Transform an arity into a list of strings.  *)
-let strings_of_arity a =
-  match a with
-  | Arity0 vt -> [string_of_vectype vt]
-  | Arity1 (vt1, vt2) -> [string_of_vectype vt1; string_of_vectype vt2]
-  | Arity2 (vt1, vt2, vt3) -> [string_of_vectype vt1;
-			       string_of_vectype vt2;
-                               string_of_vectype vt3]
-  | Arity3 (vt1, vt2, vt3, vt4) -> [string_of_vectype vt1;
-                                    string_of_vectype vt2;
-                                    string_of_vectype vt3;
-                                    string_of_vectype vt4]
-  | Arity4 (vt1, vt2, vt3, vt4, vt5) -> [string_of_vectype vt1;
-                                         string_of_vectype vt2;
-                                         string_of_vectype vt3;
-                                         string_of_vectype vt4;
-                                         string_of_vectype vt5]
-
-(* Suffixes on the end of builtin names that are to be stripped in order
-   to obtain the name used as an instruction.  They are only stripped if
-   preceded immediately by an underscore.  *)
-let suffixes_to_strip = [ "n"; "lane"; "dup" ]
-
-(* Get the possible names of an instruction corresponding to a "name" from the
-   ops table.  This is done by getting the equivalent builtin name and
-   stripping any suffixes from the list at the top of this file, unless
-   the features list presents with an Instruction_name entry, in which
-   case that is used; or unless the features list presents with a Flipped
-   entry, in which case that is used.  If both such entries are present,
-   the first in the list will be chosen.  *)
-let get_insn_names features name =
-  let names = try
-  begin
-    match List.find (fun feature -> match feature with
-                                      Instruction_name _ -> true
-				    | Flipped _ -> true
-				    | _ -> false) features
-    with
-      Instruction_name names -> names
-    | Flipped name -> [name]
-    | _ -> assert false
-  end
-  with Not_found -> [builtin_name features name]
-  in
-  begin
-    List.map (fun name' ->
-      try
-        let underscore = String.rindex name' '_' in
-        let our_suffix = String.sub name' (underscore + 1)
-                                    ((String.length name') - underscore - 1)
-        in
-          let rec strip remaining_suffixes =
-            match remaining_suffixes with
-              [] -> name'
-            | s::ss when our_suffix = s -> String.sub name' 0 underscore
-            | _::ss -> strip ss
-          in
-            strip suffixes_to_strip
-      with (Not_found | Invalid_argument _) -> name') names
-  end
-
-(* Apply a function to each element of a list and then comma-separate
-   the resulting strings.  *)
-let rec commas f elts acc =
-  match elts with
-    [] -> acc
-  | [elt] -> acc ^ (f elt)
-  | elt::elts ->
-    commas f elts (acc ^ (f elt) ^ ", ")
-
-(* Given a list of features and the shape specified in the "ops" table, apply
-   a function to each possible shape that the instruction may have.
-   By default, this is the "shape" entry in "ops".  If the features list
-   contains a Disassembles_as entry, the shapes contained in that entry are
-   mapped to corresponding outputs and returned in a list.  If there is more
-   than one Disassembles_as entry, only the first is used.  *)
-let analyze_all_shapes features shape f =
-  try
-    match List.find (fun feature ->
-                       match feature with Disassembles_as _ -> true
-                                        | _ -> false)
-                    features with
-      Disassembles_as shapes -> List.map f shapes
-    | _ -> assert false
-  with Not_found -> [f shape]
-
-(* The crypto intrinsics have unconventional shapes and are not that
-   numerous to be worth the trouble of encoding here.  We implement them
-   explicitly here.  *)
-let crypto_intrinsics =
-"
-#ifdef __ARM_FEATURE_CRYPTO
-
-__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
-vldrq_p128 (poly128_t const * __ptr)
-{
-#ifdef __ARM_BIG_ENDIAN
-  poly64_t* __ptmp = (poly64_t*) __ptr;
-  poly64_t __d0 = vld1_p64 (__ptmp);
-  poly64_t __d1 = vld1_p64 (__ptmp + 1);
-  return vreinterpretq_p128_p64 (vcombine_p64 (__d1, __d0));
-#else
-  return vreinterpretq_p128_p64 (vld1q_p64 ((poly64_t*) __ptr));
-#endif
-}
-
-__extension__ static __inline void __attribute__ ((__always_inline__))
-vstrq_p128 (poly128_t * __ptr, poly128_t __val)
-{
-#ifdef __ARM_BIG_ENDIAN
-  poly64x2_t __tmp = vreinterpretq_p64_p128 (__val);
-  poly64_t __d0 = vget_high_p64 (__tmp);
-  poly64_t __d1 = vget_low_p64 (__tmp);
-  vst1q_p64 ((poly64_t*) __ptr, vcombine_p64 (__d0, __d1));
-#else
-  vst1q_p64 ((poly64_t*) __ptr, vreinterpretq_p64_p128 (__val));
-#endif
-}
-
-/* The vceq_p64 intrinsic does not map to a single instruction.
-   Instead we emulate it by performing a 32-bit variant of the vceq
-   and applying a pairwise min reduction to the result.
-   vceq_u32 will produce two 32-bit halves, each of which will contain either
-   all ones or all zeros depending on whether the corresponding 32-bit
-   halves of the poly64_t were equal.  The whole poly64_t values are equal
-   if and only if both halves are equal, i.e. vceq_u32 returns all ones.
-   If the result is all zeroes for any half then the whole result is zeroes.
-   This is what the pairwise min reduction achieves.  */
-
-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
-vceq_p64 (poly64x1_t __a, poly64x1_t __b)
-{
-  uint32x2_t __t_a = vreinterpret_u32_p64 (__a);
-  uint32x2_t __t_b = vreinterpret_u32_p64 (__b);
-  uint32x2_t __c = vceq_u32 (__t_a, __t_b);
-  uint32x2_t __m = vpmin_u32 (__c, __c);
-  return vreinterpret_u64_u32 (__m);
-}
-
-/* The vtst_p64 intrinsic does not map to a single instruction.
-   We emulate it in way similar to vceq_p64 above but here we do
-   a reduction with max since if any two corresponding bits
-   in the two poly64_t's match, then the whole result must be all ones.  */
-
-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
-vtst_p64 (poly64x1_t __a, poly64x1_t __b)
-{
-  uint32x2_t __t_a = vreinterpret_u32_p64 (__a);
-  uint32x2_t __t_b = vreinterpret_u32_p64 (__b);
-  uint32x2_t __c = vtst_u32 (__t_a, __t_b);
-  uint32x2_t __m = vpmax_u32 (__c, __c);
-  return vreinterpret_u64_u32 (__m);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaeseq_u8 (uint8x16_t __data, uint8x16_t __key)
-{
-  return __builtin_arm_crypto_aese (__data, __key);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaesdq_u8 (uint8x16_t __data, uint8x16_t __key)
-{
-  return __builtin_arm_crypto_aesd (__data, __key);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaesmcq_u8 (uint8x16_t __data)
-{
-  return __builtin_arm_crypto_aesmc (__data);
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vaesimcq_u8 (uint8x16_t __data)
-{
-  return __builtin_arm_crypto_aesimc (__data);
-}
-
-__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
-vsha1h_u32 (uint32_t __hash_e)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  __t = __builtin_arm_crypto_sha1h (__t);
-  return vgetq_lane_u32 (__t, 0);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1cq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  return __builtin_arm_crypto_sha1c (__hash_abcd, __t, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1pq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  return __builtin_arm_crypto_sha1p (__hash_abcd, __t, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1mq_u32 (uint32x4_t __hash_abcd, uint32_t __hash_e, uint32x4_t __wk)
-{
-  uint32x4_t __t = vdupq_n_u32 (0);
-  __t = vsetq_lane_u32 (__hash_e, __t, 0);
-  return __builtin_arm_crypto_sha1m (__hash_abcd, __t, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7, uint32x4_t __w8_11)
-{
-  return __builtin_arm_crypto_sha1su0 (__w0_3, __w4_7, __w8_11);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha1su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w12_15)
-{
-  return __builtin_arm_crypto_sha1su1 (__tw0_3, __w12_15);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256hq_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk)
-{
-  return __builtin_arm_crypto_sha256h (__hash_abcd, __hash_efgh, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256h2q_u32 (uint32x4_t __hash_abcd, uint32x4_t __hash_efgh, uint32x4_t __wk)
-{
-  return __builtin_arm_crypto_sha256h2 (__hash_abcd, __hash_efgh, __wk);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256su0q_u32 (uint32x4_t __w0_3, uint32x4_t __w4_7)
-{
-  return __builtin_arm_crypto_sha256su0 (__w0_3, __w4_7);
-}
-
-__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
-vsha256su1q_u32 (uint32x4_t __tw0_3, uint32x4_t __w8_11, uint32x4_t __w12_15)
-{
-  return __builtin_arm_crypto_sha256su1 (__tw0_3, __w8_11, __w12_15);
-}
-
-__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
-vmull_p64 (poly64_t __a, poly64_t __b)
-{
-  return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __a, (uint64_t) __b);
-}
-
-__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
-vmull_high_p64 (poly64x2_t __a, poly64x2_t __b)
-{
-  poly64_t __t1 = vget_high_p64 (__a);
-  poly64_t __t2 = vget_high_p64 (__b);
-
-  return (poly128_t) __builtin_arm_crypto_vmullp64 ((uint64_t) __t1, (uint64_t) __t2);
-}
-
-#endif
-"
diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index 18ed766e0e8..7371f294df2 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -9641,7 +9641,9 @@ avr_asm_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
             {
               const char *sname = ACONCAT ((new_prefix,
                                             name + strlen (old_prefix), NULL));
-              return get_section (sname, sect->common.flags, sect->named.decl);
+              return get_section (sname,
+                                  sect->common.flags & ~SECTION_DECLARED,
+                                  sect->named.decl);
             }
         }
 
diff --git a/gcc/config/avr/avr.opt b/gcc/config/avr/avr.opt
index 05aa4b6db98..1af792b8df0 100644
--- a/gcc/config/avr/avr.opt
+++ b/gcc/config/avr/avr.opt
@@ -97,7 +97,7 @@ Warn if the ISR is misspelled, i.e. without __vector prefix. Enabled by default.
 
 mfract-convert-truncate
 Target Report Mask(FRACT_CONV_TRUNC)
-Allow to use truncation instead of rounding towards 0 for fractional int types.
+Allow to use truncation instead of rounding towards zero for fractional fixed-point types.
 
 nodevicelib
 Driver Target Report RejectNegative
diff --git a/gcc/config/ft32/ft32.c b/gcc/config/ft32/ft32.c
index 26e5a92195a..216a8040428 100644
--- a/gcc/config/ft32/ft32.c
+++ b/gcc/config/ft32/ft32.c
@@ -35,6 +35,7 @@
 #include "calls.h"
 #include "expr.h"
 #include "builtins.h"
+#include "print-tree.h"
 
 /* This file should be included last.  */
 #include "target-def.h"
@@ -895,6 +896,48 @@ yes:
   return 1;
 }
 
+#undef TARGET_ENCODE_SECTION_INFO
+#define TARGET_ENCODE_SECTION_INFO  ft32_elf_encode_section_info
+
+void
+ft32_elf_encode_section_info (tree decl, rtx rtl, int first)
+{
+  enum tree_code code;
+  rtx symbol;
+
+  /* Careful not to prod global register variables.  */
+  if (!MEM_P (rtl))
+    return;
+  symbol = XEXP (rtl, 0);
+  if (GET_CODE (symbol) != SYMBOL_REF)
+    return;
+
+  default_encode_section_info (decl, rtl, first);
+
+  code = TREE_CODE (decl);
+  switch (TREE_CODE_CLASS (code))
+    {
+    case tcc_declaration:
+      {
+	tree type = TREE_TYPE (decl);
+	int is_flash = (type && TYPE_P (type)
+			&& !ADDR_SPACE_GENERIC_P (TYPE_ADDR_SPACE (type)));
+	if ((code == VAR_DECL) && !is_flash)
+	  SYMBOL_REF_FLAGS (symbol) |= 0x1000;
+      }
+      break;
+
+    case tcc_constant:
+    case tcc_exceptional:
+      if (code == STRING_CST)
+	SYMBOL_REF_FLAGS (symbol) |= 0x1000;
+      break;
+
+    default:
+      break;
+    }
+}
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-ft32.h"
diff --git a/gcc/config/ft32/ft32.h b/gcc/config/ft32/ft32.h
index 7c3a678b9a7..dd40b1de0b6 100644
--- a/gcc/config/ft32/ft32.h
+++ b/gcc/config/ft32/ft32.h
@@ -506,4 +506,14 @@ do { \
 
 extern int ft32_is_mem_pm(rtx o);
 
+#define ASM_OUTPUT_SYMBOL_REF(stream, sym) \
+  do { \
+    assemble_name (stream, XSTR (sym, 0)); \
+    int section_debug = in_section && \
+      (SECTION_STYLE (in_section) == SECTION_NAMED) && \
+      (in_section->named.common.flags & SECTION_DEBUG); \
+    if (!section_debug && SYMBOL_REF_FLAGS (sym) & 0x1000) \
+      asm_fprintf (stream, "-0x800000"); \
+  } while (0)
+
 #endif /* GCC_FT32_H */
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 73e631e3963..9eaf4144965 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -19610,12 +19610,29 @@ ix86_expand_vector_move (machine_mode mode, rtx operands[])
      of the register, once we have that information we may be able
      to handle some of them more efficiently.  */
   if (can_create_pseudo_p ()
-      && register_operand (op0, mode)
       && (CONSTANT_P (op1)
 	  || (SUBREG_P (op1)
 	      && CONSTANT_P (SUBREG_REG (op1))))
-      && !standard_sse_constant_p (op1, mode))
-    op1 = validize_mem (force_const_mem (mode, op1));
+      && ((register_operand (op0, mode)
+	   && !standard_sse_constant_p (op1, mode))
+	  /* ix86_expand_vector_move_misalign() does not like constants.  */
+	  || (SSE_REG_MODE_P (mode)
+	      && MEM_P (op0)
+	      && MEM_ALIGN (op0) < align)))
+    {
+      if (SUBREG_P (op1))
+	{
+	  machine_mode imode = GET_MODE (SUBREG_REG (op1));
+	  rtx r = force_const_mem (imode, SUBREG_REG (op1));
+	  if (r)
+	    r = validize_mem (r);
+	  else
+	    r = force_reg (imode, SUBREG_REG (op1));
+	  op1 = simplify_gen_subreg (mode, r, imode, SUBREG_BYTE (op1));
+	}
+      else
+	op1 = validize_mem (force_const_mem (mode, op1));
+    }
 
   /* We need to check memory alignment for SSE mode since attribute
      can make operands unaligned.  */
@@ -19626,13 +19643,8 @@ ix86_expand_vector_move (machine_mode mode, rtx operands[])
     {
       rtx tmp[2];
 
-      /* ix86_expand_vector_move_misalign() does not like constants ... */
-      if (CONSTANT_P (op1)
-	  || (SUBREG_P (op1)
-	      && CONSTANT_P (SUBREG_REG (op1))))
-	op1 = validize_mem (force_const_mem (mode, op1));
-
-      /* ... nor both arguments in memory.  */
+      /* ix86_expand_vector_move_misalign() does not like both
+	 arguments in memory.  */
       if (!register_operand (op0, mode)
 	  && !register_operand (op1, mode))
 	op1 = force_reg (mode, op1);
@@ -24295,6 +24307,33 @@ ix86_expand_vec_perm (rtx operands[])
   e = GET_MODE_UNIT_SIZE (mode);
   gcc_assert (w <= 64);
 
+  if (TARGET_AVX512F && one_operand_shuffle)
+    {
+      rtx (*gen) (rtx, rtx, rtx) = NULL;
+      switch (mode)
+	{
+	case V16SImode:
+	  gen =gen_avx512f_permvarv16si;
+	  break;
+	case V16SFmode:
+	  gen = gen_avx512f_permvarv16sf;
+	  break;
+	case V8DImode:
+	  gen = gen_avx512f_permvarv8di;
+	  break;
+	case V8DFmode:
+	  gen = gen_avx512f_permvarv8df;
+	  break;
+	default:
+	  break;
+	}
+      if (gen != NULL)
+	{
+	  emit_insn (gen (target, op0, mask));
+	  return;
+	}
+    }
+
   if (ix86_expand_vec_perm_vpermi2 (target, op0, mask, op1, NULL))
     return;
 
@@ -50432,6 +50471,52 @@ canonicalize_vector_int_perm (const struct expand_vec_perm_d *d,
   return true;
 }
 
+/* Try to expand one-operand permutation with constant mask.  */
+
+static bool
+ix86_expand_vec_one_operand_perm_avx512 (struct expand_vec_perm_d *d)
+{
+  machine_mode mode = GET_MODE (d->op0);
+  machine_mode maskmode = mode;
+  rtx (*gen) (rtx, rtx, rtx) = NULL;
+  rtx target, op0, mask;
+  rtx vec[64];
+
+  if (!rtx_equal_p (d->op0, d->op1))
+    return false;
+
+  if (!TARGET_AVX512F)
+    return false;
+
+  switch (mode)
+    {
+    case V16SImode:
+      gen = gen_avx512f_permvarv16si;
+      break;
+    case V16SFmode:
+      gen = gen_avx512f_permvarv16sf;
+      maskmode = V16SImode;
+      break;
+    case V8DImode:
+      gen = gen_avx512f_permvarv8di;
+      break;
+    case V8DFmode:
+      gen = gen_avx512f_permvarv8df;
+      maskmode = V8DImode;
+      break;
+    default:
+      return false;
+    }
+
+  target = d->target;
+  op0 = d->op0;
+  for (int i = 0; i < d->nelt; ++i)
+    vec[i] = GEN_INT (d->perm[i]);
+  mask = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (d->nelt, vec));
+  emit_insn (gen (target, op0, force_reg (maskmode, mask)));
+  return true;
+}
+
 /* A subroutine of ix86_expand_vec_perm_builtin_1.  Try to instantiate D
    in a single instruction.  */
 
@@ -50599,6 +50684,10 @@ expand_vec_perm_1 (struct expand_vec_perm_d *d)
   if (expand_vec_perm_palignr (d, true))
     return true;
 
+  /* Try the AVX512F vperm{s,d} instructions.  */
+  if (ix86_expand_vec_one_operand_perm_avx512 (d))
+    return true;
+
   /* Try the AVX512F vpermi2 instructions.  */
   if (ix86_expand_vec_perm_vpermi2 (NULL_RTX, NULL_RTX, NULL_RTX, NULL_RTX, d))
     return true;
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 493b764ee69..44fe8d2f1b1 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -7314,7 +7314,6 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
   "TARGET_64BIT"
   "*
 {
-  pa_output_arg_descriptor (insn);
   return pa_output_call (insn, operands[0], 0);
 }"
   [(set_attr "type" "call")
@@ -7924,7 +7923,6 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
   "TARGET_64BIT"
   "*
 {
-  pa_output_arg_descriptor (insn);
   return pa_output_call (insn, operands[1], 0);
 }"
   [(set_attr "type" "call")
@@ -8019,7 +8017,6 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
   "TARGET_64BIT && TARGET_HPUX"
   "*
 {
-  pa_output_arg_descriptor (insn);
   return pa_output_call (insn, operands[1], 0);
 }"
   [(set_attr "type" "call")
@@ -8315,7 +8312,6 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
   "TARGET_64BIT"
   "*
 {
-  pa_output_arg_descriptor (insn);
   return pa_output_call (insn, operands[0], 1);
 }"
   [(set_attr "type" "sibcall")
@@ -8404,7 +8400,6 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
   "TARGET_64BIT"
   "*
 {
-  pa_output_arg_descriptor (insn);
   return pa_output_call (insn, operands[1], 1);
 }"
   [(set_attr "type" "sibcall")
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index fcc00b515bb..7dad61efeda 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -2072,7 +2072,7 @@
 		   UNSPEC_VPERMR))]
   "TARGET_P9_VECTOR"
   "@
-   vpermr %0,%1,%2,%3
+   vpermr %0,%2,%1,%3
    xxpermr %x0,%x2,%x3"
   [(set_attr "type" "vecperm")
    (set_attr "length" "4")])
@@ -3680,21 +3680,21 @@
 (define_insn "darn_32"
   [(set (match_operand:SI 0 "register_operand" "=r")
         (unspec:SI [(const_int 0)] UNSPEC_DARN_32))]
-  "TARGET_MODULO"
+  "TARGET_P9_MISC"
   "darn %0,0"
   [(set_attr "type" "integer")])
 
 (define_insn "darn_raw"
   [(set (match_operand:DI 0 "register_operand" "=r")
         (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))]
-  "TARGET_MODULO && TARGET_64BIT"
+  "TARGET_P9_MISC && TARGET_64BIT"
   "darn %0,2"
   [(set_attr "type" "integer")])
 
 (define_insn "darn"
   [(set (match_operand:DI 0 "register_operand" "=r")
         (unspec:DI [(const_int 0)] UNSPEC_DARN))]
-  "TARGET_MODULO && TARGET_64BIT"
+  "TARGET_P9_MISC && TARGET_64BIT"
   "darn %0,1"
   [(set_attr "type" "integer")])
 
diff --git a/gcc/config/rs6000/constraints.md b/gcc/config/rs6000/constraints.md
index 8ef8f9b429e..18713256b9b 100644
--- a/gcc/config/rs6000/constraints.md
+++ b/gcc/config/rs6000/constraints.md
@@ -185,6 +185,11 @@
   "Vector constant that can be loaded with XXSPLTIB & sign extension."
   (match_test "xxspltib_constant_split (op, mode)"))
 
+;; ISA 3.0 D-form instruction that has the bottom 2 bits 0 (LXSD or STXSD).
+(define_memory_constraint "wY"
+  "Offsettable memory operand, with bottom 2 bits 0"
+  (match_operand 0 "offsettable_mem_14bit_operand"))
+
 ;; Altivec style load/store that ignores the bottom bits of the address
 (define_memory_constraint "wZ"
   "Indexed or indirect memory operand, ignoring the bottom 4 bits"
diff --git a/gcc/config/rs6000/crypto.md b/gcc/config/rs6000/crypto.md
index 5957abb8f5d..83a26aef365 100644
--- a/gcc/config/rs6000/crypto.md
+++ b/gcc/config/rs6000/crypto.md
@@ -107,4 +107,4 @@
 			UNSPEC_VSHASIGMA))]
   "TARGET_CRYPTO"
   "vshasigma<CR_char> %0,%1,%2,%3"
-  [(set_attr "type" "crypto")])
+  [(set_attr "type" "vecsimple")])
diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md
index 09d0fd62081..e52a011e008 100644
--- a/gcc/config/rs6000/dfp.md
+++ b/gcc/config/rs6000/dfp.md
@@ -58,7 +58,7 @@
 	(float_extend:DD (match_operand:SD 1 "gpc_reg_operand" "f")))]
   "TARGET_DFP"
   "dctdp %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_expand "extendsdtd2"
   [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
@@ -76,7 +76,7 @@
 	(float_truncate:SD (match_operand:DD 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "drsp %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_expand "negdd2"
   [(set (match_operand:DD 0 "gpc_reg_operand" "")
@@ -160,7 +160,7 @@
 	(float_extend:TD (match_operand:DD 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dctqpq %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 ;; The result of drdpq is an even/odd register pair with the converted
 ;; value in the even register and zero in the odd register.
@@ -173,7 +173,7 @@
    (clobber (match_scratch:TD 2 "=d"))]
   "TARGET_DFP"
   "drdpq %2,%1\;fmr %0,%2"
-  [(set_attr "type" "fp")
+  [(set_attr "type" "dfp")
    (set_attr "length" "8")])
 
 (define_insn "adddd3"
@@ -182,7 +182,7 @@
 		 (match_operand:DD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dadd %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "addtd3"
   [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
@@ -190,7 +190,7 @@
 		 (match_operand:TD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "daddq %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "subdd3"
   [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
@@ -198,7 +198,7 @@
 		  (match_operand:DD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dsub %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "subtd3"
   [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
@@ -206,7 +206,7 @@
 		  (match_operand:TD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dsubq %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "muldd3"
   [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
@@ -214,7 +214,7 @@
 		 (match_operand:DD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dmul %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "multd3"
   [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
@@ -222,7 +222,7 @@
 		 (match_operand:TD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dmulq %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "divdd3"
   [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
@@ -230,7 +230,7 @@
 		(match_operand:DD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "ddiv %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "divtd3"
   [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
@@ -238,7 +238,7 @@
 		(match_operand:TD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "ddivq %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "*cmpdd_internal1"
   [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
@@ -246,7 +246,7 @@
 		      (match_operand:DD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dcmpu %0,%1,%2"
-  [(set_attr "type" "fpcompare")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "*cmptd_internal1"
   [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
@@ -254,21 +254,21 @@
 		      (match_operand:TD 2 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dcmpuq %0,%1,%2"
-  [(set_attr "type" "fpcompare")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "floatdidd2"
   [(set (match_operand:DD 0 "gpc_reg_operand" "=d")
 	(float:DD (match_operand:DI 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP && TARGET_POPCNTD"
   "dcffix %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "floatditd2"
   [(set (match_operand:TD 0 "gpc_reg_operand" "=d")
 	(float:TD (match_operand:DI 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dcffixq %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 ;; Convert a decimal64 to a decimal64 whose value is an integer.
 ;; This is the first stage of converting it to an integer type.
@@ -278,7 +278,7 @@
 	(fix:DD (match_operand:DD 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "drintn. 0,%0,%1,1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 ;; Convert a decimal64 whose value is an integer to an actual integer.
 ;; This is the second stage of converting decimal float to integer type.
@@ -288,7 +288,7 @@
 	(fix:DI (match_operand:DD 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dctfix %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 ;; Convert a decimal128 to a decimal128 whose value is an integer.
 ;; This is the first stage of converting it to an integer type.
@@ -298,7 +298,7 @@
 	(fix:TD (match_operand:TD 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "drintnq. 0,%0,%1,1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 ;; Convert a decimal128 whose value is an integer to an actual integer.
 ;; This is the second stage of converting decimal float to integer type.
@@ -308,7 +308,7 @@
 	(fix:DI (match_operand:TD 1 "gpc_reg_operand" "d")))]
   "TARGET_DFP"
   "dctfixq %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 
 ;; Decimal builtin support
@@ -319,8 +319,11 @@
    UNSPEC_DXEX
    UNSPEC_DIEX
    UNSPEC_DSCLI
+   UNSPEC_DTSTSFI
    UNSPEC_DSCRI])
 
+(define_code_iterator DFP_TEST [eq lt gt unordered])
+
 (define_mode_iterator D64_D128 [DD TD])
 
 (define_mode_attr dfp_suffix [(DD "")
@@ -333,7 +336,7 @@
 			 UNSPEC_DDEDPD))]
   "TARGET_DFP"
   "ddedpd<dfp_suffix> %1,%0,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "dfp_denbcd_<mode>"
   [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
@@ -342,7 +345,7 @@
 			 UNSPEC_DENBCD))]
   "TARGET_DFP"
   "denbcd<dfp_suffix> %1,%0,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "dfp_dxex_<mode>"
   [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
@@ -350,7 +353,7 @@
 			 UNSPEC_DXEX))]
   "TARGET_DFP"
   "dxex<dfp_suffix> %0,%1"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "dfp_diex_<mode>"
   [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
@@ -359,6 +362,42 @@
 			 UNSPEC_DXEX))]
   "TARGET_DFP"
   "diex<dfp_suffix> %0,%1,%2"
+  [(set_attr "type" "dfp")])
+
+(define_expand "dfptstsfi_<code>_<mode>"
+  [(set (match_dup 3)
+	(compare:CCFP
+         (unspec:D64_D128
+	  [(match_operand:SI 1 "const_int_operand" "n")
+	   (match_operand:D64_D128 2 "gpc_reg_operand" "d")]
+	  UNSPEC_DTSTSFI)
+	 (match_dup 4)))
+   (set (match_operand:SI 0 "register_operand" "")
+   	(DFP_TEST:SI (match_dup 3)
+		     (const_int 0)))
+  ]
+  "TARGET_P9_MISC"
+{
+  operands[3] = gen_reg_rtx (CCFPmode);
+  operands[4] = const0_rtx;
+})
+
+(define_insn "*dfp_sgnfcnc_<mode>"
+  [(set (match_operand:CCFP 0 "" "=y")
+        (compare:CCFP
+	 (unspec:D64_D128 [(match_operand:SI 1 "const_int_operand" "n")
+	 	           (match_operand:D64_D128 2 "gpc_reg_operand" "d")]
+          UNSPEC_DTSTSFI)
+	 (match_operand:SI 3 "zero_constant" "j")))]
+  "TARGET_P9_MISC"
+{
+  /* If immediate operand is greater than 63, it will behave as if
+     the value had been 63.  The code generator does not support
+     immediate operand values greater than 63.  */
+  if (!(IN_RANGE (INTVAL (operands[1]), 0, 63)))
+    operands[1] = GEN_INT (63);
+  return "dtstsfi<dfp_suffix> %0,%1,%2";
+}
   [(set_attr "type" "fp")])
 
 (define_insn "dfp_dscli_<mode>"
@@ -368,7 +407,7 @@
 			 UNSPEC_DSCLI))]
   "TARGET_DFP"
   "dscli<dfp_suffix> %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
 
 (define_insn "dfp_dscri_<mode>"
   [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d")
@@ -377,4 +416,4 @@
 			 UNSPEC_DSCRI))]
   "TARGET_DFP"
   "dscri<dfp_suffix> %0,%1,%2"
-  [(set_attr "type" "fp")])
+  [(set_attr "type" "dfp")])
diff --git a/gcc/config/rs6000/htm.md b/gcc/config/rs6000/htm.md
index 0d0823824a8..c0203a9c0ca 100644
--- a/gcc/config/rs6000/htm.md
+++ b/gcc/config/rs6000/htm.md
@@ -72,7 +72,7 @@
    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
   "TARGET_HTM"
   "tabort. %0"
-  [(set_attr "type" "htm")
+  [(set_attr "type" "htmsimple")
    (set_attr "length" "4")])
 
 (define_expand "tabort<wd>c"
@@ -98,7 +98,7 @@
    (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
   "TARGET_HTM"
   "tabort<wd>c. %0,%1,%2"
-  [(set_attr "type" "htm")
+  [(set_attr "type" "htmsimple")
    (set_attr "length" "4")])
 
 (define_expand "tabort<wd>ci"
@@ -124,7 +124,7 @@
    (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
   "TARGET_HTM"
   "tabort<wd>ci. %0,%1,%2"
-  [(set_attr "type" "htm")
+  [(set_attr "type" "htmsimple")
    (set_attr "length" "4")])
 
 (define_expand "tbegin"
@@ -208,7 +208,7 @@
    (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
   "TARGET_HTM"
   "trechkpt."
-  [(set_attr "type" "htm")
+  [(set_attr "type" "htmsimple")
    (set_attr "length" "4")])
 
 (define_expand "treclaim"
@@ -230,7 +230,7 @@
    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
   "TARGET_HTM"
   "treclaim. %0"
-  [(set_attr "type" "htm")
+  [(set_attr "type" "htmsimple")
    (set_attr "length" "4")])
 
 (define_expand "tsr"
@@ -252,7 +252,7 @@
    (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
   "TARGET_HTM"
   "tsr. %0"
-  [(set_attr "type" "htm")
+  [(set_attr "type" "htmsimple")
    (set_attr "length" "4")])
 
 (define_expand "ttest"
@@ -272,7 +272,7 @@
    (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
   "TARGET_HTM"
   "tabortwci. 0,1,0"
-  [(set_attr "type" "htm")
+  [(set_attr "type" "htmsimple")
    (set_attr "length" "4")])
 
 (define_insn "htm_mfspr_<mode>"
diff --git a/gcc/config/rs6000/power6.md b/gcc/config/rs6000/power6.md
index 5bff2a73a7b..a94052417e9 100644
--- a/gcc/config/rs6000/power6.md
+++ b/gcc/config/rs6000/power6.md
@@ -500,7 +500,7 @@
 (define_bypass 9 "power6-mtcr" "power6-branch")
 
 (define_insn_reservation "power6-fp" 6
-  (and (eq_attr "type" "fp,fpsimple,dmul")
+  (and (eq_attr "type" "fp,fpsimple,dmul,dfp")
        (eq_attr "cpu" "power6"))
   "FPU_power6")
 
diff --git a/gcc/config/rs6000/power7.md b/gcc/config/rs6000/power7.md
index adda1df84c5..91ebbf97f9d 100644
--- a/gcc/config/rs6000/power7.md
+++ b/gcc/config/rs6000/power7.md
@@ -292,7 +292,7 @@
 
 ; VS Unit (includes FP/VSX/VMX/DFP)
 (define_insn_reservation "power7-fp" 6
-  (and (eq_attr "type" "fp,fpsimple,dmul")
+  (and (eq_attr "type" "fp,fpsimple,dmul,dfp")
        (eq_attr "cpu" "power7"))
   "DU_power7,VSU_power7")
 
diff --git a/gcc/config/rs6000/power8.md b/gcc/config/rs6000/power8.md
index c0c06c5cbe9..4bb323ff435 100644
--- a/gcc/config/rs6000/power8.md
+++ b/gcc/config/rs6000/power8.md
@@ -317,7 +317,7 @@
 
 ; VS Unit (includes FP/VSX/VMX/DFP/Crypto)
 (define_insn_reservation "power8-fp" 6
-  (and (eq_attr "type" "fp,fpsimple,dmul")
+  (and (eq_attr "type" "fp,fpsimple,dmul,dfp")
        (eq_attr "cpu" "power8"))
   "DU_any_power8,VSU_power8")
 
diff --git a/gcc/config/rs6000/power9.md b/gcc/config/rs6000/power9.md
new file mode 100644
index 00000000000..015b5ba58b4
--- /dev/null
+++ b/gcc/config/rs6000/power9.md
@@ -0,0 +1,477 @@
+;; Scheduling description for IBM POWER9 processor.
+;; Copyright (C) 2016 Free Software Foundation, Inc.
+;;
+;; Contributed by Pat Haugen (pthaugen@us.ibm.com).
+
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+;;
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+;; License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
+
+(define_automaton "power9dsp,power9lsu,power9vsu,power9misc")
+
+(define_cpu_unit "lsu0_power9,lsu1_power9,lsu2_power9,lsu3_power9" "power9lsu")
+(define_cpu_unit "vsu0_power9,vsu1_power9,vsu2_power9,vsu3_power9" "power9vsu")
+; Two vector permute units, part of vsu
+(define_cpu_unit "prm0_power9,prm1_power9" "power9vsu")
+; Two fixed point divide units, not pipelined
+(define_cpu_unit "fx_div0_power9,fx_div1_power9" "power9misc")
+(define_cpu_unit "bru_power9,cryptu_power9,dfu_power9" "power9misc")
+
+(define_cpu_unit "x0_power9,x1_power9,xa0_power9,xa1_power9,
+		  x2_power9,x3_power9,xb0_power9,xb1_power9,
+		  br0_power9,br1_power9" "power9dsp")
+
+
+; Dispatch port reservations
+;
+; Power9 can dispatch a maximum of 6 iops per cycle with the following
+; general restrictions (other restrictions also apply):
+;   1) At most 2 iops per execution slice
+;   2) At most 2 iops to the branch unit
+; Note that insn position in a dispatch group of 6 insns does not infer which
+; execution slice the insn is routed to.  The units are used to infer the
+; conflicts that exist (i.e. an 'even' requirement will preclude dispatch
+; with 2 insns with 'superslice' requirement).
+
+; The xa0/xa1 units really represent the 3rd dispatch port for a superslice but
+; are listed as separate units to allow those insns that preclude its use to
+; still be scheduled two to a superslice while reserving the 3rd slot.  The
+; same applies for xb0/xb1.
+(define_reservation "DU_xa_power9" "xa0_power9+xa1_power9")
+(define_reservation "DU_xb_power9" "xb0_power9+xb1_power9")
+
+; Any execution slice dispatch
+(define_reservation "DU_any_power9"
+		    "x0_power9|x1_power9|DU_xa_power9|x2_power9|x3_power9|
+		     DU_xb_power9")
+
+; Even slice, actually takes even/odd slots
+(define_reservation "DU_even_power9" "x0_power9+x1_power9|x2_power9+x3_power9")
+
+; Slice plus 3rd slot
+(define_reservation "DU_slice_3_power9"
+		    "x0_power9+xa0_power9|x1_power9+xa1_power9|
+		     x2_power9+xb0_power9|x3_power9+xb1_power9")
+
+; Superslice
+(define_reservation "DU_super_power9"
+		    "x0_power9+x1_power9|x2_power9+x3_power9")
+
+; 2-way cracked
+(define_reservation "DU_C2_power9" "x0_power9+x1_power9|
+				    x1_power9+DU_xa_power9|
+				    x1_power9+x2_power9|
+				    DU_xa_power9+x2_power9|
+				    x2_power9+x3_power9|
+				    x3_power9+DU_xb_power9")
+
+; 2-way cracked plus 3rd slot
+(define_reservation "DU_C2_3_power9" "x0_power9+x1_power9+xa0_power9|
+				      x1_power9+x2_power9+xa0_power9|
+				      x1_power9+x2_power9+xb0_power9|
+				      x2_power9+x3_power9+xb0_power9")
+
+; 3-way cracked (consumes whole decode/dispatch cycle)
+(define_reservation "DU_C3_power9"
+		    "x0_power9+x1_power9+xa0_power9+xa1_power9+x2_power9+
+		     x3_power9+xb0_power9+xb1_power9+br0_power9+br1_power9")
+
+; Branch ports
+(define_reservation "DU_branch_power9" "br0_power9|br1_power9")
+
+
+; Execution unit reservations
+(define_reservation "LSU_power9"
+		    "lsu0_power9|lsu1_power9|lsu2_power9|lsu3_power9")
+
+(define_reservation "LSU_pair_power9"
+		    "lsu0_power9+lsu1_power9|lsu1_power9+lsu2_power9|
+		     lsu2_power9+lsu3_power9|lsu3_power9+lsu0_power9")
+
+(define_reservation "VSU_power9"
+		    "vsu0_power9|vsu1_power9|vsu2_power9|vsu3_power9")
+
+(define_reservation "VSU_super_power9"
+		    "vsu0_power9+vsu1_power9|vsu2_power9+vsu3_power9")
+
+(define_reservation "VSU_PRM_power9" "prm0_power9|prm1_power9")
+
+
+; LS Unit
+(define_insn_reservation "power9-load" 4
+  (and (eq_attr "type" "load")
+       (eq_attr "sign_extend" "no")
+       (eq_attr "update" "no")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,LSU_power9")
+
+(define_insn_reservation "power9-load-update" 4
+  (and (eq_attr "type" "load")
+       (eq_attr "sign_extend" "no")
+       (eq_attr "update" "yes")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_power9,LSU_power9+VSU_power9")
+
+(define_insn_reservation "power9-load-ext" 6
+  (and (eq_attr "type" "load")
+       (eq_attr "sign_extend" "yes")
+       (eq_attr "update" "no")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_power9,LSU_power9")
+
+(define_insn_reservation "power9-load-ext-update" 6
+  (and (eq_attr "type" "load")
+       (eq_attr "sign_extend" "yes")
+       (eq_attr "update" "yes")
+       (eq_attr "cpu" "power9"))
+  "DU_C3_power9,LSU_power9+VSU_power9")
+
+(define_insn_reservation "power9-fpload-double" 4
+  (and (eq_attr "type" "fpload")
+       (eq_attr "update" "no")
+       (eq_attr "size" "64")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,LSU_power9")
+
+(define_insn_reservation "power9-fpload-update-double" 4
+  (and (eq_attr "type" "fpload")
+       (eq_attr "update" "yes")
+       (eq_attr "size" "64")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_3_power9,LSU_power9+VSU_power9")
+
+; SFmode loads are cracked and have additional 2 cycles over DFmode
+(define_insn_reservation "power9-fpload-single" 6
+  (and (eq_attr "type" "fpload")
+       (eq_attr "update" "no")
+       (eq_attr "size" "32")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_3_power9,LSU_power9")
+
+(define_insn_reservation "power9-fpload-update-single" 6
+  (and (eq_attr "type" "fpload")
+       (eq_attr "update" "yes")
+       (eq_attr "size" "32")
+       (eq_attr "cpu" "power9"))
+  "DU_C3_power9,LSU_power9+VSU_power9")
+
+(define_insn_reservation "power9-vecload" 5
+  (and (eq_attr "type" "vecload")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,LSU_pair_power9")
+
+; Store data can issue 2 cycles after AGEN issue, 3 cycles for vector store
+(define_insn_reservation "power9-store" 0
+  (and (eq_attr "type" "store")
+       (eq_attr "update" "no")
+       (eq_attr "indexed" "no")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,LSU_power9")
+
+(define_insn_reservation "power9-store-indexed" 0
+  (and (eq_attr "type" "store")
+       (eq_attr "update" "no")
+       (eq_attr "indexed" "yes")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,LSU_power9")
+
+; Update forms have 2 cycle latency for updated addr reg
+(define_insn_reservation "power9-store-update" 2
+  (and (eq_attr "type" "store")
+       (eq_attr "update" "yes")
+       (eq_attr "indexed" "no")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_3_power9,LSU_power9+VSU_power9")
+
+; Update forms have 2 cycle latency for updated addr reg
+(define_insn_reservation "power9-store-update-indexed" 2
+  (and (eq_attr "type" "store")
+       (eq_attr "update" "yes")
+       (eq_attr "indexed" "yes")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_3_power9,LSU_power9+VSU_power9")
+
+(define_insn_reservation "power9-fpstore" 0
+  (and (eq_attr "type" "fpstore")
+       (eq_attr "update" "no")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,LSU_power9")
+
+; Update forms have 2 cycle latency for updated addr reg
+(define_insn_reservation "power9-fpstore-update" 2
+  (and (eq_attr "type" "fpstore")
+       (eq_attr "update" "yes")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_3_power9,LSU_power9+VSU_power9")
+
+(define_insn_reservation "power9-vecstore" 0
+  (and (eq_attr "type" "vecstore")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,LSU_pair_power9")
+
+(define_insn_reservation "power9-larx" 4
+  (and (eq_attr "type" "load_l")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,LSU_power9")
+
+(define_insn_reservation "power9-stcx" 2
+  (and (eq_attr "type" "store_c")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_3_power9,LSU_power9+VSU_power9")
+
+(define_insn_reservation "power9-sync" 4
+  (and (eq_attr "type" "sync,isync")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,LSU_power9")
+
+
+; VSU Execution Unit
+
+; Fixed point ops
+
+; Most ALU insns are simple 2 cycle, including record form
+(define_insn_reservation "power9-alu" 2
+  (and (ior (eq_attr "type" "add,cmp,exts,integer,logical,isel")
+	    (and (eq_attr "type" "insert,shift")
+		 (eq_attr "dot" "no")))
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+; Record form rotate/shift are cracked
+(define_insn_reservation "power9-cracked-alu" 2
+  (and (eq_attr "type" "insert,shift")
+       (eq_attr "dot" "yes")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_power9,VSU_power9")
+; 4 cycle CR latency
+(define_bypass 4 "power9-cracked-alu"
+		 "power9-crlogical,power9-mfcr,power9-mfcrf,power9-branch")
+
+(define_insn_reservation "power9-alu2" 3
+  (and (eq_attr "type" "cntlz,popcnt,trap")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+; Treat 'two' and 'three' types as 2 or 3 way cracked
+(define_insn_reservation "power9-two" 4
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_power9,VSU_power9")
+
+(define_insn_reservation "power9-three" 6
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "power9"))
+  "DU_C3_power9,VSU_power9")
+
+(define_insn_reservation "power9-mul" 4
+  (and (eq_attr "type" "mul")
+       (eq_attr "dot" "no")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+(define_insn_reservation "power9-mul-compare" 4
+  (and (eq_attr "type" "mul")
+       (eq_attr "dot" "yes")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_power9,VSU_power9")
+; 6 cycle CR latency
+(define_bypass 6 "power9-mul-compare"
+		 "power9-crlogical,power9-mfcr,power9-mfcrf,power9-branch")
+
+; Fixed point divides reserve the divide units for a minimum of 8 cycles
+(define_insn_reservation "power9-idiv" 16
+  (and (eq_attr "type" "div")
+       (eq_attr "size" "32")
+       (eq_attr "cpu" "power9"))
+  "DU_even_power9,fx_div0_power9*8|fx_div1_power9*8")
+
+(define_insn_reservation "power9-ldiv" 24
+  (and (eq_attr "type" "div")
+       (eq_attr "size" "64")
+       (eq_attr "cpu" "power9"))
+  "DU_even_power9,fx_div0_power9*8|fx_div1_power9*8")
+
+(define_insn_reservation "power9-crlogical" 2
+  (and (eq_attr "type" "cr_logical,delayed_cr")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+(define_insn_reservation "power9-mfcrf" 2
+  (and (eq_attr "type" "mfcrf")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+(define_insn_reservation "power9-mfcr" 6
+  (and (eq_attr "type" "mfcr")
+       (eq_attr "cpu" "power9"))
+  "DU_C3_power9,VSU_power9")
+
+; Should differentiate between 1 cr field and > 1 since target of > 1 cr
+; is cracked
+(define_insn_reservation "power9-mtcr" 2
+  (and (eq_attr "type" "mtcr")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+; Move to LR/CTR are executed in VSU
+(define_insn_reservation "power9-mtjmpr" 5
+  (and (eq_attr "type" "mtjmpr")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+; Floating point/Vector ops
+(define_insn_reservation "power9-fpsimple" 2
+  (and (eq_attr "type" "fpsimple")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+(define_insn_reservation "power9-fp" 7
+  (and (eq_attr "type" "fp,dmul")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+(define_insn_reservation "power9-fpcompare" 3
+  (and (eq_attr "type" "fpcompare")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+; FP div/sqrt are executed in the VSU slices.  They are not pipelined wrt other
+; divide insns, but for the most part do not block pipelined ops.
+(define_insn_reservation "power9-sdiv" 22
+  (and (eq_attr "type" "sdiv")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+(define_insn_reservation "power9-ddiv" 33
+  (and (eq_attr "type" "ddiv")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+(define_insn_reservation "power9-sqrt" 26
+  (and (eq_attr "type" "ssqrt")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+(define_insn_reservation "power9-dsqrt" 36
+  (and (eq_attr "type" "dsqrt")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+(define_insn_reservation "power9-vec-2cyc" 2
+  (and (eq_attr "type" "vecmove,veclogical,vecexts,veccmpfx")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_super_power9")
+
+(define_insn_reservation "power9-veccmp" 3
+  (and (eq_attr "type" "veccmp")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_super_power9")
+
+(define_insn_reservation "power9-vecsimple" 3
+  (and (eq_attr "type" "vecsimple")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_super_power9")
+
+(define_insn_reservation "power9-vecnormal" 7
+  (and (eq_attr "type" "vecfloat,vecdouble")
+       (eq_attr "size" "!128")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_super_power9")
+
+; Quad-precision FP ops, execute in DFU
+(define_insn_reservation "power9-qp" 12
+  (and (eq_attr "type" "vecfloat,vecdouble")
+       (eq_attr "size" "128")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,dfu_power9")
+
+(define_insn_reservation "power9-vecperm" 3
+  (and (eq_attr "type" "vecperm")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_PRM_power9")
+
+(define_insn_reservation "power9-veccomplex" 7
+  (and (eq_attr "type" "veccomplex")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_super_power9")
+
+(define_insn_reservation "power9-vecfdiv" 28
+  (and (eq_attr "type" "vecfdiv")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_super_power9")
+
+(define_insn_reservation "power9-vecdiv" 32
+  (and (eq_attr "type" "vecdiv")
+       (eq_attr "size" "!128")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,VSU_super_power9")
+
+(define_insn_reservation "power9-qpdiv" 56
+  (and (eq_attr "type" "vecdiv")
+       (eq_attr "size" "128")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,dfu_power9")
+
+(define_insn_reservation "power9-mffgpr" 2
+  (and (eq_attr "type" "mffgpr")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+(define_insn_reservation "power9-mftgpr" 2
+  (and (eq_attr "type" "mftgpr")
+       (eq_attr "cpu" "power9"))
+  "DU_slice_3_power9,VSU_power9")
+
+
+; Branch Unit
+; Move from LR/CTR are executed in BRU but consume a writeback port from an
+; execution slice.
+(define_insn_reservation "power9-mfjmpr" 6
+  (and (eq_attr "type" "mfjmpr")
+       (eq_attr "cpu" "power9"))
+  "DU_branch_power9,bru_power9+VSU_power9")
+
+; Branch is 2 cycles
+(define_insn_reservation "power9-branch" 2
+  (and (eq_attr "type" "jmpreg,branch")
+       (eq_attr "cpu" "power9"))
+  "DU_branch_power9,bru_power9")
+
+
+; Crypto Unit
+(define_insn_reservation "power9-crypto" 6
+  (and (eq_attr "type" "crypto")
+       (eq_attr "cpu" "power9"))
+  "DU_super_power9,cryptu_power9")
+
+
+; HTM Unit
+(define_insn_reservation "power9-htm" 4
+  (and (eq_attr "type" "htm")
+       (eq_attr "cpu" "power9"))
+  "DU_C2_power9,LSU_power9")
+
+(define_insn_reservation "power9-htm-simple" 2
+  (and (eq_attr "type" "htmsimple")
+       (eq_attr "cpu" "power9"))
+  "DU_any_power9,VSU_power9")
+
+
+; DFP Unit
+(define_insn_reservation "power9-dfp" 12
+  (and (eq_attr "type" "dfp")
+       (eq_attr "cpu" "power9"))
+  "DU_even_power9,dfu_power9")
+
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 0174667b800..0d10e9ab5c1 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -200,6 +200,11 @@
   (and (match_code "const_int")
        (match_test "IN_RANGE (INTVAL (op), 2, 3)")))
 
+;; Match op = 0..7.
+(define_predicate "const_0_to_7_operand"
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
+
 ;; Match op = 0..15
 (define_predicate "const_0_to_15_operand"
   (and (match_code "const_int")
@@ -729,6 +734,15 @@
   (and (match_operand 0 "memory_operand")
        (match_test "offsettable_nonstrict_memref_p (op)")))
 
+;; Return 1 if the operand is an offsettable memory operand for ISA 3.0
+;; scalar LXSD/STXSD that must have the bottom 2 bits 0 and no update
+;; form
+(define_predicate "offsettable_mem_14bit_operand"
+  (and (match_operand 0 "memory_operand")
+       (match_test "offsettable_nonstrict_memref_p (op)")
+       (match_test "mem_operand_gpr (op, mode)")
+       (not (match_test "update_address_mem  (op, mode)"))))
+
 ;; Return 1 if the operand is suitable for load/store quad memory.
 ;; This predicate only checks for non-atomic loads/stores (not lqarx/stqcx).
 (define_predicate "quad_memory_operand"
diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def
index 533f77120d3..fef3fd4b496 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -672,10 +672,18 @@
 /* Miscellaneous builtins for instructions added in ISA 3.0.  These
    instructions don't require either the DFP or VSX options, just the basic
    ISA 3.0 enablement since they operate on general purpose registers.  */
+#define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE)                      \
+  RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
+		    "__builtin_" NAME,			/* NAME */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
+		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
+		     | RS6000_BTC_SPECIAL),				\
+		    CODE_FOR_ ## ICODE)			/* ICODE */
+
 #define BU_P9_MISC_1(ENUM, NAME, ATTR, ICODE)				\
   RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_MODULO,			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_UNARY),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
@@ -687,23 +695,65 @@
 #define BU_P9_64BIT_MISC_0(ENUM, NAME, ATTR, ICODE)			\
   RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_MODULO                                   \
+		    RS6000_BTM_P9_MISC					\
                      | RS6000_BTM_64BIT,		/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_SPECIAL),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
 
-/* Miscellaneous builtins for instructions added in ISA 3.0.  These
-   instructions don't require either the DFP or VSX options, just the basic
-   ISA 3.0 enablement since they operate on general purpose registers.  */
-#define BU_P9_MISC_0(ENUM, NAME, ATTR, ICODE)                      \
+/* Miscellaneous builtins for decimal floating point instructions
+   added in ISA 3.0.  These instructions don't require the VSX
+   options, just the basic ISA 3.0 enablement since they operate on
+   general purpose registers.  */
+#define BU_P9_DFP_MISC_0(ENUM, NAME, ATTR, ICODE)			\
   RS6000_BUILTIN_0 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
 		    "__builtin_" NAME,			/* NAME */	\
-		    RS6000_BTM_MODULO,			/* MASK */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
 		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
 		     | RS6000_BTC_SPECIAL),				\
 		    CODE_FOR_ ## ICODE)			/* ICODE */
 
+#define BU_P9_DFP_MISC_1(ENUM, NAME, ATTR, ICODE)			\
+  RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
+		    "__builtin_" NAME,			/* NAME */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
+		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
+		     | RS6000_BTC_SPECIAL),				\
+		    CODE_FOR_ ## ICODE)			/* ICODE */
+
+#define BU_P9_DFP_MISC_2(ENUM, NAME, ATTR, ICODE)			\
+  RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM,		/* ENUM */	\
+		    "__builtin_" NAME,			/* NAME */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
+		    (RS6000_BTC_ ## ATTR		/* ATTR */	\
+		     | RS6000_BTC_SPECIAL),				\
+		    CODE_FOR_ ## ICODE)			/* ICODE */
+
+/* Decimal floating point overloaded functions added in ISA 3.0 */
+#define BU_P9_DFP_OVERLOAD_1(ENUM, NAME)				\
+  RS6000_BUILTIN_1 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
+		    "__builtin_dfp_" NAME,		/* NAME */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
+		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
+		     | RS6000_BTC_UNARY),				\
+		    CODE_FOR_nothing)			/* ICODE */
+
+#define BU_P9_DFP_OVERLOAD_2(ENUM, NAME)				\
+  RS6000_BUILTIN_2 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
+		    "__builtin_dfp_" NAME,		/* NAME */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
+		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
+		     | RS6000_BTC_BINARY),				\
+		    CODE_FOR_nothing)			/* ICODE */
+
+#define BU_P9_DFP_OVERLOAD_3(ENUM, NAME)				\
+  RS6000_BUILTIN_3 (P9_BUILTIN_DFP_ ## ENUM,		/* ENUM */	\
+		    "__builtin_dfp_" NAME,		/* NAME */	\
+		    RS6000_BTM_P9_MISC,			/* MASK */	\
+		    (RS6000_BTC_OVERLOADED		/* ATTR */	\
+		     | RS6000_BTC_TERNARY),				\
+		    CODE_FOR_nothing)			/* ICODE */
+
 /* ISA 3.0 (power9) vector convenience macros.  */
 /* For the instructions that are encoded as altivec instructions use
    __builtin_altivec_ as the builtin name.  */
@@ -1810,6 +1860,36 @@ BU_LDBL128_2 (UNPACK_TF,	"unpack_longdouble",	CONST,	unpacktf)
 BU_P7_MISC_2 (PACK_V1TI,	"pack_vector_int128",	CONST,	packv1ti)
 BU_P7_MISC_2 (UNPACK_V1TI,	"unpack_vector_int128",	CONST,	unpackv1ti)
 
+/* 2 argument DFP (Decimal Floating Point) functions added in ISA 3.0.  */
+BU_P9_DFP_MISC_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd", CONST, dfptstsfi_lt_dd)
+BU_P9_DFP_MISC_2 (TSTSFI_LT_TD, "dtstsfi_lt_td", CONST, dfptstsfi_lt_td)
+
+BU_P9_DFP_MISC_2 (TSTSFI_EQ_DD, "dtstsfi_eq_dd", CONST, dfptstsfi_eq_dd)
+BU_P9_DFP_MISC_2 (TSTSFI_EQ_TD, "dtstsfi_eq_td", CONST, dfptstsfi_eq_td)
+
+BU_P9_DFP_MISC_2 (TSTSFI_GT_DD, "dtstsfi_gt_dd", CONST, dfptstsfi_gt_dd)
+BU_P9_DFP_MISC_2 (TSTSFI_GT_TD, "dtstsfi_gt_td", CONST, dfptstsfi_gt_td)
+
+BU_P9_DFP_MISC_2 (TSTSFI_OV_DD, "dtstsfi_ov_dd", CONST, dfptstsfi_unordered_dd)
+BU_P9_DFP_MISC_2 (TSTSFI_OV_TD, "dtstsfi_ov_td", CONST, dfptstsfi_unordered_td)
+
+/* 2 argument overloaded DFP functions added in ISA 3.0.  */
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT,	"dtstsfi_lt")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_DD,	"dtstsfi_lt_dd")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_LT_TD,	"dtstsfi_lt_td")
+
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ,	"dtstsfi_eq")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_DD,	"dtstsfi_eq_dd")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_EQ_TD,	"dtstsfi_eq_td")
+
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT,	"dtstsfi_gt")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_DD,	"dtstsfi_gt_dd")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_GT_TD,	"dtstsfi_gt_td")
+
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV,	"dtstsfi_ov")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_DD,	"dtstsfi_ov_dd")
+BU_P9_DFP_OVERLOAD_2 (TSTSFI_OV_TD,	"dtstsfi_ov_td")
+
 /* 1 argument vector functions added in ISA 3.0 (power9).  */
 BU_P9V_AV_1 (VCTZB,		"vctzb",		CONST,  ctzv16qi2)
 BU_P9V_AV_1 (VCTZH,		"vctzh",		CONST,  ctzv8hi2)
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 79a7e88a5ee..fe6db2c097a 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -4203,6 +4203,46 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P8V_BUILTIN_VEC_VCLZD, P8V_BUILTIN_VCLZD,
     RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
 
+  { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_LT, MISC_BUILTIN_TSTSFI_LT_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
+  { P9_BUILTIN_DFP_TSTSFI_LT_TD, MISC_BUILTIN_TSTSFI_LT_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_LT_DD, MISC_BUILTIN_TSTSFI_LT_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
+  { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_EQ, MISC_BUILTIN_TSTSFI_EQ_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
+  { P9_BUILTIN_DFP_TSTSFI_EQ_TD, MISC_BUILTIN_TSTSFI_EQ_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_EQ_DD, MISC_BUILTIN_TSTSFI_EQ_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
+  { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_GT, MISC_BUILTIN_TSTSFI_GT_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
+  { P9_BUILTIN_DFP_TSTSFI_GT_TD, MISC_BUILTIN_TSTSFI_GT_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_GT_DD, MISC_BUILTIN_TSTSFI_GT_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
+  { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_OV, MISC_BUILTIN_TSTSFI_OV_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
+  { P9_BUILTIN_DFP_TSTSFI_OV_TD, MISC_BUILTIN_TSTSFI_OV_TD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat128, 0 },
+  { P9_BUILTIN_DFP_TSTSFI_OV_DD, MISC_BUILTIN_TSTSFI_OV_DD,
+    RS6000_BTI_INTSI, RS6000_BTI_UINTSI, RS6000_BTI_dfloat64, 0 },
+
   { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
   { P9V_BUILTIN_VEC_VCTZ, P9V_BUILTIN_VCTZB,
@@ -5241,10 +5281,11 @@ assignment for unaligned loads and stores");
      are able to honor __restrict__, for example.  We may want to
      consider this for all memory access built-ins.
 
-     When -maltivec=be is specified, simply punt to existing
-     built-in processing.  */
+     When -maltivec=be is specified, or the wrong number of arguments
+     is provided, simply punt to existing built-in processing.  */
   if (fcode == ALTIVEC_BUILTIN_VEC_LD
-      && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG))
+      && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)
+      && nargs == 2)
     {
       tree arg0 = (*arglist)[0];
       tree arg1 = (*arglist)[1];
@@ -5314,7 +5355,8 @@ assignment for unaligned loads and stores");
 
   /* Similarly for stvx.  */
   if (fcode == ALTIVEC_BUILTIN_VEC_ST
-      && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG))
+      && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)
+      && nargs == 3)
     {
       tree arg0 = (*arglist)[0];
       tree arg1 = (*arglist)[1];
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 8fbf1b94268..401088f5304 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -61,16 +61,27 @@
 				 | OPTION_MASK_UPPER_REGS_SF)
 
 /* Add ISEL back into ISA 3.0, since it is supposed to be a win.  Do not add
-   P9_MINMAX until the hardware that supports it is available.  */
+   P9_MINMAX until the hardware that supports it is available.  Do not add
+   FLOAT128_HW here until we are ready to make -mfloat128 on by default.  */
 #define ISA_3_0_MASKS_SERVER	(ISA_2_7_MASKS_SERVER			\
-				 | OPTION_MASK_FLOAT128_HW		\
 				 | OPTION_MASK_ISEL			\
 				 | OPTION_MASK_MODULO			\
 				 | OPTION_MASK_P9_FUSION		\
 				 | OPTION_MASK_P9_DFORM_SCALAR		\
 				 | OPTION_MASK_P9_DFORM_VECTOR		\
+				 | OPTION_MASK_P9_MISC			\
 				 | OPTION_MASK_P9_VECTOR)
 
+/* Support for the IEEE 128-bit floating point hardware requires a lot of the
+   VSX instructions that are part of ISA 3.0.  */
+#define ISA_3_0_MASKS_IEEE	(OPTION_MASK_VSX			\
+				 | OPTION_MASK_P8_VECTOR		\
+				 | OPTION_MASK_P9_VECTOR		\
+				 | OPTION_MASK_DIRECT_MOVE		\
+				 | OPTION_MASK_UPPER_REGS_DI		\
+				 | OPTION_MASK_UPPER_REGS_DF		\
+				 | OPTION_MASK_UPPER_REGS_SF)
+
 #define POWERPC_7400_MASK	(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)
 
 /* Deal with ports that do not have -mstrict-align.  */
@@ -108,6 +119,7 @@
 				 | OPTION_MASK_P9_DFORM_VECTOR		\
 				 | OPTION_MASK_P9_FUSION		\
 				 | OPTION_MASK_P9_MINMAX		\
+				 | OPTION_MASK_P9_MISC			\
 				 | OPTION_MASK_P9_VECTOR		\
 				 | OPTION_MASK_POPCNTB			\
 				 | OPTION_MASK_POPCNTD			\
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index 6b4d17801d0..0a47075d6bf 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -135,6 +135,7 @@ extern bool rs6000_emit_set_const (rtx, rtx);
 extern int rs6000_emit_cmove (rtx, rtx, rtx, rtx);
 extern int rs6000_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx);
 extern void rs6000_emit_minmax (rtx, enum rtx_code, rtx, rtx);
+extern void rs6000_split_signbit (rtx, rtx);
 extern void rs6000_expand_atomic_compare_and_swap (rtx op[]);
 extern void rs6000_expand_atomic_exchange (rtx op[]);
 extern void rs6000_expand_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 12b2e4d37fc..99a2e36911b 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1104,16 +1104,16 @@ struct processor_costs power9_cost = {
   COSTS_N_INSNS (3),	/* mulsi_const */
   COSTS_N_INSNS (3),	/* mulsi_const9 */
   COSTS_N_INSNS (3),	/* muldi */
-  COSTS_N_INSNS (19),	/* divsi */
-  COSTS_N_INSNS (35),	/* divdi */
+  COSTS_N_INSNS (8),	/* divsi */
+  COSTS_N_INSNS (12),	/* divdi */
   COSTS_N_INSNS (3),	/* fp */
   COSTS_N_INSNS (3),	/* dmul */
-  COSTS_N_INSNS (14),	/* sdiv */
-  COSTS_N_INSNS (17),	/* ddiv */
+  COSTS_N_INSNS (13),	/* sdiv */
+  COSTS_N_INSNS (18),	/* ddiv */
   128,			/* cache line size */
   32,			/* l1 cache */
-  256,			/* l2 cache */
-  12,			/* prefetch streams */
+  512,			/* l2 cache */
+  8,			/* prefetch streams */
   COSTS_N_INSNS (3),	/* SF->DF convert */
 };
 
@@ -3680,6 +3680,7 @@ rs6000_builtin_mask_calculate (void)
 	  | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL      : 0)
 	  | ((TARGET_P8_VECTOR)		    ? RS6000_BTM_P8_VECTOR : 0)
 	  | ((TARGET_P9_VECTOR)		    ? RS6000_BTM_P9_VECTOR : 0)
+	  | ((TARGET_P9_MISC)		    ? RS6000_BTM_P9_MISC   : 0)
 	  | ((TARGET_MODULO)		    ? RS6000_BTM_MODULO    : 0)
 	  | ((TARGET_64BIT)		    ? RS6000_BTM_64BIT     : 0)
 	  | ((TARGET_CRYPTO)		    ? RS6000_BTM_CRYPTO	   : 0)
@@ -3846,22 +3847,7 @@ rs6000_option_override_internal (bool global_init_p)
   if (rs6000_tune_index >= 0)
     tune_index = rs6000_tune_index;
   else if (have_cpu)
-    {
-      /* Until power9 tuning is available, use power8 tuning if -mcpu=power9.  */
-      if (processor_target_table[cpu_index].processor != PROCESSOR_POWER9)
-	rs6000_tune_index = tune_index = cpu_index;
-      else
-	{
-	  size_t i;
-	  tune_index = -1;
-	  for (i = 0; i < ARRAY_SIZE (processor_target_table); i++)
-	    if (processor_target_table[i].processor == PROCESSOR_POWER8)
-	      {
-		rs6000_tune_index = tune_index = i;
-		break;
-	      }
-	}
-    }
+    rs6000_tune_index = tune_index = cpu_index;
   else
     {
       size_t i;
@@ -4395,14 +4381,21 @@ rs6000_option_override_internal (bool global_init_p)
       rs6000_isa_flags &= ~(OPTION_MASK_FLOAT128 | OPTION_MASK_FLOAT128_HW);
     }
 
+  /* If we have -mfloat128 and full ISA 3.0 support, enable -mfloat128-hardware
+     by default.  */
+  if (TARGET_FLOAT128 && !TARGET_FLOAT128_HW
+      && (rs6000_isa_flags & ISA_3_0_MASKS_IEEE) == ISA_3_0_MASKS_IEEE
+      && !(rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW))
+    {
+      rs6000_isa_flags |= OPTION_MASK_FLOAT128_HW;
+      if ((rs6000_isa_flags & OPTION_MASK_FLOAT128) != 0)
+	rs6000_isa_flags_explicit |= OPTION_MASK_FLOAT128_HW;
+    }
+
   /* IEEE 128-bit floating point hardware instructions imply enabling
      __float128.  */
   if (TARGET_FLOAT128_HW
-      && (rs6000_isa_flags & (OPTION_MASK_P9_VECTOR
-			      | OPTION_MASK_DIRECT_MOVE
-			      | OPTION_MASK_UPPER_REGS_DI
-			      | OPTION_MASK_UPPER_REGS_DF
-			      | OPTION_MASK_UPPER_REGS_SF)) == 0)
+      && (rs6000_isa_flags & ISA_3_0_MASKS_IEEE) != ISA_3_0_MASKS_IEEE)
     {
       if ((rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW) != 0)
 	error ("-mfloat128-hardware requires full ISA 3.0 support");
@@ -4410,10 +4403,6 @@ rs6000_option_override_internal (bool global_init_p)
       rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW;
     }
 
-  else if (TARGET_P9_VECTOR && !TARGET_FLOAT128_HW
-	   && (rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW) == 0)
-    rs6000_isa_flags |= OPTION_MASK_FLOAT128_HW;
-
   if (TARGET_FLOAT128_HW
       && (rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128) == 0)
     rs6000_isa_flags |= OPTION_MASK_FLOAT128;
@@ -4623,8 +4612,7 @@ rs6000_option_override_internal (bool global_init_p)
   rs6000_sched_groups = (rs6000_cpu == PROCESSOR_POWER4
 			 || rs6000_cpu == PROCESSOR_POWER5
 			 || rs6000_cpu == PROCESSOR_POWER7
-			 || rs6000_cpu == PROCESSOR_POWER8
-			 || rs6000_cpu == PROCESSOR_POWER9);
+			 || rs6000_cpu == PROCESSOR_POWER8);
   rs6000_align_branch_targets = (rs6000_cpu == PROCESSOR_POWER4
 				 || rs6000_cpu == PROCESSOR_POWER5
 				 || rs6000_cpu == PROCESSOR_POWER6
@@ -6932,6 +6920,30 @@ rs6000_expand_vector_extract (rtx target, rtx vec, int elt)
 	case V4SFmode:
 	  emit_insn (gen_vsx_extract_v4sf (target, vec, GEN_INT (elt)));
 	  return;
+	case V16QImode:
+	  if (TARGET_VEXTRACTUB)
+	    {
+	      emit_insn (gen_vsx_extract_v16qi (target, vec, GEN_INT (elt)));
+	      return;
+	    }
+	  else
+	    break;
+	case V8HImode:
+	  if (TARGET_VEXTRACTUB)
+	    {
+	      emit_insn (gen_vsx_extract_v8hi (target, vec, GEN_INT (elt)));
+	      return;
+	    }
+	  else
+	    break;
+	case V4SImode:
+	  if (TARGET_VEXTRACTUB)
+	    {
+	      emit_insn (gen_vsx_extract_v4si (target, vec, GEN_INT (elt)));
+	      return;
+	    }
+	  else
+	    break;
 	}
     }
 
@@ -13372,6 +13384,24 @@ rs6000_expand_binop_builtin (enum insn_code icode, tree exp, rtx target)
 	  return const0_rtx;
 	}
     }
+  else if (icode == CODE_FOR_dfptstsfi_eq_dd
+      || icode == CODE_FOR_dfptstsfi_lt_dd
+      || icode == CODE_FOR_dfptstsfi_gt_dd
+      || icode == CODE_FOR_dfptstsfi_unordered_dd
+      || icode == CODE_FOR_dfptstsfi_eq_td
+      || icode == CODE_FOR_dfptstsfi_lt_td
+      || icode == CODE_FOR_dfptstsfi_gt_td
+      || icode == CODE_FOR_dfptstsfi_unordered_td)
+    {
+      /* Only allow 6-bit unsigned literals.  */
+      STRIP_NOPS (arg0);
+      if (TREE_CODE (arg0) != INTEGER_CST
+	  || !IN_RANGE (TREE_INT_CST_LOW (arg0), 0, 63))
+	{
+	  error ("argument 1 must be a 6-bit unsigned literal");
+	  return CONST0_RTX (tmode);
+	}
+    }
 
   if (target == 0
       || GET_MODE (target) != tmode
@@ -15478,6 +15508,12 @@ rs6000_invalid_builtin (enum rs6000_builtins fncode)
     error ("Builtin function %s requires the -mpower8-vector option", name);
   else if ((fnmask & RS6000_BTM_P9_VECTOR) != 0)
     error ("Builtin function %s requires the -mpower9-vector option", name);
+  else if ((fnmask & (RS6000_BTM_P9_MISC | RS6000_BTM_64BIT))
+	   == (RS6000_BTM_P9_MISC | RS6000_BTM_64BIT))
+    error ("Builtin function %s requires the -mpower9-misc and"
+	   " -m64 options", name);
+  else if ((fnmask & RS6000_BTM_P9_MISC) == RS6000_BTM_P9_MISC)
+    error ("Builtin function %s requires the -mpower9-misc option", name);
   else if ((fnmask & (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
 	   == (RS6000_BTM_HARD_FLOAT | RS6000_BTM_LDBL128))
     error ("Builtin function %s requires the -mhard-float and"
@@ -19161,7 +19197,8 @@ rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type,
      simple move insns are issued.  At present, 32-bit integers are not allowed
      in FPR/VSX registers.  Single precision binary floating is not a simple
      move because we need to convert to the single precision memory layout.
-     The 4-byte SDmode can be moved.  */
+     The 4-byte SDmode can be moved.  TDmode values are disallowed since they
+     need special direct move handling, which we do not support yet.  */
   size = GET_MODE_SIZE (mode);
   if (TARGET_DIRECT_MOVE
       && ((mode == SDmode) || (TARGET_POWERPC64 && size == 8))
@@ -19169,7 +19206,7 @@ rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type,
 	  || (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)))
     return true;
 
-  else if (TARGET_DIRECT_MOVE_128 && size == 16
+  else if (TARGET_DIRECT_MOVE_128 && size == 16 && mode != TDmode
 	   && ((to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)
 	       || (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)))
     return true;
@@ -23111,6 +23148,48 @@ rs6000_emit_minmax (rtx dest, enum rtx_code code, rtx op0, rtx op1)
     emit_move_insn (dest, target);
 }
 
+/* Split a signbit operation on 64-bit machines with direct move.  Also allow
+   for the value to come from memory or if it is already loaded into a GPR.  */
+
+void
+rs6000_split_signbit (rtx dest, rtx src)
+{
+  machine_mode d_mode = GET_MODE (dest);
+  machine_mode s_mode = GET_MODE (src);
+  rtx dest_di = (d_mode == DImode) ? dest : gen_lowpart (DImode, dest);
+  rtx shift_reg = dest_di;
+
+  gcc_assert (REG_P (dest));
+  gcc_assert (REG_P (src) || MEM_P (src));
+  gcc_assert (s_mode == KFmode || s_mode == TFmode);
+
+  if (MEM_P (src))
+    {
+      rtx mem = (WORDS_BIG_ENDIAN
+		 ? adjust_address (src, DImode, 0)
+		 : adjust_address (src, DImode, 8));
+      emit_insn (gen_rtx_SET (dest_di, mem));
+    }
+
+  else
+    {
+      unsigned int r = REGNO (src);
+
+      /* If this is a VSX register, generate the special mfvsrd instruction
+	 to get it in a GPR.  Until we support SF and DF modes, that will
+	 always be true.  */
+      gcc_assert (VSX_REGNO_P (r));
+
+      if (s_mode == KFmode)
+	emit_insn (gen_signbitkf2_dm2 (dest_di, src));
+      else
+	emit_insn (gen_signbittf2_dm2 (dest_di, src));
+    }
+
+  emit_insn (gen_lshrdi3 (dest_di, shift_reg, GEN_INT (63)));
+  return;
+}
+
 /* A subroutine of the atomic operation splitters.  Jump to LABEL if
    COND is true.  Mark the jump as unlikely to be taken.  */
 
@@ -29864,13 +29943,20 @@ output_function_profiler (FILE *file, int labelno)
 
 /* The following variable value is the last issued insn.  */
 
-static rtx last_scheduled_insn;
+static rtx_insn *last_scheduled_insn;
 
 /* The following variable helps to balance issuing of load and
    store instructions */
 
 static int load_store_pendulum;
 
+/* The following variable helps pair divide insns during scheduling.  */
+static int divide_cnt;
+/* The following variable helps pair and alternate vector and vector load
+   insns during scheduling.  */
+static int vec_load_pendulum;
+
+
 /* Power4 load update and store update instructions are cracked into a
    load or store and an integer insn which are executed in the same cycle.
    Branches have their own dispatch slot which does not count against the
@@ -29945,7 +30031,7 @@ rs6000_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
 	   some cycles later.  */
 
 	/* Separate a load from a narrower, dependent store.  */
-	if (rs6000_sched_groups
+	if ((rs6000_sched_groups || rs6000_cpu_attr == CPU_POWER9)
 	    && GET_CODE (PATTERN (insn)) == SET
 	    && GET_CODE (PATTERN (dep_insn)) == SET
 	    && GET_CODE (XEXP (PATTERN (insn), 1)) == MEM
@@ -30185,6 +30271,8 @@ rs6000_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost)
               break;
             }
         }
+      /* Fall through, no cost for output dependency.  */
+
     case REG_DEP_ANTI:
       /* Anti dependency; DEP_INSN reads a register that INSN writes some
 	 cycles later.  */
@@ -30557,8 +30645,9 @@ rs6000_issue_rate (void)
   case CPU_POWER7:
     return 5;
   case CPU_POWER8:
-  case CPU_POWER9:
     return 7;
+  case CPU_POWER9:
+    return 6;
   default:
     return 1;
   }
@@ -30716,6 +30805,28 @@ is_store_insn (rtx insn, rtx *str_mem)
   return is_store_insn1 (PATTERN (insn), str_mem);
 }
 
+/* Return whether TYPE is a Power9 pairable vector instruction type.  */
+
+static bool
+is_power9_pairable_vec_type (enum attr_type type)
+{
+  switch (type)
+    {
+      case TYPE_VECSIMPLE:
+      case TYPE_VECCOMPLEX:
+      case TYPE_VECDIV:
+      case TYPE_VECCMP:
+      case TYPE_VECPERM:
+      case TYPE_VECFLOAT:
+      case TYPE_VECFDIV:
+      case TYPE_VECDOUBLE:
+	return true;
+      default:
+	break;
+    }
+  return false;
+}
+
 /* Returns whether the dependence between INSN and NEXT is considered
    costly by the given target.  */
 
@@ -30792,6 +30903,229 @@ get_next_active_insn (rtx_insn *insn, rtx_insn *tail)
   return insn;
 }
 
+/* Do Power9 specific sched_reorder2 reordering of ready list.  */
+
+static int
+power9_sched_reorder2 (rtx_insn **ready, int lastpos)
+{
+  int pos;
+  int i;
+  rtx_insn *tmp;
+  enum attr_type type;
+
+  type = get_attr_type (last_scheduled_insn);
+
+  /* Try to issue fixed point divides back-to-back in pairs so they will be
+     routed to separate execution units and execute in parallel.  */
+  if (type == TYPE_DIV && divide_cnt == 0)
+    {
+      /* First divide has been scheduled.  */
+      divide_cnt = 1;
+
+      /* Scan the ready list looking for another divide, if found move it
+	 to the end of the list so it is chosen next.  */
+      pos = lastpos;
+      while (pos >= 0)
+	{
+	  if (recog_memoized (ready[pos]) >= 0
+	      && get_attr_type (ready[pos]) == TYPE_DIV)
+	    {
+	      tmp = ready[pos];
+	      for (i = pos; i < lastpos; i++)
+		ready[i] = ready[i + 1];
+	      ready[lastpos] = tmp;
+	      break;
+	    }
+	  pos--;
+	}
+    }
+  else
+    {
+      /* Last insn was the 2nd divide or not a divide, reset the counter.  */
+      divide_cnt = 0;
+
+      /* Power9 can execute 2 vector operations and 2 vector loads in a single
+	 cycle.  So try to pair up and alternate groups of vector and vector
+	 load instructions.
+
+	 To aid this formation, a counter is maintained to keep track of
+	 vec/vecload insns issued.  The value of vec_load_pendulum maintains
+	 the current state with the following values:
+
+	     0  : Initial state, no vec/vecload group has been started.
+
+	     -1 : 1 vector load has been issued and another has been found on
+		  the ready list and moved to the end.
+
+	     -2 : 2 vector loads have been issued and a vector operation has
+		  been found and moved to the end of the ready list.
+
+	     -3 : 2 vector loads and a vector insn have been issued and a
+		  vector operation has been found and moved to the end of the
+		  ready list.
+
+	     1  : 1 vector insn has been issued and another has been found and
+		  moved to the end of the ready list.
+
+	     2  : 2 vector insns have been issued and a vector load has been
+		  found and moved to the end of the ready list.
+
+	     3  : 2 vector insns and a vector load have been issued and another
+		  vector load has been found and moved to the end of the ready
+		  list.	 */
+      if (type == TYPE_VECLOAD)
+	{
+	  /* Issued a vecload.  */
+	  if (vec_load_pendulum == 0)
+	    {
+	      /* We issued a single vecload, look for another and move it to
+		 the end of the ready list so it will be scheduled next.
+		 Set pendulum if found.  */
+	      pos = lastpos;
+	      while (pos >= 0)
+		{
+		  if (recog_memoized (ready[pos]) >= 0
+		      && get_attr_type (ready[pos]) == TYPE_VECLOAD)
+		    {
+		      tmp = ready[pos];
+		      for (i = pos; i < lastpos; i++)
+			ready[i] = ready[i + 1];
+		      ready[lastpos] = tmp;
+		      vec_load_pendulum = -1;
+		      return cached_can_issue_more;
+		    }
+		  pos--;
+		}
+	    }
+	  else if (vec_load_pendulum == -1)
+	    {
+	      /* This is the second vecload we've issued, search the ready
+	         list for a vector operation so we can try to schedule a
+	         pair of those next.  If found move to the end of the ready
+	         list so it is scheduled next and set the pendulum.  */
+	      pos = lastpos;
+	      while (pos >= 0)
+		{
+		  if (recog_memoized (ready[pos]) >= 0
+		      && is_power9_pairable_vec_type (
+			   get_attr_type (ready[pos])))
+		    {
+		      tmp = ready[pos];
+		      for (i = pos; i < lastpos; i++)
+			ready[i] = ready[i + 1];
+		      ready[lastpos] = tmp;
+		      vec_load_pendulum = -2;
+		      return cached_can_issue_more;
+		    }
+		  pos--;
+		}
+	    }
+	  else if (vec_load_pendulum == 2)
+	    {
+	      /* Two vector ops have been issued and we've just issued a
+		 vecload, look for another vecload and move to end of ready
+		 list if found.  */
+	      pos = lastpos;
+	      while (pos >= 0)
+	        {
+		  if (recog_memoized (ready[pos]) >= 0
+		      && get_attr_type (ready[pos]) == TYPE_VECLOAD)
+		    {
+		      tmp = ready[pos];
+		      for (i = pos; i < lastpos; i++)
+			ready[i] = ready[i + 1];
+		      ready[lastpos] = tmp;
+		      /* Set pendulum so that next vecload will be seen as
+			 finishing a group, not start of one.  */
+		      vec_load_pendulum = 3;
+		      return cached_can_issue_more;
+		    }
+		  pos--;
+		}
+	    }
+	}
+      else if (is_power9_pairable_vec_type (type))
+	{
+	  /* Issued a vector operation.  */
+	  if (vec_load_pendulum == 0)
+	    /* We issued a single vec op, look for another and move it
+	       to the end of the ready list so it will be scheduled next.
+	       Set pendulum if found.  */
+	    {
+	      pos = lastpos;
+	      while (pos >= 0)
+		{
+		  if (recog_memoized (ready[pos]) >= 0
+		      && is_power9_pairable_vec_type (
+			   get_attr_type (ready[pos])))
+		    {
+		      tmp = ready[pos];
+		      for (i = pos; i < lastpos; i++)
+			ready[i] = ready[i + 1];
+		      ready[lastpos] = tmp;
+		      vec_load_pendulum = 1;
+		      return cached_can_issue_more;
+		    }
+		  pos--;
+		}
+	    }
+	  else if (vec_load_pendulum == 1)
+	    {
+	      /* This is the second vec op we've issued, search the ready
+		 list for a vecload operation so we can try to schedule a
+		 pair of those next.  If found move to the end of the ready
+		 list so it is scheduled next and set the pendulum.  */
+	      pos = lastpos;
+	      while (pos >= 0)
+		{
+		  if (recog_memoized (ready[pos]) >= 0
+		      && get_attr_type (ready[pos]) == TYPE_VECLOAD)
+		    {
+		      tmp = ready[pos];
+		      for (i = pos; i < lastpos; i++)
+			ready[i] = ready[i + 1];
+		      ready[lastpos] = tmp;
+		      vec_load_pendulum = 2;
+		      return cached_can_issue_more;
+		    }
+		  pos--;
+		}
+	    }
+	  else if (vec_load_pendulum == -2)
+	    {
+	      /* Two vecload ops have been issued and we've just issued a
+		 vec op, look for another vec op and move to end of ready
+	  	 list if found.  */
+	      pos = lastpos;
+	      while (pos >= 0)
+		{
+		  if (recog_memoized (ready[pos]) >= 0
+		      && is_power9_pairable_vec_type (
+			   get_attr_type (ready[pos])))
+		    {
+		      tmp = ready[pos];
+		      for (i = pos; i < lastpos; i++)
+			ready[i] = ready[i + 1];
+		      ready[lastpos] = tmp;
+		      /* Set pendulum so that next vec op will be seen as
+			 finishing a group, not start of one.  */
+		      vec_load_pendulum = -3;
+		      return cached_can_issue_more;
+		    }
+		  pos--;
+		}
+	    }
+	}
+
+      /* We've either finished a vec/vecload group, couldn't find an insn to
+	 continue the current group, or the last insn had nothing to do with
+	 with a group.  In any case, reset the pendulum.  */
+      vec_load_pendulum = 0;
+    }
+
+  return cached_can_issue_more;
+}
+
 /* We are about to begin issuing insns for this clock cycle. */
 
 static int
@@ -31023,6 +31357,11 @@ rs6000_sched_reorder2 (FILE *dump, int sched_verbose, rtx_insn **ready,
         }
     }
 
+  /* Do Power9 dependent reordering if necessary.  */
+  if (rs6000_cpu == PROCESSOR_POWER9 && last_scheduled_insn
+      && recog_memoized (last_scheduled_insn) >= 0)
+    return power9_sched_reorder2 (ready, *pn_ready - 1);
+
   return cached_can_issue_more;
 }
 
@@ -31191,7 +31530,6 @@ insn_must_be_first_in_group (rtx_insn *insn)
         }
       break;
     case PROCESSOR_POWER8:
-    case PROCESSOR_POWER9:
       type = get_attr_type (insn);
 
       switch (type)
@@ -31322,7 +31660,6 @@ insn_must_be_last_in_group (rtx_insn *insn)
     }
     break;
   case PROCESSOR_POWER8:
-  case PROCESSOR_POWER9:
     type = get_attr_type (insn);
 
     switch (type)
@@ -31441,7 +31778,7 @@ force_new_group (int sched_verbose, FILE *dump, rtx *group_insns,
 
       /* Do we have a special group ending nop? */
       if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7
-	  || rs6000_cpu_attr == CPU_POWER8 || rs6000_cpu_attr == CPU_POWER9)
+	  || rs6000_cpu_attr == CPU_POWER8)
 	{
 	  nop = gen_group_ending_nop ();
 	  emit_insn_before (nop, next_insn);
@@ -31695,8 +32032,10 @@ rs6000_sched_init (FILE *dump ATTRIBUTE_UNUSED,
 		     int sched_verbose ATTRIBUTE_UNUSED,
 		     int max_ready ATTRIBUTE_UNUSED)
 {
-  last_scheduled_insn = NULL_RTX;
+  last_scheduled_insn = NULL;
   load_store_pendulum = 0;
+  divide_cnt = 0;
+  vec_load_pendulum = 0;
 }
 
 /* The following function is called at the end of scheduling BB.
@@ -31737,14 +32076,16 @@ rs6000_sched_finish (FILE *dump, int sched_verbose)
     }
 }
 
-struct _rs6000_sched_context
+struct rs6000_sched_context
 {
   short cached_can_issue_more;
-  rtx last_scheduled_insn;
+  rtx_insn *last_scheduled_insn;
   int load_store_pendulum;
+  int divide_cnt;
+  int vec_load_pendulum;
 };
 
-typedef struct _rs6000_sched_context rs6000_sched_context_def;
+typedef struct rs6000_sched_context rs6000_sched_context_def;
 typedef rs6000_sched_context_def *rs6000_sched_context_t;
 
 /* Allocate store for new scheduling context.  */
@@ -31764,14 +32105,18 @@ rs6000_init_sched_context (void *_sc, bool clean_p)
   if (clean_p)
     {
       sc->cached_can_issue_more = 0;
-      sc->last_scheduled_insn = NULL_RTX;
+      sc->last_scheduled_insn = NULL;
       sc->load_store_pendulum = 0;
+      sc->divide_cnt = 0;
+      sc->vec_load_pendulum = 0;
     }
   else
     {
       sc->cached_can_issue_more = cached_can_issue_more;
       sc->last_scheduled_insn = last_scheduled_insn;
       sc->load_store_pendulum = load_store_pendulum;
+      sc->divide_cnt = divide_cnt;
+      sc->vec_load_pendulum = vec_load_pendulum;
     }
 }
 
@@ -31786,6 +32131,8 @@ rs6000_set_sched_context (void *_sc)
   cached_can_issue_more = sc->cached_can_issue_more;
   last_scheduled_insn = sc->last_scheduled_insn;
   load_store_pendulum = sc->load_store_pendulum;
+  divide_cnt = sc->divide_cnt;
+  vec_load_pendulum = sc->vec_load_pendulum;
 }
 
 /* Free _SC.  */
@@ -35549,6 +35896,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "power9-dform-vector",	OPTION_MASK_P9_DFORM_VECTOR,	false, true  },
   { "power9-fusion",		OPTION_MASK_P9_FUSION,		false, true  },
   { "power9-minmax",		OPTION_MASK_P9_MINMAX,		false, true  },
+  { "power9-misc",		OPTION_MASK_P9_MISC,		false, true  },
   { "power9-vector",		OPTION_MASK_P9_VECTOR,		false, true  },
   { "powerpc-gfxopt",		OPTION_MASK_PPC_GFXOPT,		false, true  },
   { "powerpc-gpopt",		OPTION_MASK_PPC_GPOPT,		false, true  },
@@ -35605,6 +35953,7 @@ static struct rs6000_opt_mask const rs6000_builtin_mask_names[] =
   { "cell",		 RS6000_BTM_CELL,	false, false },
   { "power8-vector",	 RS6000_BTM_P8_VECTOR,	false, false },
   { "power9-vector",	 RS6000_BTM_P9_VECTOR,	false, false },
+  { "power9-misc",	 RS6000_BTM_P9_MISC,	false, false },
   { "crypto",		 RS6000_BTM_CRYPTO,	false, false },
   { "htm",		 RS6000_BTM_HTM,	false, false },
   { "hard-dfp",		 RS6000_BTM_DFP,	false, false },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 604d560718d..a6e80d7c897 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -314,12 +314,14 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
 #undef  TARGET_P9_MINMAX
 #undef  TARGET_P9_DFORM_SCALAR
 #undef  TARGET_P9_DFORM_VECTOR
+#undef  TARGET_P9_MISC
 #define TARGET_FLOAT128_HW 0
 #define TARGET_MODULO 0
 #define TARGET_P9_VECTOR 0
 #define TARGET_P9_MINMAX 0
 #define TARGET_P9_DFORM_SCALAR 0
 #define TARGET_P9_DFORM_VECTOR 0
+#define TARGET_P9_MISC 0
 #endif
 
 /* Define TARGET_LWSYNC_INSTRUCTION if the assembler knows about lwsync.  If
@@ -599,6 +601,9 @@ extern int rs6000_vector_align[];
 #define TARGET_VADDUQM		(TARGET_P8_VECTOR && TARGET_POWERPC64)
 #define TARGET_DIRECT_MOVE_128	(TARGET_P9_VECTOR && TARGET_DIRECT_MOVE \
 				 && TARGET_POWERPC64)
+#define TARGET_VEXTRACTUB	(TARGET_P9_VECTOR && TARGET_DIRECT_MOVE \
+				 && TARGET_UPPER_REGS_DF \
+				 && TARGET_UPPER_REGS_DI && TARGET_POWERPC64)
 
 /* Byte/char syncs were added as phased in for ISA 2.06B, but are not present
    in power7, so conditionalize them on p8 features.  TImode syncs need quad
@@ -645,6 +650,7 @@ extern int rs6000_vector_align[];
 #define MASK_NO_UPDATE			OPTION_MASK_NO_UPDATE
 #define MASK_P8_VECTOR			OPTION_MASK_P8_VECTOR
 #define MASK_P9_VECTOR			OPTION_MASK_P9_VECTOR
+#define MASK_P9_MISC			OPTION_MASK_P9_MISC
 #define MASK_POPCNTB			OPTION_MASK_POPCNTB
 #define MASK_POPCNTD			OPTION_MASK_POPCNTD
 #define MASK_PPC_GFXOPT			OPTION_MASK_PPC_GFXOPT
@@ -2695,6 +2701,7 @@ extern int frame_pointer_needed;
 #define RS6000_BTM_VSX		MASK_VSX	/* VSX (vector/scalar).  */
 #define RS6000_BTM_P8_VECTOR	MASK_P8_VECTOR	/* ISA 2.07 vector.  */
 #define RS6000_BTM_P9_VECTOR	MASK_P9_VECTOR	/* ISA 3.0 vector.  */
+#define RS6000_BTM_P9_MISC	MASK_P9_MISC	/* ISA 3.0 misc. non-vector */
 #define RS6000_BTM_CRYPTO	MASK_CRYPTO	/* crypto funcs.  */
 #define RS6000_BTM_HTM		MASK_HTM	/* hardware TM funcs.  */
 #define RS6000_BTM_SPE		MASK_STRING	/* E500 */
@@ -2715,6 +2722,7 @@ extern int frame_pointer_needed;
 				 | RS6000_BTM_VSX			\
 				 | RS6000_BTM_P8_VECTOR			\
 				 | RS6000_BTM_P9_VECTOR			\
+				 | RS6000_BTM_P9_MISC			\
 				 | RS6000_BTM_MODULO                    \
 				 | RS6000_BTM_CRYPTO			\
 				 | RS6000_BTM_FRE			\
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e8a6205df3a..5d212dd8180 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -147,6 +147,8 @@
    UNSPEC_ROUND_TO_ODD
    UNSPEC_IEEE128_MOVE
    UNSPEC_IEEE128_CONVERT
+   UNSPEC_SIGNBIT
+   UNSPEC_DOLOOP
   ])
 
 ;;
@@ -184,12 +186,12 @@
    vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,
    vecfloat,vecfdiv,vecdouble,mffgpr,mftgpr,crypto,
    veclogical,veccmpfx,vecexts,vecmove,
-   htm"
+   htm,htmsimple,dfp"
   (const_string "integer"))
 
 ;; What data size does this instruction work on?
-;; This is used for insert, mul.
-(define_attr "size" "8,16,32,64" (const_string "32"))
+;; This is used for insert, mul and others as necessary.
+(define_attr "size" "8,16,32,64,128" (const_string "32"))
 
 ;; Is this instruction record form ("dot", signed compare to 0, writing CR0)?
 ;; This is used for add, logical, shift, exts, mul.
@@ -299,6 +301,7 @@
 (include "power6.md")
 (include "power7.md")
 (include "power8.md")
+(include "power9.md")
 (include "cell.md")
 (include "xfpu.md")
 (include "a2.md")
@@ -507,6 +510,13 @@
 				(IF "TARGET_FLOAT128")
 				(TF "TARGET_LONG_DOUBLE_128")])
 
+; Iterator for signbit on 64-bit machines with direct move
+(define_mode_iterator SIGNBIT [(KF "FLOAT128_VECTOR_P (KFmode)")
+			       (TF "FLOAT128_VECTOR_P (TFmode)")])
+
+(define_mode_attr Fsignbit	[(KF "wa")
+				 (TF "wa")])
+
 ; Iterator for ISA 3.0 supported floating point types
 (define_mode_iterator FP_ISA3 [SF
 			       DF
@@ -4566,7 +4576,7 @@
 ;; when little-endian.
 (define_expand "signbit<mode>2"
   [(set (match_dup 2)
-	(float_truncate:DF (match_operand:IBM128 1 "gpc_reg_operand" "")))
+	(float_truncate:DF (match_operand:FLOAT128 1 "gpc_reg_operand" "")))
    (set (match_dup 3)
    	(subreg:DI (match_dup 2) 0))
    (set (match_dup 4)
@@ -4574,8 +4584,20 @@
    (set (match_operand:SI 0 "gpc_reg_operand" "")
   	(match_dup 6))]
   "TARGET_HARD_FLOAT
-   && (TARGET_FPRS || TARGET_E500_DOUBLE)"
+   && (TARGET_FPRS || TARGET_E500_DOUBLE)
+   && (!FLOAT128_IEEE_P (<MODE>mode)
+       || (TARGET_POWERPC64 && TARGET_DIRECT_MOVE))"
 {
+  if (FLOAT128_IEEE_P (<MODE>mode))
+    {
+      if (<MODE>mode == KFmode)
+	emit_insn (gen_signbitkf2_dm (operands[0], operands[1]));
+      else if (<MODE>mode == TFmode)
+	emit_insn (gen_signbittf2_dm (operands[0], operands[1]));
+      else
+	gcc_unreachable ();
+      DONE;
+    }
   operands[2] = gen_reg_rtx (DFmode);
   operands[3] = gen_reg_rtx (DImode);
   if (TARGET_POWERPC64)
@@ -4623,6 +4645,37 @@
    operands[5] = CONST0_RTX (<MODE>mode);
   })
 
+;; Optimize signbit on 64-bit systems with direct move to avoid doing the store
+;; and load.
+(define_insn_and_split "signbit<mode>2_dm"
+  [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r")
+	(unspec:SI
+	 [(match_operand:SIGNBIT 1 "input_operand" "<Fsignbit>,m,r")]
+	 UNSPEC_SIGNBIT))]
+  "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+{
+  rs6000_split_signbit (operands[0], operands[1]);
+  DONE;
+}
+ [(set_attr "length" "8,8,12")
+  (set_attr "type" "mftgpr,load,integer")])
+
+;; MODES_TIEABLE_P doesn't allow DImode to be tied with the various floating
+;; point types, which makes normal SUBREG's problematical. Instead use a
+;; special pattern to avoid using a normal movdi.
+(define_insn "signbit<mode>2_dm2"
+  [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
+	(unspec:DI [(match_operand:SIGNBIT 1 "gpc_reg_operand" "<Fsignbit>")
+		    (const_int 0)]
+		   UNSPEC_SIGNBIT))]
+  "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"
+  "mfvsrd %0,%x1"
+ [(set_attr "type" "mftgpr")])
+
+
 ;; Use an unspec rather providing an if-then-else in RTL, to prevent the
 ;; compiler from optimizing -0.0
 (define_insn "copysign<mode>3_fcpsgn"
@@ -5695,11 +5748,13 @@
 
 ; An UNSPEC is used so we don't have to support SImode in FP registers.
 (define_insn "stfiwx"
-  [(set (match_operand:SI 0 "memory_operand" "=Z")
-	(unspec:SI [(match_operand:DI 1 "gpc_reg_operand" "d")]
+  [(set (match_operand:SI 0 "memory_operand" "=Z,Z")
+	(unspec:SI [(match_operand:DI 1 "gpc_reg_operand" "d,wv")]
 		   UNSPEC_STFIWX))]
   "TARGET_PPC_GFXOPT"
-  "stfiwx %1,%y0"
+  "@
+   stfiwx %1,%y0
+   stxsiwx %x1,%y0"
   [(set_attr "type" "fpstore")])
 
 ;; If we don't have a direct conversion to single precision, don't enable this
@@ -6772,8 +6827,8 @@
 ;; except for 0.0 which can be created on VSX with an xor instruction.
 
 (define_insn "*mov<mode>_hardfloat32"
-  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_av>,Z,<f64_p9>,o,<f64_vsx>,<f64_vsx>,!r,Y,r,!r")
-	(match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,<f64_av>,o,<f64_p9>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r"))]
+  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_av>,Z,<f64_p9>,wY,<f64_vsx>,<f64_vsx>,!r,Y,r,!r")
+	(match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,<f64_av>,wY,<f64_p9>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r"))]
   "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
    && (gpc_reg_operand (operands[0], <MODE>mode)
        || gpc_reg_operand (operands[1], <MODE>mode))"
@@ -6792,6 +6847,7 @@
    #
    #"
   [(set_attr "type" "fpstore,fpload,fpsimple,fpload,fpstore,fpload,fpstore,veclogical,veclogical,two,store,load,two")
+   (set_attr "size" "64")
    (set_attr "length" "4,4,4,4,4,4,4,4,4,8,8,8,8")])
 
 (define_insn "*mov<mode>_softfloat32"
@@ -6810,8 +6866,8 @@
 ; ld/std require word-aligned displacements -> 'Y' constraint.
 ; List Y->r and r->Y before r->r for reload.
 (define_insn "*mov<mode>_hardfloat64"
-  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_p9>,o,<f64_av>,Z,<f64_vsx>,<f64_vsx>,!r,Y,r,!r,*c*l,!r,*h,r,wg,r,<f64_dm>")
-	(match_operand:FMOVE64 1 "input_operand" "d,m,d,o,<f64_p9>,Z,<f64_av>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r,r,h,0,wg,r,<f64_dm>,r"))]
+  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_p9>,wY,<f64_av>,Z,<f64_vsx>,<f64_vsx>,!r,Y,r,!r,*c*l,!r,*h,r,wg,r,<f64_dm>")
+	(match_operand:FMOVE64 1 "input_operand" "d,m,d,wY,<f64_p9>,Z,<f64_av>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r,r,h,0,wg,r,<f64_dm>,r"))]
   "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT
    && (gpc_reg_operand (operands[0], <MODE>mode)
        || gpc_reg_operand (operands[1], <MODE>mode))"
@@ -6837,6 +6893,7 @@
    mfvsrd %0,%x1
    mtvsrd %x0,%1"
   [(set_attr "type" "fpstore,fpload,fpsimple,fpload,fpstore,fpload,fpstore,veclogical,veclogical,integer,store,load,*,mtjmpr,mfjmpr,*,mftgpr,mffgpr,mftgpr,mffgpr")
+   (set_attr "size" "64")
    (set_attr "length" "4")])
 
 (define_insn "*mov<mode>_softfloat64"
@@ -7851,13 +7908,13 @@
 (define_insn "*movdi_internal32"
   [(set (match_operand:DI 0 "rs6000_nonimmediate_operand"
          "=Y,        r,         r,         ?m,        ?*d,        ?*d,
-          r,         ?Y,        ?Z,        ?*wb,      ?*wv,       ?wi,
+          r,         ?wY,       ?Z,        ?*wb,      ?*wv,       ?wi,
           ?wo,       ?wo,       ?wv,       ?wi,       ?wi,        ?wv,
           ?wv")
 
 	(match_operand:DI 1 "input_operand"
           "r,        Y,         r,         d,         m,          d,
-           IJKnGHF,  wb,        wv,        Y,         Z,          wi,
+           IJKnGHF,  wb,        wv,        wY,        Z,          wi,
            Oj,       wM,        OjwM,      Oj,        wM,         wS,
            wB"))]
 
@@ -7885,10 +7942,11 @@
    #
    #"
   [(set_attr "type"
-               "store,     load,      *,         fpstore,     fpload,       fpsimple,
-                *,         fpstore,   fpstore,   fpload,      fpload,       veclogical,
-                vecsimple, vecsimple, vecsimple, veclogical, veclogical,  vecsimple,
-                vecsimple")])
+               "store,     load,      *,         fpstore,    fpload,     fpsimple,
+                *,         fpstore,   fpstore,   fpload,     fpload,     veclogical,
+                vecsimple, vecsimple, vecsimple, veclogical, veclogical, vecsimple,
+                vecsimple")
+   (set_attr "size" "64")])
 
 (define_split
   [(set (match_operand:DI 0 "gpc_reg_operand" "")
@@ -7926,14 +7984,14 @@
 (define_insn "*movdi_internal64"
   [(set (match_operand:DI 0 "nonimmediate_operand"
                "=Y,        r,         r,         r,         r,          r,
-                ?m,        ?*d,       ?*d,       ?Y,        ?Z,         ?*wb,
+                ?m,        ?*d,       ?*d,       ?wY,       ?Z,         ?*wb,
                 ?*wv,      ?wi,       ?wo,       ?wo,       ?wv,        ?wi,
                 ?wi,       ?wv,       ?wv,       r,         *h,         *h,
                 ?*r,       ?*wg,      ?*r,       ?*wj")
 
 	(match_operand:DI 1 "input_operand"
                 "r,        Y,         r,         I,         L,          nF,
-                 d,        m,         d,         wb,        wv,         Y,
+                 d,        m,         d,         wb,        wv,         wY,
                  Z,        wi,        Oj,        wM,        OjwM,       Oj,
                  wM,       wS,        wB,        *h,        r,          0,
                  wg,       r,         wj,        r"))]
@@ -7971,12 +8029,13 @@
    mfvsrd %0,%x1
    mtvsrd %x0,%1"
   [(set_attr "type"
-               "store,       load,	  *,         *,         *,         *,
-                fpstore,     fpload,      fpsimple,  fpstore,   fpstore,   fpload,
-                fpload,      veclogical, vecsimple, vecsimple, vecsimple, veclogical,
-                veclogical, vecsimple,   vecsimple, mfjmpr,    mtjmpr,    *,
-                mftgpr,      mffgpr,      mftgpr,    mffgpr")
+               "store,      load,	*,         *,         *,         *,
+                fpstore,    fpload,     fpsimple,  fpstore,   fpstore,   fpload,
+                fpload,     veclogical, vecsimple, vecsimple, vecsimple, veclogical,
+                veclogical, vecsimple,  vecsimple, mfjmpr,    mtjmpr,    *,
+                mftgpr,     mffgpr,     mftgpr,    mffgpr")
 
+   (set_attr "size" "64")
    (set_attr "length"
                "4,         4,         4,         4,         4,          20,
                 4,         4,         4,         4,         4,          4,
@@ -9026,7 +9085,8 @@
    lfdu %3,%2(%0)"
   [(set_attr "type" "fpload")
    (set_attr "update" "yes")
-   (set_attr "indexed" "yes,no")])
+   (set_attr "indexed" "yes,no")
+   (set_attr "size" "64")])
 
 (define_insn "*movdf_update2"
   [(set (mem:DF (plus:SI (match_operand:SI 1 "gpc_reg_operand" "0,0")
@@ -12126,6 +12186,7 @@
 	      (set (match_dup 0)
 		   (plus:P (match_dup 0)
 			    (const_int -1)))
+	      (unspec [(const_int 0)] UNSPEC_DOLOOP)
 	      (clobber (match_scratch:CC 2 ""))
 	      (clobber (match_scratch:P 3 ""))])]
   ""
@@ -12136,6 +12197,7 @@
 ;; JUMP_INSNs.
 ;; For the length attribute to be calculated correctly, the
 ;; label MUST be operand 0.
+;; The UNSPEC is present to prevent combine creating this pattern.
 
 (define_insn "*ctr<mode>_internal1"
   [(set (pc)
@@ -12143,9 +12205,10 @@
 			  (const_int 1))
 		      (label_ref (match_operand 0 "" ""))
 		      (pc)))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
 	(plus:P (match_dup 1)
 		 (const_int -1)))
+   (unspec [(const_int 0)] UNSPEC_DOLOOP)
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
    (clobber (match_scratch:P 4 "=X,X,&r,r"))]
   ""
@@ -12167,9 +12230,10 @@
 			  (const_int 1))
 		      (pc)
 		      (label_ref (match_operand 0 "" ""))))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
 	(plus:P (match_dup 1)
 		 (const_int -1)))
+   (unspec [(const_int 0)] UNSPEC_DOLOOP)
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
    (clobber (match_scratch:P 4 "=X,X,&r,r"))]
   ""
@@ -12193,9 +12257,10 @@
 			  (const_int 1))
 		      (label_ref (match_operand 0 "" ""))
 		      (pc)))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
 	(plus:P (match_dup 1)
 		 (const_int -1)))
+   (unspec [(const_int 0)] UNSPEC_DOLOOP)
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
    (clobber (match_scratch:P 4 "=X,X,&r,r"))]
   ""
@@ -12217,9 +12282,10 @@
 			  (const_int 1))
 		      (pc)
 		      (label_ref (match_operand 0 "" ""))))
-   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l")
+   (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
 	(plus:P (match_dup 1)
 		 (const_int -1)))
+   (unspec [(const_int 0)] UNSPEC_DOLOOP)
    (clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
    (clobber (match_scratch:P 4 "=X,X,&r,r"))]
   ""
@@ -12246,6 +12312,7 @@
 		      (match_operand 6 "" "")))
    (set (match_operand:P 0 "int_reg_operand" "")
 	(plus:P (match_dup 1) (const_int -1)))
+   (unspec [(const_int 0)] UNSPEC_DOLOOP)
    (clobber (match_scratch:CC 3 ""))
    (clobber (match_scratch:P 4 ""))]
   "reload_completed"
@@ -12271,6 +12338,7 @@
 		      (match_operand 6 "" "")))
    (set (match_operand:P 0 "nonimmediate_operand" "")
 	(plus:P (match_dup 1) (const_int -1)))
+   (unspec [(const_int 0)] UNSPEC_DOLOOP)
    (clobber (match_scratch:CC 3 ""))
    (clobber (match_scratch:P 4 ""))]
   "reload_completed && ! gpc_reg_operand (operands[0], SImode)"
@@ -13431,7 +13499,8 @@
 	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsaddqp %0,%1,%2"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "sub<mode>3"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13440,7 +13509,8 @@
 	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xssubqp %0,%1,%2"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "mul<mode>3"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13449,7 +13519,8 @@
 	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsmulqp %0,%1,%2"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "div<mode>3"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13458,7 +13529,8 @@
 	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsdivqp %0,%1,%2"
-  [(set_attr "type" "vecdiv")])
+  [(set_attr "type" "vecdiv")
+   (set_attr "size" "128")])
 
 (define_insn "sqrt<mode>2"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13466,7 +13538,8 @@
 	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
    "xssqrtqp %0,%1"
-  [(set_attr "type" "vecdiv")])
+  [(set_attr "type" "vecdiv")
+   (set_attr "size" "128")])
 
 (define_expand "copysign<mode>3"
   [(use (match_operand:IEEE128 0 "altivec_register_operand"))
@@ -13494,7 +13567,8 @@
 	 UNSPEC_COPYSIGN))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
    "xscpsgnqp %0,%2,%1"
-  [(set_attr "type" "vecmove")])
+  [(set_attr "type" "vecmove")
+   (set_attr "size" "128")])
 
 (define_insn "copysign<mode>3_soft"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13514,7 +13588,8 @@
 	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsnegqp %0,%1"
-  [(set_attr "type" "vecmove")])
+  [(set_attr "type" "vecmove")
+   (set_attr "size" "128")])
 
 
 (define_insn "abs<mode>2_hw"
@@ -13523,7 +13598,8 @@
 	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsabsqp %0,%1"
-  [(set_attr "type" "vecmove")])
+  [(set_attr "type" "vecmove")
+   (set_attr "size" "128")])
 
 
 (define_insn "*nabs<mode>2_hw"
@@ -13533,7 +13609,8 @@
 	  (match_operand:IEEE128 1 "altivec_register_operand" "v"))))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsnabsqp %0,%1"
-  [(set_attr "type" "vecmove")])
+  [(set_attr "type" "vecmove")
+   (set_attr "size" "128")])
 
 ;; Initially don't worry about doing fusion
 (define_insn "*fma<mode>4_hw"
@@ -13544,7 +13621,8 @@
 	 (match_operand:IEEE128 3 "altivec_register_operand" "0")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsmaddqp %0,%1,%2"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "*fms<mode>4_hw"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13555,7 +13633,8 @@
 	  (match_operand:IEEE128 3 "altivec_register_operand" "0"))))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsmsubqp %0,%1,%2"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "*nfma<mode>4_hw"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13566,7 +13645,8 @@
 	  (match_operand:IEEE128 3 "altivec_register_operand" "0"))))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsnmaddqp %0,%1,%2"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "*nfms<mode>4_hw"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13578,7 +13658,8 @@
 	   (match_operand:IEEE128 3 "altivec_register_operand" "0")))))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xsnmsubqp %0,%1,%2"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "extend<SFDF:mode><IEEE128:mode>2_hw"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13586,7 +13667,8 @@
 	 (match_operand:SFDF 1 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<IEEE128:MODE>mode)"
   "xscvdpqp %0,%1"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 ;; Conversion between KFmode and TFmode if TFmode is ieee 128-bit floating
 ;; point is a simple copy.
@@ -13628,7 +13710,8 @@
 	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xscvqpdp %0,%1"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 ;; There is no KFmode -> SFmode instruction. Preserve the accuracy by doing
 ;; the KFmode -> DFmode conversion using round to odd rather than the normal
@@ -13725,7 +13808,8 @@
 	 UNSPEC_IEEE128_CONVERT))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xscvqp<su>wz %0,%1"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "*xscvqp<su>dz_<mode>"
   [(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
@@ -13735,7 +13819,8 @@
 	 UNSPEC_IEEE128_CONVERT))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xscvqp<su>dz %0,%1"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "*xscv<su>dqp_<mode>"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
@@ -13744,7 +13829,8 @@
 		    UNSPEC_IEEE128_CONVERT)))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xscv<su>dqp %0,%1"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 (define_insn "*ieee128_mfvsrd_64bit"
   [(set (match_operand:DI 0 "reg_or_indexed_operand" "=wr,Z,wi")
@@ -13821,7 +13907,8 @@
 		   UNSPEC_ROUND_TO_ODD))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
   "xscvqpdpo %0,%1"
-  [(set_attr "type" "vecfloat")])
+  [(set_attr "type" "vecfloat")
+   (set_attr "size" "128")])
 
 ;; IEEE 128-bit comparisons
 (define_insn "*cmp<mode>_hw"
@@ -13830,7 +13917,8 @@
 		      (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
    "xscmpuqp %0,%1,%2"
-  [(set_attr "type" "fpcompare")])
+  [(set_attr "type" "veccmp")
+   (set_attr "size" "128")])
 
 
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 4b9905fe767..4f67473c7d6 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -609,9 +609,13 @@ mpower9-fusion
 Target Report Mask(P9_FUSION) Var(rs6000_isa_flags)
 Fuse certain operations together for better performance on power9.
 
+mpower9-misc
+Target Undocumented Report Mask(P9_MISC) Var(rs6000_isa_flags)
+Use/do not use certain scalar instructions added in ISA 3.0.
+
 mpower9-vector
 Target Report Mask(P9_VECTOR) Var(rs6000_isa_flags)
-Use/do not use vector and scalar instructions added in ISA 3.0.
+Use/do not use vector instructions added in ISA 3.0.
 
 mpower9-dform-scalar
 Target Undocumented Mask(P9_DFORM_SCALAR) Var(rs6000_isa_flags)
diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000
index 0ba0af0666c..f72f729d3a6 100644
--- a/gcc/config/rs6000/t-rs6000
+++ b/gcc/config/rs6000/t-rs6000
@@ -50,6 +50,7 @@ MD_INCLUDES = $(srcdir)/config/rs6000/rs64.md \
 	$(srcdir)/config/rs6000/power6.md \
 	$(srcdir)/config/rs6000/power7.md \
 	$(srcdir)/config/rs6000/power8.md \
+	$(srcdir)/config/rs6000/power9.md \
 	$(srcdir)/config/rs6000/cell.md \
 	$(srcdir)/config/rs6000/xfpu.md \
 	$(srcdir)/config/rs6000/a2.md \
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 4fa7f6a181c..861b1479a2e 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -263,6 +263,21 @@
 (define_mode_iterator VSINT_84  [V4SI V2DI DI])
 (define_mode_iterator VSINT_842 [V8HI V4SI V2DI])
 
+;; Iterator for ISA 3.0 vector extract/insert of integer vectors
+(define_mode_iterator VSX_EXTRACT_I [V16QI V8HI V4SI])
+
+;; Mode attribute to give the correct predicate for ISA 3.0 vector extract and
+;; insert to validate the operand number.
+(define_mode_attr VSX_EXTRACT_PREDICATE [(V16QI "const_0_to_15_operand")
+					 (V8HI  "const_0_to_7_operand")
+					 (V4SI  "const_0_to_3_operand")])
+
+;; Mode attribute to give the constraint for vector extract and insert
+;; operations.
+(define_mode_attr VSX_EX [(V16QI "v")
+			  (V8HI  "v")
+			  (V4SI  "wa")])
+
 ;; Constants for creating unspecs
 (define_c_enum "unspec"
   [UNSPEC_VSX_CONCAT
@@ -2322,6 +2337,78 @@
     FAIL;
 })
 
+;; Extraction of a single element in a small integer vector.  None of the small
+;; types are currently allowed in a vector register, so we extract to a DImode
+;; and either do a direct move or store.
+(define_insn_and_split  "vsx_extract_<mode>"
+  [(set (match_operand:<VS_scalar> 0 "nonimmediate_operand" "=r,Z")
+	(vec_select:<VS_scalar>
+	 (match_operand:VSX_EXTRACT_I 1 "gpc_reg_operand" "<VSX_EX>,<VSX_EX>")
+	 (parallel [(match_operand:QI 2 "<VSX_EXTRACT_PREDICATE>" "n,n")])))
+   (clobber (match_scratch:DI 3 "=<VSX_EX>,<VSX_EX>"))]
+  "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_VEXTRACTUB"
+  "#"
+  "&& (reload_completed || MEM_P (operands[0]))"
+  [(const_int 0)]
+{
+  rtx dest = operands[0];
+  rtx src = operands[1];
+  rtx element = operands[2];
+  rtx di_tmp = operands[3];
+
+  if (GET_CODE (di_tmp) == SCRATCH)
+    di_tmp = gen_reg_rtx (DImode);
+
+  emit_insn (gen_vsx_extract_<mode>_di (di_tmp, src, element));
+
+  if (REG_P (dest))
+    emit_move_insn (gen_rtx_REG (DImode, REGNO (dest)), di_tmp);
+  else if (SUBREG_P (dest))
+    emit_move_insn (gen_rtx_REG (DImode, subreg_regno (dest)), di_tmp);
+  else if (MEM_P (operands[0]))
+    {
+      if (can_create_pseudo_p ())
+	dest = rs6000_address_for_fpconvert (dest);
+
+      if (<MODE>mode == V16QImode)
+	emit_insn (gen_p9_stxsibx (dest, di_tmp));
+      else if (<MODE>mode == V8HImode)
+	emit_insn (gen_p9_stxsihx (dest, di_tmp));
+      else if (<MODE>mode == V4SImode)
+	emit_insn (gen_stfiwx (dest, di_tmp));
+      else
+	gcc_unreachable ();
+    }
+  else
+    gcc_unreachable ();
+
+  DONE;
+}
+  [(set_attr "type" "vecsimple,fpstore")])
+
+(define_insn  "vsx_extract_<mode>_di"
+  [(set (match_operand:DI 0 "gpc_reg_operand" "=<VSX_EX>")
+	(zero_extend:DI
+	 (vec_select:<VS_scalar>
+	  (match_operand:VSX_EXTRACT_I 1 "gpc_reg_operand" "<VSX_EX>")
+	  (parallel [(match_operand:QI 2 "<VSX_EXTRACT_PREDICATE>" "n")]))))]
+  "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_VEXTRACTUB"
+{
+  int element = INTVAL (operands[2]);
+  int unit_size = GET_MODE_UNIT_SIZE (<MODE>mode);
+  int offset = ((VECTOR_ELT_ORDER_BIG)
+		? unit_size * element
+		: unit_size * (GET_MODE_NUNITS (<MODE>mode) - 1 - element));
+
+  operands[2] = GEN_INT (offset);
+  if (unit_size == 4)
+    return "xxextractuw %x0,%x1,%2";
+  else
+    return "vextractu<wd> %0,%1,%2";
+}
+  [(set_attr "type" "vecsimple")])
+
+
 ;; Expanders for builtins
 (define_expand "vsx_mergel_<mode>"
   [(use (match_operand:VSX_D 0 "vsx_register_operand" ""))
@@ -2425,9 +2512,8 @@
   [(set (match_dup 0)
 	(unspec:V4SF [(match_dup 1)] UNSPEC_VSX_CVDPSPN))
    (set (match_dup 0)
-	(vec_duplicate:V4SF
-	 (vec_select:SF (match_dup 0)
-			(parallel [(const_int 0)]))))]
+	(unspec:V4SF [(match_dup 0)
+		      (const_int 0)] UNSPEC_VSX_XXSPLTW))]
   ""
   [(set_attr "type" "vecload,vecperm,mftgpr")
    (set_attr "length" "4,8,4")])
diff --git a/gcc/config/s390/predicates.md b/gcc/config/s390/predicates.md
index e66f4a4110b..75e4cb86b20 100644
--- a/gcc/config/s390/predicates.md
+++ b/gcc/config/s390/predicates.md
@@ -182,6 +182,13 @@
   return s390_contiguous_bitmask_p (INTVAL (op), GET_MODE_BITSIZE (mode), NULL, NULL);
 })
 
+;; Return true if OP is ligitimate for any LOC instruction.
+
+(define_predicate "loc_operand"
+  (ior (match_operand 0 "nonimmediate_operand")
+      (and (match_code "const_int")
+	   (match_test "INTVAL (op) <= 32767 && INTVAL (op) >= -32768"))))
+
 ;; operators --------------------------------------------------------------
 
 ;; Return nonzero if OP is a valid comparison operator
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index ee0187c67f7..9d2b2c0cadd 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -6443,11 +6443,17 @@ s390_expand_vec_init (rtx target, rtx vals)
   /* Unfortunately the vec_init expander is not allowed to fail.  So
      we have to implement the fallback ourselves.  */
   for (i = 0; i < n_elts; i++)
-    emit_insn (gen_rtx_SET (target,
-			    gen_rtx_UNSPEC (mode,
-					    gen_rtvec (3, XVECEXP (vals, 0, i),
-						       GEN_INT (i), target),
-					    UNSPEC_VEC_SET)));
+    {
+      rtx elem = XVECEXP (vals, 0, i);
+      if (!general_operand (elem, GET_MODE (elem)))
+	elem = force_reg (inner_mode, elem);
+
+      emit_insn (gen_rtx_SET (target,
+			      gen_rtx_UNSPEC (mode,
+					      gen_rtvec (3, elem,
+							 GEN_INT (i), target),
+					      UNSPEC_VEC_SET)));
+    }
 }
 
 /* Structure to hold the initial parameters for a compare_and_swap operation
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index f8c61a8fd06..6d8d04181ef 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -483,7 +483,7 @@
   (const (symbol_ref "s390_tune_attr")))
 
 (define_attr "cpu_facility"
-  "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vec"
+  "standard,ieee,zarch,cpu_zarch,longdisp,extimm,dfp,z10,z196,zEC12,vec,z13"
   (const_string "standard"))
 
 (define_attr "enabled" ""
@@ -528,7 +528,12 @@
 
          (and (eq_attr "cpu_facility" "vec")
               (match_test "TARGET_VX"))
-	 (const_int 1)]
+	 (const_int 1)
+
+         (and (eq_attr "cpu_facility" "z13")
+              (match_test "TARGET_Z13"))
+	 (const_int 1)
+	 ]
 	(const_int 0)))
 
 ;; Pipeline description for z900.  For lack of anything better,
@@ -6309,21 +6314,23 @@
 				     XEXP (operands[1], 1));
 })
 
-; locr, loc, stoc, locgr, locg, stocg
+; locr, loc, stoc, locgr, locg, stocg, lochi, locghi
 (define_insn_and_split "*mov<mode>cc"
-  [(set (match_operand:GPR 0 "nonimmediate_operand"   "=d,d,d,d,S,S,&d")
+  [(set (match_operand:GPR 0 "nonimmediate_operand"   "=d,d,d,d,d,d,S,S,&d")
 	(if_then_else:GPR
 	  (match_operator 1 "s390_comparison"
-	    [(match_operand 2 "cc_reg_operand"        " c,c,c,c,c,c,c")
+	    [(match_operand 2 "cc_reg_operand"        " c,c,c,c,c,c,c,c,c")
 	     (match_operand 5 "const_int_operand"     "")])
-	  (match_operand:GPR 3 "nonimmediate_operand" " d,0,S,0,d,0,S")
-	  (match_operand:GPR 4 "nonimmediate_operand" " 0,d,0,S,0,d,S")))]
+	  (match_operand:GPR 3 "loc_operand" " d,0,S,0,K,0,d,0,S")
+	  (match_operand:GPR 4 "loc_operand" " 0,d,0,S,0,K,0,d,S")))]
   "TARGET_Z196"
   "@
    loc<g>r%C1\t%0,%3
    loc<g>r%D1\t%0,%4
    loc<g>%C1\t%0,%3
    loc<g>%D1\t%0,%4
+   loc<g>hi%C1\t%0,%h3
+   loc<g>hi%D1\t%0,%h4
    stoc<g>%C1\t%3,%0
    stoc<g>%D1\t%4,%0
    #"
@@ -6340,7 +6347,8 @@
 	 (match_dup 0)
 	 (match_dup 4)))]
   ""
-  [(set_attr "op_type" "RRF,RRF,RSY,RSY,RSY,RSY,*")])
+  [(set_attr "op_type" "RRF,RRF,RSY,RSY,RIE,RIE,RSY,RSY,*")
+   (set_attr "cpu_facility" "*,*,*,*,z13,z13,*,*,*")])
 
 ;;
 ;;- Multiply instructions.
diff --git a/gcc/config/tilegx/linux.h b/gcc/config/tilegx/linux.h
index f68b044da13..8ed3d028568 100644
--- a/gcc/config/tilegx/linux.h
+++ b/gcc/config/tilegx/linux.h
@@ -55,12 +55,23 @@
 /* For __clear_cache in libgcc2.c.  */
 #ifdef IN_LIBGCC2
 
-#include <arch/icache.h>
-
 /* Use the minimum page size of 4K.  Alternatively we can call
-   getpagesize() but it introduces a libc dependence.  */
+   getpagesize() but it introduces a libc dependence.
+   See Linux arch/tile/include/uapi/arch/icache.h for more commentary.  */
 #undef CLEAR_INSN_CACHE
-#define CLEAR_INSN_CACHE(beg, end) invalidate_icache (beg, end - beg, 4096)
+#define CLEAR_INSN_CACHE(BEG, END)                                      \
+{                                                                       \
+  long size = (long) (END) - (long) (BEG);                              \
+  if (size)                                                             \
+    {                                                                   \
+      const char *p = (const char *) ((unsigned long) (BEG) & -64L);    \
+      const char *end = p + (size < 4096 ? size : 4096) - 1;            \
+      __insn_mf ();                                                     \
+      for (; p <= end; p += 64)                                         \
+        __insn_icoh (p);                                                \
+      __insn_drain ();                                                  \
+    }                                                                   \
+}
 
 #else
 
diff --git a/gcc/config/tilepro/linux.h b/gcc/config/tilepro/linux.h
index c7791f92de0..ebe15f4cc91 100644
--- a/gcc/config/tilepro/linux.h
+++ b/gcc/config/tilepro/linux.h
@@ -47,12 +47,31 @@
 /* For __clear_cache in libgcc2.c.  */
 #ifdef IN_LIBGCC2
 
-#include <arch/icache.h>
-
-/* Use the minimum page size of 4K.  Alternatively we can call getpagesize()
-   but it introduces a libc dependence.  */
+/* Use the minimum page size of 4K.  Alternatively we can call
+   getpagesize() but it introduces a libc dependence.
+   See Linux arch/tile/include/uapi/arch/icache.h for more commentary.  */
 #undef CLEAR_INSN_CACHE
-#define CLEAR_INSN_CACHE(beg, end) invalidate_icache (beg, end - beg, 4096)
+#define CLEAR_INSN_CACHE(BEG, END)                                      \
+{                                                                       \
+  long size = (long) (END) - (long) (BEG);                              \
+  if (size)                                                             \
+    {                                                                   \
+      const char *start = (const char *) ((unsigned long) (BEG) & -64L);\
+      const char *end =  start + (size < 16384 ? size : 16384) - 1;     \
+      long num_passes = 4;                                              \
+      __insn_mf ();                                                     \
+      do                                                                \
+      {                                                                 \
+        const char *p;                                                  \
+        for (p = start; p <= end; p += 64)                              \
+          __insn_icoh (p);                                              \
+        start += 4096;                                                  \
+        end += 4096;                                                    \
+      }                                                                 \
+      while (--num_passes > 0);                                         \
+      __insn_drain ();                                                  \
+    }                                                                   \
+}
 
 #else
 
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 76b86a4a2d6..e70e102c6e3 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,57 @@
+2016-07-08  Jason Merrill  <jason@redhat.com>
+
+	* cp-tree.h: Unpoison lvalue_p.
+	* call.c, class.c, constexpr.c, cvt.c, init.c, lambda.c, pt.c,
+	tree.c, typeck.c, typeck2.c: Use lvalue_p instead of
+	real_lvalue_p.
+
+	* tree.c (obvalue_p): Rename from lvalue_p.
+	(lvalue_p): Define for c-common.
+	* call.c, cp-tree.h, cvt.c, init.c: Adjust.
+	* typeck.c: Adjust.
+	(cp_build_addr_expr_1): Remove obsolete code.
+
+	* tree.c (glvalue_p): Rename from lvalue_or_rvalue_with_address_p.
+	* call.c, cp-tree.h, typeck.c: Adjust.
+
+	* lambda.c (maybe_add_lambda_conv_op): Fix null object argument.
+
+	P0145R2: Refining Expression Order for C++.
+	* cp-gimplify.c (lvalue_has_side_effects): New.
+	(cp_gimplify_expr): Implement assignment ordering.
+	* call.c (op_is_ordered, build_over_call): Adjust for
+	-fargs-in-order renaming to -fstrong-eval-order.
+	* cp-gimplify.c (cp_gimplify_expr): Likewise.
+
+2016-07-07  Jakub Jelinek  <jakub@redhat.com>
+	    Kai Tietz  <ktietz70@googlemail.com>
+
+	PR c++/70869
+	PR c++/71054
+	* cp-gimplify.c (cp_genericize_r): For DECL_EXPR for non-static
+	artificial vars, genericize their initializers.
+
+2016-07-05  David Malcolm  <dmalcolm@redhat.com>
+
+	PR c++/62314
+	* parser.c (cp_parser_class_specifier_1): When reporting
+	missing semicolons, use a fixit-hint to suggest insertion
+	of a semicolon immediately after the closing brace,
+	offsetting the reported column accordingly.
+
+2016-07-04  Jan Beulich  <jbeulich@suse.com>
+
+	* lang-specs.h ("@c++-header"): Conditionalize "-o".
+
+2016-06-29  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* parser.c (cp_parser_pragma) <PRAGMA_OMP_CANCELLATION_POINT>:
+	Move pragma context checking into...
+	(cp_parser_omp_cancellation_point): ... here, and improve
+	diagnostic messages.
+	* semantics.c (finish_omp_cancel, finish_omp_cancellation_point):
+	Improve diagnostic messages.
+
 2016-06-28  Jakub Jelinek  <jakub@redhat.com>
 
 	* Make-lang.in: Don't cat ../stage_current if it does not exist.
diff --git a/gcc/cp/call.c b/gcc/cp/call.c
index d77092b1ef5..9b028144aaa 100644
--- a/gcc/cp/call.c
+++ b/gcc/cp/call.c
@@ -1126,7 +1126,10 @@ standard_conversion (tree to, tree from, tree expr, bool c_cast_p,
       fcode = TREE_CODE (from);
       conv = build_conv (ck_lvalue, from, conv);
     }
-  else if (fromref || (expr && lvalue_p (expr)))
+  /* Wrapping a ck_rvalue around a class prvalue (as a result of using
+     obvalue_p) seems odd, since it's already a prvalue, but that's how we
+     express the copy constructor call required by copy-initialization.  */
+  else if (fromref || (expr && obvalue_p (expr)))
     {
       if (expr)
 	{
@@ -2922,7 +2925,7 @@ add_builtin_candidates (struct z_candidate **candidates, enum tree_code code,
 
 	  if (code == COND_EXPR)
 	    {
-	      if (real_lvalue_p (args[i]))
+	      if (lvalue_p (args[i]))
 		vec_safe_push (types[i], build_reference_type (argtypes[i]));
 
 	      vec_safe_push (types[i], TYPE_MAIN_VARIANT (argtypes[i]));
@@ -2959,7 +2962,7 @@ add_builtin_candidates (struct z_candidate **candidates, enum tree_code code,
 	}
       else
 	{
-	  if (code == COND_EXPR && real_lvalue_p (args[i]))
+	  if (code == COND_EXPR && lvalue_p (args[i]))
 	    vec_safe_push (types[i], build_reference_type (argtypes[i]));
 	  type = non_reference (argtypes[i]);
 	  if (i != 0 || ! ref1)
@@ -4549,9 +4552,9 @@ conditional_conversion (tree e1, tree e2, tsubst_flags_t complain)
      If E2 is an xvalue: E1 can be converted to match E2 if E1 can be
      implicitly converted to the type "rvalue reference to T2", subject to
      the constraint that the reference must bind directly.  */
-  if (lvalue_or_rvalue_with_address_p (e2))
+  if (glvalue_p (e2))
     {
-      tree rtype = cp_build_reference_type (t2, !real_lvalue_p (e2));
+      tree rtype = cp_build_reference_type (t2, !lvalue_p (e2));
       conv = implicit_conversion (rtype,
 				  t1,
 				  e1,
@@ -4616,7 +4619,7 @@ build_conditional_expr_1 (location_t loc, tree arg1, tree arg2, tree arg3,
   tree arg3_type;
   tree result = NULL_TREE;
   tree result_type = NULL_TREE;
-  bool lvalue_p = true;
+  bool is_lvalue = true;
   struct z_candidate *candidates = 0;
   struct z_candidate *cand;
   void *p;
@@ -4633,7 +4636,7 @@ build_conditional_expr_1 (location_t loc, tree arg1, tree arg2, tree arg3,
 		 "ISO C++ forbids omitting the middle term of a ?: expression");
 
       /* Make sure that lvalues remain lvalues.  See g++.oliva/ext1.C.  */
-      if (real_lvalue_p (arg1))
+      if (lvalue_p (arg1))
 	arg2 = arg1 = cp_stabilize_reference (arg1);
       else
 	arg2 = arg1 = save_expr (arg1);
@@ -4868,7 +4871,7 @@ build_conditional_expr_1 (location_t loc, tree arg1, tree arg2, tree arg3,
 	  return error_mark_node;
 	}
 
-      lvalue_p = false;
+      is_lvalue = false;
       goto valid_operands;
     }
   /* [expr.cond]
@@ -4882,9 +4885,8 @@ build_conditional_expr_1 (location_t loc, tree arg1, tree arg2, tree arg3,
 	    && (CLASS_TYPE_P (arg2_type) || CLASS_TYPE_P (arg3_type)
 		|| (same_type_ignoring_top_level_qualifiers_p (arg2_type,
 							       arg3_type)
-		    && lvalue_or_rvalue_with_address_p (arg2)
-		    && lvalue_or_rvalue_with_address_p (arg3)
-		    && real_lvalue_p (arg2) == real_lvalue_p (arg3))))
+		    && glvalue_p (arg2) && glvalue_p (arg3)
+		    && lvalue_p (arg2) == lvalue_p (arg3))))
     {
       conversion *conv2;
       conversion *conv3;
@@ -4982,7 +4984,7 @@ build_conditional_expr_1 (location_t loc, tree arg1, tree arg2, tree arg3,
      If the second and third operands are glvalues of the same value
      category and have the same type, the result is of that type and
      value category.  */
-  if (((real_lvalue_p (arg2) && real_lvalue_p (arg3))
+  if (((lvalue_p (arg2) && lvalue_p (arg3))
        || (xvalue_p (arg2) && xvalue_p (arg3)))
       && same_type_p (arg2_type, arg3_type))
     {
@@ -4999,7 +5001,7 @@ build_conditional_expr_1 (location_t loc, tree arg1, tree arg2, tree arg3,
      cv-qualified) class type, overload resolution is used to
      determine the conversions (if any) to be applied to the operands
      (_over.match.oper_, _over.built_).  */
-  lvalue_p = false;
+  is_lvalue = false;
   if (!same_type_p (arg2_type, arg3_type)
       && (CLASS_TYPE_P (arg2_type) || CLASS_TYPE_P (arg3_type)))
     {
@@ -5185,7 +5187,7 @@ build_conditional_expr_1 (location_t loc, tree arg1, tree arg2, tree arg3,
   /* We can't use result_type below, as fold might have returned a
      throw_expr.  */
 
-  if (!lvalue_p)
+  if (!is_lvalue)
     {
       /* Expand both sides into the same slot, hopefully the target of
 	 the ?: expression.  We used to check for TARGET_EXPRs here,
@@ -5378,14 +5380,15 @@ add_candidates (tree fns, tree first_arg, const vec<tree, va_gc> *args,
 static int
 op_is_ordered (tree_code code)
 {
-  if (!flag_args_in_order)
-    return 0;
-
   switch (code)
     {
       // 5. b @= a
     case MODIFY_EXPR:
-      return -1;
+      return (flag_strong_eval_order > 1 ? -1 : 0);
+
+      // 6. a[b]
+    case ARRAY_REF:
+      return (flag_strong_eval_order > 1 ? 1 : 0);
 
       // 1. a.b
       // Not overloadable (yet).
@@ -5393,13 +5396,11 @@ op_is_ordered (tree_code code)
       // Only one argument.
       // 3. a->*b
     case MEMBER_REF:
-      // 6. a[b]
-    case ARRAY_REF:
       // 7. a << b
     case LSHIFT_EXPR:
       // 8. a >> b
     case RSHIFT_EXPR:
-      return 1;
+      return (flag_strong_eval_order ? 1 : 0);
 
     default:
       return 0;
@@ -6693,10 +6694,10 @@ convert_like_real (conversion *convs, tree expr, tree fn, int argnum,
 	  {
 	    tree extype = TREE_TYPE (expr);
 	    if (TYPE_REF_IS_RVALUE (ref_type)
-		&& real_lvalue_p (expr))
+		&& lvalue_p (expr))
 	      error_at (loc, "cannot bind %qT lvalue to %qT",
 			extype, totype);
-	    else if (!TYPE_REF_IS_RVALUE (ref_type) && !real_lvalue_p (expr)
+	    else if (!TYPE_REF_IS_RVALUE (ref_type) && !lvalue_p (expr)
 		     && !CP_TYPE_CONST_NON_VOLATILE_P (TREE_TYPE (ref_type)))
 	      error_at (loc, "invalid initialization of non-const reference of "
 			"type %qT from an rvalue of type %qT", totype, extype);
@@ -7830,9 +7831,7 @@ build_over_call (struct z_candidate *cand, int flags, tsubst_flags_t complain)
 
   tree call = build_cxx_call (fn, nargs, argarray, complain|decltype_flag);
   if (call != error_mark_node
-      && !magic
-      && (flag_args_in_order > 1
-	  || (cand->flags & LOOKUP_LIST_INIT_CTOR)))
+      && cand->flags & LOOKUP_LIST_INIT_CTOR)
     {
       tree c = extract_call_expr (call);
       /* build_new_op_1 will clear this when appropriate.  */
@@ -10043,7 +10042,7 @@ initialize_reference (tree type, tree expr,
 	    convert_like (conv, expr, complain);
 	  else if (!CP_TYPE_CONST_P (TREE_TYPE (type))
 		   && !TYPE_REF_IS_RVALUE (type)
-		   && !real_lvalue_p (expr))
+		   && !lvalue_p (expr))
 	    error_at (loc, "invalid initialization of non-const reference of "
 		      "type %qT from an rvalue of type %qT",
 		      type, TREE_TYPE (expr));
diff --git a/gcc/cp/class.c b/gcc/cp/class.c
index 31fa4b03136..b2db7f8aab8 100644
--- a/gcc/cp/class.c
+++ b/gcc/cp/class.c
@@ -347,7 +347,7 @@ build_base_path (enum tree_code code,
 
   if (!want_pointer)
     {
-      rvalue = !real_lvalue_p (expr);
+      rvalue = !lvalue_p (expr);
       /* This must happen before the call to save_expr.  */
       expr = cp_build_addr_expr (expr, complain);
     }
diff --git a/gcc/cp/constexpr.c b/gcc/cp/constexpr.c
index ba40435ef67..b9834a7e734 100644
--- a/gcc/cp/constexpr.c
+++ b/gcc/cp/constexpr.c
@@ -2620,7 +2620,7 @@ cxx_eval_vec_init_1 (const constexpr_ctx *ctx, tree atype, tree init,
 		      (atype, TREE_TYPE (init)));
 	  eltinit = cp_build_array_ref (input_location, init, idx,
 					tf_warning_or_error);
-	  if (!real_lvalue_p (init))
+	  if (!lvalue_p (init))
 	    eltinit = move (eltinit);
 	  eltinit = force_rvalue (eltinit, tf_warning_or_error);
 	  eltinit = (cxx_eval_constant_expression
diff --git a/gcc/cp/cp-gimplify.c b/gcc/cp/cp-gimplify.c
index 97b043acbf2..8496d7cfee7 100644
--- a/gcc/cp/cp-gimplify.c
+++ b/gcc/cp/cp-gimplify.c
@@ -559,6 +559,33 @@ simple_empty_class_p (tree type, tree op)
     && is_really_empty_class (type);
 }
 
+/* Returns true if evaluating E as an lvalue has side-effects;
+   specifically, a volatile lvalue has TREE_SIDE_EFFECTS, but it doesn't really
+   have side-effects until there is a read or write through it.  */
+
+static bool
+lvalue_has_side_effects (tree e)
+{
+  if (!TREE_SIDE_EFFECTS (e))
+    return false;
+  while (handled_component_p (e))
+    {
+      if (TREE_CODE (e) == ARRAY_REF
+	  && TREE_SIDE_EFFECTS (TREE_OPERAND (e, 1)))
+	return true;
+      e = TREE_OPERAND (e, 0);
+    }
+  if (DECL_P (e))
+    /* Just naming a variable has no side-effects.  */
+    return false;
+  else if (INDIRECT_REF_P (e))
+    /* Similarly, indirection has no side-effects.  */
+    return TREE_SIDE_EFFECTS (TREE_OPERAND (e, 0));
+  else
+    /* For anything else, trust TREE_SIDE_EFFECTS.  */
+    return TREE_SIDE_EFFECTS (e);
+}
+
 /* Do C++-specific gimplification.  Args are as for gimplify_expr.  */
 
 int
@@ -659,8 +686,6 @@ cp_gimplify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p)
 	    /* Remove any copies of empty classes.  Also drop volatile
 	       variables on the RHS to avoid infinite recursion from
 	       gimplify_expr trying to load the value.  */
-	    gimplify_expr (&TREE_OPERAND (*expr_p, 0), pre_p, post_p,
-			   is_gimple_lvalue, fb_lvalue);
 	    if (TREE_SIDE_EFFECTS (op1))
 	      {
 		if (TREE_THIS_VOLATILE (op1)
@@ -669,8 +694,29 @@ cp_gimplify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p)
 
 		gimplify_and_add (op1, pre_p);
 	      }
+	    gimplify_expr (&TREE_OPERAND (*expr_p, 0), pre_p, post_p,
+			   is_gimple_lvalue, fb_lvalue);
 	    *expr_p = TREE_OPERAND (*expr_p, 0);
 	  }
+	/* P0145 says that the RHS is sequenced before the LHS.
+	   gimplify_modify_expr gimplifies the RHS before the LHS, but that
+	   isn't quite strong enough in two cases:
+
+	   1) gimplify.c wants to leave a CALL_EXPR on the RHS, which would
+	   mean it's evaluated after the LHS.
+
+	   2) the value calculation of the RHS is also sequenced before the
+	   LHS, so for scalar assignment we need to preevaluate if the
+	   RHS could be affected by LHS side-effects even if it has no
+	   side-effects of its own.  We don't need this for classes because
+	   class assignment takes its RHS by reference.  */
+       else if (flag_strong_eval_order > 1
+                && TREE_CODE (*expr_p) == MODIFY_EXPR
+                && lvalue_has_side_effects (op0)
+		&& (TREE_CODE (op1) == CALL_EXPR
+		    || (SCALAR_TYPE_P (TREE_TYPE (op1))
+			&& !TREE_CONSTANT (op1))))
+	 TREE_OPERAND (*expr_p, 1) = get_formal_tmp_var (op1, pre_p);
       }
       ret = GS_OK;
       break;
@@ -780,11 +826,10 @@ cp_gimplify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p)
 		ret = GS_ERROR;
 	    }
 	}
-      else if (flag_args_in_order == 1
+      else if (flag_strong_eval_order
 	       && !CALL_EXPR_OPERATOR_SYNTAX (*expr_p))
 	{
-	  /* If flag_args_in_order == 1, we don't force an order on all
-	     function arguments, but do evaluate the object argument first.  */
+	  /* If flag_strong_eval_order, evaluate the object argument first.  */
 	  tree fntype = TREE_TYPE (CALL_EXPR_FN (*expr_p));
 	  if (POINTER_TYPE_P (fntype))
 	    fntype = TREE_TYPE (fntype);
@@ -1304,7 +1349,15 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data)
     {
       tree d = DECL_EXPR_DECL (stmt);
       if (TREE_CODE (d) == VAR_DECL)
-	gcc_assert (CP_DECL_THREAD_LOCAL_P (d) == DECL_THREAD_LOCAL_P (d));
+	{
+	  gcc_assert (CP_DECL_THREAD_LOCAL_P (d) == DECL_THREAD_LOCAL_P (d));
+	  /* User var initializers should be genericized during containing
+	     BIND_EXPR genericization when walk_tree walks DECL_INITIAL
+	     of BIND_EXPR_VARS.  Artificial temporaries might not be
+	     mentioned there though, so walk them now.  */
+	  if (DECL_ARTIFICIAL (d) && !TREE_STATIC (d) && DECL_INITIAL (d))
+	    cp_walk_tree (&DECL_INITIAL (d), cp_genericize_r, data, NULL);
+	}
     }
   else if (TREE_CODE (stmt) == OMP_PARALLEL
 	   || TREE_CODE (stmt) == OMP_TASK
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 5b87bb391d9..74b8c7c7963 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -6515,7 +6515,8 @@ extern tree copy_binfo				(tree, tree, tree,
 extern int member_p				(const_tree);
 extern cp_lvalue_kind real_lvalue_p		(const_tree);
 extern cp_lvalue_kind lvalue_kind		(const_tree);
-extern bool lvalue_or_rvalue_with_address_p	(const_tree);
+extern bool glvalue_p				(const_tree);
+extern bool obvalue_p				(const_tree);
 extern bool xvalue_p	                        (const_tree);
 extern tree cp_stabilize_reference		(tree);
 extern bool builtin_valid_in_constant_expr_p    (const_tree);
diff --git a/gcc/cp/cvt.c b/gcc/cp/cvt.c
index 2e2bac74307..85b3047d9f1 100644
--- a/gcc/cp/cvt.c
+++ b/gcc/cp/cvt.c
@@ -317,7 +317,7 @@ build_up_reference (tree type, tree arg, int flags, tree decl,
 
   gcc_assert (TREE_CODE (type) == REFERENCE_TYPE);
 
-  if ((flags & DIRECT_BIND) && ! real_lvalue_p (arg))
+  if ((flags & DIRECT_BIND) && ! lvalue_p (arg))
     {
       /* Create a new temporary variable.  We can't just use a TARGET_EXPR
 	 here because it needs to live as long as DECL.  */
@@ -330,7 +330,7 @@ build_up_reference (tree type, tree arg, int flags, tree decl,
       cp_finish_decl (arg, targ, /*init_const_expr_p=*/false, NULL_TREE,
 		      LOOKUP_ONLYCONVERTING|DIRECT_BIND);
     }
-  else if (!(flags & DIRECT_BIND) && ! lvalue_p (arg))
+  else if (!(flags & DIRECT_BIND) && ! obvalue_p (arg))
     return get_target_expr_sfinae (arg, complain);
 
   /* If we had a way to wrap this up, and say, if we ever needed its
@@ -439,7 +439,7 @@ convert_to_reference (tree reftype, tree expr, int convtype,
 	= build_type_conversion (reftype, expr);
 
       if (rval_as_conversion && rval_as_conversion != error_mark_node
-	  && real_lvalue_p (rval_as_conversion))
+	  && lvalue_p (rval_as_conversion))
 	{
 	  expr = rval_as_conversion;
 	  rval_as_conversion = NULL_TREE;
@@ -457,7 +457,7 @@ convert_to_reference (tree reftype, tree expr, int convtype,
 	tree ttr = lvalue_type (expr);
 
 	if ((complain & tf_error)
-	    && ! real_lvalue_p (expr))
+	    && ! lvalue_p (expr))
 	  diagnose_ref_binding (loc, reftype, intype, decl);
 
 	if (! (convtype & CONV_CONST)
@@ -473,7 +473,7 @@ convert_to_reference (tree reftype, tree expr, int convtype,
 
       return build_up_reference (reftype, expr, flags, decl, complain);
     }
-  else if ((convtype & CONV_REINTERPRET) && lvalue_p (expr))
+  else if ((convtype & CONV_REINTERPRET) && obvalue_p (expr))
     {
       /* When casting an lvalue to a reference type, just convert into
 	 a pointer to the new type and deference it.  This is allowed
diff --git a/gcc/cp/init.c b/gcc/cp/init.c
index a71c21aed90..b4a4388d705 100644
--- a/gcc/cp/init.c
+++ b/gcc/cp/init.c
@@ -3332,7 +3332,7 @@ build_new_1 (vec<tree, va_gc> **placement, tree type, tree nelts,
     rval = build2 (COMPOUND_EXPR, TREE_TYPE (rval), init_preeval_expr, rval);
 
   /* A new-expression is never an lvalue.  */
-  gcc_assert (!lvalue_p (rval));
+  gcc_assert (!obvalue_p (rval));
 
   return convert (pointer_type, rval);
 }
@@ -3750,7 +3750,7 @@ static bool
 vec_copy_assign_is_trivial (tree inner_elt_type, tree init)
 {
   tree fromtype = inner_elt_type;
-  if (real_lvalue_p (init))
+  if (lvalue_p (init))
     fromtype = cp_build_reference_type (fromtype, /*rval*/false);
   return is_trivially_xible (MODIFY_EXPR, inner_elt_type, fromtype);
 }
diff --git a/gcc/cp/lambda.c b/gcc/cp/lambda.c
index 85ad9f895d4..4d6d80fe128 100644
--- a/gcc/cp/lambda.c
+++ b/gcc/cp/lambda.c
@@ -489,7 +489,7 @@ add_capture (tree lambda, tree id, tree orig_init, bool by_reference_p,
       if (by_reference_p)
 	{
 	  type = build_reference_type (type);
-	  if (!dependent_type_p (type) && !real_lvalue_p (initializer))
+	  if (!dependent_type_p (type) && !lvalue_p (initializer))
 	    error ("cannot capture %qE by reference", initializer);
 	}
       else
@@ -904,6 +904,8 @@ maybe_add_lambda_conv_op (tree type)
   tree optype = TREE_TYPE (callop);
   tree fn_result = TREE_TYPE (optype);
 
+  tree thisarg = build_nop (TREE_TYPE (DECL_ARGUMENTS (callop)),
+			    null_pointer_node);
   if (generic_lambda_p)
     {
       /* Prepare the dependent member call for the static member function
@@ -911,7 +913,8 @@ maybe_add_lambda_conv_op (tree type)
 	 return expression for a deduced return call op to allow for simple
 	 implementation of the conversion operator.  */
 
-      tree instance = build_nop (type, null_pointer_node);
+      tree instance = cp_build_indirect_ref (thisarg, RO_NULL,
+					     tf_warning_or_error);
       tree objfn = build_min (COMPONENT_REF, NULL_TREE,
 			      instance, DECL_NAME (callop), NULL_TREE);
       int nargs = list_length (DECL_ARGUMENTS (callop)) - 1;
@@ -923,9 +926,7 @@ maybe_add_lambda_conv_op (tree type)
   else
     {
       direct_argvec = make_tree_vector ();
-      direct_argvec->quick_push (build1 (NOP_EXPR,
-					 TREE_TYPE (DECL_ARGUMENTS (callop)),
-					 null_pointer_node));
+      direct_argvec->quick_push (thisarg);
     }
 
   /* Copy CALLOP's argument list (as per 'copy_list') as FN_ARGS in order to
diff --git a/gcc/cp/lang-specs.h b/gcc/cp/lang-specs.h
index 9707fac2ad4..9217950a0da 100644
--- a/gcc/cp/lang-specs.h
+++ b/gcc/cp/lang-specs.h
@@ -47,7 +47,7 @@ along with GCC; see the file COPYING3.  If not see
       cc1plus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.ii} %{!save-temps*:%g.ii}}\
 	      %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\
 	%(cc1_options) %2\
-	%{!fsyntax-only:-o %g.s \
+	%{!fsyntax-only:%{!S:-o %g.s} \
 	    %{!fdump-ada-spec*:%{!o*:--output-pch=%i.gch}\
 			       %W{o*:--output-pch=%*}}%V}}}}",
      CPLUSPLUS_CPP_SPEC, 0, 0},
diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index d1f06fdb861..ef35aa9cfb0 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -21450,17 +21450,30 @@ cp_parser_class_specifier_1 (cp_parser* parser)
        closing brace.  */
     if (closing_brace && TYPE_P (type) && want_semicolon)
       {
+	/* Locate the closing brace.  */
 	cp_token_position prev
 	  = cp_lexer_previous_token_position (parser->lexer);
 	cp_token *prev_token = cp_lexer_token_at (parser->lexer, prev);
 	location_t loc = prev_token->location;
 
+	/* We want to suggest insertion of a ';' immediately *after* the
+	   closing brace, so, if we can, offset the location by 1 column.  */
+	location_t next_loc = loc;
+	if (!linemap_location_from_macro_expansion_p (line_table, loc))
+	  next_loc = linemap_position_for_loc_and_offset (line_table, loc, 1);
+
+	rich_location richloc (line_table, next_loc);
+	richloc.add_fixit_insert (next_loc, ";");
+
 	if (CLASSTYPE_DECLARED_CLASS (type))
-	  error_at (loc, "expected %<;%> after class definition");
+	  error_at_rich_loc (&richloc,
+			     "expected %<;%> after class definition");
 	else if (TREE_CODE (type) == RECORD_TYPE)
-	  error_at (loc, "expected %<;%> after struct definition");
+	  error_at_rich_loc (&richloc,
+			     "expected %<;%> after struct definition");
 	else if (TREE_CODE (type) == UNION_TYPE)
-	  error_at (loc, "expected %<;%> after union definition");
+	  error_at_rich_loc (&richloc,
+			     "expected %<;%> after union definition");
 	else
 	  gcc_unreachable ();
 
@@ -34395,7 +34408,8 @@ cp_parser_omp_cancel (cp_parser *parser, cp_token *pragma_tok)
 	| (OMP_CLAUSE_MASK_1 << PRAGMA_OMP_CLAUSE_TASKGROUP))
 
 static void
-cp_parser_omp_cancellation_point (cp_parser *parser, cp_token *pragma_tok)
+cp_parser_omp_cancellation_point (cp_parser *parser, cp_token *pragma_tok,
+				  enum pragma_context context)
 {
   tree clauses;
   bool point_seen = false;
@@ -34414,7 +34428,19 @@ cp_parser_omp_cancellation_point (cp_parser *parser, cp_token *pragma_tok)
   if (!point_seen)
     {
       cp_parser_error (parser, "expected %<point%>");
-      cp_parser_require_pragma_eol (parser, pragma_tok);
+      cp_parser_skip_to_pragma_eol (parser, pragma_tok);
+      return;
+    }
+
+  if (context != pragma_compound)
+    {
+      if (context == pragma_stmt)
+	error_at (pragma_tok->location,
+		  "%<#pragma omp cancellation point%> may only be used in"
+		  " compound statements");
+      else
+	cp_parser_error (parser, "expected declaration specifiers");
+      cp_parser_skip_to_pragma_eol (parser, pragma_tok);
       return;
     }
 
@@ -37203,7 +37229,7 @@ cp_parser_pragma (cp_parser *parser, enum pragma_context context, bool *if_p)
   parser->lexer->in_pragma = true;
 
   id = cp_parser_pragma_kind (pragma_tok);
-  if (id != PRAGMA_OMP_DECLARE_REDUCTION && id != PRAGMA_OACC_ROUTINE)
+  if (id != PRAGMA_OMP_DECLARE && id != PRAGMA_OACC_ROUTINE)
     cp_ensure_no_omp_declare_simd (parser);
   switch (id)
     {
@@ -37291,26 +37317,14 @@ cp_parser_pragma (cp_parser *parser, enum pragma_context context, bool *if_p)
       break;
 
     case PRAGMA_OMP_CANCELLATION_POINT:
-      switch (context)
-	{
-	case pragma_compound:
-	  cp_parser_omp_cancellation_point (parser, pragma_tok);
-	  return false;
-	case pragma_stmt:
-	  error_at (pragma_tok->location,
-		    "%<#pragma omp cancellation point%> may only be "
-		    "used in compound statements");
-	  break;
-	default:
-	  goto bad_stmt;
-	}
-      break;
+      cp_parser_omp_cancellation_point (parser, pragma_tok, context);
+      return false;
 
     case PRAGMA_OMP_THREADPRIVATE:
       cp_parser_omp_threadprivate (parser, pragma_tok);
       return false;
 
-    case PRAGMA_OMP_DECLARE_REDUCTION:
+    case PRAGMA_OMP_DECLARE:
       cp_parser_omp_declare (parser, pragma_tok, context);
       return false;
 
diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c
index c5f65a7f677..a1b0ca9a858 100644
--- a/gcc/cp/pt.c
+++ b/gcc/cp/pt.c
@@ -6533,7 +6533,7 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain)
 	  return NULL_TREE;
 	}
 
-      if (!real_lvalue_p (expr))
+      if (!lvalue_p (expr))
 	{
 	  if (complain & tf_error)
 	    error ("%qE is not a valid template argument for type %qT "
@@ -18046,7 +18046,7 @@ maybe_adjust_types_for_deduction (unification_kind_t strict,
       && TYPE_REF_IS_RVALUE (*parm)
       && TREE_CODE (TREE_TYPE (*parm)) == TEMPLATE_TYPE_PARM
       && cp_type_quals (TREE_TYPE (*parm)) == TYPE_UNQUALIFIED
-      && (arg_expr ? real_lvalue_p (arg_expr)
+      && (arg_expr ? lvalue_p (arg_expr)
 	  /* try_one_overload doesn't provide an arg_expr, but
 	     functions are always lvalues.  */
 	  : TREE_CODE (*arg) == FUNCTION_TYPE))
diff --git a/gcc/cp/semantics.c b/gcc/cp/semantics.c
index fa4698e2281..d1fb11973fd 100644
--- a/gcc/cp/semantics.c
+++ b/gcc/cp/semantics.c
@@ -8571,7 +8571,7 @@ finish_omp_cancel (tree clauses)
     mask = 8;
   else
     {
-      error ("%<#pragma omp cancel must specify one of "
+      error ("%<#pragma omp cancel%> must specify one of "
 	     "%<parallel%>, %<for%>, %<sections%> or %<taskgroup%> clauses");
       return;
     }
@@ -8608,7 +8608,7 @@ finish_omp_cancellation_point (tree clauses)
     mask = 8;
   else
     {
-      error ("%<#pragma omp cancellation point must specify one of "
+      error ("%<#pragma omp cancellation point%> must specify one of "
 	     "%<parallel%>, %<for%>, %<sections%> or %<taskgroup%> clauses");
       return;
     }
diff --git a/gcc/cp/tree.c b/gcc/cp/tree.c
index fa8db0afded..4cbf6215a13 100644
--- a/gcc/cp/tree.c
+++ b/gcc/cp/tree.c
@@ -252,9 +252,7 @@ lvalue_kind (const_tree ref)
   return op1_lvalue_kind;
 }
 
-/* Returns the kind of lvalue that REF is, in the sense of
-   [basic.lval].  This function should really be named lvalue_p; it
-   computes the C++ definition of lvalue.  */
+/* Returns the kind of lvalue that REF is, in the sense of [basic.lval].  */
 
 cp_lvalue_kind
 real_lvalue_p (const_tree ref)
@@ -266,20 +264,18 @@ real_lvalue_p (const_tree ref)
     return kind;
 }
 
-/* This differs from real_lvalue_p in that class rvalues are considered
-   lvalues.  */
+/* c-common wants us to return bool.  */
 
 bool
-lvalue_p (const_tree ref)
+lvalue_p (const_tree t)
 {
-  return (lvalue_kind (ref) != clk_none);
+  return real_lvalue_p (t);
 }
 
-/* This differs from real_lvalue_p in that rvalues formed by dereferencing
-   rvalue references are considered rvalues.  */
+/* This differs from lvalue_p in that xvalues are included.  */
 
 bool
-lvalue_or_rvalue_with_address_p (const_tree ref)
+glvalue_p (const_tree ref)
 {
   cp_lvalue_kind kind = lvalue_kind (ref);
   if (kind & clk_class)
@@ -288,7 +284,16 @@ lvalue_or_rvalue_with_address_p (const_tree ref)
     return (kind != clk_none);
 }
 
-/* Returns true if REF is an xvalue, false otherwise.  */
+/* This differs from glvalue_p in that class prvalues are included.  */
+
+bool
+obvalue_p (const_tree ref)
+{
+  return (lvalue_kind (ref) != clk_none);
+}
+
+/* Returns true if REF is an xvalue (the result of dereferencing an rvalue
+   reference), false otherwise.  */
 
 bool
 xvalue_p (const_tree ref)
@@ -608,7 +613,7 @@ build_vec_init_elt (tree type, tree init, tsubst_flags_t complain)
     {
       tree init_type = strip_array_types (TREE_TYPE (init));
       tree dummy = build_dummy_object (init_type);
-      if (!real_lvalue_p (init))
+      if (!lvalue_p (init))
 	dummy = move (dummy);
       argvec->quick_push (dummy);
     }
@@ -781,7 +786,7 @@ rvalue (tree expr)
 
   /* We need to do this for rvalue refs as well to get the right answer
      from decltype; see c++/36628.  */
-  if (!processing_template_decl && lvalue_or_rvalue_with_address_p (expr))
+  if (!processing_template_decl && glvalue_p (expr))
     expr = build1 (NON_LVALUE_EXPR, type, expr);
   else if (type != TREE_TYPE (expr))
     expr = build_nop (type, expr);
@@ -3324,7 +3329,7 @@ error_type (tree arg)
     ;
   else if (TREE_CODE (type) == ERROR_MARK)
     ;
-  else if (real_lvalue_p (arg))
+  else if (lvalue_p (arg))
     type = build_reference_type (lvalue_type (arg));
   else if (MAYBE_CLASS_TYPE_P (type))
     type = lvalue_type (arg);
@@ -4260,7 +4265,7 @@ stabilize_expr (tree exp, tree* initp)
      arguments with such a type; just treat it as a pointer.  */
   else if (TREE_CODE (TREE_TYPE (exp)) == REFERENCE_TYPE
 	   || SCALAR_TYPE_P (TREE_TYPE (exp))
-	   || !lvalue_or_rvalue_with_address_p (exp))
+	   || !glvalue_p (exp))
     {
       init_expr = get_target_expr (exp);
       exp = TARGET_EXPR_SLOT (init_expr);
@@ -4271,7 +4276,7 @@ stabilize_expr (tree exp, tree* initp)
     }
   else
     {
-      bool xval = !real_lvalue_p (exp);
+      bool xval = !lvalue_p (exp);
       exp = cp_build_addr_expr (exp, tf_warning_or_error);
       init_expr = get_target_expr (exp);
       exp = TARGET_EXPR_SLOT (init_expr);
@@ -4388,7 +4393,7 @@ stabilize_init (tree init, tree *initp)
       && TREE_CODE (t) != CONSTRUCTOR
       && TREE_CODE (t) != AGGR_INIT_EXPR
       && (SCALAR_TYPE_P (TREE_TYPE (t))
-	  || lvalue_or_rvalue_with_address_p (t)))
+	  || glvalue_p (t)))
     {
       TREE_OPERAND (init, 1) = stabilize_expr (t, initp);
       return true;
diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c
index fb6a16e00c6..2f2beead74c 100644
--- a/gcc/cp/typeck.c
+++ b/gcc/cp/typeck.c
@@ -1987,7 +1987,7 @@ decay_conversion (tree exp,
 			 TREE_OPERAND (exp, 0), op1);
 	}
 
-      if (!lvalue_p (exp)
+      if (!obvalue_p (exp)
 	  && ! (TREE_CODE (exp) == CONSTRUCTOR && TREE_STATIC (exp)))
 	{
 	  if (complain & tf_error)
@@ -5678,16 +5678,8 @@ cp_build_addr_expr_1 (tree arg, bool strict_lvalue, tsubst_flags_t complain)
     CASE_CONVERT:
     case FLOAT_EXPR:
     case FIX_TRUNC_EXPR:
-      /* Even if we're not being pedantic, we cannot allow this
-	 extension when we're instantiating in a SFINAE
-	 context.  */
-      if (! lvalue_p (arg) && complain == tf_none)
-	{
-	  if (complain & tf_error)
-	    permerror (input_location, "ISO C++ forbids taking the address of a cast to a non-lvalue expression");
-	  else
-	    return error_mark_node;
-	}
+      /* We should have handled this above in the lvalue_kind check.  */
+      gcc_unreachable ();
       break;
 
     case BASELINK:
@@ -6302,10 +6294,9 @@ build_x_conditional_expr (location_t loc, tree ifexp, tree op1, tree op2,
       tree min = build_min_non_dep (COND_EXPR, expr,
 				    orig_ifexp, orig_op1, orig_op2);
       /* Remember that the result is an lvalue or xvalue.  */
-      if (lvalue_or_rvalue_with_address_p (expr)
-	  && !lvalue_or_rvalue_with_address_p (min))
+      if (glvalue_p (expr) && !glvalue_p (min))
 	TREE_TYPE (min) = cp_build_reference_type (TREE_TYPE (min),
-						   !real_lvalue_p (expr));
+						   !lvalue_p (expr));
       expr = convert_from_reference (min);
     }
   return expr;
@@ -6544,7 +6535,7 @@ maybe_warn_about_useless_cast (tree type, tree expr, tsubst_flags_t complain)
     {
       if ((TREE_CODE (type) == REFERENCE_TYPE
 	   && (TYPE_REF_IS_RVALUE (type)
-	       ? xvalue_p (expr) : real_lvalue_p (expr))
+	       ? xvalue_p (expr) : lvalue_p (expr))
 	   && same_type_p (TREE_TYPE (expr), TREE_TYPE (type)))
 	  || same_type_p (TREE_TYPE (expr), type))
 	warning (OPT_Wuseless_cast, "useless cast to type %qT", type);
@@ -6646,7 +6637,7 @@ build_static_cast_1 (tree type, tree expr, bool c_cast_p,
   if (TREE_CODE (type) == REFERENCE_TYPE
       && CLASS_TYPE_P (TREE_TYPE (type))
       && CLASS_TYPE_P (intype)
-      && (TYPE_REF_IS_RVALUE (type) || real_lvalue_p (expr))
+      && (TYPE_REF_IS_RVALUE (type) || lvalue_p (expr))
       && DERIVED_FROM_P (intype, TREE_TYPE (type))
       && can_convert (build_pointer_type (TYPE_MAIN_VARIANT (intype)),
 		      build_pointer_type (TYPE_MAIN_VARIANT
@@ -6993,7 +6984,7 @@ build_reinterpret_cast_1 (tree type, tree expr, bool c_cast_p,
      reinterpret_cast.  */
   if (TREE_CODE (type) == REFERENCE_TYPE)
     {
-      if (! real_lvalue_p (expr))
+      if (! lvalue_p (expr))
 	{
           if (complain & tf_error)
             error ("invalid cast of an rvalue expression of type "
@@ -7240,10 +7231,8 @@ build_const_cast_1 (tree dst_type, tree expr, tsubst_flags_t complain,
     {
       reference_type = dst_type;
       if (!TYPE_REF_IS_RVALUE (dst_type)
-	  ? real_lvalue_p (expr)
-	  : (CLASS_TYPE_P (TREE_TYPE (dst_type))
-	     ? lvalue_p (expr)
-	     : lvalue_or_rvalue_with_address_p (expr)))
+	  ? lvalue_p (expr)
+	  : obvalue_p (expr))
 	/* OK.  */;
       else
 	{
diff --git a/gcc/cp/typeck2.c b/gcc/cp/typeck2.c
index 65d91c97784..b1206c09a0e 100644
--- a/gcc/cp/typeck2.c
+++ b/gcc/cp/typeck2.c
@@ -1895,7 +1895,7 @@ build_m_component_ref (tree datum, tree component, tsubst_flags_t complain)
 	 operand is a pointer to member function with ref-qualifier &&.  */
       if (FUNCTION_REF_QUALIFIED (type))
 	{
-	  bool lval = real_lvalue_p (datum);
+	  bool lval = lvalue_p (datum);
 	  if (lval && FUNCTION_RVALUE_QUALIFIED (type))
 	    {
 	      if (complain & tf_error)
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index b5f6e12f8be..5b9e6174cfa 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -14842,12 +14842,31 @@ The @code{__builtin_divde}, @code{__builtin_divdeo},
 64-bit environment support ISA 2.06 or later.
 
 The following built-in functions are available for the PowerPC family
-of processors, starting with ISA 3.0 or later (@option{-mcpu=power9})
-or with @option{-mmodulo}:
+of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}):
 @smallexample
 long long __builtin_darn (void);
 long long __builtin_darn_raw (void);
 int __builtin_darn_32 (void);
+
+int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_lt_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_lt_td (unsigned int comparison, _Decimal128 value);
+
+int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_gt_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_gt_td (unsigned int comparison, _Decimal128 value);
+
+int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_eq_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_eq_td (unsigned int comparison, _Decimal128 value);
+
+int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal128 value);
+int __builtin_dfp_dtstsfi_ov_dd (unsigned int comparison, _Decimal64 value);
+int __builtin_dfp_dtstsfi_ov_td (unsigned int comparison, _Decimal128 value);
 @end smallexample
 
 The @code{__builtin_darn} and @code{__builtin_darn_raw}
@@ -14858,6 +14877,38 @@ random number.  The @code{__builtin_darn_raw} function provides a
 64-bit raw random number.  The @code{__builtin_darn_32} function
 provides a 32-bit random number.
 
+The @code{__builtin_dfp_dtstsfi_lt} function returns a non-zero value
+if and only if the number of signficant digits of its @code{value} argument
+is less than its @code{comparison} argument.  The
+@code{__builtin_dfp_dtstsfi_lt_dd} and
+@code{__builtin_dfp_dtstsfi_lt_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
+The @code{__builtin_dfp_dtstsfi_gt} function returns a non-zero value
+if and only if the number of signficant digits of its @code{value} argument
+is greater than its @code{comparison} argument.  The
+@code{__builtin_dfp_dtstsfi_gt_dd} and
+@code{__builtin_dfp_dtstsfi_gt_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
+The @code{__builtin_dfp_dtstsfi_eq} function returns a non-zero value
+if and only if the number of signficant digits of its @code{value} argument
+equals its @code{comparison} argument.  The
+@code{__builtin_dfp_dtstsfi_eq_dd} and
+@code{__builtin_dfp_dtstsfi_eq_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
+The @code{__builtin_dfp_dtstsfi_ov} function returns a non-zero value
+if and only if its @code{value} argument has an undefined number of
+significant digits, such as when @code{value} is an encoding of @code{NaN}.
+The @code{__builtin_dfp_dtstsfi_ov_dd} and
+@code{__builtin_dfp_dtstsfi_ov_td} functions behave similarly, but
+require that the type of the @code{value} argument be
+@code{__Decimal64} and @code{__Decimal128} respectively.
+
 The following built-in functions are available for the PowerPC family
 of processors when hardware decimal floating point
 (@option{-mhard-dfp}) is available:
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 0eca7f179f4..f19a3d7d91e 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -644,8 +644,8 @@ Objective-C and Objective-C++ Dialects}.
 @emph{AVR Options}
 @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
 -mcall-prologues -mint8 -mn_flash=@var{size} -mno-interrupts @gol
--mrelax -mrmw -mstrict-X -mtiny-stack -nodevicelib -Waddr-space-convert @gol
--Wmisspelled-isr}
+-mrelax -mrmw -mstrict-X -mtiny-stack -mfract-convert-truncate -nodevicelib @gol
+-Waddr-space-convert -Wmisspelled-isr}
 
 @emph{Blackfin Options}
 @gccoptlist{-mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @gol
@@ -2237,14 +2237,6 @@ option is used for the warning.
 Turn off all access checking.  This switch is mainly useful for working
 around bugs in the access control code.
 
-@item -fargs-in-order
-@opindex fargs-in-order
-Evaluate function arguments and operands of some binary expressions in
-left-to-right order, and evaluate the right side of an assignment
-before the left side, as proposed in P0145R2.  Enabled by default with
-@option{-std=c++1z}.  @option{-fargs-in-order=1} implements all of the
-ordering requirements except function arguments.
-
 @item -fcheck-new
 @opindex fcheck-new
 Check that the pointer returned by @code{operator new} is non-null
@@ -2483,6 +2475,15 @@ represented in the minimum number of bits needed to represent all the
 enumerators).  This assumption may not be valid if the program uses a
 cast to convert an arbitrary integer value to the enumerated type.
 
+@item -fstrong-eval-order
+@opindex fstrong-eval-order
+Evaluate member access, array subscripting, and shift expressions in
+left-to-right order, and evaluate assignment in right-to-left order,
+as adopted for C++17.  Enabled by default with @option{-std=c++1z}.
+@option{-fstrong-eval-order=some} enables just the ordering of member
+access and shift expressions, and is the default without
+@option{-std=c++1z}.
+
 @item -ftemplate-backtrace-limit=@var{n}
 @opindex ftemplate-backtrace-limit
 Set the maximum number of template instantiation notes for a single
@@ -4079,6 +4080,13 @@ diagnosed by this option, and it may give an occasional false positive
 result, but in general it has been found fairly effective at detecting
 this sort of problem in programs.
 
+The C++17 standard will define the order of evaluation of operands in
+more cases: in particular it requires that the right-hand side of an
+assignment be evaluated before the left-hand side, so the above
+examples are no longer undefined.  But this warning will still warn
+about them, to help people avoid writing code that is undefined in C
+and earlier revisions of C++.
+
 The standard is worded confusingly, therefore there is some debate
 over the precise meaning of the sequence point rules in subtle cases.
 Links to discussions of the problem, including proposed formal
@@ -13108,10 +13116,13 @@ more feature modifiers.  This option has the form
 @option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}.
 
 The permissible values for @var{arch} are @samp{armv8-a},
-@samp{armv8.1-a} or @var{native}.
+@samp{armv8.1-a}, @samp{armv8.2-a} or @var{native}.
+
+The value @samp{armv8.2-a} implies @samp{armv8.1-a} and enables compiler
+support for the ARMv8.2-A architecture extensions.
 
 The value @samp{armv8.1-a} implies @samp{armv8-a} and enables compiler
-support for the ARMv8.1 architecture extension.  In particular, it
+support for the ARMv8.1-A architecture extension.  In particular, it
 enables the @samp{+crc} and @samp{+lse} features.
 
 The value @samp{native} is available on native AArch64 GNU/Linux and
@@ -13215,6 +13226,8 @@ instructions.  This is on by default for all possible values for options
 @item lse
 Enable Large System Extension instructions.  This is on by default for
 @option{-march=armv8.1-a}.
+@item fp16
+Enable FP16 extension.  This also enables floating-point instructions.
 
 @end table
 
@@ -14150,7 +14163,8 @@ of the @option{-mcpu=} option.  Permissible names are: @samp{armv2},
 @samp{armv6t2}, @samp{armv6z}, @samp{armv6zk},
 @samp{armv7}, @samp{armv7-a}, @samp{armv7-m}, @samp{armv7-r}, @samp{armv7e-m},
 @samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc}, @samp{armv8.1-a},
-@samp{armv8.1-a+crc}, @samp{iwmmxt}, @samp{iwmmxt2}.
+@samp{armv8.1-a+crc}, @samp{armv8-m.base}, @samp{armv8-m.main},
+@samp{armv8-m.main+dsp}, @samp{iwmmxt}, @samp{iwmmxt2}.
 
 Architecture revisions older than @samp{armv4t} are deprecated.
 
@@ -14462,10 +14476,10 @@ generating these instructions.  This option is enabled by default when
 @opindex mno-unaligned-access
 Enables (or disables) reading and writing of 16- and 32- bit values
 from addresses that are not 16- or 32- bit aligned.  By default
-unaligned access is disabled for all pre-ARMv6 and all ARMv6-M
-architectures, and enabled for all other architectures.  If unaligned
-access is not enabled then words in packed data structures are
-accessed a byte at a time.
+unaligned access is disabled for all pre-ARMv6, all ARMv6-M and for
+ARMv8-M Baseline architectures, and enabled for all other
+architectures.  If unaligned access is not enabled then words in packed
+data structures are accessed a byte at a time.
 
 The ARM attribute @code{Tag_CPU_unaligned_access} is set in the
 generated object file to either true or false, depending upon the
@@ -14628,6 +14642,10 @@ sbiw r26, const   ; X -= const
 @opindex mtiny-stack
 Only change the lower 8@tie{}bits of the stack pointer.
 
+@item -mfract-convert-truncate
+@opindex mfract-convert-truncate
+Allow to use truncation instead of rounding towards zero for fractional fixed-point types.
+
 @item -nodevicelib
 @opindex nodevicelib
 Don't link against AVR-LibC's device specific library @code{lib<mcu>.a}.
@@ -20352,9 +20370,14 @@ hardware instructions.
 
 The VSX instruction set (@option{-mvsx}, @option{-mcpu=power7}, or
 @option{-mcpu=power8}) must be enabled to use the @option{-mfloat128}
-option.  The @code{-mfloat128} option only works on PowerPC 64-bit
+option.  The @option{-mfloat128} option only works on PowerPC 64-bit
 Linux systems.
 
+If you use the ISA 3.0 instruction set (@option{-mcpu=power9}), the
+@option{-mfloat128} option will also enable the generation of ISA 3.0
+IEEE 128-bit floating point instructions.  Otherwise, IEEE 128-bit
+floating point will be done with software emulation.
+
 @item -mfloat128-hardware
 @itemx -mno-float128-hardware
 @opindex mfloat128-hardware
@@ -20362,6 +20385,13 @@ Linux systems.
 Enable/disable using ISA 3.0 hardware instructions to support the
 @var{__float128} data type.
 
+If you use @option{-mfloat128-hardware}, it will enable the option
+@option{-mfloat128} as well.
+
+If you select ISA 3.0 instructions with @option{-mcpu=power9}, but do
+not use either @option{-mfloat128} or @option{-mfloat128-hardware},
+the IEEE 128-bit floating point support will not be enabled.
+
 @item -mmodulo
 @itemx -mno-modulo
 @opindex mmodulo
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 95a781d9202..23d3c3f0f54 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1555,6 +1555,16 @@ options.  Some multilibs may be incompatible with these options.
 ARM Target supports @code{-mfpu=neon-vfpv4 -mfloat-abi=softfp} or compatible
 options.  Some multilibs may be incompatible with these options.
 
+@item arm_fp16_ok
+@anchor{arm_fp16_ok}
+Target supports options to generate VFP half-precision floating-point
+instructions.  Some multilibs may be incompatible with these
+options.  This test is valid for ARM only.
+
+@item arm_fp16_hw
+Target supports executing VFP half-precision floating-point
+instructions.  This test is valid for ARM only.
+
 @item arm_neon_fp16_ok
 @anchor{arm_neon_fp16_ok}
 ARM Target supports @code{-mfpu=neon-fp16 -mfloat-abi=softfp} or compatible
@@ -2075,6 +2085,28 @@ NEON support.  Only ARM targets support this feature, and only then
 in certain modes; see the @ref{arm_neon_ok,,arm_neon_ok effective target
 keyword}.
 
+@item arm_fp16
+VFP half-precision floating point support.  This does not select the
+FP16 format; for that, use @ref{arm_fp16_ieee,,arm_fp16_ieee} or
+@ref{arm_fp16_alternative,,arm_fp16_alternative} instead.  This
+feature is only supported by ARM targets and then only in certain
+modes; see the @ref{arm_fp16_ok,,arm_fp16_ok effective target
+keyword}.
+
+@item arm_fp16_ieee
+@anchor{arm_fp16_ieee}
+ARM IEEE 754-2008 format VFP half-precision floating point support.
+This feature is only supported by ARM targets and then only in certain
+modes; see the @ref{arm_fp16_ok,,arm_fp16_ok effective target
+keyword}.
+
+@item arm_fp16_alternative
+@anchor{arm_fp16_alternative}
+ARM Alternative format VFP half-precision floating point support.
+This feature is only supported by ARM targets and then only in certain
+modes; see the @ref{arm_fp16_ok,,arm_fp16_ok effective target
+keyword}.
+
 @item arm_neon_fp16
 NEON and half-precision floating point support.  Only ARM targets
 support this feature, and only then in certain modes; see
diff --git a/gcc/explow.c b/gcc/explow.c
index e0ce201b86b..09a033081dc 100644
--- a/gcc/explow.c
+++ b/gcc/explow.c
@@ -1174,8 +1174,7 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
   HOST_WIDE_INT stack_usage_size = -1;
   rtx_code_label *final_label;
   rtx final_target, target;
-  unsigned extra_align = 0;
-  bool must_align;
+  unsigned extra;
 
   /* If we're asking for zero bytes, it doesn't matter what we point
      to since we can't dereference it.  But return a reasonable
@@ -1246,48 +1245,21 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
     crtl->preferred_stack_boundary = PREFERRED_STACK_BOUNDARY;
 
   /* We will need to ensure that the address we return is aligned to
-     REQUIRED_ALIGN.  If STACK_DYNAMIC_OFFSET is defined, we don't
-     always know its final value at this point in the compilation (it
-     might depend on the size of the outgoing parameter lists, for
-     example), so we must align the value to be returned in that case.
-     (Note that STACK_DYNAMIC_OFFSET will have a default nonzero value if
-     STACK_POINTER_OFFSET or ACCUMULATE_OUTGOING_ARGS are defined).
-     We must also do an alignment operation on the returned value if
-     the stack pointer alignment is less strict than REQUIRED_ALIGN.
-
-     If we have to align, we must leave space in SIZE for the hole
-     that might result from the alignment operation.  */
-
-  must_align = (crtl->preferred_stack_boundary < required_align);
-  if (must_align)
-    {
-      if (required_align > PREFERRED_STACK_BOUNDARY)
-	extra_align = PREFERRED_STACK_BOUNDARY;
-      else if (required_align > STACK_BOUNDARY)
-	extra_align = STACK_BOUNDARY;
-      else
-	extra_align = BITS_PER_UNIT;
-    }
+     REQUIRED_ALIGN.  At this point in the compilation, we don't always
+     know the final value of the STACK_DYNAMIC_OFFSET used in function.c
+     (it might depend on the size of the outgoing parameter lists, for
+     example), so we must preventively align the value.  We leave space
+     in SIZE for the hole that might result from the alignment operation.  */
 
-  /* ??? STACK_POINTER_OFFSET is always defined now.  */
-#if defined (STACK_DYNAMIC_OFFSET) || defined (STACK_POINTER_OFFSET)
-  must_align = true;
-  extra_align = BITS_PER_UNIT;
-#endif
-
-  if (must_align)
-    {
-      unsigned extra = (required_align - extra_align) / BITS_PER_UNIT;
+  extra = (required_align - BITS_PER_UNIT) / BITS_PER_UNIT;
+  size = plus_constant (Pmode, size, extra);
+  size = force_operand (size, NULL_RTX);
 
-      size = plus_constant (Pmode, size, extra);
-      size = force_operand (size, NULL_RTX);
-
-      if (flag_stack_usage_info)
-	stack_usage_size += extra;
+  if (flag_stack_usage_info)
+    stack_usage_size += extra;
 
-      if (extra && size_align > extra_align)
-	size_align = extra_align;
-    }
+  if (extra && size_align > BITS_PER_UNIT)
+    size_align = BITS_PER_UNIT;
 
   /* Round the size to a multiple of the required stack alignment.
      Since the stack if presumed to be rounded before this allocation,
@@ -1361,13 +1333,10 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
       if (MALLOC_ABI_ALIGNMENT >= required_align)
 	ask = size;
       else
-	{
-	  ask = expand_binop (Pmode, add_optab, size,
-			      gen_int_mode (required_align / BITS_PER_UNIT - 1,
-					    Pmode),
-			      NULL_RTX, 1, OPTAB_LIB_WIDEN);
-	  must_align = true;
-	}
+	ask = expand_binop (Pmode, add_optab, size,
+			    gen_int_mode (required_align / BITS_PER_UNIT - 1,
+					  Pmode),
+			    NULL_RTX, 1, OPTAB_LIB_WIDEN);
 
       func = init_one_libfunc ("__morestack_allocate_stack_space");
 
@@ -1478,24 +1447,19 @@ allocate_dynamic_stack_space (rtx size, unsigned size_align,
       target = final_target;
     }
 
-  if (must_align)
-    {
-      /* CEIL_DIV_EXPR needs to worry about the addition overflowing,
-	 but we know it can't.  So add ourselves and then do
-	 TRUNC_DIV_EXPR.  */
-      target = expand_binop (Pmode, add_optab, target,
-			     gen_int_mode (required_align / BITS_PER_UNIT - 1,
-					   Pmode),
-			     NULL_RTX, 1, OPTAB_LIB_WIDEN);
-      target = expand_divmod (0, TRUNC_DIV_EXPR, Pmode, target,
-			      gen_int_mode (required_align / BITS_PER_UNIT,
-					    Pmode),
-			      NULL_RTX, 1);
-      target = expand_mult (Pmode, target,
-			    gen_int_mode (required_align / BITS_PER_UNIT,
-					  Pmode),
-			    NULL_RTX, 1);
-    }
+  /* CEIL_DIV_EXPR needs to worry about the addition overflowing,
+     but we know it can't.  So add ourselves and then do
+     TRUNC_DIV_EXPR.  */
+  target = expand_binop (Pmode, add_optab, target,
+			 gen_int_mode (required_align / BITS_PER_UNIT - 1,
+				       Pmode),
+			 NULL_RTX, 1, OPTAB_LIB_WIDEN);
+  target = expand_divmod (0, TRUNC_DIV_EXPR, Pmode, target,
+			  gen_int_mode (required_align / BITS_PER_UNIT, Pmode),
+			  NULL_RTX, 1);
+  target = expand_mult (Pmode, target,
+			gen_int_mode (required_align / BITS_PER_UNIT, Pmode),
+			NULL_RTX, 1);
 
   /* Now that we've committed to a return value, mark its alignment.  */
   mark_reg_pointer (target, required_align);
diff --git a/gcc/file-find.c b/gcc/file-find.c
index 289ef28de12..1066da9395a 100644
--- a/gcc/file-find.c
+++ b/gcc/file-find.c
@@ -208,3 +208,38 @@ prefix_from_string (const char *p, struct path_prefix *pprefix)
     }
   free (nstore);
 }
+
+void
+remove_prefix (const char *prefix, struct path_prefix *pprefix)
+{
+  struct prefix_list *remove, **prev, **remove_prev = NULL;
+  int max_len = 0;
+
+  if (pprefix->plist)
+    {
+      prev = &pprefix->plist;
+      for (struct prefix_list *pl = pprefix->plist; pl->next; pl = pl->next)
+	{
+	  if (strcmp (prefix, pl->prefix) == 0)
+	    {
+	      remove = pl;
+	      remove_prev = prev;
+	      continue;
+	    }
+
+	  int l = strlen (pl->prefix);
+	  if (l > max_len)
+	    max_len = l;
+
+	  prev = &pl;
+	}
+
+      if (remove_prev)
+	{
+	  *remove_prev = remove->next;
+	  free (remove);
+	}
+
+      pprefix->max_len = max_len;
+    }
+}
diff --git a/gcc/file-find.h b/gcc/file-find.h
index 5ad9a5f44c6..19a4746be09 100644
--- a/gcc/file-find.h
+++ b/gcc/file-find.h
@@ -41,6 +41,7 @@ extern void find_file_set_debug (bool);
 extern char *find_a_file (struct path_prefix *, const char *, int);
 extern void add_prefix (struct path_prefix *, const char *);
 extern void add_prefix_begin (struct path_prefix *, const char *);
+extern void remove_prefix (const char *prefix, struct path_prefix *);
 extern void prefix_from_env (const char *, struct path_prefix *);
 extern void prefix_from_string (const char *, struct path_prefix *);
 
diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index 3b9500dafe6..ac051ff96ef 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -2192,7 +2192,6 @@ fold_convertible_p (const_tree type, const_tree arg)
 
     case REAL_TYPE:
     case FIXED_POINT_TYPE:
-    case COMPLEX_TYPE:
     case VECTOR_TYPE:
     case VOID_TYPE:
       return TREE_CODE (type) == TREE_CODE (orig);
@@ -10294,11 +10293,15 @@ fold_binary_loc (location_t loc,
 	      || TREE_CODE (arg0) == BIT_IOR_EXPR
 	      || TREE_CODE (arg0) == BIT_XOR_EXPR)
 	  && TREE_CODE (TREE_OPERAND (arg0, 1)) == INTEGER_CST)
-	return fold_build2_loc (loc, TREE_CODE (arg0), type,
-			    fold_build2_loc (loc, code, type,
-					 TREE_OPERAND (arg0, 0), arg1),
-			    fold_build2_loc (loc, code, type,
-					 TREE_OPERAND (arg0, 1), arg1));
+	{
+	  tree arg00 = fold_convert_loc (loc, type, TREE_OPERAND (arg0, 0));
+	  tree arg01 = fold_convert_loc (loc, type, TREE_OPERAND (arg0, 1));
+	  return fold_build2_loc (loc, TREE_CODE (arg0), type,
+				  fold_build2_loc (loc, code, type,
+						   arg00, arg1),
+				  fold_build2_loc (loc, code, type,
+						   arg01, arg1));
+	}
 
       /* Two consecutive rotates adding up to the some integer
 	 multiple of the precision of the type can be ignored.  */
@@ -10307,7 +10310,7 @@ fold_binary_loc (location_t loc,
 	  && TREE_CODE (TREE_OPERAND (arg0, 1)) == INTEGER_CST
 	  && wi::umod_trunc (wi::add (arg1, TREE_OPERAND (arg0, 1)),
 			     prec) == 0)
-	return TREE_OPERAND (arg0, 0);
+	return fold_convert_loc (loc, type, TREE_OPERAND (arg0, 0));
 
       return NULL_TREE;
 
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index b8cadceb591..8b71025d7ac 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,134 @@
+2016-07-09  Thomas Koenig  <tkoenig@gcc.gnu.org>
+
+	PR fortran/71783
+	* frontend-passes.c (create_var):  Always allocate a charlen
+	for character variables.
+
+2016-07-08  Steven G. Kargl  <kargl@gcc.gnu.org>
+
+	PR fortran/68426
+	* simplify (gfc_simplify_spread): Adjust locus.
+
+2016-07-08  Cesar Philippidis  <cesar@codesourcery.com>
+
+	* parse.c (matcha): Define.
+	(decode_oacc_directive): Add spec_only local var and set it.  Use
+	matcha to parse acc directives except for routine and declare.  Return
+	ST_GET_FCN_CHARACTERISTICS if a non-declarative directive could be
+	matched.
+
+2016-07-08  Martin Liska  <mliska@suse.cz>
+
+	* invoke.texi (Wundefined-do-loop): Enhance documentation.
+
+2016-07-07  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/71764
+	* trans-expr.c (gfc_trans_structure_assign): Remove assert.
+
+2016-07-07  Martin Liska  <mliska@suse.cz>
+
+	* lang.opt (Wundefined-do-loop): New option.
+        * resolve.c (gfc_resolve_iterator): Warn for Wundefined-do-loop.
+	(gfc_trans_simple_do): Generate a c-style loop.
+	(gfc_trans_do): Fix GNU coding style.
+	* invoke.texi: Mention the new warning.
+
+2016-07-07  Martin Liska  <mliska@suse.cz>
+
+	* trans-stmt.c (gfc_trans_do): Add expect builtin for DO
+	loops with step bigger than +-1.
+
+2016-07-05  Alessandro Fanfarillo  <fanfarillo.gcc@gmail.com>
+
+	* array.c (gfc_match_array_ref): Add parsing support for
+	STAT= attribute in CAF reference.
+	* expr.c (gfc_find_stat_co): New function that returns
+	the STAT= assignment.
+	* gfortran.h (gfc_array_ref): New member.
+	* trans-decl.c (gfc_build_builtin_function_decls):
+	new attribute for caf_get and caf_send functions.
+	* trans-intrinsic.c (gfc_conv_intrinsic_caf_get): Passing
+	the stat attribute to external function.
+	(gfc_conv_intrinsic_caf_send): Ditto.
+
+2016-07-05  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+	PR fortran/71623
+	* trans-stmt.c (gfc_trans_allocate): Add code of pre block of typespec
+	in allocate to parent block.
+
+2016-07-04  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/66575
+	* decl.c (match_procedure_interface): Exit loop if procedure
+	interface refers to itself.
+
+2016-07-04  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+	    Steven G. Kargl  <kargl@gcc.gnu.org>
+
+	PR fortran/35849
+	* simplify.c (gfc_simplify_ishftc): Check that absolute value of
+	SHIFT is less than or equal to SIZE.
+
+2016-07-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR fortran/71687
+	* f95-lang.c (struct binding_level): Add reversed field.
+	(clear_binding_level): Adjust initializer.
+	(getdecls): If reversed is clear, set it and nreverse the names
+	chain before returning it.
+	(poplevel): Use getdecls.
+	* trans-decl.c (gfc_generate_function_code, gfc_process_block_locals):
+	Use nreverse to pushdecl decls in the declaration order.
+
+	PR fortran/71717
+	* trans-openmp.c (gfc_omp_privatize_by_reference): Return false
+	for GFC_DECL_ASSOCIATE_VAR_P with POINTER_TYPE.
+
+2016-06-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR fortran/71704
+	* parse.c (matchs, matcho): Move right before decode_omp_directive.
+	If spec_only, only gfc_match the keyword and if successful, goto
+	do_spec_only.
+	(matchds, matchdo): Define.
+	(decode_omp_directive): Add spec_only local var and set it.
+	Use matchds or matchdo macros instead of matchs or matcho
+	for declare target, declare simd, declare reduction and threadprivate
+	directives.  Return ST_GET_FCN_CHARACTERISTICS if a non-declarative
+	directive could be matched.
+	(next_statement): For ST_GET_FCN_CHARACTERISTICS restore
+	gfc_current_locus from old_locus even if there is no label.
+
+	PR fortran/71705
+	* trans-openmp.c (gfc_trans_omp_clauses): Set TREE_ADDRESSABLE on
+	decls in to/from clauses.
+
+2016-06-29  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/71686
+	* scanner.c (gfc_next_char_literal): Only decrement nextc if it
+	is not NULL.
+
+2016-06-29  Cesar Philippidis  <cesar@codesourcery.com>
+
+	* openmp.c (match_oacc_clause_gang): Rename to ...
+	(match_oacc_clause_gwv): this.  Add support for OpenACC worker and
+	vector clauses.
+	(gfc_match_omp_clauses): Use match_oacc_clause_gwv for
+	OMP_CLAUSE_{GANG,WORKER,VECTOR}.  Propagate any MATCH_ERRORs for
+	invalid OMP_CLAUSE_{ASYNC,WAIT,GANG,WORKER,VECTOR} clauses.
+	(gfc_match_oacc_wait): Propagate MATCH_ERROR for invalid
+	oacc_expr_lists.  Adjust the first and needs_space arguments to
+	gfc_match_omp_clauses.
+
+2016-06-29  Richard Biener  <rguenther@suse.de>
+
+	PR middle-end/71002
+	* f95-lang.c (LANG_HOOKS_GET_ALIAS_SET): Remove (un-)define.
+	(gfc_get_alias_set): Remove.
+
 2016-06-25  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
 
 	PR fortran/71649
diff --git a/gcc/fortran/array.c b/gcc/fortran/array.c
index 1430e80251d..03c8b17178c 100644
--- a/gcc/fortran/array.c
+++ b/gcc/fortran/array.c
@@ -156,6 +156,8 @@ gfc_match_array_ref (gfc_array_ref *ar, gfc_array_spec *as, int init,
 {
   match m;
   bool matched_bracket = false;
+  gfc_expr *tmp;
+  bool stat_just_seen = false;
 
   memset (ar, '\0', sizeof (*ar));
 
@@ -220,12 +222,27 @@ coarray:
 	return MATCH_ERROR;
     }
 
+  ar->stat = NULL;
+
   for (ar->codimen = 0; ar->codimen + ar->dimen < GFC_MAX_DIMENSIONS; ar->codimen++)
     {
       m = match_subscript (ar, init, true);
       if (m == MATCH_ERROR)
 	return MATCH_ERROR;
 
+      stat_just_seen = false;
+      if (gfc_match(" , stat = %e",&tmp) == MATCH_YES && ar->stat == NULL)
+	{
+	  ar->stat = tmp;
+	  stat_just_seen = true;
+	}
+
+      if (ar->stat && !stat_just_seen)
+	{
+	  gfc_error ("STAT= attribute in %C misplaced");
+	  return MATCH_ERROR;
+	}
+
       if (gfc_match_char (']') == MATCH_YES)
 	{
 	  ar->codimen++;
diff --git a/gcc/fortran/decl.c b/gcc/fortran/decl.c
index 724f14f7ff1..1b62833f62f 100644
--- a/gcc/fortran/decl.c
+++ b/gcc/fortran/decl.c
@@ -5454,7 +5454,8 @@ match_procedure_interface (gfc_symbol **proc_if)
       /* Resolve interface if possible. That way, attr.procedure is only set
 	 if it is declared by a later procedure-declaration-stmt, which is
 	 invalid per F08:C1216 (cf. resolve_procedure_interface).  */
-      while ((*proc_if)->ts.interface)
+      while ((*proc_if)->ts.interface
+	     && *proc_if != (*proc_if)->ts.interface)
 	*proc_if = (*proc_if)->ts.interface;
 
       if ((*proc_if)->attr.flavor == FL_UNKNOWN
diff --git a/gcc/fortran/expr.c b/gcc/fortran/expr.c
index d1258cdf380..7328898f2b6 100644
--- a/gcc/fortran/expr.c
+++ b/gcc/fortran/expr.c
@@ -4428,6 +4428,23 @@ gfc_ref_this_image (gfc_ref *ref)
   return true;
 }
 
+gfc_expr *
+gfc_find_stat_co(gfc_expr *e)
+{
+  gfc_ref *ref;
+
+  for (ref = e->ref; ref; ref = ref->next)
+    if (ref->type == REF_ARRAY && ref->u.ar.codimen > 0)
+      return ref->u.ar.stat;
+
+  if(e->value.function.actual->expr)
+    for(ref = e->value.function.actual->expr->ref; ref;
+	ref = ref->next)
+      if (ref->type == REF_ARRAY && ref->u.ar.codimen > 0)
+	return ref->u.ar.stat;
+
+  return NULL;
+}
 
 bool
 gfc_is_coindexed (gfc_expr *e)
diff --git a/gcc/fortran/f95-lang.c b/gcc/fortran/f95-lang.c
index 3f3885a09a0..fb796bd422b 100644
--- a/gcc/fortran/f95-lang.c
+++ b/gcc/fortran/f95-lang.c
@@ -74,7 +74,6 @@ static bool global_bindings_p (void);
 static bool gfc_init (void);
 static void gfc_finish (void);
 static void gfc_be_parse_file (void);
-static alias_set_type gfc_get_alias_set (tree);
 static void gfc_init_ts (void);
 static tree gfc_builtin_function (tree);
 
@@ -110,7 +109,6 @@ static const struct attribute_spec gfc_attribute_table[] =
 #undef LANG_HOOKS_MARK_ADDRESSABLE
 #undef LANG_HOOKS_TYPE_FOR_MODE
 #undef LANG_HOOKS_TYPE_FOR_SIZE
-#undef LANG_HOOKS_GET_ALIAS_SET
 #undef LANG_HOOKS_INIT_TS
 #undef LANG_HOOKS_OMP_PRIVATIZE_BY_REFERENCE
 #undef LANG_HOOKS_OMP_PREDETERMINED_SHARING
@@ -142,7 +140,6 @@ static const struct attribute_spec gfc_attribute_table[] =
 #define LANG_HOOKS_PARSE_FILE           gfc_be_parse_file
 #define LANG_HOOKS_TYPE_FOR_MODE	gfc_type_for_mode
 #define LANG_HOOKS_TYPE_FOR_SIZE	gfc_type_for_size
-#define LANG_HOOKS_GET_ALIAS_SET	gfc_get_alias_set
 #define LANG_HOOKS_INIT_TS		gfc_init_ts
 #define LANG_HOOKS_OMP_PRIVATIZE_BY_REFERENCE	gfc_omp_privatize_by_reference
 #define LANG_HOOKS_OMP_PREDETERMINED_SHARING	gfc_omp_predetermined_sharing
@@ -289,6 +286,9 @@ binding_level {
   tree blocks;
   /* The binding level containing this one (the enclosing binding level).  */
   struct binding_level *level_chain;
+  /* True if nreverse has been already called on names; if false, names
+     are ordered from newest declaration to oldest one.  */
+  bool reversed;
 };
 
 /* The binding level currently in effect.  */
@@ -299,7 +299,7 @@ static GTY(()) struct binding_level *current_binding_level = NULL;
 static GTY(()) struct binding_level *global_binding_level;
 
 /* Binding level structures are initialized by copying this one.  */
-static struct binding_level clear_binding_level = { NULL, NULL, NULL };
+static struct binding_level clear_binding_level = { NULL, NULL, NULL, false };
 
 
 /* Return true if we are in the global binding level.  */
@@ -313,6 +313,11 @@ global_bindings_p (void)
 tree
 getdecls (void)
 {
+  if (!current_binding_level->reversed)
+    {
+      current_binding_level->reversed = true;
+      current_binding_level->names = nreverse (current_binding_level->names);
+    }
   return current_binding_level->names;
 }
 
@@ -350,7 +355,7 @@ poplevel (int keep, int functionbody)
      binding level that we are about to exit and which is returned by this
      routine.  */
   tree block_node = NULL_TREE;
-  tree decl_chain = current_binding_level->names;
+  tree decl_chain = getdecls ();
   tree subblock_chain = current_binding_level->blocks;
   tree subblock_node;
 
@@ -503,24 +508,6 @@ gfc_init_decl_processing (void)
 }
 
 
-/* Return the typed-based alias set for T, which may be an expression
-   or a type.  Return -1 if we don't do anything special.  */
-
-static alias_set_type
-gfc_get_alias_set (tree t)
-{
-  tree u;
-
-  /* Permit type-punning when accessing an EQUIVALENCEd variable or
-     mixed type entry master's return value.  */
-  for (u = t; handled_component_p (u); u = TREE_OPERAND (u, 0))
-    if (TREE_CODE (u) == COMPONENT_REF
-	&& TREE_CODE (TREE_TYPE (TREE_OPERAND (u, 0))) == UNION_TYPE)
-      return 0;
-
-  return -1;
-}
-
 /* Builtin function initialization.  */
 
 static tree
diff --git a/gcc/fortran/frontend-passes.c b/gcc/fortran/frontend-passes.c
index f02a52ace8b..9ae3421da05 100644
--- a/gcc/fortran/frontend-passes.c
+++ b/gcc/fortran/frontend-passes.c
@@ -665,12 +665,10 @@ create_var (gfc_expr * e, const char *vname)
     {
       gfc_expr *length;
 
+      symbol->ts.u.cl = gfc_new_charlen (ns, NULL);
       length = constant_string_length (e);
       if (length)
-	{
-	  symbol->ts.u.cl = gfc_new_charlen (ns, NULL);
-	  symbol->ts.u.cl->length = length;
-	}
+	symbol->ts.u.cl->length = length;
       else
 	symbol->attr.allocatable = 1;
     }
diff --git a/gcc/fortran/gfortran.h b/gcc/fortran/gfortran.h
index 0bb71cb184d..77831ab31e9 100644
--- a/gcc/fortran/gfortran.h
+++ b/gcc/fortran/gfortran.h
@@ -1814,6 +1814,7 @@ typedef struct gfc_array_ref
   int dimen;			/* # of components in the reference */
   int codimen;
   bool in_allocate;		/* For coarray checks. */
+  gfc_expr *stat;
   locus where;
   gfc_array_spec *as;
 
@@ -3065,7 +3066,7 @@ bool gfc_is_coarray (gfc_expr *);
 int gfc_get_corank (gfc_expr *);
 bool gfc_has_ultimate_allocatable (gfc_expr *);
 bool gfc_has_ultimate_pointer (gfc_expr *);
-
+gfc_expr* gfc_find_stat_co (gfc_expr *);
 gfc_expr* gfc_build_intrinsic_call (gfc_namespace *, gfc_isym_id, const char*,
 				    locus, unsigned, ...);
 bool gfc_check_vardef_context (gfc_expr*, bool, bool, bool, const char*);
diff --git a/gcc/fortran/invoke.texi b/gcc/fortran/invoke.texi
index e8b8409319e..87baf15862b 100644
--- a/gcc/fortran/invoke.texi
+++ b/gcc/fortran/invoke.texi
@@ -764,7 +764,8 @@ This currently includes @option{-Waliasing}, @option{-Wampersand},
 @option{-Wconversion}, @option{-Wsurprising}, @option{-Wc-binding-type},
 @option{-Wintrinsics-std}, @option{-Wtabs}, @option{-Wintrinsic-shadow},
 @option{-Wline-truncation}, @option{-Wtarget-lifetime},
-@option{-Winteger-division}, @option{-Wreal-q-constant} and @option{-Wunused}.
+@option{-Winteger-division}, @option{-Wreal-q-constant}, @option{-Wunused}
+and @option{-Wundefined-do-loop}.
 
 @item -Waliasing
 @opindex @code{Waliasing}
@@ -924,6 +925,13 @@ a warning to be issued if a tab is encountered. Note, @option{-Wtabs}
 is active for @option{-pedantic}, @option{-std=f95}, @option{-std=f2003},
 @option{-std=f2008}, @option{-std=f2008ts} and @option{-Wall}.
 
+@item -Wundefined-do-loop
+@opindex @code{Wundefined-do-loop}
+@cindex warnings, undefined do loop
+Warn if a DO loop with step either 1 or -1 yields an underflow or an overflow
+during iteration of an induction variable of the loop.
+This option is implied by @option{-Wall}.
+
 @item -Wunderflow
 @opindex @code{Wunderflow}
 @cindex warnings, underflow
diff --git a/gcc/fortran/lang.opt b/gcc/fortran/lang.opt
index bdf5fa5fb4a..8f8b299bf1f 100644
--- a/gcc/fortran/lang.opt
+++ b/gcc/fortran/lang.opt
@@ -309,6 +309,10 @@ Wtabs
 Fortran Warning Var(warn_tabs) LangEnabledBy(Fortran,Wall || Wpedantic)
 Permit nonconforming uses of the tab character.
 
+Wundefined-do-loop
+Fortran Warning Var(warn_undefined_do_loop) LangEnabledBy(Fortran,Wall)
+Warn about an invalid DO loop.
+
 Wunderflow
 Fortran Warning Var(warn_underflow) Init(1)
 Warn about underflow of numerical constant expressions.
diff --git a/gcc/fortran/openmp.c b/gcc/fortran/openmp.c
index f5148667f5c..865e0d9d5f0 100644
--- a/gcc/fortran/openmp.c
+++ b/gcc/fortran/openmp.c
@@ -396,43 +396,67 @@ cleanup:
 }
 
 static match
-match_oacc_clause_gang (gfc_omp_clauses *cp)
+match_oacc_clause_gwv (gfc_omp_clauses *cp, unsigned gwv)
 {
   match ret = MATCH_YES;
 
   if (gfc_match (" ( ") != MATCH_YES)
     return MATCH_NO;
 
-  /* The gang clause accepts two optional arguments, num and static.
-     The num argument may either be explicit (num: <val>) or
-     implicit without (<val> without num:).  */
-
-  while (ret == MATCH_YES)
+  if (gwv == GOMP_DIM_GANG)
     {
-      if (gfc_match (" static :") == MATCH_YES)
+        /* The gang clause accepts two optional arguments, num and static.
+	 The num argument may either be explicit (num: <val>) or
+	 implicit without (<val> without num:).  */
+
+      while (ret == MATCH_YES)
 	{
-	  if (cp->gang_static)
-	    return MATCH_ERROR;
+	  if (gfc_match (" static :") == MATCH_YES)
+	    {
+	      if (cp->gang_static)
+		return MATCH_ERROR;
+	      else
+		cp->gang_static = true;
+	      if (gfc_match_char ('*') == MATCH_YES)
+		cp->gang_static_expr = NULL;
+	      else if (gfc_match (" %e ", &cp->gang_static_expr) != MATCH_YES)
+		return MATCH_ERROR;
+	    }
 	  else
-	    cp->gang_static = true;
-	  if (gfc_match_char ('*') == MATCH_YES)
-	    cp->gang_static_expr = NULL;
-	  else if (gfc_match (" %e ", &cp->gang_static_expr) != MATCH_YES)
-	    return MATCH_ERROR;
-	}
-      else
-	{
-	  /* This is optional.  */
-	  if (cp->gang_num_expr || gfc_match (" num :") == MATCH_ERROR)
-	    return MATCH_ERROR;
-	  else if (gfc_match (" %e ", &cp->gang_num_expr) != MATCH_YES)
-	    return MATCH_ERROR;
+	    {
+	      if (cp->gang_num_expr)
+		return MATCH_ERROR;
+
+	      /* The 'num' argument is optional.  */
+	      gfc_match (" num :");
+
+	      if (gfc_match (" %e ", &cp->gang_num_expr) != MATCH_YES)
+		return MATCH_ERROR;
+	    }
+
+	  ret = gfc_match (" , ");
 	}
+    }
+  else if (gwv == GOMP_DIM_WORKER)
+    {
+      /* The 'num' argument is optional.  */
+      gfc_match (" num :");
+
+      if (gfc_match (" %e ", &cp->worker_expr) != MATCH_YES)
+	return MATCH_ERROR;
+    }
+  else if (gwv == GOMP_DIM_VECTOR)
+    {
+      /* The 'length' argument is optional.  */
+      gfc_match (" length :");
 
-      ret = gfc_match (" , ");
+      if (gfc_match (" %e ", &cp->vector_expr) != MATCH_YES)
+	return MATCH_ERROR;
     }
+  else
+    gfc_fatal_error ("Unexpected OpenACC parallelism.");
 
-  return gfc_match (" ) ");
+  return gfc_match (" )");
 }
 
 static match
@@ -677,14 +701,20 @@ gfc_match_omp_clauses (gfc_omp_clauses **cp, uint64_t mask,
 	      && gfc_match ("async") == MATCH_YES)
 	    {
 	      c->async = true;
-	      needs_space = false;
-	      if (gfc_match (" ( %e )", &c->async_expr) != MATCH_YES)
+	      match m = gfc_match (" ( %e )", &c->async_expr);
+	      if (m == MATCH_ERROR)
+		{
+		  gfc_current_locus = old_loc;
+		  break;
+		}
+	      else if (m == MATCH_NO)
 		{
 		  c->async_expr
 		    = gfc_get_constant_expr (BT_INTEGER,
 					     gfc_default_integer_kind,
 					     &gfc_current_locus);
 		  mpz_set_si (c->async_expr->value.integer, GOMP_ASYNC_NOVAL);
+		  needs_space = true;
 		}
 	      continue;
 	    }
@@ -877,9 +907,13 @@ gfc_match_omp_clauses (gfc_omp_clauses **cp, uint64_t mask,
 	      && gfc_match ("gang") == MATCH_YES)
 	    {
 	      c->gang = true;
-	      if (match_oacc_clause_gang(c) == MATCH_YES)
-		needs_space = false;
-	      else
+	      match m = match_oacc_clause_gwv (c, GOMP_DIM_GANG);
+	      if (m == MATCH_ERROR)
+		{
+		  gfc_current_locus = old_loc;
+		  break;
+		}
+	      else if (m == MATCH_NO)
 		needs_space = true;
 	      continue;
 	    }
@@ -1309,10 +1343,13 @@ gfc_match_omp_clauses (gfc_omp_clauses **cp, uint64_t mask,
 	      && gfc_match ("vector") == MATCH_YES)
 	    {
 	      c->vector = true;
-	      if (gfc_match (" ( length : %e )", &c->vector_expr) == MATCH_YES
-		  || gfc_match (" ( %e )", &c->vector_expr) == MATCH_YES)
-		needs_space = false;
-	      else
+	      match m = match_oacc_clause_gwv (c, GOMP_DIM_VECTOR);
+	      if (m == MATCH_ERROR)
+		{
+		  gfc_current_locus = old_loc;
+		  break;
+		}
+	      if (m == MATCH_NO)
 		needs_space = true;
 	      continue;
 	    }
@@ -1328,7 +1365,14 @@ gfc_match_omp_clauses (gfc_omp_clauses **cp, uint64_t mask,
 	      && gfc_match ("wait") == MATCH_YES)
 	    {
 	      c->wait = true;
-	      match_oacc_expr_list (" (", &c->wait_list, false);
+	      match m = match_oacc_expr_list (" (", &c->wait_list, false);
+	      if (m == MATCH_ERROR)
+		{
+		  gfc_current_locus = old_loc;
+		  break;
+		}
+	      else if (m == MATCH_NO)
+		needs_space = true;
 	      continue;
 	    }
 	  if ((mask & OMP_CLAUSE_WORKER)
@@ -1336,10 +1380,13 @@ gfc_match_omp_clauses (gfc_omp_clauses **cp, uint64_t mask,
 	      && gfc_match ("worker") == MATCH_YES)
 	    {
 	      c->worker = true;
-	      if (gfc_match (" ( num : %e )", &c->worker_expr) == MATCH_YES
-		  || gfc_match (" ( %e )", &c->worker_expr) == MATCH_YES)
-		needs_space = false;
-	      else
+	      match m = match_oacc_clause_gwv (c, GOMP_DIM_WORKER);
+	      if (m == MATCH_ERROR)
+		{
+		  gfc_current_locus = old_loc;
+		  break;
+		}
+	      else if (m == MATCH_NO)
 		needs_space = true;
 	      continue;
 	    }
@@ -1595,15 +1642,18 @@ gfc_match_oacc_wait (void)
 {
   gfc_omp_clauses *c = gfc_get_omp_clauses ();
   gfc_expr_list *wait_list = NULL, *el;
+  bool space = true;
+  match m;
 
-  match_oacc_expr_list (" (", &wait_list, true);
-  gfc_match_omp_clauses (&c, OACC_WAIT_CLAUSES, false, false, true);
+  m = match_oacc_expr_list (" (", &wait_list, true);
+  if (m == MATCH_ERROR)
+    return m;
+  else if (m == MATCH_YES)
+    space = false;
 
-  if (gfc_match_omp_eos () != MATCH_YES)
-    {
-      gfc_error ("Unexpected junk in !$ACC WAIT at %C");
-      return MATCH_ERROR;
-    }
+  if (gfc_match_omp_clauses (&c, OACC_WAIT_CLAUSES, space, space, true)
+      == MATCH_ERROR)
+    return MATCH_ERROR;
 
   if (wait_list)
     for (el = wait_list; el; el = el->next)
diff --git a/gcc/fortran/parse.c b/gcc/fortran/parse.c
index 1081b2e605e..0aa736c7089 100644
--- a/gcc/fortran/parse.c
+++ b/gcc/fortran/parse.c
@@ -589,21 +589,12 @@ decode_statement (void)
   return ST_NONE;
 }
 
-/* Like match, but set a flag simd_matched if keyword matched.  */
-#define matchs(keyword, subr, st)				\
+/* Like match and if spec_only, goto do_spec_only without actually
+   matching.  */
+#define matcha(keyword, subr, st)				\
     do {							\
-      if (match_word_omp_simd (keyword, subr, &old_locus,	\
-			       &simd_matched) == MATCH_YES)	\
-	return st;						\
-      else							\
-	undo_new_statement ();				  	\
-    } while (0);
-
-/* Like match, but don't match anything if not -fopenmp.  */
-#define matcho(keyword, subr, st)				\
-    do {							\
-      if (!flag_openmp)						\
-	;							\
+      if (spec_only && gfc_match (keyword) == MATCH_YES)	\
+	goto do_spec_only;					\
       else if (match_word (keyword, subr, &old_locus)		\
 	       == MATCH_YES)					\
 	return st;						\
@@ -616,6 +607,7 @@ decode_oacc_directive (void)
 {
   locus old_locus;
   char c;
+  bool spec_only = false;
 
   gfc_enforce_clean_symbol_state ();
 
@@ -630,6 +622,10 @@ decode_oacc_directive (void)
       return ST_NONE;
     }
 
+  if (gfc_current_state () == COMP_FUNCTION
+      && gfc_current_block ()->result->ts.kind == -1)
+    spec_only = true;
+
   gfc_unset_implicit_pure (NULL);
 
   old_locus = gfc_current_locus;
@@ -643,49 +639,52 @@ decode_oacc_directive (void)
   switch (c)
     {
     case 'a':
-      match ("atomic", gfc_match_oacc_atomic, ST_OACC_ATOMIC);
+      matcha ("atomic", gfc_match_oacc_atomic, ST_OACC_ATOMIC);
       break;
     case 'c':
-      match ("cache", gfc_match_oacc_cache, ST_OACC_CACHE);
+      matcha ("cache", gfc_match_oacc_cache, ST_OACC_CACHE);
       break;
     case 'd':
-      match ("data", gfc_match_oacc_data, ST_OACC_DATA);
+      matcha ("data", gfc_match_oacc_data, ST_OACC_DATA);
       match ("declare", gfc_match_oacc_declare, ST_OACC_DECLARE);
       break;
     case 'e':
-      match ("end atomic", gfc_match_omp_eos, ST_OACC_END_ATOMIC);
-      match ("end data", gfc_match_omp_eos, ST_OACC_END_DATA);
-      match ("end host_data", gfc_match_omp_eos, ST_OACC_END_HOST_DATA);
-      match ("end kernels loop", gfc_match_omp_eos, ST_OACC_END_KERNELS_LOOP);
-      match ("end kernels", gfc_match_omp_eos, ST_OACC_END_KERNELS);
-      match ("end loop", gfc_match_omp_eos, ST_OACC_END_LOOP);
-      match ("end parallel loop", gfc_match_omp_eos, ST_OACC_END_PARALLEL_LOOP);
-      match ("end parallel", gfc_match_omp_eos, ST_OACC_END_PARALLEL);
-      match ("enter data", gfc_match_oacc_enter_data, ST_OACC_ENTER_DATA);
-      match ("exit data", gfc_match_oacc_exit_data, ST_OACC_EXIT_DATA);
+      matcha ("end atomic", gfc_match_omp_eos, ST_OACC_END_ATOMIC);
+      matcha ("end data", gfc_match_omp_eos, ST_OACC_END_DATA);
+      matcha ("end host_data", gfc_match_omp_eos, ST_OACC_END_HOST_DATA);
+      matcha ("end kernels loop", gfc_match_omp_eos, ST_OACC_END_KERNELS_LOOP);
+      matcha ("end kernels", gfc_match_omp_eos, ST_OACC_END_KERNELS);
+      matcha ("end loop", gfc_match_omp_eos, ST_OACC_END_LOOP);
+      matcha ("end parallel loop", gfc_match_omp_eos,
+	      ST_OACC_END_PARALLEL_LOOP);
+      matcha ("end parallel", gfc_match_omp_eos, ST_OACC_END_PARALLEL);
+      matcha ("enter data", gfc_match_oacc_enter_data, ST_OACC_ENTER_DATA);
+      matcha ("exit data", gfc_match_oacc_exit_data, ST_OACC_EXIT_DATA);
       break;
     case 'h':
-      match ("host_data", gfc_match_oacc_host_data, ST_OACC_HOST_DATA);
+      matcha ("host_data", gfc_match_oacc_host_data, ST_OACC_HOST_DATA);
       break;
     case 'p':
-      match ("parallel loop", gfc_match_oacc_parallel_loop, ST_OACC_PARALLEL_LOOP);
-      match ("parallel", gfc_match_oacc_parallel, ST_OACC_PARALLEL);
+      matcha ("parallel loop", gfc_match_oacc_parallel_loop,
+	      ST_OACC_PARALLEL_LOOP);
+      matcha ("parallel", gfc_match_oacc_parallel, ST_OACC_PARALLEL);
       break;
     case 'k':
-      match ("kernels loop", gfc_match_oacc_kernels_loop, ST_OACC_KERNELS_LOOP);
-      match ("kernels", gfc_match_oacc_kernels, ST_OACC_KERNELS);
+      matcha ("kernels loop", gfc_match_oacc_kernels_loop,
+	      ST_OACC_KERNELS_LOOP);
+      matcha ("kernels", gfc_match_oacc_kernels, ST_OACC_KERNELS);
       break;
     case 'l':
-      match ("loop", gfc_match_oacc_loop, ST_OACC_LOOP);
+      matcha ("loop", gfc_match_oacc_loop, ST_OACC_LOOP);
       break;
     case 'r':
       match ("routine", gfc_match_oacc_routine, ST_OACC_ROUTINE);
       break;
     case 'u':
-      match ("update", gfc_match_oacc_update, ST_OACC_UPDATE);
+      matcha ("update", gfc_match_oacc_update, ST_OACC_UPDATE);
       break;
     case 'w':
-      match ("wait", gfc_match_oacc_wait, ST_OACC_WAIT);
+      matcha ("wait", gfc_match_oacc_wait, ST_OACC_WAIT);
       break;
     }
 
@@ -700,14 +699,72 @@ decode_oacc_directive (void)
   gfc_error_recovery ();
 
   return ST_NONE;
+
+ do_spec_only:
+  reject_statement ();
+  gfc_clear_error ();
+  gfc_buffer_error (false);
+  gfc_current_locus = old_locus;
+  return ST_GET_FCN_CHARACTERISTICS;
 }
 
+/* Like match, but set a flag simd_matched if keyword matched
+   and if spec_only, goto do_spec_only without actually matching.  */
+#define matchs(keyword, subr, st)				\
+    do {							\
+      if (spec_only && gfc_match (keyword) == MATCH_YES)	\
+	goto do_spec_only;					\
+      if (match_word_omp_simd (keyword, subr, &old_locus,	\
+			       &simd_matched) == MATCH_YES)	\
+	return st;						\
+      else							\
+	undo_new_statement ();				  	\
+    } while (0);
+
+/* Like match, but don't match anything if not -fopenmp
+   and if spec_only, goto do_spec_only without actually matching.  */
+#define matcho(keyword, subr, st)				\
+    do {							\
+      if (!flag_openmp)						\
+	;							\
+      else if (spec_only && gfc_match (keyword) == MATCH_YES)	\
+	goto do_spec_only;					\
+      else if (match_word (keyword, subr, &old_locus)		\
+	       == MATCH_YES)					\
+	return st;						\
+      else							\
+	undo_new_statement ();				  	\
+    } while (0);
+
+/* Like match, but set a flag simd_matched if keyword matched.  */
+#define matchds(keyword, subr, st)				\
+    do {							\
+      if (match_word_omp_simd (keyword, subr, &old_locus,	\
+			       &simd_matched) == MATCH_YES)	\
+	return st;						\
+      else							\
+	undo_new_statement ();				  	\
+    } while (0);
+
+/* Like match, but don't match anything if not -fopenmp.  */
+#define matchdo(keyword, subr, st)				\
+    do {							\
+      if (!flag_openmp)						\
+	;							\
+      else if (match_word (keyword, subr, &old_locus)		\
+	       == MATCH_YES)					\
+	return st;						\
+      else							\
+	undo_new_statement ();				  	\
+    } while (0);
+
 static gfc_statement
 decode_omp_directive (void)
 {
   locus old_locus;
   char c;
   bool simd_matched = false;
+  bool spec_only = false;
 
   gfc_enforce_clean_symbol_state ();
 
@@ -722,6 +779,10 @@ decode_omp_directive (void)
       return ST_NONE;
     }
 
+  if (gfc_current_state () == COMP_FUNCTION
+      && gfc_current_block ()->result->ts.kind == -1)
+    spec_only = true;
+
   gfc_unset_implicit_pure (NULL);
 
   old_locus = gfc_current_locus;
@@ -750,12 +811,12 @@ decode_omp_directive (void)
       matcho ("critical", gfc_match_omp_critical, ST_OMP_CRITICAL);
       break;
     case 'd':
-      matchs ("declare reduction", gfc_match_omp_declare_reduction,
-	      ST_OMP_DECLARE_REDUCTION);
-      matchs ("declare simd", gfc_match_omp_declare_simd,
-	      ST_OMP_DECLARE_SIMD);
-      matcho ("declare target", gfc_match_omp_declare_target,
-	      ST_OMP_DECLARE_TARGET);
+      matchds ("declare reduction", gfc_match_omp_declare_reduction,
+	       ST_OMP_DECLARE_REDUCTION);
+      matchds ("declare simd", gfc_match_omp_declare_simd,
+	       ST_OMP_DECLARE_SIMD);
+      matchdo ("declare target", gfc_match_omp_declare_target,
+	       ST_OMP_DECLARE_TARGET);
       matchs ("distribute parallel do simd",
 	      gfc_match_omp_distribute_parallel_do_simd,
 	      ST_OMP_DISTRIBUTE_PARALLEL_DO_SIMD);
@@ -875,8 +936,8 @@ decode_omp_directive (void)
       matcho ("teams distribute", gfc_match_omp_teams_distribute,
 	      ST_OMP_TEAMS_DISTRIBUTE);
       matcho ("teams", gfc_match_omp_teams, ST_OMP_TEAMS);
-      matcho ("threadprivate", gfc_match_omp_threadprivate,
-	      ST_OMP_THREADPRIVATE);
+      matchdo ("threadprivate", gfc_match_omp_threadprivate,
+	       ST_OMP_THREADPRIVATE);
       break;
     case 'w':
       matcho ("workshare", gfc_match_omp_workshare, ST_OMP_WORKSHARE);
@@ -899,6 +960,13 @@ decode_omp_directive (void)
   gfc_error_recovery ();
 
   return ST_NONE;
+
+ do_spec_only:
+  reject_statement ();
+  gfc_clear_error ();
+  gfc_buffer_error (false);
+  gfc_current_locus = old_locus;
+  return ST_GET_FCN_CHARACTERISTICS;
 }
 
 static gfc_statement
@@ -1319,10 +1387,13 @@ next_statement (void)
 
   gfc_buffer_error (false);
 
-  if (st == ST_GET_FCN_CHARACTERISTICS && gfc_statement_label != NULL)
+  if (st == ST_GET_FCN_CHARACTERISTICS)
     {
-      gfc_free_st_label (gfc_statement_label);
-      gfc_statement_label = NULL;
+      if (gfc_statement_label != NULL)
+	{
+	  gfc_free_st_label (gfc_statement_label);
+	  gfc_statement_label = NULL;
+	}
       gfc_current_locus = old_locus;
     }
 
diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 43783139752..1fc540a1f0e 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -6546,6 +6546,29 @@ gfc_resolve_iterator (gfc_iterator *iter, bool real_ok, bool own_scope)
 		     &iter->step->where);
     }
 
+  if (iter->end->expr_type == EXPR_CONSTANT
+      && iter->end->ts.type == BT_INTEGER
+      && iter->step->expr_type == EXPR_CONSTANT
+      && iter->step->ts.type == BT_INTEGER
+      && (mpz_cmp_si (iter->step->value.integer, -1L) == 0
+	  || mpz_cmp_si (iter->step->value.integer, 1L) == 0))
+    {
+      bool is_step_positive = mpz_cmp_ui (iter->step->value.integer, 1) == 0;
+      int k = gfc_validate_kind (BT_INTEGER, iter->end->ts.kind, false);
+
+      if (is_step_positive
+	  && mpz_cmp (iter->end->value.integer, gfc_integer_kinds[k].huge) == 0)
+	gfc_warning (OPT_Wundefined_do_loop,
+		     "DO loop at %L is undefined as it overflows",
+		     &iter->step->where);
+      else if (!is_step_positive
+	       && mpz_cmp (iter->end->value.integer,
+			   gfc_integer_kinds[k].min_int) == 0)
+	gfc_warning (OPT_Wundefined_do_loop,
+		     "DO loop at %L is undefined as it underflows",
+		     &iter->step->where);
+    }
+
   return true;
 }
 
diff --git a/gcc/fortran/scanner.c b/gcc/fortran/scanner.c
index 6a7a5b68bb3..be9c5091ea8 100644
--- a/gcc/fortran/scanner.c
+++ b/gcc/fortran/scanner.c
@@ -1416,7 +1416,8 @@ restart:
 	{
 	  if (in_string)
 	    {
-	      gfc_current_locus.nextc--;
+	      if (gfc_current_locus.nextc)
+	        gfc_current_locus.nextc--;
 	      if (warn_ampersand && in_string == INSTRING_WARN)
 		gfc_warning (OPT_Wampersand, 
 			     "Missing %<&%> in continued character "
@@ -1427,7 +1428,10 @@ restart:
 	  /* Both !$omp and !$ -fopenmp continuation lines have & on the
 	     continuation line only optionally.  */
 	  else if (openmp_flag || openacc_flag || openmp_cond_flag)
-	    gfc_current_locus.nextc--;
+	    {
+	      if (gfc_current_locus.nextc)
+		  gfc_current_locus.nextc--;
+	    }
 	  else
 	    {
 	      c = ' ';
diff --git a/gcc/fortran/simplify.c b/gcc/fortran/simplify.c
index a63101072f1..95a8d1080a4 100644
--- a/gcc/fortran/simplify.c
+++ b/gcc/fortran/simplify.c
@@ -3280,7 +3280,6 @@ gfc_simplify_ishftc (gfc_expr *e, gfc_expr *s, gfc_expr *sz)
 	return NULL;
 
       gfc_extract_int (sz, &ssize);
-
     }
   else
     ssize = isize;
@@ -3294,7 +3293,10 @@ gfc_simplify_ishftc (gfc_expr *e, gfc_expr *s, gfc_expr *sz)
     {
       if (sz == NULL)
 	gfc_error ("Magnitude of second argument of ISHFTC exceeds "
-		   "BIT_SIZE of first argument at %L", &s->where);
+		   "BIT_SIZE of first argument at %C");
+      else
+	gfc_error ("Absolute value of SHIFT shall be less than or equal "
+		   "to SIZE at %C");
       return &gfc_bad_expr;
     }
 
@@ -6181,8 +6183,7 @@ gfc_simplify_spread (gfc_expr *source, gfc_expr *dim_expr, gfc_expr *ncopies_exp
     }
   else
     {
-      gfc_error ("Simplification of SPREAD at %L not yet implemented",
-		 &source->where);
+      gfc_error ("Simplification of SPREAD at %C not yet implemented");
       return &gfc_bad_expr;
     }
 
diff --git a/gcc/fortran/trans-decl.c b/gcc/fortran/trans-decl.c
index 2f5e4342afa..f026bea5d86 100644
--- a/gcc/fortran/trans-decl.c
+++ b/gcc/fortran/trans-decl.c
@@ -3526,16 +3526,16 @@ gfc_build_builtin_function_decls (void)
         ppvoid_type_node, pint_type, pchar_type_node, integer_type_node);
 
       gfor_fndecl_caf_get = gfc_build_library_function_decl_with_spec (
-	get_identifier (PREFIX("caf_get")), ".R.RRRW", void_type_node, 9,
+	get_identifier (PREFIX("caf_get")), ".R.RRRWW", void_type_node, 10,
         pvoid_type_node, size_type_node, integer_type_node, pvoid_type_node,
 	pvoid_type_node, pvoid_type_node, integer_type_node, integer_type_node,
-	boolean_type_node);
+	boolean_type_node, pint_type);
 
       gfor_fndecl_caf_send = gfc_build_library_function_decl_with_spec (
-	get_identifier (PREFIX("caf_send")), ".R.RRRR", void_type_node, 9,
+	get_identifier (PREFIX("caf_send")), ".R.RRRRW", void_type_node, 10,
         pvoid_type_node, size_type_node, integer_type_node, pvoid_type_node,
 	pvoid_type_node, pvoid_type_node, integer_type_node, integer_type_node,
-	boolean_type_node);
+	boolean_type_node, pint_type);
 
       gfor_fndecl_caf_sendget = gfc_build_library_function_decl_with_spec (
 	get_identifier (PREFIX("caf_sendget")), ".R.RRRR.RRR", void_type_node,
@@ -6277,7 +6277,7 @@ gfc_generate_function_code (gfc_namespace * ns)
 			gfc_finish_block (&cleanup));
 
   /* Add all the decls we created during processing.  */
-  decl = saved_function_decls;
+  decl = nreverse (saved_function_decls);
   while (decl)
     {
       tree next;
@@ -6469,7 +6469,7 @@ gfc_process_block_locals (gfc_namespace* ns)
   if (flag_coarray == GFC_FCOARRAY_LIB && has_coarray_vars)
     generate_coarray_init (ns);
 
-  decl = saved_local_decls;
+  decl = nreverse (saved_local_decls);
   while (decl)
     {
       tree next;
diff --git a/gcc/fortran/trans-expr.c b/gcc/fortran/trans-expr.c
index b5731aa8bbe..4321850b59d 100644
--- a/gcc/fortran/trans-expr.c
+++ b/gcc/fortran/trans-expr.c
@@ -7358,7 +7358,6 @@ gfc_trans_structure_assign (tree dest, gfc_expr * expr, bool init)
     {
       gfc_se se, lse;
 
-      gcc_assert (cm->backend_decl == NULL);
       gfc_init_se (&se, NULL);
       gfc_init_se (&lse, NULL);
       gfc_conv_expr (&se, gfc_constructor_first (expr->value.constructor)->expr);
diff --git a/gcc/fortran/trans-intrinsic.c b/gcc/fortran/trans-intrinsic.c
index 574300eabb5..c6555400a49 100644
--- a/gcc/fortran/trans-intrinsic.c
+++ b/gcc/fortran/trans-intrinsic.c
@@ -1100,10 +1100,10 @@ static void
 gfc_conv_intrinsic_caf_get (gfc_se *se, gfc_expr *expr, tree lhs, tree lhs_kind,
 			    tree may_require_tmp)
 {
-  gfc_expr *array_expr;
+  gfc_expr *array_expr, *tmp_stat;
   gfc_se argse;
   tree caf_decl, token, offset, image_index, tmp;
-  tree res_var, dst_var, type, kind, vec;
+  tree res_var, dst_var, type, kind, vec, stat;
 
   gcc_assert (flag_coarray == GFC_FCOARRAY_LIB);
 
@@ -1122,6 +1122,19 @@ gfc_conv_intrinsic_caf_get (gfc_se *se, gfc_expr *expr, tree lhs, tree lhs_kind,
   dst_var = lhs;
 
   vec = null_pointer_node;
+  tmp_stat = gfc_find_stat_co(expr);
+
+  if (tmp_stat)
+    {
+      gfc_se stat_se;
+      gfc_init_se(&stat_se, NULL);
+      gfc_conv_expr_reference (&stat_se, tmp_stat);
+      stat = stat_se.expr;
+      gfc_add_block_to_block (&se->pre, &stat_se.pre);
+      gfc_add_block_to_block (&se->post, &stat_se.post);
+    }
+  else
+    stat = null_pointer_node;
 
   gfc_init_se (&argse, NULL);
   if (array_expr->rank == 0)
@@ -1219,9 +1232,9 @@ gfc_conv_intrinsic_caf_get (gfc_se *se, gfc_expr *expr, tree lhs, tree lhs_kind,
   ASM_VOLATILE_P (tmp) = 1;
   gfc_add_expr_to_block (&se->pre, tmp);
 
-  tmp = build_call_expr_loc (input_location, gfor_fndecl_caf_get, 9,
+  tmp = build_call_expr_loc (input_location, gfor_fndecl_caf_get, 10,
 			     token, offset, image_index, argse.expr, vec,
-			     dst_var, kind, lhs_kind, may_require_tmp);
+			     dst_var, kind, lhs_kind, may_require_tmp, stat);
   gfc_add_expr_to_block (&se->pre, tmp);
 
   if (se->ss)
@@ -1237,11 +1250,11 @@ gfc_conv_intrinsic_caf_get (gfc_se *se, gfc_expr *expr, tree lhs, tree lhs_kind,
 
 static tree
 conv_caf_send (gfc_code *code) {
-  gfc_expr *lhs_expr, *rhs_expr;
+  gfc_expr *lhs_expr, *rhs_expr, *tmp_stat;
   gfc_se lhs_se, rhs_se;
   stmtblock_t block;
   tree caf_decl, token, offset, image_index, tmp, lhs_kind, rhs_kind;
-  tree may_require_tmp;
+  tree may_require_tmp, stat;
   tree lhs_type = NULL_TREE;
   tree vec = null_pointer_node, rhs_vec = null_pointer_node;
 
@@ -1253,6 +1266,8 @@ conv_caf_send (gfc_code *code) {
 		    ? boolean_false_node : boolean_true_node;
   gfc_init_block (&block);
 
+  stat = null_pointer_node;
+
   /* LHS.  */
   gfc_init_se (&lhs_se, NULL);
   if (lhs_expr->rank == 0)
@@ -1375,10 +1390,25 @@ conv_caf_send (gfc_code *code) {
 
   rhs_kind = build_int_cst (integer_type_node, rhs_expr->ts.kind);
 
+  tmp_stat = gfc_find_stat_co(lhs_expr);
+
+  if (tmp_stat)
+    {
+      gfc_se stat_se;
+      gfc_init_se (&stat_se, NULL);
+      gfc_conv_expr_reference (&stat_se, tmp_stat);
+      stat = stat_se.expr;
+      gfc_add_block_to_block (&block, &stat_se.pre);
+      gfc_add_block_to_block (&block, &stat_se.post);
+    }
+  else
+    stat = null_pointer_node;
+
   if (!gfc_is_coindexed (rhs_expr))
-    tmp = build_call_expr_loc (input_location, gfor_fndecl_caf_send, 9, token,
-			     offset, image_index, lhs_se.expr, vec,
-			     rhs_se.expr, lhs_kind, rhs_kind, may_require_tmp);
+    tmp = build_call_expr_loc (input_location, gfor_fndecl_caf_send, 10, token,
+			       offset, image_index, lhs_se.expr, vec,
+			       rhs_se.expr, lhs_kind, rhs_kind, may_require_tmp,
+			       stat);
   else
     {
       tree rhs_token, rhs_offset, rhs_image_index;
diff --git a/gcc/fortran/trans-openmp.c b/gcc/fortran/trans-openmp.c
index ab07fe45be9..0d646edca11 100644
--- a/gcc/fortran/trans-openmp.c
+++ b/gcc/fortran/trans-openmp.c
@@ -61,6 +61,7 @@ gfc_omp_privatize_by_reference (const_tree decl)
       if (GFC_DECL_GET_SCALAR_POINTER (decl)
 	  || GFC_DECL_GET_SCALAR_ALLOCATABLE (decl)
 	  || GFC_DECL_CRAY_POINTEE (decl)
+	  || GFC_DECL_ASSOCIATE_VAR_P (decl)
 	  || VOID_TYPE_P (TREE_TYPE (TREE_TYPE (decl))))
 	return false;
 
@@ -2182,6 +2183,8 @@ gfc_trans_omp_clauses (stmtblock_t *block, gfc_omp_clauses *clauses,
 		  tree decl = gfc_get_symbol_decl (n->sym);
 		  if (gfc_omp_privatize_by_reference (decl))
 		    decl = build_fold_indirect_ref (decl);
+		  else if (DECL_P (decl))
+		    TREE_ADDRESSABLE (decl) = 1;
 		  if (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE (decl)))
 		    {
 		      tree type = TREE_TYPE (decl);
diff --git a/gcc/fortran/trans-stmt.c b/gcc/fortran/trans-stmt.c
index 84bf749780d..6e4e2a79029 100644
--- a/gcc/fortran/trans-stmt.c
+++ b/gcc/fortran/trans-stmt.c
@@ -1808,11 +1808,11 @@ gfc_trans_block_construct (gfc_code* code)
   return gfc_finish_wrapped_block (&block);
 }
 
+/* Translate the simple DO construct in a C-style manner.
+   This is where the loop variable has integer type and step +-1.
+   Following code will generate infinite loop in case where TO is INT_MAX
+   (for +1 step) or INT_MIN (for -1 step)
 
-/* Translate the simple DO construct.  This is where the loop variable has
-   integer type and step +-1.  We can't use this in the general case
-   because integer overflow and floating point errors could give incorrect
-   results.
    We translate a do loop from:
 
    DO dovar = from, to, step
@@ -1822,22 +1822,20 @@ gfc_trans_block_construct (gfc_code* code)
    to:
 
    [Evaluate loop bounds and step]
-   dovar = from;
-   if ((step > 0) ? (dovar <= to) : (dovar => to))
-    {
-      for (;;)
-        {
-	  body;
-   cycle_label:
-	  cond = (dovar == to);
-	  dovar += step;
-	  if (cond) goto end_label;
-	}
+    dovar = from;
+    for (;;)
+      {
+	if (dovar > to)
+	  goto end_label;
+	body;
+	cycle_label:
+	dovar += step;
       }
-   end_label:
+    end_label:
 
-   This helps the optimizers by avoiding the extra induction variable
-   used in the general case.  */
+   This helps the optimizers by avoiding the extra pre-header condition and
+   we save a register as we just compare the updated IV (not a value in
+   previous step).  */
 
 static tree
 gfc_trans_simple_do (gfc_code * code, stmtblock_t *pblock, tree dovar,
@@ -1851,14 +1849,14 @@ gfc_trans_simple_do (gfc_code * code, stmtblock_t *pblock, tree dovar,
   tree cycle_label;
   tree exit_label;
   location_t loc;
-
   type = TREE_TYPE (dovar);
+  bool is_step_positive = tree_int_cst_sgn (step) > 0;
 
   loc = code->ext.iterator->start->where.lb->location;
 
   /* Initialize the DO variable: dovar = from.  */
   gfc_add_modify_loc (loc, pblock, dovar,
-		      fold_convert (TREE_TYPE(dovar), from));
+		      fold_convert (TREE_TYPE (dovar), from));
 
   /* Save value for do-tinkering checking.  */
   if (gfc_option.rtcheck & GFC_RTCHECK_DO)
@@ -1871,13 +1869,53 @@ gfc_trans_simple_do (gfc_code * code, stmtblock_t *pblock, tree dovar,
   cycle_label = gfc_build_label_decl (NULL_TREE);
   exit_label = gfc_build_label_decl (NULL_TREE);
 
-  /* Put the labels where they can be found later. See gfc_trans_do().  */
+  /* Put the labels where they can be found later.  See gfc_trans_do().  */
   code->cycle_label = cycle_label;
   code->exit_label = exit_label;
 
   /* Loop body.  */
   gfc_start_block (&body);
 
+  /* Exit the loop if there is an I/O result condition or error.  */
+  if (exit_cond)
+    {
+      tmp = build1_v (GOTO_EXPR, exit_label);
+      tmp = fold_build3_loc (loc, COND_EXPR, void_type_node,
+			     exit_cond, tmp,
+			     build_empty_stmt (loc));
+      gfc_add_expr_to_block (&body, tmp);
+    }
+
+  /* Evaluate the loop condition.  */
+  if (is_step_positive)
+    cond = fold_build2_loc (loc, GT_EXPR, boolean_type_node, dovar,
+			    fold_convert (type, to));
+  else
+    cond = fold_build2_loc (loc, LT_EXPR, boolean_type_node, dovar,
+			    fold_convert (type, to));
+
+  cond = gfc_evaluate_now_loc (loc, cond, &body);
+
+  /* The loop exit.  */
+  tmp = fold_build1_loc (loc, GOTO_EXPR, void_type_node, exit_label);
+  TREE_USED (exit_label) = 1;
+  tmp = fold_build3_loc (loc, COND_EXPR, void_type_node,
+			 cond, tmp, build_empty_stmt (loc));
+  gfc_add_expr_to_block (&body, tmp);
+
+  /* Check whether the induction variable is equal to INT_MAX
+     (respectively to INT_MIN).  */
+  if (gfc_option.rtcheck & GFC_RTCHECK_DO)
+    {
+      tree boundary = is_step_positive ? TYPE_MAX_VALUE (type)
+	: TYPE_MIN_VALUE (type);
+
+      tmp = fold_build2_loc (loc, EQ_EXPR, boolean_type_node,
+			     dovar, boundary);
+      gfc_trans_runtime_check (true, false, tmp, &body, &code->loc,
+			       "Loop iterates infinitely");
+    }
+
   /* Main loop body.  */
   tmp = gfc_trans_code_cond (code->block->next, exit_cond);
   gfc_add_expr_to_block (&body, tmp);
@@ -1898,21 +1936,6 @@ gfc_trans_simple_do (gfc_code * code, stmtblock_t *pblock, tree dovar,
 			       "Loop variable has been modified");
     }
 
-  /* Exit the loop if there is an I/O result condition or error.  */
-  if (exit_cond)
-    {
-      tmp = build1_v (GOTO_EXPR, exit_label);
-      tmp = fold_build3_loc (loc, COND_EXPR, void_type_node,
-			     exit_cond, tmp,
-			     build_empty_stmt (loc));
-      gfc_add_expr_to_block (&body, tmp);
-    }
-
-  /* Evaluate the loop condition.  */
-  cond = fold_build2_loc (loc, EQ_EXPR, boolean_type_node, dovar,
-			  to);
-  cond = gfc_evaluate_now_loc (loc, cond, &body);
-
   /* Increment the loop variable.  */
   tmp = fold_build2_loc (loc, PLUS_EXPR, type, dovar, step);
   gfc_add_modify_loc (loc, &body, dovar, tmp);
@@ -1920,28 +1943,10 @@ gfc_trans_simple_do (gfc_code * code, stmtblock_t *pblock, tree dovar,
   if (gfc_option.rtcheck & GFC_RTCHECK_DO)
     gfc_add_modify_loc (loc, &body, saved_dovar, dovar);
 
-  /* The loop exit.  */
-  tmp = fold_build1_loc (loc, GOTO_EXPR, void_type_node, exit_label);
-  TREE_USED (exit_label) = 1;
-  tmp = fold_build3_loc (loc, COND_EXPR, void_type_node,
-			 cond, tmp, build_empty_stmt (loc));
-  gfc_add_expr_to_block (&body, tmp);
-
   /* Finish the loop body.  */
   tmp = gfc_finish_block (&body);
   tmp = fold_build1_loc (loc, LOOP_EXPR, void_type_node, tmp);
 
-  /* Only execute the loop if the number of iterations is positive.  */
-  if (tree_int_cst_sgn (step) > 0)
-    cond = fold_build2_loc (loc, LE_EXPR, boolean_type_node, dovar,
-			    to);
-  else
-    cond = fold_build2_loc (loc, GE_EXPR, boolean_type_node, dovar,
-			    to);
-
-  tmp = fold_build3_loc (loc, COND_EXPR, void_type_node,
-			 gfc_likely (cond, PRED_FORTRAN_LOOP_PREHEADER), tmp,
-			 build_empty_stmt (loc));
   gfc_add_expr_to_block (pblock, tmp);
 
   /* Add the exit label.  */
@@ -2044,8 +2049,8 @@ gfc_trans_do (gfc_code * code, tree exit_cond)
   if (TREE_CODE (type) == INTEGER_TYPE
       && (integer_onep (step)
 	|| tree_int_cst_equal (step, integer_minus_one_node)))
-    return gfc_trans_simple_do (code, &block, dovar, from, to, step, exit_cond);
-
+    return gfc_trans_simple_do (code, &block, dovar, from, to, step,
+				exit_cond);
 
   if (TREE_CODE (type) == INTEGER_TYPE)
     utype = unsigned_type_for (type);
@@ -2109,7 +2114,8 @@ gfc_trans_do (gfc_code * code, tree exit_cond)
       pos = build2 (COMPOUND_EXPR, void_type_node,
 		    fold_build2 (MODIFY_EXPR, void_type_node,
 				 countm1, tmp2),
-		    build3_loc (loc, COND_EXPR, void_type_node, tmp,
+		    build3_loc (loc, COND_EXPR, void_type_node,
+				gfc_unlikely (tmp, PRED_FORTRAN_LOOP_PREHEADER),
 				build1_loc (loc, GOTO_EXPR, void_type_node,
 					    exit_label), NULL_TREE));
 
@@ -2123,7 +2129,8 @@ gfc_trans_do (gfc_code * code, tree exit_cond)
       neg = build2 (COMPOUND_EXPR, void_type_node,
 		    fold_build2 (MODIFY_EXPR, void_type_node,
 				 countm1, tmp2),
-		    build3_loc (loc, COND_EXPR, void_type_node, tmp,
+		    build3_loc (loc, COND_EXPR, void_type_node,
+				gfc_unlikely (tmp, PRED_FORTRAN_LOOP_PREHEADER),
 				build1_loc (loc, GOTO_EXPR, void_type_node,
 					    exit_label), NULL_TREE));
 
@@ -5696,9 +5703,11 @@ gfc_trans_allocate (gfc_code * code)
 	  tmp = gfc_get_char_type (code->ext.alloc.ts.kind);
 	  tmp = TYPE_SIZE_UNIT (tmp);
 	  tmp = fold_convert (TREE_TYPE (se_sz.expr), tmp);
+	  gfc_add_block_to_block (&block, &se_sz.pre);
 	  expr3_esize = fold_build2_loc (input_location, MULT_EXPR,
 					 TREE_TYPE (se_sz.expr),
 					 tmp, se_sz.expr);
+	  expr3_esize = gfc_evaluate_now (expr3_esize, &block);
 	}
     }
 
@@ -5897,6 +5906,7 @@ gfc_trans_allocate (gfc_code * code)
 		 source= or mold= expression.  */
 	      gfc_init_se (&se_sz, NULL);
 	      gfc_conv_expr (&se_sz, code->ext.alloc.ts.u.cl->length);
+	      gfc_add_block_to_block (&block, &se_sz.pre);
 	      gfc_add_modify (&block, al_len,
 			      fold_convert (TREE_TYPE (al_len),
 					    se_sz.expr));
@@ -5981,11 +5991,19 @@ gfc_trans_allocate (gfc_code * code)
 		 specified by a type spec for deferred length character
 		 arrays or unlimited polymorphic objects without a
 		 source= or mold= expression.  */
-	      gfc_init_se (&se_sz, NULL);
-	      gfc_conv_expr (&se_sz, code->ext.alloc.ts.u.cl->length);
-	      gfc_add_modify (&block, al_len,
-			      fold_convert (TREE_TYPE (al_len),
-					    se_sz.expr));
+	      if (expr3_esize == NULL_TREE || code->ext.alloc.ts.kind != 1)
+		{
+		  gfc_init_se (&se_sz, NULL);
+		  gfc_conv_expr (&se_sz, code->ext.alloc.ts.u.cl->length);
+		  gfc_add_block_to_block (&block, &se_sz.pre);
+		  gfc_add_modify (&block, al_len,
+				  fold_convert (TREE_TYPE (al_len),
+						se_sz.expr));
+		}
+	      else
+		gfc_add_modify (&block, al_len,
+				fold_convert (TREE_TYPE (al_len),
+					      expr3_esize));
 	    }
 	  else
 	    /* No length information needed, because type to allocate
diff --git a/gcc/gcc-ar.c b/gcc/gcc-ar.c
index 45ba3617ff3..a02dccb8000 100644
--- a/gcc/gcc-ar.c
+++ b/gcc/gcc-ar.c
@@ -194,6 +194,14 @@ main (int ac, char **av)
 #ifdef CROSS_DIRECTORY_STRUCTURE
       real_exe_name = concat (target_machine, "-", PERSONALITY, NULL);
 #endif
+      /* Do not search original location in the same folder.  */
+      char *exe_folder = lrealpath (av[0]);
+      exe_folder[strlen (exe_folder) - strlen (lbasename (exe_folder))] = '\0';
+      char *location = concat (exe_folder, PERSONALITY, NULL);
+
+      if (access (location, X_OK) == 0)
+	remove_prefix (exe_folder, &path);
+
       exe_name = find_a_file (&path, real_exe_name, X_OK);
       if (!exe_name)
 	{
diff --git a/gcc/gcc.c b/gcc/gcc.c
index ab113102bc6..7460f6af148 100644
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
@@ -1330,7 +1330,7 @@ static const struct compiler default_compilers[] =
 					       %W{o*:--output-pch=%*}}%V}}\
 	  %{!save-temps*:%{!traditional-cpp:%{!no-integrated-cpp:\
 		cc1 %(cpp_unique_options) %(cc1_options)\
-		    %{!fsyntax-only:-o %g.s \
+		    %{!fsyntax-only:%{!S:-o %g.s} \
 		        %{!fdump-ada-spec*:%{!o*:--output-pch=%i.gch}\
 					   %W{o*:--output-pch=%*}}%V}}}}}}}", 0, 0, 0},
   {".i", "@cpp-output", 0, 0, 0},
@@ -7700,12 +7700,14 @@ driver::build_option_suggestions (void)
 	      for (unsigned j = 0; e->values[j].arg != NULL; j++)
 		{
 		  char *with_arg = concat (opt_text, e->values[j].arg, NULL);
-		  add_misspelling_candidates (m_option_suggestions, with_arg);
+		  add_misspelling_candidates (m_option_suggestions, option,
+					      with_arg);
 		  free (with_arg);
 		}
 	    }
 	  else
-	    add_misspelling_candidates (m_option_suggestions, opt_text);
+	    add_misspelling_candidates (m_option_suggestions, option,
+					opt_text);
 	  break;
 
 	case OPT_fsanitize_:
@@ -7729,7 +7731,8 @@ driver::build_option_suggestions (void)
 		/* Add with_arg and all of its variant spellings e.g.
 		   "-fno-sanitize=address" to candidates (albeit without
 		   leading dashes).  */
-		add_misspelling_candidates (m_option_suggestions, with_arg);
+		add_misspelling_candidates (m_option_suggestions, option,
+					    with_arg);
 		free (with_arg);
 	      }
 	  }
diff --git a/gcc/gcse.c b/gcc/gcse.c
index a3a7dc31353..49534f255f6 100644
--- a/gcc/gcse.c
+++ b/gcc/gcse.c
@@ -143,6 +143,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "df.h"
 #include "tm_p.h"
 #include "insn-config.h"
+#include "print-rtl.h"
 #include "regs.h"
 #include "ira.h"
 #include "recog.h"
@@ -342,8 +343,7 @@ struct ls_expr
   struct gcse_expr * expr;	/* Gcse expression reference for LM.  */
   rtx pattern;			/* Pattern of this mem.  */
   rtx pattern_regs;		/* List of registers mentioned by the mem.  */
-  rtx_insn_list *loads;		/* INSN list of loads seen.  */
-  rtx_insn_list *stores;	/* INSN list of stores seen.  */
+  vec<rtx_insn *> stores;	/* INSN list of stores seen.  */
   struct ls_expr * next;	/* Next in the list.  */
   int invalid;			/* Invalid for some reason.  */
   int index;			/* If it maps to a bitmap index.  */
@@ -3605,8 +3605,7 @@ ldst_entry (rtx x)
   ptr->expr         = NULL;
   ptr->pattern      = x;
   ptr->pattern_regs = NULL_RTX;
-  ptr->loads        = NULL;
-  ptr->stores       = NULL;
+  ptr->stores.create (0);
   ptr->reaching_reg = NULL_RTX;
   ptr->invalid      = 0;
   ptr->index        = 0;
@@ -3622,8 +3621,7 @@ ldst_entry (rtx x)
 static void
 free_ldst_entry (struct ls_expr * ptr)
 {
-  free_INSN_LIST_list (& ptr->loads);
-  free_INSN_LIST_list (& ptr->stores);
+  ptr->stores.release ();
 
   free (ptr);
 }
@@ -3663,19 +3661,8 @@ print_ldst_list (FILE * file)
 
       print_rtl (file, ptr->pattern);
 
-      fprintf (file, "\n	 Loads : ");
-
-      if (ptr->loads)
-	print_rtl (file, ptr->loads);
-      else
-	fprintf (file, "(nil)");
-
       fprintf (file, "\n	Stores : ");
-
-      if (ptr->stores)
-	print_rtl (file, ptr->stores);
-      else
-	fprintf (file, "(nil)");
+      print_rtx_insn_vec (file, ptr->stores);
 
       fprintf (file, "\n\n");
     }
@@ -3801,9 +3788,7 @@ compute_ld_motion_mems (void)
 		  if (MEM_P (src) && simple_mem (src))
 		    {
 		      ptr = ldst_entry (src);
-		      if (REG_P (dest))
-			ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
-		      else
+		      if (!REG_P (dest))
 			ptr->invalid = 1;
 		    }
 		  else
@@ -3834,7 +3819,7 @@ compute_ld_motion_mems (void)
 			     returns 0 for all REGs.  */
 			  && can_assign_to_reg_without_clobbers_p (src,
 								    src_mode))
-			ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
+			ptr->stores.safe_push (insn);
 		      else
 			ptr->invalid = 1;
 		    }
@@ -3927,11 +3912,10 @@ update_ld_motion_stores (struct gcse_expr * expr)
 	 where reg is the reaching reg used in the load.  We checked in
 	 compute_ld_motion_mems that we can replace (set mem expr) with
 	 (set reg expr) in that insn.  */
-      rtx list = mem_ptr->stores;
-
-      for ( ; list != NULL_RTX; list = XEXP (list, 1))
+      rtx_insn *insn;
+      unsigned int i;
+      FOR_EACH_VEC_ELT_REVERSE (mem_ptr->stores, i, insn)
 	{
-	  rtx_insn *insn = as_a <rtx_insn *> (XEXP (list, 0));
 	  rtx pat = PATTERN (insn);
 	  rtx src = SET_SRC (pat);
 	  rtx reg = expr->reaching_reg;
diff --git a/gcc/gimple-ssa-split-paths.c b/gcc/gimple-ssa-split-paths.c
index d566f64c70b..81705918179 100644
--- a/gcc/gimple-ssa-split-paths.c
+++ b/gcc/gimple-ssa-split-paths.c
@@ -76,14 +76,19 @@ find_block_to_duplicate_for_splitting_paths (basic_block latch)
 	    return NULL;
 
 	  /* And that BB's immediate dominator's successors are the
-	     predecessors of BB.  */
-	  if (!find_edge (bb_idom, EDGE_PRED (bb, 0)->src)
-	      || !find_edge (bb_idom, EDGE_PRED (bb, 1)->src))
+	     predecessors of BB or BB itself.  */
+	  if (!(EDGE_PRED (bb, 0)->src == bb_idom
+		|| find_edge (bb_idom, EDGE_PRED (bb, 0)->src))
+	      || !(EDGE_PRED (bb, 1)->src == bb_idom
+		   || find_edge (bb_idom, EDGE_PRED (bb, 1)->src)))
 	    return NULL;
 
-	  /* And that the predecessors of BB each have a single successor.  */
-	  if (!single_succ_p (EDGE_PRED (bb, 0)->src)
-	      || !single_succ_p (EDGE_PRED (bb, 1)->src))
+	  /* And that the predecessors of BB each have a single successor
+	     or are BB's immediate domiator itself.  */
+	  if (!(EDGE_PRED (bb, 0)->src == bb_idom
+		|| single_succ_p (EDGE_PRED (bb, 0)->src))
+	      || !(EDGE_PRED (bb, 1)->src == bb_idom
+		   || single_succ_p (EDGE_PRED (bb, 1)->src)))
 	    return NULL;
 
 	  /* So at this point we have a simple diamond for an IF-THEN-ELSE
@@ -148,8 +153,10 @@ is_feasible_trace (basic_block bb)
   basic_block pred1 = EDGE_PRED (bb, 0)->src;
   basic_block pred2 = EDGE_PRED (bb, 1)->src;
   int num_stmts_in_join = count_stmts_in_block (bb);
-  int num_stmts_in_pred1 = count_stmts_in_block (pred1);
-  int num_stmts_in_pred2 = count_stmts_in_block (pred2);
+  int num_stmts_in_pred1
+    = EDGE_COUNT (pred1->succs) == 1 ? count_stmts_in_block (pred1) : 0;
+  int num_stmts_in_pred2
+    = EDGE_COUNT (pred2->succs) == 1 ? count_stmts_in_block (pred2) : 0;
 
   /* This is meant to catch cases that are likely opportunities for
      if-conversion.  Essentially we look for the case where
@@ -292,6 +299,8 @@ split_paths ()
 		     "Duplicating join block %d into predecessor paths\n",
 		     bb->index);
 	  basic_block pred0 = EDGE_PRED (bb, 0)->src;
+	  if (EDGE_COUNT (pred0->succs) != 1)
+	    pred0 = EDGE_PRED (bb, 1)->src;
 	  transform_duplicate (pred0, bb);
 	  changed = true;
 
diff --git a/gcc/gimple.c b/gcc/gimple.c
index 677c5607090..e275dfc3c52 100644
--- a/gcc/gimple.c
+++ b/gcc/gimple.c
@@ -2400,21 +2400,6 @@ gimple_signed_type (tree type)
 alias_set_type
 gimple_get_alias_set (tree t)
 {
-  tree u;
-
-  /* Permit type-punning when accessing a union, provided the access
-     is directly through the union.  For example, this code does not
-     permit taking the address of a union member and then storing
-     through it.  Even the type-punning allowed here is a GCC
-     extension, albeit a common and useful one; the C standard says
-     that such accesses have implementation-defined behavior.  */
-  for (u = t;
-       TREE_CODE (u) == COMPONENT_REF || TREE_CODE (u) == ARRAY_REF;
-       u = TREE_OPERAND (u, 0))
-    if (TREE_CODE (u) == COMPONENT_REF
-	&& TREE_CODE (TREE_TYPE (TREE_OPERAND (u, 0))) == UNION_TYPE)
-      return 0;
-
   /* That's all the expressions we handle specially.  */
   if (!TYPE_P (t))
     return -1;
diff --git a/gcc/gimplify.c b/gcc/gimplify.c
index 47c4d253e41..393bcc12208 100644
--- a/gcc/gimplify.c
+++ b/gcc/gimplify.c
@@ -3813,6 +3813,18 @@ rhs_predicate_for (tree lhs)
     return is_gimple_mem_rhs_or_call;
 }
 
+/* Return the initial guess for an appropriate RHS predicate for this LHS,
+   before the LHS has been gimplified.  */
+
+static gimple_predicate
+initial_rhs_predicate_for (tree lhs)
+{
+  if (is_gimple_reg_type (TREE_TYPE (lhs)))
+    return is_gimple_reg_rhs_or_call;
+  else
+    return is_gimple_mem_rhs_or_call;
+}
+
 /* Gimplify a C99 compound literal expression.  This just means adding
    the DECL_EXPR before the current statement and using its anonymous
    decl instead.  */
@@ -4778,10 +4790,6 @@ gimplify_modify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p,
      that is what we must do here.  */
   maybe_with_size_expr (from_p);
 
-  ret = gimplify_expr (to_p, pre_p, post_p, is_gimple_lvalue, fb_lvalue);
-  if (ret == GS_ERROR)
-    return ret;
-
   /* As a special case, we have to temporarily allow for assignments
      with a CALL_EXPR on the RHS.  Since in GIMPLE a function call is
      a toplevel statement, when gimplifying the GENERIC expression
@@ -4794,11 +4802,28 @@ gimplify_modify_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p,
      reaches the CALL_EXPR.  On return from gimplify_expr, the newly
      created GIMPLE_CALL <foo> will be the last statement in *PRE_P
      and all we need to do here is set 'a' to be its LHS.  */
-  ret = gimplify_expr (from_p, pre_p, post_p, rhs_predicate_for (*to_p),
-		       fb_rvalue);
+
+  /* Gimplify the RHS first for C++17 and bug 71104.  */
+  gimple_predicate initial_pred = initial_rhs_predicate_for (*to_p);
+  ret = gimplify_expr (from_p, pre_p, post_p, initial_pred, fb_rvalue);
+  if (ret == GS_ERROR)
+    return ret;
+
+  /* Then gimplify the LHS.  */
+  ret = gimplify_expr (to_p, pre_p, post_p, is_gimple_lvalue, fb_lvalue);
   if (ret == GS_ERROR)
     return ret;
 
+  /* Now that the LHS is gimplified, re-gimplify the RHS if our initial
+     guess for the predicate was wrong.  */
+  gimple_predicate final_pred = rhs_predicate_for (*to_p);
+  if (final_pred != initial_pred)
+    {
+      ret = gimplify_expr (from_p, pre_p, post_p, final_pred, fb_rvalue);
+      if (ret == GS_ERROR)
+	return ret;
+    }
+
   /* In case of va_arg internal fn wrappped in a WITH_SIZE_EXPR, add the type
      size as argument to the call.  */
   if (TREE_CODE (*from_p) == WITH_SIZE_EXPR)
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index e2a7a8d36ee..49976238de9 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-1f2f2c77c7ec92efa254e07162a8fc0d22a550e7
+c8fdad389ce6f439a02fb654d231053b47ff4e02
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
diff --git a/gcc/go/gofrontend/escape.cc b/gcc/go/gofrontend/escape.cc
index 7a558183f37..af8f1e2f993 100644
--- a/gcc/go/gofrontend/escape.cc
+++ b/gcc/go/gofrontend/escape.cc
@@ -2194,15 +2194,103 @@ Gogo::propagate_escape(Escape_context* context, Node* dst)
     }
 }
 
+class Escape_analysis_tag
+{
+ public:
+  Escape_analysis_tag(Escape_context* context)
+    : context_(context)
+  { }
+
+  // Add notes to the function's type about the escape information of its
+  // input parameters.
+  void
+  tag(Named_object* fn);
+
+ private:
+  Escape_context* context_;
+};
+
+void
+Escape_analysis_tag::tag(Named_object* fn)
+{
+  // External functions are assumed unsafe
+  // unless //go:noescape is given before the declaration.
+  if (fn->package() != NULL || !fn->is_function())
+    {
+      // TODO(cmang): Implement //go:noescape directive for external functions;
+      // mark input parameters as not escaping.
+      return;
+    }
+
+  Function_type* fntype = fn->func_value()->type();
+  Bindings* bindings = fn->func_value()->block()->bindings();
+
+  if (fntype->is_method()
+      && !fntype->receiver()->name().empty()
+      && !Gogo::is_sink_name(fntype->receiver()->name()))
+    {
+      Named_object* rcvr_no = bindings->lookup(fntype->receiver()->name());
+      go_assert(rcvr_no != NULL);
+      Node* rcvr_node = Node::make_node(rcvr_no);
+      switch ((rcvr_node->encoding() & ESCAPE_MASK))
+	{
+	case Node::ESCAPE_NONE: // not touched by flood
+	case Node::ESCAPE_RETURN:
+	  if (fntype->receiver()->type()->has_pointer())
+	    // Don't bother tagging for scalars.
+	    fntype->add_receiver_note(rcvr_node->encoding());
+	  break;
+
+	case Node::ESCAPE_HEAP: // flooded, moved to heap.
+	case Node::ESCAPE_SCOPE: // flooded, value leaves scope.
+	  break;
+
+	default:
+	  break;
+	}
+    }
+
+  int i = 0;
+  if (fntype->parameters() != NULL)
+    {
+      const Typed_identifier_list* til = fntype->parameters();
+      for (Typed_identifier_list::const_iterator p = til->begin();
+	   p != til->end();
+	   ++p, ++i)
+	{
+	  if (p->name().empty() || Gogo::is_sink_name(p->name()))
+	    continue;
+
+	  Named_object* param_no = bindings->lookup(p->name());
+	  go_assert(param_no != NULL);
+	  Node* param_node = Node::make_node(param_no);
+	  switch ((param_node->encoding() & ESCAPE_MASK))
+	    {
+	    case Node::ESCAPE_NONE: // not touched by flood
+	    case Node::ESCAPE_RETURN:
+	      if (p->type()->has_pointer())
+		// Don't bother tagging for scalars.
+		fntype->add_parameter_note(i, param_node->encoding());
+	      break;
+
+	    case Node::ESCAPE_HEAP: // flooded, moved to heap.
+	    case Node::ESCAPE_SCOPE: // flooded, value leaves scope.
+	      break;
+
+	    default:
+	      break;
+	    }
+	}
+    }
+  fntype->set_is_tagged();
+}
 
 // Tag each top-level function with escape information that will be used to
 // retain analysis results across imports.
 
 void
-Gogo::tag_function(Escape_context*, Named_object*)
+Gogo::tag_function(Escape_context* context, Named_object* fn)
 {
-  // TODO(cmang): Create escape information notes for each input and output
-  // parameter in a given function.
-  // Escape_analysis_tag eat(context, fn);
-  // this->traverse(&eat);
+  Escape_analysis_tag eat(context);
+  eat.tag(fn);
 }
diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index fd2951673fb..f7f120e04b1 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -3228,6 +3228,41 @@ noce_convert_multiple_sets (struct noce_if_info *if_info)
       if (if_info->then_else_reversed)
 	std::swap (old_val, new_val);
 
+
+      /* We allow simple lowpart register subreg SET sources in
+	 bb_ok_for_noce_convert_multiple_sets.  Be careful when processing
+	 sequences like:
+	 (set (reg:SI r1) (reg:SI r2))
+	 (set (reg:HI r3) (subreg:HI (r1)))
+	 For the second insn new_val or old_val (r1 in this example) will be
+	 taken from the temporaries and have the wider mode which will not
+	 match with the mode of the other source of the conditional move, so
+	 we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI).
+	 Wrap the two cmove operands into subregs if appropriate to prevent
+	 that.  */
+      if (GET_MODE (new_val) != GET_MODE (temp))
+	{
+	  machine_mode src_mode = GET_MODE (new_val);
+	  machine_mode dst_mode = GET_MODE (temp);
+	  if (GET_MODE_SIZE (src_mode) <= GET_MODE_SIZE (dst_mode))
+	    {
+	      end_sequence ();
+	      return FALSE;
+	    }
+	  new_val = lowpart_subreg (dst_mode, new_val, src_mode);
+	}
+      if (GET_MODE (old_val) != GET_MODE (temp))
+	{
+	  machine_mode src_mode = GET_MODE (old_val);
+	  machine_mode dst_mode = GET_MODE (temp);
+	  if (GET_MODE_SIZE (src_mode) <= GET_MODE_SIZE (dst_mode))
+	    {
+	      end_sequence ();
+	      return FALSE;
+	    }
+	  old_val = lowpart_subreg (dst_mode, old_val, src_mode);
+	}
+
       /* Actually emit the conditional move.  */
       rtx temp_dest = noce_emit_cmove (if_info, temp, cond_code,
 				       x, y, new_val, old_val);
diff --git a/gcc/ipa-inline-analysis.c b/gcc/ipa-inline-analysis.c
index 5d6721813d8..da29d2240a4 100644
--- a/gcc/ipa-inline-analysis.c
+++ b/gcc/ipa-inline-analysis.c
@@ -3017,6 +3017,16 @@ compute_inline_parameters (struct cgraph_node *node, bool early)
 	       node->local.can_change_signature = !e;
 	     }
 	 }
+       /* Functions called by instrumentation thunk can't change signature
+	  because instrumentation thunk modification is not supported.  */
+       if (node->local.can_change_signature)
+	 for (e = node->callers; e; e = e->next_caller)
+	   if (e->caller->thunk.thunk_p
+	       && e->caller->thunk.add_pointer_bounds_args)
+	     {
+	       node->local.can_change_signature = false;
+	       break;
+	     }
        estimate_function_body_sizes (node, early);
        pop_cfun ();
      }
diff --git a/gcc/ipa-inline-transform.c b/gcc/ipa-inline-transform.c
index f6b7d41d47e..9ac1efc9192 100644
--- a/gcc/ipa-inline-transform.c
+++ b/gcc/ipa-inline-transform.c
@@ -342,10 +342,10 @@ inline_call (struct cgraph_edge *e, bool update_original,
       if (dump_file)
 	fprintf (dump_file, "Dropping flag_strict_aliasing on %s:%i\n",
 		 to->name (), to->order);
-      build_optimization_node (&opts);
       DECL_FUNCTION_SPECIFIC_OPTIMIZATION (to->decl)
 	 = build_optimization_node (&opts);
     }
+
   inline_summary *caller_info = inline_summaries->get (to);
   inline_summary *callee_info = inline_summaries->get (callee);
   if (!caller_info->fp_expressions && callee_info->fp_expressions)
@@ -402,7 +402,6 @@ inline_call (struct cgraph_edge *e, bool update_original,
 	  if (dump_file)
 	    fprintf (dump_file, "Copying FP flags from %s:%i to %s:%i\n",
 		     callee->name (), callee->order, to->name (), to->order);
-	  build_optimization_node (&opts);
 	  DECL_FUNCTION_SPECIFIC_OPTIMIZATION (to->decl)
 	     = build_optimization_node (&opts);
 	}
diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c
index 6950ffb17b3..6b7ee81bea1 100644
--- a/gcc/ira-lives.c
+++ b/gcc/ira-lives.c
@@ -1014,7 +1014,7 @@ find_call_crossed_cheap_reg (rtx_insn *insn)
 		  break;
 		}
 
-	      if (reg_overlap_mentioned_p (reg, PATTERN (prev)))
+	      if (reg_set_p (reg, prev))
 		break;
 	    }
 	  prev = PREV_INSN (prev);
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index bf08dce2e0a..a1119ac70fd 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -2261,6 +2261,41 @@ process_alt_operands (int only_alternative)
 		  goto fail;
 		}
 
+	      if (this_alternative != NO_REGS)
+		{
+		  HARD_REG_SET available_regs;
+		  
+		  COPY_HARD_REG_SET (available_regs,
+				     reg_class_contents[this_alternative]);
+		  AND_COMPL_HARD_REG_SET
+		    (available_regs,
+		     ira_prohibited_class_mode_regs[this_alternative][mode]);
+		  AND_COMPL_HARD_REG_SET (available_regs, lra_no_alloc_regs);
+		  if (hard_reg_set_empty_p (available_regs))
+		    {
+		      /* There are no hard regs holding a value of given
+			 mode.  */
+		      if (offmemok)
+			{
+			  this_alternative = NO_REGS;
+			  if (lra_dump_file != NULL)
+			    fprintf (lra_dump_file,
+				     "            %d Using memory because of"
+				     " a bad mode: reject+=2\n",
+				     nop);
+			  reject += 2;
+			}
+		      else
+			{
+			  if (lra_dump_file != NULL)
+			    fprintf (lra_dump_file,
+				     "            alt=%d: Wrong mode -- refuse\n",
+				     nalt);
+			  goto fail;
+			}
+		    }
+		}
+
 	      /* If not assigned pseudo has a class which a subset of
 		 required reg class, it is a less costly alternative
 		 as the pseudo still can get a hard reg of necessary
@@ -2488,7 +2523,9 @@ process_alt_operands (int only_alternative)
 
 		 Code below increases the reject for both pseudo and non-pseudo
 		 spill.  */
-	      if (no_regs_p && !(REG_P (op) && hard_regno[nop] < 0))
+	      if (no_regs_p
+		  && !(MEM_P (op) && offmemok)
+		  && !(REG_P (op) && hard_regno[nop] < 0))
 		{
 		  if (lra_dump_file != NULL)
 		    fprintf
diff --git a/gcc/match.pd b/gcc/match.pd
index 980b73b9a19..b24bfb47de0 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -1652,14 +1652,11 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
        float or both integer, we don't need the middle conversion if the
        former is wider than the latter and doesn't change the signedness
        (for integers).  Avoid this if the final type is a pointer since
-       then we sometimes need the middle conversion.  Likewise if the
-       final type has a precision not equal to the size of its mode.  */
+       then we sometimes need the middle conversion.  */
     (if (((inter_int && inside_int) || (inter_float && inside_float))
 	 && (final_int || final_float)
 	 && inter_prec >= inside_prec
-	 && (inter_float || inter_unsignedp == inside_unsignedp)
-	 && ! (final_prec != GET_MODE_PRECISION (TYPE_MODE (type))
-	       && TYPE_MODE (type) == TYPE_MODE (inter_type)))
+	 && (inter_float || inter_unsignedp == inside_unsignedp))
      (ocvt @0))
 
     /* If we have a sign-extension of a zero-extended value, we can
@@ -1692,9 +1689,7 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 	 && ((inter_unsignedp && inter_prec > inside_prec)
 	     == (final_unsignedp && final_prec > inter_prec))
 	 && ! (inside_ptr && inter_prec != final_prec)
-	 && ! (final_ptr && inside_prec != inter_prec)
-	 && ! (final_prec != GET_MODE_PRECISION (TYPE_MODE (type))
-	       && TYPE_MODE (type) == TYPE_MODE (inter_type)))
+	 && ! (final_ptr && inside_prec != inter_prec))
      (ocvt @0))
 
     /* A truncation to an unsigned type (a zero-extension) should be
diff --git a/gcc/opts-common.c b/gcc/opts-common.c
index 4e1ef497ed8..8634b520ecf 100644
--- a/gcc/opts-common.c
+++ b/gcc/opts-common.c
@@ -374,8 +374,9 @@ static const struct option_map option_map[] =
    to specific options.  We want to do the reverse: to find all the ways
    that a user could validly spell an option.
 
-   Given valid OPT_TEXT (with a leading dash), add it and all of its valid
-   variant spellings to CANDIDATES, each without a leading dash.
+   Given valid OPT_TEXT (with a leading dash) for OPTION, add it and all
+   of its valid variant spellings to CANDIDATES, each without a leading
+   dash.
 
    For example, given "-Wabi-tag", the following are added to CANDIDATES:
      "Wabi-tag"
@@ -387,9 +388,11 @@ static const struct option_map option_map[] =
 
 void
 add_misspelling_candidates (auto_vec<char *> *candidates,
+			    const struct cl_option *option,
 			    const char *opt_text)
 {
   gcc_assert (candidates);
+  gcc_assert (option);
   gcc_assert (opt_text);
   candidates->safe_push (xstrdup (opt_text + 1));
   for (unsigned i = 0; i < ARRAY_SIZE (option_map); i++)
@@ -398,6 +401,9 @@ add_misspelling_candidates (auto_vec<char *> *candidates,
       const char *new_prefix = option_map[i].new_prefix;
       size_t new_prefix_len = strlen (new_prefix);
 
+      if (option->cl_reject_negative && option_map[i].negated)
+	continue;
+
       if (strncmp (opt_text, new_prefix, new_prefix_len) == 0)
 	{
 	  char *alternative = concat (opt0 + 1, opt_text + new_prefix_len,
diff --git a/gcc/opts.c b/gcc/opts.c
index 74062106895..f09c520975b 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -2228,7 +2228,14 @@ handle_param (struct gcc_options *opts, struct gcc_options *opts_set,
 
       enum compiler_param index;
       if (!find_param (arg, &index))
-	error_at (loc, "invalid --param name %qs", arg);
+	{
+	  const char *suggestion = find_param_fuzzy (arg);
+	  if (suggestion)
+	    error_at (loc, "invalid --param name %qs; did you mean %qs?",
+		      arg, suggestion);
+	  else
+	    error_at (loc, "invalid --param name %qs", arg);
+	}
       else
 	{
 	  if (!param_string_value_p (index, equal + 1, &value))
diff --git a/gcc/opts.h b/gcc/opts.h
index 1b5cf448a29..25d32c1ad49 100644
--- a/gcc/opts.h
+++ b/gcc/opts.h
@@ -417,6 +417,7 @@ extern const struct sanitizer_opts_s
 } sanitizer_opts[];
 
 extern void add_misspelling_candidates (auto_vec<char *> *candidates,
+					const struct cl_option *option,
 					const char *base_option);
 
 #endif
diff --git a/gcc/params.c b/gcc/params.c
index 41660b47393..1b5000bb8d7 100644
--- a/gcc/params.c
+++ b/gcc/params.c
@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "params.h"
 #include "params-enum.h"
 #include "diagnostic-core.h"
+#include "spellcheck.h"
 
 /* An array containing the compiler parameters and their current
    values.  */
@@ -142,6 +143,19 @@ find_param (const char *name, enum compiler_param *index)
   return false;
 }
 
+/* Look for the closest match for NAME in the parameter table, returning it
+   if it is a reasonable suggestion for a misspelling.  Return NULL
+   otherwise.  */
+
+const char *
+find_param_fuzzy (const char *name)
+{
+  best_match <const char *, const char *> bm (name);
+  for (size_t i = 0; i < num_compiler_params; ++i)
+    bm.consider (compiler_params[i].option);
+  return bm.get_best_meaningful_candidate ();
+}
+
 /* Return true if param with entry index INDEX should be defined using strings.
    If so, return the value corresponding to VALUE_NAME in *VALUE_P.  */
 
diff --git a/gcc/params.h b/gcc/params.h
index 7221ab65a61..97c8d565055 100644
--- a/gcc/params.h
+++ b/gcc/params.h
@@ -89,6 +89,7 @@ enum compiler_param
 };
 
 extern bool find_param (const char *, enum compiler_param *);
+extern const char *find_param_fuzzy (const char *name);
 extern bool param_string_value_p (enum compiler_param, const char *, int *);
 
 /* The value of the parameter given by ENUM.  Not an lvalue.  */
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 2203ff703ea..a23a6f51cde 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -6108,9 +6108,10 @@ simplify_subreg (machine_mode outermode, rtx op,
       && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op)))
     return adjust_address_nv (op, outermode, byte);
 
-  /* Handle complex values represented as CONCAT
-     of real and imaginary part.  */
-  if (GET_CODE (op) == CONCAT)
+  /* Handle complex or vector values represented as CONCAT or VEC_CONCAT
+     of two parts.  */
+  if (GET_CODE (op) == CONCAT
+      || GET_CODE (op) == VEC_CONCAT)
     {
       unsigned int part_size, final_offset;
       rtx part, res;
@@ -6130,10 +6131,13 @@ simplify_subreg (machine_mode outermode, rtx op,
       if (final_offset + GET_MODE_SIZE (outermode) > part_size)
 	return NULL_RTX;
 
-      res = simplify_subreg (outermode, part, GET_MODE (part), final_offset);
+      enum machine_mode part_mode = GET_MODE (part);
+      if (part_mode == VOIDmode)
+	part_mode = GET_MODE_INNER (GET_MODE (op));
+      res = simplify_subreg (outermode, part, part_mode, final_offset);
       if (res)
 	return res;
-      if (validate_subreg (outermode, GET_MODE (part), part, final_offset))
+      if (validate_subreg (outermode, part_mode, part, final_offset))
 	return gen_rtx_SUBREG (outermode, part, final_offset);
       return NULL_RTX;
     }
diff --git a/gcc/spellcheck.c b/gcc/spellcheck.c
index 2648f3a0bbb..b37b1e46929 100644
--- a/gcc/spellcheck.c
+++ b/gcc/spellcheck.c
@@ -121,24 +121,6 @@ levenshtein_distance (const char *s, const char *t)
   return levenshtein_distance (s, strlen (s), t, strlen (t));
 }
 
-/* Specialization of edit_distance_traits for C-style strings.  */
-
-template <>
-struct edit_distance_traits<const char *>
-{
-  static size_t get_length (const char *str)
-  {
-    gcc_assert (str);
-    return strlen (str);
-  }
-
-  static const char *get_string (const char *str)
-  {
-    gcc_assert (str);
-    return str;
-  }
-};
-
 /* Given TARGET, a non-NULL string, and CANDIDATES, a non-NULL ptr to
    an autovec of non-NULL strings, determine which element within
    CANDIDATES has the lowest edit distance to TARGET.  If there are
diff --git a/gcc/spellcheck.h b/gcc/spellcheck.h
index 035f4ac3608..b48cfbc4072 100644
--- a/gcc/spellcheck.h
+++ b/gcc/spellcheck.h
@@ -48,6 +48,24 @@ find_closest_string (const char *target,
 template <typename TYPE>
 struct edit_distance_traits {};
 
+/* Specialization of edit_distance_traits for C-style strings.  */
+
+template <>
+struct edit_distance_traits<const char *>
+{
+  static size_t get_length (const char *str)
+  {
+    gcc_assert (str);
+    return strlen (str);
+  }
+
+  static const char *get_string (const char *str)
+  {
+    gcc_assert (str);
+    return str;
+  }
+};
+
 /* A type for use when determining the best match against a string,
    expressed as a template so that we can match against various
    string-like types (const char *, frontend identifiers, and preprocessor
diff --git a/gcc/store-motion.c b/gcc/store-motion.c
index 301b69be86d..6d7d37f6944 100644
--- a/gcc/store-motion.c
+++ b/gcc/store-motion.c
@@ -46,7 +46,6 @@ along with GCC; see the file COPYING3.  If not see
      a compile time hog that needs a rewrite (maybe cache st_exprs to
      invalidate REG_EQUAL/REG_EQUIV notes for?).
    - pattern_regs in st_expr should be a regset (on its own obstack).
-   - antic_stores and avail_stores should be VECs instead of lists.
    - store_motion_mems should be a vec instead of a list.
    - there should be an alloc pool for struct st_expr objects.
    - investigate whether it is helpful to make the address of an st_expr
@@ -66,7 +65,7 @@ struct st_expr
   /* List of registers mentioned by the mem.  */
   rtx pattern_regs;
   /* INSN list of stores that are locally anticipatable.  */
-  rtx_insn_list *antic_stores;
+  vec<rtx_insn *> antic_stores;
   /* INSN list of stores that are locally available.  */
   vec<rtx_insn *> avail_stores;
   /* Next in the list.  */
@@ -148,7 +147,7 @@ st_expr_entry (rtx x)
   ptr->next         = store_motion_mems;
   ptr->pattern      = x;
   ptr->pattern_regs = NULL_RTX;
-  ptr->antic_stores = NULL;
+  ptr->antic_stores.create (0);
   ptr->avail_stores.create (0);
   ptr->reaching_reg = NULL_RTX;
   ptr->index        = 0;
@@ -164,8 +163,8 @@ st_expr_entry (rtx x)
 static void
 free_st_expr_entry (struct st_expr * ptr)
 {
-  free_INSN_LIST_list (& ptr->antic_stores);
-   ptr->avail_stores.release ();
+  ptr->antic_stores.release ();
+  ptr->avail_stores.release ();
 
   free (ptr);
 }
@@ -233,11 +232,7 @@ print_store_motion_mems (FILE * file)
       print_rtl (file, ptr->pattern);
 
       fprintf (file, "\n	 ANTIC stores : ");
-
-      if (ptr->antic_stores)
-	print_rtl (file, ptr->antic_stores);
-      else
-	fprintf (file, "(nil)");
+      print_rtx_insn_vec (file, ptr->antic_stores);
 
       fprintf (file, "\n	 AVAIL stores : ");
 
@@ -566,11 +561,11 @@ find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
   /* Do not check for anticipatability if we either found one anticipatable
      store already, or tested for one and found out that it was killed.  */
   check_anticipatable = 0;
-  if (!ptr->antic_stores)
+  if (ptr->antic_stores.is_empty ())
     check_anticipatable = 1;
   else
     {
-      rtx_insn *tmp = ptr->antic_stores->insn ();
+      rtx_insn *tmp = ptr->antic_stores.last ();
       if (tmp != NULL_RTX
 	  && BLOCK_FOR_INSN (tmp) != bb)
 	check_anticipatable = 1;
@@ -582,7 +577,7 @@ find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
 	tmp = NULL;
       else
 	tmp = insn;
-      ptr->antic_stores = alloc_INSN_LIST (tmp, ptr->antic_stores);
+      ptr->antic_stores.safe_push (tmp);
     }
 
   /* It is not necessary to check whether store is available if we did
@@ -683,9 +678,9 @@ compute_store_table (void)
       for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
 	{
 	  LAST_AVAIL_CHECK_FAILURE (ptr) = NULL_RTX;
-	  if (ptr->antic_stores
-	      && (tmp = ptr->antic_stores->insn ()) == NULL_RTX)
-	    ptr->antic_stores = ptr->antic_stores->next ();
+	  if (!ptr->antic_stores.is_empty ()
+	      && (tmp = ptr->antic_stores.last ()) == NULL)
+	    ptr->antic_stores.pop ();
 	}
     }
 
@@ -831,7 +826,7 @@ remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
   int sp;
   edge act;
   sbitmap visited = sbitmap_alloc (last_basic_block_for_fn (cfun));
-  rtx last, note;
+  rtx note;
   rtx_insn *insn;
   rtx mem = smexpr->pattern;
 
@@ -866,13 +861,13 @@ remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
 	}
       bitmap_set_bit (visited, bb->index);
 
+      rtx_insn *last;
       if (bitmap_bit_p (st_antloc[bb->index], smexpr->index))
 	{
-	  for (last = smexpr->antic_stores;
-	       BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
-	       last = XEXP (last, 1))
-	    continue;
-	  last = XEXP (last, 0);
+	  unsigned int i;
+	  FOR_EACH_VEC_ELT_REVERSE (smexpr->antic_stores, i, last)
+	    if (BLOCK_FOR_INSN (last) == bb)
+	      break;
 	}
       else
 	last = NEXT_INSN (BB_END (bb));
@@ -911,15 +906,17 @@ replace_store_insn (rtx reg, rtx_insn *del, basic_block bb,
 		    struct st_expr *smexpr)
 {
   rtx_insn *insn;
-  rtx mem, note, set, ptr;
+  rtx mem, note, set;
 
   mem = smexpr->pattern;
   insn = gen_move_insn (reg, SET_SRC (single_set (del)));
 
-  for (ptr = smexpr->antic_stores; ptr; ptr = XEXP (ptr, 1))
-    if (XEXP (ptr, 0) == del)
+  unsigned int i;
+  rtx_insn *temp;
+  FOR_EACH_VEC_ELT_REVERSE (smexpr->antic_stores, i, temp)
+    if (temp == del)
       {
-	XEXP (ptr, 0) = insn;
+	smexpr->antic_stores[i] = insn;
 	break;
       }
 
@@ -1001,7 +998,6 @@ build_store_vectors (void)
   basic_block bb;
   int *regs_set_in_block;
   rtx_insn *insn;
-  rtx_insn_list *st;
   struct st_expr * ptr;
   unsigned int max_gcse_regno = max_reg_num ();
 
@@ -1038,9 +1034,9 @@ build_store_vectors (void)
 	  bitmap_set_bit (st_avloc[bb->index], ptr->index);
 	}
 
-      for (st = ptr->antic_stores; st != NULL; st = st->next ())
+      unsigned int i;
+      FOR_EACH_VEC_ELT_REVERSE (ptr->antic_stores, i, insn)
 	{
-	  insn = st->insn ();
 	  bb = BLOCK_FOR_INSN (insn);
 	  bitmap_set_bit (st_antloc[bb->index], ptr->index);
 	}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 866cef796f3..63333ba01aa 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,506 @@
+2016-07-09  Thomas Koenig  <tkoenig@gcc.gnu.org>
+
+	PR fortran/71783
+	* gfortran.dg/dependency_46.f90:  New test.
+
+2016-07-08  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/71621
+	* gcc.target/i386/pr71621-1.c: New.
+	* gcc.target/i386/pr71621-2.c: New.
+
+2016-07-08  Cesar Philippidis  <cesar@codesourcery.com>
+
+	* gfortran.dg/goacc/pr71704.f90: New test.
+
+2016-07-08  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	PR target/71297
+	* gcc.target/powerpc/pr71297.c: New.
+
+2016-07-08  Jiong Wang  <jiong.wang@arm.com>
+
+	* gcc.target/aarch64/simd/vminmaxnm_1.c: New.
+
+2016-07-08  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/71806
+	* gcc.target/powerpc/p9-lxvx-stxvx-3.c: Add -mfloat128 option.
+
+2016-07-08  Alan Hayward  <alan.hayward@arm.com>
+
+	PR tree-optimization/71667
+	* gcc.dg/vect/pr71667.c: New
+
+2016-07-08  Martin Liska  <mliska@suse.cz>
+
+	* gcc.dg/torture/pr71606.c: New test.
+
+2016-07-07  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/71764
+	* gfortran.dg/pr71764.f90: New test.
+
+2016-07-07  Jakub Jelinek  <jakub@redhat.com>
+	    Kai Tietz  <ktietz70@googlemail.com>
+
+	PR c++/70869
+	PR c++/71054
+	* g++.dg/cpp0x/pr70869.C: New test.
+	* g++.dg/cpp0x/pr71054.C: New test.
+
+2016-07-07  David Edelsohn  <dje.gcc@gmail.com>
+
+	* g++.dg/debug/pr71432.C: Fail on AIX.
+
+2016-07-07  Martin Liska  <mliska@suse.cz>
+
+	* gfortran.dg/do_1.f90: Remove a corner case that triggers
+	an undefined behavior.
+	* gfortran.dg/do_3.F90: Likewise.
+	* gfortran.dg/do_check_11.f90: New test.
+	* gfortran.dg/do_check_12.f90: New test.
+	* gfortran.dg/do_corner_warn.f90: New test.
+
+2016-07-07  Martin Liska  <mliska@suse.cz>
+
+	* gfortran.dg/predict-1.f90: Ammend the test.
+	* gfortran.dg/predict-2.f90: Likewise.
+
+2016-07-07  Ilya Enkovich  <ilya.enkovich@intel.com>
+
+	PR ipa/71624
+	* g++.dg/pr71624.C: New test.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
+	check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
+	ARMv8-M Mainline architectures.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
+	__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
+
+2016-07-06  Segher Boessenkool  <segher@kernel.crashing.org>
+
+	PR target/70098
+	PR target/71763
+	* gcc.target/powerpc/pr71763.c: New file.
+
+2016-07-06  Yuri Rumyantsev  <ysrumyan@gmail.com>
+
+	PR tree-optimization/71518
+        * gcc.dg/pr71518.c: New test.
+
+2016-07-06  Wilco Dijkstra  <wdijkstr@arm.com>
+
+	* gcc.target/arm/vst1Q_laneu64-1.c (foo): Use unsigned char*.
+
+2016-07-06  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
+
+	PR target/50739	
+	* gcc.target/avr/pr50739.c: New test.
+
+2016-07-05  Jan Hubicka  <jh@suse.cz>
+
+	* gcc.dg/tree-ssa/scev-14.c: update template.
+
+2016-07-06  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.dg/vect/group-no-gaps-1.c: New test.
+
+2016-07-05  Andi Kleen  <ak@linux.intel.com>
+
+	* gcc.target/i386/mpx/mpx-check.h: Check XGETBV output
+	if kernel supports MPX.
+
+2016-07-05  Kito Cheng <kito.cheng@gmail.com>
+
+	* gcc.c-torture/compile/pr69102.c: Require fpic support.
+
+2016-07-05  Michael Meissner  <meissner@linux.vnet.ibm.com>
+	    Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	* gcc.target/powerpc/signbit-1.c: New test.
+	* gcc.target/powerpc/signbit-2.c: New test.
+	* gcc.target/powerpc/signbit-3.c: New test.
+
+2016-07-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	PR rtl-optimization/71594
+	* gcc.dg/torture/pr71594.c: New test.
+
+2016-07-05  Jan Hubicka  <jh@suse.cz>
+
+	* gcc.dg/tree-ssa/scev-14.c: new testcase.
+
+2016-07-05  David Malcolm  <dmalcolm@redhat.com>
+
+	PR c++/62314
+	* gcc/testsuite/g++.dg/parse/error5.C: Update column
+	number of missing semicolon error.
+	* g++.dg/pr62314-2.C: New test case.
+
+2016-07-05  Alessandro Fanfarillo  <fanfarillo.gcc@gmail.com>
+
+	* gfortran.dg/coarray_stat_function.f90: New test.
+	* gfortran.dg/coarray_stat_whitespace.f90: New test.
+	* gfortran.dg/coarray_lib_comm_1: Adapting old test
+	to new interfaces.
+
+2016-07-05  Andre Vehreschild  <vehre@gcc.gnu.org>
+
+	PR fortran/71623
+	* gfortran.dg/deferred_character_17.f90: New test.
+
+2016-07-05  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* gcc.target/arm/neon/polytypes.c: Move to ...
+	* gcc.target/arm/polytypes.c: ... here.
+	* gcc.target/arm/neon/pr51534.c: Move to ...
+	* gcc.target/arm/pr51534.c: ... here.
+	* gcc.target/arm/neon/vect-vcvt.c: Move to ...
+	* gcc.target/arm/vect-vcvt.c: ... here.
+	* gcc.target/arm/neon/vect-vcvtq.c: Move to ...
+	* gcc.target/arm/vect-vcvtq.c: ... here.
+	* gcc.target/arm/neon/vfp-shift-a2t2.c: Move to ...
+	* gcc.target/arm/vfp-shift-a2t2.c: ... here.
+	* gcc.target/arm/neon/vst1Q_laneu64-1.c: Move to ...
+	* gcc.target/arm/vst1Q_laneu64-1.c: ... here. Fix foo() prototype.
+	* gcc.target/arm/neon/neon.exp: Delete.
+	* gcc.target/arm/neon/: Delete.
+
+2016-07-04  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/65575
+	* gfortran.dg: pr65575.f90: New test.
+
+2016-07-04  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/35849
+	* gfortran.dg: pr35849.f90: New test.
+
+2016-07-04  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c++/71739
+	* g++.dg/cpp0x/pr71739.C: New test.
+
+2016-07-04  Christophe Lyon  <christophe.lyon@linaro.org>
+
+	* c-c++-common/asan/clone-test-1.c (main): Handle clone() failure.
+
+2016-07-04  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+	* gcc.target/s390/vector/vec-scalar-cmp-1.c: Expect lochi instead of
+	locr.
+	* gcc.target/s390/loc-1.c: New test.
+
+2016-07-04  Yuri Rumyantsev  <ysrumyan@gmail.com>
+
+	* gcc/testsuite/gcc.target/i386/avx512f-vect-perm-1.c: New test.
+	* gcc/testsuite/gcc.target/i386/avx512f-vect-perm-2.c: New test.
+
+2016-07-04  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	PR target/63874
+	* gcc.target/aarch64/pr63874.c: New test.
+
+2016-07-04  Jan Beulich  <jbeulich@suse.com>
+
+	* g++.dg/header.c: New.
+	* gcc.dg/header.c: New.
+
+2016-07-02  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/71719
+	* c-c++-common/Wunused-var-15.c: New test.
+
+2016-07-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR fortran/71687
+	* gfortran.dg/gomp/pr71687.f90: New test.
+
+2016-07-01  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	* gcc.dg/const-float128-ped.c: Require __float128 effective
+	target and options.
+	* gcc.dg/const-float128.c: Likewise.
+	* gcc.dg/torture/float128-cmp-invalid.c: Require
+	__float128 and base_quadfloat_support effective targets, and
+	__float128 options.
+	* gcc.dg/torture/float128-div-underflow.c: Likewise.
+	* gcc.dg/torture/float128-extend-nan.c: Likewise.
+	* gcc.dg/torture/float128-nan.c: Likewise.
+	* gcc.dg/torture/fp-int-convert-float128-timode-2.c: Likewise.
+	* gcc.dg/torture/fp-int-convert-float128-timode-3.c: Likewise.
+	* gcc.dg/torture/fp-int-convert-float128-timode.c: Likewise.
+	* lib/target-supports.exp (check_effective_target___float128):
+	New.
+	(add_options_for___float128): New.
+	(check_effective_target_base_quadword_support): New.
+
+2016-07-01  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/71720
+	* gcc.target/powerpc/pr71720.c: New test.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* gcc.dg/bss.c: New.
+
+2016-07-01  Peter Bergner  <bergner@vnet.ibm.com>
+
+	PR target/71698
+	* gcc.target/powerpc/pr71698.c: New test.
+
+2016-07-01  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/71151
+	* gcc.target/avr/pr71151-common.h (foo): Use macro SECTION_NAME
+	instead of ".foo" for its section name.
+	* gcc.target/avr/pr71151-2.c (SECTION_NAME): Define appropriately
+	depending on MCU's flash size.
+	* gcc.target/avr/pr71151-3.c (SECTION_NAME): Dito.
+	* gcc.target/avr/pr71151-4.c (SECTION_NAME): Dito.
+	* gcc.target/avr/pr71151-5.c (SECTION_NAME): Dito.
+	* gcc.target/avr/pr71151-6.c (SECTION_NAME): Dito.
+	* gcc.target/avr/pr71151-7.c (SECTION_NAME): Dito.
+	* gcc.target/avr/pr71151-8.c (SECTION_NAME): Dito.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
+	* gcc.target/i386/pr65105-2.c: Add -msse2.
+
+2016-06-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/71707
+	* gcc.dg/strlenopt-29.c: New test.
+
+	PR fortran/71704
+	* gfortran.dg/gomp/pr71704.f90: New test.
+
+	PR fortran/71705
+	* gfortran.dg/gomp/pr71705.f90: New test.
+
+2016-06-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+	* gcc.target/powerpc/dfp/dfp.exp: New dejagnu test script.
+	* gcc.target/powerpc/dfp/dtstsfi-0.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-1.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-10.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-11.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-12.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-13.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-14.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-15.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-16.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-17.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-18.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-19.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-2.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-20.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-21.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-22.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-23.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-24.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-25.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-26.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-27.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-28.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-29.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-3.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-30.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-31.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-32.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-33.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-34.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-35.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-36.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-37.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-38.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-39.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-4.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-40.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-41.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-42.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-43.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-44.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-45.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-46.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-47.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-48.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-49.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-5.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-50.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-51.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-52.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-53.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-54.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-55.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-56.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-57.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-58.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-59.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-6.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-60.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-61.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-62.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-63.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-64.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-65.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-66.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-67.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-68.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-69.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-7.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-70.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-71.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-72.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-73.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-74.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-75.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-76.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-77.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-78.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-79.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-8.c: New test.
+	* gcc.target/powerpc/dfp/dtstsfi-9.c: New test.
+
+2016-06-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+            James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* gcc.target/aarch64/vect_copy_lane_1.c: New test.
+
+2016-06-30  James Greenhalgh  <james.greenhalgh@arm.com>
+            Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* gcc.target/aarch64/vget_set_lane_1.c: New test.
+
+2016-06-30  David Malcolm  <dmalcolm@redhat.com>
+
+	PR driver/71651
+	* gcc.dg/spellcheck-options-12.c: New test case.
+
+2016-06-30  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/71693
+	* gcc.c-torture/compile/pr71693.c: New test.
+
+2016-06-29  David Malcolm  <dmalcolm@redhat.com>
+
+	* gcc.dg/spellcheck-params.c: New testcase.
+	* gcc.dg/spellcheck-params-2.c: New testcase.
+
+2016-06-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	* gcc.target/powerpc/p9-extract-1.c: New file to test ISA 3.0
+	vector extract instructions.
+	* gcc.target/powerpc/p9-extract-2.c: Likewise.
+
+2016-06-29  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
+
+	PR fortran/71686
+	* gfortran.dg/unexpected_eof_2.f90: New test.
+	* gfortran.dg/unexpected_eof_3.f90: New test.
+
+2016-06-29  Jim Wilson  <jim.wilson@linaro.org>
+
+	* gcc.dg/asr_div1.c: Add aarch64 specific dg-options.
+
+2016-06-29  Cesar Philippidis  <cesar@codesourcery.com>
+
+	* gfortran.dg/goacc/asyncwait-2.f95: Updated expected diagnostics.
+	* gfortran.dg/goacc/asyncwait-3.f95: Likewise.
+	* gfortran.dg/goacc/asyncwait-4.f95: Add test coverage.
+
+2016-06-29  Richard Biener  <rguenther@suse.de>
+
+	PR middle-end/15256
+	* gcc.dg/tree-ssa/forwprop-34.c: New testcase.
+
+2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* gcc.target/arm/aapcs/neon-vect10.c: Require
+	-mfloat-ab=hard.  Replace arm_neon_fp16_ok with arm_neon_fp16_hw.
+	* gcc.target/arm/aapcs/neon-vect9.c: Likewise.
+	* gcc.target/arm/aapcs/vfp18.c: Likewise.
+	* gcc.target/arm/aapcs/vfp19.c: Likewise.
+	* gcc.target/arm/aapcs/vfp20.c: Likewise.
+	* gcc.target/arm/aapcs/vfp21.c: Likewise.
+	* gcc.target/arm/fp16-aapcs-1.c: Require
+	-mfloat-ab=hard.  Also simplify the test.
+	* gcc.target/arm/fp16-aapcs-2.c: New.
+
+2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* lib/target-supports.exp (add_options_for_arm_fp16): Reword
+	comment.
+	(add_options_for_arm_fp16_ieee): New.
+	(add_options_for_arm_fp16_alternative): New.
+	(effective_target_arm_fp16_ok_nocache): Add to comment.  Fix a
+	long-line.
+	(effective_target_arm_fp16_hw): New.
+
+2016-06-29  Ilya Enkovich  <ilya.enkovich@intel.com>
+
+	PR tree-optimization/71655
+	* g++.dg/pr71655.C: New test.
+
+2016-06-29  Martin Liska  <mliska@suse.cz>
+
+	* gcc.dg/pr71585.c: New test.
+	* gcc.dg/pr71585-2.c: New test.
+	* gcc.dg/pr71585-3.c: New test.
+
+2016-06-29  Yuri Rumyantsev  <ysrumyan@gmail.com>
+
+	PR tree-optimization/70729
+	* g++.dg/vect/pr70729.cc: New test.
+
+2016-06-29  Thomas Schwinge  <thomas@codesourcery.com>
+
+	* c-c++-common/gomp/cancel-1.c: Extend.
+
+2016-06-29  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/71625
+	* gcc.dg/strlenopt-28.c: New test.
+
+2016-06-29  Richard Biener  <rguenther@suse.de>
+
+	PR middle-end/71002
+	* g++.dg/torture/pr71002.C: Adjust testcase.
+
+2016-06-29  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/71685
+	* gcc.dg/pr71685.c: New test.
+
+2016-06-28  Martin Sebor  <msebor@redhat.com>
+
+	PR c/71552
+	* gcc.dg/init-bad-9.c: New test.
+
+2016-06-28  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	* gcc.target/powerpc/abs128-1.c: Require VSX.
+	* gcc.target/powerpc/copysign128-1.c: Likewise.
+	* gcc.target/powerpc/inf128-1.c: Likewise.
+	* gcc.target/powerpc/nan128-1.c: Likewise.
+
+2016-06-28  Jakub Jelinek  <jakub@redhat.com>
+
+	PR middle-end/71626
+	* gcc.c-torture/execute/pr71626-1.c: New test.
+	* gcc.c-torture/execute/pr71626-2.c: New test.
+
+2016-06-28  Peter Bergner  <bergner@vnet.ibm.com>
+
+	PR target/71656
+	* gcc.target/powerpc/pr71656-2.c: Fix syntax errors.
+
 2016-06-27  Segher Boessenkool  <segher@kernel.crashing.org>
 
 	PR target/71670
diff --git a/gcc/testsuite/c-c++-common/Wunused-var-15.c b/gcc/testsuite/c-c++-common/Wunused-var-15.c
new file mode 100644
index 00000000000..b0f680a06bd
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/Wunused-var-15.c
@@ -0,0 +1,20 @@
+/* PR c/71719 */
+/* { dg-do compile } */
+/* { dg-options "-Wunused -W -Wno-psabi" } */
+
+typedef unsigned V __attribute__ ((vector_size (16)));
+
+void bar (unsigned);
+
+V x;
+
+void
+foo (V v)	/* { dg-bogus "set but not used" } */
+{
+  bar (v[0]);
+  V w = x;	/* { dg-bogus "set but not used" } */
+  bar (w[1]);
+}
+
+/* Ignore a warning that is irrelevant to the purpose of this test.  */
+/* { dg-prune-output ".*GCC vector passed by reference.*" } */
diff --git a/gcc/testsuite/c-c++-common/asan/clone-test-1.c b/gcc/testsuite/c-c++-common/asan/clone-test-1.c
index eeca09f3e68..c58c376f5df 100644
--- a/gcc/testsuite/c-c++-common/asan/clone-test-1.c
+++ b/gcc/testsuite/c-c++-common/asan/clone-test-1.c
@@ -29,6 +29,10 @@ int main(int argc, char **argv) {
   char *sp = child_stack + kStackSize;  /* Stack grows down. */
   printf("Parent: %p\n", sp);
   pid_t clone_pid = clone(Child, sp, CLONE_FILES | CLONE_VM, NULL, 0, 0, 0);
+  if (clone_pid == -1) {
+    perror("clone");
+    return 1;
+  }
   int status;
   pid_t wait_result = waitpid(clone_pid, &status, __WCLONE);
   if (wait_result < 0) {
diff --git a/gcc/testsuite/c-c++-common/gomp/cancel-1.c b/gcc/testsuite/c-c++-common/gomp/cancel-1.c
index 896a76858bd..d26fcf1e226 100644
--- a/gcc/testsuite/c-c++-common/gomp/cancel-1.c
+++ b/gcc/testsuite/c-c++-common/gomp/cancel-1.c
@@ -455,3 +455,18 @@ f3 (void)
       }
     }
 }
+
+#pragma omp cancellation point /* { dg-error "expected declaration specifiers before end of line" } */
+
+void
+f4 (void)
+{
+  if (0)
+#pragma omp cancellation EKAHI /* { dg-error "expected .point. before .EKAHI." } */
+    ;
+#pragma omp cancellation HO OKAHI /* { dg-error "expected .point. before .HO." } */
+  if (0)
+#pragma omp cancellation point /* { dg-error ".pragma omp cancellation point. may only be used in compound statements" } */
+    ;
+#pragma omp cancellation point /* { dg-error ".pragma omp cancellation point. must specify one of" } */
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/pr70869.C b/gcc/testsuite/g++.dg/cpp0x/pr70869.C
new file mode 100644
index 00000000000..84c532b6772
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/pr70869.C
@@ -0,0 +1,25 @@
+// PR c++/70869
+// { dg-do run { target c++11 } }
+
+#include <initializer_list>
+
+struct A
+{
+  int f () { return 1; }
+  int g () { return 2; }
+  int h () { return 3; }
+};
+
+int
+main ()
+{
+  int cnt = 0;
+  for (const auto &m : { &A::f, &A::g, &A::h })
+    {
+      A a;
+      if ((a.*m) () != ++cnt)
+	__builtin_abort ();
+    }
+  if (cnt != 3)
+    __builtin_abort ();
+}
diff --git a/gcc/testsuite/g++.dg/cpp0x/pr71054.C b/gcc/testsuite/g++.dg/cpp0x/pr71054.C
new file mode 100644
index 00000000000..518bafcbd21
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/pr71054.C
@@ -0,0 +1,21 @@
+// PR c++/71054
+// { dg-do compile { target c++11 } }
+
+#include <initializer_list>
+
+template <typename D, typename T = decltype (&D::U)>
+struct S
+{
+  struct A
+  {
+    int a;
+    int b;
+    T p;
+  };
+  S () { std::initializer_list<A> a{ {0, 0, &D::V} }; }
+};
+struct R {
+  void V (int);
+  void U (int);
+};
+S<R> b;
diff --git a/gcc/testsuite/g++.dg/cpp0x/pr71739.C b/gcc/testsuite/g++.dg/cpp0x/pr71739.C
new file mode 100644
index 00000000000..b31a580cd0e
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/pr71739.C
@@ -0,0 +1,5 @@
+// PR c++/71739
+// { dg-do compile { target c++11 } }
+
+template <int N> struct alignas(N) A;
+template <int N> struct alignas(N) A {};
diff --git a/gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C b/gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C
index 397b9a89957..6928d6bcbd8 100644
--- a/gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C
+++ b/gcc/testsuite/g++.dg/cpp1y/feat-cxx11.C
@@ -77,10 +77,10 @@
 #  error "__cpp_attributes != 200809"
 #endif
 
-#ifndef __cpp_rvalue_reference
-#  error "__cpp_rvalue_reference"
-#elif __cpp_rvalue_reference != 200610
-#  error "__cpp_rvalue_reference != 200610"
+#ifndef __cpp_rvalue_references
+#  error "__cpp_rvalue_references"
+#elif __cpp_rvalue_references != 200610
+#  error "__cpp_rvalue_references != 200610"
 #endif
 
 #ifndef __cpp_variadic_templates
diff --git a/gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C b/gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C
index fa59f90fa89..dc30a9b3cf8 100644
--- a/gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C
+++ b/gcc/testsuite/g++.dg/cpp1y/feat-cxx14.C
@@ -70,10 +70,10 @@
 #  error "__cpp_attributes != 200809"
 #endif
 
-#ifndef __cpp_rvalue_reference
-#  error "__cpp_rvalue_reference"
-#elif __cpp_rvalue_reference != 200610
-#  error "__cpp_rvalue_reference != 200610"
+#ifndef __cpp_rvalue_references
+#  error "__cpp_rvalue_references"
+#elif __cpp_rvalue_references != 200610
+#  error "__cpp_rvalue_references != 200610"
 #endif
 
 #ifndef __cpp_variadic_templates
diff --git a/gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C b/gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C
index 886b3d3df10..5fbffabd139 100644
--- a/gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C
+++ b/gcc/testsuite/g++.dg/cpp1y/feat-cxx98-neg.C
@@ -42,8 +42,8 @@
 #  error "__cpp_attributes" // { dg-error "error" }
 #endif
 
-#ifndef __cpp_rvalue_reference
-#  error "__cpp_rvalue_reference" // { dg-error "error" }
+#ifndef __cpp_rvalue_references
+#  error "__cpp_rvalue_references" // { dg-error "error" }
 #endif
 
 #ifndef __cpp_variadic_templates
diff --git a/gcc/testsuite/g++.dg/cpp1z/eval-order1.C b/gcc/testsuite/g++.dg/cpp1z/eval-order1.C
deleted file mode 100644
index 278990d6f8e..00000000000
--- a/gcc/testsuite/g++.dg/cpp1z/eval-order1.C
+++ /dev/null
@@ -1,21 +0,0 @@
-// P0145R2: Refining Expression Order for C++
-// { dg-do run }
-// { dg-options "-std=c++1z" }
-
-extern "C" int printf (const char *, ...);
-void sink(...) { }
-
-int last = 0;
-int f(int i)
-{
-  if (i < last)
-    __builtin_abort ();
-  last = i;
-  return i;
-}
-
-int main()
-{
-  sink(f(1), f(2));
-  sink(f(3), f(4), f(5));
-}
diff --git a/gcc/testsuite/g++.dg/cpp1z/eval-order3.C b/gcc/testsuite/g++.dg/cpp1z/eval-order3.C
index 15df9038107..e87dce4006c 100644
--- a/gcc/testsuite/g++.dg/cpp1z/eval-order3.C
+++ b/gcc/testsuite/g++.dg/cpp1z/eval-order3.C
@@ -1,6 +1,6 @@
 // P0145R2: Refining Expression Order for C++
 // { dg-do run }
-// { dg-options "-std=c++1z -fargs-in-order=1" }
+// { dg-options "-std=c++1z" }
 
 extern "C" int printf (const char *, ...);
 void sink(...) { }
@@ -31,6 +31,13 @@ struct A
   A& operator+=(int i) { return *this; }
 };
 
+struct B
+{
+  int _i;
+  B(): _i(0) {}
+  B(int i): _i(f(i)) { }
+};
+
 int operator>>(A&, int i) { }
 
 A a(0);
@@ -46,6 +53,18 @@ A& aref(int i)
   return a;
 }
 
+B b;
+B bval(int i)
+{
+  return B(i);
+}
+
+B& bref(int i)
+{
+  f(i);
+  return b;
+}
+
 static int si;
 int* ip (int i)
 {
@@ -84,10 +103,18 @@ template <class T> void f()
 
   // b @= a
   aref(19)=A(18);
-  //iref(21)=f(20);
+  iref(21)=f(20);
   aref(23)+=f(22);
+  bref(25)=bval(24);
+  (f(27), b) = bval(26);
   last = 0;
 
+  int ar[4] = {};
+  int i = 0;
+  ar[i++] = i;
+  if (ar[0] != 0)
+    __builtin_abort();
+
   // a[b]
   afn(20)[f(21)-21].memfn(f(22),23);
   ip(24)[f(25)-25] = 0;
@@ -123,10 +150,18 @@ void g()
 
   // b @= a
   aref(19)=A(18);
-  //iref(21)=f(20);
+  iref(21)=f(20);
   aref(23)+=f(22);
+  bref(25)=bval(24);
+  (f(27), b) = bval(26);
   last = 0;
 
+  int ar[4] = {};
+  int i = 0;
+  ar[i++] = i;
+  if (ar[0] != 0)
+    __builtin_abort();
+
   // a[b]
   afn(20)[f(21)-21].memfn(f(22),23);
   ip(24)[f(25)-25] = 0;
diff --git a/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C b/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
index f8a87a8ddc3..c7becc1cbb4 100644
--- a/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
+++ b/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
@@ -58,10 +58,10 @@
 #  error "__cpp_attributes != 200809"
 #endif
 
-#ifndef __cpp_rvalue_reference
-#  error "__cpp_rvalue_reference"
-#elif __cpp_rvalue_reference != 200610
-#  error "__cpp_rvalue_reference != 200610"
+#ifndef __cpp_rvalue_references
+#  error "__cpp_rvalue_references"
+#elif __cpp_rvalue_references != 200610
+#  error "__cpp_rvalue_references != 200610"
 #endif
 
 #ifndef __cpp_variadic_templates
diff --git a/gcc/testsuite/g++.dg/debug/pr71432.C b/gcc/testsuite/g++.dg/debug/pr71432.C
index 63563310a3a..14e5a38b5c1 100644
--- a/gcc/testsuite/g++.dg/debug/pr71432.C
+++ b/gcc/testsuite/g++.dg/debug/pr71432.C
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fcompare-debug" } */
+/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */
 
 namespace std
 {
diff --git a/gcc/testsuite/g++.dg/header.C b/gcc/testsuite/g++.dg/header.C
new file mode 100644
index 00000000000..41a6dcbef3f
--- /dev/null
+++ b/gcc/testsuite/g++.dg/header.C
@@ -0,0 +1,9 @@
+/* This really should use "dg-do compile" without the -S in dg-options,
+   but the extra options get put after the input file in that case, and
+   hence the test would fail. */
+/* { dg-do assemble } */
+/* { dg-options "-S -x c++-header" } */
+
+struct s {
+	unsigned field;
+};
diff --git a/gcc/testsuite/g++.dg/parse/error5.C b/gcc/testsuite/g++.dg/parse/error5.C
index eb1f9c730a8..d14a47664b8 100644
--- a/gcc/testsuite/g++.dg/parse/error5.C
+++ b/gcc/testsuite/g++.dg/parse/error5.C
@@ -13,7 +13,7 @@ class Foo { int foo() return 0; } };
 // need make cp_parser_error() report more accurate column numbers.
 // { dg-error "30:expected '\{' at end of input" "brace" { target *-*-* } 4 }
 
-// { dg-error "33:expected ';' after class definition" "semicolon" {target *-*-* } 4 }
+// { dg-error "34:expected ';' after class definition" "semicolon" {target *-*-* } 4 }
 
 // { dg-error "35:expected declaration before '\}' token" "declaration" {target *-*-* } 4 }
 
diff --git a/gcc/testsuite/g++.dg/pr62314-2.C b/gcc/testsuite/g++.dg/pr62314-2.C
new file mode 100644
index 00000000000..deb0cb7b69d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr62314-2.C
@@ -0,0 +1,22 @@
+// { dg-options "-fdiagnostics-show-caret" }
+
+template<class T>
+class a {} // { dg-error "11: expected .;. after class definition" }
+class temp {};
+a<temp> b;
+struct b {
+} // { dg-error "2: expected .;. after struct definition" }
+
+/* Verify that we emit fixit hints.  */
+
+/* { dg-begin-multiline-output "" }
+ class a {}
+           ^
+           ;
+   { dg-end-multiline-output "" } */
+
+/* { dg-begin-multiline-output "" }
+ }
+  ^
+  ;
+   { dg-end-multiline-output "" } */
diff --git a/gcc/testsuite/g++.dg/pr71624.C b/gcc/testsuite/g++.dg/pr71624.C
new file mode 100644
index 00000000000..94a75cd4c41
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr71624.C
@@ -0,0 +1,35 @@
+/* PR71624 */
+// { dg-do compile { target i?86-*-* x86_64-*-* } }
+/* { dg-options "-fcheck-pointer-bounds -mmpx -O2" } */
+
+class c1
+{
+public:
+  virtual int fn1 () const;
+  int fn2 (const int *) const;
+};
+
+class c2
+{
+  int fn1 ();
+  c1 obj;
+};
+
+int
+c1::fn1 () const
+{
+  return 0;
+}
+
+int
+c1::fn2 (const int *) const
+{
+  return this->fn1 ();
+}
+
+int
+c2::fn1 ()
+{
+  return obj.fn2 (0);
+}
+
diff --git a/gcc/testsuite/g++.dg/pr71655.C b/gcc/testsuite/g++.dg/pr71655.C
new file mode 100644
index 00000000000..8ed33711c36
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr71655.C
@@ -0,0 +1,28 @@
+// PR tree-optimization/71655
+// { dg-do compile }
+// { dg-options "-O3 -std=c++11" }
+// { dg-additional-options "-msse4" { target i?86-*-* x86_64-*-* } }
+
+#include <functional>
+#include <valarray>
+extern int var_16, le_s5, le_s6, le_s9;
+std::array<std::array<std::array<long, 8>, 4>, 24> v4;
+extern std::array<std::array<int, 48>, 18> v15;
+
+void fn1() {
+  for (int k0 = 0;;)
+    for (int i1 = 0;;)
+      for (int j1 = 0; j1 < le_s9; j1 = j1 + 1) {
+	std::valarray<std::valarray<short>> v15_;
+        for (; le_s5;) {
+	  std::array<std::array<std::array<int, 3>, 48>, 18> v16;
+          for (int k2 = 0;; k2 = 1)
+            for (int l2 = 2; l2 < 6; l2 = l2 + 1)
+              for (int k3 = 0; le_s6;)
+                for (int i4 = 0; i4 < le_s9; i4 = i4 + 1)
+                  *(i4 + (*v16.begin())[k3].begin()) =
+		    (v15[k2][l2] || var_16) >
+		    unsigned(i1 <= (*v4.begin()).at(k0).at(j1));
+        }
+      }
+}
diff --git a/gcc/testsuite/g++.dg/torture/pr71002.C b/gcc/testsuite/g++.dg/torture/pr71002.C
index 8a726809217..666da0215a1 100644
--- a/gcc/testsuite/g++.dg/torture/pr71002.C
+++ b/gcc/testsuite/g++.dg/torture/pr71002.C
@@ -16,11 +16,6 @@ struct long_t
   char* pointer;
 };
 
-union long_raw_t {
-  unsigned char data[sizeof(long_t)];
-  struct __attribute__((aligned(alignof(long_t)))) { } align;
-};
-
 struct short_header
 {
   unsigned char is_short : 1;
@@ -35,20 +30,20 @@ struct short_t
 
 union repr_t
 {
-  long_raw_t  r;
+  long_t      r;
   short_t     s;
 
   const short_t& short_repr() const
   { return s; }
 
   const long_t& long_repr() const
-  { return *static_cast<const long_t*>(static_cast<const void*>(&r)); }
+  { return r; }
 
   short_t& short_repr()
   { return s;  }
 
   long_t& long_repr()
-  { return *static_cast<long_t*>(static_cast<void*>(&r)); }
+  { return r; }
 };
 
 class string
diff --git a/gcc/testsuite/g++.dg/vect/pr70729.cc b/gcc/testsuite/g++.dg/vect/pr70729.cc
new file mode 100644
index 00000000000..0d5d353faeb
--- /dev/null
+++ b/gcc/testsuite/g++.dg/vect/pr70729.cc
@@ -0,0 +1,78 @@
+// { dg-do compile }
+// { dg-require-effective-target vect_simd_clones }
+// { dg-additional-options "-Ofast" }
+// { dg-additional-options "-mavx2 -fopenmp-simd" { target x86_64-*-* i?86-*-* } }
+
+
+#include <string.h>
+#include <xmmintrin.h>
+
+inline void* my_alloc(size_t bytes) {return _mm_malloc(bytes, 128);}
+inline void my_free(void* memory) {_mm_free(memory);}
+
+template <typename T>
+class Vec
+{
+  const int isize;
+	T* data;
+
+public:
+
+  Vec (int n) : isize(n) {data = (T*)my_alloc(isize*sizeof(T));}
+  ~Vec () {my_free(data);}
+
+  Vec& operator = (const Vec& other)	
+    {
+      if (this != &other)
+	memcpy(data, other.data, isize*sizeof(T));
+      return *this;
+    }
+
+  T& operator [] (int i) {return data[i];}
+  const T& operator [] (int i) const {return data[i];}
+  T& at (int i)  {return data[i];}
+  const T& at (int i) const {return data[i];}
+
+  operator T* ()  {return data;}
+  int size () const {return isize;}
+};
+
+template <typename T>                                  
+class Cl
+{
+public:
+
+  Cl (int n, int m);
+  const int N, M;
+  Vec<T> v_x, v_y;
+  Vec<int> v_i;
+  Vec<float> v_z;
+};
+
+struct Ss
+{
+    const int S_n, S_m;
+    Cl<float> v1;
+    float* C1;
+    float* C2;
+    Ss (int n1, int n2): S_n(n1), S_m(n2), v1(n1, n2)
+      {
+	C1 = new float[n1 * 3];
+	C2 = new float[n2 * 4]; 
+      }
+
+    ~Ss () { delete C1; delete C2;}
+   void foo (float *in, float w);
+};
+void Ss::foo (float *in, float w)
+{
+#pragma omp simd
+  for (int i=0; i<S_n; i++)
+    {
+      float w1 = C2[S_n + i] * w;
+      v1.v_i[i] += (int)w1;
+      C1[S_n + i] += w1;
+    }
+}
+ 
+// { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } }
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr69102.c b/gcc/testsuite/gcc.c-torture/compile/pr69102.c
index 1f0cdc695bf..5c8c541efa7 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr69102.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr69102.c
@@ -1,5 +1,6 @@
 /* { dg-options "-Og -fPIC -fschedule-insns2 -fselective-scheduling2 -fno-tree-fre --param=max-sched-extend-regions-iters=10" } */
 /* { dg-require-effective-target scheduling } */
+/* { dg-require-effective-target fpic } */
 void bar (unsigned int);
 
 void
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr71693.c b/gcc/testsuite/gcc.c-torture/compile/pr71693.c
new file mode 100644
index 00000000000..fc9249c922c
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr71693.c
@@ -0,0 +1,10 @@
+/* PR middle-end/71693 */
+
+unsigned short v;
+
+void
+foo (int x)
+{
+  v = ((((unsigned short) (0x0001 | (x & 0x0070) | 0x0100) & 0x00ffU) << 8)
+       | (((unsigned short) (0x0001 | (x & 0x0070) | 0x0100) >> 8) & 0x00ffU));
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71626-1.c b/gcc/testsuite/gcc.c-torture/execute/pr71626-1.c
new file mode 100644
index 00000000000..26cfa9650e0
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71626-1.c
@@ -0,0 +1,19 @@
+/* PR middle-end/71626 */
+
+typedef __INTPTR_TYPE__ V __attribute__((__vector_size__(sizeof (__INTPTR_TYPE__))));
+
+__attribute__((noinline, noclone)) V
+foo ()
+{
+  V v = { (__INTPTR_TYPE__) foo };
+  return v;
+}
+
+int
+main ()
+{
+  V v = foo ();
+  if (v[0] != (__INTPTR_TYPE__) foo)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr71626-2.c b/gcc/testsuite/gcc.c-torture/execute/pr71626-2.c
new file mode 100644
index 00000000000..4a27c54fbf3
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr71626-2.c
@@ -0,0 +1,4 @@
+/* PR middle-end/71626 */
+/* { dg-additional-options "-fpic" { target fpic } } */
+
+#include "pr71626-1.c"
diff --git a/gcc/testsuite/gcc.dg/asr_div1.c b/gcc/testsuite/gcc.dg/asr_div1.c
index bf374b82c3f..f808db3296a 100644
--- a/gcc/testsuite/gcc.dg/asr_div1.c
+++ b/gcc/testsuite/gcc.dg/asr_div1.c
@@ -1,6 +1,7 @@
 /* Test division by const int generates only one shift.  */
 /* { dg-do run } */
 /* { dg-options "-O2 -fdump-rtl-combine-all" } */
+/* { dg-options "-O2 -fdump-rtl-combine-all -mtune=cortex-a53" { target aarch64*-*-* } } */
 /* { dg-require-effective-target int32plus } */
 
 extern void abort (void);
diff --git a/gcc/testsuite/gcc.dg/bss.c b/gcc/testsuite/gcc.dg/bss.c
new file mode 100644
index 00000000000..af8d0c634fe
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/bss.c
@@ -0,0 +1,8 @@
+/* Test non-zero initializers in .bss-like sections get properly refused.  */
+/* { dg-do compile } */
+/* { dg-require-named-sections "" } */
+
+int __attribute__((section(".bss.local"))) x = 1; /* { dg-error "" "zero init" } */
+int *__attribute__((section(".bss.local"))) px = &x; /* { dg-error "" "zero init" } */
+int __attribute__((section(".bss.local"))) y = 0;
+int *__attribute__((section(".bss.local"))) py = (void*)0;
diff --git a/gcc/testsuite/gcc.dg/const-float128-ped.c b/gcc/testsuite/gcc.dg/const-float128-ped.c
index 6a6b6223ce2..c1869cc43f3 100644
--- a/gcc/testsuite/gcc.dg/const-float128-ped.c
+++ b/gcc/testsuite/gcc.dg/const-float128-ped.c
@@ -1,5 +1,7 @@
 /* Test 'q' suffix with -pedantic on __float128 type constants.  */
-/* { dg-do compile { target ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-do compile } */
+/* { dg-require-effective-target __float128 } */
 /* { dg-options "-pedantic" } */
+/* { dg-add-options __float128 } */
 
 __float128 a = 123.456789q; /* { dg-warning "non-standard suffix on floating constant" } */
diff --git a/gcc/testsuite/gcc.dg/const-float128.c b/gcc/testsuite/gcc.dg/const-float128.c
index 116e4597b44..15394b483fc 100644
--- a/gcc/testsuite/gcc.dg/const-float128.c
+++ b/gcc/testsuite/gcc.dg/const-float128.c
@@ -1,6 +1,8 @@
 /* Test 'q' and 'Q' suffixes on __float128 type constants.  */
-/* { dg-do compile { target ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-do compile } */
+/* { dg-require-effective-target __float128 } */
 /* { dg-options "" } */
+/* { dg-add-options __float128 } */
 
 __float128 a = 123.456789q;
 __float128 b = 123.456789Q;
diff --git a/gcc/testsuite/gcc.dg/header.c b/gcc/testsuite/gcc.dg/header.c
new file mode 100644
index 00000000000..3241a963442
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/header.c
@@ -0,0 +1,9 @@
+/* This really should use "dg-do compile" without the -S in dg-options,
+   but the extra options get put after the input file in that case, and
+   hence the test would fail. */
+/* { dg-do assemble } */
+/* { dg-options "-S -x c-header" } */
+
+struct s {
+	unsigned field;
+};
diff --git a/gcc/testsuite/gcc.dg/init-bad-9.c b/gcc/testsuite/gcc.dg/init-bad-9.c
new file mode 100644
index 00000000000..035d34940dd
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/init-bad-9.c
@@ -0,0 +1,12 @@
+/* PR c/71552 - Confusing error for incorrect struct initialization */
+/* { dg-do compile } */
+
+struct A { void *p; };
+struct B { struct A *p; };
+struct A a;
+
+/* Verify that the initializer is diagnosed for its incompatibility
+   with the type of the object being initialized, not for its lack
+   of constness (which is a lesser problem).  */
+struct B b = { a };   /* { dg-error "incompatible types when initializing" } */
+struct B *p = a;      /* { dg-error "incompatible types when initializing" } */
diff --git a/gcc/testsuite/gcc.dg/pr71518.c b/gcc/testsuite/gcc.dg/pr71518.c
new file mode 100644
index 00000000000..6240ca8f2bf
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71518.c
@@ -0,0 +1,25 @@
+/* PR tree-optimization/71518 */
+/* { dg-options "-O3" } */
+
+int a, *b[9], c, d, e; 
+
+static int
+fn1 ()
+{
+  for (c = 6; c >= 0; c--)
+    for (d = 0; d < 2; d++)
+      {
+        b[d * 2 + c] = 0;
+        e = a > 1 ? : 0;
+        if (e == 2) 
+          return 0;
+      }
+  return 0;
+}
+
+int
+main ()
+{
+  fn1 ();
+  return 0; 
+}
diff --git a/gcc/testsuite/gcc.dg/pr71585-2.c b/gcc/testsuite/gcc.dg/pr71585-2.c
new file mode 100644
index 00000000000..c3010daf494
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71585-2.c
@@ -0,0 +1,23 @@
+/* Test that stack protection is done on chosen functions. */
+
+/* { dg-do compile { target i?86-*-* x86_64-*-* rs6000-*-* s390x-*-* } } */
+/* { dg-options "-O2 -fstack-protector-all" } */
+
+/* This test checks the presence of __stack_chk_fail function in assembler.
+ * Compiler generates _stack_chk_fail_local (wrapper) calls instead for PIC.
+ */
+/* { dg-require-effective-target nonpic } */
+
+static int foo()
+{
+  return 0;
+}
+
+#pragma GCC push_options
+#pragma GCC optimize ("-fno-stack-protector")
+
+int main() { foo (); }
+
+#pragma GCC pop_options
+
+/* { dg-final { scan-assembler-times "stack_chk_fail" 0 } } */
diff --git a/gcc/testsuite/gcc.dg/pr71585-3.c b/gcc/testsuite/gcc.dg/pr71585-3.c
new file mode 100644
index 00000000000..56329156312
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71585-3.c
@@ -0,0 +1,24 @@
+/* Test that stack protection is done on chosen functions. */
+
+/* { dg-do compile { target i?86-*-* x86_64-*-* rs6000-*-* s390x-*-* } } */
+/* { dg-options "-O2 -fstack-protector-all" } */
+
+/* This test checks the presence of __stack_chk_fail function in assembler.
+ * Compiler generates _stack_chk_fail_local (wrapper) calls instead for PIC.
+ */
+/* { dg-require-effective-target nonpic } */
+
+
+#pragma GCC push_options
+#pragma GCC optimize ("-fno-stack-protector")
+
+int foo()
+{
+  return 0;
+}
+
+#pragma GCC pop_options
+
+int main() { foo (); }
+
+/* { dg-final { scan-assembler-times "stack_chk_fail" 1 } } */
diff --git a/gcc/testsuite/gcc.dg/pr71585.c b/gcc/testsuite/gcc.dg/pr71585.c
new file mode 100644
index 00000000000..444aaa1c35f
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71585.c
@@ -0,0 +1,23 @@
+/* Test that stack protection is done on chosen functions. */
+
+/* { dg-do compile { target i?86-*-* x86_64-*-* rs6000-*-* s390x-*-* } } */
+/* { dg-options "-O2 -fstack-protector-all" } */
+
+/* This test checks the presence of __stack_chk_fail function in assembler.
+ * Compiler generates _stack_chk_fail_local (wrapper) calls instead for PIC.
+ */
+/* { dg-require-effective-target nonpic } */
+
+#pragma GCC push_options
+
+#pragma GCC optimize ("-fno-stack-protector")
+__attribute__((constructor)) void foo()
+{
+  asm ("");
+}
+
+#pragma GCC pop_options
+
+int main() { return 0; }
+
+/* { dg-final { scan-assembler-times "stack_chk_fail" 1 } } */
diff --git a/gcc/testsuite/gcc.dg/pr71685.c b/gcc/testsuite/gcc.dg/pr71685.c
new file mode 100644
index 00000000000..80e5c8f5902
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr71685.c
@@ -0,0 +1,6 @@
+/* PR c/71685 */
+/* { dg-do compile } */
+/* { dg-options "-std=gnu11" } */
+
+extern struct S v, s;
+struct S { int t; int p[]; } v = { 4, 0 };
diff --git a/gcc/testsuite/gcc.dg/spellcheck-options-12.c b/gcc/testsuite/gcc.dg/spellcheck-options-12.c
new file mode 100644
index 00000000000..b5e65e54a39
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/spellcheck-options-12.c
@@ -0,0 +1,7 @@
+/* Verify that we don't include -Wno- variants for options marked
+   with RejectNegative when considering hints for misspelled options
+   (PR driver/71651).  */
+
+/* { dg-do compile } */
+/* { dg-options "-fno-stack-protector-explicit" } */
+/* { dg-error "unrecognized command line option .-fno-stack-protector-explicit.; did you mean .-fstack-protector-explicit.." "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.dg/spellcheck-params-2.c b/gcc/testsuite/gcc.dg/spellcheck-params-2.c
new file mode 100644
index 00000000000..27e293ffa60
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/spellcheck-params-2.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "--param does-not-resemble-anything=42" } */
+/* { dg-error "invalid --param name .does-not-resemble-anything."  "" { target *-*-* } 0 } */
+
diff --git a/gcc/testsuite/gcc.dg/spellcheck-params.c b/gcc/testsuite/gcc.dg/spellcheck-params.c
new file mode 100644
index 00000000000..1bb7bca6024
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/spellcheck-params.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "--param max-early-inliner-iteration=3" } */
+/* { dg-error "invalid --param name .max-early-inliner-iteration.; did you mean .max-early-inliner-iterations.?"  "" { target *-*-* } 0 } */
+
diff --git a/gcc/testsuite/gcc.dg/strlenopt-28.c b/gcc/testsuite/gcc.dg/strlenopt-28.c
new file mode 100644
index 00000000000..03fb01781bd
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/strlenopt-28.c
@@ -0,0 +1,59 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -fdump-tree-strlen" } */
+
+#include "strlenopt.h"
+
+volatile int v;
+
+size_t
+f1 (void)
+{
+  char a[30];
+  v += 1;
+  memcpy (a, "1234567", 8);
+  memcpy (a + 7, "89abcdefg", 10);
+  memcpy (a + 16, "h", 2);
+  return strlen (a);	// This strlen should be optimized into 17.
+}
+
+size_t
+f2 (void)
+{
+  char a[30];
+  v += 2;
+  strcpy (a, "1234567");
+  strcpy (a + 7, "89abcdefg");
+  strcpy (a + 16, "h");
+  return strlen (a);	// This strlen should be optimized into 17.
+}
+
+size_t
+f3 (char *a)
+{
+  v += 3;
+  memcpy (a, "1234567", 8);
+  memcpy (a + 7, "89abcdefg", 10);
+  memcpy (a + 16, "h", 2);
+  return strlen (a);	// This strlen should be optimized into 17.
+}
+
+size_t
+f4 (char *a)
+{
+  v += 4;
+  strcpy (a, "1234567");
+  strcpy (a + 7, "89abcdefg");
+  strcpy (a + 16, "h");
+  return strlen (a);	// This strlen should be optimized into 17.
+}
+
+int
+main ()
+{
+  char a[30];
+  if (f1 () != 17 || f2 () != 17 || f3 (a) != 17 || f4 (a) != 17)
+    abort ();
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "strlen \\(" 0 "strlen" } } */
diff --git a/gcc/testsuite/gcc.dg/strlenopt-29.c b/gcc/testsuite/gcc.dg/strlenopt-29.c
new file mode 100644
index 00000000000..fb4b4c9cc71
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/strlenopt-29.c
@@ -0,0 +1,27 @@
+/* PR tree-optimization/71707 */
+/* { dg-do run } */
+/* { dg-options "-O2 -fdump-tree-strlen" } */
+
+#include "strlenopt.h"
+
+char a[32];
+size_t b;
+
+__attribute__((noinline, noclone)) char *
+foo (void)
+{
+  char *p = memcpy (a, "a", 2) + 1;
+  memcpy (&a[1], "b", 2);
+  b = strlen (a) + strlen (&a[1]) + strlen (p);
+  return p;
+}
+
+int
+main ()
+{
+  if (foo () != &a[1] || b != 4)
+    abort ();
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "strlen \\(" 0 "strlen" } } */
diff --git a/gcc/testsuite/gcc.dg/torture/float128-cmp-invalid.c b/gcc/testsuite/gcc.dg/torture/float128-cmp-invalid.c
index 19998f48251..1f675efdd61 100644
--- a/gcc/testsuite/gcc.dg/torture/float128-cmp-invalid.c
+++ b/gcc/testsuite/gcc.dg/torture/float128-cmp-invalid.c
@@ -1,7 +1,10 @@
 /* Test for "invalid" exceptions from __float128 comparisons.  */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run } */
 /* { dg-options "" } */
+/* { dg-require-effective-target __float128 } */
+/* { dg-require-effective-target base_quadfloat_support } */
 /* { dg-require-effective-target fenv_exceptions } */
+/* { dg-add-options __float128 } */
 
 #include <fenv.h>
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/torture/float128-div-underflow.c b/gcc/testsuite/gcc.dg/torture/float128-div-underflow.c
index f721e562b8a..dc284dec6dc 100644
--- a/gcc/testsuite/gcc.dg/torture/float128-div-underflow.c
+++ b/gcc/testsuite/gcc.dg/torture/float128-div-underflow.c
@@ -1,7 +1,10 @@
 /* Test for spurious underflow from __float128 division.  */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run } */
 /* { dg-options "" } */
+/* { dg-require-effective-target __float128 } */
+/* { dg-require-effective-target base_quadfloat_support } */
 /* { dg-require-effective-target fenv_exceptions } */
+/* { dg-add-options __float128 } */
 
 #include <fenv.h>
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/torture/float128-extend-nan.c b/gcc/testsuite/gcc.dg/torture/float128-extend-nan.c
index 60f9bbe9435..65dc520af7f 100644
--- a/gcc/testsuite/gcc.dg/torture/float128-extend-nan.c
+++ b/gcc/testsuite/gcc.dg/torture/float128-extend-nan.c
@@ -1,7 +1,10 @@
 /* Test extensions to __float128 quiet signaling NaNs.  */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run } */
 /* { dg-options "-fsignaling-nans" } */
+/* { dg-require-effective-target __float128 } */
+/* { dg-require-effective-target base_quadfloat_support } */
 /* { dg-require-effective-target fenv_exceptions } */
+/* { dg-add-options __float128 } */
 
 #include <fenv.h>
 #include <float.h>
diff --git a/gcc/testsuite/gcc.dg/torture/float128-nan.c b/gcc/testsuite/gcc.dg/torture/float128-nan.c
index 6e0d4744a45..0ad043160a4 100644
--- a/gcc/testsuite/gcc.dg/torture/float128-nan.c
+++ b/gcc/testsuite/gcc.dg/torture/float128-nan.c
@@ -1,7 +1,10 @@
 /* Test __float128 NaN generation.  */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run } */
 /* { dg-require-effective-target fenv_exceptions } */
+/* { dg-require-effective-target __float128 } */
+/* { dg-require-effective-target base_quadfloat_support } */
 /* { dg-options "" } */
+/* { dg-add-options __float128 } */
 
 #include <fenv.h>
 #include <stdbool.h>
diff --git a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c
index 9990e190c60..b46acb39fd5 100644
--- a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c
+++ b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-2.c
@@ -1,9 +1,12 @@
 /* Test floating-point conversions.  __float128 type with TImode: bug
    53317.  */
 /* Origin: Joseph Myers <joseph@codesourcery.com> */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run } */
+/* { dg-require-effective-target __float128 } */
+/* { dg-require-effective-target base_quadfloat_support } */
 /* { dg-require-effective-target int128 } */
 /* { dg-options "" } */
+/* { dg-add-options __float128 } */
 
 extern void abort (void);
 extern void exit (int);
diff --git a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-3.c b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-3.c
index 944494d9bcc..fa6eb6b72bf 100644
--- a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-3.c
+++ b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode-3.c
@@ -1,8 +1,11 @@
 /* Test for correct rounding of conversions from __int128 to
    __float128.  */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run } */
+/* { dg-require-effective-target __float128 } */
+/* { dg-require-effective-target base_quadfloat_support } */
 /* { dg-require-effective-target int128 } */
 /* { dg-options "-frounding-math" } */
+/* { dg-add-options __float128 } */
 
 #include <fenv.h>
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode.c b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode.c
index 8318f8ad8ae..493dee892b0 100644
--- a/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode.c
+++ b/gcc/testsuite/gcc.dg/torture/fp-int-convert-float128-timode.c
@@ -1,7 +1,10 @@
 /* Test floating-point conversions.  __float128 type with TImode.  */
 /* Origin: Joseph Myers <joseph@codesourcery.com> */
-/* { dg-do run { target i?86-*-* x86_64-*-* ia64-*-* } } */
+/* { dg-do run } */
+/* { dg-require-effective-target __float128 } */
+/* { dg-require-effective-target base_quadfloat_support } */
 /* { dg-options "" } */
+/* { dg-add-options __float128 } */
 
 #include "fp-int-convert.h"
 
diff --git a/gcc/testsuite/gcc.dg/torture/pr71594.c b/gcc/testsuite/gcc.dg/torture/pr71594.c
new file mode 100644
index 00000000000..468a9f6891c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71594.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "--param max-rtl-if-conversion-insns=2" } */
+
+unsigned short a;
+int b, c;
+int *d;
+void fn1() {
+  *d = 24;
+  for (; *d <= 65;) {
+    unsigned short *e = &a;
+    b = (a &= 0 <= 0) < (c ?: (*e %= *d));
+    for (; *d <= 83;)
+      ;
+  }
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr71606.c b/gcc/testsuite/gcc.dg/torture/pr71606.c
new file mode 100644
index 00000000000..b0cc26ac771
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr71606.c
@@ -0,0 +1,11 @@
+_Complex a;
+void fn1 ();
+
+int main () {
+  fn1 (a);
+  return 0;
+}
+
+void fn1 (__complex__ long double p1) {
+  __imag__ p1 = 6.0L;
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-34.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-34.c
new file mode 100644
index 00000000000..9aadce6a6a3
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-34.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fdump-tree-cddce1" } */
+
+unsigned int
+foo (unsigned int eax)
+{
+  unsigned int edx = eax & 1;
+  edx ^= 1;
+  eax &= -2;
+  eax |= edx;
+  return eax;
+}
+
+/* { dg-final { scan-tree-dump-times " = " 1 "cddce1" } } */
+/* { dg-final { scan-tree-dump " = eax_\[0-9\]+\\(D\\) \\^ 1;" "cddce1" } } */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-14.c b/gcc/testsuite/gcc.dg/tree-ssa/scev-14.c
new file mode 100644
index 00000000000..d7865fea24a
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-14.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
+int a[100];
+void t(unsigned int n)
+{
+  unsigned int i;
+  for (i=0; i<n; i++)
+     a[i]++;
+}
+/* { dg-final { scan-tree-dump "Overflowness wrto loop niter:	No-overflow"  "ivopts" } } */
diff --git a/gcc/testsuite/gcc.dg/vect/group-no-gaps-1.c b/gcc/testsuite/gcc.dg/vect/group-no-gaps-1.c
new file mode 100644
index 00000000000..bcea180b2ff
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/group-no-gaps-1.c
@@ -0,0 +1,108 @@
+/* { dg-require-effective-target mmap } */
+
+#include <sys/mman.h>
+#include <stdio.h>
+
+#define COUNT 320
+#define MMAP_SIZE 0x20000
+#define ADDRESS1 0x1122000000
+#define ADDRESS2 (ADDRESS1 + MMAP_SIZE * 16)
+#define TYPE unsigned int
+
+#ifndef MAP_ANONYMOUS
+#define MAP_ANONYMOUS MAP_ANON
+#endif
+
+#define RHS0(B) b[B]
+#define RHS1(B) RHS0(B) + b[(B) + 1]
+#define RHS2(B) RHS1(B) + b[(B) + 2]
+#define RHS3(B) RHS2(B) + b[(B) + 3]
+#define RHS4(B) RHS3(B) + b[(B) + 4]
+#define RHS5(B) RHS4(B) + b[(B) + 5]
+#define RHS6(B) RHS5(B) + b[(B) + 6]
+#define RHS7(B) RHS6(B) + b[(B) + 7]
+
+#define LHS0(B) a[B]
+#define LHS1(B) LHS0(B) = a[(B) + 1]
+#define LHS2(B) LHS1(B) = a[(B) + 2]
+#define LHS3(B) LHS2(B) = a[(B) + 3]
+#define LHS4(B) LHS3(B) = a[(B) + 4]
+#define LHS5(B) LHS4(B) = a[(B) + 5]
+#define LHS6(B) LHS5(B) = a[(B) + 6]
+#define LHS7(B) LHS6(B) = a[(B) + 7]
+
+#define DEF_GROUP_SIZE(MULT, GAP, NO_GAP)			\
+  void __attribute__((noinline, noclone))			\
+  gap_load_##MULT (TYPE *__restrict a, TYPE *__restrict b)	\
+  {								\
+    for (int i = 0; i < COUNT; i++)				\
+      a[i] = RHS##GAP (i * MULT);				\
+  }								\
+  void __attribute__((noinline, noclone))			\
+  no_gap_load_##MULT (TYPE *__restrict a, TYPE *__restrict b)	\
+  {								\
+    for (int i = 0; i < COUNT; i++)				\
+      a[i] = RHS##NO_GAP (i * MULT);				\
+  }								\
+  void __attribute__((noinline, noclone))			\
+  gap_store_##MULT (TYPE *__restrict a, TYPE *__restrict b)	\
+  {								\
+    for (int i = 0; i < COUNT; i++)				\
+      LHS##GAP (i * MULT) = b[i];				\
+  }								\
+  void __attribute__((noinline, noclone))			\
+  no_gap_store_##MULT (TYPE *__restrict a, TYPE *__restrict b)	\
+  {								\
+    for (int i = 0; i < COUNT; i++)				\
+      LHS##NO_GAP (i * MULT) = b[i];				\
+  }
+
+#define USE_GROUP_SIZE(MULT)					\
+  gap_load_##MULT (end_x - COUNT, end_y - COUNT * MULT + 1);	\
+  no_gap_load_##MULT (end_x - COUNT, end_y - COUNT * MULT);	\
+  gap_store_##MULT (end_x - COUNT * MULT + 1, end_y - COUNT);	\
+  no_gap_store_##MULT (end_x - COUNT * MULT, end_y - COUNT)
+
+DEF_GROUP_SIZE (2, 0, 1)
+DEF_GROUP_SIZE (3, 1, 2)
+DEF_GROUP_SIZE (4, 2, 3)
+DEF_GROUP_SIZE (5, 3, 4)
+DEF_GROUP_SIZE (6, 4, 5)
+DEF_GROUP_SIZE (7, 5, 6)
+DEF_GROUP_SIZE (8, 6, 7)
+
+int
+main (void)
+{
+  void *x, *y;
+  TYPE *end_x, *end_y;
+
+  x = mmap ((void *) ADDRESS1, MMAP_SIZE, PROT_READ | PROT_WRITE,
+	    MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+  if (x == MAP_FAILED)
+    {
+      perror ("mmap");
+      return 1;
+    }
+
+  y = mmap ((void *) ADDRESS2, MMAP_SIZE, PROT_READ | PROT_WRITE,
+	    MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
+  if (y == MAP_FAILED)
+    {
+      perror ("mmap");
+      return 1;
+    }
+
+  end_x = (TYPE *) ((char *) x + MMAP_SIZE);
+  end_y = (TYPE *) ((char *) y + MMAP_SIZE);
+
+  USE_GROUP_SIZE (2);
+  USE_GROUP_SIZE (3);
+  USE_GROUP_SIZE (4);
+  USE_GROUP_SIZE (5);
+  USE_GROUP_SIZE (6);
+  USE_GROUP_SIZE (7);
+  USE_GROUP_SIZE (8);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/vect/pr71667.c b/gcc/testsuite/gcc.dg/vect/pr71667.c
new file mode 100644
index 00000000000..e7012efa882
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr71667.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-g" } */
+
+unsigned int mu;
+int pt;
+
+void
+qf (void)
+{
+  int gy;
+  long int vz;
+
+  for (;;)
+    {
+      for (gy = 0; gy < 80; ++gy)
+      {
+	vz = mu;
+	++mu;
+	pt = (vz != 0) && (pt != 0);
+      }
+      while (gy < 81)
+	while (gy < 83)
+	  {
+	    vz = (vz != 0) ? 0 : mu;
+	    ++gy;
+	  }
+      pt = vz;
+      ++mu;
+    }
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/pr63874.c b/gcc/testsuite/gcc.target/aarch64/pr63874.c
new file mode 100644
index 00000000000..1a745a038a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr63874.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-skip-if "Not applicable for mcmodel=large" { aarch64*-*-* }  { "-mcmodel=large" } { "" } } */
+
+extern void __attribute__((weak)) foo_weakref (void);
+void __attribute__((weak, noinline)) bar (void)
+{
+ return;
+}
+void (*f) (void);
+void (*g) (void);
+
+int
+main (void)
+{
+ f = &foo_weakref;
+ g = &bar;
+ return 0;
+}
+
+/* { dg-final { scan-assembler-not "adr*foo_weakref" } } */
+/* { dg-final { scan-assembler-not "\\.(word|xword)\tbar" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c
new file mode 100644
index 00000000000..96608ebb283
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vminmaxnm_1.c
@@ -0,0 +1,82 @@
+/* Test the `v[min|max]nm{q}_f*' AArch64 SIMD intrinsic.  */
+
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+#include "arm_neon.h"
+
+extern void abort ();
+
+#define CHECK(T, N, R, E) \
+  {\
+    int i = 0;\
+    for (; i < N; i++)\
+      if (* (T *) &R[i] != * (T *) &E[i])\
+	abort ();\
+  }
+
+int
+main (int argc, char **argv)
+{
+  float32x2_t f32x2_input1 = vdup_n_f32 (-1.0);
+  float32x2_t f32x2_input2 = vdup_n_f32 (0.0);
+  float32x2_t f32x2_exp_minnm  = vdup_n_f32 (-1.0);
+  float32x2_t f32x2_exp_maxnm  = vdup_n_f32 (0.0);
+  float32x2_t f32x2_ret_minnm  = vminnm_f32 (f32x2_input1, f32x2_input2);
+  float32x2_t f32x2_ret_maxnm  = vmaxnm_f32 (f32x2_input1, f32x2_input2);
+
+  CHECK (uint32_t, 2, f32x2_ret_minnm, f32x2_exp_minnm);
+  CHECK (uint32_t, 2, f32x2_ret_maxnm, f32x2_exp_maxnm);
+
+  f32x2_input1 = vdup_n_f32 (__builtin_nanf (""));
+  f32x2_input2 = vdup_n_f32 (1.0);
+  f32x2_exp_minnm  = vdup_n_f32 (1.0);
+  f32x2_exp_maxnm  = vdup_n_f32 (1.0);
+  f32x2_ret_minnm  = vminnm_f32 (f32x2_input1, f32x2_input2);
+  f32x2_ret_maxnm  = vmaxnm_f32 (f32x2_input1, f32x2_input2);
+
+  CHECK (uint32_t, 2, f32x2_ret_minnm, f32x2_exp_minnm);
+  CHECK (uint32_t, 2, f32x2_ret_maxnm, f32x2_exp_maxnm);
+
+  float32x4_t f32x4_input1 = vdupq_n_f32 (-1024.0);
+  float32x4_t f32x4_input2 = vdupq_n_f32 (77.0);
+  float32x4_t f32x4_exp_minnm  = vdupq_n_f32 (-1024.0);
+  float32x4_t f32x4_exp_maxnm  = vdupq_n_f32 (77.0);
+  float32x4_t f32x4_ret_minnm  = vminnmq_f32 (f32x4_input1, f32x4_input2);
+  float32x4_t f32x4_ret_maxnm  = vmaxnmq_f32 (f32x4_input1, f32x4_input2);
+
+  CHECK (uint32_t, 4, f32x4_ret_minnm, f32x4_exp_minnm);
+  CHECK (uint32_t, 4, f32x4_ret_maxnm, f32x4_exp_maxnm);
+
+  f32x4_input1 = vdupq_n_f32 (-__builtin_nanf (""));
+  f32x4_input2 = vdupq_n_f32 (-1.0);
+  f32x4_exp_minnm  = vdupq_n_f32 (-1.0);
+  f32x4_exp_maxnm  = vdupq_n_f32 (-1.0);
+  f32x4_ret_minnm  = vminnmq_f32 (f32x4_input1, f32x4_input2);
+  f32x4_ret_maxnm  = vmaxnmq_f32 (f32x4_input1, f32x4_input2);
+
+  CHECK (uint32_t, 4, f32x4_ret_minnm, f32x4_exp_minnm);
+  CHECK (uint32_t, 4, f32x4_ret_maxnm, f32x4_exp_maxnm);
+
+  float64x2_t f64x2_input1 = vdupq_n_f64 (1.23);
+  float64x2_t f64x2_input2 = vdupq_n_f64 (4.56);
+  float64x2_t f64x2_exp_minnm  = vdupq_n_f64 (1.23);
+  float64x2_t f64x2_exp_maxnm  = vdupq_n_f64 (4.56);
+  float64x2_t f64x2_ret_minnm  = vminnmq_f64 (f64x2_input1, f64x2_input2);
+  float64x2_t f64x2_ret_maxnm  = vmaxnmq_f64 (f64x2_input1, f64x2_input2);
+
+  CHECK (uint64_t, 2, f64x2_ret_minnm, f64x2_exp_minnm);
+  CHECK (uint64_t, 2, f64x2_ret_maxnm, f64x2_exp_maxnm);
+
+  f64x2_input1 = vdupq_n_f64 (-__builtin_nan (""));
+  f64x2_input2 = vdupq_n_f64 (1.0);
+  f64x2_exp_minnm  = vdupq_n_f64 (1.0);
+  f64x2_exp_maxnm  = vdupq_n_f64 (1.0);
+  f64x2_ret_minnm  = vminnmq_f64 (f64x2_input1, f64x2_input2);
+  f64x2_ret_maxnm  = vmaxnmq_f64 (f64x2_input1, f64x2_input2);
+
+  CHECK (uint64_t, 2, f64x2_ret_minnm, f64x2_exp_minnm);
+  CHECK (uint64_t, 2, f64x2_ret_maxnm, f64x2_exp_maxnm);
+
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c b/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c
new file mode 100644
index 00000000000..e144def8386
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vect_copy_lane_1.c
@@ -0,0 +1,86 @@
+/* { dg-do compile } */
+/* { dg-options "-O3" } */
+
+#include "arm_neon.h"
+
+#define BUILD_TEST(TYPE1, TYPE2, Q1, Q2, SUFFIX, INDEX1, INDEX2)	\
+TYPE1 __attribute__((noinline,noclone))					\
+test_copy##Q1##_lane##Q2##_##SUFFIX (TYPE1 a, TYPE2 b)			\
+{									\
+  return vcopy##Q1##_lane##Q2##_##SUFFIX (a, INDEX1, b, INDEX2);	\
+}
+
+/* vcopy_lane.  */
+BUILD_TEST (poly8x8_t, poly8x8_t, , , p8, 7, 6)
+BUILD_TEST (int8x8_t,  int8x8_t,  , , s8, 7, 6)
+BUILD_TEST (uint8x8_t, uint8x8_t, , , u8, 7, 6)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[6\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x4_t, , , p16, 3, 2)
+BUILD_TEST (int16x4_t,  int16x4_t,  , , s16, 3, 2)
+BUILD_TEST (uint16x4_t, uint16x4_t, , , u16, 3, 2)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[2\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0)
+BUILD_TEST (int32x2_t,   int32x2_t,   , , s32, 1, 0)
+BUILD_TEST (uint32x2_t,  uint32x2_t,  , , u32, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[0\\\]" 3 } } */
+BUILD_TEST (int64x1_t,   int64x1_t,   , , s64, 0, 0)
+BUILD_TEST (uint64x1_t,  uint64x1_t,  , , u64, 0, 0)
+BUILD_TEST (float64x1_t, float64x1_t, , , f64, 0, 0)
+/* { dg-final { scan-assembler-times "fmov\\td0, d1" 3 } } */
+
+/* vcopy_laneq.  */
+
+BUILD_TEST (poly8x8_t, poly8x16_t, , q, p8, 7, 15)
+BUILD_TEST (int8x8_t,  int8x16_t,  , q, s8, 7, 15)
+BUILD_TEST (uint8x8_t, uint8x16_t, , q, u8, 7, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x8_t, , q, p16, 3, 7)
+BUILD_TEST (int16x4_t,  int16x8_t,  , q, s16, 3, 7)
+BUILD_TEST (uint16x4_t, uint16x8_t, , q, u16, 3, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x4_t, , q, f32, 1, 3)
+BUILD_TEST (int32x2_t,   int32x4_t,   , q, s32, 1, 3)
+BUILD_TEST (uint32x2_t,  uint32x4_t,  , q, u32, 1, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[3\\\]" 3 } } */
+BUILD_TEST (float64x1_t, float64x2_t, , q, f64, 0, 1)
+BUILD_TEST (int64x1_t,  int64x2_t,    , q, s64, 0, 1)
+BUILD_TEST (uint64x1_t, uint64x2_t,   , q, u64, 0, 1)
+/* XFAIL due to PR 71307.  */
+/* { dg-final { scan-assembler-times "dup\\td0, v1.d\\\[1\\\]" 3 { xfail *-*-* } } } */
+
+/* vcopyq_lane.  */
+BUILD_TEST (poly8x16_t, poly8x8_t, q, , p8, 15, 7)
+BUILD_TEST (int8x16_t,  int8x8_t,  q, , s8, 15, 7)
+BUILD_TEST (uint8x16_t, uint8x8_t, q, , u8, 15, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[15\\\], v1.b\\\[7\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x4_t, q, , p16, 7, 3)
+BUILD_TEST (int16x8_t,  int16x4_t,  q, , s16, 7, 3)
+BUILD_TEST (uint16x8_t, uint16x4_t, q, , u16, 7, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[7\\\], v1.h\\\[3\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x2_t, q, , f32, 3, 1)
+BUILD_TEST (int32x4_t,   int32x2_t,   q, , s32, 3, 1)
+BUILD_TEST (uint32x4_t,  uint32x2_t,  q, , u32, 3, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[3\\\], v1.s\\\[1\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x1_t, q, , f64, 1, 0)
+BUILD_TEST (int64x2_t,   int64x1_t,   q, , s64, 1, 0)
+BUILD_TEST (uint64x2_t,  uint64x1_t,  q, , u64, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[0\\\]" 3 } } */
+
+/* vcopyq_laneq.  */
+
+BUILD_TEST (poly8x16_t, poly8x16_t, q, q, p8, 14, 15)
+BUILD_TEST (int8x16_t,  int8x16_t,  q, q, s8, 14, 15)
+BUILD_TEST (uint8x16_t, uint8x16_t, q, q, u8, 14, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[14\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x8_t, q, q, p16, 6, 7)
+BUILD_TEST (int16x8_t,  int16x8_t,  q, q, s16, 6, 7)
+BUILD_TEST (uint16x8_t, uint16x8_t, q, q, u16, 6, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[6\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x4_t, q, q, f32, 2, 3)
+BUILD_TEST (int32x4_t,   int32x4_t,   q, q, s32, 2, 3)
+BUILD_TEST (uint32x4_t,  uint32x4_t,  q, q, u32, 2, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[2\\\], v1.s\\\[3\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x2_t, q, q, f64, 1, 1)
+BUILD_TEST (int64x2_t,   int64x2_t,   q,  q, s64, 1, 1)
+BUILD_TEST (uint64x2_t,  uint64x2_t,  q, q, u64, 1, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[1\\\]" 3 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c b/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c
new file mode 100644
index 00000000000..07a77de3192
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/vget_set_lane_1.c
@@ -0,0 +1,72 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include "arm_neon.h"
+
+#define BUILD_TEST(TYPE1, TYPE2, Q1, Q2, SUFFIX, INDEX1, INDEX2)	\
+TYPE1 __attribute__((noinline,noclone))				\
+test_copy##Q1##_lane##Q2##_##SUFFIX (TYPE1 a, TYPE2 b)			\
+{									\
+  return vset##Q1##_lane_##SUFFIX (vget##Q2##_lane_##SUFFIX (b, INDEX2),\
+				    a, INDEX1);				\
+}
+
+BUILD_TEST (poly8x8_t, poly8x8_t, , , p8, 7, 6)
+BUILD_TEST (int8x8_t,  int8x8_t,  , , s8, 7, 6)
+BUILD_TEST (uint8x8_t, uint8x8_t, , , u8, 7, 6)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[6\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x4_t, , , p16, 3, 2)
+BUILD_TEST (int16x4_t,  int16x4_t,  , , s16, 3, 2)
+BUILD_TEST (uint16x4_t, uint16x4_t, , , u16, 3, 2)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[2\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x2_t, , , f32, 1, 0)
+BUILD_TEST (int32x2_t,   int32x2_t,   , , s32, 1, 0)
+BUILD_TEST (uint32x2_t,  uint32x2_t,  , , u32, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[0\\\]" 3 } } */
+
+BUILD_TEST (poly8x8_t, poly8x16_t, , q, p8, 7, 15)
+BUILD_TEST (int8x8_t,  int8x16_t,  , q, s8, 7, 15)
+BUILD_TEST (uint8x8_t, uint8x16_t, , q, u8, 7, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[7\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x4_t, poly16x8_t, , q, p16, 3, 7)
+BUILD_TEST (int16x4_t,  int16x8_t,  , q, s16, 3, 7)
+BUILD_TEST (uint16x4_t, uint16x8_t, , q, u16, 3, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[3\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x2_t, float32x4_t, , q, f32, 1, 3)
+BUILD_TEST (int32x2_t,   int32x4_t,   , q, s32, 1, 3)
+BUILD_TEST (uint32x2_t,  uint32x4_t,  , q, u32, 1, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[1\\\], v1.s\\\[3\\\]" 3 } } */
+
+BUILD_TEST (poly8x16_t, poly8x8_t, q, , p8, 15, 7)
+BUILD_TEST (int8x16_t,  int8x8_t,  q, , s8, 15, 7)
+BUILD_TEST (uint8x16_t, uint8x8_t, q, , u8, 15, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[15\\\], v1.b\\\[7\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x4_t, q, , p16, 7, 3)
+BUILD_TEST (int16x8_t,  int16x4_t,  q, , s16, 7, 3)
+BUILD_TEST (uint16x8_t, uint16x4_t, q, , u16, 7, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[7\\\], v1.h\\\[3\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x2_t, q, , f32, 3, 1)
+BUILD_TEST (int32x4_t,   int32x2_t,   q, , s32, 3, 1)
+BUILD_TEST (uint32x4_t,  uint32x2_t,  q, , u32, 3, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[3\\\], v1.s\\\[1\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x1_t, q, , f64, 1, 0)
+BUILD_TEST (int64x2_t,   int64x1_t,   q, , s64, 1, 0)
+BUILD_TEST (uint64x2_t,  uint64x1_t,  q, , u64, 1, 0)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[0\\\]" 3 } } */
+
+BUILD_TEST (poly8x16_t, poly8x16_t, q, q, p8, 14, 15)
+BUILD_TEST (int8x16_t,  int8x16_t,  q, q, s8, 14, 15)
+BUILD_TEST (uint8x16_t, uint8x16_t, q, q, u8, 14, 15)
+/* { dg-final { scan-assembler-times "ins\\tv0.b\\\[14\\\], v1.b\\\[15\\\]" 3 } } */
+BUILD_TEST (poly16x8_t, poly16x8_t, q, q, p16, 6, 7)
+BUILD_TEST (int16x8_t,  int16x8_t,  q, q, s16, 6, 7)
+BUILD_TEST (uint16x8_t, uint16x8_t, q, q, u16, 6, 7)
+/* { dg-final { scan-assembler-times "ins\\tv0.h\\\[6\\\], v1.h\\\[7\\\]" 3 } } */
+BUILD_TEST (float32x4_t, float32x4_t, q, q, f32, 2, 3)
+BUILD_TEST (int32x4_t,   int32x4_t,   q, q, s32, 2, 3)
+BUILD_TEST (uint32x4_t,  uint32x4_t,  q, q, u32, 2, 3)
+/* { dg-final { scan-assembler-times "ins\\tv0.s\\\[2\\\], v1.s\\\[3\\\]" 3 } } */
+BUILD_TEST (float64x2_t, float64x2_t, q, q, f64, 1, 1)
+BUILD_TEST (int64x2_t,   int64x2_t,   q,  q, s64, 1, 1)
+BUILD_TEST (uint64x2_t,  uint64x2_t,  q, q, u64, 1, 1)
+/* { dg-final { scan-assembler-times "ins\\tv0.d\\\[1\\\], v1.d\\\[1\\\]" 3 } } */
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
index 680a3b560d7..788079bc104 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect10.c
@@ -1,7 +1,8 @@
 /* Test AAPCS layout (VFP variant for Neon types) */
 
 /* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_neon_fp16_hw } */
 /* { dg-add-options arm_neon_fp16 } */
 
 #ifndef IN_FRAMEWORK
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
index fc2b13bf1b7..b42fdd23926 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/neon-vect9.c
@@ -1,7 +1,8 @@
 /* Test AAPCS layout (VFP variant for Neon types) */
 
 /* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_neon_fp16_hw } */
 /* { dg-add-options arm_neon_fp16 } */
 
 #ifndef IN_FRAMEWORK
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
index 225e9ce7c10..0745a82f5e8 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp18.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant)  */
 
 /* { dg-do run { target arm_eabi } }  */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
 
 #ifndef IN_FRAMEWORK
 #define VFP
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
index 8928b1562e9..950c1f6a6d4 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp19.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant)  */
 
-/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-do run { target arm_eabi } }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
 
 #ifndef IN_FRAMEWORK
 #define VFP
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
index 61f07049f2c..f898d4cebd7 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp20.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant)  */
 
-/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-do run { target arm_eabi } }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
 
 #ifndef IN_FRAMEWORK
 #define VFP
diff --git a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
index 15dff7d19f8..48bb59856e0 100644
--- a/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
+++ b/gcc/testsuite/gcc.target/arm/aapcs/vfp21.c
@@ -1,8 +1,9 @@
-/* Test AAPCS layout (VFP variant) */
+/* Test AAPCS layout (VFP variant)  */
 
-/* { dg-do run { target arm_eabi } } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard -mfp16-format=ieee" } */
+/* { dg-do run { target arm_eabi } }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
+/* { dg-require-effective-target arm_fp16_hw }  */
+/* { dg-add-options arm_fp16_ieee }  */
 
 #ifndef IN_FRAMEWORK
 #define VFP
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
index 5eab3e2ca78..9bf3fc07e7f 100644
--- a/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-1.c
@@ -1,17 +1,21 @@
 /* { dg-do compile }  */
+/* { dg-require-effective-target arm_hard_vfp_ok }  */
 /* { dg-require-effective-target arm_fp16_ok } */
-/* { dg-options "-mfp16-format=ieee -O2" }  */
-/* { dg-add-options arm_fp16 } */
+/* { dg-options "-O2" }  */
+/* { dg-add-options arm_fp16_ieee } */
 
-/* Test __fp16 arguments and return value in registers.  */
+/* Test __fp16 arguments and return value in registers (hard-float).  */
 
-__fp16 F (__fp16 a, __fp16 b, __fp16 c)
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
 {
-  if (a == b)
-    return c;
-  return a;
+  swap (b, a);
+  return c;
 }
 
-/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s0} 1 } }  */
-/* { dg-final { scan-assembler-times {vcvtb\.f32\.f16\ts[0-9]+, s1} 1 } }  */
-/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 1 } }  */
+/* { dg-final { scan-assembler-times {vmov\tr[0-9]+, s[0-2]} 2 } }  */
+/* { dg-final { scan-assembler-times {vmov.f32\ts1, s0} 1 } }  */
+/* { dg-final { scan-assembler-times {vmov\ts0, r[0-9]+} 2 } }  */
diff --git a/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
new file mode 100644
index 00000000000..4753e364a22
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fp16-aapcs-2.c
@@ -0,0 +1,21 @@
+/* { dg-do compile }  */
+/* { dg-require-effective-target arm_fp16_ok } */
+/* { dg-options "-mfloat-abi=softfp -O2" }  */
+/* { dg-add-options arm_fp16_ieee } */
+/* { dg-skip-if "incompatible float-abi" { arm*-*-* } { "-mfloat-abi=hard" } } */
+
+/* Test __fp16 arguments and return value in registers (softfp).  */
+
+void
+swap (__fp16, __fp16);
+
+__fp16
+F (__fp16 a, __fp16 b, __fp16 c)
+{
+  swap (b, a);
+  return c;
+}
+
+/* { dg-final { scan-assembler-times {mov\tr[0-9]+, r[0-2]} 3 } }  */
+/* { dg-final { scan-assembler-times {mov\tr1, r0} 1 } }  */
+/* { dg-final { scan-assembler-times {mov\tr0, r[0-9]+} 2 } }  */
diff --git a/gcc/testsuite/gcc.target/arm/neon/neon.exp b/gcc/testsuite/gcc.target/arm/neon/neon.exp
deleted file mode 100644
index d440fc0f059..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/neon.exp
+++ /dev/null
@@ -1,35 +0,0 @@
-# Copyright (C) 1997-2016 Free Software Foundation, Inc.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with GCC; see the file COPYING3.  If not see
-# <http://www.gnu.org/licenses/>.
-
-# GCC testsuite that uses the `dg.exp' driver.
-
-# Exit immediately if this isn't an ARM target.
-if ![istarget arm*-*-*] then {
-  return
-}
-
-# Load support procs.
-load_lib gcc-dg.exp
-
-# Initialize `dg'.
-dg-init
-
-# Main loop.
-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
-	"" ""
-
-# All done.
-dg-finish
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
deleted file mode 100644
index d2424d9c5b6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vraddhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
deleted file mode 100644
index a787bccf479..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vraddhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
deleted file mode 100644
index dde572c4457..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vraddhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
deleted file mode 100644
index 74098a9e547..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vraddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
deleted file mode 100644
index 4795f446dc7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vraddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
deleted file mode 100644
index d3a7e0b4ae5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRaddhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRaddhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vraddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
deleted file mode 100644
index d8da62725b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vrhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
deleted file mode 100644
index 6281ade30ca..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vrhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
deleted file mode 100644
index a558ca363d9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vrhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
deleted file mode 100644
index 06822c2ff11..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vrhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
deleted file mode 100644
index 713e70a2a6b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vrhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
deleted file mode 100644
index 64a912f25ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vrhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
deleted file mode 100644
index 8eb55045ec6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vrhadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
deleted file mode 100644
index a1acebd186f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vrhadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c b/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
deleted file mode 100644
index df7f58c33a0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vrhadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
deleted file mode 100644
index 215eb1597bd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vrhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
deleted file mode 100644
index 2d8d5fbf635..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vrhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
deleted file mode 100644
index 362a5464701..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRhaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRhaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vrhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
deleted file mode 100644
index 74bd3aaf091..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
deleted file mode 100644
index a6a9e4c2490..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
deleted file mode 100644
index 8201a04fb5a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
deleted file mode 100644
index 28d281f7670..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
deleted file mode 100644
index 66d278887e5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
deleted file mode 100644
index 4185fbe1769..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
deleted file mode 100644
index fb0eddd7129..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
deleted file mode 100644
index cee1b9e38fb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls16.c b/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
deleted file mode 100644
index ac7158adc15..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vrshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls32.c b/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
deleted file mode 100644
index 8da59185c1a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vrshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls64.c b/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
deleted file mode 100644
index 2e732ee12de..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vrshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshls8.c b/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
deleted file mode 100644
index f0c351d4850..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vrshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
deleted file mode 100644
index 1a7751b43ce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
deleted file mode 100644
index 198b13c4369..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
deleted file mode 100644
index 3f67aaaa4b6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
deleted file mode 100644
index 439948224a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
deleted file mode 100644
index a89842b4001..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vrshrq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
deleted file mode 100644
index 00ec911743b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vrshrq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
deleted file mode 100644
index 0b1851e7e00..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vrshrq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
deleted file mode 100644
index 80084d02dc6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrshrq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
deleted file mode 100644
index a24ea19a1a9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vrshrq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
deleted file mode 100644
index fa4e20da18f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrshrq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
deleted file mode 100644
index 9e61a6916ce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vrshrq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
deleted file mode 100644
index 3445c8dcd53..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrshrq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
deleted file mode 100644
index 5445d5945e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vrshr_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
deleted file mode 100644
index 8b3f60daead..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vrshr_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
deleted file mode 100644
index 1d3735a8795..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vrshr_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
deleted file mode 100644
index dc011d95380..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrshr_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
deleted file mode 100644
index 890c88664e3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vrshr_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
deleted file mode 100644
index 5994f6be64f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrshr_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
deleted file mode 100644
index 03047707dc9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vrshr_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
deleted file mode 100644
index 4df95c24b24..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshr_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshr_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrshr_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
deleted file mode 100644
index 7f423036c3d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vrshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
deleted file mode 100644
index 6c0559fc583..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vrshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
deleted file mode 100644
index 0f223c9377e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vrshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
deleted file mode 100644
index 12ba6252a02..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vrshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
deleted file mode 100644
index 8b2014f3485..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vrshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
deleted file mode 100644
index f3bf7566375..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vRshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vrshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
deleted file mode 100644
index 66e2ea0e974..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vrsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
deleted file mode 100644
index b6c3cb8f40d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vrsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
deleted file mode 100644
index 8d68b1ae89a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vrsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
deleted file mode 100644
index 413f49ef820..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vrsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
deleted file mode 100644
index d9e668011a7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vrsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
deleted file mode 100644
index 56ae88612a2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vrsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
deleted file mode 100644
index 2ce4af3bcc9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vrsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
deleted file mode 100644
index 53078a0464e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsraQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsraQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vrsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
deleted file mode 100644
index bc68117af1b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vrsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
deleted file mode 100644
index caeb45b22dc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vrsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
deleted file mode 100644
index b9ea8c88a43..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vrsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
deleted file mode 100644
index f32ae16bd5a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vrsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
deleted file mode 100644
index b6d2ccee8f9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vrsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
deleted file mode 100644
index 99c217b1909..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vrsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
deleted file mode 100644
index 6eaa2ae4302..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vrsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
deleted file mode 100644
index 6ae17f7e2e1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsra_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsra_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vrsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
deleted file mode 100644
index b0a5cb00957..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vrsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
deleted file mode 100644
index 31e01e0f20a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vrsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
deleted file mode 100644
index e1c8c9ec751..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vrsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
deleted file mode 100644
index 58368f444e5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vrsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
deleted file mode 100644
index edb7b4f4199..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vrsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
deleted file mode 100644
index 2b1c77f10a5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vRsubhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vRsubhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vrsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
deleted file mode 100644
index f0c69713434..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vabaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
deleted file mode 100644
index cc68f6f6034..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vabaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
deleted file mode 100644
index 7b1bfeb30ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vabaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
deleted file mode 100644
index 3b5ba07643e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vabaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
deleted file mode 100644
index cf526e9b7d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vabaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c b/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
deleted file mode 100644
index 484fb7fc79e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabaQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabaQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vabaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals16.c b/gcc/testsuite/gcc.target/arm/neon/vabals16.c
deleted file mode 100644
index 6617e2e68db..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabals16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabals16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vabal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals32.c b/gcc/testsuite/gcc.target/arm/neon/vabals32.c
deleted file mode 100644
index 2110dee6b48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabals32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabals32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vabal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabals8.c b/gcc/testsuite/gcc.target/arm/neon/vabals8.c
deleted file mode 100644
index c313a11a5a0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabals8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabals8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabals8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int16x8_t = vabal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu16.c b/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
deleted file mode 100644
index f43c8ed30c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabalu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabalu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vabal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu32.c b/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
deleted file mode 100644
index 12af07299ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabalu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabalu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vabal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabalu8.c b/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
deleted file mode 100644
index 05ba74760a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabalu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabalu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint16x8_t = vabal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas16.c b/gcc/testsuite/gcc.target/arm/neon/vabas16.c
deleted file mode 100644
index 9094ecb2a07..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabas16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabas16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabas16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vaba_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas32.c b/gcc/testsuite/gcc.target/arm/neon/vabas32.c
deleted file mode 100644
index 184fc9553ca..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabas32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabas32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabas32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vaba_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabas8.c b/gcc/testsuite/gcc.target/arm/neon/vabas8.c
deleted file mode 100644
index b9bc8130665..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabas8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabas8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabas8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vaba_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau16.c b/gcc/testsuite/gcc.target/arm/neon/vabau16.c
deleted file mode 100644
index d3b8c4ef6e2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabau16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabau16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabau16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vaba_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau32.c b/gcc/testsuite/gcc.target/arm/neon/vabau32.c
deleted file mode 100644
index 2c65f1b7269..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabau32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabau32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabau32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vaba_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabau8.c b/gcc/testsuite/gcc.target/arm/neon/vabau8.c
deleted file mode 100644
index 665410ced81..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabau8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vabau8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabau8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vaba_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
deleted file mode 100644
index 682736ff263..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vabdq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
deleted file mode 100644
index 37349e91f32..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vabdq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
deleted file mode 100644
index 961b4cab2a1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vabdq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
deleted file mode 100644
index b6d6eaf292e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vabdq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
deleted file mode 100644
index 1c86be1c6ed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vabdq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
deleted file mode 100644
index a263b65505c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vabdq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
deleted file mode 100644
index d217f48c43f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vabdq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdf32.c b/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
deleted file mode 100644
index 9454282c004..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vabd_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls16.c b/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
deleted file mode 100644
index 63ac7e3706d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vabdl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls32.c b/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
deleted file mode 100644
index 7d51343a2bf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vabdl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdls8.c b/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
deleted file mode 100644
index 0d9ac62a5ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vabdl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
deleted file mode 100644
index 6f19e672016..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdlu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vabdl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
deleted file mode 100644
index 0ec3f93f2ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdlu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vabdl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
deleted file mode 100644
index 0d981fae277..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdlu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vabdl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabdl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds16.c b/gcc/testsuite/gcc.target/arm/neon/vabds16.c
deleted file mode 100644
index a13ee8865c4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vabd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds32.c b/gcc/testsuite/gcc.target/arm/neon/vabds32.c
deleted file mode 100644
index fdbfdb656c2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vabd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabds8.c b/gcc/testsuite/gcc.target/arm/neon/vabds8.c
deleted file mode 100644
index 2b0fe0abb07..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vabd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu16.c b/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
deleted file mode 100644
index ca599ac56af..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vabd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu32.c b/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
deleted file mode 100644
index cdd83429cc7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vabd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabdu8.c b/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
deleted file mode 100644
index 1d939185ed0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vabdu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabdu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vabd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
deleted file mode 100644
index f77af2a5d04..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vabsq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
deleted file mode 100644
index 5b3a3578fb9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vabsq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
deleted file mode 100644
index a0ad4030496..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vabsq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
deleted file mode 100644
index 786d2004413..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vabsq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabsf32.c b/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
deleted file mode 100644
index b1845da54f6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vabs_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss16.c b/gcc/testsuite/gcc.target/arm/neon/vabss16.c
deleted file mode 100644
index ad370648898..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabss16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vabs_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss32.c b/gcc/testsuite/gcc.target/arm/neon/vabss32.c
deleted file mode 100644
index 38066982fcf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabss32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vabs_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vabss8.c b/gcc/testsuite/gcc.target/arm/neon/vabss8.c
deleted file mode 100644
index a36a2a7669a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vabss8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vabss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vabss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vabs_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
deleted file mode 100644
index dd2c06abba0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vaddq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
deleted file mode 100644
index ec000faa3b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
deleted file mode 100644
index 34ead8ca80f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
deleted file mode 100644
index 77942deee66..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vaddq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
deleted file mode 100644
index 42bcdf9ae74..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
deleted file mode 100644
index 983bb35f6b8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
deleted file mode 100644
index c98772e9389..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
deleted file mode 100644
index 95756c64671..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
deleted file mode 100644
index e52524eb00a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddf32.c b/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
deleted file mode 100644
index 6afb8c195fe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vadd_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
deleted file mode 100644
index f3f35e4ecce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vaddhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
deleted file mode 100644
index 028f431944d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vaddhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c b/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
deleted file mode 100644
index f139a6da1e7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vaddhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
deleted file mode 100644
index 6c770621e91..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vaddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
deleted file mode 100644
index 5315f91c1c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vaddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
deleted file mode 100644
index 6aa25609e16..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vaddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls16.c b/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
deleted file mode 100644
index 4b84ae89e6a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vaddl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls32.c b/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
deleted file mode 100644
index 3f267cc5ad7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vaddl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddls8.c b/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
deleted file mode 100644
index c2136109316..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vaddl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
deleted file mode 100644
index 6e5341c27cb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddlu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vaddl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
deleted file mode 100644
index bc4359beae5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddlu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vaddl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
deleted file mode 100644
index 9ec110e5a73..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddlu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vaddl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds16.c b/gcc/testsuite/gcc.target/arm/neon/vadds16.c
deleted file mode 100644
index 1c2f70b31fb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds32.c b/gcc/testsuite/gcc.target/arm/neon/vadds32.c
deleted file mode 100644
index 8889228215d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds64.c b/gcc/testsuite/gcc.target/arm/neon/vadds64.c
deleted file mode 100644
index 8b6bb5b9ca9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vadds64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds8.c b/gcc/testsuite/gcc.target/arm/neon/vadds8.c
deleted file mode 100644
index 6165e628728..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
deleted file mode 100644
index c3469152564..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
deleted file mode 100644
index 8436c129aed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
deleted file mode 100644
index 4cf9fcf2b6a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vaddu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
deleted file mode 100644
index 8435a7b74c0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws16.c b/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
deleted file mode 100644
index 8021483d6aa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddws16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddws16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vaddw_s16 (arg0_int32x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws32.c b/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
deleted file mode 100644
index 5691af3df9a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddws32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddws32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vaddw_s32 (arg0_int64x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddws8.c b/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
deleted file mode 100644
index 0a774c05945..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddws8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddws8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vaddw_s8 (arg0_int16x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
deleted file mode 100644
index a7cfc65cbc3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddwu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddwu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vaddw_u16 (arg0_uint32x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
deleted file mode 100644
index 40f86f1454f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddwu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddwu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vaddw_u32 (arg0_uint64x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c b/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
deleted file mode 100644
index bb6d0fbdbe3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vaddwu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vaddwu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vaddw_u8 (arg0_uint16x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vaddw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs16.c b/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
deleted file mode 100644
index bfc9a214da7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vandq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs32.c b/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
deleted file mode 100644
index feeca564124..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vandq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs64.c b/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
deleted file mode 100644
index 6c67c142445..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vandq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQs8.c b/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
deleted file mode 100644
index 7411c335822..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vandq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu16.c b/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
deleted file mode 100644
index 710312d64aa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vandq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu32.c b/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
deleted file mode 100644
index 64a956d19f2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vandq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu64.c b/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
deleted file mode 100644
index 832d83c7fb5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vandq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandQu8.c b/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
deleted file mode 100644
index 4820aa40573..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vandq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vands16.c b/gcc/testsuite/gcc.target/arm/neon/vands16.c
deleted file mode 100644
index 0e17817b832..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vands16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vand_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vands32.c b/gcc/testsuite/gcc.target/arm/neon/vands32.c
deleted file mode 100644
index d56529e96f1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vands32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vand_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vands64.c b/gcc/testsuite/gcc.target/arm/neon/vands64.c
deleted file mode 100644
index 164159419c1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vands64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vands8.c b/gcc/testsuite/gcc.target/arm/neon/vands8.c
deleted file mode 100644
index 961e3d83fda..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vands8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vands8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vands8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vand_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu16.c b/gcc/testsuite/gcc.target/arm/neon/vandu16.c
deleted file mode 100644
index d60a0a15ee3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vand_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu32.c b/gcc/testsuite/gcc.target/arm/neon/vandu32.c
deleted file mode 100644
index 79f57736a9d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vand_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu64.c b/gcc/testsuite/gcc.target/arm/neon/vandu64.c
deleted file mode 100644
index 40172e96128..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vandu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu8.c b/gcc/testsuite/gcc.target/arm/neon/vandu8.c
deleted file mode 100644
index 1244ecace2a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vandu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vandu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vandu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vand_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
deleted file mode 100644
index ff6625525ff..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x8_t out_int16x8_t;
-int16x8_t arg0_int16x8_t;
-int16x8_t arg1_int16x8_t;
-void test_vbicQs16 (void)
-{
-
-  out_int16x8_t = vbicq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
deleted file mode 100644
index 4a691bd5915..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x4_t out_int32x4_t;
-int32x4_t arg0_int32x4_t;
-int32x4_t arg1_int32x4_t;
-void test_vbicQs32 (void)
-{
-
-  out_int32x4_t = vbicq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
deleted file mode 100644
index 403098f5fd0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x2_t out_int64x2_t;
-int64x2_t arg0_int64x2_t;
-int64x2_t arg1_int64x2_t;
-void test_vbicQs64 (void)
-{
-
-  out_int64x2_t = vbicq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c b/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
deleted file mode 100644
index 576769c3cd5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x16_t out_int8x16_t;
-int8x16_t arg0_int8x16_t;
-int8x16_t arg1_int8x16_t;
-void test_vbicQs8 (void)
-{
-
-  out_int8x16_t = vbicq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
deleted file mode 100644
index 3504a2685c8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x8_t out_uint16x8_t;
-uint16x8_t arg0_uint16x8_t;
-uint16x8_t arg1_uint16x8_t;
-void test_vbicQu16 (void)
-{
-
-  out_uint16x8_t = vbicq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
deleted file mode 100644
index 993280b2be3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x4_t out_uint32x4_t;
-uint32x4_t arg0_uint32x4_t;
-uint32x4_t arg1_uint32x4_t;
-void test_vbicQu32 (void)
-{
-
-  out_uint32x4_t = vbicq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
deleted file mode 100644
index fb27c629208..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x2_t out_uint64x2_t;
-uint64x2_t arg0_uint64x2_t;
-uint64x2_t arg1_uint64x2_t;
-void test_vbicQu64 (void)
-{
-
-  out_uint64x2_t = vbicq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c b/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
deleted file mode 100644
index 65f0e403304..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x16_t out_uint8x16_t;
-uint8x16_t arg0_uint8x16_t;
-uint8x16_t arg1_uint8x16_t;
-void test_vbicQu8 (void)
-{
-
-  out_uint8x16_t = vbicq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics16.c b/gcc/testsuite/gcc.target/arm/neon/vbics16.c
deleted file mode 100644
index 95aed5b08df..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbics16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x4_t out_int16x4_t;
-int16x4_t arg0_int16x4_t;
-int16x4_t arg1_int16x4_t;
-void test_vbics16 (void)
-{
-
-  out_int16x4_t = vbic_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics32.c b/gcc/testsuite/gcc.target/arm/neon/vbics32.c
deleted file mode 100644
index 925d7483c1d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbics32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x2_t out_int32x2_t;
-int32x2_t arg0_int32x2_t;
-int32x2_t arg1_int32x2_t;
-void test_vbics32 (void)
-{
-
-  out_int32x2_t = vbic_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics64.c b/gcc/testsuite/gcc.target/arm/neon/vbics64.c
deleted file mode 100644
index c7ab6cbb006..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vbics64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x1_t out_int64x1_t;
-int64x1_t arg0_int64x1_t;
-int64x1_t arg1_int64x1_t;
-void test_vbics64 (void)
-{
-
-  out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics8.c b/gcc/testsuite/gcc.target/arm/neon/vbics8.c
deleted file mode 100644
index 22e2a12fe86..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbics8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbics8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x8_t out_int8x8_t;
-int8x8_t arg0_int8x8_t;
-int8x8_t arg1_int8x8_t;
-void test_vbics8 (void)
-{
-
-  out_int8x8_t = vbic_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu16.c b/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
deleted file mode 100644
index cfa96c10a4a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x4_t out_uint16x4_t;
-uint16x4_t arg0_uint16x4_t;
-uint16x4_t arg1_uint16x4_t;
-void test_vbicu16 (void)
-{
-
-  out_uint16x4_t = vbic_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu32.c b/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
deleted file mode 100644
index 65f49a53bfe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x2_t out_uint32x2_t;
-uint32x2_t arg0_uint32x2_t;
-uint32x2_t arg1_uint32x2_t;
-void test_vbicu32 (void)
-{
-
-  out_uint32x2_t = vbic_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c b/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
deleted file mode 100644
index 89c8a5e1748..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vbicu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x1_t out_uint64x1_t;
-uint64x1_t arg0_uint64x1_t;
-uint64x1_t arg1_uint64x1_t;
-void test_vbicu64 (void)
-{
-
-  out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu8.c b/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
deleted file mode 100644
index 930eb36acf4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vbicu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x8_t out_uint8x8_t;
-uint8x8_t arg0_uint8x8_t;
-uint8x8_t arg1_uint8x8_t;
-void test_vbicu8 (void)
-{
-
-  out_uint8x8_t = vbic_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
deleted file mode 100644
index 6db03f35a62..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vbslq_f32 (arg0_uint32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
deleted file mode 100644
index 0c0c88dd1cf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-  poly16x8_t arg2_poly16x8_t;
-
-  out_poly16x8_t = vbslq_p16 (arg0_uint16x8_t, arg1_poly16x8_t, arg2_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
deleted file mode 100644
index 50d8180b17a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vbslQp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-  poly64x2_t arg2_poly64x2_t;
-
-  out_poly64x2_t = vbslq_p64 (arg0_uint64x2_t, arg1_poly64x2_t, arg2_poly64x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
deleted file mode 100644
index 2d09700186c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-  poly8x16_t arg2_poly8x16_t;
-
-  out_poly8x16_t = vbslq_p8 (arg0_uint8x16_t, arg1_poly8x16_t, arg2_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
deleted file mode 100644
index 28031941b62..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vbslq_s16 (arg0_uint16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
deleted file mode 100644
index 637895d1c49..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vbslq_s32 (arg0_uint32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
deleted file mode 100644
index d329d194392..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-  int64x2_t arg2_int64x2_t;
-
-  out_int64x2_t = vbslq_s64 (arg0_uint64x2_t, arg1_int64x2_t, arg2_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
deleted file mode 100644
index 5e78bbcf09e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vbslq_s8 (arg0_uint8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
deleted file mode 100644
index 2446349a294..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vbslq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
deleted file mode 100644
index a8c32a429e8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vbslq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
deleted file mode 100644
index fd00ae87c31..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-  uint64x2_t arg2_uint64x2_t;
-
-  out_uint64x2_t = vbslq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, arg2_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c b/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
deleted file mode 100644
index 123584360f2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vbslq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslf32.c b/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
deleted file mode 100644
index 345f1c89dff..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vbsl_f32 (arg0_uint32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp16.c b/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
deleted file mode 100644
index 6ce42b31eb7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-  poly16x4_t arg2_poly16x4_t;
-
-  out_poly16x4_t = vbsl_p16 (arg0_uint16x4_t, arg1_poly16x4_t, arg2_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp64.c b/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
deleted file mode 100644
index 0ff4cfc3833..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vbslp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-  poly64x1_t arg2_poly64x1_t;
-
-  out_poly64x1_t = vbsl_p64 (arg0_uint64x1_t, arg1_poly64x1_t, arg2_poly64x1_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslp8.c b/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
deleted file mode 100644
index 6e1f1871bf8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-  poly8x8_t arg2_poly8x8_t;
-
-  out_poly8x8_t = vbsl_p8 (arg0_uint8x8_t, arg1_poly8x8_t, arg2_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls16.c b/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
deleted file mode 100644
index 3368f99c391..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vbsl_s16 (arg0_uint16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls32.c b/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
deleted file mode 100644
index 40bc0ad1b8b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vbsl_s32 (arg0_uint32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls64.c b/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
deleted file mode 100644
index 8249a62d0c1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-  int64x1_t arg2_int64x1_t;
-
-  out_int64x1_t = vbsl_s64 (arg0_uint64x1_t, arg1_int64x1_t, arg2_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbsls8.c b/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
deleted file mode 100644
index 914a1d6871b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbsls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbsls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vbsl_s8 (arg0_uint8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu16.c b/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
deleted file mode 100644
index 7106ffcf045..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vbsl_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu32.c b/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
deleted file mode 100644
index f6922e6f675..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vbsl_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu64.c b/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
deleted file mode 100644
index 724fdb32dda..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-  uint64x1_t arg2_uint64x1_t;
-
-  out_uint64x1_t = vbsl_u64 (arg0_uint64x1_t, arg1_uint64x1_t, arg2_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vbslu8.c b/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
deleted file mode 100644
index a27bc640bc4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vbslu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vbslu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vbsl_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
deleted file mode 100644
index 48e8e790424..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcageQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcageQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcageq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagef32.c b/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
deleted file mode 100644
index 52084e7e711..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcagef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcagef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcage_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
deleted file mode 100644
index e7290ed807f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcagtQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcagtQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcagtq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c b/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
deleted file mode 100644
index ce8969bdc88..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcagtf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcagtf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcagt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
deleted file mode 100644
index b429bba7eab..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcaleQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcaleQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcaleq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcalef32.c b/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
deleted file mode 100644
index a8340655b45..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcalef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcalef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcale_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
deleted file mode 100644
index dbebe489e63..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcaltQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcaltQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcaltq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c b/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
deleted file mode 100644
index 004edc6e0ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcaltf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcaltf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcalt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
deleted file mode 100644
index 6a537219c14..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vceqq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
deleted file mode 100644
index 556fbdf35be..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQp8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_uint8x16_t = vceqq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
deleted file mode 100644
index cfbf64a48f2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vceqq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
deleted file mode 100644
index 1b75729f594..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vceqq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
deleted file mode 100644
index d6d6d30dc54..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vceqq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
deleted file mode 100644
index 6f33d9d9712..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vceqq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
deleted file mode 100644
index df2d47b7f8c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vceqq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c b/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
deleted file mode 100644
index 80d56ffe424..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vceqq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqf32.c b/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
deleted file mode 100644
index 046a5052004..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vceq_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqp8.c b/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
deleted file mode 100644
index 5758ebaf81a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqp8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_uint8x8_t = vceq_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs16.c b/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
deleted file mode 100644
index 11337b0e173..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqs16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vceq_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs32.c b/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
deleted file mode 100644
index 506c9800d36..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqs32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vceq_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vceqs8.c b/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
deleted file mode 100644
index c76e2b4b102..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vceqs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vceqs8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vceq_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ16.c b/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
deleted file mode 100644
index dda7ab79798..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcequ16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcequ16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vceq_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ32.c b/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
deleted file mode 100644
index 4ee8c5f6a02..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcequ32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcequ32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vceq_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcequ8.c b/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
deleted file mode 100644
index 60134cf63cb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcequ8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcequ8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vceq_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
deleted file mode 100644
index 93a5e3ca86d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcgeq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
deleted file mode 100644
index f60344f4f3d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcgeq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
deleted file mode 100644
index 1d8caccfa71..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcgeq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
deleted file mode 100644
index b5bb84e2b41..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcgeq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
deleted file mode 100644
index 62f060f8f3d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcgeq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
deleted file mode 100644
index a86dfa216d4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcgeq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
deleted file mode 100644
index fbf678c175b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcgeq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgef32.c b/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
deleted file mode 100644
index f12259aecc2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcge_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges16.c b/gcc/testsuite/gcc.target/arm/neon/vcges16.c
deleted file mode 100644
index d420dec6094..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcges16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcges16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcges16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vcge_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges32.c b/gcc/testsuite/gcc.target/arm/neon/vcges32.c
deleted file mode 100644
index c4e731588c6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcges32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcges32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcges32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vcge_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcges8.c b/gcc/testsuite/gcc.target/arm/neon/vcges8.c
deleted file mode 100644
index 0484e247748..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcges8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcges8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcges8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vcge_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
deleted file mode 100644
index 89874e040aa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vcge_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
deleted file mode 100644
index cb907fd3fa5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vcge_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
deleted file mode 100644
index 01af80920b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgeu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgeu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vcge_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
deleted file mode 100644
index ab5f92d6e8a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcgtq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
deleted file mode 100644
index 5e966f74edb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcgtq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
deleted file mode 100644
index 3db41766825..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcgtq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
deleted file mode 100644
index a092e21927b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcgtq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
deleted file mode 100644
index 2239331c40d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcgtq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
deleted file mode 100644
index 430f3ca07be..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcgtq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
deleted file mode 100644
index bb38a0ec54d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcgtq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
deleted file mode 100644
index 171780725cb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcgt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts16.c b/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
deleted file mode 100644
index 05088830c6b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgts16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vcgt_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts32.c b/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
deleted file mode 100644
index 09dc2b5ca4a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgts32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vcgt_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgts8.c b/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
deleted file mode 100644
index 1cb6b028bc4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgts8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vcgt_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
deleted file mode 100644
index 0c76d53e06e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vcgt_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
deleted file mode 100644
index ae6aae5a27c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vcgt_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c b/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
deleted file mode 100644
index 3ed6bcc19f5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcgtu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcgtu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vcgt_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
deleted file mode 100644
index cc24025fc30..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcleq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
deleted file mode 100644
index e4efae94673..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcleq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
deleted file mode 100644
index a432421a7c2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcleq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
deleted file mode 100644
index a6d2d779c01..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcleq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
deleted file mode 100644
index 72dccdc0acf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcleq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
deleted file mode 100644
index c057a4f252c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcleq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
deleted file mode 100644
index 618232e3be8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcleq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclef32.c b/gcc/testsuite/gcc.target/arm/neon/vclef32.c
deleted file mode 100644
index e4ef97382b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclef32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vcle_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles16.c b/gcc/testsuite/gcc.target/arm/neon/vcles16.c
deleted file mode 100644
index 8b835b3b4ce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcles16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcles16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcles16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vcle_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles32.c b/gcc/testsuite/gcc.target/arm/neon/vcles32.c
deleted file mode 100644
index f5035d2cbcc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcles32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcles32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcles32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vcle_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcles8.c b/gcc/testsuite/gcc.target/arm/neon/vcles8.c
deleted file mode 100644
index 65b5962190c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcles8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcles8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcles8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vcle_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu16.c b/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
deleted file mode 100644
index a51824173c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vcle_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu32.c b/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
deleted file mode 100644
index f1d83e893ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vcle_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcleu8.c b/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
deleted file mode 100644
index 3a394543281..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcleu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcleu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vcle_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
deleted file mode 100644
index 5c878526259..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vclsq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
deleted file mode 100644
index c44d5a7d1c6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vclsq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
deleted file mode 100644
index a4c7cfe1787..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vclsq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss16.c b/gcc/testsuite/gcc.target/arm/neon/vclss16.c
deleted file mode 100644
index 5b43faec23a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclss16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vcls_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss32.c b/gcc/testsuite/gcc.target/arm/neon/vclss32.c
deleted file mode 100644
index e60c1c0957a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclss32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vcls_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclss8.c b/gcc/testsuite/gcc.target/arm/neon/vclss8.c
deleted file mode 100644
index 272ef8d039d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclss8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vcls_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
deleted file mode 100644
index 95234124339..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQf32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_uint32x4_t = vcltq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
deleted file mode 100644
index fc67ae1ae90..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vcltq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
deleted file mode 100644
index 58da373a455..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vcltq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
deleted file mode 100644
index 800a50220c9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vcltq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
deleted file mode 100644
index b6435de6b3f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vcltq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
deleted file mode 100644
index 43205b77ec3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vcltq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
deleted file mode 100644
index d65a8259f00..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vcltq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltf32.c b/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
deleted file mode 100644
index f18e000c56b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltf32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_uint32x2_t = vclt_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts16.c b/gcc/testsuite/gcc.target/arm/neon/vclts16.c
deleted file mode 100644
index 115675ea850..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclts16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vclt_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts32.c b/gcc/testsuite/gcc.target/arm/neon/vclts32.c
deleted file mode 100644
index 99771d24101..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclts32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vclt_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclts8.c b/gcc/testsuite/gcc.target/arm/neon/vclts8.c
deleted file mode 100644
index 372b4afaafd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vclts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclts8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vclt_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu16.c b/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
deleted file mode 100644
index 2a3012e9069..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vclt_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu32.c b/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
deleted file mode 100644
index 51426a5c07a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vclt_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcltu8.c b/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
deleted file mode 100644
index 0606a32073b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vcltu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcltu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vclt_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
deleted file mode 100644
index 6652d3d2a40..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vclzq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
deleted file mode 100644
index 8eb1f6ce6bc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vclzq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c b/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
deleted file mode 100644
index e1bc052d87f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vclzq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
deleted file mode 100644
index 4f92e4a6a1e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vclzq_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
deleted file mode 100644
index 67936cb3ad4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vclzq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c b/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
deleted file mode 100644
index b889cb7da12..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vclzq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs16.c b/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
deleted file mode 100644
index 4c9cee39ebb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vclz_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs32.c b/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
deleted file mode 100644
index 9827d90e1b5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vclz_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzs8.c b/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
deleted file mode 100644
index bb262c24f66..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vclz_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu16.c b/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
deleted file mode 100644
index ee8dd309c6b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vclz_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu32.c b/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
deleted file mode 100644
index 963248d13dc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vclz_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vclzu8.c b/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
deleted file mode 100644
index a71042f56b9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vclzu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vclzu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vclz_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
deleted file mode 100644
index 5598f4d9c2a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vcntq_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
deleted file mode 100644
index 5e0710ed4c9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vcntq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c b/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
deleted file mode 100644
index a6541486dcb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vcntq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntp8.c b/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
deleted file mode 100644
index a75dfa55fbb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vcnt_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcnts8.c b/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
deleted file mode 100644
index 348221e6e06..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcnts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcnts8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vcnt_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcntu8.c b/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
deleted file mode 100644
index cb4428dfd13..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcntu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcntu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vcnt_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c b/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
deleted file mode 100644
index 8c280bf71e4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombinef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x4_t = vcombine_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
deleted file mode 100644
index 59a840f20d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombinep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x8_t = vcombine_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
deleted file mode 100644
index 5d1aef3bb68..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vcombinep64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x2_t = vcombine_p64 (arg0_poly64x1_t, arg1_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c b/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
deleted file mode 100644
index 9784f587887..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombinep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombinep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x16_t = vcombine_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines16.c b/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
deleted file mode 100644
index 520c013846d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vcombine_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines32.c b/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
deleted file mode 100644
index b2a49acd79f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vcombine_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines64.c b/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
deleted file mode 100644
index 292a89277af..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x2_t = vcombine_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombines8.c b/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
deleted file mode 100644
index b3bf943768b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombines8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombines8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x16_t = vcombine_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
deleted file mode 100644
index 053944bf5a4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x8_t = vcombine_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
deleted file mode 100644
index 18aa30ca471..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x4_t = vcombine_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
deleted file mode 100644
index 8e4881c5c29..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x2_t = vcombine_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c b/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
deleted file mode 100644
index 9d4989cb9cc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcombineu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcombineu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x16_t = vcombine_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c b/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
deleted file mode 100644
index f9213570dbc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreatef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_float32x2_t = vcreate_f32 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
deleted file mode 100644
index 4e1363be525..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreatep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint64_t arg0_uint64_t;
-
-  out_poly16x4_t = vcreate_p16 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
deleted file mode 100644
index 0ad84d4e8b9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vcreatep64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_poly64x1_t = vcreate_p64 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c b/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
deleted file mode 100644
index 79b70f0abc3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreatep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreatep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint64_t arg0_uint64_t;
-
-  out_poly8x8_t = vcreate_p8 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates16.c b/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
deleted file mode 100644
index c9f652e7f98..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates16 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint64_t arg0_uint64_t;
-
-  out_int16x4_t = vcreate_s16 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates32.c b/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
deleted file mode 100644
index fd21c4d3008..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates32 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_int32x2_t = vcreate_s32 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates64.c b/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
deleted file mode 100644
index d5e818707fb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates64 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_int64x1_t = vcreate_s64 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreates8.c b/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
deleted file mode 100644
index 79280e644e7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreates8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreates8 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint64_t arg0_uint64_t;
-
-  out_int8x8_t = vcreate_s8 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
deleted file mode 100644
index a36258d7791..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint16x4_t = vcreate_u16 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
deleted file mode 100644
index 94d8252536d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint32x2_t = vcreate_u32 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
deleted file mode 100644
index dc3e151ea46..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x1_t = vcreate_u64 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c b/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
deleted file mode 100644
index 397fdddf42c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vcreateu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcreateu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint8x8_t = vcreate_u8 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
deleted file mode 100644
index 4bb0b658552..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_nf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_nf32_s32 (void)
-{
-  float32x4_t out_float32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_float32x4_t = vcvtq_n_f32_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
deleted file mode 100644
index 6e24051547a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_nf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_nf32_u32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_float32x4_t = vcvtq_n_f32_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
deleted file mode 100644
index 5f906ae0087..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_ns32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_ns32_f32 (void)
-{
-  int32x4_t out_int32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int32x4_t = vcvtq_n_s32_f32 (arg0_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
deleted file mode 100644
index 29f2c5e474e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQ_nu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQ_nu32_f32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint32x4_t = vcvtq_n_u32_f32 (arg0_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
deleted file mode 100644
index de3d1b82b58..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQf32_s32 (void)
-{
-  float32x4_t out_float32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_float32x4_t = vcvtq_f32_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
deleted file mode 100644
index 64b462dddff..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQf32_u32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_float32x4_t = vcvtq_f32_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
deleted file mode 100644
index 97cb7e763d6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQs32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQs32_f32 (void)
-{
-  int32x4_t out_int32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int32x4_t = vcvtq_s32_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
deleted file mode 100644
index c7aa7a1ebdf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtQu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtQu32_f32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint32x4_t = vcvtq_u32_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
deleted file mode 100644
index f86b4de49e3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_nf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_nf32_s32 (void)
-{
-  float32x2_t out_float32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_float32x2_t = vcvt_n_f32_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
deleted file mode 100644
index fa3bf1770f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_nf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_nf32_u32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_float32x2_t = vcvt_n_f32_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
deleted file mode 100644
index de253e7d550..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_ns32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_ns32_f32 (void)
-{
-  int32x2_t out_int32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int32x2_t = vcvt_n_s32_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
deleted file mode 100644
index 23bdbdf3a48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvt_nu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvt_nu32_f32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint32x2_t = vcvt_n_u32_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c
deleted file mode 100644
index 45b3a72eab4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon_fp16 } */
-
-#include "arm_neon.h"
-
-void test_vcvtf16_f32 (void)
-{
-  float16x4_t out_float16x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float16x4_t = vcvt_f16_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f16.f32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c
deleted file mode 100644
index 6bade5403fc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf32_f16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon_fp16 } */
-
-#include "arm_neon.h"
-
-void test_vcvtf32_f16 (void)
-{
-  float32x4_t out_float32x4_t;
-  float16x4_t arg0_float16x4_t;
-
-  out_float32x4_t = vcvt_f32_f16 (arg0_float16x4_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.f16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
deleted file mode 100644
index 28715234b15..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtf32_s32 (void)
-{
-  float32x2_t out_float32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_float32x2_t = vcvt_f32_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
deleted file mode 100644
index 1680271ce25..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtf32_u32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_float32x2_t = vcvt_f32_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
deleted file mode 100644
index f3b49125758..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvts32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvts32_f32 (void)
-{
-  int32x2_t out_int32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int32x2_t = vcvt_s32_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
deleted file mode 100644
index c60cd069f31..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vcvtu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vcvtu32_f32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint32x2_t = vcvt_u32_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
deleted file mode 100644
index 2b2c7f0758c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x4_t = vdupq_lane_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
deleted file mode 100644
index 8b73edb29ed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x8_t = vdupq_lane_p16 (arg0_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
deleted file mode 100644
index 85181686dd5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanep64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly64x2_t = vdupq_lane_p64 (arg0_poly64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
deleted file mode 100644
index 6c0356456a6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x16_t = vdupq_lane_p8 (arg0_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
deleted file mode 100644
index 54c278cdc7b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x8_t = vdupq_lane_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
deleted file mode 100644
index eb6b05b6de5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x4_t = vdupq_lane_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
deleted file mode 100644
index 99551d4328d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x2_t = vdupq_lane_s64 (arg0_int64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
deleted file mode 100644
index 5840142c6aa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_lanes8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x16_t = vdupq_lane_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
deleted file mode 100644
index 6bc5e3a7949..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x8_t = vdupq_lane_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
deleted file mode 100644
index f8cdeb291fe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x4_t = vdupq_lane_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
deleted file mode 100644
index 2f3970359e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x2_t = vdupq_lane_u64 (arg0_uint64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
deleted file mode 100644
index e581efaac36..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_laneu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x16_t = vdupq_lane_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
deleted file mode 100644
index c817c610fd9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32_t arg0_float32_t;
-
-  out_float32x4_t = vdupq_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
deleted file mode 100644
index 57f8c2e8205..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x8_t = vdupq_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
deleted file mode 100644
index 1f8527c8000..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_np64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64_t arg0_poly64_t;
-
-  out_poly64x2_t = vdupq_n_p64 (arg0_poly64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
deleted file mode 100644
index 4b67c623f0d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x16_t = vdupq_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
deleted file mode 100644
index 2e30bc3ad63..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16_t arg0_int16_t;
-
-  out_int16x8_t = vdupq_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
deleted file mode 100644
index 9b6a004a815..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32_t arg0_int32_t;
-
-  out_int32x4_t = vdupq_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
deleted file mode 100644
index 221c85f47f5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64_t arg0_int64_t;
-
-  out_int64x2_t = vdupq_n_s64 (arg0_int64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
deleted file mode 100644
index 931300c8347..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8_t arg0_int8_t;
-
-  out_int8x16_t = vdupq_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
deleted file mode 100644
index f70a188fafa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x8_t = vdupq_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
deleted file mode 100644
index 312efd811f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x4_t = vdupq_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
deleted file mode 100644
index 0bf62cdcdf6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdupQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
deleted file mode 100644
index 3493dcbf700..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdupQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdupQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x16_t = vdupq_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
deleted file mode 100644
index 3fd980a062d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vdup_lane_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
deleted file mode 100644
index 7f6d4aada7b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x4_t = vdup_lane_p16 (arg0_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
deleted file mode 100644
index f0d46d013b2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanep64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly64x1_t = vdup_lane_p64 (arg0_poly64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
deleted file mode 100644
index a1396d68278..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vdup_lane_p8 (arg0_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
deleted file mode 100644
index deb0160992a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vdup_lane_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
deleted file mode 100644
index e0b2d074284..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vdup_lane_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
deleted file mode 100644
index 9bec51a48b9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vdup_lane_s64 (arg0_int64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
deleted file mode 100644
index a442fd278b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_lanes8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vdup_lane_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
deleted file mode 100644
index d9b5fd9fd02..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vdup_lane_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
deleted file mode 100644
index db14a1cd79a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vdup_lane_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
deleted file mode 100644
index 6a65eb0d148..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vdup_lane_u64 (arg0_uint64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
deleted file mode 100644
index 99fb193f5ff..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_laneu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vdup_lane_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
deleted file mode 100644
index 448894bdf55..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32_t arg0_float32_t;
-
-  out_float32x2_t = vdup_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
deleted file mode 100644
index 9b56707b931..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x4_t = vdup_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
deleted file mode 100644
index 25552dc85e7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vdup_np64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64_t arg0_poly64_t;
-
-  out_poly64x1_t = vdup_n_p64 (arg0_poly64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
deleted file mode 100644
index ad8a0a6d894..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x8_t = vdup_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
deleted file mode 100644
index c3cc4d02850..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16_t arg0_int16_t;
-
-  out_int16x4_t = vdup_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
deleted file mode 100644
index ddfeaec90d7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32_t arg0_int32_t;
-
-  out_int32x2_t = vdup_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
deleted file mode 100644
index 30560887bc3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64_t arg0_int64_t;
-
-  out_int64x1_t = vdup_n_s64 (arg0_int64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
deleted file mode 100644
index 38017a13e6e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8_t arg0_int8_t;
-
-  out_int8x8_t = vdup_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
deleted file mode 100644
index 6150b61b203..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x4_t = vdup_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
deleted file mode 100644
index 404c8b06e5e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x2_t = vdup_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
deleted file mode 100644
index c89072dda85..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vdup_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x1_t = vdup_n_u64 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
deleted file mode 100644
index 09db0eb1ab1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vdup_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vdup_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x8_t = vdup_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs16.c b/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
deleted file mode 100644
index b246900b0ce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = veorq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs32.c b/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
deleted file mode 100644
index d9cd2f8fef3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = veorq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs64.c b/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
deleted file mode 100644
index 926b1e46ef4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = veorq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQs8.c b/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
deleted file mode 100644
index 272c6ed9d12..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = veorq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu16.c b/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
deleted file mode 100644
index dcd3921bc53..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = veorq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu32.c b/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
deleted file mode 100644
index 9b34d9ac304..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = veorq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu64.c b/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
deleted file mode 100644
index b98db788cd1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = veorq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veorQu8.c b/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
deleted file mode 100644
index c985acd1c48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veorQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veorQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = veorq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veors16.c b/gcc/testsuite/gcc.target/arm/neon/veors16.c
deleted file mode 100644
index 2b839037e21..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veors16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = veor_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veors32.c b/gcc/testsuite/gcc.target/arm/neon/veors32.c
deleted file mode 100644
index 45403b830ef..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veors32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = veor_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veors64.c b/gcc/testsuite/gcc.target/arm/neon/veors64.c
deleted file mode 100644
index b102c7b30b3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `veors64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/veors8.c b/gcc/testsuite/gcc.target/arm/neon/veors8.c
deleted file mode 100644
index 0ae7a66175e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veors8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veors8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veors8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = veor_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru16.c b/gcc/testsuite/gcc.target/arm/neon/veoru16.c
deleted file mode 100644
index f3b419255d6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veoru16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = veor_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru32.c b/gcc/testsuite/gcc.target/arm/neon/veoru32.c
deleted file mode 100644
index 8b6be9e5926..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veoru32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = veor_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru64.c b/gcc/testsuite/gcc.target/arm/neon/veoru64.c
deleted file mode 100644
index 3b865fe1e63..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `veoru64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru8.c b/gcc/testsuite/gcc.target/arm/neon/veoru8.c
deleted file mode 100644
index 3511a77f5a8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/veoru8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `veoru8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_veoru8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = veor_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQf32.c b/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
deleted file mode 100644
index 0b5239dc6c0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vextq_f32 (arg0_float32x4_t, arg1_float32x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp16.c b/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
deleted file mode 100644
index f2e68799b1c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vextq_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp64.c b/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
deleted file mode 100644
index 2ae223a700f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vextQp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vextq_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQp8.c b/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
deleted file mode 100644
index fbfde397f91..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vextq_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs16.c b/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
deleted file mode 100644
index 2b0ae8684e6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vextq_s16 (arg0_int16x8_t, arg1_int16x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs32.c b/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
deleted file mode 100644
index cca20535383..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vextq_s32 (arg0_int32x4_t, arg1_int32x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs64.c b/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
deleted file mode 100644
index a489638ac50..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vextq_s64 (arg0_int64x2_t, arg1_int64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQs8.c b/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
deleted file mode 100644
index 0e3b8a239ae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vextq_s8 (arg0_int8x16_t, arg1_int8x16_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu16.c b/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
deleted file mode 100644
index c21c4824388..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vextq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu32.c b/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
deleted file mode 100644
index a19950dff96..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vextq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu64.c b/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
deleted file mode 100644
index d52e37fcf4a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vextq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextQu8.c b/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
deleted file mode 100644
index 49e4de6505c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vextq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextf32.c b/gcc/testsuite/gcc.target/arm/neon/vextf32.c
deleted file mode 100644
index 012dd4874d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vext_f32 (arg0_float32x2_t, arg1_float32x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp16.c b/gcc/testsuite/gcc.target/arm/neon/vextp16.c
deleted file mode 100644
index 94f601ac022..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vext_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp64.c b/gcc/testsuite/gcc.target/arm/neon/vextp64.c
deleted file mode 100644
index abf5c0ccdc0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextp64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vextp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vext_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextp8.c b/gcc/testsuite/gcc.target/arm/neon/vextp8.c
deleted file mode 100644
index 58728cf0858..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vext_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts16.c b/gcc/testsuite/gcc.target/arm/neon/vexts16.c
deleted file mode 100644
index 032055ead2e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vext_s16 (arg0_int16x4_t, arg1_int16x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts32.c b/gcc/testsuite/gcc.target/arm/neon/vexts32.c
deleted file mode 100644
index a3c7dced54a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vext_s32 (arg0_int32x2_t, arg1_int32x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts64.c b/gcc/testsuite/gcc.target/arm/neon/vexts64.c
deleted file mode 100644
index 534c8b87258..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vext_s64 (arg0_int64x1_t, arg1_int64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vexts8.c b/gcc/testsuite/gcc.target/arm/neon/vexts8.c
deleted file mode 100644
index 7c5dafd4e44..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vexts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vexts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vexts8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vext_s8 (arg0_int8x8_t, arg1_int8x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu16.c b/gcc/testsuite/gcc.target/arm/neon/vextu16.c
deleted file mode 100644
index 2b8e44c286a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vext_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu32.c b/gcc/testsuite/gcc.target/arm/neon/vextu32.c
deleted file mode 100644
index fad2ee021f2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vext_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu64.c b/gcc/testsuite/gcc.target/arm/neon/vextu64.c
deleted file mode 100644
index 7313c26032d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vext_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vextu8.c b/gcc/testsuite/gcc.target/arm/neon/vextu8.c
deleted file mode 100644
index caab02be5bd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vextu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vextu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vextu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vext_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 0);
-}
-
-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c
deleted file mode 100644
index 30b4c997270..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmaQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmaQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vfmaq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vfma\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c
deleted file mode 100644
index 8c55a0bbe90..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmaf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmaf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vfma_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vfma\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c
deleted file mode 100644
index 37a0c640b0f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vfmsq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vfms\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c b/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c
deleted file mode 100644
index d66e51c0142..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vfmsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neonv2_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neonv2 } */
-
-#include "arm_neon.h"
-
-void test_vfmsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vfms_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vfms\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
deleted file mode 100644
index 2ff33ee30d3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanef32 (void)
-{
-  float32_t out_float32_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32_t = vgetq_lane_f32 (arg0_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
deleted file mode 100644
index 1245a3eb461..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanep16 (void)
-{
-  poly16_t out_poly16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16_t = vgetq_lane_p16 (arg0_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
deleted file mode 100644
index 900b3b946a1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanep8 (void)
-{
-  poly8_t out_poly8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8_t = vgetq_lane_p8 (arg0_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
deleted file mode 100644
index f2cbd8d60a5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes16 (void)
-{
-  int16_t out_int16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16_t = vgetq_lane_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
deleted file mode 100644
index 25c6a520993..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes32 (void)
-{
-  int32_t out_int32_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32_t = vgetq_lane_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
deleted file mode 100644
index ef815cfb3d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes64 (void)
-{
-  register int64_t out_int64_t asm ("r0");
-  int64x2_t arg0_int64x2_t;
-
-  out_int64_t = vgetq_lane_s64 (arg0_int64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
deleted file mode 100644
index c4a76591c55..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_lanes8 (void)
-{
-  int8_t out_int8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8_t = vgetq_lane_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
deleted file mode 100644
index cb10ca124d6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu16 (void)
-{
-  uint16_t out_uint16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16_t = vgetq_lane_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
deleted file mode 100644
index a6c4ca60341..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu32 (void)
-{
-  uint32_t out_uint32_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32_t = vgetq_lane_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
deleted file mode 100644
index 0f02e51c79c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu64 (void)
-{
-  register uint64_t out_uint64_t asm ("r0");
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64_t = vgetq_lane_u64 (arg0_uint64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
deleted file mode 100644
index 0bc72e5a563..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vgetQ_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vgetQ_laneu8 (void)
-{
-  uint8_t out_uint8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8_t = vgetq_lane_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
deleted file mode 100644
index cc7382c7046..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x2_t = vget_high_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
deleted file mode 100644
index 6bb2a6cae76..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x4_t = vget_high_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
deleted file mode 100644
index c69abdc0548..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vget_highp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly64x1_t = vget_high_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
deleted file mode 100644
index 75cfbd41f81..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x8_t = vget_high_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
deleted file mode 100644
index e655eb6e4b6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x4_t = vget_high_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
deleted file mode 100644
index c8c2661230d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x2_t = vget_high_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
deleted file mode 100644
index f2d11c39967..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x1_t = vget_high_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
deleted file mode 100644
index ecff21351bd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x8_t = vget_high_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
deleted file mode 100644
index 1a7f002f395..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x4_t = vget_high_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
deleted file mode 100644
index 4899be4360a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x2_t = vget_high_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
deleted file mode 100644
index 3ff2a2b3488..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x1_t = vget_high_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
deleted file mode 100644
index 132cccab1cd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_highu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_highu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x8_t = vget_high_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
deleted file mode 100644
index 300e85c4c10..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanef32 (void)
-{
-  float32_t out_float32_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32_t = vget_lane_f32 (arg0_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
deleted file mode 100644
index 5d9f80bb326..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanep16 (void)
-{
-  poly16_t out_poly16_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16_t = vget_lane_p16 (arg0_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
deleted file mode 100644
index a172bd27ffc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanep8 (void)
-{
-  poly8_t out_poly8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8_t = vget_lane_p8 (arg0_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
deleted file mode 100644
index f8a9b020d97..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes16 (void)
-{
-  int16_t out_int16_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16_t = vget_lane_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
deleted file mode 100644
index 3cea0bfa7f5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes32 (void)
-{
-  int32_t out_int32_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32_t = vget_lane_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
deleted file mode 100644
index f360fe3ad0f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes64 (void)
-{
-  int64_t out_int64_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
deleted file mode 100644
index 064c9cdbf48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lanes8 (void)
-{
-  int8_t out_int8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8_t = vget_lane_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
deleted file mode 100644
index 756b589ffdd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu16 (void)
-{
-  uint16_t out_uint16_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16_t = vget_lane_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
deleted file mode 100644
index 3f59e6ad646..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu32 (void)
-{
-  uint32_t out_uint32_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32_t = vget_lane_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
deleted file mode 100644
index 75cef5b71df..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu64 (void)
-{
-  uint64_t out_uint64_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
deleted file mode 100644
index bb461a6bf59..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_laneu8 (void)
-{
-  uint8_t out_uint8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8_t = vget_lane_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
deleted file mode 100644
index 970ef76cb61..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowf32 (void)
-{
-  register float32x2_t out_float32x2_t asm ("d18");
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x2_t = vget_low_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
deleted file mode 100644
index ab421259e92..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowp16 (void)
-{
-  register poly16x4_t out_poly16x4_t asm ("d18");
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x4_t = vget_low_p16 (arg0_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
deleted file mode 100644
index 378310fefcc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lowp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vget_lowp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly64x1_t = vget_low_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
deleted file mode 100644
index 462ce05dcfb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowp8 (void)
-{
-  register poly8x8_t out_poly8x8_t asm ("d18");
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x8_t = vget_low_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
deleted file mode 100644
index 3ee2cf730d3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lows16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows16 (void)
-{
-  register int16x4_t out_int16x4_t asm ("d18");
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x4_t = vget_low_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
deleted file mode 100644
index 27d8e7248a2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lows32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows32 (void)
-{
-  register int32x2_t out_int32x2_t asm ("d18");
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x2_t = vget_low_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
deleted file mode 100644
index 6b32548ba37..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lows64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x1_t = vget_low_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
deleted file mode 100644
index 077ffd75dd6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lows8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lows8 (void)
-{
-  register int8x8_t out_int8x8_t asm ("d18");
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x8_t = vget_low_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
deleted file mode 100644
index df93c3275b9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu16 (void)
-{
-  register uint16x4_t out_uint16x4_t asm ("d18");
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x4_t = vget_low_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
deleted file mode 100644
index 3fdd5b4c5ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu32 (void)
-{
-  register uint32x2_t out_uint32x2_t asm ("d18");
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x2_t = vget_low_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
deleted file mode 100644
index 0732d7c348c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vget_lowu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x1_t = vget_low_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c b/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
deleted file mode 100644
index 0f59277fa4e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vget_lowu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vget_lowu8 (void)
-{
-  register uint8x8_t out_uint8x8_t asm ("d18");
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x8_t = vget_low_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
deleted file mode 100644
index bcd6a22a313..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
deleted file mode 100644
index 1f8128aa3a7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
deleted file mode 100644
index e7dd1314142..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
deleted file mode 100644
index f01237f7c1c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
deleted file mode 100644
index 65d2b8edd33..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
deleted file mode 100644
index 3fd514357de..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds16.c b/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
deleted file mode 100644
index a36a6ba4614..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vhadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds32.c b/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
deleted file mode 100644
index 20876ec67f9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vhadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhadds8.c b/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
deleted file mode 100644
index 53fcd9c7f8b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vhadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
deleted file mode 100644
index 3d18e9a9dd0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
deleted file mode 100644
index e0b64d6b0eb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
deleted file mode 100644
index 9212d5b512d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
deleted file mode 100644
index 71e9afdc42a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vhsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
deleted file mode 100644
index f26f7ad945b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vhsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
deleted file mode 100644
index b2a551519fa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vhsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
deleted file mode 100644
index 2d822cf3de6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vhsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
deleted file mode 100644
index 0ff6d4c1e8c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vhsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
deleted file mode 100644
index 520d337e389..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vhsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
deleted file mode 100644
index 72c981603fd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vhsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
deleted file mode 100644
index 0e6fdc01331..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vhsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
deleted file mode 100644
index 7b3220b7ec0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vhsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
deleted file mode 100644
index 15beda25c51..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vhsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
deleted file mode 100644
index a4201eaa536..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vhsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
deleted file mode 100644
index 92dbeab05c8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vhsubu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vhsubu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vhsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
deleted file mode 100644
index 58c33d6fb98..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupf32 (void)
-{
-  float32x4_t out_float32x4_t;
-
-  out_float32x4_t = vld1q_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
deleted file mode 100644
index 66c72ab23c0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-
-  out_poly16x8_t = vld1q_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
deleted file mode 100644
index 8c5b28e3226..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-
-  out_poly64x2_t = vld1q_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
deleted file mode 100644
index 90a3388f682..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-
-  out_poly8x16_t = vld1q_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
deleted file mode 100644
index d4cfada8fb2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups16 (void)
-{
-  int16x8_t out_int16x8_t;
-
-  out_int16x8_t = vld1q_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
deleted file mode 100644
index 2d16b12837a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups32 (void)
-{
-  int32x4_t out_int32x4_t;
-
-  out_int32x4_t = vld1q_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
deleted file mode 100644
index 41974a64429..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups64 (void)
-{
-  int64x2_t out_int64x2_t;
-
-  out_int64x2_t = vld1q_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
deleted file mode 100644
index 99475fcd41b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dups8 (void)
-{
-  int8x16_t out_int8x16_t;
-
-  out_int8x16_t = vld1q_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
deleted file mode 100644
index 584018937a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-
-  out_uint16x8_t = vld1q_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
deleted file mode 100644
index 31981ca2b58..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-
-  out_uint32x4_t = vld1q_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
deleted file mode 100644
index 5cfa03a2d25..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-
-  out_uint64x2_t = vld1q_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
deleted file mode 100644
index 240ad568fb0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Q_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_dupu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-
-  out_uint8x16_t = vld1q_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
deleted file mode 100644
index da17545484c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
deleted file mode 100644
index 546e5e7adf3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
deleted file mode 100644
index 18a28f4da24..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanep64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vld1q_lane_p64 (0, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
deleted file mode 100644
index 290a11599fa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
deleted file mode 100644
index 06c4b9d1551..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
deleted file mode 100644
index 58433ea1939..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
deleted file mode 100644
index bfe0dd90978..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
deleted file mode 100644
index ee7026dddec..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_lanes8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
deleted file mode 100644
index 0361b4f7748..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
deleted file mode 100644
index 6317455c4e1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
deleted file mode 100644
index 918e0df9a65..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
deleted file mode 100644
index e96ad29c2c3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1Q_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Q_laneu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
deleted file mode 100644
index 2a5fec19bfd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qf32 (void)
-{
-  float32x4_t out_float32x4_t;
-
-  out_float32x4_t = vld1q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
deleted file mode 100644
index 1b0deeea08d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-
-  out_poly16x8_t = vld1q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
deleted file mode 100644
index cd43706b50c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1Qp64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-
-  out_poly64x2_t = vld1q_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
deleted file mode 100644
index 24a186b0e0b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-
-  out_poly8x16_t = vld1q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
deleted file mode 100644
index b146b788fd8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs16 (void)
-{
-  int16x8_t out_int16x8_t;
-
-  out_int16x8_t = vld1q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
deleted file mode 100644
index d1d038611e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs32 (void)
-{
-  int32x4_t out_int32x4_t;
-
-  out_int32x4_t = vld1q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
deleted file mode 100644
index be53cf330de..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs64 (void)
-{
-  int64x2_t out_int64x2_t;
-
-  out_int64x2_t = vld1q_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
deleted file mode 100644
index 58b97a17e93..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-
-  out_int8x16_t = vld1q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
deleted file mode 100644
index 5c299f8c4e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-
-  out_uint16x8_t = vld1q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
deleted file mode 100644
index 6b4d0b0a3c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-
-  out_uint32x4_t = vld1q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
deleted file mode 100644
index 018bac70ac0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-
-  out_uint64x2_t = vld1q_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
deleted file mode 100644
index 06726dbb098..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-
-  out_uint8x16_t = vld1q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
deleted file mode 100644
index 699d77bb3b1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupf32 (void)
-{
-  float32x2_t out_float32x2_t;
-
-  out_float32x2_t = vld1_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
deleted file mode 100644
index baee8e08af2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupp16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-
-  out_poly16x4_t = vld1_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
deleted file mode 100644
index fa40f84298b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupp64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-
-  out_poly64x1_t = vld1_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
deleted file mode 100644
index adde412a137..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-
-  out_poly8x8_t = vld1_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
deleted file mode 100644
index f7c34478c9e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups16 (void)
-{
-  int16x4_t out_int16x4_t;
-
-  out_int16x4_t = vld1_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
deleted file mode 100644
index 4039804956c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups32 (void)
-{
-  int32x2_t out_int32x2_t;
-
-  out_int32x2_t = vld1_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
deleted file mode 100644
index 6784123ba53..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups64 (void)
-{
-  int64x1_t out_int64x1_t;
-
-  out_int64x1_t = vld1_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
deleted file mode 100644
index d6a3a8b623e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dups8 (void)
-{
-  int8x8_t out_int8x8_t;
-
-  out_int8x8_t = vld1_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
deleted file mode 100644
index 2cd76b7cd8b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-
-  out_uint16x4_t = vld1_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
deleted file mode 100644
index 85e5122a156..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-
-  out_uint32x2_t = vld1_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
deleted file mode 100644
index 7ccb05fb61c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-
-  out_uint64x1_t = vld1_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
deleted file mode 100644
index 8f6734a55c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_dupu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-
-  out_uint8x8_t = vld1_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
deleted file mode 100644
index 809866b0042..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
deleted file mode 100644
index 5cc3b754f7b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
deleted file mode 100644
index 874b5d0c1a5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanep64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vld1_lane_p64 (0, arg1_poly64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
deleted file mode 100644
index 3349ed0f975..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
deleted file mode 100644
index fbb4c91989c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
deleted file mode 100644
index c623f3ad426..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
deleted file mode 100644
index a26cc2e5a4f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
deleted file mode 100644
index f5b3ae243d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_lanes8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
deleted file mode 100644
index cf97ef5ccb5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
deleted file mode 100644
index e5f19ad19de..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
deleted file mode 100644
index 64e353e497d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
deleted file mode 100644
index d93859652b8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld1_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1_laneu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c b/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
deleted file mode 100644
index acca8542a13..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1f32 (void)
-{
-  float32x2_t out_float32x2_t;
-
-  out_float32x2_t = vld1_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c b/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
deleted file mode 100644
index 59b8dc57bdc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1p16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-
-  out_poly16x4_t = vld1_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p64.c b/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
deleted file mode 100644
index 8322dd0e34a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld1p64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-
-  out_poly64x1_t = vld1_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c b/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
deleted file mode 100644
index 96fda65700b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-
-  out_poly8x8_t = vld1_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c b/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
deleted file mode 100644
index d95113eabe5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s16 (void)
-{
-  int16x4_t out_int16x4_t;
-
-  out_int16x4_t = vld1_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c b/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
deleted file mode 100644
index 6ed2a963b39..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s32 (void)
-{
-  int32x2_t out_int32x2_t;
-
-  out_int32x2_t = vld1_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c b/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
deleted file mode 100644
index 03c6cf02001..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s64 (void)
-{
-  int64x1_t out_int64x1_t;
-
-  out_int64x1_t = vld1_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c b/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
deleted file mode 100644
index b3bdbba3205..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1s8 (void)
-{
-  int8x8_t out_int8x8_t;
-
-  out_int8x8_t = vld1_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c b/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
deleted file mode 100644
index 7ec982837e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-
-  out_uint16x4_t = vld1_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c b/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
deleted file mode 100644
index 8039822d0b9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-
-  out_uint32x2_t = vld1_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c b/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
deleted file mode 100644
index f4e4cc95f1b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-
-  out_uint64x1_t = vld1_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c b/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
deleted file mode 100644
index 3133ddb78ae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld1u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-
-  out_uint8x8_t = vld1_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
deleted file mode 100644
index 0cccd0f384c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanef32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4x2_t arg1_float32x4x2_t;
-
-  out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
deleted file mode 100644
index 2187a7f7d5d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanep16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8x2_t arg1_poly16x8x2_t;
-
-  out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
deleted file mode 100644
index 1872088acd9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanes16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8x2_t arg1_int16x8x2_t;
-
-  out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
deleted file mode 100644
index 953b5181225..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_lanes32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4x2_t arg1_int32x4x2_t;
-
-  out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
deleted file mode 100644
index 6f0f45fa3a6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_laneu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8x2_t arg1_uint16x8x2_t;
-
-  out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
deleted file mode 100644
index 3f6565457b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Q_laneu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4x2_t arg1_uint32x4x2_t;
-
-  out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
deleted file mode 100644
index a112ea26d16..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-
-  out_float32x4x2_t = vld2q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
deleted file mode 100644
index bb75b7ec2f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-
-  out_poly16x8x2_t = vld2q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
deleted file mode 100644
index 5f4307d1ad6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-
-  out_poly8x16x2_t = vld2q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
deleted file mode 100644
index 2b53903c678..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-
-  out_int16x8x2_t = vld2q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
deleted file mode 100644
index 53bc98b7db6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-
-  out_int32x4x2_t = vld2q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
deleted file mode 100644
index d056fb0f6ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-
-  out_int8x16x2_t = vld2q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
deleted file mode 100644
index 1a69ee5e2ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-
-  out_uint16x8x2_t = vld2q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
deleted file mode 100644
index 45fe749eb92..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-
-  out_uint32x4x2_t = vld2q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
deleted file mode 100644
index 99c935f26f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2Qu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-
-  out_uint8x16x2_t = vld2q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
deleted file mode 100644
index e33dad94a73..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-
-  out_float32x2x2_t = vld2_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
deleted file mode 100644
index 2b9cf43b631..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-
-  out_poly16x4x2_t = vld2_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
deleted file mode 100644
index acebb9b3606..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupp64 (void)
-{
-  poly64x1x2_t out_poly64x1x2_t;
-
-  out_poly64x1x2_t = vld2_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
deleted file mode 100644
index 00cfd9f67c3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-
-  out_poly8x8x2_t = vld2_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
deleted file mode 100644
index 9db5388028c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-
-  out_int16x4x2_t = vld2_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
deleted file mode 100644
index 80f186d9922..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-
-  out_int32x2x2_t = vld2_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
deleted file mode 100644
index d6b06acdb76..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups64 (void)
-{
-  int64x1x2_t out_int64x1x2_t;
-
-  out_int64x1x2_t = vld2_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
deleted file mode 100644
index 50629285659..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dups8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-
-  out_int8x8x2_t = vld2_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
deleted file mode 100644
index 9380195ec08..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-
-  out_uint16x4x2_t = vld2_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
deleted file mode 100644
index d469691c720..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-
-  out_uint32x2x2_t = vld2_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
deleted file mode 100644
index bb92ec7722d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu64 (void)
-{
-  uint64x1x2_t out_uint64x1x2_t;
-
-  out_uint64x1x2_t = vld2_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
deleted file mode 100644
index 72dc31b2313..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_dupu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-
-  out_uint8x8x2_t = vld2_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
deleted file mode 100644
index 7379d3b6238..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanef32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2x2_t arg1_float32x2x2_t;
-
-  out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
deleted file mode 100644
index 186a1c5b73a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanep16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4x2_t arg1_poly16x4x2_t;
-
-  out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
deleted file mode 100644
index 3a8201da026..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanep8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-
-  out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
deleted file mode 100644
index 08813592459..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanes16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4x2_t arg1_int16x4x2_t;
-
-  out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
deleted file mode 100644
index 8ad919c5089..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanes32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2x2_t arg1_int32x2x2_t;
-
-  out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
deleted file mode 100644
index d4a63070236..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_lanes8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8x2_t arg1_int8x8x2_t;
-
-  out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
deleted file mode 100644
index f0c7fa0f2a6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_laneu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4x2_t arg1_uint16x4x2_t;
-
-  out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
deleted file mode 100644
index f61fb515d42..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_laneu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2x2_t arg1_uint32x2x2_t;
-
-  out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
deleted file mode 100644
index 8def9138c78..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld2_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2_laneu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-
-  out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c b/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
deleted file mode 100644
index db3ff7a83a6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2f32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-
-  out_float32x2x2_t = vld2_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c b/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
deleted file mode 100644
index 7181dbf1d60..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2p16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-
-  out_poly16x4x2_t = vld2_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p64.c b/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
deleted file mode 100644
index e92c414fa5a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld2p64 (void)
-{
-  poly64x1x2_t out_poly64x1x2_t;
-
-  out_poly64x1x2_t = vld2_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c b/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
deleted file mode 100644
index 9e97b592f4f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2p8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-
-  out_poly8x8x2_t = vld2_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c b/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
deleted file mode 100644
index 268b62b2ba1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-
-  out_int16x4x2_t = vld2_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c b/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
deleted file mode 100644
index c65d931ed2e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-
-  out_int32x2x2_t = vld2_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c b/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
deleted file mode 100644
index 136df0561df..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s64 (void)
-{
-  int64x1x2_t out_int64x1x2_t;
-
-  out_int64x1x2_t = vld2_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c b/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
deleted file mode 100644
index c812b197601..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2s8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-
-  out_int8x8x2_t = vld2_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c b/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
deleted file mode 100644
index a089a6c61b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-
-  out_uint16x4x2_t = vld2_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c b/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
deleted file mode 100644
index 5d5875ea4c0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-
-  out_uint32x2x2_t = vld2_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c b/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
deleted file mode 100644
index 6124db89569..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u64 (void)
-{
-  uint64x1x2_t out_uint64x1x2_t;
-
-  out_uint64x1x2_t = vld2_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c b/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
deleted file mode 100644
index fb6275558e1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld2u8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-
-  out_uint8x8x2_t = vld2_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
deleted file mode 100644
index 0b36c4e37d1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanef32 (void)
-{
-  float32x4x3_t out_float32x4x3_t;
-  float32x4x3_t arg1_float32x4x3_t;
-
-  out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
deleted file mode 100644
index 88123f57b50..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanep16 (void)
-{
-  poly16x8x3_t out_poly16x8x3_t;
-  poly16x8x3_t arg1_poly16x8x3_t;
-
-  out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
deleted file mode 100644
index 3349522e9f3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanes16 (void)
-{
-  int16x8x3_t out_int16x8x3_t;
-  int16x8x3_t arg1_int16x8x3_t;
-
-  out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
deleted file mode 100644
index a669441d9d0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_lanes32 (void)
-{
-  int32x4x3_t out_int32x4x3_t;
-  int32x4x3_t arg1_int32x4x3_t;
-
-  out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
deleted file mode 100644
index 68cb436692e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_laneu16 (void)
-{
-  uint16x8x3_t out_uint16x8x3_t;
-  uint16x8x3_t arg1_uint16x8x3_t;
-
-  out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
deleted file mode 100644
index 0392513a4ca..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Q_laneu32 (void)
-{
-  uint32x4x3_t out_uint32x4x3_t;
-  uint32x4x3_t arg1_uint32x4x3_t;
-
-  out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
deleted file mode 100644
index c45e1b27d5e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qf32 (void)
-{
-  float32x4x3_t out_float32x4x3_t;
-
-  out_float32x4x3_t = vld3q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
deleted file mode 100644
index 9658954ae7b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qp16 (void)
-{
-  poly16x8x3_t out_poly16x8x3_t;
-
-  out_poly16x8x3_t = vld3q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
deleted file mode 100644
index bb5469378ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qp8 (void)
-{
-  poly8x16x3_t out_poly8x16x3_t;
-
-  out_poly8x16x3_t = vld3q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
deleted file mode 100644
index 8864f687d1b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qs16 (void)
-{
-  int16x8x3_t out_int16x8x3_t;
-
-  out_int16x8x3_t = vld3q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
deleted file mode 100644
index d33e8820b52..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qs32 (void)
-{
-  int32x4x3_t out_int32x4x3_t;
-
-  out_int32x4x3_t = vld3q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
deleted file mode 100644
index 1df9c831024..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qs8 (void)
-{
-  int8x16x3_t out_int8x16x3_t;
-
-  out_int8x16x3_t = vld3q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
deleted file mode 100644
index c6422ed5d62..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qu16 (void)
-{
-  uint16x8x3_t out_uint16x8x3_t;
-
-  out_uint16x8x3_t = vld3q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
deleted file mode 100644
index 0632ef35a52..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qu32 (void)
-{
-  uint32x4x3_t out_uint32x4x3_t;
-
-  out_uint32x4x3_t = vld3q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
deleted file mode 100644
index d41c469a37d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3Qu8 (void)
-{
-  uint8x16x3_t out_uint8x16x3_t;
-
-  out_uint8x16x3_t = vld3q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
deleted file mode 100644
index 0f0c420daa2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupf32 (void)
-{
-  float32x2x3_t out_float32x2x3_t;
-
-  out_float32x2x3_t = vld3_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
deleted file mode 100644
index 9d794da54ab..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupp16 (void)
-{
-  poly16x4x3_t out_poly16x4x3_t;
-
-  out_poly16x4x3_t = vld3_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
deleted file mode 100644
index ab34f1b7ca4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupp64 (void)
-{
-  poly64x1x3_t out_poly64x1x3_t;
-
-  out_poly64x1x3_t = vld3_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
deleted file mode 100644
index 0132d404f62..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupp8 (void)
-{
-  poly8x8x3_t out_poly8x8x3_t;
-
-  out_poly8x8x3_t = vld3_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
deleted file mode 100644
index c5ba76857b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups16 (void)
-{
-  int16x4x3_t out_int16x4x3_t;
-
-  out_int16x4x3_t = vld3_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
deleted file mode 100644
index 6d069b5956e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups32 (void)
-{
-  int32x2x3_t out_int32x2x3_t;
-
-  out_int32x2x3_t = vld3_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
deleted file mode 100644
index 31267b6b5f9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups64 (void)
-{
-  int64x1x3_t out_int64x1x3_t;
-
-  out_int64x1x3_t = vld3_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
deleted file mode 100644
index c6c0935aaf9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dups8 (void)
-{
-  int8x8x3_t out_int8x8x3_t;
-
-  out_int8x8x3_t = vld3_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
deleted file mode 100644
index ed49e0a045c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu16 (void)
-{
-  uint16x4x3_t out_uint16x4x3_t;
-
-  out_uint16x4x3_t = vld3_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
deleted file mode 100644
index 04eb017afec..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu32 (void)
-{
-  uint32x2x3_t out_uint32x2x3_t;
-
-  out_uint32x2x3_t = vld3_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
deleted file mode 100644
index 7bb5b6285b8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu64 (void)
-{
-  uint64x1x3_t out_uint64x1x3_t;
-
-  out_uint64x1x3_t = vld3_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
deleted file mode 100644
index f315786aff9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_dupu8 (void)
-{
-  uint8x8x3_t out_uint8x8x3_t;
-
-  out_uint8x8x3_t = vld3_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
deleted file mode 100644
index 4d7835313db..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanef32 (void)
-{
-  float32x2x3_t out_float32x2x3_t;
-  float32x2x3_t arg1_float32x2x3_t;
-
-  out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
deleted file mode 100644
index 6a3b87ac94e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanep16 (void)
-{
-  poly16x4x3_t out_poly16x4x3_t;
-  poly16x4x3_t arg1_poly16x4x3_t;
-
-  out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
deleted file mode 100644
index 41ac97d95d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanep8 (void)
-{
-  poly8x8x3_t out_poly8x8x3_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-
-  out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
deleted file mode 100644
index f74ffcea897..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanes16 (void)
-{
-  int16x4x3_t out_int16x4x3_t;
-  int16x4x3_t arg1_int16x4x3_t;
-
-  out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
deleted file mode 100644
index bc41477c1a6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanes32 (void)
-{
-  int32x2x3_t out_int32x2x3_t;
-  int32x2x3_t arg1_int32x2x3_t;
-
-  out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
deleted file mode 100644
index 995db24348e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_lanes8 (void)
-{
-  int8x8x3_t out_int8x8x3_t;
-  int8x8x3_t arg1_int8x8x3_t;
-
-  out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
deleted file mode 100644
index 63d22ca9cee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_laneu16 (void)
-{
-  uint16x4x3_t out_uint16x4x3_t;
-  uint16x4x3_t arg1_uint16x4x3_t;
-
-  out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
deleted file mode 100644
index 486db6dced7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_laneu32 (void)
-{
-  uint32x2x3_t out_uint32x2x3_t;
-  uint32x2x3_t arg1_uint32x2x3_t;
-
-  out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
deleted file mode 100644
index b5ea2fb30cb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld3_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3_laneu8 (void)
-{
-  uint8x8x3_t out_uint8x8x3_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-
-  out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c b/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
deleted file mode 100644
index 79e1a4ac860..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3f32 (void)
-{
-  float32x2x3_t out_float32x2x3_t;
-
-  out_float32x2x3_t = vld3_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c b/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
deleted file mode 100644
index 5e053a2dbe2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3p16 (void)
-{
-  poly16x4x3_t out_poly16x4x3_t;
-
-  out_poly16x4x3_t = vld3_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p64.c b/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
deleted file mode 100644
index 8fbc95e35d5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld3p64 (void)
-{
-  poly64x1x3_t out_poly64x1x3_t;
-
-  out_poly64x1x3_t = vld3_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c b/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
deleted file mode 100644
index f15b9685086..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3p8 (void)
-{
-  poly8x8x3_t out_poly8x8x3_t;
-
-  out_poly8x8x3_t = vld3_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c b/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
deleted file mode 100644
index ed5e24d41df..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s16 (void)
-{
-  int16x4x3_t out_int16x4x3_t;
-
-  out_int16x4x3_t = vld3_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c b/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
deleted file mode 100644
index 6ad2b9a7266..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s32 (void)
-{
-  int32x2x3_t out_int32x2x3_t;
-
-  out_int32x2x3_t = vld3_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c b/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
deleted file mode 100644
index 14f8aa17fe0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s64 (void)
-{
-  int64x1x3_t out_int64x1x3_t;
-
-  out_int64x1x3_t = vld3_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c b/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
deleted file mode 100644
index 2192499d16a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3s8 (void)
-{
-  int8x8x3_t out_int8x8x3_t;
-
-  out_int8x8x3_t = vld3_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c b/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
deleted file mode 100644
index 5fd1a01f53f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u16 (void)
-{
-  uint16x4x3_t out_uint16x4x3_t;
-
-  out_uint16x4x3_t = vld3_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c b/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
deleted file mode 100644
index 4ae8217bdf9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u32 (void)
-{
-  uint32x2x3_t out_uint32x2x3_t;
-
-  out_uint32x2x3_t = vld3_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c b/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
deleted file mode 100644
index c6d76268027..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u64 (void)
-{
-  uint64x1x3_t out_uint64x1x3_t;
-
-  out_uint64x1x3_t = vld3_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c b/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
deleted file mode 100644
index e3363393cf5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld3u8 (void)
-{
-  uint8x8x3_t out_uint8x8x3_t;
-
-  out_uint8x8x3_t = vld3_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
deleted file mode 100644
index dfac62755fa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanef32 (void)
-{
-  float32x4x4_t out_float32x4x4_t;
-  float32x4x4_t arg1_float32x4x4_t;
-
-  out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
deleted file mode 100644
index 6ed339d6406..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanep16 (void)
-{
-  poly16x8x4_t out_poly16x8x4_t;
-  poly16x8x4_t arg1_poly16x8x4_t;
-
-  out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
deleted file mode 100644
index 3683e7e295d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanes16 (void)
-{
-  int16x8x4_t out_int16x8x4_t;
-  int16x8x4_t arg1_int16x8x4_t;
-
-  out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
deleted file mode 100644
index 1d25eb113c6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_lanes32 (void)
-{
-  int32x4x4_t out_int32x4x4_t;
-  int32x4x4_t arg1_int32x4x4_t;
-
-  out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
deleted file mode 100644
index 75848c3bb43..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_laneu16 (void)
-{
-  uint16x8x4_t out_uint16x8x4_t;
-  uint16x8x4_t arg1_uint16x8x4_t;
-
-  out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
deleted file mode 100644
index 9201bdc9068..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Q_laneu32 (void)
-{
-  uint32x4x4_t out_uint32x4x4_t;
-  uint32x4x4_t arg1_uint32x4x4_t;
-
-  out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
deleted file mode 100644
index 199c4bb7f77..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qf32 (void)
-{
-  float32x4x4_t out_float32x4x4_t;
-
-  out_float32x4x4_t = vld4q_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
deleted file mode 100644
index f6638a17c60..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qp16 (void)
-{
-  poly16x8x4_t out_poly16x8x4_t;
-
-  out_poly16x8x4_t = vld4q_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
deleted file mode 100644
index a9a8c52edae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qp8 (void)
-{
-  poly8x16x4_t out_poly8x16x4_t;
-
-  out_poly8x16x4_t = vld4q_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
deleted file mode 100644
index 6f7e84df767..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qs16 (void)
-{
-  int16x8x4_t out_int16x8x4_t;
-
-  out_int16x8x4_t = vld4q_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
deleted file mode 100644
index e71d6fedddb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qs32 (void)
-{
-  int32x4x4_t out_int32x4x4_t;
-
-  out_int32x4x4_t = vld4q_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
deleted file mode 100644
index 30d4dea4bef..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qs8 (void)
-{
-  int8x16x4_t out_int8x16x4_t;
-
-  out_int8x16x4_t = vld4q_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
deleted file mode 100644
index 9d737bac4c8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qu16 (void)
-{
-  uint16x8x4_t out_uint16x8x4_t;
-
-  out_uint16x8x4_t = vld4q_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
deleted file mode 100644
index 7d46e2f82e5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qu32 (void)
-{
-  uint32x4x4_t out_uint32x4x4_t;
-
-  out_uint32x4x4_t = vld4q_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
deleted file mode 100644
index 4484cda621e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4Qu8 (void)
-{
-  uint8x16x4_t out_uint8x16x4_t;
-
-  out_uint8x16x4_t = vld4q_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
deleted file mode 100644
index e59fb125133..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupf32 (void)
-{
-  float32x2x4_t out_float32x2x4_t;
-
-  out_float32x2x4_t = vld4_dup_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
deleted file mode 100644
index 4426298d512..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupp16 (void)
-{
-  poly16x4x4_t out_poly16x4x4_t;
-
-  out_poly16x4x4_t = vld4_dup_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
deleted file mode 100644
index da0691189b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupp64 (void)
-{
-  poly64x1x4_t out_poly64x1x4_t;
-
-  out_poly64x1x4_t = vld4_dup_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
deleted file mode 100644
index 936c91e675b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupp8 (void)
-{
-  poly8x8x4_t out_poly8x8x4_t;
-
-  out_poly8x8x4_t = vld4_dup_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
deleted file mode 100644
index f7a35e94f0d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups16 (void)
-{
-  int16x4x4_t out_int16x4x4_t;
-
-  out_int16x4x4_t = vld4_dup_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
deleted file mode 100644
index 7ead80ca82e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups32 (void)
-{
-  int32x2x4_t out_int32x2x4_t;
-
-  out_int32x2x4_t = vld4_dup_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
deleted file mode 100644
index 4420628e374..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups64 (void)
-{
-  int64x1x4_t out_int64x1x4_t;
-
-  out_int64x1x4_t = vld4_dup_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
deleted file mode 100644
index 03f3d884a00..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dups8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dups8 (void)
-{
-  int8x8x4_t out_int8x8x4_t;
-
-  out_int8x8x4_t = vld4_dup_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
deleted file mode 100644
index 3d084933da5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu16 (void)
-{
-  uint16x4x4_t out_uint16x4x4_t;
-
-  out_uint16x4x4_t = vld4_dup_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
deleted file mode 100644
index 0f61908f7d5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu32 (void)
-{
-  uint32x2x4_t out_uint32x2x4_t;
-
-  out_uint32x2x4_t = vld4_dup_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
deleted file mode 100644
index c2f00ff29dc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu64 (void)
-{
-  uint64x1x4_t out_uint64x1x4_t;
-
-  out_uint64x1x4_t = vld4_dup_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
deleted file mode 100644
index ee4c67412e2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4_dupu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_dupu8 (void)
-{
-  uint8x8x4_t out_uint8x8x4_t;
-
-  out_uint8x8x4_t = vld4_dup_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
deleted file mode 100644
index 3f293d1e2b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanef32 (void)
-{
-  float32x2x4_t out_float32x2x4_t;
-  float32x2x4_t arg1_float32x2x4_t;
-
-  out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
deleted file mode 100644
index 94d24af3c3c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanep16 (void)
-{
-  poly16x4x4_t out_poly16x4x4_t;
-  poly16x4x4_t arg1_poly16x4x4_t;
-
-  out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
deleted file mode 100644
index 1bcb3e12190..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanep8 (void)
-{
-  poly8x8x4_t out_poly8x8x4_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-
-  out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
deleted file mode 100644
index fbaeadbb0ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanes16 (void)
-{
-  int16x4x4_t out_int16x4x4_t;
-  int16x4x4_t arg1_int16x4x4_t;
-
-  out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
deleted file mode 100644
index 7f9cc0c55fd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanes32 (void)
-{
-  int32x2x4_t out_int32x2x4_t;
-  int32x2x4_t arg1_int32x2x4_t;
-
-  out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
deleted file mode 100644
index 637361c3ffa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_lanes8 (void)
-{
-  int8x8x4_t out_int8x8x4_t;
-  int8x8x4_t arg1_int8x8x4_t;
-
-  out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
deleted file mode 100644
index a0d98a42116..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_laneu16 (void)
-{
-  uint16x4x4_t out_uint16x4x4_t;
-  uint16x4x4_t arg1_uint16x4x4_t;
-
-  out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
deleted file mode 100644
index a6913987059..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_laneu32 (void)
-{
-  uint32x2x4_t out_uint32x2x4_t;
-  uint32x2x4_t arg1_uint32x2x4_t;
-
-  out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
deleted file mode 100644
index 48a60b3d05d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vld4_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4_laneu8 (void)
-{
-  uint8x8x4_t out_uint8x8x4_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-
-  out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c b/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
deleted file mode 100644
index c3de78f020b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4f32 (void)
-{
-  float32x2x4_t out_float32x2x4_t;
-
-  out_float32x2x4_t = vld4_f32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c b/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
deleted file mode 100644
index 8909bd498dd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4p16 (void)
-{
-  poly16x4x4_t out_poly16x4x4_t;
-
-  out_poly16x4x4_t = vld4_p16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p64.c b/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
deleted file mode 100644
index eda3bc5bb50..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vld4p64 (void)
-{
-  poly64x1x4_t out_poly64x1x4_t;
-
-  out_poly64x1x4_t = vld4_p64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c b/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
deleted file mode 100644
index c77b2231349..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4p8 (void)
-{
-  poly8x8x4_t out_poly8x8x4_t;
-
-  out_poly8x8x4_t = vld4_p8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c b/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
deleted file mode 100644
index 052a84319e6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s16 (void)
-{
-  int16x4x4_t out_int16x4x4_t;
-
-  out_int16x4x4_t = vld4_s16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c b/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
deleted file mode 100644
index ce9bbaacc40..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s32 (void)
-{
-  int32x2x4_t out_int32x2x4_t;
-
-  out_int32x2x4_t = vld4_s32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c b/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
deleted file mode 100644
index 537ece0b83a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s64 (void)
-{
-  int64x1x4_t out_int64x1x4_t;
-
-  out_int64x1x4_t = vld4_s64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c b/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
deleted file mode 100644
index c7c33e693da..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4s8 (void)
-{
-  int8x8x4_t out_int8x8x4_t;
-
-  out_int8x8x4_t = vld4_s8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c b/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
deleted file mode 100644
index bb602fa5275..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u16 (void)
-{
-  uint16x4x4_t out_uint16x4x4_t;
-
-  out_uint16x4x4_t = vld4_u16 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c b/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
deleted file mode 100644
index 680d1f0914f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u32 (void)
-{
-  uint32x2x4_t out_uint32x2x4_t;
-
-  out_uint32x2x4_t = vld4_u32 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c b/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
deleted file mode 100644
index 304aff0ed28..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u64 (void)
-{
-  uint64x1x4_t out_uint64x1x4_t;
-
-  out_uint64x1x4_t = vld4_u64 (0);
-}
-
-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c b/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
deleted file mode 100644
index 8972de14d48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vld4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vld4u8 (void)
-{
-  uint8x8x4_t out_uint8x8x4_t;
-
-  out_uint8x8x4_t = vld4_u8 (0);
-}
-
-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
deleted file mode 100644
index c39fef34147..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vmaxq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
deleted file mode 100644
index 57359f4584a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vmaxq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
deleted file mode 100644
index bf2853fa13a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vmaxq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
deleted file mode 100644
index f25da0183b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vmaxq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
deleted file mode 100644
index 58707fd63b5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vmaxq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
deleted file mode 100644
index 3b9a02e6e59..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vmaxq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
deleted file mode 100644
index 1543c942240..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vmaxq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
deleted file mode 100644
index c9edda1c890..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmax_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
deleted file mode 100644
index cb262e93017..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmax_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
deleted file mode 100644
index 0078e3ef140..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmax_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
deleted file mode 100644
index b60efd2d172..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vmax_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
deleted file mode 100644
index 0c31be4ebd1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
deleted file mode 100644
index 6ed09a8bd4a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c b/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
deleted file mode 100644
index 4041d8753a7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmaxu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmaxu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQf32.c b/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
deleted file mode 100644
index a8138931bae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vminq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs16.c b/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
deleted file mode 100644
index 56b3dfa1c49..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vminq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs32.c b/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
deleted file mode 100644
index 6a4b9ff3646..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vminq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQs8.c b/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
deleted file mode 100644
index aa4269c51a2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vminq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu16.c b/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
deleted file mode 100644
index 81c4578f83d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vminq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu32.c b/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
deleted file mode 100644
index 7bd31afd5e7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vminq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminQu8.c b/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
deleted file mode 100644
index aeb5d44e702..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vminq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminf32.c b/gcc/testsuite/gcc.target/arm/neon/vminf32.c
deleted file mode 100644
index ded40aa8b54..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmin_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins16.c b/gcc/testsuite/gcc.target/arm/neon/vmins16.c
deleted file mode 100644
index 0cc84017398..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmins16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmins16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmins16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmin_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins32.c b/gcc/testsuite/gcc.target/arm/neon/vmins32.c
deleted file mode 100644
index c8f86afda36..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmins32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmins32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmins32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmin_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmins8.c b/gcc/testsuite/gcc.target/arm/neon/vmins8.c
deleted file mode 100644
index 6ed9d82b4a0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmins8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmins8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmins8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vmin_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu16.c b/gcc/testsuite/gcc.target/arm/neon/vminu16.c
deleted file mode 100644
index f97165882be..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu32.c b/gcc/testsuite/gcc.target/arm/neon/vminu32.c
deleted file mode 100644
index a1c84552965..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vminu8.c b/gcc/testsuite/gcc.target/arm/neon/vminu8.c
deleted file mode 100644
index b810e860319..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vminu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vminu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vminu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
deleted file mode 100644
index ba2b0ebebbd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x4_t = vmlaq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
deleted file mode 100644
index 81b14d286f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x8_t = vmlaq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
deleted file mode 100644
index f1373c713e5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x4_t = vmlaq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
deleted file mode 100644
index b8ec20a07f3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x8_t = vmlaq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
deleted file mode 100644
index 03f9465c7ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x4_t = vmlaq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
deleted file mode 100644
index 0fa53da254e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32_t arg2_float32_t;
-
-  out_float32x4_t = vmlaq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
deleted file mode 100644
index da3ae943125..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16_t arg2_int16_t;
-
-  out_int16x8_t = vmlaq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
deleted file mode 100644
index 1f206f22d37..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32_t arg2_int32_t;
-
-  out_int32x4_t = vmlaq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
deleted file mode 100644
index 4f8da8333cf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x8_t = vmlaq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
deleted file mode 100644
index 0af4c20903f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x4_t = vmlaq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
deleted file mode 100644
index 2c4a6e7eb0b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vmlaq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
deleted file mode 100644
index b28d1cac89d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vmlaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
deleted file mode 100644
index 9c025734e02..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vmlaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
deleted file mode 100644
index 6a2deca3a18..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vmlaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
deleted file mode 100644
index 7f795f66649..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vmlaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
deleted file mode 100644
index e9765266cdd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vmlaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
deleted file mode 100644
index ebfcd7f81cb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vmlaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
deleted file mode 100644
index a58bb7072be..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmla_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
deleted file mode 100644
index 0a98e6440f2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmla_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
deleted file mode 100644
index 7ce690c1316..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmla_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
deleted file mode 100644
index c44e70f765f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmla_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
deleted file mode 100644
index 20f637f6de9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmla_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
deleted file mode 100644
index 7c88491bcba..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32_t arg2_float32_t;
-
-  out_float32x2_t = vmla_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
deleted file mode 100644
index 1e6681ecc3b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int16x4_t = vmla_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
deleted file mode 100644
index fe443758245..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int32x2_t = vmla_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
deleted file mode 100644
index c39c7b46b7e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x4_t = vmla_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
deleted file mode 100644
index b87366f78be..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmla_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmla_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x2_t = vmla_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
deleted file mode 100644
index 827d4db32c9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlaf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlaf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmla_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
deleted file mode 100644
index f4bbe55910c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
deleted file mode 100644
index 24b581c9ffa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
deleted file mode 100644
index ea828b0562b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_laneu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlal_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
deleted file mode 100644
index 4641f9befb7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_laneu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlal_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
deleted file mode 100644
index 96f1429417b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
deleted file mode 100644
index 24f10163840..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
deleted file mode 100644
index 54bbdea073a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint32x4_t = vmlal_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
deleted file mode 100644
index 02909bbaff0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlal_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlal_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint64x2_t = vmlal_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals16.c b/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
deleted file mode 100644
index 777078d06e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlals16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals32.c b/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
deleted file mode 100644
index 65d964ea26a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlals32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlals8.c b/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
deleted file mode 100644
index 806a44988e1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlals8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlals8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int16x8_t = vmlal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
deleted file mode 100644
index a7cb797ef9b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlalu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlalu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
deleted file mode 100644
index bb71b9f77a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlalu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlalu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
deleted file mode 100644
index 0a191d88628..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlalu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlalu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint16x8_t = vmlal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas16.c b/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
deleted file mode 100644
index e36c5be2a14..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlas16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlas16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmla_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas32.c b/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
deleted file mode 100644
index c2d1fe6207e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlas32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlas32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmla_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlas8.c b/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
deleted file mode 100644
index 9ec20016753..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlas8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlas8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vmla_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau16.c b/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
deleted file mode 100644
index 7f4bd11f25d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlau16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlau16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmla_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau32.c b/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
deleted file mode 100644
index 12e524f3983..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlau32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlau32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmla_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlau8.c b/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
deleted file mode 100644
index f55e11b6a55..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlau8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlau8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vmla_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
deleted file mode 100644
index 24a20cd9d4f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x4_t = vmlsq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
deleted file mode 100644
index feb4178c3b2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x8_t = vmlsq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
deleted file mode 100644
index eb15872bceb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x4_t = vmlsq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
deleted file mode 100644
index 8a432ef9bc7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x8_t = vmlsq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
deleted file mode 100644
index 2aa122fc66a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x4_t = vmlsq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
deleted file mode 100644
index 41244639bfd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32_t arg2_float32_t;
-
-  out_float32x4_t = vmlsq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
deleted file mode 100644
index 0c76e047c0c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16_t arg2_int16_t;
-
-  out_int16x8_t = vmlsq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
deleted file mode 100644
index 62d13ca0b17..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32_t arg2_int32_t;
-
-  out_int32x4_t = vmlsq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
deleted file mode 100644
index cf31a92be28..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x8_t = vmlsq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
deleted file mode 100644
index 9788edc2c43..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x4_t = vmlsq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
deleted file mode 100644
index db405aba65e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-  float32x4_t arg2_float32x4_t;
-
-  out_float32x4_t = vmlsq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
deleted file mode 100644
index 5830224810a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-  int16x8_t arg2_int16x8_t;
-
-  out_int16x8_t = vmlsq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
deleted file mode 100644
index a331c399170..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-  int32x4_t arg2_int32x4_t;
-
-  out_int32x4_t = vmlsq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
deleted file mode 100644
index ab6844f52da..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-  int8x16_t arg2_int8x16_t;
-
-  out_int8x16_t = vmlsq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
deleted file mode 100644
index f7c160e87a7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-  uint16x8_t arg2_uint16x8_t;
-
-  out_uint16x8_t = vmlsq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
deleted file mode 100644
index 37b0bc7b031..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-  uint32x4_t arg2_uint32x4_t;
-
-  out_uint32x4_t = vmlsq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
deleted file mode 100644
index ea4b5fa30f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-  uint8x16_t arg2_uint8x16_t;
-
-  out_uint8x16_t = vmlsq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
deleted file mode 100644
index 9b1d38acc8a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmls_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
deleted file mode 100644
index 312d6ab4c08..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmls_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
deleted file mode 100644
index 21645d3202f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmls_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
deleted file mode 100644
index 8f78c0dee6c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmls_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
deleted file mode 100644
index c947edd3b52..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmls_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
deleted file mode 100644
index b99b4975eff..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32_t arg2_float32_t;
-
-  out_float32x2_t = vmls_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
deleted file mode 100644
index 97dda122307..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int16x4_t = vmls_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
deleted file mode 100644
index d0cd7f464b1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int32x2_t = vmls_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
deleted file mode 100644
index bee00e37764..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint16x4_t = vmls_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
deleted file mode 100644
index 94d6c0448d4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmls_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmls_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint32x2_t = vmls_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
deleted file mode 100644
index 49652319294..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-  float32x2_t arg2_float32x2_t;
-
-  out_float32x2_t = vmls_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
deleted file mode 100644
index fb065e8e5ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
deleted file mode 100644
index e89cd117c2f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
deleted file mode 100644
index c22f00bf9c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_laneu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlsl_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
deleted file mode 100644
index 1bb52ab5e96..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_laneu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlsl_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
deleted file mode 100644
index 65644f21f2a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
deleted file mode 100644
index 42688624e1d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
deleted file mode 100644
index 841ab448370..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16_t arg2_uint16_t;
-
-  out_uint32x4_t = vmlsl_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
deleted file mode 100644
index 2595b7186a2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsl_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsl_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32_t arg2_uint32_t;
-
-  out_uint64x2_t = vmlsl_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
deleted file mode 100644
index cec5695d5ed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
deleted file mode 100644
index f5fe87a0535..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
deleted file mode 100644
index 39754dfd65a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int16x8_t = vmlsl_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
deleted file mode 100644
index e5bebde8588..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlslu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlslu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint32x4_t = vmlsl_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
deleted file mode 100644
index 90f342d8e58..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlslu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlslu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint64x2_t = vmlsl_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
deleted file mode 100644
index 08a8e17e40a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlslu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlslu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint16x8_t = vmlsl_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmlsl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss16.c b/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
deleted file mode 100644
index f2e3c3e4335..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int16x4_t = vmls_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss32.c b/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
deleted file mode 100644
index 49f0a4e553c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int32x2_t = vmls_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlss8.c b/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
deleted file mode 100644
index 049d046160c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vmls_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
deleted file mode 100644
index e8ff81668f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-  uint16x4_t arg2_uint16x4_t;
-
-  out_uint16x4_t = vmls_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
deleted file mode 100644
index 31b24b22f76..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-  uint32x2_t arg2_uint32x2_t;
-
-  out_uint32x2_t = vmls_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c b/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
deleted file mode 100644
index 2221aa20168..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vmlsu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmlsu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vmls_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
deleted file mode 100644
index bc72ec491a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32_t arg0_float32_t;
-
-  out_float32x4_t = vmovq_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
deleted file mode 100644
index 13566e5ec4d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x8_t = vmovq_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
deleted file mode 100644
index eacd0aeeee8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x16_t = vmovq_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
deleted file mode 100644
index 2a214391de4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16_t arg0_int16_t;
-
-  out_int16x8_t = vmovq_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
deleted file mode 100644
index ede6b1507e4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32_t arg0_int32_t;
-
-  out_int32x4_t = vmovq_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
deleted file mode 100644
index 8cfd2d1b001..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmovQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64_t arg0_int64_t;
-
-  out_int64x2_t = vmovq_n_s64 (arg0_int64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
deleted file mode 100644
index 1fb2af86864..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8_t arg0_int8_t;
-
-  out_int8x16_t = vmovq_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
deleted file mode 100644
index 0e339459340..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x8_t = vmovq_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
deleted file mode 100644
index fe7bef183c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x4_t = vmovq_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
deleted file mode 100644
index 6092b324385..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmovQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
deleted file mode 100644
index ce2f2991028..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x16_t = vmovq_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
deleted file mode 100644
index 3b3368c0724..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32_t arg0_float32_t;
-
-  out_float32x2_t = vmov_n_f32 (arg0_float32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
deleted file mode 100644
index 1a3ae252479..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16_t arg0_poly16_t;
-
-  out_poly16x4_t = vmov_n_p16 (arg0_poly16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
deleted file mode 100644
index 8d4347b9ccb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8_t arg0_poly8_t;
-
-  out_poly8x8_t = vmov_n_p8 (arg0_poly8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
deleted file mode 100644
index b0e1b09ee6d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16_t arg0_int16_t;
-
-  out_int16x4_t = vmov_n_s16 (arg0_int16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
deleted file mode 100644
index cb1ae8746dd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32_t arg0_int32_t;
-
-  out_int32x2_t = vmov_n_s32 (arg0_int32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
deleted file mode 100644
index 2a11d2dbd77..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmov_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64_t arg0_int64_t;
-
-  out_int64x1_t = vmov_n_s64 (arg0_int64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
deleted file mode 100644
index c825eb126b1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8_t arg0_int8_t;
-
-  out_int8x8_t = vmov_n_s8 (arg0_int8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
deleted file mode 100644
index f17f837bfb7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16_t arg0_uint16_t;
-
-  out_uint16x4_t = vmov_n_u16 (arg0_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
deleted file mode 100644
index 80f948f7450..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32_t arg0_uint32_t;
-
-  out_uint32x2_t = vmov_n_u32 (arg0_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
deleted file mode 100644
index d9b9e601e69..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vmov_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-
-  out_uint64x1_t = vmov_n_u64 (arg0_uint64_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
deleted file mode 100644
index d3e3780a711..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmov_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmov_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8_t arg0_uint8_t;
-
-  out_uint8x8_t = vmov_n_u8 (arg0_uint8_t);
-}
-
-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls16.c b/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
deleted file mode 100644
index a9de06b122b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x4_t = vmovl_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls32.c b/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
deleted file mode 100644
index cf9572edb12..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x2_t = vmovl_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovls8.c b/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
deleted file mode 100644
index 156a81d9514..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x8_t = vmovl_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
deleted file mode 100644
index d19e416dc15..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovlu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x4_t = vmovl_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
deleted file mode 100644
index decb3a2b0f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovlu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x2_t = vmovl_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c b/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
deleted file mode 100644
index 7623ad6b6f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovlu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x8_t = vmovl_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns16.c b/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
deleted file mode 100644
index 91a30d1b6c3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vmovn_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns32.c b/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
deleted file mode 100644
index 66c5f87c88d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vmovn_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
deleted file mode 100644
index 03e10ec2ba8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vmovn_s64 (arg0_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
deleted file mode 100644
index c391e884eb6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vmovn_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
deleted file mode 100644
index f0105da6558..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vmovn_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
deleted file mode 100644
index 9809feccbb4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmovnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmovnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vmovn_u64 (arg0_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
deleted file mode 100644
index 1cc15bf9341..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x4_t = vmulq_lane_f32 (arg0_float32x4_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
deleted file mode 100644
index a78b272e803..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vmulq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
deleted file mode 100644
index 7b953cb57f7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vmulq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
deleted file mode 100644
index 4b9a0504030..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x8_t = vmulq_lane_u16 (arg0_uint16x8_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
deleted file mode 100644
index f1ff8d1df21..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x4_t = vmulq_lane_u32 (arg0_uint32x4_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
deleted file mode 100644
index f55bb7da986..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_nf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32_t arg1_float32_t;
-
-  out_float32x4_t = vmulq_n_f32 (arg0_float32x4_t, arg1_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
deleted file mode 100644
index e98e23c93dd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16_t arg1_int16_t;
-
-  out_int16x8_t = vmulq_n_s16 (arg0_int16x8_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
deleted file mode 100644
index 0c5d582041e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32_t arg1_int32_t;
-
-  out_int32x4_t = vmulq_n_s32 (arg0_int32x4_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
deleted file mode 100644
index 3ee2feeac74..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16_t arg1_uint16_t;
-
-  out_uint16x8_t = vmulq_n_u16 (arg0_uint16x8_t, arg1_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
deleted file mode 100644
index fb60d596c15..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32_t arg1_uint32_t;
-
-  out_uint32x4_t = vmulq_n_u32 (arg0_uint32x4_t, arg1_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
deleted file mode 100644
index f23e081f05c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vmulq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
deleted file mode 100644
index 104f2969b4b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vmulq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
deleted file mode 100644
index 9c8c42fb5e2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vmulq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
deleted file mode 100644
index c775f2f8a70..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vmulq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
deleted file mode 100644
index bc9ff895d97..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vmulq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
deleted file mode 100644
index 02df7228f8d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vmulq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
deleted file mode 100644
index 003fcf0a5ed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vmulq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
deleted file mode 100644
index cf6f980ebe9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vmulq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
deleted file mode 100644
index 8270c62d6c1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmul_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
deleted file mode 100644
index 676bd96803c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmul_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
deleted file mode 100644
index dd16c2186af..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmul_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
deleted file mode 100644
index 79a1c75feb2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmul_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
deleted file mode 100644
index cd27886c03b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmul_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
deleted file mode 100644
index bd60e74a2d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_nf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_nf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32_t arg1_float32_t;
-
-  out_float32x2_t = vmul_n_f32 (arg0_float32x2_t, arg1_float32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
deleted file mode 100644
index eb0c768d7de..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int16x4_t = vmul_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
deleted file mode 100644
index ba74d4e1b76..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int32x2_t = vmul_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
deleted file mode 100644
index 4048ff53987..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16_t arg1_uint16_t;
-
-  out_uint16x4_t = vmul_n_u16 (arg0_uint16x4_t, arg1_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
deleted file mode 100644
index 58f7e956c4d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmul_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmul_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32_t arg1_uint32_t;
-
-  out_uint32x2_t = vmul_n_u32 (arg0_uint32x2_t, arg1_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulf32.c b/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
deleted file mode 100644
index 14a7ad4bc6f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vmul_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
deleted file mode 100644
index 8a58638ead9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
deleted file mode 100644
index 6f19bd9bcc0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
deleted file mode 100644
index 97a723b12fa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_laneu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vmull_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
deleted file mode 100644
index c70fdd849de..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_laneu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vmull_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
deleted file mode 100644
index 7ee4335a61a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int32x4_t = vmull_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
deleted file mode 100644
index 7a7673cc996..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int64x2_t = vmull_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
deleted file mode 100644
index 8e4f3f9881e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16_t arg1_uint16_t;
-
-  out_uint32x4_t = vmull_n_u16 (arg0_uint16x4_t, arg1_uint16_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
deleted file mode 100644
index 1af7c551327..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmull_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmull_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32_t arg1_uint32_t;
-
-  out_uint64x2_t = vmull_n_u32 (arg0_uint32x2_t, arg1_uint32_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullp8.c b/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
deleted file mode 100644
index 7d160612fb8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullp8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly16x8_t = vmull_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls16.c b/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
deleted file mode 100644
index dcbcf26b96e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vmull_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls32.c b/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
deleted file mode 100644
index 7b001493bdc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vmull_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulls8.c b/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
deleted file mode 100644
index 926549c5015..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vmull_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu16.c b/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
deleted file mode 100644
index 08677927b37..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vmull_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu32.c b/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
deleted file mode 100644
index e2ff1126b3a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vmull_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmullu8.c b/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
deleted file mode 100644
index 1e893ab77bc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmullu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmullu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vmull_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmull\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulp8.c b/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
deleted file mode 100644
index 3b7505abe4b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vmul_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls16.c b/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
deleted file mode 100644
index 9eea7a60113..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmuls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmuls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vmul_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls32.c b/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
deleted file mode 100644
index fd53ac7b938..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmuls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmuls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vmul_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmuls8.c b/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
deleted file mode 100644
index 4359a2024bd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmuls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmuls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vmul_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu16.c b/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
deleted file mode 100644
index be192274892..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vmul_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu32.c b/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
deleted file mode 100644
index 476b9eeb054..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vmul_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmulu8.c b/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
deleted file mode 100644
index 0252b8fd2c0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vmulu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmulu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vmul_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
deleted file mode 100644
index 11665978ffa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vmvnq_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
deleted file mode 100644
index d8f5e1eb4ce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vmvnq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
deleted file mode 100644
index f737af5ae41..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vmvnq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
deleted file mode 100644
index 126c74db73a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vmvnq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
deleted file mode 100644
index a0cc6be20f6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vmvnq_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
deleted file mode 100644
index 0c2881b22b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vmvnq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
deleted file mode 100644
index d9730643eb9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vmvnq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
deleted file mode 100644
index a1139960f17..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnp8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vmvn_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns16.c b/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
deleted file mode 100644
index c9399c97798..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vmvn_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns32.c b/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
deleted file mode 100644
index fe3e522acd4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vmvn_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvns8.c b/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
deleted file mode 100644
index 3c394a3ccf3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vmvn_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
deleted file mode 100644
index 5b71863e778..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vmvn_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
deleted file mode 100644
index 58413f8923e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vmvn_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c b/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
deleted file mode 100644
index 44b2e8ca2d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vmvnu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vmvnu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vmvn_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c b/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
deleted file mode 100644
index 66e6729b0e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vnegq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
deleted file mode 100644
index cddcab6007a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vnegq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
deleted file mode 100644
index 439bf1b6866..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vnegq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c b/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
deleted file mode 100644
index 95db560d82d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vnegq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegf32.c b/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
deleted file mode 100644
index f2423dcb26f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vneg_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs16.c b/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
deleted file mode 100644
index 4c9bec22786..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vneg_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs32.c b/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
deleted file mode 100644
index 91f311afea6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vneg_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vnegs8.c b/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
deleted file mode 100644
index 45a7a9e5960..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vnegs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vnegs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vneg_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs16.c b/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
deleted file mode 100644
index aad296607dc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x8_t out_int16x8_t;
-int16x8_t arg0_int16x8_t;
-int16x8_t arg1_int16x8_t;
-void test_vornQs16 (void)
-{
-
-  out_int16x8_t = vornq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs32.c b/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
deleted file mode 100644
index 61e22a95971..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x4_t out_int32x4_t;
-int32x4_t arg0_int32x4_t;
-int32x4_t arg1_int32x4_t;
-void test_vornQs32 (void)
-{
-
-  out_int32x4_t = vornq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs64.c b/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
deleted file mode 100644
index 0d5d62dd528..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x2_t out_int64x2_t;
-int64x2_t arg0_int64x2_t;
-int64x2_t arg1_int64x2_t;
-void test_vornQs64 (void)
-{
-
-  out_int64x2_t = vornq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQs8.c b/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
deleted file mode 100644
index e68f760d36b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x16_t out_int8x16_t;
-int8x16_t arg0_int8x16_t;
-int8x16_t arg1_int8x16_t;
-void test_vornQs8 (void)
-{
-
-  out_int8x16_t = vornq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu16.c b/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
deleted file mode 100644
index fe52b81ff40..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x8_t out_uint16x8_t;
-uint16x8_t arg0_uint16x8_t;
-uint16x8_t arg1_uint16x8_t;
-void test_vornQu16 (void)
-{
-
-  out_uint16x8_t = vornq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu32.c b/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
deleted file mode 100644
index f311b77340f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x4_t out_uint32x4_t;
-uint32x4_t arg0_uint32x4_t;
-uint32x4_t arg1_uint32x4_t;
-void test_vornQu32 (void)
-{
-
-  out_uint32x4_t = vornq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu64.c b/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
deleted file mode 100644
index f5bfdacfa2c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x2_t out_uint64x2_t;
-uint64x2_t arg0_uint64x2_t;
-uint64x2_t arg1_uint64x2_t;
-void test_vornQu64 (void)
-{
-
-  out_uint64x2_t = vornq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornQu8.c b/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
deleted file mode 100644
index cb318c56e8d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x16_t out_uint8x16_t;
-uint8x16_t arg0_uint8x16_t;
-uint8x16_t arg1_uint8x16_t;
-void test_vornQu8 (void)
-{
-
-  out_uint8x16_t = vornq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns16.c b/gcc/testsuite/gcc.target/arm/neon/vorns16.c
deleted file mode 100644
index a47fcf426b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int16x4_t out_int16x4_t;
-int16x4_t arg0_int16x4_t;
-int16x4_t arg1_int16x4_t;
-void test_vorns16 (void)
-{
-
-  out_int16x4_t = vorn_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns32.c b/gcc/testsuite/gcc.target/arm/neon/vorns32.c
deleted file mode 100644
index dd86cab348b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int32x2_t out_int32x2_t;
-int32x2_t arg0_int32x2_t;
-int32x2_t arg1_int32x2_t;
-void test_vorns32 (void)
-{
-
-  out_int32x2_t = vorn_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns64.c b/gcc/testsuite/gcc.target/arm/neon/vorns64.c
deleted file mode 100644
index 0419574946c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vorns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int64x1_t out_int64x1_t;
-int64x1_t arg0_int64x1_t;
-int64x1_t arg1_int64x1_t;
-void test_vorns64 (void)
-{
-
-  out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns8.c b/gcc/testsuite/gcc.target/arm/neon/vorns8.c
deleted file mode 100644
index 76fd7e6afc7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-int8x8_t out_int8x8_t;
-int8x8_t arg0_int8x8_t;
-int8x8_t arg1_int8x8_t;
-void test_vorns8 (void)
-{
-
-  out_int8x8_t = vorn_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu16.c b/gcc/testsuite/gcc.target/arm/neon/vornu16.c
deleted file mode 100644
index a3a33ad0736..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint16x4_t out_uint16x4_t;
-uint16x4_t arg0_uint16x4_t;
-uint16x4_t arg1_uint16x4_t;
-void test_vornu16 (void)
-{
-
-  out_uint16x4_t = vorn_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu32.c b/gcc/testsuite/gcc.target/arm/neon/vornu32.c
deleted file mode 100644
index 649b26c28d1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint32x2_t out_uint32x2_t;
-uint32x2_t arg0_uint32x2_t;
-uint32x2_t arg1_uint32x2_t;
-void test_vornu32 (void)
-{
-
-  out_uint32x2_t = vorn_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu64.c b/gcc/testsuite/gcc.target/arm/neon/vornu64.c
deleted file mode 100644
index 9bf3936b146..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vornu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint64x1_t out_uint64x1_t;
-uint64x1_t arg0_uint64x1_t;
-uint64x1_t arg1_uint64x1_t;
-void test_vornu64 (void)
-{
-
-  out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu8.c b/gcc/testsuite/gcc.target/arm/neon/vornu8.c
deleted file mode 100644
index 6a04641ee95..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vornu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vornu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-uint8x8_t out_uint8x8_t;
-uint8x8_t arg0_uint8x8_t;
-uint8x8_t arg1_uint8x8_t;
-void test_vornu8 (void)
-{
-
-  out_uint8x8_t = vorn_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
deleted file mode 100644
index b7318d5d780..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vorrq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
deleted file mode 100644
index 3b0ffb79f31..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vorrq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
deleted file mode 100644
index e0fde9e3307..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vorrq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c b/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
deleted file mode 100644
index bd1e41120ff..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vorrq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
deleted file mode 100644
index 7df1c163b46..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vorrq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
deleted file mode 100644
index 1846888e211..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vorrq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
deleted file mode 100644
index a3b68973d03..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vorrq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c b/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
deleted file mode 100644
index 43850cc515e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vorrq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs16.c b/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
deleted file mode 100644
index 7b6ec0bfc31..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vorr_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs32.c b/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
deleted file mode 100644
index 42201599188..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vorr_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c b/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
deleted file mode 100644
index 48237795c04..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vorrs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs8.c b/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
deleted file mode 100644
index fc0c7b9d682..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorrs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorrs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vorr_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru16.c b/gcc/testsuite/gcc.target/arm/neon/vorru16.c
deleted file mode 100644
index c9e4cba7afb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorru16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vorr_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru32.c b/gcc/testsuite/gcc.target/arm/neon/vorru32.c
deleted file mode 100644
index 8683e217911..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorru32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vorr_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru64.c b/gcc/testsuite/gcc.target/arm/neon/vorru64.c
deleted file mode 100644
index d04471338eb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vorru64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru8.c b/gcc/testsuite/gcc.target/arm/neon/vorru8.c
deleted file mode 100644
index 7422b5fa107..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vorru8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vorru8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vorru8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vorr_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
deleted file mode 100644
index 2a69afc8dac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQs16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int32x4_t = vpadalq_s16 (arg0_int32x4_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
deleted file mode 100644
index 76d0b6e73c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQs32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int64x2_t = vpadalq_s32 (arg0_int64x2_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
deleted file mode 100644
index 4d3bf1db902..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQs8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int16x8_t = vpadalq_s8 (arg0_int16x8_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
deleted file mode 100644
index f7ef5366322..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint32x4_t = vpadalq_u16 (arg0_uint32x4_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
deleted file mode 100644
index 2a0f8218330..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint64x2_t = vpadalq_u32 (arg0_uint64x2_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
deleted file mode 100644
index d4c233b307b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalQu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint16x8_t = vpadalq_u8 (arg0_uint16x8_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals16.c b/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
deleted file mode 100644
index d49c2ff8941..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadals16 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x2_t = vpadal_s16 (arg0_int32x2_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals32.c b/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
deleted file mode 100644
index b79746e339d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadals32 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x1_t = vpadal_s32 (arg0_int64x1_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadals8.c b/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
deleted file mode 100644
index cfde84939b5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadals8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadals8 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x4_t = vpadal_s8 (arg0_int16x4_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
deleted file mode 100644
index 4b1777dd8ed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalu16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x2_t = vpadal_u16 (arg0_uint32x2_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
deleted file mode 100644
index 772f0cb3813..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalu32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x1_t = vpadal_u32 (arg0_uint64x1_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c b/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
deleted file mode 100644
index 700bf26305b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadalu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadalu8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x4_t = vpadal_u8 (arg0_uint16x4_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
deleted file mode 100644
index d6f78464808..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vpadd_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
deleted file mode 100644
index f08fa8356f2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQs16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int32x4_t = vpaddlq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
deleted file mode 100644
index 06305eb0184..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQs32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int64x2_t = vpaddlq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
deleted file mode 100644
index ef17b07f342..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQs8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int16x8_t = vpaddlq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
deleted file mode 100644
index b301c91669e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint32x4_t = vpaddlq_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
deleted file mode 100644
index 77eaf83971f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint64x2_t = vpaddlq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
deleted file mode 100644
index 06a99027a8e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlQu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint16x8_t = vpaddlq_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
deleted file mode 100644
index 28e0cfa2afe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddls16 (void)
-{
-  int32x2_t out_int32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x2_t = vpaddl_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
deleted file mode 100644
index 32de704f56e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddls32 (void)
-{
-  int64x1_t out_int64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x1_t = vpaddl_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
deleted file mode 100644
index c31ce4d16a4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddls8 (void)
-{
-  int16x4_t out_int16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x4_t = vpaddl_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
deleted file mode 100644
index 575b93e2b9d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlu16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x2_t = vpaddl_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
deleted file mode 100644
index 58f7b56cd20..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlu32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x1_t = vpaddl_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
deleted file mode 100644
index 458a4ecf692..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vpaddlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddlu8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x4_t = vpaddl_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds16.c b/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
deleted file mode 100644
index 962f82796ce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vpadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds32.c b/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
deleted file mode 100644
index 983f67cd253..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vpadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpadds8.c b/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
deleted file mode 100644
index 4985bd1d3bc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vpadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
deleted file mode 100644
index aa8942d7d43..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vpadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
deleted file mode 100644
index 84b8573e821..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vpadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
deleted file mode 100644
index c59f99e56eb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vpadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
deleted file mode 100644
index 4f329f06744..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vpmax_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
deleted file mode 100644
index 42c06c1d4f3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vpmax_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
deleted file mode 100644
index 3f8b31e1671..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vpmax_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
deleted file mode 100644
index 3162b496805..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vpmax_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
deleted file mode 100644
index 195a0ba524a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vpmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
deleted file mode 100644
index 263b9be27f6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vpmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c b/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
deleted file mode 100644
index ba4202ea82a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmaxu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmaxu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vpmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminf32.c b/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
deleted file mode 100644
index f754a16858b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vpmin_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins16.c b/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
deleted file mode 100644
index 14da69509c2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmins16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmins16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vpmin_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins32.c b/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
deleted file mode 100644
index 324c5246d0a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmins32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmins32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vpmin_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpmins8.c b/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
deleted file mode 100644
index f8fecafebb3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpmins8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpmins8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vpmin_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu16.c b/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
deleted file mode 100644
index 06e18d193df..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vpmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu32.c b/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
deleted file mode 100644
index b256311ff6e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vpmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vpminu8.c b/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
deleted file mode 100644
index 04a3afafcc9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vpminu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vpminu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vpmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vpmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
deleted file mode 100644
index e4b3b2b3347..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vqrdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
deleted file mode 100644
index 9191d332d34..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vqrdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
deleted file mode 100644
index fb30e260fbc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16_t arg1_int16_t;
-
-  out_int16x8_t = vqrdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
deleted file mode 100644
index 827b323ee30..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32_t arg1_int32_t;
-
-  out_int32x4_t = vqrdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
deleted file mode 100644
index 30f71f01211..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqrdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
deleted file mode 100644
index 467b0c9efd9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqrdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
deleted file mode 100644
index 5b303ad1cc2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqrdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
deleted file mode 100644
index 3e8149a3576..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqrdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
deleted file mode 100644
index 1495e40e88b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int16x4_t = vqrdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
deleted file mode 100644
index 7ecd731092e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulh_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulh_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int32x2_t = vqrdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
deleted file mode 100644
index be260b45c47..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqrdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
deleted file mode 100644
index 5b243538f4b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRdmulhs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRdmulhs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqrdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
deleted file mode 100644
index 366269e3a58..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
deleted file mode 100644
index 084e760b657..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
deleted file mode 100644
index e74623f16d5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
deleted file mode 100644
index b347ab9de5d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
deleted file mode 100644
index 34c3c140404..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vqrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
deleted file mode 100644
index 7006ce02bc6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vqrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
deleted file mode 100644
index d3354021776..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vqrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
deleted file mode 100644
index 5252754efcb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vqrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
deleted file mode 100644
index 498c7883d79..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqrshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
deleted file mode 100644
index b46fd76ca1c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqrshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
deleted file mode 100644
index 844f2ed6d4f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqrshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
deleted file mode 100644
index c238d5bc46f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqrshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
deleted file mode 100644
index 24a296727d0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vqrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
deleted file mode 100644
index 10df112a135..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vqrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
deleted file mode 100644
index a0ef539ddde..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vqrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
deleted file mode 100644
index b9fefe75e3b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqRshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vqrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
deleted file mode 100644
index a6b9f882f38..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vqrshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
deleted file mode 100644
index 30393e9fbac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vqrshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
deleted file mode 100644
index 1ce5f77ca89..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vqrshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
deleted file mode 100644
index d869ff91512..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vqrshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
deleted file mode 100644
index 7281f7cb1a6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vqrshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
deleted file mode 100644
index f7e69137ec8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vqrshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
deleted file mode 100644
index f1355be5619..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrun_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrun_ns16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x8_t = vqrshrun_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
deleted file mode 100644
index 55991a4f501..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrun_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrun_ns32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x4_t = vqrshrun_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
deleted file mode 100644
index 80830ef20f6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqRshrun_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqRshrun_ns64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x2_t = vqrshrun_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqrshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
deleted file mode 100644
index dbf857b955e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabsQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabsQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vqabsq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
deleted file mode 100644
index ccad63a36ca..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabsQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabsQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vqabsq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
deleted file mode 100644
index 128d93077da..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabsQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabsQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vqabsq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss16.c b/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
deleted file mode 100644
index 9f503f3fa0f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabss16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabss16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vqabs_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss32.c b/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
deleted file mode 100644
index 4d80b1ed0e8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabss32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabss32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vqabs_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqabss8.c b/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
deleted file mode 100644
index 28e45838eae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqabss8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqabss8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vqabs_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
deleted file mode 100644
index d47b572a5f7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
deleted file mode 100644
index 5d86a1a4e08..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
deleted file mode 100644
index 39c11cf8962..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqaddq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
deleted file mode 100644
index 494ba882432..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
deleted file mode 100644
index 5c99991b962..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vqaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
deleted file mode 100644
index 9e006a3ab7c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vqaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
deleted file mode 100644
index e52000a917c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vqaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
deleted file mode 100644
index b5878750c46..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vqaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds16.c b/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
deleted file mode 100644
index ddfbb2ebeb0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds32.c b/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
deleted file mode 100644
index 9155ca62478..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds64.c b/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
deleted file mode 100644
index 11121d8229c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqadds8.c b/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
deleted file mode 100644
index dff10c7156c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqadds8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqadds8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
deleted file mode 100644
index 5d140c0a3ed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vqadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
deleted file mode 100644
index bd1678cf03d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vqadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
deleted file mode 100644
index 9d57f74b8d5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vqadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c b/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
deleted file mode 100644
index abf7c9c6576..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqaddu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqaddu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vqadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
deleted file mode 100644
index a8fa44249e2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
deleted file mode 100644
index d145a42070a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
deleted file mode 100644
index ce9454936b8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vqdmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
deleted file mode 100644
index c9506290299..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlal_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlal_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vqdmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
deleted file mode 100644
index a55c391b9a5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlals16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlals16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
deleted file mode 100644
index e91ef3b220e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlals32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlals32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
deleted file mode 100644
index 362e63a72fc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
deleted file mode 100644
index 3d8700fcf98..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
deleted file mode 100644
index 39b54eeeb93..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16_t arg2_int16_t;
-
-  out_int32x4_t = vqdmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
deleted file mode 100644
index 440c9e6dfc9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsl_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32_t arg2_int32_t;
-
-  out_int64x2_t = vqdmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
deleted file mode 100644
index d4a9d378e48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-  int16x4_t arg2_int16x4_t;
-
-  out_int32x4_t = vqdmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
deleted file mode 100644
index fb20e98aa1c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vqdmlsls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmlsls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-  int32x2_t arg2_int32x2_t;
-
-  out_int64x2_t = vqdmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
deleted file mode 100644
index 8067154f44d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x8_t = vqdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
deleted file mode 100644
index 41902bc6e25..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x4_t = vqdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
deleted file mode 100644
index fe0c768d3d1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16_t arg1_int16_t;
-
-  out_int16x8_t = vqdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
deleted file mode 100644
index 7070654f904..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32_t arg1_int32_t;
-
-  out_int32x4_t = vqdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
deleted file mode 100644
index ddc6b08d259..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
deleted file mode 100644
index 3ae8af193c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
deleted file mode 100644
index 648515a32c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
deleted file mode 100644
index 075e85efa30..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
deleted file mode 100644
index d33cc6eeb32..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int16x4_t = vqdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
deleted file mode 100644
index 4ff7e93a286..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulh_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulh_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int32x2_t = vqdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
deleted file mode 100644
index 57403bfdaec..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
deleted file mode 100644
index 6ae9d34c737..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulhs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulhs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
deleted file mode 100644
index 4257793fdae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_lanes16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vqdmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
deleted file mode 100644
index 874f890da31..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_lanes32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vqdmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
deleted file mode 100644
index aa60ce34461..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16_t arg1_int16_t;
-
-  out_int32x4_t = vqdmull_n_s16 (arg0_int16x4_t, arg1_int16_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
deleted file mode 100644
index 7734d76ca4b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmull_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmull_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32_t arg1_int32_t;
-
-  out_int64x2_t = vqdmull_n_s32 (arg0_int32x2_t, arg1_int32_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
deleted file mode 100644
index 876bc78907c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vqdmull_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c b/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
deleted file mode 100644
index ebc2062e935..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqdmulls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqdmulls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vqdmull_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
deleted file mode 100644
index 56d1764743b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vqmovn_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
deleted file mode 100644
index 086290c3dea..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vqmovn_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
deleted file mode 100644
index 4f61c28baf0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vqmovn_s64 (arg0_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
deleted file mode 100644
index 294963cffc4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vqmovn_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
deleted file mode 100644
index a580dd60df2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vqmovn_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
deleted file mode 100644
index e07cd8830d3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vqmovn_u64 (arg0_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqmovn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
deleted file mode 100644
index 82fdc20e8b3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovuns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovuns16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x8_t = vqmovun_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqmovun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
deleted file mode 100644
index e56d890547a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovuns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovuns32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x4_t = vqmovun_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqmovun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c b/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
deleted file mode 100644
index 06ad7e13f15..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqmovuns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqmovuns64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x2_t = vqmovun_s64 (arg0_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqmovun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
deleted file mode 100644
index 9a6c854b507..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vqnegq_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
deleted file mode 100644
index a93366f5487..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vqnegq_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
deleted file mode 100644
index c566b49d699..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vqnegq_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
deleted file mode 100644
index dbff5c0b4c2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vqneg_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
deleted file mode 100644
index 2000358ceee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vqneg_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c b/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
deleted file mode 100644
index beb3d552db3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqnegs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqnegs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vqneg_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
deleted file mode 100644
index 480ead65813..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vqshlq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
deleted file mode 100644
index 1a0c61af2f3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vqshlq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
deleted file mode 100644
index a6723cea300..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vqshlq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
deleted file mode 100644
index 676781775fa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vqshlq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
deleted file mode 100644
index 565b965fdd4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vqshlq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
deleted file mode 100644
index 5d31d8c0119..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vqshlq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
deleted file mode 100644
index 4d5f88dfa79..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vqshlq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
deleted file mode 100644
index 2dacefea3eb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vqshlq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
deleted file mode 100644
index 78681977b3c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
deleted file mode 100644
index 6de5599ee6e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
deleted file mode 100644
index 395fd1a43b4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
deleted file mode 100644
index 58e2a51f0f1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
deleted file mode 100644
index 080ce27c952..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vqshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
deleted file mode 100644
index cc47ed5425b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vqshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
deleted file mode 100644
index 98cfb5596c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vqshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
deleted file mode 100644
index 1ff3dfa07d0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vqshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
deleted file mode 100644
index 4aa57606dbd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vqshl_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
deleted file mode 100644
index f42085df06b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vqshl_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
deleted file mode 100644
index 45c9b61b9b9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vqshl_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
deleted file mode 100644
index 2263fd60327..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vqshl_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
deleted file mode 100644
index 926c91d2d30..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vqshl_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
deleted file mode 100644
index 3a4342782d4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vqshl_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
deleted file mode 100644
index 992b15c8fbe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vqshl_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
deleted file mode 100644
index e0cfa5e2336..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshl_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshl_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vqshl_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls16.c b/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
deleted file mode 100644
index bd412025ba4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls32.c b/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
deleted file mode 100644
index 487f6039237..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls64.c b/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
deleted file mode 100644
index 2d2ebaea18e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshls8.c b/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
deleted file mode 100644
index f9df74e285b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
deleted file mode 100644
index 75c98ca2ad4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vqshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
deleted file mode 100644
index 3304981c76c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vqshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
deleted file mode 100644
index e4ff98fc889..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vqshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
deleted file mode 100644
index 9b61f4e49b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vqshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
deleted file mode 100644
index 6fe58908f09..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint16x8_t = vqshluq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
deleted file mode 100644
index 78ae2f539e8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint32x4_t = vqshluq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
deleted file mode 100644
index 45f5ba0b3c8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint64x2_t = vqshluq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
deleted file mode 100644
index 47e1e853b74..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshluQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshluQ_ns8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint8x16_t = vqshluq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
deleted file mode 100644
index a168eb04104..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint16x4_t = vqshlu_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
deleted file mode 100644
index f6256526a23..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint32x2_t = vqshlu_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
deleted file mode 100644
index a7bd8e16e16..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint64x1_t = vqshlu_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
deleted file mode 100644
index f8deec120d9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshlu_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshlu_ns8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint8x8_t = vqshlu_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
deleted file mode 100644
index 887ed43ff7f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vqshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
deleted file mode 100644
index 3256226ed8a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vqshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
deleted file mode 100644
index 949ad14dd33..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vqshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
deleted file mode 100644
index 944dcc6ac4e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vqshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
deleted file mode 100644
index ef9665ec2c6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vqshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
deleted file mode 100644
index 20da1ccf820..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vqshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
deleted file mode 100644
index 686c4e521c9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrun_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrun_ns16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x8_t = vqshrun_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
deleted file mode 100644
index fcf370f6554..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrun_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrun_ns32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x4_t = vqshrun_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
deleted file mode 100644
index e7f336e9617..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vqshrun_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqshrun_ns64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x2_t = vqshrun_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vqshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
deleted file mode 100644
index 2e555f4eb34..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vqsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
deleted file mode 100644
index f496cfa7b35..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vqsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
deleted file mode 100644
index d6502350060..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vqsubq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
deleted file mode 100644
index 3dddbec09a9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vqsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
deleted file mode 100644
index 32cae6063eb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vqsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
deleted file mode 100644
index c6e90e4c9ab..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vqsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
deleted file mode 100644
index 59cf588ba9a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vqsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
deleted file mode 100644
index 50478cd156d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vqsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
deleted file mode 100644
index b5ce2f8a036..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vqsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
deleted file mode 100644
index c9290a00c63..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vqsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
deleted file mode 100644
index 2fee028da2a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vqsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
deleted file mode 100644
index 53b1add89cf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vqsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
deleted file mode 100644
index 68ecff86598..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vqsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
deleted file mode 100644
index bcb9db173fa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vqsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
deleted file mode 100644
index 1ca317b58f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vqsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
deleted file mode 100644
index 7946d1db40a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vqsubu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vqsubu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vqsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
deleted file mode 100644
index 0883d298e4b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpeQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpeQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrecpeq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
deleted file mode 100644
index 5520989275f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpeQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpeQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrecpeq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
deleted file mode 100644
index d31cc860dab..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrecpe_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
deleted file mode 100644
index 21ab98d90ce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrecpeu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpeu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrecpe_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
deleted file mode 100644
index aefe6265ec6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrecpsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vrecpsq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c b/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
deleted file mode 100644
index 8dac29c16df..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrecpsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrecpsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vrecps_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
deleted file mode 100644
index 240c1d95590..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p128 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly128_t arg0_poly128_t;
-
-  out_float32x4_t = vreinterpretq_f32_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
deleted file mode 100644
index 6e76ba6ef8f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p16 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_float32x4_t = vreinterpretq_f32_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
deleted file mode 100644
index ba66ff81334..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p64 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_float32x4_t = vreinterpretq_f32_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
deleted file mode 100644
index d13e01f0204..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_p8 (void)
-{
-  float32x4_t out_float32x4_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_float32x4_t = vreinterpretq_f32_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
deleted file mode 100644
index 70c48e953c3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s16 (void)
-{
-  float32x4_t out_float32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_float32x4_t = vreinterpretq_f32_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
deleted file mode 100644
index 546139ed914..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s32 (void)
-{
-  float32x4_t out_float32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_float32x4_t = vreinterpretq_f32_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
deleted file mode 100644
index a87ccffa371..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s64 (void)
-{
-  float32x4_t out_float32x4_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_float32x4_t = vreinterpretq_f32_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
deleted file mode 100644
index 3d46bec0593..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_s8 (void)
-{
-  float32x4_t out_float32x4_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_float32x4_t = vreinterpretq_f32_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
deleted file mode 100644
index 3b0b189cc27..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u16 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_float32x4_t = vreinterpretq_f32_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
deleted file mode 100644
index bc54aa66b9c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u32 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_float32x4_t = vreinterpretq_f32_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
deleted file mode 100644
index d582c5eda73..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u64 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_float32x4_t = vreinterpretq_f32_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
deleted file mode 100644
index 956db9e673b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQf32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQf32_u8 (void)
-{
-  float32x4_t out_float32x4_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_float32x4_t = vreinterpretq_f32_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
deleted file mode 100644
index 72732da63b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_f32 (void)
-{
-  poly128_t out_poly128_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly128_t = vreinterpretq_p128_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
deleted file mode 100644
index 52c3365b9fc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_p16 (void)
-{
-  poly128_t out_poly128_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly128_t = vreinterpretq_p128_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
deleted file mode 100644
index 2f86cfcc33d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_p64 (void)
-{
-  poly128_t out_poly128_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly128_t = vreinterpretq_p128_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
deleted file mode 100644
index 6964e394492..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_p8 (void)
-{
-  poly128_t out_poly128_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly128_t = vreinterpretq_p128_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
deleted file mode 100644
index a6f162b476a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s16 (void)
-{
-  poly128_t out_poly128_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly128_t = vreinterpretq_p128_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
deleted file mode 100644
index 66f48936737..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s32 (void)
-{
-  poly128_t out_poly128_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly128_t = vreinterpretq_p128_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
deleted file mode 100644
index 5437f319cc8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s64 (void)
-{
-  poly128_t out_poly128_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly128_t = vreinterpretq_p128_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
deleted file mode 100644
index a4006ed1da5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_s8 (void)
-{
-  poly128_t out_poly128_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly128_t = vreinterpretq_p128_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
deleted file mode 100644
index 00aaf3ec6ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u16 (void)
-{
-  poly128_t out_poly128_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly128_t = vreinterpretq_p128_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
deleted file mode 100644
index bf70c55bd59..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u32 (void)
-{
-  poly128_t out_poly128_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly128_t = vreinterpretq_p128_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
deleted file mode 100644
index 092d18a573c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u64 (void)
-{
-  poly128_t out_poly128_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly128_t = vreinterpretq_p128_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
deleted file mode 100644
index 39671d21833..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp128_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp128_u8 (void)
-{
-  poly128_t out_poly128_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly128_t = vreinterpretq_p128_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
deleted file mode 100644
index 586292687ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_f32 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly16x8_t = vreinterpretq_p16_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
deleted file mode 100644
index 8bdd6aaf984..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_p128 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly128_t arg0_poly128_t;
-
-  out_poly16x8_t = vreinterpretq_p16_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
deleted file mode 100644
index 8073d9d0616..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_p64 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly16x8_t = vreinterpretq_p16_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
deleted file mode 100644
index 71ea56d3972..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_p8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly16x8_t = vreinterpretq_p16_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
deleted file mode 100644
index 8073ad1a0ef..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
deleted file mode 100644
index 08c3c446dc9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s32 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
deleted file mode 100644
index 8c8218144dc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s64 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
deleted file mode 100644
index dd3bad0af6f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_s8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly16x8_t = vreinterpretq_p16_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
deleted file mode 100644
index bb3557cc8c8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
deleted file mode 100644
index ede90f20ede..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u32 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
deleted file mode 100644
index 51692b95292..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u64 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
deleted file mode 100644
index 020f6cd7473..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp16_u8 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly16x8_t = vreinterpretq_p16_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
deleted file mode 100644
index 97a64f76fe8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_f32 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly64x2_t = vreinterpretq_p64_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
deleted file mode 100644
index 50db9792bd2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_p128 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly128_t arg0_poly128_t;
-
-  out_poly64x2_t = vreinterpretq_p64_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
deleted file mode 100644
index 43957944a2f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_p16 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly64x2_t = vreinterpretq_p64_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
deleted file mode 100644
index 0bf635cda3d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_p8 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly64x2_t = vreinterpretq_p64_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
deleted file mode 100644
index 13320e15ff5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s16 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
deleted file mode 100644
index 3377d507ca2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s32 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
deleted file mode 100644
index c5fd29e347f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
deleted file mode 100644
index b85ce4ea58e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_s8 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly64x2_t = vreinterpretq_p64_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
deleted file mode 100644
index a46231cc26a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u16 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
deleted file mode 100644
index be0f4d84b53..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u32 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
deleted file mode 100644
index 1c141b62a06..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
deleted file mode 100644
index 25cd2e0e03c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp64_u8 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly64x2_t = vreinterpretq_p64_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
deleted file mode 100644
index 017fd16faa0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_f32 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_poly8x16_t = vreinterpretq_p8_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
deleted file mode 100644
index 3c12a5bb9ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_p128 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly128_t arg0_poly128_t;
-
-  out_poly8x16_t = vreinterpretq_p8_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
deleted file mode 100644
index 9fb4fa140e5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_p16 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly8x16_t = vreinterpretq_p8_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
deleted file mode 100644
index 2b5b81595be..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_p64 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_poly8x16_t = vreinterpretq_p8_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
deleted file mode 100644
index 91ad505ff36..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s16 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
deleted file mode 100644
index 0ab4eff2dd1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s32 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
deleted file mode 100644
index 946b82420db..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s64 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
deleted file mode 100644
index f07c24ae7a5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_s8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_poly8x16_t = vreinterpretq_p8_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
deleted file mode 100644
index b776ef016ac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u16 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
deleted file mode 100644
index b74c757276b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u32 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
deleted file mode 100644
index fc89c81db5a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u64 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
deleted file mode 100644
index 82f02fcc047..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQp8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQp8_u8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_poly8x16_t = vreinterpretq_p8_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
deleted file mode 100644
index e74ca76c7a0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_f32 (void)
-{
-  int16x8_t out_int16x8_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int16x8_t = vreinterpretq_s16_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
deleted file mode 100644
index da932d9f14e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p128 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly128_t arg0_poly128_t;
-
-  out_int16x8_t = vreinterpretq_s16_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
deleted file mode 100644
index e643ed997ff..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p16 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int16x8_t = vreinterpretq_s16_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
deleted file mode 100644
index ce15357f7cf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p64 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int16x8_t = vreinterpretq_s16_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
deleted file mode 100644
index e3b28f5955e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_p8 (void)
-{
-  int16x8_t out_int16x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int16x8_t = vreinterpretq_s16_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
deleted file mode 100644
index 8ffa8a9a24f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_s32 (void)
-{
-  int16x8_t out_int16x8_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x8_t = vreinterpretq_s16_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
deleted file mode 100644
index caa23fc877c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_s64 (void)
-{
-  int16x8_t out_int16x8_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int16x8_t = vreinterpretq_s16_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
deleted file mode 100644
index 57e03d41a35..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_s8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int16x8_t = vreinterpretq_s16_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
deleted file mode 100644
index 03497b50891..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u16 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int16x8_t = vreinterpretq_s16_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
deleted file mode 100644
index 1d264b56fcb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u32 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int16x8_t = vreinterpretq_s16_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
deleted file mode 100644
index 355a0aa4ed1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u64 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int16x8_t = vreinterpretq_s16_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
deleted file mode 100644
index 339ed278960..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs16_u8 (void)
-{
-  int16x8_t out_int16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int16x8_t = vreinterpretq_s16_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
deleted file mode 100644
index 857db63cdbc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_f32 (void)
-{
-  int32x4_t out_int32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int32x4_t = vreinterpretq_s32_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
deleted file mode 100644
index eb1d7ad2b75..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p128 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly128_t arg0_poly128_t;
-
-  out_int32x4_t = vreinterpretq_s32_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
deleted file mode 100644
index 0dc4d481cf6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p16 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int32x4_t = vreinterpretq_s32_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
deleted file mode 100644
index 00e3a614094..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p64 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int32x4_t = vreinterpretq_s32_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
deleted file mode 100644
index 07c787031e3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_p8 (void)
-{
-  int32x4_t out_int32x4_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int32x4_t = vreinterpretq_s32_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
deleted file mode 100644
index 5d72da975ae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_s16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int32x4_t = vreinterpretq_s32_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
deleted file mode 100644
index c1d859307dd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_s64 (void)
-{
-  int32x4_t out_int32x4_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x4_t = vreinterpretq_s32_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
deleted file mode 100644
index 0ba13b3e6bd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_s8 (void)
-{
-  int32x4_t out_int32x4_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int32x4_t = vreinterpretq_s32_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
deleted file mode 100644
index 35ed106e426..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u16 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int32x4_t = vreinterpretq_s32_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
deleted file mode 100644
index dc6082fd846..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u32 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int32x4_t = vreinterpretq_s32_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
deleted file mode 100644
index c0083bd1b82..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u64 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int32x4_t = vreinterpretq_s32_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
deleted file mode 100644
index 7cba3e2c794..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs32_u8 (void)
-{
-  int32x4_t out_int32x4_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int32x4_t = vreinterpretq_s32_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
deleted file mode 100644
index e4f1de3aefe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_f32 (void)
-{
-  int64x2_t out_int64x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int64x2_t = vreinterpretq_s64_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
deleted file mode 100644
index e4cb3535865..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p128 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly128_t arg0_poly128_t;
-
-  out_int64x2_t = vreinterpretq_s64_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
deleted file mode 100644
index 35b36c1ea7b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p16 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int64x2_t = vreinterpretq_s64_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
deleted file mode 100644
index 384bde61290..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p64 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int64x2_t = vreinterpretq_s64_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
deleted file mode 100644
index 434ad4f3963..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_p8 (void)
-{
-  int64x2_t out_int64x2_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int64x2_t = vreinterpretq_s64_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
deleted file mode 100644
index b03138e94f6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_s16 (void)
-{
-  int64x2_t out_int64x2_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int64x2_t = vreinterpretq_s64_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
deleted file mode 100644
index efe19b2819f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_s32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int64x2_t = vreinterpretq_s64_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
deleted file mode 100644
index 3d62931e7c0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_s8 (void)
-{
-  int64x2_t out_int64x2_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int64x2_t = vreinterpretq_s64_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
deleted file mode 100644
index 2155784c014..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u16 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int64x2_t = vreinterpretq_s64_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
deleted file mode 100644
index aa9bf07f532..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u32 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int64x2_t = vreinterpretq_s64_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
deleted file mode 100644
index 20c9b78fe77..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u64 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int64x2_t = vreinterpretq_s64_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
deleted file mode 100644
index 28baec05e82..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs64_u8 (void)
-{
-  int64x2_t out_int64x2_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int64x2_t = vreinterpretq_s64_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
deleted file mode 100644
index c3830d1694b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_f32 (void)
-{
-  int8x16_t out_int8x16_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_int8x16_t = vreinterpretq_s8_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
deleted file mode 100644
index ee6084545c2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p128 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly128_t arg0_poly128_t;
-
-  out_int8x16_t = vreinterpretq_s8_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
deleted file mode 100644
index 739f0ab1a26..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p16 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_int8x16_t = vreinterpretq_s8_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
deleted file mode 100644
index 3c8b458e1a1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p64 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_int8x16_t = vreinterpretq_s8_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
deleted file mode 100644
index 1702e8f59b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_p8 (void)
-{
-  int8x16_t out_int8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_int8x16_t = vreinterpretq_s8_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
deleted file mode 100644
index 593209ec001..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_s16 (void)
-{
-  int8x16_t out_int8x16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x16_t = vreinterpretq_s8_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
deleted file mode 100644
index ecd67eeaebd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_s32 (void)
-{
-  int8x16_t out_int8x16_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int8x16_t = vreinterpretq_s8_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
deleted file mode 100644
index eea205c09c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_s64 (void)
-{
-  int8x16_t out_int8x16_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int8x16_t = vreinterpretq_s8_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
deleted file mode 100644
index ca8c8564f01..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u16 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_int8x16_t = vreinterpretq_s8_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
deleted file mode 100644
index 714567a9f6e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u32 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_int8x16_t = vreinterpretq_s8_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
deleted file mode 100644
index 2471b81c891..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u64 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_int8x16_t = vreinterpretq_s8_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
deleted file mode 100644
index 816c645e3cc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQs8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQs8_u8 (void)
-{
-  int8x16_t out_int8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_int8x16_t = vreinterpretq_s8_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
deleted file mode 100644
index 0d9218efa90..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_f32 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint16x8_t = vreinterpretq_u16_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
deleted file mode 100644
index 6f45c3eaafc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p128 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
deleted file mode 100644
index cbc19e10839..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
deleted file mode 100644
index f11a75137fe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p64 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
deleted file mode 100644
index ff386149a18..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_p8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint16x8_t = vreinterpretq_u16_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
deleted file mode 100644
index 8842c4779e1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
deleted file mode 100644
index dc23a4db9f1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s32 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
deleted file mode 100644
index 92179de7011..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s64 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
deleted file mode 100644
index ceff877ec7f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_s8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint16x8_t = vreinterpretq_u16_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
deleted file mode 100644
index c0f49ec3499..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_u32 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x8_t = vreinterpretq_u16_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
deleted file mode 100644
index a80bea2bf77..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_u64 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint16x8_t = vreinterpretq_u16_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
deleted file mode 100644
index bcf28c1cf48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu16_u8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint16x8_t = vreinterpretq_u16_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
deleted file mode 100644
index 95608e07b37..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_f32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint32x4_t = vreinterpretq_u32_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
deleted file mode 100644
index 83254ae44c9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p128 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
deleted file mode 100644
index 6a55e7a53ea..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
deleted file mode 100644
index b0c446dcd5d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p64 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
deleted file mode 100644
index b8d49052326..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_p8 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint32x4_t = vreinterpretq_u32_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
deleted file mode 100644
index 85a1ec8d3ba..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
deleted file mode 100644
index 60c17508e89..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
deleted file mode 100644
index bf02d09cbd1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s64 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
deleted file mode 100644
index 8bd776089f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_s8 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint32x4_t = vreinterpretq_u32_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
deleted file mode 100644
index 2326bc9b301..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_u16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint32x4_t = vreinterpretq_u32_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
deleted file mode 100644
index 0386681879f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_u64 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x4_t = vreinterpretq_u32_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
deleted file mode 100644
index 14f63d8e730..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu32_u8 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint32x4_t = vreinterpretq_u32_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
deleted file mode 100644
index 6a8559db84b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_f32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint64x2_t = vreinterpretq_u64_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
deleted file mode 100644
index 1dc0309b4cd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p128 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
deleted file mode 100644
index f4a31acefd5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p16 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
deleted file mode 100644
index 187da75840f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
deleted file mode 100644
index 19807147aa9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_p8 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint64x2_t = vreinterpretq_u64_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
deleted file mode 100644
index 93673de08e8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s16 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
deleted file mode 100644
index 60c00422112..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
deleted file mode 100644
index da88b545623..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
deleted file mode 100644
index b5322aaed9d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_s8 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint64x2_t = vreinterpretq_u64_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
deleted file mode 100644
index 06bf44e442e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_u16 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint64x2_t = vreinterpretq_u64_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
deleted file mode 100644
index 2d71f71ba48..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_u32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint64x2_t = vreinterpretq_u64_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
deleted file mode 100644
index f870e923895..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu64_u8 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint64x2_t = vreinterpretq_u64_u8 (arg0_uint8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
deleted file mode 100644
index 8aaffdae927..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_f32 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_uint8x16_t = vreinterpretq_u8_f32 (arg0_float32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
deleted file mode 100644
index eff6df5fcd1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p128' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p128 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly128_t arg0_poly128_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p128 (arg0_poly128_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
deleted file mode 100644
index ac9b586fd69..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p16 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p16 (arg0_poly16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
deleted file mode 100644
index e75b8a1fd94..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p64 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly64x2_t arg0_poly64x2_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p64 (arg0_poly64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
deleted file mode 100644
index 0d49f7d93ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_p8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_uint8x16_t = vreinterpretq_u8_p8 (arg0_poly8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
deleted file mode 100644
index 37f3fed25bb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s16 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s16 (arg0_int16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
deleted file mode 100644
index 0ed46fd52d0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s32 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s32 (arg0_int32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
deleted file mode 100644
index 73dc999029d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s64 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s64 (arg0_int64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
deleted file mode 100644
index a243537980e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_s8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_uint8x16_t = vreinterpretq_u8_s8 (arg0_int8x16_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
deleted file mode 100644
index 57e405383f3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_u16 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x16_t = vreinterpretq_u8_u16 (arg0_uint16x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
deleted file mode 100644
index 98b998f9648..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_u32 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint8x16_t = vreinterpretq_u8_u32 (arg0_uint32x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
deleted file mode 100644
index 0cebf4dc89e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretQu8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretQu8_u64 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint8x16_t = vreinterpretq_u8_u64 (arg0_uint64x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
deleted file mode 100644
index 6bec08ec4ba..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_p16 (void)
-{
-  float32x2_t out_float32x2_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_float32x2_t = vreinterpret_f32_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
deleted file mode 100644
index bb7ea600872..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_p64 (void)
-{
-  float32x2_t out_float32x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_float32x2_t = vreinterpret_f32_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
deleted file mode 100644
index 05a4eb61417..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_p8 (void)
-{
-  float32x2_t out_float32x2_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_float32x2_t = vreinterpret_f32_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
deleted file mode 100644
index dbf514bf820..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s16 (void)
-{
-  float32x2_t out_float32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_float32x2_t = vreinterpret_f32_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
deleted file mode 100644
index 133bade83a7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s32 (void)
-{
-  float32x2_t out_float32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_float32x2_t = vreinterpret_f32_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
deleted file mode 100644
index 7a9045ec8fb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s64 (void)
-{
-  float32x2_t out_float32x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_float32x2_t = vreinterpret_f32_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
deleted file mode 100644
index 256f6a4dfd6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_s8 (void)
-{
-  float32x2_t out_float32x2_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_float32x2_t = vreinterpret_f32_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
deleted file mode 100644
index 319c0f04cd4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u16 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_float32x2_t = vreinterpret_f32_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
deleted file mode 100644
index 3e4b1d41a22..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u32 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_float32x2_t = vreinterpret_f32_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
deleted file mode 100644
index 880ab422df3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u64 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_float32x2_t = vreinterpret_f32_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
deleted file mode 100644
index 0f25f6a4ff6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretf32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretf32_u8 (void)
-{
-  float32x2_t out_float32x2_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_float32x2_t = vreinterpret_f32_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
deleted file mode 100644
index 276b8c339b8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_f32 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_poly16x4_t = vreinterpret_p16_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
deleted file mode 100644
index 67799cb5357..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_p64 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly16x4_t = vreinterpret_p16_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
deleted file mode 100644
index 837d731b86a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_p8 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly16x4_t = vreinterpret_p16_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
deleted file mode 100644
index 099ed520ae7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_poly16x4_t = vreinterpret_p16_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
deleted file mode 100644
index 027c156be1e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s32 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_poly16x4_t = vreinterpret_p16_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
deleted file mode 100644
index 2fdc5e76b2b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s64 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_poly16x4_t = vreinterpret_p16_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
deleted file mode 100644
index 1b6828f44e3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_s8 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_poly16x4_t = vreinterpret_p16_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
deleted file mode 100644
index f66131734d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_poly16x4_t = vreinterpret_p16_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
deleted file mode 100644
index b59d49280d3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u32 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_poly16x4_t = vreinterpret_p16_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
deleted file mode 100644
index fcebd515b4a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u64 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_poly16x4_t = vreinterpret_p16_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
deleted file mode 100644
index c6a6f2d9b74..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp16_u8 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_poly16x4_t = vreinterpret_p16_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
deleted file mode 100644
index 1905a99dba8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_f32 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_poly64x1_t = vreinterpret_p64_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
deleted file mode 100644
index 546d7ef9981..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_p16 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly64x1_t = vreinterpret_p64_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
deleted file mode 100644
index 0a36a8fd12e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_p8 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly64x1_t = vreinterpret_p64_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
deleted file mode 100644
index 94875599aa0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s16 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_poly64x1_t = vreinterpret_p64_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
deleted file mode 100644
index ffca4cfe8d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s32 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_poly64x1_t = vreinterpret_p64_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
deleted file mode 100644
index c3a01737756..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_poly64x1_t = vreinterpret_p64_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
deleted file mode 100644
index ba12a05cac7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_s8 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_poly64x1_t = vreinterpret_p64_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
deleted file mode 100644
index 9a60595a095..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u16 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_poly64x1_t = vreinterpret_p64_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
deleted file mode 100644
index cb61d538214..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u32 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_poly64x1_t = vreinterpret_p64_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
deleted file mode 100644
index 1459a493bdd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_poly64x1_t = vreinterpret_p64_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
deleted file mode 100644
index 4e8fcf64342..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp64_u8 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_poly64x1_t = vreinterpret_p64_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
deleted file mode 100644
index e128056c665..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_f32 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_poly8x8_t = vreinterpret_p8_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
deleted file mode 100644
index 736741c057d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_p16 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly8x8_t = vreinterpret_p8_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
deleted file mode 100644
index 35166267fcf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_p64 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_poly8x8_t = vreinterpret_p8_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
deleted file mode 100644
index 6a065c6752f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s16 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_poly8x8_t = vreinterpret_p8_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
deleted file mode 100644
index 90a8b77ca82..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s32 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_poly8x8_t = vreinterpret_p8_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
deleted file mode 100644
index 3893ba24e06..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s64 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_poly8x8_t = vreinterpret_p8_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
deleted file mode 100644
index 5fb4c7af6fb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_s8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_poly8x8_t = vreinterpret_p8_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
deleted file mode 100644
index 398470fd1c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u16 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_poly8x8_t = vreinterpret_p8_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
deleted file mode 100644
index f60d7cb134f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u32 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_poly8x8_t = vreinterpret_p8_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
deleted file mode 100644
index c874eb7b268..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u64 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_poly8x8_t = vreinterpret_p8_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
deleted file mode 100644
index cead64b0469..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretp8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretp8_u8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_poly8x8_t = vreinterpret_p8_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
deleted file mode 100644
index 904fcb67c03..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_f32 (void)
-{
-  int16x4_t out_int16x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int16x4_t = vreinterpret_s16_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
deleted file mode 100644
index d03a724572b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_p16 (void)
-{
-  int16x4_t out_int16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int16x4_t = vreinterpret_s16_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
deleted file mode 100644
index 87f02b8e0f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_p64 (void)
-{
-  int16x4_t out_int16x4_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int16x4_t = vreinterpret_s16_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
deleted file mode 100644
index a54b2c893b6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_p8 (void)
-{
-  int16x4_t out_int16x4_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int16x4_t = vreinterpret_s16_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
deleted file mode 100644
index c395ad2c48f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_s32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int16x4_t = vreinterpret_s16_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
deleted file mode 100644
index 41b75d40b6e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_s64 (void)
-{
-  int16x4_t out_int16x4_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int16x4_t = vreinterpret_s16_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
deleted file mode 100644
index 9746bdad422..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_s8 (void)
-{
-  int16x4_t out_int16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x4_t = vreinterpret_s16_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
deleted file mode 100644
index f7bd5222e0c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u16 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int16x4_t = vreinterpret_s16_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
deleted file mode 100644
index db7ef6bb988..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u32 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int16x4_t = vreinterpret_s16_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
deleted file mode 100644
index b36ad0e1a3b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u64 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int16x4_t = vreinterpret_s16_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
deleted file mode 100644
index c5af74d921f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets16_u8 (void)
-{
-  int16x4_t out_int16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int16x4_t = vreinterpret_s16_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
deleted file mode 100644
index 10f41dce2c6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_f32 (void)
-{
-  int32x2_t out_int32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int32x2_t = vreinterpret_s32_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
deleted file mode 100644
index 0f29b7e979e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_p16 (void)
-{
-  int32x2_t out_int32x2_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int32x2_t = vreinterpret_s32_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
deleted file mode 100644
index f670990731f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_p64 (void)
-{
-  int32x2_t out_int32x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int32x2_t = vreinterpret_s32_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
deleted file mode 100644
index ba216158277..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_p8 (void)
-{
-  int32x2_t out_int32x2_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int32x2_t = vreinterpret_s32_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
deleted file mode 100644
index c0142acfb52..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_s16 (void)
-{
-  int32x2_t out_int32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x2_t = vreinterpret_s32_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
deleted file mode 100644
index e1499a12368..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_s64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int32x2_t = vreinterpret_s32_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
deleted file mode 100644
index 311a708b63c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_s8 (void)
-{
-  int32x2_t out_int32x2_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int32x2_t = vreinterpret_s32_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
deleted file mode 100644
index eaf5eb6bd84..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u16 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int32x2_t = vreinterpret_s32_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
deleted file mode 100644
index 65ab85882b1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u32 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int32x2_t = vreinterpret_s32_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
deleted file mode 100644
index 4338d10df8e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u64 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int32x2_t = vreinterpret_s32_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
deleted file mode 100644
index 74f7899452f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets32_u8 (void)
-{
-  int32x2_t out_int32x2_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int32x2_t = vreinterpret_s32_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
deleted file mode 100644
index 3510bedff34..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_f32 (void)
-{
-  int64x1_t out_int64x1_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int64x1_t = vreinterpret_s64_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
deleted file mode 100644
index e239a96d3ef..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_p16 (void)
-{
-  int64x1_t out_int64x1_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int64x1_t = vreinterpret_s64_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
deleted file mode 100644
index d20075c1c67..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_p64 (void)
-{
-  int64x1_t out_int64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int64x1_t = vreinterpret_s64_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
deleted file mode 100644
index 5219607dec7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_p8 (void)
-{
-  int64x1_t out_int64x1_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int64x1_t = vreinterpret_s64_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
deleted file mode 100644
index cfcbc7d06d4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_s16 (void)
-{
-  int64x1_t out_int64x1_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int64x1_t = vreinterpret_s64_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
deleted file mode 100644
index 7467413f722..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_s32 (void)
-{
-  int64x1_t out_int64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x1_t = vreinterpret_s64_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
deleted file mode 100644
index 5cb98cecf0a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_s8 (void)
-{
-  int64x1_t out_int64x1_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int64x1_t = vreinterpret_s64_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
deleted file mode 100644
index 51351006210..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u16 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int64x1_t = vreinterpret_s64_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
deleted file mode 100644
index 1536b5bbd42..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u32 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int64x1_t = vreinterpret_s64_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
deleted file mode 100644
index ae8f71015bd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u64 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int64x1_t = vreinterpret_s64_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
deleted file mode 100644
index 86eb6fc6864..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets64_u8 (void)
-{
-  int64x1_t out_int64x1_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int64x1_t = vreinterpret_s64_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
deleted file mode 100644
index f582e5e21b2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_f32 (void)
-{
-  int8x8_t out_int8x8_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_int8x8_t = vreinterpret_s8_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
deleted file mode 100644
index 99592526bed..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_p16 (void)
-{
-  int8x8_t out_int8x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_int8x8_t = vreinterpret_s8_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
deleted file mode 100644
index c61f6b11cb8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_p64 (void)
-{
-  int8x8_t out_int8x8_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_int8x8_t = vreinterpret_s8_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
deleted file mode 100644
index 4b1d366357e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_p8 (void)
-{
-  int8x8_t out_int8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_int8x8_t = vreinterpret_s8_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
deleted file mode 100644
index 3d797d7eec8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_s16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int8x8_t = vreinterpret_s8_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
deleted file mode 100644
index ab9755b729c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_s32 (void)
-{
-  int8x8_t out_int8x8_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int8x8_t = vreinterpret_s8_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
deleted file mode 100644
index 3b56bc6f340..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_s64 (void)
-{
-  int8x8_t out_int8x8_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int8x8_t = vreinterpret_s8_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
deleted file mode 100644
index 4daf4091b45..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u16 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_int8x8_t = vreinterpret_s8_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
deleted file mode 100644
index 2c10e40dbca..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u32 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_int8x8_t = vreinterpret_s8_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
deleted file mode 100644
index 3395f57361d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u64 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_int8x8_t = vreinterpret_s8_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
deleted file mode 100644
index d9b7c58aa17..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterprets8_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterprets8_u8 (void)
-{
-  int8x8_t out_int8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_int8x8_t = vreinterpret_s8_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
deleted file mode 100644
index 761d6cc1206..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_f32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint16x4_t = vreinterpret_u16_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
deleted file mode 100644
index da0604dea3e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_p16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint16x4_t = vreinterpret_u16_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
deleted file mode 100644
index d7d66651595..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_p64 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint16x4_t = vreinterpret_u16_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
deleted file mode 100644
index 46c87d6db6c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_p8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint16x4_t = vreinterpret_u16_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
deleted file mode 100644
index 58d46114fd6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint16x4_t = vreinterpret_u16_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
deleted file mode 100644
index e833a2c72b6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint16x4_t = vreinterpret_u16_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
deleted file mode 100644
index 78c964ba638..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s64 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint16x4_t = vreinterpret_u16_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
deleted file mode 100644
index 862589df5c6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_s8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint16x4_t = vreinterpret_u16_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
deleted file mode 100644
index df8fdbe79dd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_u32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint16x4_t = vreinterpret_u16_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
deleted file mode 100644
index c9b64f630d5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_u64 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint16x4_t = vreinterpret_u16_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
deleted file mode 100644
index 41b9c254e35..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu16_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu16_u8 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x4_t = vreinterpret_u16_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
deleted file mode 100644
index c8f91b8af9d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_f32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint32x2_t = vreinterpret_u32_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
deleted file mode 100644
index 8cf8f78a6dc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_p16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint32x2_t = vreinterpret_u32_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
deleted file mode 100644
index f1303d9d363..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_p64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint32x2_t = vreinterpret_u32_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
deleted file mode 100644
index 5cf6cb0a58a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_p8 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint32x2_t = vreinterpret_u32_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
deleted file mode 100644
index 9a968fe7882..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint32x2_t = vreinterpret_u32_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
deleted file mode 100644
index f9f701f88e6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint32x2_t = vreinterpret_u32_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
deleted file mode 100644
index 4eee1fafa72..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint32x2_t = vreinterpret_u32_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
deleted file mode 100644
index e6afe8b2d74..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_s8 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint32x2_t = vreinterpret_u32_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
deleted file mode 100644
index a2813b024a8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_u16 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x2_t = vreinterpret_u32_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
deleted file mode 100644
index 8de7e2f3553..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_u64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint32x2_t = vreinterpret_u32_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
deleted file mode 100644
index df329a8595f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu32_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu32_u8 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint32x2_t = vreinterpret_u32_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
deleted file mode 100644
index 1da62f48a7e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_f32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint64x1_t = vreinterpret_u64_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
deleted file mode 100644
index 9de79868037..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_p16 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint64x1_t = vreinterpret_u64_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
deleted file mode 100644
index 86304b1aac7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_p64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint64x1_t = vreinterpret_u64_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
deleted file mode 100644
index 6a807f17c89..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_p8 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint64x1_t = vreinterpret_u64_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
deleted file mode 100644
index d752efa92b6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s16 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint64x1_t = vreinterpret_u64_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
deleted file mode 100644
index 362a83edc49..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint64x1_t = vreinterpret_u64_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
deleted file mode 100644
index cb19d47427a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint64x1_t = vreinterpret_u64_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
deleted file mode 100644
index d0ff42b32e2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_s8 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint64x1_t = vreinterpret_u64_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
deleted file mode 100644
index 8d00c392acb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_u16 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint64x1_t = vreinterpret_u64_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
deleted file mode 100644
index e0fb4f2a6b2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_u32 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x1_t = vreinterpret_u64_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
deleted file mode 100644
index 27cd5436fdd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu64_u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu64_u8 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint64x1_t = vreinterpret_u64_u8 (arg0_uint8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
deleted file mode 100644
index 8b3d2078e2d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_f32 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_uint8x8_t = vreinterpret_u8_f32 (arg0_float32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
deleted file mode 100644
index c98b96310ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_p16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_uint8x8_t = vreinterpret_u8_p16 (arg0_poly16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
deleted file mode 100644
index ecfa9f27b93..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_p64 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly64x1_t arg0_poly64x1_t;
-
-  out_uint8x8_t = vreinterpret_u8_p64 (arg0_poly64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
deleted file mode 100644
index a666f3b3a25..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_p8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_uint8x8_t = vreinterpret_u8_p8 (arg0_poly8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
deleted file mode 100644
index e33579b45ca..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_uint8x8_t = vreinterpret_u8_s16 (arg0_int16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
deleted file mode 100644
index c5727287702..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s32 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_uint8x8_t = vreinterpret_u8_s32 (arg0_int32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
deleted file mode 100644
index 726b6abe4bc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s64 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_uint8x8_t = vreinterpret_u8_s64 (arg0_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
deleted file mode 100644
index df58c0fb040..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_s8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_uint8x8_t = vreinterpret_u8_s8 (arg0_int8x8_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
deleted file mode 100644
index 00bf9a5b5d1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_u16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint8x8_t = vreinterpret_u8_u16 (arg0_uint16x4_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
deleted file mode 100644
index 8670b08f092..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_u32 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint8x8_t = vreinterpret_u8_u32 (arg0_uint32x2_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c b/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
deleted file mode 100644
index 509ece78137..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
+++ /dev/null
@@ -1,18 +0,0 @@
-/* Test the `vreinterpretu8_u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vreinterpretu8_u64 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint8x8_t = vreinterpret_u8_u64 (arg0_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
deleted file mode 100644
index b31084fcc47..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vrev16q_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
deleted file mode 100644
index dfb3531cd51..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrev16q_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
deleted file mode 100644
index f3b1861d9b1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrev16q_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
deleted file mode 100644
index 6d76ab04177..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vrev16_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
deleted file mode 100644
index f2d79c959c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrev16_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
deleted file mode 100644
index 9e70e6635f5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev16u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev16u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrev16_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
deleted file mode 100644
index 3d24c0a6cc0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x8_t = vrev32q_p16 (arg0_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
deleted file mode 100644
index 50bd272d516..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vrev32q_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
deleted file mode 100644
index c65ae1518c7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vrev32q_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
deleted file mode 100644
index 80bfddfeac6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrev32q_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
deleted file mode 100644
index 2974371775e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vrev32q_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
deleted file mode 100644
index 0d0beab4e7d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrev32q_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
deleted file mode 100644
index 65fb8c9bb27..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32p16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x4_t = vrev32_p16 (arg0_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
deleted file mode 100644
index f3078195b72..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vrev32_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
deleted file mode 100644
index 8f8daa69b73..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32s16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vrev32_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
deleted file mode 100644
index da69ab4c6dd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrev32_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c b/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
deleted file mode 100644
index 6798acf55ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32u16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vrev32_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
deleted file mode 100644
index 1dce99dde2b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev32u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev32u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrev32_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
deleted file mode 100644
index 2db00165b97..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrev64q_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
deleted file mode 100644
index 1dffde94e78..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qp16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-
-  out_poly16x8_t = vrev64q_p16 (arg0_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
deleted file mode 100644
index 37b629b6bbc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qp8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-
-  out_poly8x16_t = vrev64q_p8 (arg0_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
deleted file mode 100644
index 1e37eb2f4c3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vrev64q_s16 (arg0_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
deleted file mode 100644
index c71a8b9a565..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vrev64q_s32 (arg0_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
deleted file mode 100644
index f6a6b5a576f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vrev64q_s8 (arg0_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
deleted file mode 100644
index 94ca3a3f577..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vrev64q_u16 (arg0_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
deleted file mode 100644
index 0840b3cb31c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrev64q_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
deleted file mode 100644
index 11177e3d074..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64Qu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vrev64q_u8 (arg0_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
deleted file mode 100644
index d2766d469d6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64f32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrev64_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
deleted file mode 100644
index 359ba0c8398..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64p16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-
-  out_poly16x4_t = vrev64_p16 (arg0_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
deleted file mode 100644
index e4621d62211..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-
-  out_poly8x8_t = vrev64_p8 (arg0_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
deleted file mode 100644
index b6d7545d696..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64s16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vrev64_s16 (arg0_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
deleted file mode 100644
index 8e85e8451c1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64s32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vrev64_s32 (arg0_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
deleted file mode 100644
index 63b9c196972..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vrev64_s8 (arg0_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
deleted file mode 100644
index 250ade51dbd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64u16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vrev64_u16 (arg0_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
deleted file mode 100644
index 1028ec51057..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64u32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrev64_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c b/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
deleted file mode 100644
index 4145a593fe1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrev64u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrev64u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vrev64_u8 (arg0_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c
deleted file mode 100644
index 6bec8fe9fd5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndaf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndaf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrnda_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrinta\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c
deleted file mode 100644
index a29a71d1433..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndaq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndaqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndaq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrinta\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndf32.c
deleted file mode 100644
index fa976033140..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrnd_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintz\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c
deleted file mode 100644
index 2155224bb29..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndmf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndmf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrndm_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintm\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c
deleted file mode 100644
index 3dc0422c8b2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndmq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndmqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndmq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintm\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c
deleted file mode 100644
index bd159eb5550..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndnf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndnf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrndn_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintn\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c
deleted file mode 100644
index 628488f5075..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndnq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndnqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndnq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintn\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c
deleted file mode 100644
index baa2ca9fcd2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndpf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndpf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrndp_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrintp\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c
deleted file mode 100644
index 5c26956885a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndpq_f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndpqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndpq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintp\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c b/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c
deleted file mode 100644
index 13365c70dac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrndqf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_v8_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_v8_neon } */
-
-#include "arm_neon.h"
-
-void test_vrndqf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrndq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrintz\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
deleted file mode 100644
index 1ee3793a8ec..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrteQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrteQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-
-  out_float32x4_t = vrsqrteq_f32 (arg0_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
deleted file mode 100644
index db9ab2888db..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrteQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrteQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vrsqrteq_u32 (arg0_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
deleted file mode 100644
index 0abcd7e57ea..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrtef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrtef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-
-  out_float32x2_t = vrsqrte_f32 (arg0_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
deleted file mode 100644
index f133dc19867..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vrsqrteu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrteu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vrsqrte_u32 (arg0_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
deleted file mode 100644
index 8b141c25096..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrsqrtsQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrtsQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vrsqrtsq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c b/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
deleted file mode 100644
index c4008473110..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vrsqrtsf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vrsqrtsf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vrsqrts_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
deleted file mode 100644
index b7a55122827..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanef32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32_t arg0_float32_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vsetq_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
deleted file mode 100644
index 0469323677a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanep16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16_t arg0_poly16_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vsetq_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
deleted file mode 100644
index 90c1c2cc6fb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanep8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8_t arg0_poly8_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vsetq_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
deleted file mode 100644
index 38cdf11e1a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16_t arg0_int16_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsetq_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
deleted file mode 100644
index d4edb56d117..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32_t arg0_int32_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsetq_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
deleted file mode 100644
index 37bf0b87a49..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64_t arg0_int64_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsetq_lane_s64 (arg0_int64_t, arg1_int64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
deleted file mode 100644
index 5b460859fef..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_lanes8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8_t arg0_int8_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsetq_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
deleted file mode 100644
index 6ba92518b86..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16_t arg0_uint16_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsetq_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
deleted file mode 100644
index 4cb1e9e0da8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32_t arg0_uint32_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsetq_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
deleted file mode 100644
index 9cf4dc0da69..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64_t arg0_uint64_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsetq_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 0);
-}
-
-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
deleted file mode 100644
index 0265d0eb37e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsetQ_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsetQ_laneu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8_t arg0_uint8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsetq_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
deleted file mode 100644
index 4ce2e44e01b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanef32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32_t arg0_float32_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vset_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
deleted file mode 100644
index 788ddd76fae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanep16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16_t arg0_poly16_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vset_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
deleted file mode 100644
index 5ea5199115e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanep8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8_t arg0_poly8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vset_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
deleted file mode 100644
index 95a6a90aba9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16_t arg0_int16_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vset_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
deleted file mode 100644
index 340412b6323..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32_t arg0_int32_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vset_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
deleted file mode 100644
index e137338bec0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vset_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64_t arg0_int64_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
deleted file mode 100644
index b905d9ffd40..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_lanes8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8_t arg0_int8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vset_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
deleted file mode 100644
index 1ba3682b850..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16_t arg0_uint16_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vset_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
deleted file mode 100644
index 820dd9543e1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32_t arg0_uint32_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vset_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
deleted file mode 100644
index 40c2fadb3a2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vset_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64_t arg0_uint64_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
deleted file mode 100644
index f15725fae97..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vset_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vset_laneu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8_t arg0_uint8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vset_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
deleted file mode 100644
index d1843250d35..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vshlq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
deleted file mode 100644
index f3f80807479..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vshlq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
deleted file mode 100644
index 7f10e0c238d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vshlq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
deleted file mode 100644
index 18656a1ae58..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vshlq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
deleted file mode 100644
index d4f8f5d4d10..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vshlq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
deleted file mode 100644
index 304ece8393a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vshlq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
deleted file mode 100644
index 4f3bd4b0ad0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vshlq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
deleted file mode 100644
index 254eb20e8b7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshlQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vshlq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
deleted file mode 100644
index a497786ded1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
deleted file mode 100644
index 2fee8ff6773..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
deleted file mode 100644
index 5565b8d8e58..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
deleted file mode 100644
index f825f29ca21..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
deleted file mode 100644
index 268d8e49091..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
deleted file mode 100644
index 489d6cdccc4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
deleted file mode 100644
index 936824c1242..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_uint64x2_t = vshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
deleted file mode 100644
index b683eda4cfd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
deleted file mode 100644
index 75fac2d713c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vshl_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
deleted file mode 100644
index 358f6d6e0a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vshl_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
deleted file mode 100644
index a36aba0326d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vshl_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
deleted file mode 100644
index 27454e8d6e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vshl_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
deleted file mode 100644
index 27745fa84a8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vshl_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
deleted file mode 100644
index feead558323..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vshl_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
deleted file mode 100644
index c76fab0f1b0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vshl_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
deleted file mode 100644
index cbf24090d7d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshl_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshl_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vshl_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
deleted file mode 100644
index 2173f834297..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_ns16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int32x4_t = vshll_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
deleted file mode 100644
index c9e44d0af9d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_ns32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int64x2_t = vshll_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
deleted file mode 100644
index 2c7220a8da0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_ns8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int16x8_t = vshll_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
deleted file mode 100644
index 03eea9ab95e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_nu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint32x4_t = vshll_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
deleted file mode 100644
index 6c162b63dec..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_nu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint64x2_t = vshll_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
deleted file mode 100644
index 5c1bfcfedc3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshll_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshll_nu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint16x8_t = vshll_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshll\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls16.c b/gcc/testsuite/gcc.target/arm/neon/vshls16.c
deleted file mode 100644
index b7812ce26d6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls32.c b/gcc/testsuite/gcc.target/arm/neon/vshls32.c
deleted file mode 100644
index 1d2b849a239..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls64.c b/gcc/testsuite/gcc.target/arm/neon/vshls64.c
deleted file mode 100644
index 02b3c3633bf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshls8.c b/gcc/testsuite/gcc.target/arm/neon/vshls8.c
deleted file mode 100644
index dfe9db46d02..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshls8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu16.c b/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
deleted file mode 100644
index 2ad9a50cfb8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu32.c b/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
deleted file mode 100644
index dfa55241043..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu64.c b/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
deleted file mode 100644
index 457ae42fd0a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_uint64x1_t = vshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshlu8.c b/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
deleted file mode 100644
index 6438ed3b76b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vshlu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshlu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
deleted file mode 100644
index 499ba2d2bd6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int16x8_t = vshrq_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
deleted file mode 100644
index 1c5341e3c49..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int32x4_t = vshrq_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
deleted file mode 100644
index ad72b6a37d1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int64x2_t = vshrq_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
deleted file mode 100644
index ba6efab3af1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-
-  out_int8x16_t = vshrq_n_s8 (arg0_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
deleted file mode 100644
index 99c566af1d7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint16x8_t = vshrq_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
deleted file mode 100644
index 7f51823bb0c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint32x4_t = vshrq_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
deleted file mode 100644
index ff5a270db8a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint64x2_t = vshrq_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
deleted file mode 100644
index 5cde269e298..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-
-  out_uint8x16_t = vshrq_n_u8 (arg0_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
deleted file mode 100644
index b49a0e66596..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-
-  out_int16x4_t = vshr_n_s16 (arg0_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
deleted file mode 100644
index a5809bf48ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-
-  out_int32x2_t = vshr_n_s32 (arg0_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
deleted file mode 100644
index 5c6f49387e6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-
-  out_int64x1_t = vshr_n_s64 (arg0_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
deleted file mode 100644
index 1fa24b1dd5e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-
-  out_int8x8_t = vshr_n_s8 (arg0_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
deleted file mode 100644
index 5b8e454e90b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-
-  out_uint16x4_t = vshr_n_u16 (arg0_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
deleted file mode 100644
index 28a7695cc34..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-
-  out_uint32x2_t = vshr_n_u32 (arg0_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
deleted file mode 100644
index 435466b736f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-
-  out_uint64x1_t = vshr_n_u64 (arg0_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
deleted file mode 100644
index 8d67a42f805..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshr_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshr_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-
-  out_uint8x8_t = vshr_n_u8 (arg0_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
deleted file mode 100644
index 6dc485de52f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_ns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-
-  out_int8x8_t = vshrn_n_s16 (arg0_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
deleted file mode 100644
index b7c93363e05..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_ns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-
-  out_int16x4_t = vshrn_n_s32 (arg0_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
deleted file mode 100644
index 7d0156aaadc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_ns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-
-  out_int32x2_t = vshrn_n_s64 (arg0_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
deleted file mode 100644
index 1c8b720ff38..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_nu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-
-  out_uint8x8_t = vshrn_n_u16 (arg0_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
deleted file mode 100644
index 6797a96f05e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_nu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-
-  out_uint16x4_t = vshrn_n_u32 (arg0_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
deleted file mode 100644
index ee66e03ae17..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vshrn_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vshrn_nu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-
-  out_uint32x2_t = vshrn_n_u64 (arg0_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
deleted file mode 100644
index 19cc7a995cf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vsliq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
deleted file mode 100644
index b7ca823d468..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_np64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vsliq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
deleted file mode 100644
index 52658e385bf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vsliq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
deleted file mode 100644
index 6bf242471a8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsliq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
deleted file mode 100644
index 8b61de4cf47..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsliq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
deleted file mode 100644
index 00a3b1a3e2c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsliq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
deleted file mode 100644
index 7c8cd8d98ae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsliq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
deleted file mode 100644
index e5df31ebd50..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsliq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
deleted file mode 100644
index 4e18c83cb36..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsliq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
deleted file mode 100644
index cf88f6251e9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsliq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
deleted file mode 100644
index 510a992f323..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsliQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsliQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsliq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
deleted file mode 100644
index 0b3015b008d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vsli_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
deleted file mode 100644
index c22a2011995..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsli_np64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vsli_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
deleted file mode 100644
index 4db60731d51..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vsli_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
deleted file mode 100644
index c2e7d7e686e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsli_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
deleted file mode 100644
index 11a10d11071..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsli_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
deleted file mode 100644
index b062ea80df6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsli_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
deleted file mode 100644
index d9408ad47b2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsli_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
deleted file mode 100644
index 5bfb4b0fa22..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsli_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
deleted file mode 100644
index d91a2bf20bb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsli_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
deleted file mode 100644
index cc27d52a9a5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsli_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
deleted file mode 100644
index 937dd91785e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsli_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsli_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsli_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
deleted file mode 100644
index 97e1c4b7643..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
deleted file mode 100644
index 7d45a3b3393..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
deleted file mode 100644
index b4069ca65c8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
deleted file mode 100644
index a849caefab2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
deleted file mode 100644
index ed258207581..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
deleted file mode 100644
index 1be7cff0327..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
deleted file mode 100644
index 79c4fac3c31..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
deleted file mode 100644
index e095fae3889..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsraQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsraQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
deleted file mode 100644
index b112bbd3d03..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
deleted file mode 100644
index 9ebcf6badb9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
deleted file mode 100644
index 132da31dcc0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
deleted file mode 100644
index 97f62ae7050..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
deleted file mode 100644
index 3dcb487d42d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
deleted file mode 100644
index 63dea5e3d26..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
deleted file mode 100644
index 2751a68dc23..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
deleted file mode 100644
index 49909b6c236..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsra_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsra_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
deleted file mode 100644
index 8413d0738b1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_np16 (void)
-{
-  poly16x8_t out_poly16x8_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8_t = vsriq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
deleted file mode 100644
index ca3a9f4bd74..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_np64 (void)
-{
-  poly64x2_t out_poly64x2_t;
-  poly64x2_t arg0_poly64x2_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  out_poly64x2_t = vsriq_n_p64 (arg0_poly64x2_t, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
deleted file mode 100644
index 1683fe6f045..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_np8 (void)
-{
-  poly8x16_t out_poly8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16_t = vsriq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
deleted file mode 100644
index 8e1bcbb3228..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsriq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
deleted file mode 100644
index 41c611cb7f8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsriq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
deleted file mode 100644
index 3a8648a2ad6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsriq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
deleted file mode 100644
index 41457dafeee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_ns8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsriq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
deleted file mode 100644
index 33f9fa8b35a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsriq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
deleted file mode 100644
index 951f28f9914..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsriq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
deleted file mode 100644
index ff8e81c6763..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsriq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
deleted file mode 100644
index 6cdf11d7f06..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsriQ_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsriQ_nu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsriq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
deleted file mode 100644
index 9e3fe6bb0ea..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_np16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_np16 (void)
-{
-  poly16x4_t out_poly16x4_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4_t = vsri_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
deleted file mode 100644
index 0734b12a19c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_np64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vsri_np64 (void)
-{
-  poly64x1_t out_poly64x1_t;
-  poly64x1_t arg0_poly64x1_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  out_poly64x1_t = vsri_n_p64 (arg0_poly64x1_t, arg1_poly64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
deleted file mode 100644
index fd3d55e87c3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_np8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_np8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8_t = vsri_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
deleted file mode 100644
index 4631cbfc2b3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsri_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
deleted file mode 100644
index 163a3c36284..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsri_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
deleted file mode 100644
index de2b7cb9890..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsri_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
deleted file mode 100644
index b9d74b2bdb2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_ns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_ns8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsri_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
deleted file mode 100644
index f1a7c6b74ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsri_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
deleted file mode 100644
index 9d67c315e4c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsri_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
deleted file mode 100644
index 4a9da82fed0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsri_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c b/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
deleted file mode 100644
index 2536746fa1f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsri_nu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsri_nu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsri_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
deleted file mode 100644
index a05612be315..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4_t arg1_float32x4_t;
-
-  vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
deleted file mode 100644
index 7b74781edd5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
deleted file mode 100644
index 08060d18079..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanep64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  vst1q_lane_p64 (arg0_poly64_t, arg1_poly64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
deleted file mode 100644
index 40181c60500..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
deleted file mode 100644
index a4d7d35f855..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8_t arg1_int16x8_t;
-
-  vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
deleted file mode 100644
index e0d8ec0840d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4_t arg1_int32x4_t;
-
-  vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
deleted file mode 100644
index 6b82ff4b1f1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x2_t arg1_int64x2_t;
-
-  vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
deleted file mode 100644
index 726689038fd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16_t arg1_int8x16_t;
-
-  vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
deleted file mode 100644
index 1281976bfd5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
deleted file mode 100644
index 79b7cbc5223..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c
deleted file mode 100644
index 5f4c927b6e0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64-1.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/* Test the `vst1Q_laneu64' ARM Neon intrinsic.  */
-
-/* Detect ICE in the case of unaligned memory address.  */
-
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-unsigned char dummy_store[1000];
-
-void
-foo (char* addr)
-{
-  uint8x16_t vdata = vld1q_u8 (addr);
-  vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0);
-}
-
-uint64_t
-bar (uint64x2_t vdata)
-{
-  vdata = vld1q_lane_u64 ((uint64_t*) &dummy_store, vdata, 0);
-  return vgetq_lane_u64 (vdata, 0);
-}
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
deleted file mode 100644
index 84d6250871c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
deleted file mode 100644
index 578a2f57e9f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Q_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Q_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
deleted file mode 100644
index 1d13c924624..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4_t arg1_float32x4_t;
-
-  vst1q_f32 (arg0_float32_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
deleted file mode 100644
index 281d8dad965..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
deleted file mode 100644
index 8a4de715a73..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qp64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1Qp64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x2_t arg1_poly64x2_t;
-
-  vst1q_p64 (arg0_poly64_t, arg1_poly64x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
deleted file mode 100644
index f1e39ec7a68..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
deleted file mode 100644
index 73c1e29a38b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8_t arg1_int16x8_t;
-
-  vst1q_s16 (arg0_int16_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
deleted file mode 100644
index 8c7c345cad6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4_t arg1_int32x4_t;
-
-  vst1q_s32 (arg0_int32_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
deleted file mode 100644
index ec09003ca11..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x2_t arg1_int64x2_t;
-
-  vst1q_s64 (arg0_int64_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
deleted file mode 100644
index 5a2d81552cb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16_t arg1_int8x16_t;
-
-  vst1q_s8 (arg0_int8_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
deleted file mode 100644
index a129e66ffa3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
deleted file mode 100644
index e79ab862c9a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
deleted file mode 100644
index c7c088c3caf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
deleted file mode 100644
index b9159a557c1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
deleted file mode 100644
index edbfe1b022c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2_t arg1_float32x2_t;
-
-  vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
deleted file mode 100644
index d02a2346f9e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
deleted file mode 100644
index 74e4519fa9c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanep64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanep64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  vst1_lane_p64 (arg0_poly64_t, arg1_poly64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
deleted file mode 100644
index e161933b046..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
deleted file mode 100644
index d12acba6572..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4_t arg1_int16x4_t;
-
-  vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
deleted file mode 100644
index 5bec5955b82..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2_t arg1_int32x2_t;
-
-  vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
deleted file mode 100644
index acefe716cce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1_t arg1_int64x1_t;
-
-  vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
deleted file mode 100644
index d0557ea2589..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8_t arg1_int8x8_t;
-
-  vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
deleted file mode 100644
index 39357eae8f8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
deleted file mode 100644
index 8ae372be598..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
deleted file mode 100644
index 5620876d726..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
deleted file mode 100644
index 0a1f252edf7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c b/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
deleted file mode 100644
index 8b9f3f7cb47..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2_t arg1_float32x2_t;
-
-  vst1_f32 (arg0_float32_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c b/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
deleted file mode 100644
index 4d7b2fa9ccd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  vst1_p16 (arg0_poly16_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p64.c b/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
deleted file mode 100644
index 9fa82b13eb0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst1p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1_t arg1_poly64x1_t;
-
-  vst1_p64 (arg0_poly64_t, arg1_poly64x1_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c b/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
deleted file mode 100644
index b629bfc5eaa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  vst1_p8 (arg0_poly8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c b/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
deleted file mode 100644
index 554763bce3b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4_t arg1_int16x4_t;
-
-  vst1_s16 (arg0_int16_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c b/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
deleted file mode 100644
index 32614202b96..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2_t arg1_int32x2_t;
-
-  vst1_s32 (arg0_int32_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c b/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
deleted file mode 100644
index 2dcaf33c330..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1_t arg1_int64x1_t;
-
-  vst1_s64 (arg0_int64_t, arg1_int64x1_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c b/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
deleted file mode 100644
index f0820f7ec52..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8_t arg1_int8x8_t;
-
-  vst1_s8 (arg0_int8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c b/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
deleted file mode 100644
index e278f561d00..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  vst1_u16 (arg0_uint16_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c b/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
deleted file mode 100644
index 29d5ef2a58e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  vst1_u32 (arg0_uint32_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c b/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
deleted file mode 100644
index cde780f8b46..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  vst1_u64 (arg0_uint64_t, arg1_uint64x1_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c b/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
deleted file mode 100644
index 897b25726f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst1u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  vst1_u8 (arg0_uint8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
deleted file mode 100644
index b99545e6fe7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x2_t arg1_float32x4x2_t;
-
-  vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
deleted file mode 100644
index a252e91de59..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x2_t arg1_poly16x8x2_t;
-
-  vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
deleted file mode 100644
index 19ecbd1d25d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x2_t arg1_int16x8x2_t;
-
-  vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
deleted file mode 100644
index 6a7d4f263c3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x2_t arg1_int32x4x2_t;
-
-  vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
deleted file mode 100644
index 8559b6a048d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x2_t arg1_uint16x8x2_t;
-
-  vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
deleted file mode 100644
index 016eaee099b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x2_t arg1_uint32x4x2_t;
-
-  vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
deleted file mode 100644
index 1717a3ae991..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x2_t arg1_float32x4x2_t;
-
-  vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
deleted file mode 100644
index 2ab88bf7ed7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x2_t arg1_poly16x8x2_t;
-
-  vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
deleted file mode 100644
index feab9508943..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16x2_t arg1_poly8x16x2_t;
-
-  vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
deleted file mode 100644
index 294cb218c2f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x2_t arg1_int16x8x2_t;
-
-  vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
deleted file mode 100644
index 9c1bb52a63d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x2_t arg1_int32x4x2_t;
-
-  vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
deleted file mode 100644
index d473ed224a1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16x2_t arg1_int8x16x2_t;
-
-  vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
deleted file mode 100644
index d74e55d685e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x2_t arg1_uint16x8x2_t;
-
-  vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
deleted file mode 100644
index d669db27bb4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x2_t arg1_uint32x4x2_t;
-
-  vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
deleted file mode 100644
index 82065a056c0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst2Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16x2_t arg1_uint8x16x2_t;
-
-  vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
deleted file mode 100644
index 69d381ca1ae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x2_t arg1_float32x2x2_t;
-
-  vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
deleted file mode 100644
index 83fc0fcc55e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x2_t arg1_poly16x4x2_t;
-
-  vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
deleted file mode 100644
index ec22388681b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-
-  vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
deleted file mode 100644
index 881fbdd790a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x2_t arg1_int16x4x2_t;
-
-  vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
deleted file mode 100644
index bc928e6cd80..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x2_t arg1_int32x2x2_t;
-
-  vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
deleted file mode 100644
index 0a05595c331..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x2_t arg1_int8x8x2_t;
-
-  vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
deleted file mode 100644
index b1af8efc545..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x2_t arg1_uint16x4x2_t;
-
-  vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
deleted file mode 100644
index ed03bb43e67..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x2_t arg1_uint32x2x2_t;
-
-  vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
deleted file mode 100644
index c6c9e147980..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-
-  vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c b/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
deleted file mode 100644
index e96f78a80b3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x2_t arg1_float32x2x2_t;
-
-  vst2_f32 (arg0_float32_t, arg1_float32x2x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c b/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
deleted file mode 100644
index b5af7c6ef62..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x2_t arg1_poly16x4x2_t;
-
-  vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p64.c b/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
deleted file mode 100644
index adb0f7058a4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst2p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1x2_t arg1_poly64x1x2_t;
-
-  vst2_p64 (arg0_poly64_t, arg1_poly64x1x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c b/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
deleted file mode 100644
index 5dee0198db4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-
-  vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c b/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
deleted file mode 100644
index f640c13879c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x2_t arg1_int16x4x2_t;
-
-  vst2_s16 (arg0_int16_t, arg1_int16x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c b/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
deleted file mode 100644
index b2f6ea12dcd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x2_t arg1_int32x2x2_t;
-
-  vst2_s32 (arg0_int32_t, arg1_int32x2x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c b/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
deleted file mode 100644
index c88de13c0f4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1x2_t arg1_int64x1x2_t;
-
-  vst2_s64 (arg0_int64_t, arg1_int64x1x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c b/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
deleted file mode 100644
index 8b7b28da22e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x2_t arg1_int8x8x2_t;
-
-  vst2_s8 (arg0_int8_t, arg1_int8x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c b/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
deleted file mode 100644
index 9a93b6d1608..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x2_t arg1_uint16x4x2_t;
-
-  vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c b/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
deleted file mode 100644
index 1c8a79dda96..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x2_t arg1_uint32x2x2_t;
-
-  vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c b/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
deleted file mode 100644
index 7f1539ff721..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1x2_t arg1_uint64x1x2_t;
-
-  vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c b/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
deleted file mode 100644
index e076239092f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst2u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-
-  vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t);
-}
-
-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
deleted file mode 100644
index 1bd77ccbf6c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x3_t arg1_float32x4x3_t;
-
-  vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
deleted file mode 100644
index 46266317cb6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x3_t arg1_poly16x8x3_t;
-
-  vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
deleted file mode 100644
index 92c46b12df0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x3_t arg1_int16x8x3_t;
-
-  vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
deleted file mode 100644
index 55190b3967f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x3_t arg1_int32x4x3_t;
-
-  vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
deleted file mode 100644
index f7a455b82c4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x3_t arg1_uint16x8x3_t;
-
-  vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
deleted file mode 100644
index c91ca469f41..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x3_t arg1_uint32x4x3_t;
-
-  vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
deleted file mode 100644
index 2b709969cd2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x3_t arg1_float32x4x3_t;
-
-  vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
deleted file mode 100644
index 969120f9f11..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x3_t arg1_poly16x8x3_t;
-
-  vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
deleted file mode 100644
index 6f896176499..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16x3_t arg1_poly8x16x3_t;
-
-  vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
deleted file mode 100644
index 872c203369d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x3_t arg1_int16x8x3_t;
-
-  vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
deleted file mode 100644
index 40408097126..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x3_t arg1_int32x4x3_t;
-
-  vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
deleted file mode 100644
index ff0d713ef27..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16x3_t arg1_int8x16x3_t;
-
-  vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
deleted file mode 100644
index 4e45ec9edda..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x3_t arg1_uint16x8x3_t;
-
-  vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
deleted file mode 100644
index b1bbdc1615d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x3_t arg1_uint32x4x3_t;
-
-  vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
deleted file mode 100644
index ccd3b051729..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst3Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16x3_t arg1_uint8x16x3_t;
-
-  vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
deleted file mode 100644
index 820f19650bb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x3_t arg1_float32x2x3_t;
-
-  vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
deleted file mode 100644
index c7db5b621b4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x3_t arg1_poly16x4x3_t;
-
-  vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
deleted file mode 100644
index 5732440bbf2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-
-  vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
deleted file mode 100644
index 364f1c41db1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x3_t arg1_int16x4x3_t;
-
-  vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
deleted file mode 100644
index d48c58224d6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x3_t arg1_int32x2x3_t;
-
-  vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
deleted file mode 100644
index 9bee542149f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x3_t arg1_int8x8x3_t;
-
-  vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
deleted file mode 100644
index c5460d20f78..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x3_t arg1_uint16x4x3_t;
-
-  vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
deleted file mode 100644
index 1180d1dd27f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x3_t arg1_uint32x2x3_t;
-
-  vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
deleted file mode 100644
index 006877f908c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-
-  vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c b/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
deleted file mode 100644
index dcca5384324..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x3_t arg1_float32x2x3_t;
-
-  vst3_f32 (arg0_float32_t, arg1_float32x2x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c b/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
deleted file mode 100644
index 769bddb3b7f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x3_t arg1_poly16x4x3_t;
-
-  vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p64.c b/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
deleted file mode 100644
index d0f249c00ee..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst3p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1x3_t arg1_poly64x1x3_t;
-
-  vst3_p64 (arg0_poly64_t, arg1_poly64x1x3_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c b/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
deleted file mode 100644
index cfdb74c755d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-
-  vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c b/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
deleted file mode 100644
index e4e030326b5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x3_t arg1_int16x4x3_t;
-
-  vst3_s16 (arg0_int16_t, arg1_int16x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c b/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
deleted file mode 100644
index 11389c58af2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x3_t arg1_int32x2x3_t;
-
-  vst3_s32 (arg0_int32_t, arg1_int32x2x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c b/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
deleted file mode 100644
index 79b5fca8dbe..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1x3_t arg1_int64x1x3_t;
-
-  vst3_s64 (arg0_int64_t, arg1_int64x1x3_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c b/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
deleted file mode 100644
index 7943f53e730..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x3_t arg1_int8x8x3_t;
-
-  vst3_s8 (arg0_int8_t, arg1_int8x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c b/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
deleted file mode 100644
index 73a0fa0ed8c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x3_t arg1_uint16x4x3_t;
-
-  vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c b/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
deleted file mode 100644
index 902099bfed3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x3_t arg1_uint32x2x3_t;
-
-  vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c b/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
deleted file mode 100644
index 49cbd32cd04..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1x3_t arg1_uint64x1x3_t;
-
-  vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c b/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
deleted file mode 100644
index 29038777af0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst3u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-
-  vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t);
-}
-
-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
deleted file mode 100644
index 40ef7245701..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x4_t arg1_float32x4x4_t;
-
-  vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
deleted file mode 100644
index 374dcf17ca7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x4_t arg1_poly16x8x4_t;
-
-  vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
deleted file mode 100644
index 2867706f68a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x4_t arg1_int16x8x4_t;
-
-  vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
deleted file mode 100644
index 375535d9a1c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x4_t arg1_int32x4x4_t;
-
-  vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
deleted file mode 100644
index 147a62a97c2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x4_t arg1_uint16x8x4_t;
-
-  vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
deleted file mode 100644
index 7974114f0a7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4Q_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Q_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x4_t arg1_uint32x4x4_t;
-
-  vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
deleted file mode 100644
index 77f1a522c9b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qf32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x4x4_t arg1_float32x4x4_t;
-
-  vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
deleted file mode 100644
index 20c8a4cd4a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qp16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x8x4_t arg1_poly16x8x4_t;
-
-  vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
deleted file mode 100644
index ac018960137..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qp8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x16x4_t arg1_poly8x16x4_t;
-
-  vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
deleted file mode 100644
index 43a3d642bf3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qs16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x8x4_t arg1_int16x8x4_t;
-
-  vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
deleted file mode 100644
index 1603e94925a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qs32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x4x4_t arg1_int32x4x4_t;
-
-  vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
deleted file mode 100644
index b5fe67296d8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qs8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x16x4_t arg1_int8x16x4_t;
-
-  vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
deleted file mode 100644
index d5edab60709..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x8x4_t arg1_uint16x8x4_t;
-
-  vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
deleted file mode 100644
index c47da4fae62..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x4x4_t arg1_uint32x4x4_t;
-
-  vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
deleted file mode 100644
index 4ee346043f3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vst4Qu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4Qu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x16x4_t arg1_uint8x16x4_t;
-
-  vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
deleted file mode 100644
index 15fb232fdb4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanef32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanef32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x4_t arg1_float32x2x4_t;
-
-  vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
deleted file mode 100644
index 2c6d372608a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanep16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanep16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x4_t arg1_poly16x4x4_t;
-
-  vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
deleted file mode 100644
index 088dec9bacf..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanep8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanep8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-
-  vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
deleted file mode 100644
index c5d5868b67d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanes16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanes16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x4_t arg1_int16x4x4_t;
-
-  vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
deleted file mode 100644
index 7a2655d2dc1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanes32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanes32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x4_t arg1_int32x2x4_t;
-
-  vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
deleted file mode 100644
index 10940449226..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_lanes8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_lanes8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x4_t arg1_int8x8x4_t;
-
-  vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
deleted file mode 100644
index 8597c416c8c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_laneu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_laneu16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x4_t arg1_uint16x4x4_t;
-
-  vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
deleted file mode 100644
index e911fffd6de..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_laneu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_laneu32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x4_t arg1_uint32x2x4_t;
-
-  vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c b/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
deleted file mode 100644
index 0f8c131e060..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4_laneu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4_laneu8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-
-  vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c b/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
deleted file mode 100644
index bf061b43d33..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4f32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4f32 (void)
-{
-  float32_t *arg0_float32_t;
-  float32x2x4_t arg1_float32x2x4_t;
-
-  vst4_f32 (arg0_float32_t, arg1_float32x2x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c b/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
deleted file mode 100644
index 0877c3addae..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4p16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4p16 (void)
-{
-  poly16_t *arg0_poly16_t;
-  poly16x4x4_t arg1_poly16x4x4_t;
-
-  vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p64.c b/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
deleted file mode 100644
index 020bb42024d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4p64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_crypto_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_crypto } */
-
-#include "arm_neon.h"
-
-void test_vst4p64 (void)
-{
-  poly64_t *arg0_poly64_t;
-  poly64x1x4_t arg1_poly64x1x4_t;
-
-  vst4_p64 (arg0_poly64_t, arg1_poly64x1x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c b/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
deleted file mode 100644
index 371705e8340..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4p8 (void)
-{
-  poly8_t *arg0_poly8_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-
-  vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c b/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
deleted file mode 100644
index 112073c7b53..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s16 (void)
-{
-  int16_t *arg0_int16_t;
-  int16x4x4_t arg1_int16x4x4_t;
-
-  vst4_s16 (arg0_int16_t, arg1_int16x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c b/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
deleted file mode 100644
index 4e2cbf2d108..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s32 (void)
-{
-  int32_t *arg0_int32_t;
-  int32x2x4_t arg1_int32x2x4_t;
-
-  vst4_s32 (arg0_int32_t, arg1_int32x2x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c b/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
deleted file mode 100644
index b1a839afe88..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s64 (void)
-{
-  int64_t *arg0_int64_t;
-  int64x1x4_t arg1_int64x1x4_t;
-
-  vst4_s64 (arg0_int64_t, arg1_int64x1x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c b/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
deleted file mode 100644
index 9d02dba868f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4s8 (void)
-{
-  int8_t *arg0_int8_t;
-  int8x8x4_t arg1_int8x8x4_t;
-
-  vst4_s8 (arg0_int8_t, arg1_int8x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c b/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
deleted file mode 100644
index 434aacbbb0b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u16 (void)
-{
-  uint16_t *arg0_uint16_t;
-  uint16x4x4_t arg1_uint16x4x4_t;
-
-  vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c b/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
deleted file mode 100644
index 4e234d7d640..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u32 (void)
-{
-  uint32_t *arg0_uint32_t;
-  uint32x2x4_t arg1_uint32x2x4_t;
-
-  vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c b/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
deleted file mode 100644
index 225fe7d052c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u64 (void)
-{
-  uint64_t *arg0_uint64_t;
-  uint64x1x4_t arg1_uint64x1x4_t;
-
-  vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t);
-}
-
-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c b/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
deleted file mode 100644
index e19cb6d4f94..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vst4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vst4u8 (void)
-{
-  uint8_t *arg0_uint8_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-
-  vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t);
-}
-
-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
deleted file mode 100644
index 903b43c95ad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQf32 (void)
-{
-  float32x4_t out_float32x4_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4_t = vsubq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
deleted file mode 100644
index 553c9a9d55b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs16 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8_t = vsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
deleted file mode 100644
index c59d4a055c5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs32 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4_t = vsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
deleted file mode 100644
index c2034c17a33..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs64 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int64x2_t = vsubq_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c b/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
deleted file mode 100644
index 2b084270e1f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQs8 (void)
-{
-  int8x16_t out_int8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16_t = vsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
deleted file mode 100644
index e15ecae5efb..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
deleted file mode 100644
index 3836901e668..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
deleted file mode 100644
index e403652379b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu64 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint64x2_t = vsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
deleted file mode 100644
index 4290f48c967..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubf32.c b/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
deleted file mode 100644
index 4f2f3be07d4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubf32 (void)
-{
-  float32x2_t out_float32x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2_t = vsub_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
deleted file mode 100644
index 2721297a463..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhns16 (void)
-{
-  int8x8_t out_int8x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int8x8_t = vsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
deleted file mode 100644
index 40d4ffd614d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhns32 (void)
-{
-  int16x4_t out_int16x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int16x4_t = vsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c b/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
deleted file mode 100644
index de5b43122a3..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhns64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhns64 (void)
-{
-  int32x2_t out_int32x2_t;
-  int64x2_t arg0_int64x2_t;
-  int64x2_t arg1_int64x2_t;
-
-  out_int32x2_t = vsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
deleted file mode 100644
index 86ca09a6475..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhnu16 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint8x8_t = vsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
deleted file mode 100644
index 7b99f513d8b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhnu32 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint16x4_t = vsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
deleted file mode 100644
index 0198b1e7b73..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubhnu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubhnu64 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint64x2_t arg1_uint64x2_t;
-
-  out_uint32x2_t = vsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls16.c b/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
deleted file mode 100644
index 754d1d1406d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubls16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubls16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vsubl_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls32.c b/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
deleted file mode 100644
index 183e61f3141..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubls32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubls32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vsubl_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubls8.c b/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
deleted file mode 100644
index 1f9e9390229..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubls8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubls8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vsubl_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu16.c b/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
deleted file mode 100644
index 51afdb42c0a..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsublu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsublu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vsubl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu32.c b/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
deleted file mode 100644
index 459f31af0a7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsublu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsublu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vsubl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsublu8.c b/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
deleted file mode 100644
index 5db43195f7c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsublu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsublu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vsubl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs16.c b/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
deleted file mode 100644
index 89618e8b00d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs16 (void)
-{
-  int16x4_t out_int16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4_t = vsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs32.c b/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
deleted file mode 100644
index bbe713c5944..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs32 (void)
-{
-  int32x2_t out_int32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2_t = vsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c b/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
deleted file mode 100644
index 46694c9dbac..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vsubs64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs64 (void)
-{
-  int64x1_t out_int64x1_t;
-  int64x1_t arg0_int64x1_t;
-  int64x1_t arg1_int64x1_t;
-
-  out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs8.c b/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
deleted file mode 100644
index 75d990fd724..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubs8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
deleted file mode 100644
index 2262e390d7d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
deleted file mode 100644
index 4b651ba56f8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
deleted file mode 100644
index 55581f1a546..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Test the `vsubu64' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu64 (void)
-{
-  uint64x1_t out_uint64x1_t;
-  uint64x1_t arg0_uint64x1_t;
-  uint64x1_t arg1_uint64x1_t;
-
-  out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
-}
-
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
deleted file mode 100644
index e293de22c92..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws16.c b/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
deleted file mode 100644
index 8eab8afbe89..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubws16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubws16 (void)
-{
-  int32x4_t out_int32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int32x4_t = vsubw_s16 (arg0_int32x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws32.c b/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
deleted file mode 100644
index 514ec751bce..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubws32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubws32 (void)
-{
-  int64x2_t out_int64x2_t;
-  int64x2_t arg0_int64x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int64x2_t = vsubw_s32 (arg0_int64x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubws8.c b/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
deleted file mode 100644
index 86a0ecff692..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubws8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubws8 (void)
-{
-  int16x8_t out_int16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int16x8_t = vsubw_s8 (arg0_int16x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
deleted file mode 100644
index 7c48f406b16..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubwu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubwu16 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint32x4_t = vsubw_u16 (arg0_uint32x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
deleted file mode 100644
index 3137ec61efd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubwu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubwu32 (void)
-{
-  uint64x2_t out_uint64x2_t;
-  uint64x2_t arg0_uint64x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint64x2_t = vsubw_u32 (arg0_uint64x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c b/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
deleted file mode 100644
index 7e40d00f767..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vsubwu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vsubwu8 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint16x8_t = vsubw_u8 (arg0_uint16x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vsubw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
deleted file mode 100644
index 52127aee621..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl1p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl1_p8 (arg0_poly8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
deleted file mode 100644
index a155244a538..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl1s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl1_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
deleted file mode 100644
index 5a71ed717d1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl1u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl1_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
deleted file mode 100644
index e367dbe9b02..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl2p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8x2_t arg0_poly8x8x2_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl2_p8 (arg0_poly8x8x2_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
deleted file mode 100644
index 5cf2224f0d4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl2s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8x2_t arg0_int8x8x2_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl2_s8 (arg0_int8x8x2_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
deleted file mode 100644
index 680e93047f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl2u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8x2_t arg0_uint8x8x2_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl2_u8 (arg0_uint8x8x2_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
deleted file mode 100644
index 2a534d03c66..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl3p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8x3_t arg0_poly8x8x3_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl3_p8 (arg0_poly8x8x3_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
deleted file mode 100644
index aaa91365ce2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl3s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8x3_t arg0_int8x8x3_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl3_s8 (arg0_int8x8x3_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
deleted file mode 100644
index 7edd405882b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl3u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8x3_t arg0_uint8x8x3_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl3_u8 (arg0_uint8x8x3_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
deleted file mode 100644
index e1469faf5d0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl4p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8x4_t arg0_poly8x8x4_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_poly8x8_t = vtbl4_p8 (arg0_poly8x8x4_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
deleted file mode 100644
index 5bb966bb5ba..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl4s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8x4_t arg0_int8x8x4_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8_t = vtbl4_s8 (arg0_int8x8x4_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
deleted file mode 100644
index 6b3d914db5e..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtbl4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbl4u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8x4_t arg0_uint8x8x4_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtbl4_u8 (arg0_uint8x8x4_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
deleted file mode 100644
index abac2528031..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx1p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx1p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx1_p8 (arg0_poly8x8_t, arg1_poly8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
deleted file mode 100644
index 93ee371a0f5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx1s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx1s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx1_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
deleted file mode 100644
index 91e52a271e5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx1u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx1u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx1_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
deleted file mode 100644
index 65b0435e685..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx2p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx2p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8x2_t arg1_poly8x8x2_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx2_p8 (arg0_poly8x8_t, arg1_poly8x8x2_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
deleted file mode 100644
index 7209bea094f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx2s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx2s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8x2_t arg1_int8x8x2_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx2_s8 (arg0_int8x8_t, arg1_int8x8x2_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
deleted file mode 100644
index 12f86b1101b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx2u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx2u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8x2_t arg1_uint8x8x2_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx2_u8 (arg0_uint8x8_t, arg1_uint8x8x2_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
deleted file mode 100644
index 4acbb55f29f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx3p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx3p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8x3_t arg1_poly8x8x3_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx3_p8 (arg0_poly8x8_t, arg1_poly8x8x3_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
deleted file mode 100644
index b7f7b7a3c46..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx3s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx3s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8x3_t arg1_int8x8x3_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx3_s8 (arg0_int8x8_t, arg1_int8x8x3_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
deleted file mode 100644
index 57f8d643ca8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx3u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx3u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8x3_t arg1_uint8x8x3_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx3_u8 (arg0_uint8x8_t, arg1_uint8x8x3_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
deleted file mode 100644
index 0880c17a5a1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx4p8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx4p8 (void)
-{
-  poly8x8_t out_poly8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8x4_t arg1_poly8x8x4_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_poly8x8_t = vtbx4_p8 (arg0_poly8x8_t, arg1_poly8x8x4_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
deleted file mode 100644
index 9f24dee6917..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx4s8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx4s8 (void)
-{
-  int8x8_t out_int8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8x4_t arg1_int8x8x4_t;
-  int8x8_t arg2_int8x8_t;
-
-  out_int8x8_t = vtbx4_s8 (arg0_int8x8_t, arg1_int8x8x4_t, arg2_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c b/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
deleted file mode 100644
index 4c15ffac60b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Test the `vtbx4u8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtbx4u8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8x4_t arg1_uint8x8x4_t;
-  uint8x8_t arg2_uint8x8_t;
-
-  out_uint8x8_t = vtbx4_u8 (arg0_uint8x8_t, arg1_uint8x8x4_t, arg2_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
deleted file mode 100644
index 5098097c91b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4x2_t = vtrnq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
deleted file mode 100644
index 6ae7f5aa7a6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8x2_t = vtrnq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
deleted file mode 100644
index 2c0951a9ae8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16x2_t = vtrnq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
deleted file mode 100644
index e9359f37daa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8x2_t = vtrnq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
deleted file mode 100644
index f19a386dd88..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4x2_t = vtrnq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
deleted file mode 100644
index c5fba7690ca..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16x2_t = vtrnq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
deleted file mode 100644
index 4efaef0e678..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8x2_t = vtrnq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
deleted file mode 100644
index 4df963d2265..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4x2_t = vtrnq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
deleted file mode 100644
index db21e83cac7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnQu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16x2_t = vtrnq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
deleted file mode 100644
index 5f25d3784fd..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2x2_t = vtrn_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
deleted file mode 100644
index a5d63f94cad..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4x2_t = vtrn_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
deleted file mode 100644
index 3d5ec4beb83..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8x2_t = vtrn_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns16.c b/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
deleted file mode 100644
index c37f4fa5c2b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrns16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrns16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4x2_t = vtrn_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns32.c b/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
deleted file mode 100644
index 707459f9904..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrns32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrns32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2x2_t = vtrn_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrns8.c b/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
deleted file mode 100644
index cfad2510cb4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrns8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrns8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8x2_t = vtrn_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
deleted file mode 100644
index 8add51bdca4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4x2_t = vtrn_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
deleted file mode 100644
index de9fc554636..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2x2_t = vtrn_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c b/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
deleted file mode 100644
index 5dc63e72d23..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtrnu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtrnu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8x2_t = vtrn_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
deleted file mode 100644
index 97ef65007e4..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQp8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_uint8x16_t = vtstq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
deleted file mode 100644
index d8d6881f77c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQs16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_uint16x8_t = vtstq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
deleted file mode 100644
index c9c212ea803..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQs32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_uint32x4_t = vtstq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
deleted file mode 100644
index a0f791def8b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQs8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_uint8x16_t = vtstq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
deleted file mode 100644
index e1f3adcaa94..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQu16 (void)
-{
-  uint16x8_t out_uint16x8_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8_t = vtstq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
deleted file mode 100644
index 215be3a075b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQu32 (void)
-{
-  uint32x4_t out_uint32x4_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4_t = vtstq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c b/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
deleted file mode 100644
index 74a5e595af8..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstQu8 (void)
-{
-  uint8x16_t out_uint8x16_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16_t = vtstq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstp8.c b/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
deleted file mode 100644
index e23b71909c9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstp8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_uint8x8_t = vtst_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts16.c b/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
deleted file mode 100644
index 2cac7318253..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtsts16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtsts16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_uint16x4_t = vtst_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts32.c b/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
deleted file mode 100644
index c932fbd0113..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtsts32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtsts32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_uint32x2_t = vtst_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtsts8.c b/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
deleted file mode 100644
index a5acd671efc..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtsts8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtsts8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_uint8x8_t = vtst_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu16.c b/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
deleted file mode 100644
index 7869c08ba71..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstu16 (void)
-{
-  uint16x4_t out_uint16x4_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4_t = vtst_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu32.c b/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
deleted file mode 100644
index ca4b5ca7d0d..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstu32 (void)
-{
-  uint32x2_t out_uint32x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2_t = vtst_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vtstu8.c b/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
deleted file mode 100644
index be18756d535..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vtstu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vtstu8 (void)
-{
-  uint8x8_t out_uint8x8_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8_t = vtst_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
deleted file mode 100644
index 4ea4c377d16..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4x2_t = vuzpq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
deleted file mode 100644
index b93fc3e88b9..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8x2_t = vuzpq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
deleted file mode 100644
index 2ac259b6190..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16x2_t = vuzpq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
deleted file mode 100644
index 81a69b7b5e2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8x2_t = vuzpq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
deleted file mode 100644
index 173c30de829..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4x2_t = vuzpq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
deleted file mode 100644
index 01950099b84..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16x2_t = vuzpq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
deleted file mode 100644
index e004a3f4fc1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8x2_t = vuzpq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
deleted file mode 100644
index ed64aa98f60..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4x2_t = vuzpq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
deleted file mode 100644
index b512247d04b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpQu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16x2_t = vuzpq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
deleted file mode 100644
index 067f43e497c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2x2_t = vuzp_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
deleted file mode 100644
index 01f3c174d6c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4x2_t = vuzp_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
deleted file mode 100644
index b90b4218eb2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8x2_t = vuzp_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps16.c b/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
deleted file mode 100644
index 9f69fa96376..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzps16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzps16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4x2_t = vuzp_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps32.c b/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
deleted file mode 100644
index 3cc32cdbe3f..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzps32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzps32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2x2_t = vuzp_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzps8.c b/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
deleted file mode 100644
index 4a32e542011..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzps8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzps8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8x2_t = vuzp_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
deleted file mode 100644
index c9e976d8881..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4x2_t = vuzp_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
deleted file mode 100644
index 0998a8c10c6..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2x2_t = vuzp_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c b/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
deleted file mode 100644
index 916c16490f1..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vuzpu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vuzpu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8x2_t = vuzp_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
deleted file mode 100644
index 239e91dca9c..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQf32 (void)
-{
-  float32x4x2_t out_float32x4x2_t;
-  float32x4_t arg0_float32x4_t;
-  float32x4_t arg1_float32x4_t;
-
-  out_float32x4x2_t = vzipq_f32 (arg0_float32x4_t, arg1_float32x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
deleted file mode 100644
index 0687a8e04f0..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQp16 (void)
-{
-  poly16x8x2_t out_poly16x8x2_t;
-  poly16x8_t arg0_poly16x8_t;
-  poly16x8_t arg1_poly16x8_t;
-
-  out_poly16x8x2_t = vzipq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
deleted file mode 100644
index ff78c6954d2..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQp8 (void)
-{
-  poly8x16x2_t out_poly8x16x2_t;
-  poly8x16_t arg0_poly8x16_t;
-  poly8x16_t arg1_poly8x16_t;
-
-  out_poly8x16x2_t = vzipq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
deleted file mode 100644
index 079e23ed097..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQs16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQs16 (void)
-{
-  int16x8x2_t out_int16x8x2_t;
-  int16x8_t arg0_int16x8_t;
-  int16x8_t arg1_int16x8_t;
-
-  out_int16x8x2_t = vzipq_s16 (arg0_int16x8_t, arg1_int16x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
deleted file mode 100644
index 842bf06f0aa..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQs32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQs32 (void)
-{
-  int32x4x2_t out_int32x4x2_t;
-  int32x4_t arg0_int32x4_t;
-  int32x4_t arg1_int32x4_t;
-
-  out_int32x4x2_t = vzipq_s32 (arg0_int32x4_t, arg1_int32x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
deleted file mode 100644
index fa9bc90f98b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQs8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQs8 (void)
-{
-  int8x16x2_t out_int8x16x2_t;
-  int8x16_t arg0_int8x16_t;
-  int8x16_t arg1_int8x16_t;
-
-  out_int8x16x2_t = vzipq_s8 (arg0_int8x16_t, arg1_int8x16_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
deleted file mode 100644
index 12958323c96..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQu16 (void)
-{
-  uint16x8x2_t out_uint16x8x2_t;
-  uint16x8_t arg0_uint16x8_t;
-  uint16x8_t arg1_uint16x8_t;
-
-  out_uint16x8x2_t = vzipq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
deleted file mode 100644
index af18fb52756..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQu32 (void)
-{
-  uint32x4x2_t out_uint32x4x2_t;
-  uint32x4_t arg0_uint32x4_t;
-  uint32x4_t arg1_uint32x4_t;
-
-  out_uint32x4x2_t = vzipq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c b/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
deleted file mode 100644
index fd72ce4fe6b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipQu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipQu8 (void)
-{
-  uint8x16x2_t out_uint8x16x2_t;
-  uint8x16_t arg0_uint8x16_t;
-  uint8x16_t arg1_uint8x16_t;
-
-  out_uint8x16x2_t = vzipq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipf32.c b/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
deleted file mode 100644
index 72fc156bb53..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipf32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipf32 (void)
-{
-  float32x2x2_t out_float32x2x2_t;
-  float32x2_t arg0_float32x2_t;
-  float32x2_t arg1_float32x2_t;
-
-  out_float32x2x2_t = vzip_f32 (arg0_float32x2_t, arg1_float32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipp16.c b/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
deleted file mode 100644
index fda2705c202..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipp16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipp16 (void)
-{
-  poly16x4x2_t out_poly16x4x2_t;
-  poly16x4_t arg0_poly16x4_t;
-  poly16x4_t arg1_poly16x4_t;
-
-  out_poly16x4x2_t = vzip_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipp8.c b/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
deleted file mode 100644
index 14a2af57f59..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipp8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipp8 (void)
-{
-  poly8x8x2_t out_poly8x8x2_t;
-  poly8x8_t arg0_poly8x8_t;
-  poly8x8_t arg1_poly8x8_t;
-
-  out_poly8x8x2_t = vzip_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips16.c b/gcc/testsuite/gcc.target/arm/neon/vzips16.c
deleted file mode 100644
index b47c3bb9fc5..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzips16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzips16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzips16 (void)
-{
-  int16x4x2_t out_int16x4x2_t;
-  int16x4_t arg0_int16x4_t;
-  int16x4_t arg1_int16x4_t;
-
-  out_int16x4x2_t = vzip_s16 (arg0_int16x4_t, arg1_int16x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips32.c b/gcc/testsuite/gcc.target/arm/neon/vzips32.c
deleted file mode 100644
index 8bb064d5154..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzips32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzips32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzips32 (void)
-{
-  int32x2x2_t out_int32x2x2_t;
-  int32x2_t arg0_int32x2_t;
-  int32x2_t arg1_int32x2_t;
-
-  out_int32x2x2_t = vzip_s32 (arg0_int32x2_t, arg1_int32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzips8.c b/gcc/testsuite/gcc.target/arm/neon/vzips8.c
deleted file mode 100644
index 4e20646662b..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzips8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzips8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzips8 (void)
-{
-  int8x8x2_t out_int8x8x2_t;
-  int8x8_t arg0_int8x8_t;
-  int8x8_t arg1_int8x8_t;
-
-  out_int8x8x2_t = vzip_s8 (arg0_int8x8_t, arg1_int8x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu16.c b/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
deleted file mode 100644
index ce8fe44e201..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipu16' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipu16 (void)
-{
-  uint16x4x2_t out_uint16x4x2_t;
-  uint16x4_t arg0_uint16x4_t;
-  uint16x4_t arg1_uint16x4_t;
-
-  out_uint16x4x2_t = vzip_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu32.c b/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
deleted file mode 100644
index 7667efcede7..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipu32' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipu32 (void)
-{
-  uint32x2x2_t out_uint32x2x2_t;
-  uint32x2_t arg0_uint32x2_t;
-  uint32x2_t arg1_uint32x2_t;
-
-  out_uint32x2x2_t = vzip_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
-}
-
-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/vzipu8.c b/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
deleted file mode 100644
index 12291038b83..00000000000
--- a/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* Test the `vzipu8' ARM Neon intrinsic.  */
-/* This file was autogenerated by neon-testgen.  */
-
-/* { dg-do assemble } */
-/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O0" } */
-/* { dg-add-options arm_neon } */
-
-#include "arm_neon.h"
-
-void test_vzipu8 (void)
-{
-  uint8x8x2_t out_uint8x8x2_t;
-  uint8x8_t arg0_uint8x8_t;
-  uint8x8_t arg1_uint8x8_t;
-
-  out_uint8x8x2_t = vzip_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
-}
-
-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
diff --git a/gcc/testsuite/gcc.target/arm/neon/polytypes.c b/gcc/testsuite/gcc.target/arm/polytypes.c
index f91f800a9be..f91f800a9be 100644
--- a/gcc/testsuite/gcc.target/arm/neon/polytypes.c
+++ b/gcc/testsuite/gcc.target/arm/polytypes.c
diff --git a/gcc/testsuite/gcc.target/arm/neon/pr51534.c b/gcc/testsuite/gcc.target/arm/pr51534.c
index f675a444a23..f675a444a23 100644
--- a/gcc/testsuite/gcc.target/arm/neon/pr51534.c
+++ b/gcc/testsuite/gcc.target/arm/pr51534.c
diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c b/gcc/testsuite/gcc.target/arm/vect-vcvt.c
index 816f68dbeb3..816f68dbeb3 100644
--- a/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c
+++ b/gcc/testsuite/gcc.target/arm/vect-vcvt.c
diff --git a/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c b/gcc/testsuite/gcc.target/arm/vect-vcvtq.c
index 47e278aed67..47e278aed67 100644
--- a/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c
+++ b/gcc/testsuite/gcc.target/arm/vect-vcvtq.c
diff --git a/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c b/gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c
index 51a7f9a897f..51a7f9a897f 100644
--- a/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
+++ b/gcc/testsuite/gcc.target/arm/vfp-shift-a2t2.c
diff --git a/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c b/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c
new file mode 100644
index 00000000000..de4e92a0b4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vst1Q_laneu64-1.c
@@ -0,0 +1,25 @@
+/* Test the `vst1Q_laneu64' ARM Neon intrinsic.  */
+
+/* Detect ICE in the case of unaligned memory address.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-add-options arm_neon } */
+
+#include "arm_neon.h"
+
+unsigned char dummy_store[1000];
+
+void
+foo (unsigned char* addr)
+{
+  uint8x16_t vdata = vld1q_u8 (addr);
+  vst1q_lane_u64 ((uint64_t*) &dummy_store, vreinterpretq_u64_u8 (vdata), 0);
+}
+
+uint64_t
+bar (uint64x2_t vdata)
+{
+  vdata = vld1q_lane_u64 ((uint64_t*) &dummy_store, vdata, 0);
+  return vgetq_lane_u64 (vdata, 0);
+}
diff --git a/gcc/testsuite/gcc.target/avr/pr50739.c b/gcc/testsuite/gcc.target/avr/pr50739.c
new file mode 100644
index 00000000000..a6850b73c3e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr50739.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-fmerge-all-constants" } */
+
+char *ca = "123";
+
+const char a[] __attribute__((__progmem__))= "a";
+const char b[] __attribute__((__progmem__))= "b";
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-2.c b/gcc/testsuite/gcc.target/avr/pr71151-2.c
index e523ce09c7a..f745841df8a 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-2.c
+++ b/gcc/testsuite/gcc.target/avr/pr71151-2.c
@@ -5,6 +5,8 @@
    flash address for loading jump table entry, 2 byte entry, after
    removing the special section placement hook. */
 
+#define SECTION_NAME ".foo"
+
 #include "exit-abort.h"
 #include "pr71151-common.h"
 
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-3.c b/gcc/testsuite/gcc.target/avr/pr71151-3.c
index ce0ba5972e4..a8fa6b63e0b 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-3.c
+++ b/gcc/testsuite/gcc.target/avr/pr71151-3.c
@@ -1,10 +1,17 @@
 /* { dg-do run } */
 /* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -mno-relax -fdata-sections -Wl,--section-start=.foo=0x10000" } */
 
+#ifdef __AVR_HAVE_ELPM__
 /* Make sure jumptables work properly if placed above 64 KB and below 128 KB,
    i.e. 3 byte flash address for loading jump table entry and 2 byte jump table
    entry, with relaxation disabled, after removing the special section
    placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega64.  */
+#define SECTION_NAME ".text.foo"
+#endif
 
 #include "exit-abort.h"
 #include "pr71151-common.h"
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-4.c b/gcc/testsuite/gcc.target/avr/pr71151-4.c
index 51250b06133..659aff07510 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-4.c
+++ b/gcc/testsuite/gcc.target/avr/pr71151-4.c
@@ -1,10 +1,17 @@
 /* { dg-do run } */
 /* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mrelax -Wl,--section-start=.foo=0x10000" } */
 
+#ifdef __AVR_HAVE_ELPM__
 /* Make sure jumptables work properly if placed above 64 KB and below 128 KB,
    i.e. 3 byte flash address for loading jump table entry and 2 byte jump
    table entry, with relaxation enabled, after removing the special section
    placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega64.  */
+#define SECTION_NAME ".text.foo"
+#endif
 
 #include "exit-abort.h"
 #include "pr71151-common.h"
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-5.c b/gcc/testsuite/gcc.target/avr/pr71151-5.c
index 47030dca5ee..f9b09e82083 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-5.c
+++ b/gcc/testsuite/gcc.target/avr/pr71151-5.c
@@ -1,20 +1,23 @@
 /* { dg-do run } */
 /* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mno-relax -Wl,--section-start=.foo=0x20000" } */
 
+#ifdef __AVR_3_BYTE_PC__
 /* Make sure jumptables work properly if placed above 128 KB, i.e. 3 byte
    flash address for loading jump table entry and a jump table entry
    that is a stub, with relaxation disabled, after removing the special
    section placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega128.  */
+#define SECTION_NAME ".text.foo"
+#endif
 
 #include "exit-abort.h"
 #include "pr71151-common.h"
 
 int main()
 {
-	/* Not meant for devices with flash <= 128K */
-#if defined (__AVR_2_BYTE_PC__)
-	exit(0);
-#else
 	foo(5);
 	if (y != 37)
 		abort();
@@ -26,5 +29,4 @@ int main()
 	foo(7);
 	if (y != 98)
 		abort();
-#endif
 }
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-6.c b/gcc/testsuite/gcc.target/avr/pr71151-6.c
index 815aa13425c..dedeffaa425 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-6.c
+++ b/gcc/testsuite/gcc.target/avr/pr71151-6.c
@@ -1,20 +1,23 @@
 /* { dg-do run } */
 /* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mrelax -Wl,--section-start=.foo=0x20000" } */
 
+#ifdef __AVR_3_BYTE_PC__
 /* Make sure jumptables work properly if placed above 128 KB, i.e. 3 byte
    flash address for loading jump table entry and a jump table entry
    that is a stub, with relaxation enabled, after removing the special
    section placement hook. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega128.  */
+#define SECTION_NAME ".text.foo"
+#endif
 
 #include "exit-abort.h"
 #include "pr71151-common.h"
 
 int main()
 {
-	/* Not meant for devices with flash <= 128K */
-#if defined (__AVR_2_BYTE_PC__)
-	exit(0);
-#else
 	foo(5);
 	if (y != 37)
 		abort();
@@ -26,5 +29,4 @@ int main()
 	foo(7);
 	if (y != 98)
 		abort();
-#endif
 }
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-7.c b/gcc/testsuite/gcc.target/avr/pr71151-7.c
index cdc7ea9f65c..2a440960301 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-7.c
+++ b/gcc/testsuite/gcc.target/avr/pr71151-7.c
@@ -1,18 +1,21 @@
 /* { dg-do run } */
 /* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mno-relax -Wl,--section-start=.foo=0x1fffa" } */
 
+#ifdef __AVR_3_BYTE_PC__
 /* Make sure jumptables work properly if placed straddling 128 KB i.e
    some entries below 128 KB and some above it, with relaxation disabled. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort
+   for, e.g. ATmega128.  */
+#define SECTION_NAME ".text.foo"
+#endif
 
 #include "exit-abort.h"
 #include "pr71151-common.h"
 
 int main()
 {
-	/* Not meant for devices with flash <= 128K */
-#if defined (__AVR_2_BYTE_PC__)
-	exit(0);
-#else
 	foo(5);
 	if (y != 37)
 		abort();
@@ -24,5 +27,4 @@ int main()
 	foo(7);
 	if (y != 98)
 		abort();
-#endif
 }
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-8.c b/gcc/testsuite/gcc.target/avr/pr71151-8.c
index 0b7bf6a0e73..aa3015b0455 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-8.c
+++ b/gcc/testsuite/gcc.target/avr/pr71151-8.c
@@ -1,18 +1,20 @@
 /* { dg-do run } */
 /* { dg-options "-Os -fno-tree-switch-conversion -ffunction-sections -fdata-sections -mrelax -Wl,--section-start=.foo=0x1fffa" } */
 
+#ifdef __AVR_3_BYTE_PC__
 /* Make sure jumptables work properly if placed straddling 128 KB i.e
    some entries below 128 KB and some above it, with relaxation disabled. */
+#define SECTION_NAME ".foo"
+#else
+/* No special jump table placement so that avrtest won't abort.  */
+#define SECTION_NAME ".text.foo"
+#endif
 
 #include "exit-abort.h"
 #include "pr71151-common.h"
 
 int main()
 {
-	/* Not meant for devices with flash <= 128K */
-#if defined (__AVR_2_BYTE_PC__)
-	exit(0);
-#else
 	foo(5);
 	if (y != 37)
 		abort();
@@ -24,5 +26,4 @@ int main()
 	foo(7);
 	if (y != 98)
 		abort();
-#endif
 }
diff --git a/gcc/testsuite/gcc.target/avr/pr71151-common.h b/gcc/testsuite/gcc.target/avr/pr71151-common.h
index 0df17836b99..43379be5d2c 100644
--- a/gcc/testsuite/gcc.target/avr/pr71151-common.h
+++ b/gcc/testsuite/gcc.target/avr/pr71151-common.h
@@ -1,7 +1,7 @@
 volatile char y;
 volatile char g;
 
-__attribute__((section(".foo")))
+__attribute__((section(SECTION_NAME)))
 void foo(char x) 
 {
 	switch (x)
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vect-perm-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vect-perm-1.c
new file mode 100644
index 00000000000..ea6760d481c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vect-perm-1.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */

+/* { dg-options "-O2 -ftree-vectorize -ffast-math -march=knl" } */

+/* { dg-final { scan-assembler-times "vpermps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */

+

+#define N 1024

+float f1[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));

+float f2[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));

+

+void foo ()

+{

+  int j;

+  for (j=0; j<N; j++)

+    f1[j] += f2[N-j];

+}

diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vect-perm-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vect-perm-2.c
new file mode 100644
index 00000000000..29d00d75ac9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vect-perm-2.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */

+/* { dg-options "-O2 -ftree-vectorize -ffast-math -march=knl" } */

+/* { dg-final { scan-assembler-times "vpermpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */

+

+#define N 1024

+double d1[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));

+double d2[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));

+

+void foo ()

+{

+  int j;

+  for (j=0; j<N; j++)

+    d1[j] += d2[N-j];

+}

diff --git a/gcc/testsuite/gcc.target/i386/mpx/mpx-check.h b/gcc/testsuite/gcc.target/i386/mpx/mpx-check.h
index 3afa46093d1..73aa01f2565 100644
--- a/gcc/testsuite/gcc.target/i386/mpx/mpx-check.h
+++ b/gcc/testsuite/gcc.target/i386/mpx/mpx-check.h
@@ -16,6 +16,16 @@ mpx_test (int, const char **);
 
 #define DEBUG
 
+#define XSTATE_BNDREGS (1 << 3)
+
+/* This should be an intrinsic, but isn't.  */
+static int xgetbv (unsigned x)
+{
+   unsigned eax, edx;
+   asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (x)); 
+   return eax;
+}
+
 int
 main (int argc, const char **argv)
 {
@@ -27,7 +37,7 @@ main (int argc, const char **argv)
   __cpuid_count (7, 0, eax, ebx, ecx, edx);
 
   /* Run MPX test only if host has MPX support.  */
-  if (ebx & bit_MPX)
+  if ((ebx & bit_MPX) && (xgetbv (0) & XSTATE_BNDREGS))
     mpx_test (argc, argv);
   else
     {
diff --git a/gcc/testsuite/gcc.target/i386/pr65105-2.c b/gcc/testsuite/gcc.target/i386/pr65105-2.c
index 92168942d11..607c9abab6a 100644
--- a/gcc/testsuite/gcc.target/i386/pr65105-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr65105-2.c
@@ -1,6 +1,6 @@
 /* PR target/pr65105 */
 /* { dg-do compile { target { ia32 } } } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -msse2" } */
 /* { dg-final { scan-assembler "por" } } */
 
 long long i1, i2, res;
diff --git a/gcc/testsuite/gcc.target/i386/pr71621-1.c b/gcc/testsuite/gcc.target/i386/pr71621-1.c
new file mode 100644
index 00000000000..43df5a8f0ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr71621-1.c
@@ -0,0 +1,31 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -w -ftree-vectorize -mavx2" } */
+
+int cn;
+int *li;
+
+void
+y8 (void)
+{
+  int gv;
+  int *be = &gv;
+  short int v4 = 2;
+
+  while (*li != 0)
+    {
+      int sy;
+      for (sy = 0; sy < 5; ++sy)
+	{
+	  int **t6 = &be;
+	  gv |= sy ? 0 : v4;
+	  if (gv != 0)
+	    ++gv;
+	  t6 = &cn;
+	  if (gv != 0)
+	    *t6 = 0;
+	}
+      for (gv = 0; gv < 24; ++gv)
+	v4 |= 1 <= 1 % 0;
+      ++(*li);
+    }
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr71621-2.c b/gcc/testsuite/gcc.target/i386/pr71621-2.c
new file mode 100644
index 00000000000..175b7d2f931
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr71621-2.c
@@ -0,0 +1,39 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx2" } */
+
+int hf, sv, zz, aj;
+
+void
+dn (int xb, int bl)
+{
+  while (zz < 1)
+    {
+      if (xb == 0)
+	goto mr;
+
+      while (bl < 3)
+	{
+	  int d3;
+	  unsigned char vh;
+	  unsigned char *fj = &vh;
+
+	mr:
+	  while (bl < 1)
+	    {
+	      hf += vh;
+	      ++bl;
+	    }
+	  if (xb == 0)
+	    zz = bl;
+	  if (d3 == 0)
+	    return;
+	  while (sv < 1)
+	    {
+	      --vh;
+	      aj += vh;
+	      ++sv;
+	    }
+	}
+      sv = 0;
+    }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/abs128-1.c b/gcc/testsuite/gcc.target/powerpc/abs128-1.c
index e4b0c291e85..49635df2b90 100644
--- a/gcc/testsuite/gcc.target/powerpc/abs128-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/abs128-1.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { powerpc64*-*-* && vmx_hw } } } */
-/* { dg-options "-mfloat128" } */
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
 
 void abort ();
 
diff --git a/gcc/testsuite/gcc.target/powerpc/copysign128-1.c b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c
index 0d7b7e546fb..429dfc072e3 100644
--- a/gcc/testsuite/gcc.target/powerpc/copysign128-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/copysign128-1.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { powerpc64*-*-* && vmx_hw } } } */
-/* { dg-options "-mfloat128" } */
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
 
 void abort ();
 
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp
new file mode 100644
index 00000000000..081946f7fbf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dfp.exp
@@ -0,0 +1,39 @@
+# Copyright (C) 2014-2016 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# Exit immediately if this isn't a PowerPC target.
+if { ![istarget powerpc*-*-*] && ![istarget rs6000-*-*] } then {
+  return
+}
+
+global DEFAULT_CFLAGS
+if ![info exists DEFAULT_CFLAGS] then {
+  set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+}
+
+# Load support procs.
+load_lib gcc-dg.exp
+load_lib torture-options.exp
+
+# Initialize.
+dg-init
+
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.c*]] "" $DEFAULT_CFLAGS
+
+# All done.
+dg-finish
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c
new file mode 100644
index 00000000000..29859c55986
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-0.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c
new file mode 100644
index 00000000000..d634a2acd04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c
new file mode 100644
index 00000000000..a56f19ba391
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-10.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c
new file mode 100644
index 00000000000..523facea156
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c
new file mode 100644
index 00000000000..e62e4bc7bbe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-12.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c
new file mode 100644
index 00000000000..38bff163c02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-13.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c
new file mode 100644
index 00000000000..57fc81ad742
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-14.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c
new file mode 100644
index 00000000000..990461f9c53
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-15.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c
new file mode 100644
index 00000000000..dcd4a16635f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c
new file mode 100644
index 00000000000..5fbf5b5cc0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-17.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c
new file mode 100644
index 00000000000..675109552b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-18.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c
new file mode 100644
index 00000000000..d24eb10f7a7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-19.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c
new file mode 100644
index 00000000000..d66ba886a92
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-2.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c
new file mode 100644
index 00000000000..e42f0debc82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-20.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c
new file mode 100644
index 00000000000..975843c6a02
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c
new file mode 100644
index 00000000000..d6eced78f6a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-22.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c
new file mode 100644
index 00000000000..eccca7e5d85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-23.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c
new file mode 100644
index 00000000000..54f1cd3d134
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-24.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c
new file mode 100644
index 00000000000..0c6594ecf46
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-25.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c
new file mode 100644
index 00000000000..e30c2f4ac79
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c
new file mode 100644
index 00000000000..aaa0a854370
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-27.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c
new file mode 100644
index 00000000000..efec051639a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-28.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c
new file mode 100644
index 00000000000..2f84bbfd36a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-29.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c
new file mode 100644
index 00000000000..ac0380973f9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-3.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c
new file mode 100644
index 00000000000..cfa8d0d2817
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-30.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c
new file mode 100644
index 00000000000..a95dcb8dbb6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c
new file mode 100644
index 00000000000..512e1574555
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-32.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c
new file mode 100644
index 00000000000..f21399e9d62
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-33.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c
new file mode 100644
index 00000000000..86422831975
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-34.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c
new file mode 100644
index 00000000000..5987b438970
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-35.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c
new file mode 100644
index 00000000000..00be5389310
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_gt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c
new file mode 100644
index 00000000000..dcbde72a7f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-37.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c
new file mode 100644
index 00000000000..c892c100aa8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-38.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_gt_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c
new file mode 100644
index 00000000000..d54138d8c5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-39.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_gt_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c
new file mode 100644
index 00000000000..f00756aa23c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-4.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c
new file mode 100644
index 00000000000..6b2ecf775d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-40.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c
new file mode 100644
index 00000000000..c84387dc38b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c
new file mode 100644
index 00000000000..f193b415007
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-42.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c
new file mode 100644
index 00000000000..0de23f4f225
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-43.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c
new file mode 100644
index 00000000000..41652c99f6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-44.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c
new file mode 100644
index 00000000000..4ef2d555d43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-45.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c
new file mode 100644
index 00000000000..f1d6e2de80f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c
new file mode 100644
index 00000000000..c85b709f228
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-47.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c
new file mode 100644
index 00000000000..94962fcff2f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-48.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c
new file mode 100644
index 00000000000..79190d0dde0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-49.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c
new file mode 100644
index 00000000000..2aadb7e7dc2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-5.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c
new file mode 100644
index 00000000000..3d9869d39f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-50.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c
new file mode 100644
index 00000000000..58f542673de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c
new file mode 100644
index 00000000000..382fdc21060
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-52.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c
new file mode 100644
index 00000000000..067c2071b4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-53.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c
new file mode 100644
index 00000000000..ac2c692b51f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-54.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c
new file mode 100644
index 00000000000..cd732fbc885
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-55.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c
new file mode 100644
index 00000000000..7efb1a3d0f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_eq_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c
new file mode 100644
index 00000000000..74ff7ec0d50
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-57.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c
new file mode 100644
index 00000000000..d6ee4f72a75
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-58.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_eq_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c
new file mode 100644
index 00000000000..acd2a208379
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-59.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_eq_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c
new file mode 100644
index 00000000000..1bddb651b0e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_lt_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c
new file mode 100644
index 00000000000..71eab2609b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-60.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c
new file mode 100644
index 00000000000..247c1448a70
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c
new file mode 100644
index 00000000000..fbe137de7f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-62.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c
new file mode 100644
index 00000000000..18d17f36ee3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-63.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c
new file mode 100644
index 00000000000..6e601160ef7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-64.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c
new file mode 100644
index 00000000000..2ad93313760
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-65.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c
new file mode 100644
index 00000000000..69272acb47a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c
new file mode 100644
index 00000000000..a9ba111b82f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-67.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c
new file mode 100644
index 00000000000..bd8040a175a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-68.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c
new file mode 100644
index 00000000000..078f232cb4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-69.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c
new file mode 100644
index 00000000000..1875741f5c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-7.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c
new file mode 100644
index 00000000000..f84faf8022b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-70.c
@@ -0,0 +1,17 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c
new file mode 100644
index 00000000000..3e512038cf3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_dd requires" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c
new file mode 100644
index 00000000000..044d039b464
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-72.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c
new file mode 100644
index 00000000000..52a5d9a5664
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-73.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p)
+{
+  _Decimal64 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov_dd (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfi" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c
new file mode 100644
index 00000000000..2dd72ee1253
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-74.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal64 *p, unsigned int significance)
+{
+  _Decimal64 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_dd (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c
new file mode 100644
index 00000000000..6bbe73b7511
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-75.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+/* This test should succeed on both 32- and 64-bit configurations.  */
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (5, source);
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c
new file mode 100644
index 00000000000..572897fee55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power8" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (5, source);	/* { dg-error "Builtin function __builtin_dtstsfi_ov_td requires" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c
new file mode 100644
index 00000000000..4b725377e09
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-77.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (65, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c
new file mode 100644
index 00000000000..c302027e3be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-78.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_ov_td (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c
new file mode 100644
index 00000000000..789b3ada11a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-79.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_ov_td (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c
new file mode 100644
index 00000000000..d3aa64efa97
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-8.c
@@ -0,0 +1,20 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p)
+{
+  _Decimal128 source = *p;
+
+  if (__builtin_dfp_dtstsfi_lt (63, source))
+    return 3;
+  else
+    return 5;
+}
+
+/* { dg-final { scan-assembler	   "dtstsfiq" } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c
new file mode 100644
index 00000000000..9180e3e9a01
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-9.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "" { powerpc*-*-aix* } } */
+/* { dg-options "-mcpu=power9" } */
+
+#include <altivec.h>
+
+int doTestBCDSignificance (_Decimal128 *p, unsigned int significance)
+{
+  _Decimal128 source = *p;
+
+  return __builtin_dfp_dtstsfi_lt (significance, source);	/* { dg-error "argument 1 must be a 6-bit unsigned literal" } */
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/inf128-1.c b/gcc/testsuite/gcc.target/powerpc/inf128-1.c
index b8df25ba82e..df797e33220 100644
--- a/gcc/testsuite/gcc.target/powerpc/inf128-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/inf128-1.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { powerpc64*-*-* && vmx_hw } } } */
-/* { dg-options "-mfloat128" } */
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
 
 void abort ();
 
diff --git a/gcc/testsuite/gcc.target/powerpc/nan128-1.c b/gcc/testsuite/gcc.target/powerpc/nan128-1.c
index 6fc00ecade0..e327f40f837 100644
--- a/gcc/testsuite/gcc.target/powerpc/nan128-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/nan128-1.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target { powerpc64*-*-* && vmx_hw } } } */
-/* { dg-options "-mfloat128" } */
+/* { dg-do run { target { powerpc64*-*-* && vsx_hw } } } */
+/* { dg-options "-mfloat128 -mvsx" } */
 
 #include <stdio.h>
 
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c
new file mode 100644
index 00000000000..1aefc8f3bf1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-1.c
@@ -0,0 +1,26 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2" } */
+
+#include <altivec.h>
+
+int extract_int_0 (vector int a) { return vec_extract (a, 0); }
+int extract_int_3 (vector int a) { return vec_extract (a, 3); }
+
+int extract_short_0 (vector short a) { return vec_extract (a, 0); }
+int extract_short_3 (vector short a) { return vec_extract (a, 7); }
+
+int extract_schar_0 (vector signed char a) { return vec_extract (a, 0); }
+int extract_schar_3 (vector signed char a) { return vec_extract (a, 15); }
+
+/* { dg-final { scan-assembler     "vextractub"  } } */
+/* { dg-final { scan-assembler     "vextractuh"  } } */
+/* { dg-final { scan-assembler     "xxextractuw" } } */
+/* { dg-final { scan-assembler     "mfvsrd"      } } */
+/* { dg-final { scan-assembler-not "stxvd2x"     } } */
+/* { dg-final { scan-assembler-not "stxv"        } } */
+/* { dg-final { scan-assembler-not "lwa"         } } */
+/* { dg-final { scan-assembler-not "lwz"         } } */
+/* { dg-final { scan-assembler-not "lha"         } } */
+/* { dg-final { scan-assembler-not "lhz"         } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-extract-2.c b/gcc/testsuite/gcc.target/powerpc/p9-extract-2.c
new file mode 100644
index 00000000000..34f9bdd142e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/p9-extract-2.c
@@ -0,0 +1,27 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2" } */
+
+#include <altivec.h>
+
+void extract_int_0 (int *p, vector int a) { *p = vec_extract (a, 0); }
+void extract_int_3 (int *p, vector int a) { *p = vec_extract (a, 3); }
+
+void extract_short_0 (short *p, vector short a) { *p = vec_extract (a, 0); }
+void extract_short_3 (short *p, vector short a) { *p = vec_extract (a, 7); }
+
+void extract_schar_0 (signed char *p, vector signed char a) { *p = vec_extract (a, 0); }
+void extract_schar_3 (signed char *p, vector signed char a) { *p = vec_extract (a, 15); }
+
+/* { dg-final { scan-assembler     "vextractub"      } } */
+/* { dg-final { scan-assembler     "vextractuh"      } } */
+/* { dg-final { scan-assembler     "xxextractuw"     } } */
+/* { dg-final { scan-assembler     "stxsibx"         } } */
+/* { dg-final { scan-assembler     "stxsihx"         } } */
+/* { dg-final { scan-assembler     "stfiwx\|stxsiwx" } } */
+/* { dg-final { scan-assembler-not "mfvsrd"          } } */
+/* { dg-final { scan-assembler-not "stxvd2x"         } } */
+/* { dg-final { scan-assembler-not "stxv"            } } */
+/* { dg-final { scan-assembler-not "lwa"             } } */
+/* { dg-final { scan-assembler-not "stw"             } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c
index 4947386721a..b8a03d30f9a 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-3.c
@@ -1,6 +1,6 @@
 /* { dg-do compile { target { powerpc64le-*-* } } } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-mcpu=power9 -O3" } */
+/* { dg-options "-mcpu=power9 -O3 -mfloat128" } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-final { scan-assembler "lxvx" } } */
 /* { dg-final { scan-assembler "stxvx" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71297.c b/gcc/testsuite/gcc.target/powerpc/pr71297.c
new file mode 100644
index 00000000000..db1aaf016cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71297.c
@@ -0,0 +1,10 @@
+/* PR target/71763 */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+
+int main ()
+{
+  __builtin_vec_st (); /* { dg-error "too few arguments to function" } */
+
+}
+
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71656-2.c b/gcc/testsuite/gcc.target/powerpc/pr71656-2.c
index f20c7aa02bf..99855fa1667 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr71656-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr71656-2.c
@@ -17,7 +17,7 @@ double h[6];
 void func1 (vec);
 
 void
-func2 (double *)
+func2 (double *b)
 {
   for (; k; k--)
     for (; j <= k;)
@@ -33,7 +33,7 @@ func2 (double *)
 void
 func3 (void)
 {
-  vec_t d;
+  struct vec_t d;
   func1 (d.y);
   func2 (&b);
   for (; a;)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71698.c b/gcc/testsuite/gcc.target/powerpc/pr71698.c
new file mode 100644
index 00000000000..c752f64e1c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71698.c
@@ -0,0 +1,13 @@
+/* Test for a reload ICE arising from trying to direct move a TDmode value.  */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-require-effective-target dfp } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */
+
+extern void testvad128 (int n, ...);
+void
+testitd128 (_Decimal128 g01d128)
+{
+  testvad128 (1, g01d128);
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71720.c b/gcc/testsuite/gcc.target/powerpc/pr71720.c
new file mode 100644
index 00000000000..a0c330db931
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71720.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -O2 -mupper-regs-di" } */
+
+/* Verify that we generate xxspltw <reg>,<reg>,0 for V4SFmode splat.  */
+
+vector float
+splat_v4sf (float f)
+{
+  return (vector float) { f, f, f, f };
+}
+
+/* { dg-final { scan-assembler "xscvdpspn "      } } */
+/* { dg-final { scan-assembler "xxspltw .*,.*,0" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr71763.c b/gcc/testsuite/gcc.target/powerpc/pr71763.c
new file mode 100644
index 00000000000..7910a90b988
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr71763.c
@@ -0,0 +1,27 @@
+// PR target/71763
+// { dg-do compile }
+// { dg-options "-O1 -mvsx" }
+// { dg-xfail-if "PR70098" { lp64 && powerpc64_no_dm } }
+// { dg-prune-output ".*internal compiler error.*" }
+
+int a, b;
+float c;
+
+void fn2(void);
+
+void fn1(void)
+{
+        long d;
+
+        for (d = 3; d; d--) {
+                for (a = 0; a <= 1; a++) {
+                        b &= 1;
+                        if (b) {
+                                for (;;) {
+                                        fn2();
+                                        c = d;
+                                }
+                        }
+                }
+        }
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-1.c b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
new file mode 100644
index 00000000000..bdfeb702663
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
@@ -0,0 +1,16 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O2 -mfloat128" } */
+
+int do_signbit_kf (__float128 a) { return __builtin_signbit (a); }
+int do_signbit_if (__ibm128 a) { return __builtin_signbit (a); }
+int do_signbit_tf (long double a) { return __builtin_signbit (a); }
+
+/* { dg-final { scan-assembler-not   "stxvd2x"  } } */
+/* { dg-final { scan-assembler-not   "stxvw4x"  } } */
+/* { dg-final { scan-assembler-not   "stxsd"    } } */
+/* { dg-final { scan-assembler-not   "stxsdx"   } } */
+/* { dg-final { scan-assembler-times "mfvsrd" 3 } } */
+/* { dg-final { scan-assembler-times "srdi"   3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-2.c b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
new file mode 100644
index 00000000000..b5bd856d909
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2 -mfloat128" } */
+
+int do_signbit_kf (__float128 *a) { return __builtin_signbit (*a); }
+
+/* { dg-final { scan-assembler-not   "stxvd2x"  } } */
+/* { dg-final { scan-assembler-not   "stxvw4x"  } } */
+/* { dg-final { scan-assembler-not   "stxsd"    } } */
+/* { dg-final { scan-assembler-not   "stxsdx"   } } */
+/* { dg-final { scan-assembler-not   "lxvd2x"   } } */
+/* { dg-final { scan-assembler-not   "lxvw4x"   } } */
+/* { dg-final { scan-assembler-not   "lxsd"     } } */
+/* { dg-final { scan-assembler-not   "lxsdx"    } } */
+/* { dg-final { scan-assembler-times "ld"     1 } } */
+/* { dg-final { scan-assembler-times "srdi"   1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-3.c b/gcc/testsuite/gcc.target/powerpc/signbit-3.c
new file mode 100644
index 00000000000..cd64143fc2f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-3.c
@@ -0,0 +1,172 @@
+/* { dg-do run { target { powerpc*-*-linux* } } } */
+/* { dg-require-effective-target ppc_float128_sw } */
+/* { dg-options "-mcpu=power7 -O2 -mfloat128 -lm" } */
+
+#ifdef DEBUG
+#include <stdio.h>
+#endif
+
+#include <stddef.h>
+#include <stdint.h>
+#include <inttypes.h>
+#include <stdlib.h>
+#include <math.h>
+
+#if defined(__BIG_ENDIAN__)
+struct ieee128 {
+  uint64_t upper;
+  uint64_t lower;
+};
+
+#elif defined(__LITTLE_ENDIAN__)
+struct ieee128 {
+  uint64_t lower;
+  uint64_t upper;
+};
+
+#else
+#error "Unknown system"
+#endif
+
+union ieee_union {
+  __float128 f128;
+  struct ieee128 st128;
+};
+
+#ifdef DEBUG
+static int num_errors = 0;
+
+__attribute__((__noinline__))
+static void
+failure (int expected, int got, __float128 x)
+{
+  unsigned sign;
+  unsigned exponent;
+  uint64_t mantissa1;
+  uint64_t mantissa2;
+  uint64_t upper;
+  uint64_t lower;
+
+  union ieee_union u;
+
+  u.f128 = x;
+  upper  = u.st128.upper;
+  lower  = u.st128.lower;
+
+  sign      = (unsigned)((upper >> 63) & 1);
+  exponent  = (unsigned)((upper >> 48) & ((((uint64_t)1) << 16) - 1));
+  mantissa1 = (upper & ((((uint64_t)1) << 48) - 1));
+  mantissa2 = lower;
+
+  printf ("Expected %d, got %d, %c 0x%.4x 0x%.12" PRIx64 " 0x%.16" PRIx64,
+	  expected, got,
+	  sign ? '-' : '+',
+	  exponent,
+	  mantissa1,
+	  mantissa2);
+
+  num_errors++;
+}
+
+#else
+
+#define failure(E, G, F) abort ()
+#endif
+
+__attribute__((__noinline__))
+static void
+test_signbit_arg (__float128 f128, int expected)
+{
+  int sign = __builtin_signbit (f128);
+
+  if ((expected != 0 && sign == 0)
+      || (expected == 0 && sign != 0))
+    failure (f128, expected, sign);
+}
+
+__attribute__((__noinline__))
+static void
+test_signbit_mem (__float128 *ptr, int expected)
+{
+  int sign = __builtin_signbit (*ptr);
+
+  if ((expected != 0 && sign == 0)
+      || (expected == 0 && sign != 0))
+    failure (*ptr, expected, sign);
+}
+
+__attribute__((__noinline__))
+static void
+test_signbit_gpr (__float128 *ptr, int expected)
+{
+  __float128 f128 = *ptr;
+  int sign;
+
+  __asm__ (" # %0" : "+r" (f128));
+
+  sign = __builtin_signbit (f128);
+  if ((expected != 0 && sign == 0)
+      || (expected == 0 && sign != 0))
+    failure (f128, expected, sign);
+}
+
+__attribute__((__noinline__))
+static void
+test_signbit (__float128 f128, int expected)
+{
+#ifdef DEBUG
+  union ieee_union u;
+  u.f128 = f128;
+  printf ("Expecting %d, trying %-5g "
+	  "(0x%.16" PRIx64 " 0x%.16" PRIx64 ")\n",
+	  expected, (double)f128,
+	  u.st128.upper, u.st128.lower);
+#endif
+
+  test_signbit_arg (f128,  expected);
+  test_signbit_mem (&f128, expected);
+  test_signbit_gpr (&f128, expected);
+}
+
+int
+main (void)
+{
+  union ieee_union u;
+
+  test_signbit (+0.0q, 0);
+  test_signbit (+1.0q, 0);
+
+  test_signbit (-0.0q, 1);
+  test_signbit (-1.0q, 1);
+
+  test_signbit (__builtin_copysign (__builtin_infq (), +1.0q), 0);
+  test_signbit (__builtin_copysign (__builtin_infq (), -1.0q), 1);
+
+  test_signbit (__builtin_copysign (__builtin_nanq (""), +1.0q), 0);
+  test_signbit (__builtin_copysign (__builtin_nanq (""), -1.0q), 1);
+
+  /* force the bottom double word to have specific bits in the 'sign' bit to
+     make sure we are picking the right word.  */
+  u.f128 = 1.0q;
+  u.st128.lower = 0ULL;
+  test_signbit (u.f128, 0);
+
+  u.st128.lower = ~0ULL;
+  test_signbit (u.f128, 0);
+
+  u.f128 = -1.0q;
+  u.st128.lower = 0ULL;
+  test_signbit (u.f128, 1);
+
+  u.st128.lower = ~0ULL;
+  test_signbit (u.f128, 1);
+
+#ifdef DEBUG
+  printf ("%d error(s) were found\n", num_errors);
+  if (num_errors)
+    return num_errors;
+#endif
+
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/s390/loc-1.c b/gcc/testsuite/gcc.target/s390/loc-1.c
new file mode 100644
index 00000000000..26dbd9cecb3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/loc-1.c
@@ -0,0 +1,22 @@
+/* Test load on condition patterns.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=z13 -mzarch" } */
+
+unsigned long loc_r (unsigned long rc, unsigned long cond, unsigned long val)
+{
+  if (cond)
+    rc = val;
+  return rc;
+}
+/* { dg-final { scan-assembler "\tlocgrne\t%r2,%r4" { target { lp64 } } } } */
+/* { dg-final { scan-assembler "\tlocrne\t%r2,%r4" { target { ! lp64 } } } } */
+
+long loc_hi (long rc, long cond)
+{
+  if (cond)
+    rc = (long)-1;
+  return rc;
+}
+/* { dg-final { scan-assembler "\tlocghine\t%r2,-1" { target { lp64 } } } } */
+/* { dg-final { scan-assembler "\tlochine\t%r2,-1" { target { ! lp64 } } } } */
diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c
index b79120f20f0..5f63eda4bea 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c
@@ -8,8 +8,8 @@
 /* { dg-final { scan-assembler-times "wfchedbs\t%v\[0-9\]*,%v2,%v0" 1 } } */
 /* { dg-final { scan-assembler-times "wfchdbs\t%v\[0-9\]*,%v2,%v0" 1 } } */
 /* { dg-final { scan-assembler-times "wfchedbs\t%v\[0-9\]*,%v2,%v0" 1 } } */
-/* { dg-final { scan-assembler-times "locrne" 5 } } */
-/* { dg-final { scan-assembler-times "locrno" 1 } } */
+/* { dg-final { scan-assembler-times "lochine" 5 } } */
+/* { dg-final { scan-assembler-times "lochino" 1 } } */
 
 
 int
diff --git a/gcc/testsuite/gfortran.dg/coarray_lib_comm_1.f90 b/gcc/testsuite/gfortran.dg/coarray_lib_comm_1.f90
index d23c9d18a7a..7b4d9375de5 100644
--- a/gcc/testsuite/gfortran.dg/coarray_lib_comm_1.f90
+++ b/gcc/testsuite/gfortran.dg/coarray_lib_comm_1.f90
@@ -38,9 +38,8 @@ B(1:5) = B(3:7)
 if (any (A-B /= 0)) call abort
 end
 
-! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, &parm.\[0-9\]+, 4, 4, 0\\\);" 1 "original" } }
-! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, &parm.\[0-9\]+, 4, 4, 1\\\);" 1 "original" } }
-! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, &p, 4, 4, 1\\\);" 1 "original" } }
-! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.1, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) b, 1, &parm.\[0-9\]+, 0B, &p, 4, 4, 0\\\);" 1 "original" } }
+! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, &parm.\[0-9\]+, 4, 4, 0, 0B\\\);" 1 "original" } }
+! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, &parm.\[0-9\]+, 4, 4, 1, 0B\\\);" 1 "original" } }
+! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, &p, 4, 4, 1, 0B\\\);" 1 "original" } }
+! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.1, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) b, 1, &parm.\[0-9\]+, 0B, &p, 4, 4, 0, 0B\\\);" 1 "original" } }
 ! { dg-final { scan-tree-dump-times "_gfortran_caf_sendget \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, 4, 4, 0\\\);" 1 "original" } }
-
diff --git a/gcc/testsuite/gfortran.dg/coarray_stat_function.f90 b/gcc/testsuite/gfortran.dg/coarray_stat_function.f90
new file mode 100644
index 00000000000..c29687efbe2
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/coarray_stat_function.f90
@@ -0,0 +1,45 @@
+! { dg-do compile }
+! { dg-options "-fdump-tree-original -fcoarray=lib" }
+!
+program function_stat
+  implicit none
+
+  integer :: me[*],tmp,stat,stat2,next
+
+  me = this_image()
+  next = me + 1
+  if(me == num_images()) next = 1
+  stat = 0
+
+  sync all(stat=stat)
+
+  if(stat /= 0) write(*,*) 'Image failed during sync'
+
+  stat = 0
+  if(me == 1) then
+     tmp = func(me[4,stat=stat])
+     if(stat /= 0) write(*,*) me,'failure in func arg'
+   else if(me == 2) then
+      tmp = func2(me[1,stat=stat2],me[3,stat=stat])
+      if(stat2 /= 0 .or. stat /= 0) write(*,*) me,'failure in func2 args'
+  endif
+
+contains
+
+  function func(remote_me)
+    integer func
+    integer remote_me
+    func = remote_me
+  end function func
+
+  function func2(remote_me,remote_neighbor)
+    integer func2
+    integer remote_me,remote_neighbor
+    func2 = remote_me + remote_neighbor
+  end function func2
+  
+end program function_stat
+
+! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) desc.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) me, 4, &desc.\[0-9\]+, 0B, &desc.\[0-9\]+, 4, 4, 0, &stat\\\);" 1 "original" } }
+! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) desc.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) me, 1, &desc.\[0-9\]+, 0B, &desc.\[0-9\]+, 4, 4, 0, &stat2\\\);" 1 "original" } }
+! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) desc.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) me, 3, &desc.\[0-9\]+, 0B, &desc.\[0-9\]+, 4, 4, 0, &stat\\\);" 1 "original" } }
diff --git a/gcc/testsuite/gfortran.dg/coarray_stat_whitespace.f90 b/gcc/testsuite/gfortran.dg/coarray_stat_whitespace.f90
new file mode 100644
index 00000000000..aa790b996ef
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/coarray_stat_whitespace.f90
@@ -0,0 +1,29 @@
+! { dg-do compile }
+! { dg-options "-fcoarray=lib" }
+!
+! Support for stat= in caf reference
+!
+program whitespace
+  implicit none
+
+  integer :: me[*],tmp,stat,i
+
+  me = this_image()
+  stat = 0
+  i = 1
+
+  sync all(stat = stat)
+
+  if(stat /= 0) write(*,*) 'failure during sync'
+
+  stat = 0
+
+  if(me == 1) then
+     tmp = me[num_images(),stat = stat]
+     if(stat /= 0) write(*,*) 'failure in img:',me
+  else if(me == 2) then
+     tmp = me[i,stat=stat]
+     if(stat /= 0) write(*,*) 'failure in img:',me
+  endif
+
+end program whitespace
diff --git a/gcc/testsuite/gfortran.dg/deferred_character_17.f90 b/gcc/testsuite/gfortran.dg/deferred_character_17.f90
new file mode 100644
index 00000000000..5a9d725d263
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/deferred_character_17.f90
@@ -0,0 +1,13 @@
+!{ dg-do run }
+
+! Check fix for PR fortran/71623
+
+program allocatemvce
+  implicit none
+  character(len=:), allocatable :: string
+  integer, dimension(4), target :: array = [1,2,3,4]
+  integer, dimension(:), pointer :: array_ptr
+  array_ptr => array
+  ! The allocate used to segfault
+  allocate(character(len=size(array_ptr))::string)
+end program allocatemvce
diff --git a/gcc/testsuite/gfortran.dg/dependency_46.f90 b/gcc/testsuite/gfortran.dg/dependency_46.f90
new file mode 100644
index 00000000000..28942a80769
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/dependency_46.f90
@@ -0,0 +1,11 @@
+! { dg-do compile }
+! PR 71783 - this used to ICE due to a missing charlen for the temporary.
+! Test case by Toon Moene.
+
+SUBROUTINE prtdata(ilen)
+  INTEGER :: ilen
+  character(len=ilen), allocatable :: cline(:)
+  allocate(cline(2))
+  cline(1) = 'a'
+  cline(2) = cline(1)
+END SUBROUTINE prtdata
diff --git a/gcc/testsuite/gfortran.dg/do_1.f90 b/gcc/testsuite/gfortran.dg/do_1.f90
index b041279f6d9..b1db8c6fe27 100644
--- a/gcc/testsuite/gfortran.dg/do_1.f90
+++ b/gcc/testsuite/gfortran.dg/do_1.f90
@@ -5,12 +5,6 @@ program do_1
   implicit none
   integer i, j
 
-  ! limit=HUGE(i), step 1
-  j = 0
-  do i = HUGE(i) - 10, HUGE(i), 1
-    j = j + 1
-  end do
-  if (j .ne. 11) call abort
   ! limit=HUGE(i), step > 1
   j = 0
   do i = HUGE(i) - 10, HUGE(i), 2
diff --git a/gcc/testsuite/gfortran.dg/do_3.F90 b/gcc/testsuite/gfortran.dg/do_3.F90
index eb4751d6b06..0f2c315f874 100644
--- a/gcc/testsuite/gfortran.dg/do_3.F90
+++ b/gcc/testsuite/gfortran.dg/do_3.F90
@@ -48,11 +48,9 @@ program test
   TEST_LOOP(i, 17, 0, -4, 5, test_i, -3)
   TEST_LOOP(i, 17, 0, -5, 4, test_i, -3)
 
-  TEST_LOOP(i1, -huge(i1)-1_1, huge(i1), 1_1, int(huge(i1))*2+2, test_i1, huge(i1)+1_1)
   TEST_LOOP(i1, -huge(i1)-1_1, huge(i1), 2_1, int(huge(i1))+1, test_i1, huge(i1)+1_1)
   TEST_LOOP(i1, -huge(i1)-1_1, huge(i1), huge(i1), 3, test_i1, 2_1*huge(i1)-1_1)
 
-  TEST_LOOP(i1, huge(i1), -huge(i1)-1_1, -1_1, int(huge(i1))*2+2, test_i1, -huge(i1)-2_1)
   TEST_LOOP(i1, huge(i1), -huge(i1)-1_1, -2_1, int(huge(i1))+1, test_i1, -huge(i1)-2_1)
   TEST_LOOP(i1, huge(i1), -huge(i1)-1_1, -huge(i1), 3, test_i1, -2_1*huge(i1))
   TEST_LOOP(i1, huge(i1), -huge(i1)-1_1, -huge(i1)-1_1, 2, test_i1, -huge(i1)-2_1)
diff --git a/gcc/testsuite/gfortran.dg/do_check_11.f90 b/gcc/testsuite/gfortran.dg/do_check_11.f90
new file mode 100644
index 00000000000..87850cf40eb
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/do_check_11.f90
@@ -0,0 +1,12 @@
+! { dg-do run }
+! { dg-options "-fcheck=do" }
+! { dg-shouldfail "DO check" }
+!
+program test
+  implicit none
+  integer(1) :: i
+  do i = HUGE(i)-10, HUGE(i)
+    print *, i
+  end do
+end program test
+! { dg-output "Fortran runtime error: Loop iterates infinitely" }
diff --git a/gcc/testsuite/gfortran.dg/do_check_12.f90 b/gcc/testsuite/gfortran.dg/do_check_12.f90
new file mode 100644
index 00000000000..71edace0fd8
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/do_check_12.f90
@@ -0,0 +1,12 @@
+! { dg-do run }
+! { dg-options "-fcheck=do" }
+! { dg-shouldfail "DO check" }
+!
+program test
+  implicit none
+  integer(1) :: i
+  do i = -HUGE(i)+10, -HUGE(i)-1, -1
+    print *, i
+  end do
+end program test
+! { dg-output "Fortran runtime error: Loop iterates infinitely" }
diff --git a/gcc/testsuite/gfortran.dg/do_corner_warn.f90 b/gcc/testsuite/gfortran.dg/do_corner_warn.f90
new file mode 100644
index 00000000000..07484d3ca7b
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/do_corner_warn.f90
@@ -0,0 +1,22 @@
+! { dg-options "-Wundefined-do-loop" }
+! Program to check corner cases for DO statements.
+
+program do_1
+  implicit none
+  integer i, j
+
+  ! limit=HUGE(i), step 1
+  j = 0
+  do i = HUGE(i) - 10, HUGE(i), 1 ! { dg-warning "is undefined as it overflows" }
+    j = j + 1
+  end do
+  if (j .ne. 11) call abort
+
+  ! limit=-HUGE(i)-1, step -1
+  j = 0
+  do i = -HUGE(i) + 10 - 1, -HUGE(i) - 1, -1 ! { dg-warning "is undefined as it underflows" }
+    j = j + 1
+  end do
+  if (j .ne. 11) call abort
+
+end program
diff --git a/gcc/testsuite/gfortran.dg/goacc/asyncwait-2.f95 b/gcc/testsuite/gfortran.dg/goacc/asyncwait-2.f95
index db0ce1f912a..fe4e4eeed2c 100644
--- a/gcc/testsuite/gfortran.dg/goacc/asyncwait-2.f95
+++ b/gcc/testsuite/gfortran.dg/goacc/asyncwait-2.f95
@@ -83,6 +83,18 @@ program asyncwait
   end do
   !$acc end parallel ! { dg-error "Unexpected \\\!\\\$ACC END PARALLEL" }
 
+  !$acc parallel copyin (a(1:N)) copy (b(1:N)) waitasync ! { dg-error "Unclassifiable OpenACC directive" }
+  do i = 1, N
+     b(i) = a(i)
+  end do
+  !$acc end parallel ! { dg-error "Unexpected \\\!\\\$ACC END PARALLEL" }
+
+  !$acc parallel copyin (a(1:N)) copy (b(1:N)) asyncwait ! { dg-error "Unclassifiable OpenACC directive" }
+  do i = 1, N
+     b(i) = a(i)
+  end do
+  !$acc end parallel ! { dg-error "Unexpected \\\!\\\$ACC END PARALLEL" }
+
   !$acc parallel copyin (a(1:N)) copy (b(1:N)) wait
   do i = 1, N
      b(i) = a(i)
diff --git a/gcc/testsuite/gfortran.dg/goacc/asyncwait-3.f95 b/gcc/testsuite/gfortran.dg/goacc/asyncwait-3.f95
index 32c11def6f7..ed72a9ba28a 100644
--- a/gcc/testsuite/gfortran.dg/goacc/asyncwait-3.f95
+++ b/gcc/testsuite/gfortran.dg/goacc/asyncwait-3.f95
@@ -11,17 +11,17 @@ program asyncwait
   a(:) = 3.0
   b(:) = 0.0
 
-  !$acc wait (1 2) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait (1 2) ! { dg-error "Syntax error in OpenACC expression list at" }
 
-  !$acc wait (1,) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait (1,) ! { dg-error "Syntax error in OpenACC expression list at" }
 
-  !$acc wait (,1) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait (,1) ! { dg-error "Syntax error in OpenACC expression list at" }
 
-  !$acc wait (1, 2, ) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait (1, 2, ) ! { dg-error "Syntax error in OpenACC expression list at" }
 
-  !$acc wait (1, 2, ,) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait (1, 2, ,) ! { dg-error "Syntax error in OpenACC expression list at" }
 
-  !$acc wait (1 ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait (1 ! { dg-error "Syntax error in OpenACC expression list at" }
 
   !$acc wait (1, *) ! { dg-error "Invalid argument to \\\$\\\!ACC WAIT" }
 
@@ -33,9 +33,9 @@ program asyncwait
 
   !$acc wait (1.0) ! { dg-error "WAIT clause at \\\(1\\\) requires a scalar INTEGER expression" }
 
-  !$acc wait 1 ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait 1 ! { dg-error "Unclassifiable OpenACC directive" }
 
-  !$acc wait N ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait N ! { dg-error "Unclassifiable OpenACC directive" }
 
   !$acc wait (1)
 end program asyncwait
diff --git a/gcc/testsuite/gfortran.dg/goacc/asyncwait-4.f95 b/gcc/testsuite/gfortran.dg/goacc/asyncwait-4.f95
index cd64ef3d387..df311545c52 100644
--- a/gcc/testsuite/gfortran.dg/goacc/asyncwait-4.f95
+++ b/gcc/testsuite/gfortran.dg/goacc/asyncwait-4.f95
@@ -11,21 +11,21 @@ program asyncwait
   a(:) = 3.0
   b(:) = 0.0
 
-  !$acc wait async (1 2) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (1 2) ! { dg-error "Unclassifiable OpenACC directive" }
 
-  !$acc wait async (1,) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (1,) ! { dg-error "Unclassifiable OpenACC directive" }
 
-  !$acc wait async (,1) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (,1) ! { dg-error "Invalid character in name" }
 
-  !$acc wait async (1, 2, ) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (1, 2, ) ! { dg-error "Unclassifiable OpenACC directive" }
 
-  !$acc wait async (1, 2, ,) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (1, 2, ,) ! { dg-error "Unclassifiable OpenACC directive" }
 
-  !$acc wait async (1 ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (1 ! { dg-error "Unclassifiable OpenACC directive" }
 
-  !$acc wait async (1, *) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (1, *) ! { dg-error "Unclassifiable OpenACC directive" }
 
-  !$acc wait async (1, a) ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async (1, a) ! { dg-error "Unclassifiable OpenACC directive" }
 
   !$acc wait async (a) ! { dg-error "ASYNC clause at \\\(1\\\) requires a scalar INTEGER expression" }
 
@@ -33,5 +33,9 @@ program asyncwait
 
   !$acc wait async (1.0) ! { dg-error "ASYNC clause at \\\(1\\\) requires a scalar INTEGER expression" }
 
-  !$acc wait async 1 ! { dg-error "Unexpected junk in \\\!\\\$ACC WAIT at" }
+  !$acc wait async 1 ! { dg-error "Unclassifiable OpenACC directive" }
+
+  !$acc waitasync ! { dg-error "Unclassifiable OpenACC directive" }
+
+  !$acc wait,async ! { dg-error "Unclassifiable OpenACC directive" }
 end program asyncwait
diff --git a/gcc/testsuite/gfortran.dg/goacc/pr71704.f90 b/gcc/testsuite/gfortran.dg/goacc/pr71704.f90
new file mode 100644
index 00000000000..0235e85d42a
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/goacc/pr71704.f90
@@ -0,0 +1,60 @@
+! PR fortran/71704
+! { dg-do compile }
+
+real function f1 ()
+!$acc routine (f1)
+  f1 = 1
+end
+
+real function f2 (a)
+  integer a
+  !$acc enter data copyin(a)
+  f2 = 1
+end
+
+real function f3 (a)
+  integer a
+!$acc enter data copyin(a)
+  f3 = 1
+end
+
+real function f4 ()
+!$acc wait
+  f4 = 1
+end
+
+real function f5 (a)
+  integer a
+!$acc update device(a)
+  f5 = 1
+end
+
+real function f6 ()
+!$acc parallel
+!$acc end parallel
+  f6 = 1
+end
+
+real function f7 ()
+!$acc kernels
+!$acc end kernels
+  f7 = 1
+end
+
+real function f8 ()
+!$acc data
+!$acc end data
+  f8 = 1
+end
+
+real function f9 ()
+!$acc host_data
+!$acc end host_data
+  f8 = 1
+end
+
+real function f10 (a)
+  integer a
+!$acc declare present (a)
+  f8 = 1
+end
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr71687.f90 b/gcc/testsuite/gfortran.dg/gomp/pr71687.f90
new file mode 100644
index 00000000000..3971263752e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr71687.f90
@@ -0,0 +1,11 @@
+! PR fortran/71687
+! { dg-do compile }
+! { dg-additional-options "-fstack-arrays -O2" }
+
+subroutine s (n, x)
+   integer :: n
+   real :: x(n)
+!$omp parallel
+   x(1:n) = x(n:1:-1)
+!$omp end parallel
+end
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr71704.f90 b/gcc/testsuite/gfortran.dg/gomp/pr71704.f90
new file mode 100644
index 00000000000..5c1c003ca57
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr71704.f90
@@ -0,0 +1,58 @@
+! PR fortran/71704
+! { dg-do compile }
+
+real function f0 ()
+!$omp declare simd (f0)
+  f0 = 1
+end
+
+real function f1 ()
+!$omp declare target (f1)
+  f1 = 1
+end
+
+real function f2 ()
+!$omp declare reduction (foo : integer : omp_out = omp_out + omp_in) &
+!$omp & initializer (omp_priv = 0)
+  f2 = 1
+end
+
+real function f3 ()
+  real, save :: t
+!$omp threadprivate (t)
+  f3 = 1
+end
+
+real function f4 ()
+!$omp taskwait
+  f4 = 1
+end
+
+real function f5 ()
+!$omp barrier
+  f5 = 1
+end
+
+real function f6 ()
+!$omp parallel
+!$omp end parallel
+  f6 = 1
+end
+
+real function f7 ()
+!$omp single
+!$omp end single
+  f7 = 1
+end
+
+real function f8 ()
+!$omp critical
+!$omp end critical
+  f8 = 1
+end
+
+real function f9 ()
+!$omp critical
+!$omp end critical
+  f9 = 1
+end
diff --git a/gcc/testsuite/gfortran.dg/gomp/pr71705.f90 b/gcc/testsuite/gfortran.dg/gomp/pr71705.f90
new file mode 100644
index 00000000000..4813aacfdc3
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/gomp/pr71705.f90
@@ -0,0 +1,7 @@
+! PR fortran/71705
+! { dg-do compile }
+
+  real :: x
+  x = 0.0
+  !$omp target update to(x)
+end
diff --git a/gcc/testsuite/gfortran.dg/ldist-1.f90 b/gcc/testsuite/gfortran.dg/ldist-1.f90
index ea3990d12b4..203032859b5 100644
--- a/gcc/testsuite/gfortran.dg/ldist-1.f90
+++ b/gcc/testsuite/gfortran.dg/ldist-1.f90
@@ -32,4 +32,4 @@ end Subroutine PADEC
 ! There are 5 legal partitions in this code.  Based on the data
 ! locality heuristic, this loop should not be split.
 
-! { dg-final { scan-tree-dump-not "distributed: split to" "ldist" } }
+! { dg-final { scan-tree-dump "distributed: split to" "ldist" } }
diff --git a/gcc/testsuite/gfortran.dg/pr35849.f90 b/gcc/testsuite/gfortran.dg/pr35849.f90
new file mode 100644
index 00000000000..39ba48cb3e5
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr35849.f90
@@ -0,0 +1,9 @@
+! { dg-do compile }
+! PR35849
+INTEGER, PARAMETER                 :: j = 15
+INTEGER, PARAMETER, DIMENSION(10)  :: A = [(i, i = 1,10)]
+INTEGER, PARAMETER, DIMENSION(10)  :: B = ISHFTC(j, A, -20) ! { dg-error "must be positive" }
+INTEGER, PARAMETER, DIMENSION(10)  :: C = ISHFTC(1_1, A, j) ! { dg-error "less than or equal to BIT_SIZE" }
+INTEGER, PARAMETER, DIMENSION(10)  :: D = ISHFTC(3, A, 5) ! { dg-error "Absolute value of SHIFT shall be less than or equal" }
+INTEGER, PARAMETER, DIMENSION(10)  :: E = ISHFTC(3_1, A) ! { dg-error "second argument of ISHFTC exceeds BIT_SIZE of first argument" }
+end
diff --git a/gcc/testsuite/gfortran.dg/pr48636.f90 b/gcc/testsuite/gfortran.dg/pr48636.f90
index 94826fa4790..926d8f3fc5a 100644
--- a/gcc/testsuite/gfortran.dg/pr48636.f90
+++ b/gcc/testsuite/gfortran.dg/pr48636.f90
@@ -34,5 +34,5 @@ program main
 end program main
 
 ! { dg-final { scan-ipa-dump "bar\[^\\n\]*inline copy in MAIN" "inline" } }
-! { dg-final { scan-ipa-dump-times "phi predicate:" 5 "inline" } }
+! { dg-final { scan-ipa-dump-times "phi predicate:" 3 "inline" } }
 ! { dg-final { scan-ipa-dump "inline hints: loop_iterations" "inline" } }
diff --git a/gcc/testsuite/gfortran.dg/pr66575.f90 b/gcc/testsuite/gfortran.dg/pr66575.f90
new file mode 100644
index 00000000000..7a0a604ed4e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr66575.f90
@@ -0,0 +1,6 @@
+! { dg-do compile }
+! Bug 66575 - Endless compilation on missing end interface 
+program p
+   procedure(g) :: g ! { dg-error "may not be used as its own interface" }
+   procedure(g) ! { dg-error "Syntax error in PROCEDURE statement" }
+end
diff --git a/gcc/testsuite/gfortran.dg/pr71764.f90 b/gcc/testsuite/gfortran.dg/pr71764.f90
new file mode 100644
index 00000000000..48176f8297e
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr71764.f90
@@ -0,0 +1,34 @@
+! { dg-do run }
+! PR71764 
+program p
+   use iso_c_binding, only: c_ptr, c_null_ptr, c_ptr, c_associated, c_loc
+   logical, target :: rls
+   real, target :: t = 3.14
+   type(c_ptr) :: nullptr,c
+   real, pointer :: k
+   nullptr = c_null_ptr
+   c = nullptr
+   rls = c_associated(c)
+   if (rls) call abort
+   if (c_associated(c)) call abort
+   c = c_loc(rls)
+   if (.not. c_associated(c)) call abort
+   c = nullptr
+   if (c_associated(c)) call abort
+   c = c_loc(t)
+   k => t
+   call association_test(k, c)
+contains
+  subroutine association_test(a,b)
+    use iso_c_binding, only: c_associated, c_loc, c_ptr
+    implicit none
+    real, pointer :: a
+    type(c_ptr) :: b
+    if(c_associated(b, c_loc(a))) then
+       return
+    else
+       call abort
+    end if
+  end subroutine association_test
+end
+
diff --git a/gcc/testsuite/gfortran.dg/predict-1.f90 b/gcc/testsuite/gfortran.dg/predict-1.f90
index 81f0436fba4..a3feea9b123 100644
--- a/gcc/testsuite/gfortran.dg/predict-1.f90
+++ b/gcc/testsuite/gfortran.dg/predict-1.f90
@@ -4,9 +4,14 @@
 subroutine test(block, array)
 integer :: i, block(9), array(2)
 
-do i = array(1), array(2)
+do i = array(1), array(2), 2
     block(i) = i
 end do
+
+do i = array(1), array(2), -2
+    block(i) = block(i) + i
+end do
+
 end subroutine test
 
-! { dg-final { scan-tree-dump-times "Fortran loop preheader heuristics of edge\[^:\]*: 99.0%" 1 "profile_estimate" } }
+! { dg-final { scan-tree-dump-times "Fortran loop preheader heuristics of edge\[^:\]*: 1.0%" 2 "profile_estimate" } }
diff --git a/gcc/testsuite/gfortran.dg/predict-2.f90 b/gcc/testsuite/gfortran.dg/predict-2.f90
index 4ae5c3a298e..11a9ec5fd4b 100644
--- a/gcc/testsuite/gfortran.dg/predict-2.f90
+++ b/gcc/testsuite/gfortran.dg/predict-2.f90
@@ -4,12 +4,12 @@
 subroutine test(block, array)
 integer :: i,j, block(9), array(2)
 
-do i = array(1), array(2)
-    do j = array(1), array(2)
+do i = array(1), array(2), 2
+    do j = array(1), array(2), 3
        block(i) = j
     end do
 end do
 end subroutine test
 
 ! { dg-final { scan-tree-dump-times "Fortran loop preheader heuristics of edge" 2 "profile_estimate" } }
-! { dg-final { scan-tree-dump-times "loop gueard" 0 "profile_estimate" } }
+! { dg-final { scan-tree-dump-times "loop guard" 0 "profile_estimate" } }
diff --git a/gcc/testsuite/gfortran.dg/unexpected_eof_2.f90 b/gcc/testsuite/gfortran.dg/unexpected_eof_2.f90
new file mode 100644
index 00000000000..1ced9bd0e64
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/unexpected_eof_2.f90
@@ -0,0 +1,7 @@
+! { dg-do compile }
+! PR71686
+program p
+   character(8) :: z
+   z = 'abc&  ! { dg-error "Unterminated character constant" }
+!end
+! { dg-error "Unexpected end of file" "" { target *-*-* } 0 }
diff --git a/gcc/testsuite/gfortran.dg/unexpected_eof_3.f90 b/gcc/testsuite/gfortran.dg/unexpected_eof_3.f90
new file mode 100644
index 00000000000..d3f4d5d8a89
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/unexpected_eof_3.f90
@@ -0,0 +1,6 @@
+! { dg-do compile }
+! PR71686
+program p
+   character(8) :: z = 'abc& ! { dg-error "Unterminated character constant" }
+!end
+! { dg-error "Unexpected end of file" "" { target *-*-* } 0 }
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index de6c072fb0a..b26f8a29c8d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2370,6 +2370,40 @@ proc check_effective_target_has_q_floating_suffix { } {
 	float dummy = 1.0q;
     } "$opts"]
 }
+
+# Return 1 if the target supports __float128,
+# 0 otherwise.
+
+proc check_effective_target___float128 { } {
+    if { [istarget powerpc*-*-*] } {
+	return [check_ppc_float128_sw_available]
+    }
+    if { [istarget ia64-*-*]
+	 || [istarget i?86-*-*]
+	 || [istarget x86_64-*-*] } {
+	return 1
+    }
+    return 0
+}
+
+proc add_options_for___float128 { flags } {
+    if { [istarget powerpc*-*-*] } {
+	return "$flags -mfloat128 -mvsx"
+    }
+    return "$flags"
+}
+
+# Return 1 if the target supports any special run-time requirements
+# for __float128 or _Float128,
+# 0 otherwise.
+
+proc check_effective_target_base_quadfloat_support { } {
+    if { [istarget powerpc*-*-*] } {
+	return [check_vsx_hw_available]
+    }
+    return 1
+}
+
 # Return 1 if the target supports compiling fixed-point,
 # 0 otherwise.
 
@@ -3184,9 +3218,9 @@ proc check_effective_target_arm_neonv2_ok { } {
 		check_effective_target_arm_neonv2_ok_nocache]
 }
 
-# Add the options needed for NEON.  We need either -mfloat-abi=softfp
-# or -mfloat-abi=hard, but if one is already specified by the
-# multilib, use it.
+# Add the options needed for VFP FP16 support.  We need either
+# -mfloat-abi=softfp or -mfloat-abi=hard.  If one is already specified by
+# the multilib, use it.
 
 proc add_options_for_arm_fp16 { flags } {
     if { ! [check_effective_target_arm_fp16_ok] } {
@@ -3196,9 +3230,32 @@ proc add_options_for_arm_fp16 { flags } {
     return "$flags $et_arm_fp16_flags"
 }
 
+# Add the options needed to enable support for IEEE format
+# half-precision support.  This is valid for ARM targets.
+
+proc add_options_for_arm_fp16_ieee { flags } {
+    if { ! [check_effective_target_arm_fp16_ok] } {
+	return "$flags"
+    }
+    global et_arm_fp16_flags
+    return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
+}
+
+# Add the options needed to enable support for ARM Alternative format
+# half-precision support.  This is valid for ARM targets.
+
+proc add_options_for_arm_fp16_alternative { flags } {
+    if { ! [check_effective_target_arm_fp16_ok] } {
+	return "$flags"
+    }
+    global et_arm_fp16_flags
+    return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
+}
+
 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
 # Skip multilibs that are incompatible with these options and set
-# et_arm_fp16_flags to the best options to add.
+# et_arm_fp16_flags to the best options to add.  This test is valid for
+# ARM only.
 
 proc check_effective_target_arm_fp16_ok_nocache { } {
     global et_arm_fp16_flags
@@ -3206,7 +3263,10 @@ proc check_effective_target_arm_fp16_ok_nocache { } {
     if { ! [check_effective_target_arm32] } {
 	return 0;
     }
-    if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
+    if [check-flags \
+	    [list "" { *-*-* } { "-mfpu=*" } \
+		 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
+		       "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
 	# Multilib flags would override -mfpu.
 	return 0
     }
@@ -3242,6 +3302,28 @@ proc check_effective_target_arm_fp16_ok { } {
 		check_effective_target_arm_fp16_ok_nocache]
 }
 
+# Return 1 if the target supports executing VFP FP16 instructions, 0
+# otherwise.  This test is valid for ARM only.
+
+proc check_effective_target_arm_fp16_hw { } {
+    if {! [check_effective_target_arm_fp16_ok] } {
+	return 0
+    }
+    global et_arm_fp16_flags
+    check_runtime_nocache arm_fp16_hw {
+	int
+	main (int argc, char **argv)
+	{
+	  __fp16 a = 1.0;
+	  float r;
+	  asm ("vcvtb.f32.f16 %0, %1"
+	       : "=w" (r) : "w" (a)
+	       : /* No clobbers.  */);
+	  return (r == 1.0) ? 0 : 1;
+	}
+    } "$et_arm_fp16_flags -mfp16-format=ieee"
+}
+
 # Creates a series of routines that return 1 if the given architecture
 # can be selected and a routine to give the flags to select that architecture
 # Note: Extra flags may be added to disable options from newer compilers
@@ -3266,7 +3348,9 @@ foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
 				     v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
 				     v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
 				     v8a "-march=armv8-a" __ARM_ARCH_8A__
-				     v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
+				     v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
+				     v8m_base "-march=armv8-m.base -mthumb" __ARM_ARCH_8M_BASE__
+				     v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
     eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
 	proc check_effective_target_arm_arch_FUNC_ok { } {
 	    if { [ string match "*-marm*" "FLAG" ] &&
@@ -3394,10 +3478,8 @@ proc check_effective_target_arm_cortex_m { } {
 	return 0
     }
     return [check_no_compiler_messages arm_cortex_m assembly {
-	#if !defined(__ARM_ARCH_7M__) \
-            && !defined (__ARM_ARCH_7EM__) \
-            && !defined (__ARM_ARCH_6M__)
-	#error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
+	#if defined(__ARM_ARCH_ISA_ARM)
+	#error __ARM_ARCH_ISA_ARM is defined
 	#endif
 	int i;
     } "-mthumb"]
diff --git a/gcc/tree-loop-distribution.c b/gcc/tree-loop-distribution.c
index e4163b274ff..9bca56a9b6f 100644
--- a/gcc/tree-loop-distribution.c
+++ b/gcc/tree-loop-distribution.c
@@ -1504,6 +1504,7 @@ distribute_loop (struct loop *loop, vec<gimple *> stmts,
      memory accesses.  */
   for (i = 0; partitions.iterate (i, &into); ++i)
     {
+      bool changed = false;
       if (partition_builtin_p (into))
 	continue;
       for (int j = i + 1;
@@ -1524,8 +1525,15 @@ distribute_loop (struct loop *loop, vec<gimple *> stmts,
 	      partitions.unordered_remove (j);
 	      partition_free (partition);
 	      j--;
+	      changed = true;
 	    }
 	}
+      /* If we fused 0 1 2 in step 1 to 0,2 1 as 0 and 2 have similar
+         accesses when 1 and 2 have similar accesses but not 0 and 1
+	 then in the next iteration we will fail to consider merging
+	 1 into 0,2.  So try again if we did any merging into 0.  */
+      if (changed)
+	i--;
     }
 
   /* Build the partition dependency graph.  */
diff --git a/gcc/tree-scalar-evolution.c b/gcc/tree-scalar-evolution.c
index d6f2a2fba14..2097d81b6cb 100644
--- a/gcc/tree-scalar-evolution.c
+++ b/gcc/tree-scalar-evolution.c
@@ -3309,6 +3309,91 @@ scev_reset (void)
     }
 }
 
+/* Return true if the IV calculation in TYPE can overflow based on the knowledge
+   of the upper bound on the number of iterations of LOOP, the BASE and STEP
+   of IV.
+
+   We do not use information whether TYPE can overflow so it is safe to
+   use this test even for derived IVs not computed every iteration or
+   hypotetical IVs to be inserted into code.  */
+
+bool
+iv_can_overflow_p (struct loop *loop, tree type, tree base, tree step)
+{
+  widest_int nit;
+  wide_int base_min, base_max, step_min, step_max, type_min, type_max;
+  signop sgn = TYPE_SIGN (type);
+
+  if (integer_zerop (step))
+    return false;
+
+  if (TREE_CODE (base) == INTEGER_CST)
+    base_min = base_max = base;
+  else if (TREE_CODE (base) == SSA_NAME
+	   && INTEGRAL_TYPE_P (TREE_TYPE (base))
+	   && get_range_info (base, &base_min, &base_max) == VR_RANGE)
+    ;
+  else
+    return true;
+
+  if (TREE_CODE (step) == INTEGER_CST)
+    step_min = step_max = step;
+  else if (TREE_CODE (step) == SSA_NAME
+	   && INTEGRAL_TYPE_P (TREE_TYPE (step))
+	   && get_range_info (step, &step_min, &step_max) == VR_RANGE)
+    ;
+  else
+    return true;
+
+  if (!get_max_loop_iterations (loop, &nit))
+    return true;
+
+  type_min = wi::min_value (type);
+  type_max = wi::max_value (type);
+
+  /* Just sanity check that we don't see values out of the range of the type.
+     In this case the arithmetics bellow would overflow.  */
+  gcc_checking_assert (wi::ge_p (base_min, type_min, sgn)
+		       && wi::le_p (base_max, type_max, sgn));
+
+  /* Account the possible increment in the last ieration.  */
+  bool overflow = false;
+  nit = wi::add (nit, 1, SIGNED, &overflow);
+  if (overflow)
+    return true;
+
+  /* NIT is typeless and can exceed the precision of the type.  In this case
+     overflow is always possible, because we know STEP is non-zero.  */
+  if (wi::min_precision (nit, UNSIGNED) > TYPE_PRECISION (type))
+    return true;
+  wide_int nit2 = wide_int::from (nit, TYPE_PRECISION (type), UNSIGNED);
+
+  /* If step can be positive, check that nit*step <= type_max-base.
+     This can be done by unsigned arithmetic and we only need to watch overflow
+     in the multiplication. The right hand side can always be represented in
+     the type.  */
+  if (sgn == UNSIGNED || !wi::neg_p (step_max))
+    {
+      bool overflow = false;
+      if (wi::gtu_p (wi::mul (step_max, nit2, UNSIGNED, &overflow),
+		     type_max - base_max)
+	  || overflow)
+	return true;
+    }
+  /* If step can be negative, check that nit*(-step) <= base_min-type_min.  */
+  if (sgn == SIGNED && wi::neg_p (step_min))
+    {
+      bool overflow = false, overflow2 = false;
+      if (wi::gtu_p (wi::mul (wi::neg (step_min, &overflow2),
+		     nit2, UNSIGNED, &overflow),
+		     base_min - type_min)
+	  || overflow || overflow2)
+        return true;
+    }
+
+  return false;
+}
+
 /* Checks whether use of OP in USE_LOOP behaves as a simple affine iv with
    respect to WRTO_LOOP and returns its base and step in IV if possible
    (see analyze_scalar_evolution_in_loop for more details on USE_LOOP
@@ -3375,8 +3460,11 @@ simple_iv (struct loop *wrto_loop, struct loop *use_loop, tree op,
   if (tree_contains_chrecs (iv->base, NULL))
     return false;
 
-  iv->no_overflow = (!folded_casts && ANY_INTEGRAL_TYPE_P (type)
-		     && TYPE_OVERFLOW_UNDEFINED (type));
+  iv->no_overflow = !folded_casts && nowrap_type_p (type);
+
+  if (!iv->no_overflow
+      && !iv_can_overflow_p (wrto_loop, type, iv->base, iv->step))
+    iv->no_overflow = true;
 
   /* Try to simplify iv base:
 
diff --git a/gcc/tree-scalar-evolution.h b/gcc/tree-scalar-evolution.h
index 8a87660cfbe..382d71751cc 100644
--- a/gcc/tree-scalar-evolution.h
+++ b/gcc/tree-scalar-evolution.h
@@ -38,6 +38,7 @@ extern unsigned int scev_const_prop (void);
 extern bool expression_expensive_p (tree);
 extern bool simple_iv (struct loop *, struct loop *, tree, struct affine_iv *,
 		       bool);
+extern bool iv_can_overflow_p (struct loop *, tree, tree, tree);
 extern tree compute_overall_effect_of_inner_loop (struct loop *, tree);
 
 /* Returns the basic block preceding LOOP, or the CFG entry block when
diff --git a/gcc/tree-ssa-loop-im.c b/gcc/tree-ssa-loop-im.c
index b9cd0f6bac6..ee048263ca2 100644
--- a/gcc/tree-ssa-loop-im.c
+++ b/gcc/tree-ssa-loop-im.c
@@ -2128,6 +2128,17 @@ ref_indep_loop_p_1 (struct loop *loop, im_mem_ref *ref, bool stored_p)
   if (bitmap_bit_p (refs_to_check, UNANALYZABLE_MEM_ID))
     return false;
 
+  if (loop->safelen > 0)
+    {
+      if (dump_file && (dump_flags & TDF_DETAILS))
+	{
+	  fprintf(dump_file,"Consider REF independent in loop#%d\n", loop->num);
+	  print_generic_expr(dump_file, ref->mem.ref, TDF_SLIM);
+	  fprintf(dump_file, "\n");
+	}
+      return true;
+    }
+
   EXECUTE_IF_SET_IN_BITMAP (refs_to_check, 0, i, bi)
     {
       aref = memory_accesses.refs_list[i];
diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c
index 25b97808512..6b403f5b72f 100644
--- a/gcc/tree-ssa-loop-ivopts.c
+++ b/gcc/tree-ssa-loop-ivopts.c
@@ -1181,6 +1181,10 @@ alloc_iv (struct ivopts_data *data, tree base, tree step,
   iv->biv_p = false;
   iv->nonlin_use = NULL;
   iv->ssa_name = NULL_TREE;
+  if (!no_overflow
+       && !iv_can_overflow_p (data->current_loop, TREE_TYPE (base),
+			      base, step))
+    no_overflow = true;
   iv->no_overflow = no_overflow;
   iv->have_address_use = false;
 
diff --git a/gcc/tree-ssa-loop-niter.c b/gcc/tree-ssa-loop-niter.c
index 32fe2f91edd..0723752fbdc 100644
--- a/gcc/tree-ssa-loop-niter.c
+++ b/gcc/tree-ssa-loop-niter.c
@@ -4105,7 +4105,7 @@ n_of_executions_at_most (gimple *stmt,
 bool
 nowrap_type_p (tree type)
 {
-  if (INTEGRAL_TYPE_P (type)
+  if (ANY_INTEGRAL_TYPE_P (type)
       && TYPE_OVERFLOW_UNDEFINED (type))
     return true;
 
diff --git a/gcc/tree-ssa-math-opts.c b/gcc/tree-ssa-math-opts.c
index 513ef0b3f4e..d31c12fd818 100644
--- a/gcc/tree-ssa-math-opts.c
+++ b/gcc/tree-ssa-math-opts.c
@@ -2307,6 +2307,10 @@ find_bswap_or_nop_1 (gimple *stmt, struct symbolic_number *n, int limit)
 	  && bitsize % BITS_PER_UNIT == 0
 	  && init_symbolic_number (n, TREE_OPERAND (rhs1, 0)))
 	{
+	  /* Handle big-endian bit numbering in BIT_FIELD_REF.  */
+	  if (BYTES_BIG_ENDIAN)
+	    bitpos = TYPE_PRECISION (n->type) - bitpos - bitsize;
+
 	  /* Shift.  */
 	  if (!do_shift_rotate (RSHIFT_EXPR, n, bitpos))
 	    return NULL;
diff --git a/gcc/tree-ssa-pre.c b/gcc/tree-ssa-pre.c
index 3ce87d9d23f..0c97f4fbcce 100644
--- a/gcc/tree-ssa-pre.c
+++ b/gcc/tree-ssa-pre.c
@@ -53,6 +53,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "ipa-utils.h"
 #include "tree-cfgcleanup.h"
 #include "langhooks.h"
+#include "alias.h"
 
 /* TODO:
 
@@ -3724,12 +3725,19 @@ compute_avail (void)
 
 		  case VN_REFERENCE:
 		    {
+		      tree rhs1 = gimple_assign_rhs1 (stmt);
+		      alias_set_type set = get_alias_set (rhs1);
+		      vec<vn_reference_op_s> operands
+			= vn_reference_operands_for_lookup (rhs1);
 		      vn_reference_t ref;
-		      vn_reference_lookup (gimple_assign_rhs1 (stmt),
-					   gimple_vuse (stmt),
-					   VN_WALK, &ref, true);
+		      vn_reference_lookup_pieces (gimple_vuse (stmt), set,
+						  TREE_TYPE (rhs1),
+						  operands, &ref, VN_WALK);
 		      if (!ref)
-			continue;
+			{
+			  operands.release ();
+			  continue;
+			}
 
 		      /* If the value of the reference is not invalidated in
 			 this block until it is computed, add the expression
@@ -3753,7 +3761,68 @@ compute_avail (void)
 				= SSA_NAME_DEF_STMT (gimple_vuse (def_stmt));
 			    }
 			  if (!ok)
-			    continue;
+			    {
+			      operands.release ();
+			      continue;
+			    }
+			}
+
+		      /* If the load was value-numbered to another
+			 load make sure we do not use its expression
+			 for insertion if it wouldn't be a valid
+			 replacement.  */
+		      /* At the momemt we have a testcase
+			 for hoist insertion of aligned vs. misaligned
+			 variants in gcc.dg/torture/pr65270-1.c thus
+			 with just alignment to be considered we can
+			 simply replace the expression in the hashtable
+			 with the most conservative one.  */
+		      vn_reference_op_t ref1 = &ref->operands.last ();
+		      while (ref1->opcode != TARGET_MEM_REF
+			     && ref1->opcode != MEM_REF
+			     && ref1 != &ref->operands[0])
+			--ref1;
+		      vn_reference_op_t ref2 = &operands.last ();
+		      while (ref2->opcode != TARGET_MEM_REF
+			     && ref2->opcode != MEM_REF
+			     && ref2 != &operands[0])
+			--ref2;
+		      if ((ref1->opcode == TARGET_MEM_REF
+			   || ref1->opcode == MEM_REF)
+			  && (TYPE_ALIGN (ref1->type)
+			      > TYPE_ALIGN (ref2->type)))
+			{
+			  ref->operands.release ();
+			  ref->operands = operands;
+			  ref1 = ref2;
+			}
+		      else
+			operands.release ();
+		      /* TBAA behavior is an obvious part so make sure
+		         that the hashtable one covers this as well
+			 by adjusting the ref alias set and its base.  */
+		      if (ref->set == set
+			  || alias_set_subset_of (set, ref->set))
+			;
+		      else if (alias_set_subset_of (ref->set, set))
+			{
+			  ref->set = set;
+			  if (ref1->opcode == MEM_REF)
+			    ref1->op0 = fold_convert (TREE_TYPE (ref2->op0),
+						      ref1->op0);
+			  else
+			    ref1->op2 = fold_convert (TREE_TYPE (ref2->op2),
+						      ref1->op2);
+			}
+		      else
+			{
+			  ref->set = 0;
+			  if (ref1->opcode == MEM_REF)
+			    ref1->op0 = fold_convert (ptr_type_node,
+						      ref1->op0);
+			  else
+			    ref1->op2 = fold_convert (ptr_type_node,
+						      ref1->op2);
 			}
 
 		      result = pre_expr_pool.allocate ();
diff --git a/gcc/tree-ssa-sccvn.c b/gcc/tree-ssa-sccvn.c
index 0cbd2cd56f2..e9e18526a0b 100644
--- a/gcc/tree-ssa-sccvn.c
+++ b/gcc/tree-ssa-sccvn.c
@@ -2285,6 +2285,17 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *vr_,
   return (void *)-1;
 }
 
+/* Return a reference op vector from OP that can be used for
+   vn_reference_lookup_pieces.  The caller is responsible for releasing
+   the vector.  */
+
+vec<vn_reference_op_s>
+vn_reference_operands_for_lookup (tree op)
+{
+  bool valueized;
+  return valueize_shared_reference_ops_from_ref (op, &valueized).copy ();
+}
+
 /* Lookup a reference operation by it's parts, in the current hash table.
    Returns the resulting value number if it exists in the hash table,
    NULL_TREE otherwise.  VNRESULT will be filled in with the actual
diff --git a/gcc/tree-ssa-sccvn.h b/gcc/tree-ssa-sccvn.h
index 1f6af4043fa..069590a0b01 100644
--- a/gcc/tree-ssa-sccvn.h
+++ b/gcc/tree-ssa-sccvn.h
@@ -214,6 +214,7 @@ vn_nary_op_t vn_nary_op_insert_pieces (unsigned int, enum tree_code,
 				       tree, tree *, tree, unsigned int);
 bool ao_ref_init_from_vn_reference (ao_ref *, alias_set_type, tree,
 				    vec<vn_reference_op_s> );
+vec<vn_reference_op_s> vn_reference_operands_for_lookup (tree);
 tree vn_reference_lookup_pieces (tree, alias_set_type, tree,
 				 vec<vn_reference_op_s> ,
 				 vn_reference_t *, vn_lookup_kind);
diff --git a/gcc/tree-ssa-strlen.c b/gcc/tree-ssa-strlen.c
index f306a9c9f3d..489c8f0c0d7 100644
--- a/gcc/tree-ssa-strlen.c
+++ b/gcc/tree-ssa-strlen.c
@@ -159,10 +159,10 @@ get_strinfo (int idx)
 /* Helper function for get_stridx.  */
 
 static int
-get_addr_stridx (tree exp)
+get_addr_stridx (tree exp, tree ptr)
 {
   HOST_WIDE_INT off;
-  struct stridxlist *list;
+  struct stridxlist *list, *last = NULL;
   tree base;
 
   if (!decl_to_stridxlist_htab)
@@ -180,9 +180,22 @@ get_addr_stridx (tree exp)
     {
       if (list->offset == off)
 	return list->idx;
+      if (list->offset > off)
+	return 0;
+      last = list;
       list = list->next;
     }
   while (list);
+
+  if (ptr && last && last->idx > 0)
+    {
+      strinfo *si = get_strinfo (last->idx);
+      if (si
+	  && si->length
+	  && TREE_CODE (si->length) == INTEGER_CST
+	  && compare_tree_int (si->length, off - last->offset) != -1)
+	return get_stridx_plus_constant (si, off - last->offset, ptr);
+    }
   return 0;
 }
 
@@ -234,7 +247,7 @@ get_stridx (tree exp)
 
   if (TREE_CODE (exp) == ADDR_EXPR)
     {
-      int idx = get_addr_stridx (TREE_OPERAND (exp, 0));
+      int idx = get_addr_stridx (TREE_OPERAND (exp, 0), exp);
       if (idx != 0)
 	return idx;
     }
@@ -304,15 +317,29 @@ addr_stridxptr (tree exp)
   if (existed)
     {
       int i;
-      for (i = 0; i < 16; i++)
+      stridxlist *before = NULL;
+      for (i = 0; i < 32; i++)
 	{
 	  if (list->offset == off)
 	    return &list->idx;
+	  if (list->offset > off && before == NULL)
+	    before = list;
 	  if (list->next == NULL)
 	    break;
+	  list = list->next;
 	}
-      if (i == 16)
+      if (i == 32)
 	return NULL;
+      if (before)
+	{
+	  list = before;
+	  before = XOBNEW (&stridx_obstack, struct stridxlist);
+	  *before = *list;
+	  list->next = before;
+	  list->offset = off;
+	  list->idx = 0;
+	  return &list->idx;
+	}
       list->next = XOBNEW (&stridx_obstack, struct stridxlist);
       list = list->next;
     }
@@ -613,9 +640,7 @@ verify_related_strinfos (strinfo *origsi)
 static int
 get_stridx_plus_constant (strinfo *basesi, HOST_WIDE_INT off, tree ptr)
 {
-  gcc_checking_assert (TREE_CODE (ptr) == SSA_NAME);
-
-  if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (ptr))
+  if (TREE_CODE (ptr) == SSA_NAME && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (ptr))
     return 0;
 
   if (basesi->length == NULL_TREE
@@ -633,7 +658,8 @@ get_stridx_plus_constant (strinfo *basesi, HOST_WIDE_INT off, tree ptr)
       || TREE_CODE (si->length) != INTEGER_CST)
     return 0;
 
-  if (ssa_ver_to_stridx.length () <= SSA_NAME_VERSION (ptr))
+  if (TREE_CODE (ptr) == SSA_NAME
+      && ssa_ver_to_stridx.length () <= SSA_NAME_VERSION (ptr))
     ssa_ver_to_stridx.safe_grow_cleared (num_ssa_names);
 
   gcc_checking_assert (compare_tree_int (si->length, off) != -1);
@@ -651,7 +677,14 @@ get_stridx_plus_constant (strinfo *basesi, HOST_WIDE_INT off, tree ptr)
 	{
 	  if (r == 0)
 	    {
-	      ssa_ver_to_stridx[SSA_NAME_VERSION (ptr)] = si->idx;
+	      if (TREE_CODE (ptr) == SSA_NAME)
+		ssa_ver_to_stridx[SSA_NAME_VERSION (ptr)] = si->idx;
+	      else
+		{
+		  int *pidx = addr_stridxptr (TREE_OPERAND (ptr, 0));
+		  if (pidx != NULL && *pidx == 0)
+		    *pidx = si->idx;
+		}
 	      return si->idx;
 	    }
 	  break;
@@ -2063,7 +2096,7 @@ handle_char_store (gimple_stmt_iterator *gsi)
 	}
     }
   else
-    idx = get_addr_stridx (lhs);
+    idx = get_addr_stridx (lhs, NULL_TREE);
 
   if (idx > 0)
     {
diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c
index 5ac34bebb07..6fddd3a1c68 100644
--- a/gcc/tree-vect-data-refs.c
+++ b/gcc/tree-vect-data-refs.c
@@ -698,6 +698,7 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
   tree base, base_addr;
   tree misalign = NULL_TREE;
   tree aligned_to;
+  tree step;
   unsigned HOST_WIDE_INT alignment;
 
   if (dump_enabled_p ())
@@ -828,16 +829,20 @@ vect_compute_data_ref_alignment (struct data_reference *dr)
       DR_VECT_AUX (dr)->base_element_aligned = true;
     }
 
+  if (loop && nested_in_vect_loop_p (loop, stmt))
+    step = STMT_VINFO_DR_STEP (stmt_info);
+  else
+    step = DR_STEP (dr);
   /* If this is a backward running DR then first access in the larger
      vectype actually is N-1 elements before the address in the DR.
      Adjust misalign accordingly.  */
-  if (tree_int_cst_sgn (DR_STEP (dr)) < 0)
+  if (tree_int_cst_sgn (step) < 0)
     {
       tree offset = ssize_int (TYPE_VECTOR_SUBPARTS (vectype) - 1);
       /* DR_STEP(dr) is the same as -TYPE_SIZE of the scalar type,
 	 otherwise we wouldn't be here.  */
-      offset = fold_build2 (MULT_EXPR, ssizetype, offset, DR_STEP (dr));
-      /* PLUS because DR_STEP was negative.  */
+      offset = fold_build2 (MULT_EXPR, ssizetype, offset, step);
+      /* PLUS because STEP was negative.  */
       misalign = size_binop (PLUS_EXPR, misalign, offset);
     }
 
@@ -3187,12 +3192,12 @@ vect_prune_runtime_alias_test_list (loop_vec_info loop_vinfo)
   return true;
 }
 
-/* Check whether a non-affine read or write in stmt is suitable for gather load
-   or scatter store and if so, return a builtin decl for that operation.  */
+/* Return true if a non-affine read or write in STMT is suitable for a
+   gather load or scatter store.  Describe the operation in *INFO if so.  */
 
-tree
-vect_check_gather_scatter (gimple *stmt, loop_vec_info loop_vinfo, tree *basep,
-			   tree *offp, int *scalep)
+bool
+vect_check_gather_scatter (gimple *stmt, loop_vec_info loop_vinfo,
+			   gather_scatter_info *info)
 {
   HOST_WIDE_INT scale = 1, pbitpos, pbitsize;
   struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
@@ -3266,7 +3271,7 @@ vect_check_gather_scatter (gimple *stmt, loop_vec_info loop_vinfo, tree *basep,
   if (!expr_invariant_in_loop_p (loop, base))
     {
       if (!integer_zerop (off))
-	return NULL_TREE;
+	return false;
       off = base;
       base = size_int (pbitpos / BITS_PER_UNIT);
     }
@@ -3292,7 +3297,7 @@ vect_check_gather_scatter (gimple *stmt, loop_vec_info loop_vinfo, tree *basep,
 	  gimple *def_stmt = SSA_NAME_DEF_STMT (off);
 
 	  if (expr_invariant_in_loop_p (loop, off))
-	    return NULL_TREE;
+	    return false;
 
 	  if (gimple_code (def_stmt) != GIMPLE_ASSIGN)
 	    break;
@@ -3304,7 +3309,7 @@ vect_check_gather_scatter (gimple *stmt, loop_vec_info loop_vinfo, tree *basep,
       else
 	{
 	  if (get_gimple_rhs_class (TREE_CODE (off)) == GIMPLE_TERNARY_RHS)
-	    return NULL_TREE;
+	    return false;
 	  code = TREE_CODE (off);
 	  extract_ops_from_tree (off, &code, &op0, &op1);
 	}
@@ -3379,7 +3384,7 @@ vect_check_gather_scatter (gimple *stmt, loop_vec_info loop_vinfo, tree *basep,
      defined in the loop, punt.  */
   if (TREE_CODE (off) != SSA_NAME
       || expr_invariant_in_loop_p (loop, off))
-    return NULL_TREE;
+    return false;
 
   if (offtype == NULL_TREE)
     offtype = TREE_TYPE (off);
@@ -3392,15 +3397,15 @@ vect_check_gather_scatter (gimple *stmt, loop_vec_info loop_vinfo, tree *basep,
 					      offtype, scale);
 
   if (decl == NULL_TREE)
-    return NULL_TREE;
-
-  if (basep)
-    *basep = base;
-  if (offp)
-    *offp = off;
-  if (scalep)
-    *scalep = scale;
-  return decl;
+    return false;
+
+  info->decl = decl;
+  info->base = base;
+  info->offset = off;
+  info->offset_dt = vect_unknown_def_type;
+  info->offset_vectype = NULL_TREE;
+  info->scale = scale;
+  return true;
 }
 
 /* Function vect_analyze_data_refs.
@@ -3878,10 +3883,10 @@ again:
 
       if (gatherscatter != SG_NONE)
 	{
-	  tree off;
+	  gather_scatter_info gs_info;
 	  if (!vect_check_gather_scatter (stmt, as_a <loop_vec_info> (vinfo),
-					  NULL, &off, NULL)
-	      || get_vectype_for_scalar_type (TREE_TYPE (off)) == NULL_TREE)
+					  &gs_info)
+	      || !get_vectype_for_scalar_type (TREE_TYPE (gs_info.offset)))
 	    {
 	      STMT_VINFO_DATA_REF (stmt_info) = NULL;
 	      free_data_ref (dr);
@@ -5144,14 +5149,31 @@ vect_setup_realignment (gimple *stmt, gimple_stmt_iterator *gsi,
 
 /* Function vect_grouped_load_supported.
 
-   Returns TRUE if even and odd permutations are supported,
-   and FALSE otherwise.  */
+   COUNT is the size of the load group (the number of statements plus the
+   number of gaps).  SINGLE_ELEMENT_P is true if there is actually
+   only one statement, with a gap of COUNT - 1.
+
+   Returns true if a suitable permute exists.  */
 
 bool
-vect_grouped_load_supported (tree vectype, unsigned HOST_WIDE_INT count)
+vect_grouped_load_supported (tree vectype, bool single_element_p,
+			     unsigned HOST_WIDE_INT count)
 {
   machine_mode mode = TYPE_MODE (vectype);
 
+  /* If this is single-element interleaving with an element distance
+     that leaves unused vector loads around punt - we at least create
+     very sub-optimal code in that case (and blow up memory,
+     see PR65518).  */
+  if (single_element_p && count > TYPE_VECTOR_SUBPARTS (vectype))
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "single-element interleaving not supported "
+			 "for not adjacent vector loads\n");
+      return false;
+    }
+
   /* vect_permute_load_chain requires the group size to be equal to 3 or
      be a power of two.  */
   if (count != 3 && exact_log2 (count) == -1)
diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c
index 6c0337bbbcb..97acf3cb6d3 100644
--- a/gcc/tree-vect-loop.c
+++ b/gcc/tree-vect-loop.c
@@ -2152,10 +2152,12 @@ again:
 	{
 	  vinfo = vinfo_for_stmt (SLP_TREE_SCALAR_STMTS (node)[0]);
 	  vinfo = vinfo_for_stmt (STMT_VINFO_GROUP_FIRST_ELEMENT (vinfo));
+	  bool single_element_p = !STMT_VINFO_GROUP_NEXT_ELEMENT (vinfo);
 	  size = STMT_VINFO_GROUP_SIZE (vinfo);
 	  vectype = STMT_VINFO_VECTYPE (vinfo);
 	  if (! vect_load_lanes_supported (vectype, size)
-	      && ! vect_grouped_load_supported (vectype, size))
+	      && ! vect_grouped_load_supported (vectype, single_element_p,
+						size))
 	    return false;
 	}
     }
@@ -6352,11 +6354,12 @@ vectorizable_live_operation (gimple *stmt,
 	: gimple_get_lhs (stmt);
   lhs_type = TREE_TYPE (lhs);
 
-  /* Find all uses of STMT outside the loop - there should be exactly one.  */
+  /* Find all uses of STMT outside the loop - there should be at least one.  */
   auto_vec<gimple *, 4> worklist;
   FOR_EACH_IMM_USE_STMT (use_stmt, imm_iter, lhs)
-    if (!flow_bb_inside_loop_p (loop, gimple_bb (use_stmt)))
-	worklist.safe_push (use_stmt);
+    if (!flow_bb_inside_loop_p (loop, gimple_bb (use_stmt))
+	&& !is_gimple_debug (use_stmt))
+      worklist.safe_push (use_stmt);
   gcc_assert (worklist.length () >= 1);
 
   bitsize = TYPE_SIZE (TREE_TYPE (vectype));
@@ -6968,6 +6971,9 @@ vect_transform_loop (loop_vec_info loop_vinfo)
   FOR_EACH_VEC_ELT (LOOP_VINFO_SLP_INSTANCES (loop_vinfo), i, instance)
     vect_free_slp_instance (instance);
   LOOP_VINFO_SLP_INSTANCES (loop_vinfo).release ();
+  /* Clear-up safelen field since its value is invalid after vectorization
+     since vectorized loop can have loop-carried dependencies.  */
+  loop->safelen = 0;
 }
 
 /* The code below is trying to perform simple optimization - revert
diff --git a/gcc/tree-vect-slp.c b/gcc/tree-vect-slp.c
index 0239e12d482..4de8593308c 100644
--- a/gcc/tree-vect-slp.c
+++ b/gcc/tree-vect-slp.c
@@ -1490,9 +1490,13 @@ vect_analyze_slp_cost_1 (slp_instance instance, slp_tree node,
   stmt_info = vinfo_for_stmt (stmt);
   if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
     {
+      vect_memory_access_type memory_access_type
+	= (STMT_VINFO_STRIDED_P (stmt_info)
+	   ? VMAT_STRIDED_SLP
+	   : VMAT_CONTIGUOUS);
       if (DR_IS_WRITE (STMT_VINFO_DATA_REF (stmt_info)))
-	vect_model_store_cost (stmt_info, ncopies_for_cost, false,
-			       vect_uninitialized_def,
+	vect_model_store_cost (stmt_info, ncopies_for_cost,
+			       memory_access_type, vect_uninitialized_def,
 			       node, prologue_cost_vec, body_cost_vec);
       else
 	{
@@ -1515,8 +1519,9 @@ vect_analyze_slp_cost_1 (slp_instance instance, slp_tree node,
 	      ncopies_for_cost *= SLP_INSTANCE_UNROLLING_FACTOR (instance);
 	    }
 	  /* Record the cost for the vector loads.  */
-	  vect_model_load_cost (stmt_info, ncopies_for_cost, false,
-				node, prologue_cost_vec, body_cost_vec);
+	  vect_model_load_cost (stmt_info, ncopies_for_cost,
+				memory_access_type, node, prologue_cost_vec,
+				body_cost_vec);
 	  return;
 	}
     }
diff --git a/gcc/tree-vect-stmts.c b/gcc/tree-vect-stmts.c
index 5c655029dd5..ffa5e9881d6 100644
--- a/gcc/tree-vect-stmts.c
+++ b/gcc/tree-vect-stmts.c
@@ -52,6 +52,14 @@ along with GCC; see the file COPYING3.  If not see
 /* For lang_hooks.types.type_for_mode.  */
 #include "langhooks.h"
 
+/* Says whether a statement is a load, a store of a vectorized statement
+   result, or a store of an invariant value.  */
+enum vec_load_store_type {
+  VLS_LOAD,
+  VLS_STORE,
+  VLS_STORE_INVARIANT
+};
+
 /* Return the vectorized type for the given statement.  */
 
 tree
@@ -772,10 +780,11 @@ vect_mark_stmts_to_be_vectorized (loop_vec_info loop_vinfo)
 
       if (STMT_VINFO_GATHER_SCATTER_P (stmt_vinfo))
 	{
-	  tree off;
-	  tree decl = vect_check_gather_scatter (stmt, loop_vinfo, NULL, &off, NULL);
-	  gcc_assert (decl);
-	  if (!process_use (stmt, off, loop_vinfo, relevant, &worklist, true))
+	  gather_scatter_info gs_info;
+	  if (!vect_check_gather_scatter (stmt, loop_vinfo, &gs_info))
+	    gcc_unreachable ();
+	  if (!process_use (stmt, gs_info.offset, loop_vinfo, relevant,
+			    &worklist, true))
 	    return false;
 	}
     } /* while worklist */
@@ -865,24 +874,6 @@ vect_model_promotion_demotion_cost (stmt_vec_info stmt_info,
                      "prologue_cost = %d .\n", inside_cost, prologue_cost);
 }
 
-/* Function vect_cost_group_size
-
-   For grouped load or store, return the group_size only if it is the first
-   load or store of a group, else return 1.  This ensures that group size is
-   only returned once per group.  */
-
-static int
-vect_cost_group_size (stmt_vec_info stmt_info)
-{
-  gimple *first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
-
-  if (first_stmt == STMT_VINFO_STMT (stmt_info))
-    return GROUP_SIZE (stmt_info);
-
-  return 1;
-}
-
-
 /* Function vect_model_store_cost
 
    Models cost for stores.  In the case of grouped accesses, one access
@@ -890,52 +881,43 @@ vect_cost_group_size (stmt_vec_info stmt_info)
 
 void
 vect_model_store_cost (stmt_vec_info stmt_info, int ncopies,
-		       bool store_lanes_p, enum vect_def_type dt,
-		       slp_tree slp_node,
+		       vect_memory_access_type memory_access_type,
+		       enum vect_def_type dt, slp_tree slp_node,
 		       stmt_vector_for_cost *prologue_cost_vec,
 		       stmt_vector_for_cost *body_cost_vec)
 {
-  int group_size;
   unsigned int inside_cost = 0, prologue_cost = 0;
-  struct data_reference *first_dr;
-  gimple *first_stmt;
+  struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info);
+  gimple *first_stmt = STMT_VINFO_STMT (stmt_info);
+  bool grouped_access_p = STMT_VINFO_GROUPED_ACCESS (stmt_info);
 
   if (dt == vect_constant_def || dt == vect_external_def)
     prologue_cost += record_stmt_cost (prologue_cost_vec, 1, scalar_to_vec,
 				       stmt_info, 0, vect_prologue);
 
-  /* Grouped access?  */
-  if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
+  /* Grouped stores update all elements in the group at once,
+     so we want the DR for the first statement.  */
+  if (!slp_node && grouped_access_p)
     {
-      if (slp_node)
-        {
-          first_stmt = SLP_TREE_SCALAR_STMTS (slp_node)[0];
-          group_size = 1;
-        }
-      else
-        {
-          first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
-          group_size = vect_cost_group_size (stmt_info);
-        }
-
-      first_dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt));
-    }
-  /* Not a grouped access.  */
-  else
-    {
-      group_size = 1;
-      first_dr = STMT_VINFO_DATA_REF (stmt_info);
+      first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
+      dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt));
     }
 
+  /* True if we should include any once-per-group costs as well as
+     the cost of the statement itself.  For SLP we only get called
+     once per group anyhow.  */
+  bool first_stmt_p = (first_stmt == STMT_VINFO_STMT (stmt_info));
+
   /* We assume that the cost of a single store-lanes instruction is
      equivalent to the cost of GROUP_SIZE separate stores.  If a grouped
      access is instead being provided by a permute-and-store operation,
      include the cost of the permutes.  */
-  if (!store_lanes_p && group_size > 1
-      && !STMT_VINFO_STRIDED_P (stmt_info))
+  if (first_stmt_p
+      && memory_access_type == VMAT_CONTIGUOUS_PERMUTE)
     {
       /* Uses a high and low interleave or shuffle operations for each
 	 needed permute.  */
+      int group_size = GROUP_SIZE (vinfo_for_stmt (first_stmt));
       int nstmts = ncopies * ceil_log2 (group_size) * group_size;
       inside_cost = record_stmt_cost (body_cost_vec, nstmts, vec_perm,
 				      stmt_info, 0, vect_body);
@@ -948,18 +930,16 @@ vect_model_store_cost (stmt_vec_info stmt_info, int ncopies,
 
   tree vectype = STMT_VINFO_VECTYPE (stmt_info);
   /* Costs of the stores.  */
-  if (STMT_VINFO_STRIDED_P (stmt_info)
-      && !STMT_VINFO_GROUPED_ACCESS (stmt_info))
-    {
-      /* N scalar stores plus extracting the elements.  */
-      inside_cost += record_stmt_cost (body_cost_vec,
-				       ncopies * TYPE_VECTOR_SUBPARTS (vectype),
-				       scalar_store, stmt_info, 0, vect_body);
-    }
+  if (memory_access_type == VMAT_ELEMENTWISE)
+    /* N scalar stores plus extracting the elements.  */
+    inside_cost += record_stmt_cost (body_cost_vec,
+				     ncopies * TYPE_VECTOR_SUBPARTS (vectype),
+				     scalar_store, stmt_info, 0, vect_body);
   else
-    vect_get_store_cost (first_dr, ncopies, &inside_cost, body_cost_vec);
+    vect_get_store_cost (dr, ncopies, &inside_cost, body_cost_vec);
 
-  if (STMT_VINFO_STRIDED_P (stmt_info))
+  if (memory_access_type == VMAT_ELEMENTWISE
+      || memory_access_type == VMAT_STRIDED_SLP)
     inside_cost += record_stmt_cost (body_cost_vec,
 				     ncopies * TYPE_VECTOR_SUBPARTS (vectype),
 				     vec_to_scalar, stmt_info, 0, vect_body);
@@ -1026,45 +1006,46 @@ vect_get_store_cost (struct data_reference *dr, int ncopies,
 
 /* Function vect_model_load_cost
 
-   Models cost for loads.  In the case of grouped accesses, the last access
-   has the overhead of the grouped access attributed to it.  Since unaligned
+   Models cost for loads.  In the case of grouped accesses, one access has
+   the overhead of the grouped access attributed to it.  Since unaligned
    accesses are supported for loads, we also account for the costs of the
    access scheme chosen.  */
 
 void
 vect_model_load_cost (stmt_vec_info stmt_info, int ncopies,
-		      bool load_lanes_p, slp_tree slp_node,
+		      vect_memory_access_type memory_access_type,
+		      slp_tree slp_node,
 		      stmt_vector_for_cost *prologue_cost_vec,
 		      stmt_vector_for_cost *body_cost_vec)
 {
-  int group_size;
-  gimple *first_stmt;
-  struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info), *first_dr;
+  gimple *first_stmt = STMT_VINFO_STMT (stmt_info);
+  struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info);
   unsigned int inside_cost = 0, prologue_cost = 0;
+  bool grouped_access_p = STMT_VINFO_GROUPED_ACCESS (stmt_info);
 
-  /* Grouped accesses?  */
-  first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
-  if (STMT_VINFO_GROUPED_ACCESS (stmt_info) && first_stmt && !slp_node)
-    {
-      group_size = vect_cost_group_size (stmt_info);
-      first_dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt));
-    }
-  /* Not a grouped access.  */
-  else
+  /* Grouped loads read all elements in the group at once,
+     so we want the DR for the first statement.  */
+  if (!slp_node && grouped_access_p)
     {
-      group_size = 1;
-      first_dr = dr;
+      first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
+      dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt));
     }
 
+  /* True if we should include any once-per-group costs as well as
+     the cost of the statement itself.  For SLP we only get called
+     once per group anyhow.  */
+  bool first_stmt_p = (first_stmt == STMT_VINFO_STMT (stmt_info));
+
   /* We assume that the cost of a single load-lanes instruction is
      equivalent to the cost of GROUP_SIZE separate loads.  If a grouped
      access is instead being provided by a load-and-permute operation,
      include the cost of the permutes.  */
-  if (!load_lanes_p && group_size > 1
-      && !STMT_VINFO_STRIDED_P (stmt_info))
+  if (first_stmt_p
+      && memory_access_type == VMAT_CONTIGUOUS_PERMUTE)
     {
       /* Uses an even and odd extract operations or shuffle operations
 	 for each needed permute.  */
+      int group_size = GROUP_SIZE (vinfo_for_stmt (first_stmt));
       int nstmts = ncopies * ceil_log2 (group_size) * group_size;
       inside_cost = record_stmt_cost (body_cost_vec, nstmts, vec_perm,
 				      stmt_info, 0, vect_body);
@@ -1076,8 +1057,7 @@ vect_model_load_cost (stmt_vec_info stmt_info, int ncopies,
     }
 
   /* The loads themselves.  */
-  if (STMT_VINFO_STRIDED_P (stmt_info)
-      && !STMT_VINFO_GROUPED_ACCESS (stmt_info))
+  if (memory_access_type == VMAT_ELEMENTWISE)
     {
       /* N scalar loads plus gathering them into a vector.  */
       tree vectype = STMT_VINFO_VECTYPE (stmt_info);
@@ -1086,14 +1066,13 @@ vect_model_load_cost (stmt_vec_info stmt_info, int ncopies,
 				       scalar_load, stmt_info, 0, vect_body);
     }
   else
-    vect_get_load_cost (first_dr, ncopies,
-			((!STMT_VINFO_GROUPED_ACCESS (stmt_info))
-			 || group_size > 1 || slp_node),
+    vect_get_load_cost (dr, ncopies, first_stmt_p,
 			&inside_cost, &prologue_cost, 
 			prologue_cost_vec, body_cost_vec, true);
-  if (STMT_VINFO_STRIDED_P (stmt_info))
-      inside_cost += record_stmt_cost (body_cost_vec, ncopies, vec_construct,
-				       stmt_info, 0, vect_body);
+  if (memory_access_type == VMAT_ELEMENTWISE
+      || memory_access_type == VMAT_STRIDED_SLP)
+    inside_cost += record_stmt_cost (body_cost_vec, ncopies, vec_construct,
+				     stmt_info, 0, vect_body);
 
   if (dump_enabled_p ())
     dump_printf_loc (MSG_NOTE, vect_location,
@@ -1693,6 +1672,310 @@ vectorizable_internal_function (combined_fn cfn, tree fndecl,
 static tree permute_vec_elements (tree, tree, tree, gimple *,
 				  gimple_stmt_iterator *);
 
+/* STMT is a non-strided load or store, meaning that it accesses
+   elements with a known constant step.  Return -1 if that step
+   is negative, 0 if it is zero, and 1 if it is greater than zero.  */
+
+static int
+compare_step_with_zero (gimple *stmt)
+{
+  stmt_vec_info stmt_info = vinfo_for_stmt (stmt);
+  loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info);
+  tree step;
+  if (loop_vinfo && nested_in_vect_loop_p (LOOP_VINFO_LOOP (loop_vinfo), stmt))
+    step = STMT_VINFO_DR_STEP (stmt_info);
+  else
+    step = DR_STEP (STMT_VINFO_DATA_REF (stmt_info));
+  return tree_int_cst_compare (step, size_zero_node);
+}
+
+/* If the target supports a permute mask that reverses the elements in
+   a vector of type VECTYPE, return that mask, otherwise return null.  */
+
+static tree
+perm_mask_for_reverse (tree vectype)
+{
+  int i, nunits;
+  unsigned char *sel;
+
+  nunits = TYPE_VECTOR_SUBPARTS (vectype);
+  sel = XALLOCAVEC (unsigned char, nunits);
+
+  for (i = 0; i < nunits; ++i)
+    sel[i] = nunits - 1 - i;
+
+  if (!can_vec_perm_p (TYPE_MODE (vectype), false, sel))
+    return NULL_TREE;
+  return vect_gen_perm_mask_checked (vectype, sel);
+}
+
+/* A subroutine of get_load_store_type, with a subset of the same
+   arguments.  Handle the case where STMT is part of a grouped load
+   or store.
+
+   For stores, the statements in the group are all consecutive
+   and there is no gap at the end.  For loads, the statements in the
+   group might not be consecutive; there can be gaps between statements
+   as well as at the end.  */
+
+static bool
+get_group_load_store_type (gimple *stmt, tree vectype, bool slp,
+			   vec_load_store_type vls_type,
+			   vect_memory_access_type *memory_access_type)
+{
+  stmt_vec_info stmt_info = vinfo_for_stmt (stmt);
+  vec_info *vinfo = stmt_info->vinfo;
+  loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info);
+  struct loop *loop = loop_vinfo ? LOOP_VINFO_LOOP (loop_vinfo) : NULL;
+  gimple *first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
+  unsigned int group_size = GROUP_SIZE (vinfo_for_stmt (first_stmt));
+  bool single_element_p = (stmt == first_stmt
+			   && !GROUP_NEXT_ELEMENT (stmt_info));
+  unsigned HOST_WIDE_INT gap = GROUP_GAP (vinfo_for_stmt (first_stmt));
+  int nunits = TYPE_VECTOR_SUBPARTS (vectype);
+
+  /* True if the vectorized statements would access beyond the last
+     statement in the group.  */
+  bool overrun_p = false;
+
+  /* True if we can cope with such overrun by peeling for gaps, so that
+     there is at least one final scalar iteration after the vector loop.  */
+  bool can_overrun_p = (vls_type == VLS_LOAD && loop_vinfo && !loop->inner);
+
+  /* There can only be a gap at the end of the group if the stride is
+     known at compile time.  */
+  gcc_assert (!STMT_VINFO_STRIDED_P (stmt_info) || gap == 0);
+
+  /* Stores can't yet have gaps.  */
+  gcc_assert (slp || vls_type == VLS_LOAD || gap == 0);
+
+  if (slp)
+    {
+      if (STMT_VINFO_STRIDED_P (stmt_info))
+	{
+	  /* Try to use consecutive accesses of GROUP_SIZE elements,
+	     separated by the stride, until we have a complete vector.
+	     Fall back to scalar accesses if that isn't possible.  */
+	  if (nunits % group_size == 0)
+	    *memory_access_type = VMAT_STRIDED_SLP;
+	  else
+	    *memory_access_type = VMAT_ELEMENTWISE;
+	}
+      else
+	{
+	  overrun_p = loop_vinfo && gap != 0;
+	  if (overrun_p && vls_type != VLS_LOAD)
+	    {
+	      dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			       "Grouped store with gaps requires"
+			       " non-consecutive accesses\n");
+	      return false;
+	    }
+	  if (overrun_p && !can_overrun_p)
+	    {
+	      if (dump_enabled_p ())
+		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+				 "Peeling for outer loop is not supported\n");
+	      return false;
+	    }
+	  *memory_access_type = VMAT_CONTIGUOUS;
+	}
+    }
+  else
+    {
+      /* We can always handle this case using elementwise accesses,
+	 but see if something more efficient is available.  */
+      *memory_access_type = VMAT_ELEMENTWISE;
+
+      /* If there is a gap at the end of the group then these optimizations
+	 would access excess elements in the last iteration.  */
+      bool would_overrun_p = (gap != 0);
+      if (!STMT_VINFO_STRIDED_P (stmt_info)
+	  && (can_overrun_p || !would_overrun_p)
+	  && compare_step_with_zero (stmt) > 0)
+	{
+	  /* First try using LOAD/STORE_LANES.  */
+	  if (vls_type == VLS_LOAD
+	      ? vect_load_lanes_supported (vectype, group_size)
+	      : vect_store_lanes_supported (vectype, group_size))
+	    {
+	      *memory_access_type = VMAT_LOAD_STORE_LANES;
+	      overrun_p = would_overrun_p;
+	    }
+
+	  /* If that fails, try using permuting loads.  */
+	  if (*memory_access_type == VMAT_ELEMENTWISE
+	      && (vls_type == VLS_LOAD
+		  ? vect_grouped_load_supported (vectype, single_element_p,
+						 group_size)
+		  : vect_grouped_store_supported (vectype, group_size)))
+	    {
+	      *memory_access_type = VMAT_CONTIGUOUS_PERMUTE;
+	      overrun_p = would_overrun_p;
+	    }
+	}
+    }
+
+  if (vls_type != VLS_LOAD && first_stmt == stmt)
+    {
+      /* STMT is the leader of the group. Check the operands of all the
+	 stmts of the group.  */
+      gimple *next_stmt = GROUP_NEXT_ELEMENT (stmt_info);
+      while (next_stmt)
+	{
+	  gcc_assert (gimple_assign_single_p (next_stmt));
+	  tree op = gimple_assign_rhs1 (next_stmt);
+	  gimple *def_stmt;
+	  enum vect_def_type dt;
+	  if (!vect_is_simple_use (op, vinfo, &def_stmt, &dt))
+	    {
+	      if (dump_enabled_p ())
+		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+				 "use not simple.\n");
+	      return false;
+	    }
+	  next_stmt = GROUP_NEXT_ELEMENT (vinfo_for_stmt (next_stmt));
+	}
+    }
+
+  if (overrun_p)
+    {
+      gcc_assert (can_overrun_p);
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "Data access with gaps requires scalar "
+			 "epilogue loop\n");
+      LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo) = true;
+    }
+
+  return true;
+}
+
+/* A subroutine of get_load_store_type, with a subset of the same
+   arguments.  Handle the case where STMT is a load or store that
+   accesses consecutive elements with a negative step.  */
+
+static vect_memory_access_type
+get_negative_load_store_type (gimple *stmt, tree vectype,
+			      vec_load_store_type vls_type,
+			      unsigned int ncopies)
+{
+  stmt_vec_info stmt_info = vinfo_for_stmt (stmt);
+  struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info);
+  dr_alignment_support alignment_support_scheme;
+
+  if (ncopies > 1)
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "multiple types with negative step.\n");
+      return VMAT_ELEMENTWISE;
+    }
+
+  alignment_support_scheme = vect_supportable_dr_alignment (dr, false);
+  if (alignment_support_scheme != dr_aligned
+      && alignment_support_scheme != dr_unaligned_supported)
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "negative step but alignment required.\n");
+      return VMAT_ELEMENTWISE;
+    }
+
+  if (vls_type == VLS_STORE_INVARIANT)
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_NOTE, vect_location,
+			 "negative step with invariant source;"
+			 " no permute needed.\n");
+      return VMAT_CONTIGUOUS_DOWN;
+    }
+
+  if (!perm_mask_for_reverse (vectype))
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "negative step and reversing not supported.\n");
+      return VMAT_ELEMENTWISE;
+    }
+
+  return VMAT_CONTIGUOUS_REVERSE;
+}
+
+/* Analyze load or store statement STMT of type VLS_TYPE.  Return true
+   if there is a memory access type that the vectorized form can use,
+   storing it in *MEMORY_ACCESS_TYPE if so.  If we decide to use gathers
+   or scatters, fill in GS_INFO accordingly.
+
+   SLP says whether we're performing SLP rather than loop vectorization.
+   VECTYPE is the vector type that the vectorized statements will use.
+   NCOPIES is the number of vector statements that will be needed.  */
+
+static bool
+get_load_store_type (gimple *stmt, tree vectype, bool slp,
+		     vec_load_store_type vls_type, unsigned int ncopies,
+		     vect_memory_access_type *memory_access_type,
+		     gather_scatter_info *gs_info)
+{
+  stmt_vec_info stmt_info = vinfo_for_stmt (stmt);
+  vec_info *vinfo = stmt_info->vinfo;
+  loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info);
+  if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
+    {
+      *memory_access_type = VMAT_GATHER_SCATTER;
+      gimple *def_stmt;
+      if (!vect_check_gather_scatter (stmt, loop_vinfo, gs_info))
+	gcc_unreachable ();
+      else if (!vect_is_simple_use (gs_info->offset, vinfo, &def_stmt,
+				    &gs_info->offset_dt,
+				    &gs_info->offset_vectype))
+	{
+	  if (dump_enabled_p ())
+	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			     "%s index use not simple.\n",
+			     vls_type == VLS_LOAD ? "gather" : "scatter");
+	  return false;
+	}
+    }
+  else if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
+    {
+      if (!get_group_load_store_type (stmt, vectype, slp, vls_type,
+				      memory_access_type))
+	return false;
+    }
+  else if (STMT_VINFO_STRIDED_P (stmt_info))
+    {
+      gcc_assert (!slp);
+      *memory_access_type = VMAT_ELEMENTWISE;
+    }
+  else
+    {
+      int cmp = compare_step_with_zero (stmt);
+      if (cmp < 0)
+	*memory_access_type = get_negative_load_store_type
+	  (stmt, vectype, vls_type, ncopies);
+      else if (cmp == 0)
+	{
+	  gcc_assert (vls_type == VLS_LOAD);
+	  *memory_access_type = VMAT_INVARIANT;
+	}
+      else
+	*memory_access_type = VMAT_CONTIGUOUS;
+    }
+
+  /* FIXME: At the moment the cost model seems to underestimate the
+     cost of using elementwise accesses.  This check preserves the
+     traditional behavior until that can be fixed.  */
+  if (*memory_access_type == VMAT_ELEMENTWISE
+      && !STMT_VINFO_STRIDED_P (stmt_info))
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "not falling back to elementwise accesses\n");
+      return false;
+    }
+  return true;
+}
 
 /* Function vectorizable_mask_load_store.
 
@@ -1724,11 +2007,8 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
   int ncopies;
   int i, j;
   bool inv_p;
-  tree gather_base = NULL_TREE, gather_off = NULL_TREE;
-  tree gather_off_vectype = NULL_TREE, gather_decl = NULL_TREE;
-  int gather_scale = 1;
-  enum vect_def_type gather_dt = vect_unknown_def_type;
-  bool is_store;
+  gather_scatter_info gs_info;
+  vec_load_store_type vls_type;
   tree mask;
   gimple *def_stmt;
   enum vect_def_type dt;
@@ -1739,7 +2019,6 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
   ncopies = LOOP_VINFO_VECT_FACTOR (loop_vinfo) / nunits;
   gcc_assert (ncopies >= 1);
 
-  is_store = gimple_call_internal_fn (stmt) == IFN_MASK_STORE;
   mask = gimple_call_arg (stmt, 2);
 
   if (TREE_CODE (TREE_TYPE (mask)) != BOOLEAN_TYPE)
@@ -1766,12 +2045,6 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 
   elem_type = TREE_TYPE (vectype);
 
-  if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
-    return false;
-
-  if (STMT_VINFO_STRIDED_P (stmt_info))
-    return false;
-
   if (TREE_CODE (mask) != SSA_NAME)
     return false;
 
@@ -1785,29 +2058,27 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
       || TYPE_VECTOR_SUBPARTS (mask_vectype) != TYPE_VECTOR_SUBPARTS (vectype))
     return false;
 
-  if (is_store)
+  if (gimple_call_internal_fn (stmt) == IFN_MASK_STORE)
     {
       tree rhs = gimple_call_arg (stmt, 3);
       if (!vect_is_simple_use (rhs, loop_vinfo, &def_stmt, &dt, &rhs_vectype))
 	return false;
+      if (dt == vect_constant_def || dt == vect_external_def)
+	vls_type = VLS_STORE_INVARIANT;
+      else
+	vls_type = VLS_STORE;
     }
+  else
+    vls_type = VLS_LOAD;
 
-  if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
-    {
-      gimple *def_stmt;
-      gather_decl = vect_check_gather_scatter (stmt, loop_vinfo, &gather_base,
-				       &gather_off, &gather_scale);
-      gcc_assert (gather_decl);
-      if (!vect_is_simple_use (gather_off, loop_vinfo, &def_stmt, &gather_dt,
-			       &gather_off_vectype))
-	{
-	  if (dump_enabled_p ())
-	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-			     "gather index use not simple.");
-	  return false;
-	}
+  vect_memory_access_type memory_access_type;
+  if (!get_load_store_type (stmt, vectype, false, vls_type, ncopies,
+			    &memory_access_type, &gs_info))
+    return false;
 
-      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (gather_decl));
+  if (memory_access_type == VMAT_GATHER_SCATTER)
+    {
+      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (gs_info.decl));
       tree masktype
 	= TREE_VALUE (TREE_CHAIN (TREE_CHAIN (TREE_CHAIN (arglist))));
       if (TREE_CODE (masktype) == INTEGER_TYPE)
@@ -1818,35 +2089,42 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 	  return false;
 	}
     }
-  else if (tree_int_cst_compare (nested_in_vect_loop
-				 ? STMT_VINFO_DR_STEP (stmt_info)
-				 : DR_STEP (dr), size_zero_node) <= 0)
-    return false;
+  else if (memory_access_type != VMAT_CONTIGUOUS)
+    {
+      if (dump_enabled_p ())
+	dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
+			 "unsupported access type for masked %s.\n",
+			 vls_type == VLS_LOAD ? "load" : "store");
+      return false;
+    }
   else if (!VECTOR_MODE_P (TYPE_MODE (vectype))
 	   || !can_vec_mask_load_store_p (TYPE_MODE (vectype),
 					  TYPE_MODE (mask_vectype),
-					  !is_store)
+					  vls_type == VLS_LOAD)
 	   || (rhs_vectype
 	       && !useless_type_conversion_p (vectype, rhs_vectype)))
     return false;
 
   if (!vec_stmt) /* transformation not required.  */
     {
+      STMT_VINFO_MEMORY_ACCESS_TYPE (stmt_info) = memory_access_type;
       STMT_VINFO_TYPE (stmt_info) = call_vec_info_type;
-      if (is_store)
-	vect_model_store_cost (stmt_info, ncopies, false, dt,
-			       NULL, NULL, NULL);
+      if (vls_type == VLS_LOAD)
+	vect_model_load_cost (stmt_info, ncopies, memory_access_type,
+			      NULL, NULL, NULL);
       else
-	vect_model_load_cost (stmt_info, ncopies, false, NULL, NULL, NULL);
+	vect_model_store_cost (stmt_info, ncopies, memory_access_type,
+			       dt, NULL, NULL, NULL);
       return true;
     }
+  gcc_assert (memory_access_type == STMT_VINFO_MEMORY_ACCESS_TYPE (stmt_info));
 
   /** Transform.  **/
 
-  if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
+  if (memory_access_type == VMAT_GATHER_SCATTER)
     {
       tree vec_oprnd0 = NULL_TREE, op;
-      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (gather_decl));
+      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (gs_info.decl));
       tree rettype, srctype, ptrtype, idxtype, masktype, scaletype;
       tree ptr, vec_mask = NULL_TREE, mask_op = NULL_TREE, var, scale;
       tree perm_mask = NULL_TREE, prev_res = NULL_TREE;
@@ -1855,9 +2133,9 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
       gimple_seq seq;
       basic_block new_bb;
       enum { NARROW, NONE, WIDEN } modifier;
-      int gather_off_nunits = TYPE_VECTOR_SUBPARTS (gather_off_vectype);
+      int gather_off_nunits = TYPE_VECTOR_SUBPARTS (gs_info.offset_vectype);
 
-      rettype = TREE_TYPE (TREE_TYPE (gather_decl));
+      rettype = TREE_TYPE (TREE_TYPE (gs_info.decl));
       srctype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
       ptrtype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
       idxtype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
@@ -1876,7 +2154,7 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 	  for (i = 0; i < gather_off_nunits; ++i)
 	    sel[i] = i | nunits;
 
-	  perm_mask = vect_gen_perm_mask_checked (gather_off_vectype, sel);
+	  perm_mask = vect_gen_perm_mask_checked (gs_info.offset_vectype, sel);
 	}
       else if (nunits == gather_off_nunits * 2)
 	{
@@ -1898,7 +2176,7 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 
       vec_dest = vect_create_destination_var (gimple_call_lhs (stmt), vectype);
 
-      ptr = fold_convert (ptrtype, gather_base);
+      ptr = fold_convert (ptrtype, gs_info.base);
       if (!is_gimple_min_invariant (ptr))
 	{
 	  ptr = force_gimple_operand (ptr, &seq, true, NULL_TREE);
@@ -1906,7 +2184,7 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 	  gcc_assert (!new_bb);
 	}
 
-      scale = build_int_cst (scaletype, gather_scale);
+      scale = build_int_cst (scaletype, gs_info.scale);
 
       prev_stmt_info = NULL;
       for (j = 0; j < ncopies; ++j)
@@ -1916,10 +2194,10 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 				       perm_mask, stmt, gsi);
 	  else if (j == 0)
 	    op = vec_oprnd0
-	      = vect_get_vec_def_for_operand (gather_off, stmt);
+	      = vect_get_vec_def_for_operand (gs_info.offset, stmt);
 	  else
 	    op = vec_oprnd0
-	      = vect_get_vec_def_for_stmt_copy (gather_dt, vec_oprnd0);
+	      = vect_get_vec_def_for_stmt_copy (gs_info.offset_dt, vec_oprnd0);
 
 	  if (!useless_type_conversion_p (idxtype, TREE_TYPE (op)))
 	    {
@@ -1961,7 +2239,7 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 	    }
 
 	  new_stmt
-	    = gimple_build_call (gather_decl, 5, mask_op, ptr, op, mask_op,
+	    = gimple_build_call (gs_info.decl, 5, mask_op, ptr, op, mask_op,
 				 scale);
 
 	  if (!useless_type_conversion_p (vectype, rettype))
@@ -2017,7 +2295,7 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
       gsi_replace (gsi, new_stmt, true);
       return true;
     }
-  else if (is_store)
+  else if (vls_type != VLS_LOAD)
     {
       tree vec_rhs = NULL_TREE, vec_mask = NULL_TREE;
       prev_stmt_info = NULL;
@@ -2126,7 +2404,7 @@ vectorizable_mask_load_store (gimple *stmt, gimple_stmt_iterator *gsi,
 	}
     }
 
-  if (!is_store)
+  if (vls_type == VLS_LOAD)
     {
       /* Ensure that even with -fno-tree-dce the scalar MASK_LOAD is removed
 	 from the IL.  */
@@ -5159,27 +5437,6 @@ ensure_base_align (stmt_vec_info stmt_info, struct data_reference *dr)
 }
 
 
-/* Given a vector type VECTYPE returns the VECTOR_CST mask that implements
-   reversal of the vector elements.  If that is impossible to do,
-   returns NULL.  */
-
-static tree
-perm_mask_for_reverse (tree vectype)
-{
-  int i, nunits;
-  unsigned char *sel;
-
-  nunits = TYPE_VECTOR_SUBPARTS (vectype);
-  sel = XALLOCAVEC (unsigned char, nunits);
-
-  for (i = 0; i < nunits; ++i)
-    sel[i] = nunits - 1 - i;
-
-  if (!can_vec_perm_p (TYPE_MODE (vectype), false, sel))
-    return NULL_TREE;
-  return vect_gen_perm_mask_checked (vectype, sel);
-}
-
 /* Function vectorizable_store.
 
    Check if STMT defines a non scalar data-ref (array/pointer/structure) that
@@ -5212,15 +5469,13 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   gimple *ptr_incr = NULL;
   int ncopies;
   int j;
-  gimple *next_stmt, *first_stmt = NULL;
-  bool grouped_store = false;
-  bool store_lanes_p = false;
+  gimple *next_stmt, *first_stmt;
+  bool grouped_store;
   unsigned int group_size, i;
   vec<tree> dr_chain = vNULL;
   vec<tree> oprnds = vNULL;
   vec<tree> result_chain = vNULL;
   bool inv_p;
-  bool negative = false;
   tree offset = NULL_TREE;
   vec<tree> vec_oprnds = vNULL;
   bool slp = (slp_node != NULL);
@@ -5228,13 +5483,11 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info);
   vec_info *vinfo = stmt_info->vinfo;
   tree aggr_type;
-  tree scatter_base = NULL_TREE, scatter_off = NULL_TREE;
-  tree scatter_off_vectype = NULL_TREE, scatter_decl = NULL_TREE;
-  int scatter_scale = 1;
-  enum vect_def_type scatter_idx_dt = vect_unknown_def_type;
+  gather_scatter_info gs_info;
   enum vect_def_type scatter_src_dt = vect_unknown_def_type;
   gimple *new_stmt;
   int vf;
+  vec_load_store_type vls_type;
 
   if (!STMT_VINFO_RELEVANT_P (stmt_info) && !bb_vinfo)
     return false;
@@ -5307,6 +5560,11 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       return false;
     }
 
+  if (dt == vect_constant_def || dt == vect_external_def)
+    vls_type = VLS_STORE_INVARIANT;
+  else
+    vls_type = VLS_STORE;
+
   if (rhs_vectype && !useless_type_conversion_p (vectype, rhs_vectype))
     return false;
 
@@ -5321,118 +5579,38 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   if (!STMT_VINFO_DATA_REF (stmt_info))
     return false;
 
-  if (!STMT_VINFO_STRIDED_P (stmt_info))
-    {
-      negative = 
-	  tree_int_cst_compare (loop && nested_in_vect_loop_p (loop, stmt)
-				? STMT_VINFO_DR_STEP (stmt_info) : DR_STEP (dr),
-				size_zero_node) < 0;
-      if (negative && ncopies > 1)
-	{
-	  if (dump_enabled_p ())
-	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-			     "multiple types with negative step.\n");
-	  return false;
-	}
-      if (negative)
-	{
-	  gcc_assert (!grouped_store);
-	  alignment_support_scheme = vect_supportable_dr_alignment (dr, false);
-	  if (alignment_support_scheme != dr_aligned
-	      && alignment_support_scheme != dr_unaligned_supported)
-	    {
-	      if (dump_enabled_p ())
-		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-				 "negative step but alignment required.\n");
-	      return false;
-	    }
-	  if (dt != vect_constant_def 
-	      && dt != vect_external_def
-	      && !perm_mask_for_reverse (vectype))
-	    {
-	      if (dump_enabled_p ())
-		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-				 "negative step and reversing not supported.\n");
-	      return false;
-	    }
-	}
-    }
-
-  if (STMT_VINFO_GROUPED_ACCESS (stmt_info))
-    {
-      grouped_store = true;
-      first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
-      group_size = GROUP_SIZE (vinfo_for_stmt (first_stmt));
-      if (!slp && !STMT_VINFO_STRIDED_P (stmt_info))
-	{
-	  if (vect_store_lanes_supported (vectype, group_size))
-	    store_lanes_p = true;
-	  else if (!vect_grouped_store_supported (vectype, group_size))
-	    return false;
-	}
-
-      if (first_stmt == stmt)
-	{
-          /* STMT is the leader of the group. Check the operands of all the
-             stmts of the group.  */
-          next_stmt = GROUP_NEXT_ELEMENT (stmt_info);
-          while (next_stmt)
-            {
-	      gcc_assert (gimple_assign_single_p (next_stmt));
-	      op = gimple_assign_rhs1 (next_stmt);
-              if (!vect_is_simple_use (op, vinfo, &def_stmt, &dt))
-                {
-                  if (dump_enabled_p ())
-                    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-                                     "use not simple.\n");
-                  return false;
-                }
-              next_stmt = GROUP_NEXT_ELEMENT (vinfo_for_stmt (next_stmt));
-            }
-        }
-    }
-
-  if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
-    {
-      gimple *def_stmt;
-      scatter_decl = vect_check_gather_scatter (stmt, loop_vinfo, &scatter_base,
-						&scatter_off, &scatter_scale);
-      gcc_assert (scatter_decl);
-      if (!vect_is_simple_use (scatter_off, vinfo, &def_stmt, &scatter_idx_dt,
-			       &scatter_off_vectype))
-	{
-	  if (dump_enabled_p ())
-	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-                             "scatter index use not simple.");
-	  return false;
-	}
-    }
+  vect_memory_access_type memory_access_type;
+  if (!get_load_store_type (stmt, vectype, slp, vls_type, ncopies,
+			    &memory_access_type, &gs_info))
+    return false;
 
   if (!vec_stmt) /* transformation not required.  */
     {
+      STMT_VINFO_MEMORY_ACCESS_TYPE (stmt_info) = memory_access_type;
       STMT_VINFO_TYPE (stmt_info) = store_vec_info_type;
       /* The SLP costs are calculated during SLP analysis.  */
       if (!PURE_SLP_STMT (stmt_info))
-	vect_model_store_cost (stmt_info, ncopies, store_lanes_p, dt,
+	vect_model_store_cost (stmt_info, ncopies, memory_access_type, dt,
 			       NULL, NULL, NULL);
       return true;
     }
+  gcc_assert (memory_access_type == STMT_VINFO_MEMORY_ACCESS_TYPE (stmt_info));
 
   /** Transform.  **/
 
   ensure_base_align (stmt_info, dr);
 
-  if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
+  if (memory_access_type == VMAT_GATHER_SCATTER)
     {
       tree vec_oprnd0 = NULL_TREE, vec_oprnd1 = NULL_TREE, op, src;
-      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (scatter_decl));
+      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (gs_info.decl));
       tree rettype, srctype, ptrtype, idxtype, masktype, scaletype;
       tree ptr, mask, var, scale, perm_mask = NULL_TREE;
       edge pe = loop_preheader_edge (loop);
       gimple_seq seq;
       basic_block new_bb;
       enum { NARROW, NONE, WIDEN } modifier;
-      int scatter_off_nunits = TYPE_VECTOR_SUBPARTS (scatter_off_vectype);
+      int scatter_off_nunits = TYPE_VECTOR_SUBPARTS (gs_info.offset_vectype);
 
       if (nunits == (unsigned int) scatter_off_nunits)
 	modifier = NONE;
@@ -5444,7 +5622,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	  for (i = 0; i < (unsigned int) scatter_off_nunits; ++i)
 	    sel[i] = i | nunits;
 
-	  perm_mask = vect_gen_perm_mask_checked (scatter_off_vectype, sel);
+	  perm_mask = vect_gen_perm_mask_checked (gs_info.offset_vectype, sel);
 	  gcc_assert (perm_mask != NULL_TREE);
 	}
       else if (nunits == (unsigned int) scatter_off_nunits * 2)
@@ -5462,7 +5640,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       else
 	gcc_unreachable ();
 
-      rettype = TREE_TYPE (TREE_TYPE (scatter_decl));
+      rettype = TREE_TYPE (TREE_TYPE (gs_info.decl));
       ptrtype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
       masktype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
       idxtype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
@@ -5472,7 +5650,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       gcc_checking_assert (TREE_CODE (masktype) == INTEGER_TYPE
 			   && TREE_CODE (rettype) == VOID_TYPE);
 
-      ptr = fold_convert (ptrtype, scatter_base);
+      ptr = fold_convert (ptrtype, gs_info.base);
       if (!is_gimple_min_invariant (ptr))
 	{
 	  ptr = force_gimple_operand (ptr, &seq, true, NULL_TREE);
@@ -5485,7 +5663,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       mask = build_int_cst (masktype, -1);
       mask = vect_init_vector (stmt, mask, masktype, NULL);
 
-      scale = build_int_cst (scaletype, scatter_scale);
+      scale = build_int_cst (scaletype, gs_info.scale);
 
       prev_stmt_info = NULL;
       for (j = 0; j < ncopies; ++j)
@@ -5495,7 +5673,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	      src = vec_oprnd1
 		= vect_get_vec_def_for_operand (gimple_assign_rhs1 (stmt), stmt);
 	      op = vec_oprnd0
-		= vect_get_vec_def_for_operand (scatter_off, stmt);
+		= vect_get_vec_def_for_operand (gs_info.offset, stmt);
 	    }
 	  else if (modifier != NONE && (j & 1))
 	    {
@@ -5511,7 +5689,8 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 		  src = permute_vec_elements (vec_oprnd1, vec_oprnd1, perm_mask,
 					      stmt, gsi);
 		  op = vec_oprnd0
-		    = vect_get_vec_def_for_stmt_copy (scatter_idx_dt, vec_oprnd0);
+		    = vect_get_vec_def_for_stmt_copy (gs_info.offset_dt,
+						      vec_oprnd0);
 		}
 	      else
 		gcc_unreachable ();
@@ -5521,7 +5700,8 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	      src = vec_oprnd1
 		= vect_get_vec_def_for_stmt_copy (scatter_src_dt, vec_oprnd1);
 	      op = vec_oprnd0
-		= vect_get_vec_def_for_stmt_copy (scatter_idx_dt, vec_oprnd0);
+		= vect_get_vec_def_for_stmt_copy (gs_info.offset_dt,
+						  vec_oprnd0);
 	    }
 
 	  if (!useless_type_conversion_p (srctype, TREE_TYPE (src)))
@@ -5547,7 +5727,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	    }
 
 	  new_stmt
-	    = gimple_build_call (scatter_decl, 5, ptr, mask, op, src, scale);
+	    = gimple_build_call (gs_info.decl, 5, ptr, mask, op, src, scale);
 
 	  vect_finish_stmt_generation (stmt, new_stmt, gsi);
 
@@ -5560,8 +5740,10 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       return true;
     }
 
+  grouped_store = STMT_VINFO_GROUPED_ACCESS (stmt_info);
   if (grouped_store)
     {
+      first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
       first_dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt));
       group_size = GROUP_SIZE (vinfo_for_stmt (first_stmt));
 
@@ -5607,7 +5789,8 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
     dump_printf_loc (MSG_NOTE, vect_location,
                      "transform store. ncopies = %d\n", ncopies);
 
-  if (STMT_VINFO_STRIDED_P (stmt_info))
+  if (memory_access_type == VMAT_ELEMENTWISE
+      || memory_access_type == VMAT_STRIDED_SLP)
     {
       gimple_stmt_iterator incr_gsi;
       bool insert_after;
@@ -5799,14 +5982,15 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   gcc_assert (alignment_support_scheme);
   /* Targets with store-lane instructions must not require explicit
      realignment.  */
-  gcc_assert (!store_lanes_p
+  gcc_assert (memory_access_type != VMAT_LOAD_STORE_LANES
 	      || alignment_support_scheme == dr_aligned
 	      || alignment_support_scheme == dr_unaligned_supported);
 
-  if (negative)
+  if (memory_access_type == VMAT_CONTIGUOUS_DOWN
+      || memory_access_type == VMAT_CONTIGUOUS_REVERSE)
     offset = size_int (-TYPE_VECTOR_SUBPARTS (vectype) + 1);
 
-  if (store_lanes_p)
+  if (memory_access_type == VMAT_LOAD_STORE_LANES)
     aggr_type = build_array_type_nelts (elem_type, vec_num * nunits);
   else
     aggr_type = vectype;
@@ -5944,7 +6128,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 					   TYPE_SIZE_UNIT (aggr_type));
 	}
 
-      if (store_lanes_p)
+      if (memory_access_type == VMAT_LOAD_STORE_LANES)
 	{
 	  tree vec_array;
 
@@ -6025,9 +6209,7 @@ vectorizable_store (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 		set_ptr_info_alignment (get_ptr_info (dataref_ptr), align,
 					misalign);
 
-	      if (negative
-		  && dt != vect_constant_def 
-		  && dt != vect_external_def)
+	      if (memory_access_type == VMAT_CONTIGUOUS_REVERSE)
 		{
 		  tree perm_mask = perm_mask_for_reverse (vectype);
 		  tree perm_dest 
@@ -6228,11 +6410,9 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   gphi *phi = NULL;
   vec<tree> dr_chain = vNULL;
   bool grouped_load = false;
-  bool load_lanes_p = false;
   gimple *first_stmt;
   gimple *first_stmt_for_drptr = NULL;
   bool inv_p;
-  bool negative = false;
   bool compute_in_loop = false;
   struct loop *at_loop;
   int vec_num;
@@ -6242,10 +6422,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info);
   int vf;
   tree aggr_type;
-  tree gather_base = NULL_TREE, gather_off = NULL_TREE;
-  tree gather_off_vectype = NULL_TREE, gather_decl = NULL_TREE;
-  int gather_scale = 1;
-  enum vect_def_type gather_dt = vect_unknown_def_type;
+  gather_scatter_info gs_info;
   vec_info *vinfo = stmt_info->vinfo;
 
   if (!STMT_VINFO_RELEVANT_P (stmt_info) && !bb_vinfo)
@@ -6340,62 +6517,12 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
     {
       grouped_load = true;
       /* FORNOW */
-      gcc_assert (!nested_in_vect_loop && !STMT_VINFO_GATHER_SCATTER_P (stmt_info));
+      gcc_assert (!nested_in_vect_loop);
+      gcc_assert (!STMT_VINFO_GATHER_SCATTER_P (stmt_info));
 
       first_stmt = GROUP_FIRST_ELEMENT (stmt_info);
       group_size = GROUP_SIZE (vinfo_for_stmt (first_stmt));
 
-      if (!slp && !STMT_VINFO_STRIDED_P (stmt_info))
-	{
-	  if (vect_load_lanes_supported (vectype, group_size))
-	    load_lanes_p = true;
-	  else if (!vect_grouped_load_supported (vectype, group_size))
-	    return false;
-	}
-
-      /* If this is single-element interleaving with an element distance
-         that leaves unused vector loads around punt - we at least create
-	 very sub-optimal code in that case (and blow up memory,
-	 see PR65518).  */
-      if (first_stmt == stmt
-	  && !GROUP_NEXT_ELEMENT (stmt_info))
-	{
-	  if (GROUP_SIZE (stmt_info) > TYPE_VECTOR_SUBPARTS (vectype))
-	    {
-	      if (dump_enabled_p ())
-		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-				 "single-element interleaving not supported "
-				 "for not adjacent vector loads\n");
-	      return false;
-	    }
-
-	  /* Single-element interleaving requires peeling for gaps.  */
-	  gcc_assert (GROUP_GAP (stmt_info));
-	}
-
-      /* If there is a gap in the end of the group or the group size cannot
-         be made a multiple of the vector element count then we access excess
-	 elements in the last iteration and thus need to peel that off.  */
-      if (loop_vinfo
-	  && ! STMT_VINFO_STRIDED_P (stmt_info)
-	  && (GROUP_GAP (vinfo_for_stmt (first_stmt)) != 0
-	      || (!slp && !load_lanes_p && vf % group_size != 0)))
-	{
-	  if (dump_enabled_p ())
-	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-			     "Data access with gaps requires scalar "
-			     "epilogue loop\n");
-	  if (loop->inner)
-	    {
-	      if (dump_enabled_p ())
-		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-				 "Peeling for outer loop is not supported\n");
-	      return false;
-	    }
-
-	  LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo) = true;
-	}
-
       if (slp && SLP_TREE_LOAD_PERMUTATION (slp_node).exists ())
 	slp_perm = true;
 
@@ -6440,78 +6567,27 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	}
     }
 
-
-  if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
-    {
-      gimple *def_stmt;
-      gather_decl = vect_check_gather_scatter (stmt, loop_vinfo, &gather_base,
-					       &gather_off, &gather_scale);
-      gcc_assert (gather_decl);
-      if (!vect_is_simple_use (gather_off, vinfo, &def_stmt, &gather_dt,
-			       &gather_off_vectype))
-	{
-	  if (dump_enabled_p ())
-	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-                             "gather index use not simple.\n");
-	  return false;
-	}
-    }
-  else if (STMT_VINFO_STRIDED_P (stmt_info))
-    ;
-  else
-    {
-      negative = tree_int_cst_compare (nested_in_vect_loop
-				       ? STMT_VINFO_DR_STEP (stmt_info)
-				       : DR_STEP (dr),
-				       size_zero_node) < 0;
-      if (negative && ncopies > 1)
-	{
-	  if (dump_enabled_p ())
-	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-                             "multiple types with negative step.\n");
-	  return false;
-	}
-
-      if (negative)
-	{
-	  if (grouped_load)
-	    {
-	      if (dump_enabled_p ())
-		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-				 "negative step for group load not supported"
-                                 "\n");
-	      return false;
-	    }
-	  alignment_support_scheme = vect_supportable_dr_alignment (dr, false);
-	  if (alignment_support_scheme != dr_aligned
-	      && alignment_support_scheme != dr_unaligned_supported)
-	    {
-              if (dump_enabled_p ())
-                dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-                                 "negative step but alignment required.\n");
-	      return false;
-	    }
-	  if (!perm_mask_for_reverse (vectype))
-	    {
-              if (dump_enabled_p ())
-                dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
-                                 "negative step and reversing not supported."
-                                 "\n");
-	      return false;
-	    }
-	}
-    }
+  vect_memory_access_type memory_access_type;
+  if (!get_load_store_type (stmt, vectype, slp, VLS_LOAD, ncopies,
+			    &memory_access_type, &gs_info))
+    return false;
 
   if (!vec_stmt) /* transformation not required.  */
     {
+      if (!slp)
+	STMT_VINFO_MEMORY_ACCESS_TYPE (stmt_info) = memory_access_type;
       STMT_VINFO_TYPE (stmt_info) = load_vec_info_type;
       /* The SLP costs are calculated during SLP analysis.  */
       if (!PURE_SLP_STMT (stmt_info))
-	vect_model_load_cost (stmt_info, ncopies, load_lanes_p,
+	vect_model_load_cost (stmt_info, ncopies, memory_access_type,
 			      NULL, NULL, NULL);
       return true;
     }
 
+  if (!slp)
+    gcc_assert (memory_access_type
+		== STMT_VINFO_MEMORY_ACCESS_TYPE (stmt_info));
+
   if (dump_enabled_p ())
     dump_printf_loc (MSG_NOTE, vect_location,
                      "transform load. ncopies = %d\n", ncopies);
@@ -6520,17 +6596,17 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 
   ensure_base_align (stmt_info, dr);
 
-  if (STMT_VINFO_GATHER_SCATTER_P (stmt_info))
+  if (memory_access_type == VMAT_GATHER_SCATTER)
     {
       tree vec_oprnd0 = NULL_TREE, op;
-      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (gather_decl));
+      tree arglist = TYPE_ARG_TYPES (TREE_TYPE (gs_info.decl));
       tree rettype, srctype, ptrtype, idxtype, masktype, scaletype;
       tree ptr, mask, var, scale, merge, perm_mask = NULL_TREE, prev_res = NULL_TREE;
       edge pe = loop_preheader_edge (loop);
       gimple_seq seq;
       basic_block new_bb;
       enum { NARROW, NONE, WIDEN } modifier;
-      int gather_off_nunits = TYPE_VECTOR_SUBPARTS (gather_off_vectype);
+      int gather_off_nunits = TYPE_VECTOR_SUBPARTS (gs_info.offset_vectype);
 
       if (nunits == gather_off_nunits)
 	modifier = NONE;
@@ -6542,7 +6618,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	  for (i = 0; i < gather_off_nunits; ++i)
 	    sel[i] = i | nunits;
 
-	  perm_mask = vect_gen_perm_mask_checked (gather_off_vectype, sel);
+	  perm_mask = vect_gen_perm_mask_checked (gs_info.offset_vectype, sel);
 	}
       else if (nunits == gather_off_nunits * 2)
 	{
@@ -6559,7 +6635,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       else
 	gcc_unreachable ();
 
-      rettype = TREE_TYPE (TREE_TYPE (gather_decl));
+      rettype = TREE_TYPE (TREE_TYPE (gs_info.decl));
       srctype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
       ptrtype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
       idxtype = TREE_VALUE (arglist); arglist = TREE_CHAIN (arglist);
@@ -6569,7 +6645,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 
       vec_dest = vect_create_destination_var (scalar_dest, vectype);
 
-      ptr = fold_convert (ptrtype, gather_base);
+      ptr = fold_convert (ptrtype, gs_info.base);
       if (!is_gimple_min_invariant (ptr))
 	{
 	  ptr = force_gimple_operand (ptr, &seq, true, NULL_TREE);
@@ -6601,7 +6677,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       else
 	gcc_unreachable ();
 
-      scale = build_int_cst (scaletype, gather_scale);
+      scale = build_int_cst (scaletype, gs_info.scale);
 
       if (TREE_CODE (TREE_TYPE (rettype)) == INTEGER_TYPE)
 	merge = build_int_cst (TREE_TYPE (rettype), 0);
@@ -6627,10 +6703,10 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 				       perm_mask, stmt, gsi);
 	  else if (j == 0)
 	    op = vec_oprnd0
-	      = vect_get_vec_def_for_operand (gather_off, stmt);
+	      = vect_get_vec_def_for_operand (gs_info.offset, stmt);
 	  else
 	    op = vec_oprnd0
-	      = vect_get_vec_def_for_stmt_copy (gather_dt, vec_oprnd0);
+	      = vect_get_vec_def_for_stmt_copy (gs_info.offset_dt, vec_oprnd0);
 
 	  if (!useless_type_conversion_p (idxtype, TREE_TYPE (op)))
 	    {
@@ -6645,7 +6721,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	    }
 
 	  new_stmt
-	    = gimple_build_call (gather_decl, 5, merge, ptr, op, mask, scale);
+	    = gimple_build_call (gs_info.decl, 5, merge, ptr, op, mask, scale);
 
 	  if (!useless_type_conversion_p (vectype, rettype))
 	    {
@@ -6687,7 +6763,9 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 	}
       return true;
     }
-  else if (STMT_VINFO_STRIDED_P (stmt_info))
+
+  if (memory_access_type == VMAT_ELEMENTWISE
+      || memory_access_type == VMAT_STRIDED_SLP)
     {
       gimple_stmt_iterator incr_gsi;
       bool insert_after;
@@ -6754,26 +6832,23 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       int lnel = 1;
       tree ltype = TREE_TYPE (vectype);
       auto_vec<tree> dr_chain;
-      if (slp)
+      if (memory_access_type == VMAT_STRIDED_SLP)
 	{
-	  if (group_size < nunits
-	      && nunits % group_size == 0)
+	  nloads = nunits / group_size;
+	  if (group_size < nunits)
 	    {
-	      nloads = nunits / group_size;
 	      lnel = group_size;
 	      ltype = build_vector_type (TREE_TYPE (vectype), group_size);
-	      ltype = build_aligned_type (ltype,
-					  TYPE_ALIGN (TREE_TYPE (vectype)));
 	    }
-	  else if (group_size >= nunits
-		   && group_size % nunits == 0)
+	  else
 	    {
-	      nloads = 1;
 	      lnel = nunits;
 	      ltype = vectype;
-	      ltype = build_aligned_type (ltype,
-					  TYPE_ALIGN (TREE_TYPE (vectype)));
 	    }
+	  ltype = build_aligned_type (ltype, TYPE_ALIGN (TREE_TYPE (vectype)));
+	}
+      if (slp)
+	{
 	  /* For SLP permutation support we need to load the whole group,
 	     not only the number of vector stmts the permutation result
 	     fits in.  */
@@ -6905,7 +6980,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   gcc_assert (alignment_support_scheme);
   /* Targets with load-lane instructions must not require explicit
      realignment.  */
-  gcc_assert (!load_lanes_p
+  gcc_assert (memory_access_type != VMAT_LOAD_STORE_LANES
 	      || alignment_support_scheme == dr_aligned
 	      || alignment_support_scheme == dr_unaligned_supported);
 
@@ -7037,10 +7112,10 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
   else
     at_loop = loop;
 
-  if (negative)
+  if (memory_access_type == VMAT_CONTIGUOUS_REVERSE)
     offset = size_int (-TYPE_VECTOR_SUBPARTS (vectype) + 1);
 
-  if (load_lanes_p)
+  if (memory_access_type == VMAT_LOAD_STORE_LANES)
     aggr_type = build_array_type_nelts (elem_type, vec_num * nunits);
   else
     aggr_type = vectype;
@@ -7103,7 +7178,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
       if (grouped_load || slp_perm)
 	dr_chain.create (vec_num);
 
-      if (load_lanes_p)
+      if (memory_access_type == VMAT_LOAD_STORE_LANES)
 	{
 	  tree vec_array;
 
@@ -7326,7 +7401,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
 		    }
 		}
 
-	      if (negative)
+	      if (memory_access_type == VMAT_CONTIGUOUS_REVERSE)
 		{
 		  tree perm_mask = perm_mask_for_reverse (vectype);
 		  new_temp = permute_vec_elements (new_temp, new_temp,
@@ -7373,7 +7448,7 @@ vectorizable_load (gimple *stmt, gimple_stmt_iterator *gsi, gimple **vec_stmt,
         {
           if (grouped_load)
   	    {
-	      if (!load_lanes_p)
+	      if (memory_access_type != VMAT_LOAD_STORE_LANES)
 		vect_transform_grouped_load (stmt, dr_chain, group_size, gsi);
 	      *vec_stmt = STMT_VINFO_VEC_STMT (stmt_info);
 	    }
@@ -7858,12 +7933,14 @@ vectorizable_comparison (gimple *stmt, gimple_stmt_iterator *gsi,
 	  bitop1 = BIT_NOT_EXPR;
 	  bitop2 = BIT_AND_EXPR;
 	  std::swap (rhs1, rhs2);
+	  std::swap (dts[0], dts[1]);
 	}
       else if (code == LE_EXPR)
 	{
 	  bitop1 = BIT_NOT_EXPR;
 	  bitop2 = BIT_IOR_EXPR;
 	  std::swap (rhs1, rhs2);
+	  std::swap (dts[0], dts[1]);
 	}
       else
 	{
diff --git a/gcc/tree-vectorizer.c b/gcc/tree-vectorizer.c
index 26698135f54..9fbd1836ecb 100644
--- a/gcc/tree-vectorizer.c
+++ b/gcc/tree-vectorizer.c
@@ -204,6 +204,10 @@ adjust_simduid_builtins (hash_table<simduid_to_vf> *htab)
 	  gcc_assert (TREE_CODE (arg) == SSA_NAME);
 	  simduid_to_vf *p = NULL, data;
 	  data.simduid = DECL_UID (SSA_NAME_VAR (arg));
+	  /* Need to nullify loop safelen field since it's value is not
+	     valid after transformation.  */
+	  if (bb->loop_father && bb->loop_father->safelen > 0)
+	    bb->loop_father->safelen = 0;
 	  if (htab)
 	    {
 	      p = htab->find (&data);
diff --git a/gcc/tree-vectorizer.h b/gcc/tree-vectorizer.h
index f15672ffa32..2cfb72a6fa3 100644
--- a/gcc/tree-vectorizer.h
+++ b/gcc/tree-vectorizer.h
@@ -481,6 +481,45 @@ enum slp_vect_type {
   hybrid
 };
 
+/* Describes how we're going to vectorize an individual load or store,
+   or a group of loads or stores.  */
+enum vect_memory_access_type {
+  /* An access to an invariant address.  This is used only for loads.  */
+  VMAT_INVARIANT,
+
+  /* A simple contiguous access.  */
+  VMAT_CONTIGUOUS,
+
+  /* A contiguous access that goes down in memory rather than up,
+     with no additional permutation.  This is used only for stores
+     of invariants.  */
+  VMAT_CONTIGUOUS_DOWN,
+
+  /* A simple contiguous access in which the elements need to be permuted
+     after loading or before storing.  Only used for loop vectorization;
+     SLP uses separate permutes.  */
+  VMAT_CONTIGUOUS_PERMUTE,
+
+  /* A simple contiguous access in which the elements need to be reversed
+     after loading or before storing.  */
+  VMAT_CONTIGUOUS_REVERSE,
+
+  /* An access that uses IFN_LOAD_LANES or IFN_STORE_LANES.  */
+  VMAT_LOAD_STORE_LANES,
+
+  /* An access in which each scalar element is loaded or stored
+     individually.  */
+  VMAT_ELEMENTWISE,
+
+  /* A hybrid of VMAT_CONTIGUOUS and VMAT_ELEMENTWISE, used for grouped
+     SLP accesses.  Each unrolled iteration uses a contiguous load
+     or store for the whole group, but the groups from separate iterations
+     are combined in the same way as for VMAT_ELEMENTWISE.  */
+  VMAT_STRIDED_SLP,
+
+  /* The access uses gather loads or scatter stores.  */
+  VMAT_GATHER_SCATTER
+};
 
 typedef struct data_reference *dr_p;
 
@@ -598,6 +637,10 @@ typedef struct _stmt_vec_info {
   /* True if this is an access with loop-invariant stride.  */
   bool strided_p;
 
+  /* Classifies how the load or store is going to be implemented
+     for loop vectorization.  */
+  vect_memory_access_type memory_access_type;
+
   /* For both loads and stores.  */
   bool simd_lane_access_p;
 
@@ -608,6 +651,28 @@ typedef struct _stmt_vec_info {
   unsigned int num_slp_uses;
 } *stmt_vec_info;
 
+/* Information about a gather/scatter call.  */
+struct gather_scatter_info {
+  /* The FUNCTION_DECL for the built-in gather/scatter function.  */
+  tree decl;
+
+  /* The loop-invariant base value.  */
+  tree base;
+
+  /* The original scalar offset, which is a non-loop-invariant SSA_NAME.  */
+  tree offset;
+
+  /* Each offset element should be multiplied by this amount before
+     being added to the base.  */
+  int scale;
+
+  /* The definition type for the vectorized offset.  */
+  enum vect_def_type offset_dt;
+
+  /* The type of the vectorized offset.  */
+  tree offset_vectype;
+};
+
 /* Access Functions.  */
 #define STMT_VINFO_TYPE(S)                 (S)->type
 #define STMT_VINFO_STMT(S)                 (S)->stmt
@@ -633,6 +698,7 @@ STMT_VINFO_BB_VINFO (stmt_vec_info stmt_vinfo)
 #define STMT_VINFO_DATA_REF(S)             (S)->data_ref_info
 #define STMT_VINFO_GATHER_SCATTER_P(S)	   (S)->gather_scatter_p
 #define STMT_VINFO_STRIDED_P(S)	   	   (S)->strided_p
+#define STMT_VINFO_MEMORY_ACCESS_TYPE(S)   (S)->memory_access_type
 #define STMT_VINFO_SIMD_LANE_ACCESS_P(S)   (S)->simd_lane_access_p
 #define STMT_VINFO_VEC_REDUCTION_TYPE(S)   (S)->v_reduc_type
 
@@ -980,12 +1046,12 @@ extern void free_stmt_vec_info (gimple *stmt);
 extern void vect_model_simple_cost (stmt_vec_info, int, enum vect_def_type *,
                                     stmt_vector_for_cost *,
 				    stmt_vector_for_cost *);
-extern void vect_model_store_cost (stmt_vec_info, int, bool,
+extern void vect_model_store_cost (stmt_vec_info, int, vect_memory_access_type,
 				   enum vect_def_type, slp_tree,
 				   stmt_vector_for_cost *,
 				   stmt_vector_for_cost *);
-extern void vect_model_load_cost (stmt_vec_info, int, bool, slp_tree,
-				  stmt_vector_for_cost *,
+extern void vect_model_load_cost (stmt_vec_info, int, vect_memory_access_type,
+				  slp_tree, stmt_vector_for_cost *,
 				  stmt_vector_for_cost *);
 extern unsigned record_stmt_cost (stmt_vector_for_cost *, int,
 				  enum vect_cost_for_stmt, stmt_vec_info,
@@ -1031,8 +1097,8 @@ extern bool vect_verify_datarefs_alignment (loop_vec_info);
 extern bool vect_slp_analyze_and_verify_instance_alignment (slp_instance);
 extern bool vect_analyze_data_ref_accesses (vec_info *);
 extern bool vect_prune_runtime_alias_test_list (loop_vec_info);
-extern tree vect_check_gather_scatter (gimple *, loop_vec_info, tree *, tree *,
-				       int *);
+extern bool vect_check_gather_scatter (gimple *, loop_vec_info,
+				       gather_scatter_info *);
 extern bool vect_analyze_data_refs (vec_info *, int *);
 extern tree vect_create_data_ref_ptr (gimple *, tree, struct loop *, tree,
 				      tree *, gimple_stmt_iterator *,
@@ -1043,7 +1109,7 @@ extern tree bump_vector_ptr (tree, gimple *, gimple_stmt_iterator *, gimple *,
 extern tree vect_create_destination_var (tree, tree);
 extern bool vect_grouped_store_supported (tree, unsigned HOST_WIDE_INT);
 extern bool vect_store_lanes_supported (tree, unsigned HOST_WIDE_INT);
-extern bool vect_grouped_load_supported (tree, unsigned HOST_WIDE_INT);
+extern bool vect_grouped_load_supported (tree, bool, unsigned HOST_WIDE_INT);
 extern bool vect_load_lanes_supported (tree, unsigned HOST_WIDE_INT);
 extern void vect_permute_store_chain (vec<tree> ,unsigned int, gimple *,
                                     gimple_stmt_iterator *, vec<tree> *);
diff --git a/gcc/tree.c b/gcc/tree.c
index bc60190b339..22951118e4c 100644
--- a/gcc/tree.c
+++ b/gcc/tree.c
@@ -5009,7 +5009,7 @@ attribute_value_equal (const_tree attr1, const_tree attr2)
       && TREE_CODE (TREE_VALUE (attr2)) == TREE_LIST)
     {
       /* Handle attribute format.  */
-      if (is_attribute_p ("format", TREE_PURPOSE (attr1)))
+      if (is_attribute_p ("format", get_attribute_name (attr1)))
 	{
 	  attr1 = TREE_VALUE (attr1);
 	  attr2 = TREE_VALUE (attr2);
diff --git a/gcc/var-tracking.c b/gcc/var-tracking.c
index 9f09d30b1f9..5d09879bccd 100644
--- a/gcc/var-tracking.c
+++ b/gcc/var-tracking.c
@@ -926,7 +926,7 @@ struct adjust_mem_data
   bool store;
   machine_mode mem_mode;
   HOST_WIDE_INT stack_adjust;
-  rtx_expr_list *side_effects;
+  auto_vec<rtx> side_effects;
 };
 
 /* Helper for adjust_mems.  Return true if X is suitable for
@@ -1072,9 +1072,7 @@ adjust_mems (rtx loc, const_rtx old_rtx, void *data)
       amd->store = false;
       tem = simplify_replace_fn_rtx (tem, old_rtx, adjust_mems, data);
       amd->store = store_save;
-      amd->side_effects = alloc_EXPR_LIST (0,
-					   gen_rtx_SET (XEXP (loc, 0), tem),
-					   amd->side_effects);
+      amd->side_effects.safe_push (gen_rtx_SET (XEXP (loc, 0), tem));
       return addr;
     case PRE_MODIFY:
       addr = XEXP (loc, 1);
@@ -1088,9 +1086,7 @@ adjust_mems (rtx loc, const_rtx old_rtx, void *data)
       tem = simplify_replace_fn_rtx (XEXP (loc, 1), old_rtx,
 				     adjust_mems, data);
       amd->store = store_save;
-      amd->side_effects = alloc_EXPR_LIST (0,
-					   gen_rtx_SET (XEXP (loc, 0), tem),
-					   amd->side_effects);
+      amd->side_effects.safe_push (gen_rtx_SET (XEXP (loc, 0), tem));
       return addr;
     case SUBREG:
       /* First try without delegitimization of whole MEMs and
@@ -1184,7 +1180,6 @@ adjust_mem_stores (rtx loc, const_rtx expr, void *data)
 static void
 adjust_insn (basic_block bb, rtx_insn *insn)
 {
-  struct adjust_mem_data amd;
   rtx set;
 
 #ifdef HAVE_window_save
@@ -1213,9 +1208,9 @@ adjust_insn (basic_block bb, rtx_insn *insn)
     }
 #endif
 
+  adjust_mem_data amd;
   amd.mem_mode = VOIDmode;
   amd.stack_adjust = -VTI (bb)->out.stack_adjust;
-  amd.side_effects = NULL;
 
   amd.store = true;
   note_stores (PATTERN (insn), adjust_mem_stores, &amd);
@@ -1281,10 +1276,10 @@ adjust_insn (basic_block bb, rtx_insn *insn)
 	validate_change (NULL_RTX, &SET_SRC (set), XEXP (note, 0), true);
     }
 
-  if (amd.side_effects)
+  if (!amd.side_effects.is_empty ())
     {
-      rtx *pat, new_pat, s;
-      int i, oldn, newn;
+      rtx *pat, new_pat;
+      int i, oldn;
 
       pat = &PATTERN (insn);
       if (GET_CODE (*pat) == COND_EXEC)
@@ -1293,17 +1288,18 @@ adjust_insn (basic_block bb, rtx_insn *insn)
 	oldn = XVECLEN (*pat, 0);
       else
 	oldn = 1;
-      for (s = amd.side_effects, newn = 0; s; newn++)
-	s = XEXP (s, 1);
+      unsigned int newn = amd.side_effects.length ();
       new_pat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (oldn + newn));
       if (GET_CODE (*pat) == PARALLEL)
 	for (i = 0; i < oldn; i++)
 	  XVECEXP (new_pat, 0, i) = XVECEXP (*pat, 0, i);
       else
 	XVECEXP (new_pat, 0, 0) = *pat;
-      for (s = amd.side_effects, i = oldn; i < oldn + newn; i++, s = XEXP (s, 1))
-	XVECEXP (new_pat, 0, i) = XEXP (s, 0);
-      free_EXPR_LIST_list (&amd.side_effects);
+
+      rtx effect;
+      unsigned int j;
+      FOR_EACH_VEC_ELT_REVERSE (amd.side_effects, j, effect)
+	XVECEXP (new_pat, 0, j + oldn) = effect;
       validate_change (NULL_RTX, pat, new_pat, true);
     }
 }
@@ -6335,11 +6331,10 @@ prepare_call_arguments (basic_block bb, rtx_insn *insn)
 		struct adjust_mem_data amd;
 		amd.mem_mode = VOIDmode;
 		amd.stack_adjust = -VTI (bb)->out.stack_adjust;
-		amd.side_effects = NULL;
 		amd.store = true;
 		mem = simplify_replace_fn_rtx (mem, NULL_RTX, adjust_mems,
 					       &amd);
-		gcc_assert (amd.side_effects == NULL_RTX);
+		gcc_assert (amd.side_effects.is_empty ());
 	      }
 	    val = cselib_lookup (mem, GET_MODE (mem), 0, VOIDmode);
 	    if (val && cselib_preserved_value_p (val))
diff --git a/gcc/varasm.c b/gcc/varasm.c
index de8bcd6f20c..6a8fb81e41f 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -1150,7 +1150,18 @@ get_variable_section (tree decl, bool prefer_noswitch_p)
 
   resolve_unique_section (decl, reloc, flag_data_sections);
   if (IN_NAMED_SECTION (decl))
-    return get_named_section (decl, NULL, reloc);
+    {
+      section *sect = get_named_section (decl, NULL, reloc);
+
+      if ((sect->common.flags & SECTION_BSS) && !bss_initializer_p (decl))
+	{
+	  error_at (DECL_SOURCE_LOCATION (decl),
+		    "only zero initializers are allowed in section %qs",
+		    sect->named.name);
+	  DECL_INITIAL (decl) = error_mark_node;
+	}
+      return sect;
+    }
 
   if (ADDR_SPACE_GENERIC_P (as)
       && !DECL_THREAD_LOCAL_P (decl)
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index db5616ab720..b6f830fee82 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,52 @@
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
+	and ARMv5t* rather than for a fixed list of architectures.
+
+2016-07-07  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* config/arm/bpabi-v6m.S: Clarify what architectures is the
+	implementation suitable for.
+	* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
+	for all Thumb-1 only targets.
+	(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
+	(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
+	__ARM_ARCH_6M__.
+	(EQUIV): Likewise.
+	(ARM_FUNC_ALIAS): Likewise.
+	(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
+	version.
+	(modsi3): Likewise.
+	(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
+	(clzdi2): Likewise.
+	(ctzsi2): Likewise.
+	(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
+	__ARM_ARCH_6M__ in guard for checking whether it is defined.
+	(final includes): Test for NOT_ISA_TARGET_32BIT rather than
+	__ARM_ARCH_6M__ and add comment to indicate the connection between
+	this condition and the one in gcc/config/arm/elf.h.
+	* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
+	__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
+	* config/arm/t-softfp: Likewise.
+
+2016-07-06  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>
+
+	* libgcc2.c (SYMBOL__MAIN): Remove checks for
+	CTOR_LISTS_DEFINED_EXTERNALLY.
+
+2016-06-28  Walter Lee  <walt@tilera.com>
+
+	* config/tilepro/atomic.h: Do not include arch/spr_def.h and
+	asm/unistd.h.
+	(SPR_CMPEXCH_VALUE): Define for tilegx.
+	(__NR_FAST_cmpxchg): Define for tilepro.
+	(__NR_FAST_atomic_update): Define for tilepro.
+	(__NR_FAST_cmpxchg64): Define for tilepro.
+
 2016-06-23  Jakub Sejdak  <jakub.sejdak@phoesys.com>
 
    * config.host: Add suport for arm*-*-phoenix* targets.
diff --git a/libgcc/config/arm/bpabi-v6m.S b/libgcc/config/arm/bpabi-v6m.S
index 5d35aa6afca..27f33a4e8ce 100644
--- a/libgcc/config/arm/bpabi-v6m.S
+++ b/libgcc/config/arm/bpabi-v6m.S
@@ -1,4 +1,5 @@
-/* Miscellaneous BPABI functions.  ARMv6M implementation
+/* Miscellaneous BPABI functions.  Thumb-1 implementation, suitable for ARMv4T,
+   ARMv6-M and ARMv8-M Baseline like ISA variants.
 
    Copyright (C) 2006-2016 Free Software Foundation, Inc.
    Contributed by CodeSourcery.
diff --git a/libgcc/config/arm/lib1funcs.S b/libgcc/config/arm/lib1funcs.S
index 375a5135110..96e206ee542 100644
--- a/libgcc/config/arm/lib1funcs.S
+++ b/libgcc/config/arm/lib1funcs.S
@@ -108,7 +108,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 # define __ARM_ARCH__ 7
 #endif
 
-#if defined(__ARM_ARCH_8A__)
+#if defined(__ARM_ARCH_8A__) || defined(__ARM_ARCH_8M_BASE__) \
+	|| defined(__ARM_ARCH_8M_MAIN__)
 # define __ARM_ARCH__ 8
 #endif
 
@@ -124,10 +125,14 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
      && !defined(__thumb2__)		\
      && (!defined(__THUMB_INTERWORK__)	\
 	 || defined (__OPTIMIZE_SIZE__)	\
-	 || defined(__ARM_ARCH_6M__)))
+	 || !__ARM_ARCH_ISA_ARM))
 # define __prefer_thumb__
 #endif
 
+#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
+#define NOT_ISA_TARGET_32BIT 1
+#endif
+
 /* How to return from a function call depends on the architecture variant.  */
 
 #if (__ARM_ARCH__ > 4) || defined(__ARM_ARCH_4T__)
@@ -305,7 +310,7 @@ LSYM(Lend_fde):
 
 #ifdef __ARM_EABI__
 .macro THUMB_LDIV0 name signed
-#if defined(__ARM_ARCH_6M__)
+#ifdef NOT_ISA_TARGET_32BIT
 	.ifc \signed, unsigned
 	cmp	r0, #0
 	beq	1f
@@ -478,7 +483,7 @@ _L__\name:
 
 #else /* !(__INTERWORKING_STUBS__ || __thumb2__) */
 
-#ifdef __ARM_ARCH_6M__
+#ifdef NOT_ISA_TARGET_32BIT
 #define EQUIV .thumb_set
 #else
 .macro	ARM_FUNC_START name sp_section=
@@ -510,7 +515,7 @@ SYM (__\name):
 #endif
 .endm
 
-#ifndef __ARM_ARCH_6M__
+#ifndef NOT_ISA_TARGET_32BIT
 .macro	ARM_FUNC_ALIAS new old
 	.globl	SYM (__\new)
 	EQUIV	SYM (__\new), SYM (__\old)
@@ -1054,7 +1059,7 @@ ARM_FUNC_START aeabi_uidivmod
 /* ------------------------------------------------------------------------ */
 #ifdef L_umodsi3
 
-#ifdef __ARM_ARCH_EXT_IDIV__
+#if defined(__ARM_ARCH_EXT_IDIV__) && __ARM_ARCH_ISA_THUMB != 1
 
 	ARM_FUNC_START umodsi3
 
@@ -1240,7 +1245,7 @@ ARM_FUNC_START aeabi_idivmod
 /* ------------------------------------------------------------------------ */
 #ifdef L_modsi3
 
-#if defined(__ARM_ARCH_EXT_IDIV__)
+#if defined(__ARM_ARCH_EXT_IDIV__) && __ARM_ARCH_ISA_THUMB != 1
 
 	ARM_FUNC_START modsi3
 
@@ -1508,14 +1513,15 @@ LSYM(Lover12):
 
 #endif /* __symbian__ */
 
-#if ((__ARM_ARCH__ > 5) && !defined(__ARM_ARCH_6M__)) \
-    || defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) \
-    || defined(__ARM_ARCH_5TEJ__)
+#if (__ARM_ARCH_ISA_THUMB == 2	\
+     || (__ARM_ARCH_ISA_ARM	\
+	 && (__ARM_ARCH__ > 5	\
+	     || (__ARM_ARCH__ == 5 && __ARM_ARCH_ISA_THUMB))))
 #define HAVE_ARM_CLZ 1
 #endif
 
 #ifdef L_clzsi2
-#if defined(__ARM_ARCH_6M__)
+#ifdef NOT_ISA_TARGET_32BIT
 FUNC_START clzsi2
 	mov	r1, #28
 	mov	r3, #1
@@ -1576,7 +1582,7 @@ ARM_FUNC_START clzsi2
 #ifdef L_clzdi2
 #if !defined(HAVE_ARM_CLZ)
 
-# if defined(__ARM_ARCH_6M__)
+# ifdef NOT_ISA_TARGET_32BIT
 FUNC_START clzdi2
 	push	{r4, lr}
 # else
@@ -1601,7 +1607,7 @@ ARM_FUNC_START clzdi2
 	bl	__clzsi2
 # endif
 2:
-# if defined(__ARM_ARCH_6M__)
+# ifdef NOT_ISA_TARGET_32BIT
 	pop	{r4, pc}
 # else
 	RETLDM	r4
@@ -1623,7 +1629,7 @@ ARM_FUNC_START clzdi2
 #endif /* L_clzdi2 */
 
 #ifdef L_ctzsi2
-#if defined(__ARM_ARCH_6M__)
+#ifdef NOT_ISA_TARGET_32BIT
 FUNC_START ctzsi2
 	neg	r1, r0
 	and	r0, r0, r1
@@ -1738,7 +1744,7 @@ ARM_FUNC_START ctzsi2
 
 /* Don't bother with the old interworking routines for Thumb-2.  */
 /* ??? Maybe only omit these on "m" variants.  */
-#if !defined(__thumb2__) && !defined(__ARM_ARCH_6M__)
+#if !defined(__thumb2__) && __ARM_ARCH_ISA_ARM
 
 #if defined L_interwork_call_via_rX
 
@@ -1983,11 +1989,12 @@ LSYM(Lchange_\register):
 .endm
 
 #ifndef __symbian__
-#ifndef __ARM_ARCH_6M__
+/* The condition here must match the one in gcc/config/arm/elf.h.  */
+#ifndef NOT_ISA_TARGET_32BIT
 #include "ieee754-df.S"
 #include "ieee754-sf.S"
 #include "bpabi.S"
-#else /* __ARM_ARCH_6M__ */
+#else /* NOT_ISA_TARGET_32BIT */
 #include "bpabi-v6m.S"
-#endif /* __ARM_ARCH_6M__ */
+#endif /* NOT_ISA_TARGET_32BIT */
 #endif /* !__symbian__ */
diff --git a/libgcc/config/arm/libunwind.S b/libgcc/config/arm/libunwind.S
index a68b10ddce9..3d7e70181fa 100644
--- a/libgcc/config/arm/libunwind.S
+++ b/libgcc/config/arm/libunwind.S
@@ -58,7 +58,7 @@
 #endif
 #endif
 
-#ifdef __ARM_ARCH_6M__
+#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
 
 /* r0 points to a 16-word block.  Upload these values to the actual core
    state.  */
@@ -169,7 +169,7 @@ FUNC_START gnu_Unwind_Save_WMMXC
 	UNPREFIX \name
 .endm
 
-#else /* !__ARM_ARCH_6M__ */
+#else /* __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1 */
 
 /* r0 points to a 16-word block.  Upload these values to the actual core
    state.  */
@@ -351,7 +351,7 @@ ARM_FUNC_START gnu_Unwind_Save_WMMXC
 	UNPREFIX \name
 .endm
 
-#endif /* !__ARM_ARCH_6M__ */
+#endif /* __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1 */
 
 UNWIND_WRAPPER _Unwind_RaiseException 1
 UNWIND_WRAPPER _Unwind_Resume 1
diff --git a/libgcc/config/arm/t-softfp b/libgcc/config/arm/t-softfp
index 4ede438baf6..554ec9bc47b 100644
--- a/libgcc/config/arm/t-softfp
+++ b/libgcc/config/arm/t-softfp
@@ -1,2 +1,2 @@
-softfp_wrap_start := '\#ifdef __ARM_ARCH_6M__'
+softfp_wrap_start := '\#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1'
 softfp_wrap_end := '\#endif'
diff --git a/libgcc/config/tilepro/atomic.h b/libgcc/config/tilepro/atomic.h
index 78fa9a9df5d..6abe6e14362 100644
--- a/libgcc/config/tilepro/atomic.h
+++ b/libgcc/config/tilepro/atomic.h
@@ -93,9 +93,11 @@
 #endif
 
 #ifdef __tilegx__
-#include <arch/spr_def.h>
+#define SPR_CMPEXCH_VALUE 0x2780
 #else
-#include <asm/unistd.h>
+#define __NR_FAST_cmpxchg	-1
+#define __NR_FAST_atomic_update	-2
+#define __NR_FAST_cmpxchg64	-3
 #endif
 
 
diff --git a/libgcc/libgcc2.c b/libgcc/libgcc2.c
index 6bc9a2f6c40..0a716bf7b8f 100644
--- a/libgcc/libgcc2.c
+++ b/libgcc/libgcc2.c
@@ -2309,8 +2309,7 @@ SYMBOL__MAIN (void)
    must be in the bss/common section.
 
    Long term no port should use those extensions.  But many still do.  */
-#if !defined(__LIBGCC_INIT_SECTION_ASM_OP__) \
-    && !defined(CTOR_LISTS_DEFINED_EXTERNALLY)
+#if !defined(__LIBGCC_INIT_SECTION_ASM_OP__)
 #if defined (TARGET_ASM_CONSTRUCTOR) || defined (USE_COLLECT2)
 func_ptr __CTOR_LIST__[2] = {0, 0};
 func_ptr __DTOR_LIST__[2] = {0, 0};
@@ -2318,6 +2317,6 @@ func_ptr __DTOR_LIST__[2] = {0, 0};
 func_ptr __CTOR_LIST__[2];
 func_ptr __DTOR_LIST__[2];
 #endif
-#endif /* no __LIBGCC_INIT_SECTION_ASM_OP__ and not CTOR_LISTS_DEFINED_EXTERNALLY */
+#endif /* no __LIBGCC_INIT_SECTION_ASM_OP__ */
 #endif /* L_ctors */
 #endif /* LIBGCC2_UNITS_PER_WORD <= MIN_UNITS_PER_WORD */
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 22049107af1..35e29c06776 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,14 @@
+2016-07-03  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR middle-end/71734
+	* testsuite/libgomp.fortran/pr71734-1.f90: New test.
+	* testsuite/libgomp.fortran/pr71734-2.f90: Likewise.
+
+2016-07-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR fortran/71717
+	* testsuite/libgomp.fortran/associate3.f90: New test.
+
 2016-06-17  Jakub Jelinek  <jakub@redhat.com>
 
 	* testsuite/libgomp.c++/target-21.C: New test.
diff --git a/libgomp/testsuite/libgomp.fortran/associate3.f90 b/libgomp/testsuite/libgomp.fortran/associate3.f90
new file mode 100644
index 00000000000..ec3d8dc33b9
--- /dev/null
+++ b/libgomp/testsuite/libgomp.fortran/associate3.f90
@@ -0,0 +1,20 @@
+! PR fortran/71717
+! { dg-do run }
+
+  type t
+    real, allocatable :: f(:)
+  end type
+  type (t) :: v
+  integer :: i, j
+  allocate (v%f(4))
+  v%f = 19.
+  i = 5
+  associate (u => v, k => i)
+  !$omp parallel do
+  do j = 1, 4
+    u%f(j) = 21.
+    if (j.eq.1) k = 7
+  end do
+  end associate
+  if (any (v%f(:).ne.21.) .or. i.ne.7) call abort
+end
diff --git a/libgomp/testsuite/libgomp.fortran/pr71734-1.f90 b/libgomp/testsuite/libgomp.fortran/pr71734-1.f90
new file mode 100644
index 00000000000..9b36a33ca2d
--- /dev/null
+++ b/libgomp/testsuite/libgomp.fortran/pr71734-1.f90
@@ -0,0 +1,6 @@
+! { dg-do run { target avx_runtime } }
+! { dg-additional-options "-msse2" }
+! The same as simd3.f90, but compiled with -msse2.  we run it only on
+! AVX machine where simd3.f90 is compiled with -mavx.
+
+include 'simd3.f90'
diff --git a/libgomp/testsuite/libgomp.fortran/pr71734-2.f90 b/libgomp/testsuite/libgomp.fortran/pr71734-2.f90
new file mode 100644
index 00000000000..2a84f26291c
--- /dev/null
+++ b/libgomp/testsuite/libgomp.fortran/pr71734-2.f90
@@ -0,0 +1,6 @@
+! { dg-do run { target avx_runtime } }
+! { dg-additional-options "-msse2" }
+! The same as simd4.f90, but compiled with -msse2.  we run it only on
+! AVX machine where simd4.f90 is compiled with -mavx.
+
+include 'simd4.f90'
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index c7e0b326ff8..0aee6800828 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,168 @@
+2016-07-10  Ville Voutilainen  <ville.voutilainen@gmail.com>
+
+	Implement std::optional.
+	* include/Makefile.am: Add optional to exported headers.
+	* include/Makefile.in: Likewise.
+	* include/std/optional: New.
+	* testsuite/20_util/optional/typedefs.cc: Likewise.
+	* testsuite/20_util/optional/relops/2.cc: Likewise.
+	* testsuite/20_util/optional/relops/3.cc: Likewise.
+	* testsuite/20_util/optional/relops/4.cc: Likewise.
+	* testsuite/20_util/optional/relops/5.cc: Likewise.
+	* testsuite/20_util/optional/relops/1.cc: Likewise.
+	* testsuite/20_util/optional/relops/6.cc: Likewise.
+	* testsuite/20_util/optional/nullopt.cc: Likewise.
+	* testsuite/20_util/optional/in_place.cc: Likewise.
+	* testsuite/20_util/optional/make_optional.cc: Likewise.
+	* testsuite/20_util/optional/assignment/2.cc: Likewise.
+	* testsuite/20_util/optional/assignment/3.cc: Likewise.
+	* testsuite/20_util/optional/assignment/4.cc: Likewise.
+	* testsuite/20_util/optional/assignment/5.cc: Likewise.
+	* testsuite/20_util/optional/assignment/1.cc: Likewise.
+	* testsuite/20_util/optional/assignment/6.cc: Likewise.
+	* testsuite/20_util/optional/cons/value_neg.cc: Likewise.
+	* testsuite/20_util/optional/cons/default.cc: Likewise.
+	* testsuite/20_util/optional/cons/move.cc: Likewise.
+	* testsuite/20_util/optional/cons/value.cc: Likewise.
+	* testsuite/20_util/optional/cons/copy.cc: Likewise.
+	* testsuite/20_util/optional/requirements.cc: Likewise.
+	* testsuite/20_util/optional/observers/2.cc: Likewise.
+	* testsuite/20_util/optional/observers/3.cc: Likewise.
+	* testsuite/20_util/optional/observers/4.cc: Likewise.
+	* testsuite/20_util/optional/observers/5.cc: Likewise.
+	* testsuite/20_util/optional/observers/1.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/relops/2.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/relops/3.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/relops/4.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/relops/5.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/relops/1.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/relops/6.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/nullopt.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/in_place.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/make_optional.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/cons/default.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/cons/value.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/observers/2.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/observers/3.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/observers/4.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/observers/5.cc: Likewise.
+	* testsuite/20_util/optional/constexpr/observers/1.cc: Likewise.
+	* testsuite/20_util/optional/swap/1.cc: Likewise.
+
+2016-07-08  Jonathan Wakely  <jwakely@redhat.com>
+
+	* testsuite/23_containers/vector/modifiers/insert/aliasing.cc: New.
+
+2016-07-07  Jonathan Wakely  <jwakely@redhat.com>
+
+	* doc/xml/manual/status_cxx2014.xml: Update LFTS status table.
+	* doc/html/*: Regenerate.
+
+2016-07-07  Ville Voutilainen  <ville.voutilainen@gmail.com>
+
+	Implement std::any.
+	* include/Makefile.am: Add any and c++17_warning.h to exported headers.
+	* include/Makefile.in: Likewise.
+	* include/std/any: New.
+	* testsuite/20_util/any/assign/1.cc: Likewise.
+	* testsuite/20_util/any/assign/2.cc: Likewise.
+	* testsuite/20_util/any/assign/self.cc: Likewise.
+	* testsuite/20_util/any/cons/1.cc: Likewise.
+	* testsuite/20_util/any/cons/2.cc: Likewise.
+	* testsuite/20_util/any/cons/aligned.cc: Likewise.
+	* testsuite/20_util/any/cons/nontrivial.cc: Likewise.
+	* testsuite/20_util/any/misc/any_cast.cc: Likewise.
+	* testsuite/20_util/any/misc/any_cast_neg.cc: Likewise.
+	* testsuite/20_util/any/misc/any_cast_no_rtti.cc: Likewise.
+	* testsuite/20_util/any/misc/swap.cc: Likewise.
+	* testsuite/20_util/any/modifiers/1.cc: Likewise.
+	* testsuite/20_util/any/observers/type.cc: Likewise.
+	* testsuite/20_util/any/typedefs.cc: Likewise.
+
+2016-07-06  Ville Voutilainen  <ville.voutilainen@gmail.com>
+
+	Add a new header for diagnosing the use of C++17 facilities
+	in pre-C++17 modes.
+	* include/bits/c++17_warning.h:	New.
+
+2016-07-06  Ville Voutilainen  <ville.voutilainen@gmail.com>
+
+	Implement LWG 2451, optional<T> should 'forward' T's
+	implicit conversions.
+	* include/experimental/optional (__is_optional_impl, __is_optional):
+	New.
+	(optional()): Make constexpr and default.
+	(optional(_Up&&), optional(const optional<_Up>&),
+	optional(optional<_Up>&& __t): New.
+	(operator=(_Up&&)): Constrain.
+	(operator=(const optional<_Up>&), operator=(optional<_Up>&&)): New.
+	* testsuite/experimental/optional/cons/value.cc:
+	Add tests for the functionality added by LWG 2451.
+	* testsuite/experimental/optional/cons/value_neg.cc: New.
+
+2016-07-05  Ville Voutilainen  <ville.voutilainen@gmail.com>
+
+	Implement LWG 2509,
+	any_cast doesn't work with rvalue reference targets and cannot
+	move with a value target.
+	* include/experimental/any (any(_ValueType&&)): Constrain and
+	add an overload that doesn't forward.
+	(any_cast(any&&)): Constrain and add an overload that moves.
+	* testsuite/experimental/any/misc/any_cast.cc: Add tests for
+	the functionality added by LWG 2509.
+
+2016-07-04  François Dumont  <fdumont@gcc.gnu.org>
+
+	* testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc:
+	New test.
+	* testsuite/23_containers/vector/modifiers/insert/self_insert.cc: New
+	test.
+
+2016-07-04  Jonathan Wakely  <jwakely@redhat.com>
+
+	* include/bits/stl_vector.h (emplace(const_iterator, _Args&&...)):
+	Define inline. Forward to _M_emplace_aux.
+	(insert(const_iterator, value_type&&)): Forward to _M_insert_rval.
+	(_M_insert_rval, _M_emplace_aux): Declare new functions.
+	(_Temporary_value): New RAII type using allocator to construct/destroy.
+	(_S_insert_aux_assign): Remove.
+	(_M_insert_aux): Make non-variadic.
+	* include/bits/vector.tcc (insert(const_iterator, const value_type&)):
+	Use _Temporary_value.
+	(emplace(const_iterator, _Args&&...)): Remove definition.
+	(_M_insert_rval, _M_emplace_aux): Define.
+	(_M_insert_aux): Make non-variadic, stop using _S_insert_aux_assign.
+	(_M_fill_insert): Use _Temporary_value.
+	* testsuite/23_containers/vector/allocator/construction.cc: New test.
+	* testsuite/23_containers/vector/modifiers/insert_vs_emplace.cc:
+	Adjust expected results for emplacing an lvalue with reallocation.
+	* testsuite/23_containers/vector/check_construct_destroy.cc: Adjust
+	expected results to account for construction/destruction of temporary
+	using allocator.
+	* testsuite/backward/hash_set/check_construct_destroy.cc: Likewise.
+
+2016-07-04  Ville Voutilainen  <ville.voutilainen@gmail.com>
+
+	PR libstdc++/71313
+	* src/filesystem/ops.cc (remove_all(const path&, error_code&)):
+	Call remove_all for children of a directory.
+	* testsuite/experimental/filesystem/operations/create_directories.cc:
+	Adjust.
+
+2016-07-02  François Dumont  <fdumont@gcc.gnu.org>
+
+	* testsuite/23_containers/array/tuple_interface/get_debug_neg.cc: Adjust
+	dg-error line numbers.
+	* testsuite/23_containers/array/tuple_interface/
+	tuple_element_debug_neg.cc: Likewise.
+	* testsuite/25_algorithms/lexicographical_compare/debug/
+	irreflexive_neg.cc: Remove.
+
+2016-06-30  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+	* testsuite/29_atomics/atomic/65913.cc: Require atomic-builtins rather
+	than specific target.
+
 2016-06-27  François Dumont  <fdumont@gcc.gnu.org>
 
 	PR libstdc++/71640
diff --git a/libstdc++-v3/doc/html/manual/backwards.html b/libstdc++-v3/doc/html/manual/backwards.html
index 0c210ca4bcb..bc21420c459 100644
--- a/libstdc++-v3/doc/html/manual/backwards.html
+++ b/libstdc++-v3/doc/html/manual/backwards.html
@@ -962,4 +962,4 @@ AC_DEFUN([AC_HEADER_UNORDERED_SET], [
       </em>. </span></p></div></div></div><div class="navfooter"><hr /><table width="100%" summary="Navigation footer"><tr><td width="40%" align="left"><a accesskey="p" href="api.html">Prev</a> </td><td width="20%" align="center"><a accesskey="u" href="appendix_porting.html">Up</a></td><td width="40%" align="right"> <a accesskey="n" href="appendix_free.html">Next</a></td></tr><tr><td width="40%" align="left" valign="top">API Evolution and Deprecation History </td><td width="20%" align="center"><a accesskey="h" href="../index.html">Home</a></td><td width="40%" align="right" valign="top"> Appendix C. 
   Free Software Needs Free Documentation
   
-</td></tr></table></div></body></html>
+</td></tr></table></div></body></html>
\ No newline at end of file
diff --git a/libstdc++-v3/doc/html/manual/status.html b/libstdc++-v3/doc/html/manual/status.html
index 8c5a7c998ae..18fc4da42dc 100644
--- a/libstdc++-v3/doc/html/manual/status.html
+++ b/libstdc++-v3/doc/html/manual/status.html
@@ -405,7 +405,7 @@ not in any particular release.
 	<a class="link" href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2013/n3655.pdf" target="_top">
 	  N3655
 	</a>
-      </td><td align="left">TransformationTraits Redux</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#C8B0B0"><td align="left">
+      </td><td align="left">TransformationTraits Redux</td><td align="left">Y</td><td align="left"> </td></tr><tr bgcolor="#B0B0B0"><td align="left">
 	<a class="link" href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2013/n3644.pdf" target="_top">
 	  N3644
 	</a>
@@ -433,15 +433,15 @@ not in any particular release.
 	<a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3915.pdf" target="_top">
 	  N3915
 	</a>
-      </td><td align="left">apply() call a function with arguments from a tuple</td><td align="left">Y</td><td align="left">Library Fundamentals TS</td></tr><tr bgcolor="#C8B0B0"><td align="left">
+      </td><td align="left">apply() call a function with arguments from a tuple</td><td align="left">Y</td><td align="left">Library Fundamentals TS</td></tr><tr bgcolor="#B0B0B0"><td align="left">
 	<a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3916.pdf" target="_top">
 	  N3916
 	</a>
-      </td><td align="left">Polymorphic memory resources</td><td align="left">N</td><td align="left">Library Fundamentals TS</td></tr><tr bgcolor="#C8B0B0"><td align="left">
+      </td><td align="left">Polymorphic memory resources</td><td align="left">Partial</td><td align="left">Library Fundamentals TS</td></tr><tr><td align="left">
 	<a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3920.html" target="_top">
 	  N3920
 	</a>
-      </td><td align="left">Extending shared_ptr to support arrays</td><td align="left">N</td><td align="left">Library Fundamentals TS</td></tr><tr><td align="left">
+      </td><td align="left">Extending shared_ptr to support arrays</td><td align="left">Y</td><td align="left">Library Fundamentals TS</td></tr><tr><td align="left">
 	<a class="link" href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3921.html" target="_top">
 	  N3921
 	</a>
diff --git a/libstdc++-v3/doc/xml/manual/status_cxx2014.xml b/libstdc++-v3/doc/xml/manual/status_cxx2014.xml
index 6f1fbe5664a..6fa5a1d93a3 100644
--- a/libstdc++-v3/doc/xml/manual/status_cxx2014.xml
+++ b/libstdc++-v3/doc/xml/manual/status_cxx2014.xml
@@ -234,7 +234,7 @@ not in any particular release.
     </row>
 
     <row>
-      <?dbhtml bgcolor="#C8B0B0" ?>
+      <?dbhtml bgcolor="#B0B0B0" ?>
       <entry>
 	<link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/JTC1/sc22/WG21/docs/papers/2013/n3644.pdf">
 	  N3644
@@ -338,26 +338,25 @@ not in any particular release.
     </row>
 
     <row>
-      <?dbhtml bgcolor="#C8B0B0" ?>
+      <?dbhtml bgcolor="#B0B0B0" ?>
       <entry>
 	<link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3916.pdf">
 	  N3916
 	</link>
       </entry>
       <entry>Polymorphic memory resources</entry>
-      <entry>N</entry>
+      <entry>Partial</entry>
       <entry>Library Fundamentals TS</entry>
     </row>
 
     <row>
-      <?dbhtml bgcolor="#C8B0B0" ?>
       <entry>
 	<link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3920.html">
 	  N3920
 	</link>
       </entry>
       <entry>Extending shared_ptr to support arrays</entry>
-      <entry>N</entry>
+      <entry>Y</entry>
       <entry>Library Fundamentals TS</entry>
     </row>
 
diff --git a/libstdc++-v3/include/Makefile.am b/libstdc++-v3/include/Makefile.am
index 9cd6a85b9a2..4bc33543a47 100644
--- a/libstdc++-v3/include/Makefile.am
+++ b/libstdc++-v3/include/Makefile.am
@@ -27,6 +27,7 @@ std_srcdir = ${glibcxx_srcdir}/include/std
 std_builddir = .
 std_headers = \
 	${std_srcdir}/algorithm \
+	${std_srcdir}/any \
 	${std_srcdir}/array \
 	${std_srcdir}/atomic \
 	${std_srcdir}/bitset \
@@ -52,6 +53,7 @@ std_headers = \
 	${std_srcdir}/memory \
 	${std_srcdir}/mutex \
 	${std_srcdir}/numeric \
+	${std_srcdir}/optional \
 	${std_srcdir}/ostream \
 	${std_srcdir}/queue \
 	${std_srcdir}/random \
@@ -92,6 +94,7 @@ bits_headers = \
 	${bits_srcdir}/boost_concept_check.h \
 	${bits_srcdir}/c++0x_warning.h \
 	${bits_srcdir}/c++14_warning.h \
+	${bits_srcdir}/c++17_warning.h \
 	${bits_srcdir}/char_traits.h \
 	${bits_srcdir}/codecvt.h \
 	${bits_srcdir}/concept_check.h \
diff --git a/libstdc++-v3/include/Makefile.in b/libstdc++-v3/include/Makefile.in
index 43735f9174c..1f255a9bbc6 100644
--- a/libstdc++-v3/include/Makefile.in
+++ b/libstdc++-v3/include/Makefile.in
@@ -317,6 +317,7 @@ std_srcdir = ${glibcxx_srcdir}/include/std
 std_builddir = .
 std_headers = \
 	${std_srcdir}/algorithm \
+	${std_srcdir}/any \
 	${std_srcdir}/array \
 	${std_srcdir}/atomic \
 	${std_srcdir}/bitset \
@@ -342,6 +343,7 @@ std_headers = \
 	${std_srcdir}/memory \
 	${std_srcdir}/mutex \
 	${std_srcdir}/numeric \
+	${std_srcdir}/optional \
 	${std_srcdir}/ostream \
 	${std_srcdir}/queue \
 	${std_srcdir}/random \
@@ -382,6 +384,7 @@ bits_headers = \
 	${bits_srcdir}/boost_concept_check.h \
 	${bits_srcdir}/c++0x_warning.h \
 	${bits_srcdir}/c++14_warning.h \
+	${bits_srcdir}/c++17_warning.h \
 	${bits_srcdir}/char_traits.h \
 	${bits_srcdir}/codecvt.h \
 	${bits_srcdir}/concept_check.h \
diff --git a/libstdc++-v3/include/bits/c++17_warning.h b/libstdc++-v3/include/bits/c++17_warning.h
new file mode 100644
index 00000000000..66ac1966bdc
--- /dev/null
+++ b/libstdc++-v3/include/bits/c++17_warning.h
@@ -0,0 +1,37 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file bits/c++17_warning.h
+ *  This is an internal header file, included by other library headers.
+ *  Do not attempt to use it directly. @headername{iosfwd}
+ */
+
+#ifndef _CXX17_WARNING_H
+#define _CXX17_WARNING_H 1
+
+#if __cplusplus <= 201402L
+#error This file requires compiler and library support \
+for the ISO C++ 2017 standard. This support must be enabled \
+with the -std=c++17 or -std=gnu++17 compiler options.
+#endif
+
+#endif
diff --git a/libstdc++-v3/include/bits/stl_vector.h b/libstdc++-v3/include/bits/stl_vector.h
index eaafa223dbf..8e8aa7cf0d1 100644
--- a/libstdc++-v3/include/bits/stl_vector.h
+++ b/libstdc++-v3/include/bits/stl_vector.h
@@ -995,7 +995,8 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
        */
       template<typename... _Args>
 	iterator
-	emplace(const_iterator __position, _Args&&... __args);
+	emplace(const_iterator __position, _Args&&... __args)
+	{ return _M_emplace_aux(__position, std::forward<_Args>(__args)...); }
 
       /**
        *  @brief  Inserts given value into %vector before specified iterator.
@@ -1040,7 +1041,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
        */
       iterator
       insert(const_iterator __position, value_type&& __x)
-      { return emplace(__position, std::move(__x)); }
+      { return _M_insert_rval(__position, std::move(__x)); }
 
       /**
        *  @brief  Inserts an initializer_list into the %vector.
@@ -1431,30 +1432,65 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
       _M_shrink_to_fit();
 #endif
 
-      // Called by insert(p,x)
 #if __cplusplus < 201103L
+      // Called by insert(p,x)
       void
       _M_insert_aux(iterator __position, const value_type& __x);
 #else
-      template<typename... _Args>
-	static void
-	_S_insert_aux_assign(iterator __pos, _Args&&... __args)
-	{ *__pos =  _Tp(std::forward<_Args>(__args)...); }
+      // A value_type object constructed with _Alloc_traits::construct()
+      // and destroyed with _Alloc_traits::destroy().
+      struct _Temporary_value
+      {
+	template<typename... _Args>
+	  explicit
+	  _Temporary_value(vector* __vec, _Args&&... __args) : _M_this(__vec)
+	  {
+	    _Alloc_traits::construct(_M_this->_M_impl, _M_ptr(),
+				     std::forward<_Args>(__args)...);
+	  }
 
-      static void
-      _S_insert_aux_assign(iterator __pos, _Tp&& __arg)
-      { *__pos = std::move(__arg); }
+	~_Temporary_value()
+	{ _Alloc_traits::destroy(_M_this->_M_impl, _M_ptr()); }
 
-      template<typename... _Args>
+	value_type&
+	_M_val() { return *reinterpret_cast<_Tp*>(&__buf); }
+
+      private:
+	pointer
+	_M_ptr() { return pointer_traits<pointer>::pointer_to(_M_val()); }
+
+	vector* _M_this;
+	typename aligned_storage<sizeof(_Tp), alignof(_Tp)>::type __buf;
+      };
+
+      // Called by insert(p,x) and other functions when insertion needs to
+      // reallocate or move existing elements. _Arg is either _Tp& or _Tp.
+      template<typename _Arg>
 	void
-	_M_insert_aux(iterator __position, _Args&&... __args);
+	_M_insert_aux(iterator __position, _Arg&& __arg);
 
+      // Either move-construct at the end, or forward to _M_insert_aux.
+      iterator
+      _M_insert_rval(const_iterator __position, value_type&& __v);
+
+      // Called by push_back(x) and emplace_back(args) when they need to
+      // reallocate.
       template<typename... _Args>
 	void
 	_M_emplace_back_aux(_Args&&... __args);
+
+      // Try to emplace at the end, otherwise forward to _M_insert_aux.
+      template<typename... _Args>
+	iterator
+	_M_emplace_aux(const_iterator __position, _Args&&... __args);
+
+      // Emplacing an rvalue of the correct type can use _M_insert_rval.
+      iterator
+      _M_emplace_aux(const_iterator __position, value_type&& __v)
+      { return _M_insert_rval(__position, std::move(__v)); }
 #endif
 
-      // Called by the latter.
+      // Called by _M_fill_insert, _M_insert_aux etc.
       size_type
       _M_check_len(size_type __n, const char* __s) const
       {
diff --git a/libstdc++-v3/include/bits/vector.tcc b/libstdc++-v3/include/bits/vector.tcc
index 9cb546403aa..dd0d288eaab 100644
--- a/libstdc++-v3/include/bits/vector.tcc
+++ b/libstdc++-v3/include/bits/vector.tcc
@@ -124,8 +124,10 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 	  const auto __pos = begin() + (__position - cbegin());
 	  if (this->_M_impl._M_finish != this->_M_impl._M_end_of_storage)
 	    {
-	      _Tp __x_copy = __x;
-	      _M_insert_aux(__pos, std::move(__x_copy));
+	      // __x could be an existing element of this vector, so make a
+	      // copy of it before _M_insert_aux moves elements around.
+	      _Temporary_value __x_copy(this, __x);
+	      _M_insert_aux(__pos, std::move(__x_copy._M_val()));
 	    }
 	  else
 	    _M_insert_aux(__pos, __x);
@@ -297,30 +299,49 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 
 #if __cplusplus >= 201103L
   template<typename _Tp, typename _Alloc>
+    auto
+    vector<_Tp, _Alloc>::
+    _M_insert_rval(const_iterator __position, value_type&& __v) -> iterator
+    {
+      const auto __n = __position - cbegin();
+      if (this->_M_impl._M_finish != this->_M_impl._M_end_of_storage
+	  && __position == cend())
+	{
+	  _Alloc_traits::construct(this->_M_impl, this->_M_impl._M_finish,
+				   std::move(__v));
+	  ++this->_M_impl._M_finish;
+	}
+      else
+	_M_insert_aux(begin() + __n, std::move(__v));
+      return iterator(this->_M_impl._M_start + __n);
+    }
+
+  template<typename _Tp, typename _Alloc>
     template<typename... _Args>
-      typename vector<_Tp, _Alloc>::iterator
+      auto
       vector<_Tp, _Alloc>::
-      emplace(const_iterator __position, _Args&&... __args)
+      _M_emplace_aux(const_iterator __position, _Args&&... __args)
+      -> iterator
       {
-	const size_type __n = __position - begin();
-	if (this->_M_impl._M_finish != this->_M_impl._M_end_of_storage
-	    && __position == end())
+	const auto __n = __position - cbegin();
+	if (__position == cend())
+	  emplace_back(std::forward<_Args>(__args)...);
+	else
 	  {
-	    _Alloc_traits::construct(this->_M_impl, this->_M_impl._M_finish,
-				     std::forward<_Args>(__args)...);
-	    ++this->_M_impl._M_finish;
+	    // We need to construct a temporary because something in __args...
+	    // could alias one of the elements of the container and so we
+	    // need to use it before _M_insert_aux moves elements around.
+	    _Temporary_value __tmp(this, std::forward<_Args>(__args)...);
+	    _M_insert_aux(begin() + __n, std::move(__tmp._M_val()));
 	  }
-	else
-	  _M_insert_aux(begin() + (__position - cbegin()),
-			std::forward<_Args>(__args)...);
 	return iterator(this->_M_impl._M_start + __n);
       }
 
   template<typename _Tp, typename _Alloc>
-    template<typename... _Args>
+    template<typename _Arg>
       void
       vector<_Tp, _Alloc>::
-      _M_insert_aux(iterator __position, _Args&&... __args)
+      _M_insert_aux(iterator __position, _Arg&& __arg)
 #else
   template<typename _Tp, typename _Alloc>
     void
@@ -343,7 +364,7 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 #if __cplusplus < 201103L
 	  *__position = __x_copy;
 #else
-	  _S_insert_aux_assign(__position, std::forward<_Args>(__args)...);
+	  *__position = std::forward<_Arg>(__arg);
 #endif
 	}
       else
@@ -355,14 +376,15 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 	  pointer __new_finish(__new_start);
 	  __try
 	    {
-	      // The order of the three operations is dictated by the C++0x
+	      // The order of the three operations is dictated by the C++11
 	      // case, where the moves could alter a new element belonging
 	      // to the existing vector.  This is an issue only for callers
-	      // taking the element by const lvalue ref (see 23.1/13).
+	      // taking the element by lvalue ref (see last bullet of C++11
+	      // [res.on.arguments]).
 	      _Alloc_traits::construct(this->_M_impl,
 		                       __new_start + __elems_before,
 #if __cplusplus >= 201103L
-				       std::forward<_Args>(__args)...);
+				       std::forward<_Arg>(__arg));
 #else
 	                               __x);
 #endif
@@ -455,7 +477,12 @@ _GLIBCXX_BEGIN_NAMESPACE_CONTAINER
 	  if (size_type(this->_M_impl._M_end_of_storage
 			- this->_M_impl._M_finish) >= __n)
 	    {
+#if __cplusplus < 201103L
 	      value_type __x_copy = __x;
+#else
+	      _Temporary_value __tmp(this, __x);
+	      value_type& __x_copy = __tmp._M_val();
+#endif
 	      const size_type __elems_after = end() - __position;
 	      pointer __old_finish(this->_M_impl._M_finish);
 	      if (__elems_after > __n)
diff --git a/libstdc++-v3/include/experimental/any b/libstdc++-v3/include/experimental/any
index ae40091fbb4..96ad5762f66 100644
--- a/libstdc++-v3/include/experimental/any
+++ b/libstdc++-v3/include/experimental/any
@@ -158,7 +158,9 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
     /// Construct with a copy of @p __value as the contained object.
     template <typename _ValueType, typename _Tp = _Decay<_ValueType>,
-	      typename _Mgr = _Manager<_Tp>>
+	      typename _Mgr = _Manager<_Tp>,
+              typename enable_if<is_constructible<_Tp, _ValueType&&>::value,
+                                 bool>::type = true>
       any(_ValueType&& __value)
       : _M_manager(&_Mgr::_S_manage)
       {
@@ -167,6 +169,19 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 		      "The contained object must be CopyConstructible");
       }
 
+    /// Construct with a copy of @p __value as the contained object.
+    template <typename _ValueType, typename _Tp = _Decay<_ValueType>,
+	      typename _Mgr = _Manager<_Tp>,
+              typename enable_if<!is_constructible<_Tp, _ValueType&&>::value,
+                                 bool>::type = false>
+      any(_ValueType&& __value)
+      : _M_manager(&_Mgr::_S_manage)
+      {
+        _Mgr::_S_create(_M_storage, __value);
+	static_assert(is_copy_constructible<_Tp>::value,
+		      "The contained object must be CopyConstructible");
+      }
+
     /// Destructor, calls @c clear()
     ~any() { clear(); }
 
@@ -377,7 +392,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       __throw_bad_any_cast();
     }
 
-  template<typename _ValueType>
+  template<typename _ValueType,
+           typename enable_if<!is_move_constructible<_ValueType>::value
+                              || is_lvalue_reference<_ValueType>::value,
+                              bool>::type = true>
     inline _ValueType any_cast(any&& __any)
     {
       static_assert(any::__is_valid_cast<_ValueType>(),
@@ -387,6 +405,20 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 	return *__p;
       __throw_bad_any_cast();
     }
+
+  template<typename _ValueType,
+           typename enable_if<is_move_constructible<_ValueType>::value
+                              && !is_lvalue_reference<_ValueType>::value,
+                              bool>::type = false>
+    inline _ValueType any_cast(any&& __any)
+    {
+      static_assert(any::__is_valid_cast<_ValueType>(),
+	  "Template argument must be a reference or CopyConstructible type");
+      auto __p = any_cast<remove_reference_t<_ValueType>>(&__any);
+      if (__p)
+	return std::move(*__p);
+      __throw_bad_any_cast();
+    }
   // @}
 
   template<typename _Tp>
diff --git a/libstdc++-v3/include/experimental/optional b/libstdc++-v3/include/experimental/optional
index 7524a7e1357..b6425b7d00e 100644
--- a/libstdc++-v3/include/experimental/optional
+++ b/libstdc++-v3/include/experimental/optional
@@ -470,6 +470,23 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       bool _M_engaged = false;
     };
 
+  template<typename _Tp>
+  class optional;
+
+  template<typename>
+    struct __is_optional_impl : false_type
+    { };
+
+  template<typename _Tp>
+  struct __is_optional_impl<optional<_Tp>> : true_type
+    { };
+
+  template<typename _Tp>
+    struct __is_optional
+    : public __is_optional_impl<std::remove_cv_t<std::remove_reference_t<_Tp>>>
+    { };
+
+
   /**
     * @brief Class template for optional values.
     */
@@ -502,6 +519,78 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
       // _Optional_base has the responsibility for construction.
       using _Base::_Base;
 
+      constexpr optional() = default;
+      // Converting constructors for engaged optionals.
+      template <typename _Up,
+                enable_if_t<__and_<
+			      __not_<is_same<_Tp, _Up>>,
+			      is_constructible<_Tp, _Up&&>,
+			      is_convertible<_Up&&, _Tp>
+			      >::value, bool> = true>
+      constexpr optional(_Up&& __t)
+        : _Base(_Tp(std::forward<_Up>(__t))) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			    __not_<is_same<_Tp, _Up>>,
+			    is_constructible<_Tp, _Up&&>,
+			    __not_<is_convertible<_Up&&, _Tp>>
+			    >::value, bool> = false>
+      explicit constexpr optional(_Up&& __t)
+        : _Base(_Tp(std::forward<_Up>(__t))) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			    __not_<is_same<_Tp, _Up>>,
+			    __not_<is_constructible<
+			      _Tp, const optional<_Up>&>>,
+			    __not_<is_convertible<
+			      const optional<_Up>&, _Tp>>,
+			    is_constructible<_Tp, const _Up&>,
+			    is_convertible<const _Up&, _Tp>
+			    >::value, bool> = true>
+      constexpr optional(const optional<_Up>& __t)
+        : _Base(__t ? optional<_Tp>(*__t) : optional<_Tp>()) { }
+
+      template <typename _Up,
+                 enable_if_t<__and_<
+			       __not_<is_same<_Tp, _Up>>,
+			       __not_<is_constructible<
+					_Tp, const optional<_Up>&>>,
+			       __not_<is_convertible<
+				 const optional<_Up>&, _Tp>>,
+			       is_constructible<_Tp, const _Up&>,
+			       __not_<is_convertible<const _Up&, _Tp>>
+			       >::value, bool> = false>
+      explicit constexpr optional(const optional<_Up>& __t)
+        : _Base(__t ? optional<_Tp>(*__t) : optional<_Tp>()) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			      __not_<is_same<_Tp, _Up>>,
+			      __not_<is_constructible<
+				       _Tp, optional<_Up>&&>>,
+			      __not_<is_convertible<
+				       optional<_Up>&&, _Tp>>,
+			      is_constructible<_Tp, _Up&&>,
+			      is_convertible<_Up&&, _Tp>
+			      >::value, bool> = true>
+      constexpr optional(optional<_Up>&& __t)
+        : _Base(__t ? optional<_Tp>(std::move(*__t)) : optional<_Tp>()) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			    __not_<is_same<_Tp, _Up>>,
+			    __not_<is_constructible<
+				     _Tp, optional<_Up>&&>>,
+			    __not_<is_convertible<
+				     optional<_Up>&&, _Tp>>,
+			    is_constructible<_Tp, _Up&&>,
+			    __not_<is_convertible<_Up&&, _Tp>>
+			    >::value, bool> = false>
+      explicit constexpr optional(optional<_Up>&& __t)
+        : _Base(__t ? optional<_Tp>(std::move(*__t)) : optional<_Tp>()) { }
+
       // [X.Y.4.3] (partly) Assignment.
       optional&
       operator=(nullopt_t) noexcept
@@ -510,8 +599,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
         return *this;
       }
 
-      template<typename _Up>
-        enable_if_t<is_same<_Tp, decay_t<_Up>>::value, optional&>
+      template<typename _Up,
+               enable_if_t<__and_<
+			   __not_<is_same<_Up, nullopt_t>>,
+			   __not_<__is_optional<_Up>>>::value,
+			 bool> = true>
+        optional&
         operator=(_Up&& __u)
         {
           static_assert(__and_<is_constructible<_Tp, _Up>,
@@ -526,6 +619,57 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
           return *this;
         }
 
+      template<typename _Up,
+               enable_if_t<__and_<
+		 __not_<is_same<_Tp, _Up>>>::value,
+			   bool> = true>
+        optional&
+        operator=(const optional<_Up>& __u)
+        {
+          static_assert(__and_<is_constructible<_Tp, _Up>,
+			       is_assignable<_Tp&, _Up>>(),
+                        "Cannot assign to value type from argument");
+
+          if (__u)
+            {
+              if (this->_M_is_engaged())
+                this->_M_get() = *__u;
+              else
+                this->_M_construct(*__u);
+            }
+          else
+            {
+              this->_M_reset();
+            }
+          return *this;
+        }
+
+      template<typename _Up,
+               enable_if_t<__and_<
+		 __not_<is_same<_Tp, _Up>>>::value,
+			   bool> = true>
+        optional&
+        operator=(optional<_Up>&& __u)
+        {
+          static_assert(__and_<is_constructible<_Tp, _Up>,
+			       is_assignable<_Tp&, _Up>>(),
+                        "Cannot assign to value type from argument");
+
+          if (__u)
+            {
+              if (this->_M_is_engaged())
+                this->_M_get() = std::move(*__u);
+              else
+                this->_M_construct(std::move(*__u));
+            }
+          else
+            {
+              this->_M_reset();
+            }
+
+          return *this;
+        }
+
       template<typename... _Args>
 	void
 	emplace(_Args&&... __args)
diff --git a/libstdc++-v3/include/std/any b/libstdc++-v3/include/std/any
new file mode 100644
index 00000000000..2e8baa6f8dd
--- /dev/null
+++ b/libstdc++-v3/include/std/any
@@ -0,0 +1,523 @@
+// <any> -*- C++ -*-
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/any
+ *  This is a Standard C++ Library header.
+ */
+
+#ifndef _GLIBCXX_ANY
+#define _GLIBCXX_ANY 1
+
+#pragma GCC system_header
+
+#if __cplusplus <= 201402L
+# include <bits/c++17_warning.h>
+#else
+
+#include <typeinfo>
+#include <new>
+#include <utility>
+#include <type_traits>
+
+namespace std _GLIBCXX_VISIBILITY(default)
+{
+_GLIBCXX_BEGIN_NAMESPACE_VERSION
+
+  /**
+   *  @addtogroup utilities
+   *  @{
+   */
+
+  /**
+   *  @brief Exception class thrown by a failed @c any_cast
+   *  @ingroup exceptions
+   */
+  class bad_any_cast : public bad_cast
+  {
+  public:
+    virtual const char* what() const noexcept { return "bad any_cast"; }
+  };
+
+  [[gnu::noreturn]] inline void __throw_bad_any_cast()
+  {
+#if __cpp_exceptions
+    throw bad_any_cast{};
+#else
+    __builtin_abort();
+#endif
+  }
+
+  /**
+   *  @brief A type-safe container of any type.
+   * 
+   *  An @c any object's state is either empty or it stores a contained object
+   *  of CopyConstructible type.
+   */
+  class any
+  {
+    // Holds either pointer to a heap object or the contained object itself.
+    union _Storage
+    {
+      // This constructor intentionally doesn't initialize anything.
+      _Storage() = default;
+
+      // Prevent trivial copies of this type, buffer might hold a non-POD.
+      _Storage(const _Storage&) = delete;
+      _Storage& operator=(const _Storage&) = delete;
+
+      void* _M_ptr;
+      aligned_storage<sizeof(_M_ptr), alignof(void*)>::type _M_buffer;
+    };
+
+    template<typename _Tp, typename _Safe = is_nothrow_move_constructible<_Tp>,
+	     bool _Fits = (sizeof(_Tp) <= sizeof(_Storage))
+			  && (alignof(_Tp) <= alignof(_Storage))>
+      using _Internal = std::integral_constant<bool, _Safe::value && _Fits>;
+
+    template<typename _Tp>
+      struct _Manager_internal; // uses small-object optimization
+
+    template<typename _Tp>
+      struct _Manager_external; // creates contained object on the heap
+
+    template<typename _Tp>
+      using _Manager = conditional_t<_Internal<_Tp>::value,
+				     _Manager_internal<_Tp>,
+				     _Manager_external<_Tp>>;
+
+    template<typename _Tp, typename _Decayed = decay_t<_Tp>>
+      using _Decay = enable_if_t<!is_same<_Decayed, any>::value, _Decayed>;
+
+  public:
+    // construct/destruct
+
+    /// Default constructor, creates an empty object.
+    any() noexcept : _M_manager(nullptr) { }
+
+    /// Copy constructor, copies the state of @p __other
+    any(const any& __other)
+    {
+      if (__other.empty())
+	_M_manager = nullptr;
+      else
+	{
+	  _Arg __arg;
+	  __arg._M_any = this;
+	  __other._M_manager(_Op_clone, &__other, &__arg);
+	}
+    }
+
+    /**
+     * @brief Move constructor, transfer the state from @p __other
+     *
+     * @post @c __other.empty() (this postcondition is a GNU extension)
+     */
+    any(any&& __other) noexcept
+    {
+      if (__other.empty())
+	_M_manager = nullptr;
+      else
+	{
+	  _Arg __arg;
+	  __arg._M_any = this;
+	  __other._M_manager(_Op_xfer, &__other, &__arg);
+	}
+    }
+
+    /// Construct with a copy of @p __value as the contained object.
+    template <typename _ValueType, typename _Tp = _Decay<_ValueType>,
+	      typename _Mgr = _Manager<_Tp>,
+              typename enable_if<is_constructible<_Tp, _ValueType&&>::value,
+                                 bool>::type = true>
+      any(_ValueType&& __value)
+      : _M_manager(&_Mgr::_S_manage)
+      {
+        _Mgr::_S_create(_M_storage, std::forward<_ValueType>(__value));
+	static_assert(is_copy_constructible<_Tp>::value,
+		      "The contained object must be CopyConstructible");
+      }
+
+    /// Construct with a copy of @p __value as the contained object.
+    template <typename _ValueType, typename _Tp = _Decay<_ValueType>,
+	      typename _Mgr = _Manager<_Tp>,
+              typename enable_if<!is_constructible<_Tp, _ValueType&&>::value,
+                                 bool>::type = false>
+      any(_ValueType&& __value)
+      : _M_manager(&_Mgr::_S_manage)
+      {
+        _Mgr::_S_create(_M_storage, __value);
+	static_assert(is_copy_constructible<_Tp>::value,
+		      "The contained object must be CopyConstructible");
+      }
+
+    /// Destructor, calls @c clear()
+    ~any() { clear(); }
+
+    // assignments
+
+    /// Copy the state of another object.
+    any& operator=(const any& __rhs)
+    {
+      if (__rhs.empty())
+	clear();
+      else if (this != &__rhs)
+	{
+	  if (!empty())
+	    _M_manager(_Op_destroy, this, nullptr);
+	  _Arg __arg;
+	  __arg._M_any = this;
+	  __rhs._M_manager(_Op_clone, &__rhs, &__arg);
+	}
+      return *this;
+    }
+
+    /**
+     * @brief Move assignment operator
+     *
+     * @post @c __rhs.empty() (not guaranteed for other implementations)
+     */
+    any& operator=(any&& __rhs) noexcept
+    {
+      if (__rhs.empty())
+	clear();
+      else if (this != &__rhs)
+	{
+	  if (!empty())
+	    _M_manager(_Op_destroy, this, nullptr);
+	  _Arg __arg;
+	  __arg._M_any = this;
+	  __rhs._M_manager(_Op_xfer, &__rhs, &__arg);
+	}
+      return *this;
+    }
+
+    /// Store a copy of @p __rhs as the contained object.
+    template<typename _ValueType>
+      enable_if_t<!is_same<any, decay_t<_ValueType>>::value, any&>
+      operator=(_ValueType&& __rhs)
+      {
+	*this = any(std::forward<_ValueType>(__rhs));
+	return *this;
+      }
+
+    // modifiers
+
+    /// If not empty, destroy the contained object.
+    void clear() noexcept
+    {
+      if (!empty())
+      {
+	_M_manager(_Op_destroy, this, nullptr);
+	_M_manager = nullptr;
+      }
+    }
+
+    /// Exchange state with another object.
+    void swap(any& __rhs) noexcept
+    {
+      if (empty() && __rhs.empty())
+	return;
+
+      if (!empty() && !__rhs.empty())
+	{
+	  if (this == &__rhs)
+	    return;
+
+	  any __tmp;
+	  _Arg __arg;
+	  __arg._M_any = &__tmp;
+	  __rhs._M_manager(_Op_xfer, &__rhs, &__arg);
+	  __arg._M_any = &__rhs;
+	  _M_manager(_Op_xfer, this, &__arg);
+	  __arg._M_any = this;
+	  __tmp._M_manager(_Op_xfer, &__tmp, &__arg);
+	}
+      else
+	{
+	  any* __empty = empty() ? this : &__rhs;
+	  any* __full = empty() ? &__rhs : this;
+	  _Arg __arg;
+	  __arg._M_any = __empty;
+	  __full->_M_manager(_Op_xfer, __full, &__arg);
+	}
+    }
+
+    // observers
+
+    /// Reports whether there is a contained object or not.
+    bool empty() const noexcept { return _M_manager == nullptr; }
+
+#if __cpp_rtti
+    /// The @c typeid of the contained object, or @c typeid(void) if empty.
+    const type_info& type() const noexcept
+    {
+      if (empty())
+	return typeid(void);
+      _Arg __arg;
+      _M_manager(_Op_get_type_info, this, &__arg);
+      return *__arg._M_typeinfo;
+    }
+#endif
+
+    template<typename _Tp>
+      static constexpr bool __is_valid_cast()
+      { return __or_<is_reference<_Tp>, is_copy_constructible<_Tp>>::value; }
+
+  private:
+    enum _Op {
+	_Op_access, _Op_get_type_info, _Op_clone, _Op_destroy, _Op_xfer
+    };
+
+    union _Arg
+    {
+	void* _M_obj;
+	const std::type_info* _M_typeinfo;
+	any* _M_any;
+    };
+
+    void (*_M_manager)(_Op, const any*, _Arg*);
+    _Storage _M_storage;
+
+    template<typename _Tp>
+      friend void* __any_caster(const any* __any);
+
+    // Manage in-place contained object.
+    template<typename _Tp>
+      struct _Manager_internal
+      {
+	static void
+	_S_manage(_Op __which, const any* __anyp, _Arg* __arg);
+
+	template<typename _Up>
+	  static void
+	  _S_create(_Storage& __storage, _Up&& __value)
+	  {
+	    void* __addr = &__storage._M_buffer;
+	    ::new (__addr) _Tp(std::forward<_Up>(__value));
+	  }
+      };
+
+    // Manage external contained object.
+    template<typename _Tp>
+      struct _Manager_external
+      {
+	static void
+	_S_manage(_Op __which, const any* __anyp, _Arg* __arg);
+
+	template<typename _Up>
+	  static void
+	  _S_create(_Storage& __storage, _Up&& __value)
+	  {
+	    __storage._M_ptr = new _Tp(std::forward<_Up>(__value));
+	  }
+      };
+  };
+
+  /// Exchange the states of two @c any objects.
+  inline void swap(any& __x, any& __y) noexcept { __x.swap(__y); }
+
+  /**
+   * @brief Access the contained object.
+   *
+   * @tparam  _ValueType  A const-reference or CopyConstructible type.
+   * @param   __any       The object to access.
+   * @return  The contained object.
+   * @throw   bad_any_cast If <code>
+   *          __any.type() != typeid(remove_reference_t<_ValueType>)
+   *          </code>
+   */
+  template<typename _ValueType>
+    inline _ValueType any_cast(const any& __any)
+    {
+      static_assert(any::__is_valid_cast<_ValueType>(),
+	  "Template argument must be a reference or CopyConstructible type");
+      auto __p = any_cast<add_const_t<remove_reference_t<_ValueType>>>(&__any);
+      if (__p)
+	return *__p;
+      __throw_bad_any_cast();
+    }
+
+  /**
+   * @brief Access the contained object.
+   *
+   * @tparam  _ValueType  A reference or CopyConstructible type.
+   * @param   __any       The object to access.
+   * @return  The contained object.
+   * @throw   bad_any_cast If <code>
+   *          __any.type() != typeid(remove_reference_t<_ValueType>)
+   *          </code>
+   *
+   * @{
+   */
+  template<typename _ValueType>
+    inline _ValueType any_cast(any& __any)
+    {
+      static_assert(any::__is_valid_cast<_ValueType>(),
+	  "Template argument must be a reference or CopyConstructible type");
+      auto __p = any_cast<remove_reference_t<_ValueType>>(&__any);
+      if (__p)
+	return *__p;
+      __throw_bad_any_cast();
+    }
+
+  template<typename _ValueType,
+           typename enable_if<!is_move_constructible<_ValueType>::value
+                              || is_lvalue_reference<_ValueType>::value,
+                              bool>::type = true>
+    inline _ValueType any_cast(any&& __any)
+    {
+      static_assert(any::__is_valid_cast<_ValueType>(),
+	  "Template argument must be a reference or CopyConstructible type");
+      auto __p = any_cast<remove_reference_t<_ValueType>>(&__any);
+      if (__p)
+	return *__p;
+      __throw_bad_any_cast();
+    }
+
+  template<typename _ValueType,
+           typename enable_if<is_move_constructible<_ValueType>::value
+                              && !is_lvalue_reference<_ValueType>::value,
+                              bool>::type = false>
+    inline _ValueType any_cast(any&& __any)
+    {
+      static_assert(any::__is_valid_cast<_ValueType>(),
+	  "Template argument must be a reference or CopyConstructible type");
+      auto __p = any_cast<remove_reference_t<_ValueType>>(&__any);
+      if (__p)
+	return std::move(*__p);
+      __throw_bad_any_cast();
+    }
+  // @}
+
+  template<typename _Tp>
+    void* __any_caster(const any* __any)
+    {
+      if (__any->_M_manager != &any::_Manager<decay_t<_Tp>>::_S_manage)
+	return nullptr;
+      any::_Arg __arg;
+      __any->_M_manager(any::_Op_access, __any, &__arg);
+      return __arg._M_obj;
+    }
+
+  /**
+   * @brief Access the contained object.
+   *
+   * @tparam  _ValueType  The type of the contained object.
+   * @param   __any       A pointer to the object to access.
+   * @return  The address of the contained object if <code>
+   *          __any != nullptr && __any.type() == typeid(_ValueType)
+   *          </code>, otherwise a null pointer.
+   *
+   * @{
+   */
+  template<typename _ValueType>
+    inline const _ValueType* any_cast(const any* __any) noexcept
+    {
+      if (__any)
+	return static_cast<_ValueType*>(__any_caster<_ValueType>(__any));
+      return nullptr;
+    }
+
+  template<typename _ValueType>
+    inline _ValueType* any_cast(any* __any) noexcept
+    {
+      if (__any)
+	return static_cast<_ValueType*>(__any_caster<_ValueType>(__any));
+      return nullptr;
+    }
+  // @}
+
+  template<typename _Tp>
+    void
+    any::_Manager_internal<_Tp>::
+    _S_manage(_Op __which, const any* __any, _Arg* __arg)
+    {
+      // The contained object is in _M_storage._M_buffer
+      auto __ptr = reinterpret_cast<const _Tp*>(&__any->_M_storage._M_buffer);
+      switch (__which)
+      {
+      case _Op_access:
+	__arg->_M_obj = const_cast<_Tp*>(__ptr);
+	break;
+      case _Op_get_type_info:
+#if __cpp_rtti
+	__arg->_M_typeinfo = &typeid(_Tp);
+#endif
+	break;
+      case _Op_clone:
+	::new(&__arg->_M_any->_M_storage._M_buffer) _Tp(*__ptr);
+	__arg->_M_any->_M_manager = __any->_M_manager;
+	break;
+      case _Op_destroy:
+	__ptr->~_Tp();
+	break;
+      case _Op_xfer:
+	::new(&__arg->_M_any->_M_storage._M_buffer) _Tp(*__ptr);
+	__ptr->~_Tp();
+	__arg->_M_any->_M_manager = __any->_M_manager;
+	const_cast<any*>(__any)->_M_manager = nullptr;
+	break;
+      }
+    }
+
+  template<typename _Tp>
+    void
+    any::_Manager_external<_Tp>::
+    _S_manage(_Op __which, const any* __any, _Arg* __arg)
+    {
+      // The contained object is *_M_storage._M_ptr
+      auto __ptr = static_cast<const _Tp*>(__any->_M_storage._M_ptr);
+      switch (__which)
+      {
+      case _Op_access:
+	__arg->_M_obj = const_cast<_Tp*>(__ptr);
+	break;
+      case _Op_get_type_info:
+#if __cpp_rtti
+	__arg->_M_typeinfo = &typeid(_Tp);
+#endif
+	break;
+      case _Op_clone:
+	__arg->_M_any->_M_storage._M_ptr = new _Tp(*__ptr);
+	__arg->_M_any->_M_manager = __any->_M_manager;
+	break;
+      case _Op_destroy:
+	delete __ptr;
+	break;
+      case _Op_xfer:
+	__arg->_M_any->_M_storage._M_ptr = __any->_M_storage._M_ptr;
+	__arg->_M_any->_M_manager = __any->_M_manager;
+	const_cast<any*>(__any)->_M_manager = nullptr;
+	break;
+      }
+    }
+
+  /// @}
+  
+_GLIBCXX_END_NAMESPACE_VERSION
+} // namespace std
+
+#endif // C++14
+
+#endif // _GLIBCXX_ANY
diff --git a/libstdc++-v3/include/std/optional b/libstdc++-v3/include/std/optional
new file mode 100644
index 00000000000..e9a86a44aa2
--- /dev/null
+++ b/libstdc++-v3/include/std/optional
@@ -0,0 +1,983 @@
+// <optional> -*- C++ -*-
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+// <http://www.gnu.org/licenses/>.
+
+/** @file include/optional
+ *  This is a Standard C++ Library header.
+ */
+
+#ifndef _GLIBCXX_OPTIONAL
+#define _GLIBCXX_OPTIONAL 1
+
+#if __cplusplus <= 201402L
+# include <bits/c++17_warning.h>
+#else
+
+#include <utility>
+#include <type_traits>
+#include <stdexcept>
+#include <new>
+#include <initializer_list>
+#include <bits/functexcept.h>
+#include <bits/functional_hash.h>
+#include <bits/enable_special_members.h>
+
+namespace std _GLIBCXX_VISIBILITY(default)
+{
+_GLIBCXX_BEGIN_NAMESPACE_VERSION
+
+  /**
+   *  @addtogroup utilities
+   *  @{
+   */
+
+  // All subsequent [X.Y.n] references are against n3793.
+
+  // [X.Y.4]
+  template<typename _Tp>
+    class optional;
+
+  // [X.Y.5]
+  /// Tag type for in-place construction.
+  struct in_place_t { };
+
+  /// Tag for in-place construction.
+  constexpr in_place_t in_place { };
+
+  // [X.Y.6]
+  /// Tag type to disengage optional objects.
+  struct nullopt_t
+  {
+    // Do not user-declare default constructor at all for
+    // optional_value = {} syntax to work.
+    // nullopt_t() = delete;
+
+    // Used for constructing nullopt.
+    enum class _Construct { _Token };
+
+    // Must be constexpr for nullopt_t to be literal.
+    explicit constexpr nullopt_t(_Construct) { }
+  };
+
+  // [X.Y.6]
+  /// Tag to disengage optional objects.
+  constexpr nullopt_t nullopt { nullopt_t::_Construct::_Token };
+
+  // [X.Y.7]
+  /**
+   *  @brief Exception class thrown when a disengaged optional object is
+   *  dereferenced.
+   *  @ingroup exceptions
+   */
+  class bad_optional_access : public logic_error
+  {
+  public:
+    bad_optional_access() : logic_error("bad optional access") { }
+
+    // XXX This constructor is non-standard. Should not be inline
+    explicit bad_optional_access(const char* __arg) : logic_error(__arg) { }
+
+    virtual ~bad_optional_access() noexcept = default;
+  };
+
+  void
+  __throw_bad_optional_access(const char*)
+  __attribute__((__noreturn__));
+
+  // XXX Does not belong here.
+  inline void
+  __throw_bad_optional_access(const char* __s)
+  { _GLIBCXX_THROW_OR_ABORT(bad_optional_access(__s)); }
+
+  template<typename _Tp, typename = void>
+    struct _Has_addressof_mem : std::false_type { };
+
+  template<typename _Tp>
+    struct _Has_addressof_mem<_Tp,
+         __void_t<decltype( std::declval<const _Tp&>().operator&() )>
+      >
+    : std::true_type { };
+
+  template<typename _Tp, typename = void>
+    struct _Has_addressof_free : std::false_type { };
+
+  template<typename _Tp>
+    struct _Has_addressof_free<_Tp,
+         __void_t<decltype( operator&(std::declval<const _Tp&>()) )>
+      >
+    : std::true_type { };
+
+  /**
+    * @brief Trait that detects the presence of an overloaded unary operator&.
+    *
+    * Practically speaking this detects the presence of such an operator when
+    * called on a const-qualified lvalue (i.e.
+    * declval<_Tp * const&>().operator&()).
+    */
+  template<typename _Tp>
+    struct _Has_addressof
+    : std::__or_<_Has_addressof_mem<_Tp>, _Has_addressof_free<_Tp>>::type
+    { };
+
+  /**
+    * @brief An overload that attempts to take the address of an lvalue as a
+    * constant expression. Falls back to __addressof in the presence of an
+    * overloaded addressof operator (unary operator&), in which case the call
+    * will not be a constant expression.
+    */
+  template<typename _Tp, enable_if_t<!_Has_addressof<_Tp>::value, int>...>
+    constexpr _Tp* __constexpr_addressof(_Tp& __t)
+    { return &__t; }
+
+  /**
+    * @brief Fallback overload that defers to __addressof.
+    */
+  template<typename _Tp, enable_if_t<_Has_addressof<_Tp>::value, int>...>
+    inline _Tp* __constexpr_addressof(_Tp& __t)
+    { return std::__addressof(__t); }
+
+  /**
+    * @brief Class template that holds the necessary state for @ref optional
+    * and that has the responsibility for construction and the special members.
+    *
+    * Such a separate base class template is necessary in order to
+    * conditionally enable the special members (e.g. copy/move constructors).
+    * Note that this means that @ref _Optional_base implements the
+    * functionality for copy and move assignment, but not for converting
+    * assignment.
+    *
+    * @see optional, _Enable_special_members
+    */
+  template<typename _Tp, bool _ShouldProvideDestructor =
+	   !is_trivially_destructible<_Tp>::value>
+    class _Optional_base
+    {
+    private:
+      // Remove const to avoid prohibition of reusing object storage for
+      // const-qualified types in [3.8/9]. This is strictly internal
+      // and even optional itself is oblivious to it.
+      using _Stored_type = remove_const_t<_Tp>;
+
+    public:
+      // [X.Y.4.1] Constructors.
+
+      // Constructors for disengaged optionals.
+      constexpr _Optional_base() noexcept
+      : _M_empty{} { }
+
+      constexpr _Optional_base(nullopt_t) noexcept
+      : _Optional_base{} { }
+
+      // Constructors for engaged optionals.
+      constexpr _Optional_base(const _Tp& __t)
+      : _M_payload(__t), _M_engaged(true) { }
+
+      constexpr _Optional_base(_Tp&& __t)
+      : _M_payload(std::move(__t)), _M_engaged(true) { }
+
+      template<typename... _Args>
+        constexpr explicit _Optional_base(in_place_t, _Args&&... __args)
+        : _M_payload(std::forward<_Args>(__args)...), _M_engaged(true) { }
+
+      template<typename _Up, typename... _Args,
+               enable_if_t<is_constructible<_Tp,
+                                            initializer_list<_Up>&,
+                                            _Args&&...>::value,
+                           int>...>
+        constexpr explicit _Optional_base(in_place_t,
+                                          initializer_list<_Up> __il,
+                                          _Args&&... __args)
+        : _M_payload(__il, std::forward<_Args>(__args)...),
+          _M_engaged(true) { }
+
+      // Copy and move constructors.
+      _Optional_base(const _Optional_base& __other)
+      {
+        if (__other._M_engaged)
+          this->_M_construct(__other._M_get());
+      }
+
+      _Optional_base(_Optional_base&& __other)
+      noexcept(is_nothrow_move_constructible<_Tp>())
+      {
+        if (__other._M_engaged)
+          this->_M_construct(std::move(__other._M_get()));
+      }
+
+      // [X.Y.4.3] (partly) Assignment.
+      _Optional_base&
+      operator=(const _Optional_base& __other)
+      {
+        if (this->_M_engaged && __other._M_engaged)
+          this->_M_get() = __other._M_get();
+        else
+	  {
+	    if (__other._M_engaged)
+	      this->_M_construct(__other._M_get());
+	    else
+	      this->_M_reset();
+	  }
+
+        return *this;
+      }
+
+      _Optional_base&
+      operator=(_Optional_base&& __other)
+      noexcept(__and_<is_nothrow_move_constructible<_Tp>,
+		      is_nothrow_move_assignable<_Tp>>())
+      {
+	if (this->_M_engaged && __other._M_engaged)
+	  this->_M_get() = std::move(__other._M_get());
+	else
+	  {
+	    if (__other._M_engaged)
+	      this->_M_construct(std::move(__other._M_get()));
+	    else
+	      this->_M_reset();
+	  }
+	return *this;
+      }
+
+      // [X.Y.4.2] Destructor.
+      ~_Optional_base()
+      {
+        if (this->_M_engaged)
+          this->_M_payload.~_Stored_type();
+      }
+
+      // The following functionality is also needed by optional, hence the
+      // protected accessibility.
+    protected:
+      constexpr bool _M_is_engaged() const noexcept
+      { return this->_M_engaged; }
+
+      // The _M_get operations have _M_engaged as a precondition.
+      constexpr _Tp&
+      _M_get() noexcept
+      { return _M_payload; }
+
+      constexpr const _Tp&
+      _M_get() const noexcept
+      { return _M_payload; }
+
+      // The _M_construct operation has !_M_engaged as a precondition
+      // while _M_destruct has _M_engaged as a precondition.
+      template<typename... _Args>
+        void
+        _M_construct(_Args&&... __args)
+        noexcept(is_nothrow_constructible<_Stored_type, _Args...>())
+        {
+          ::new (std::__addressof(this->_M_payload))
+            _Stored_type(std::forward<_Args>(__args)...);
+          this->_M_engaged = true;
+        }
+
+      void
+      _M_destruct()
+      {
+        this->_M_engaged = false;
+        this->_M_payload.~_Stored_type();
+      }
+
+      // _M_reset is a 'safe' operation with no precondition.
+      void
+      _M_reset()
+      {
+        if (this->_M_engaged)
+          this->_M_destruct();
+      }
+
+    private:
+      struct _Empty_byte { };
+      union {
+          _Empty_byte _M_empty;
+          _Stored_type _M_payload;
+      };
+      bool _M_engaged = false;
+    };
+
+  /// Partial specialization that is exactly identical to the primary template
+  /// save for not providing a destructor, to fulfill triviality requirements.
+  template<typename _Tp>
+    class _Optional_base<_Tp, false>
+    {
+    private:
+      using _Stored_type = remove_const_t<_Tp>;
+
+    public:
+      constexpr _Optional_base() noexcept
+      : _M_empty{} { }
+
+      constexpr _Optional_base(nullopt_t) noexcept
+      : _Optional_base{} { }
+
+      constexpr _Optional_base(const _Tp& __t)
+      : _M_payload(__t), _M_engaged(true) { }
+
+      constexpr _Optional_base(_Tp&& __t)
+      : _M_payload(std::move(__t)), _M_engaged(true) { }
+
+      template<typename... _Args>
+        constexpr explicit _Optional_base(in_place_t, _Args&&... __args)
+        : _M_payload(std::forward<_Args>(__args)...), _M_engaged(true) { }
+
+      template<typename _Up, typename... _Args,
+               enable_if_t<is_constructible<_Tp,
+                                            initializer_list<_Up>&,
+                                            _Args&&...>::value,
+			   int>...>
+        constexpr explicit _Optional_base(in_place_t,
+                                          initializer_list<_Up> __il,
+                                          _Args&&... __args)
+        : _M_payload(__il, std::forward<_Args>(__args)...),
+          _M_engaged(true) { }
+
+      _Optional_base(const _Optional_base& __other)
+      {
+        if (__other._M_engaged)
+          this->_M_construct(__other._M_get());
+      }
+
+      _Optional_base(_Optional_base&& __other)
+      noexcept(is_nothrow_move_constructible<_Tp>())
+      {
+        if (__other._M_engaged)
+          this->_M_construct(std::move(__other._M_get()));
+      }
+
+      _Optional_base&
+      operator=(const _Optional_base& __other)
+      {
+	if (this->_M_engaged && __other._M_engaged)
+	  this->_M_get() = __other._M_get();
+	else
+	  {
+	    if (__other._M_engaged)
+	      this->_M_construct(__other._M_get());
+	    else
+	      this->_M_reset();
+	  }
+	return *this;
+      }
+
+      _Optional_base&
+      operator=(_Optional_base&& __other)
+      noexcept(__and_<is_nothrow_move_constructible<_Tp>,
+		      is_nothrow_move_assignable<_Tp>>())
+      {
+	if (this->_M_engaged && __other._M_engaged)
+	  this->_M_get() = std::move(__other._M_get());
+	else
+	  {
+	    if (__other._M_engaged)
+	      this->_M_construct(std::move(__other._M_get()));
+	    else
+	      this->_M_reset();
+	  }
+	return *this;
+      }
+
+      // Sole difference
+      // ~_Optional_base() noexcept = default;
+
+    protected:
+      constexpr bool _M_is_engaged() const noexcept
+      { return this->_M_engaged; }
+
+      _Tp&
+      _M_get() noexcept
+      { return _M_payload; }
+
+      constexpr const _Tp&
+      _M_get() const noexcept
+      { return _M_payload; }
+
+      template<typename... _Args>
+        void
+        _M_construct(_Args&&... __args)
+        noexcept(is_nothrow_constructible<_Stored_type, _Args...>())
+        {
+          ::new (std::__addressof(this->_M_payload))
+            _Stored_type(std::forward<_Args>(__args)...);
+          this->_M_engaged = true;
+        }
+
+      void
+      _M_destruct()
+      {
+        this->_M_engaged = false;
+        this->_M_payload.~_Stored_type();
+      }
+
+      void
+      _M_reset()
+      {
+        if (this->_M_engaged)
+          this->_M_destruct();
+      }
+
+    private:
+      struct _Empty_byte { };
+      union
+      {
+	_Empty_byte _M_empty;
+	_Stored_type _M_payload;
+      };
+      bool _M_engaged = false;
+    };
+
+  template<typename _Tp>
+  class optional;
+
+  template<typename>
+    struct __is_optional_impl : false_type
+    { };
+
+  template<typename _Tp>
+  struct __is_optional_impl<optional<_Tp>> : true_type
+    { };
+
+  template<typename _Tp>
+    struct __is_optional
+    : public __is_optional_impl<std::remove_cv_t<std::remove_reference_t<_Tp>>>
+    { };
+
+
+  /**
+    * @brief Class template for optional values.
+    */
+  template<typename _Tp>
+    class optional
+    : private _Optional_base<_Tp>,
+      private _Enable_copy_move<
+        // Copy constructor.
+        is_copy_constructible<_Tp>::value,
+        // Copy assignment.
+        __and_<is_copy_constructible<_Tp>, is_copy_assignable<_Tp>>::value,
+        // Move constructor.
+        is_move_constructible<_Tp>::value,
+        // Move assignment.
+        __and_<is_move_constructible<_Tp>, is_move_assignable<_Tp>>::value,
+        // Unique tag type.
+        optional<_Tp>>
+    {
+      static_assert(__and_<__not_<is_same<remove_cv_t<_Tp>, nullopt_t>>,
+			   __not_<is_same<remove_cv_t<_Tp>, in_place_t>>,
+			   __not_<is_reference<_Tp>>>(),
+                    "Invalid instantiation of optional<T>");
+
+    private:
+      using _Base = _Optional_base<_Tp>;
+
+    public:
+      using value_type = _Tp;
+
+      // _Optional_base has the responsibility for construction.
+      using _Base::_Base;
+
+      constexpr optional() = default;
+      // Converting constructors for engaged optionals.
+      template <typename _Up,
+                enable_if_t<__and_<
+			      __not_<is_same<_Tp, _Up>>,
+			      is_constructible<_Tp, _Up&&>,
+			      is_convertible<_Up&&, _Tp>
+			      >::value, bool> = true>
+      constexpr optional(_Up&& __t)
+        : _Base(_Tp(std::forward<_Up>(__t))) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			    __not_<is_same<_Tp, _Up>>,
+			    is_constructible<_Tp, _Up&&>,
+			    __not_<is_convertible<_Up&&, _Tp>>
+			    >::value, bool> = false>
+      explicit constexpr optional(_Up&& __t)
+        : _Base(_Tp(std::forward<_Up>(__t))) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			    __not_<is_same<_Tp, _Up>>,
+			    __not_<is_constructible<
+			      _Tp, const optional<_Up>&>>,
+			    __not_<is_convertible<
+			      const optional<_Up>&, _Tp>>,
+			    is_constructible<_Tp, const _Up&>,
+			    is_convertible<const _Up&, _Tp>
+			    >::value, bool> = true>
+      constexpr optional(const optional<_Up>& __t)
+        : _Base(__t ? optional<_Tp>(*__t) : optional<_Tp>()) { }
+
+      template <typename _Up,
+                 enable_if_t<__and_<
+			       __not_<is_same<_Tp, _Up>>,
+			       __not_<is_constructible<
+					_Tp, const optional<_Up>&>>,
+			       __not_<is_convertible<
+				 const optional<_Up>&, _Tp>>,
+			       is_constructible<_Tp, const _Up&>,
+			       __not_<is_convertible<const _Up&, _Tp>>
+			       >::value, bool> = false>
+      explicit constexpr optional(const optional<_Up>& __t)
+        : _Base(__t ? optional<_Tp>(*__t) : optional<_Tp>()) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			      __not_<is_same<_Tp, _Up>>,
+			      __not_<is_constructible<
+				       _Tp, optional<_Up>&&>>,
+			      __not_<is_convertible<
+				       optional<_Up>&&, _Tp>>,
+			      is_constructible<_Tp, _Up&&>,
+			      is_convertible<_Up&&, _Tp>
+			      >::value, bool> = true>
+      constexpr optional(optional<_Up>&& __t)
+        : _Base(__t ? optional<_Tp>(std::move(*__t)) : optional<_Tp>()) { }
+
+      template <typename _Up,
+                enable_if_t<__and_<
+			    __not_<is_same<_Tp, _Up>>,
+			    __not_<is_constructible<
+				     _Tp, optional<_Up>&&>>,
+			    __not_<is_convertible<
+				     optional<_Up>&&, _Tp>>,
+			    is_constructible<_Tp, _Up&&>,
+			    __not_<is_convertible<_Up&&, _Tp>>
+			    >::value, bool> = false>
+      explicit constexpr optional(optional<_Up>&& __t)
+        : _Base(__t ? optional<_Tp>(std::move(*__t)) : optional<_Tp>()) { }
+
+      // [X.Y.4.3] (partly) Assignment.
+      optional&
+      operator=(nullopt_t) noexcept
+      {
+        this->_M_reset();
+        return *this;
+      }
+
+      template<typename _Up,
+               enable_if_t<__and_<
+			   __not_<is_same<_Up, nullopt_t>>,
+			   __not_<__is_optional<_Up>>>::value,
+			 bool> = true>
+        optional&
+        operator=(_Up&& __u)
+        {
+          static_assert(__and_<is_constructible<_Tp, _Up>,
+			       is_assignable<_Tp&, _Up>>(),
+                        "Cannot assign to value type from argument");
+
+          if (this->_M_is_engaged())
+            this->_M_get() = std::forward<_Up>(__u);
+          else
+            this->_M_construct(std::forward<_Up>(__u));
+
+          return *this;
+        }
+
+      template<typename _Up,
+               enable_if_t<__and_<
+		 __not_<is_same<_Tp, _Up>>>::value,
+			   bool> = true>
+        optional&
+        operator=(const optional<_Up>& __u)
+        {
+          static_assert(__and_<is_constructible<_Tp, _Up>,
+			       is_assignable<_Tp&, _Up>>(),
+                        "Cannot assign to value type from argument");
+
+          if (__u)
+            {
+              if (this->_M_is_engaged())
+                this->_M_get() = *__u;
+              else
+                this->_M_construct(*__u);
+            }
+          else
+            {
+              this->_M_reset();
+            }
+          return *this;
+        }
+
+      template<typename _Up,
+               enable_if_t<__and_<
+		 __not_<is_same<_Tp, _Up>>>::value,
+			   bool> = true>
+        optional&
+        operator=(optional<_Up>&& __u)
+        {
+          static_assert(__and_<is_constructible<_Tp, _Up>,
+			       is_assignable<_Tp&, _Up>>(),
+                        "Cannot assign to value type from argument");
+
+          if (__u)
+            {
+              if (this->_M_is_engaged())
+                this->_M_get() = std::move(*__u);
+              else
+                this->_M_construct(std::move(*__u));
+            }
+          else
+            {
+              this->_M_reset();
+            }
+
+          return *this;
+        }
+
+      template<typename... _Args>
+	void
+	emplace(_Args&&... __args)
+	{
+	  static_assert(is_constructible<_Tp, _Args&&...>(),
+			"Cannot emplace value type from arguments");
+
+	  this->_M_reset();
+	  this->_M_construct(std::forward<_Args>(__args)...);
+	}
+
+      template<typename _Up, typename... _Args>
+        enable_if_t<is_constructible<_Tp, initializer_list<_Up>&,
+				     _Args&&...>::value>
+	emplace(initializer_list<_Up> __il, _Args&&... __args)
+	{
+	  this->_M_reset();
+	  this->_M_construct(__il, std::forward<_Args>(__args)...);
+	}
+
+      // [X.Y.4.2] Destructor is implicit, implemented in _Optional_base.
+
+      // [X.Y.4.4] Swap.
+      void
+      swap(optional& __other)
+      noexcept(is_nothrow_move_constructible<_Tp>()
+               && noexcept(swap(declval<_Tp&>(), declval<_Tp&>())))
+      {
+        using std::swap;
+
+        if (this->_M_is_engaged() && __other._M_is_engaged())
+          swap(this->_M_get(), __other._M_get());
+        else if (this->_M_is_engaged())
+	  {
+	    __other._M_construct(std::move(this->_M_get()));
+	    this->_M_destruct();
+	  }
+        else if (__other._M_is_engaged())
+	  {
+	    this->_M_construct(std::move(__other._M_get()));
+	    __other._M_destruct();
+	  }
+      }
+
+      // [X.Y.4.5] Observers.
+      constexpr const _Tp*
+      operator->() const
+      { return __constexpr_addressof(this->_M_get()); }
+
+      _Tp*
+      operator->()
+      { return std::__addressof(this->_M_get()); }
+
+      constexpr const _Tp&
+      operator*() const&
+      { return this->_M_get(); }
+
+      constexpr _Tp&
+      operator*()&
+      { return this->_M_get(); }
+
+      constexpr _Tp&&
+      operator*()&&
+      { return std::move(this->_M_get()); }
+
+      constexpr const _Tp&&
+      operator*() const&&
+      { return std::move(this->_M_get()); }
+
+      constexpr explicit operator bool() const noexcept
+      { return this->_M_is_engaged(); }
+
+      constexpr const _Tp&
+      value() const&
+      {
+	return this->_M_is_engaged()
+	  ?  this->_M_get()
+	  : (__throw_bad_optional_access("Attempt to access value of a "
+		                         "disengaged optional object"),
+	     this->_M_get());
+      }
+
+      constexpr _Tp&
+      value()&
+      {
+	return this->_M_is_engaged()
+	  ?  this->_M_get()
+	  : (__throw_bad_optional_access("Attempt to access value of a "
+		                         "disengaged optional object"),
+	     this->_M_get());
+      }
+
+      constexpr _Tp&&
+      value()&&
+      {
+	return this->_M_is_engaged()
+	  ?  std::move(this->_M_get())
+	  : (__throw_bad_optional_access("Attempt to access value of a "
+		                         "disengaged optional object"),
+	     std::move(this->_M_get()));
+      }
+
+      constexpr const _Tp&&
+      value() const&&
+      {
+	return this->_M_is_engaged()
+	  ?  std::move(this->_M_get())
+	  : (__throw_bad_optional_access("Attempt to access value of a "
+		                         "disengaged optional object"),
+	     std::move(this->_M_get()));
+      }
+
+      template<typename _Up>
+	constexpr _Tp
+	value_or(_Up&& __u) const&
+	{
+	  static_assert(__and_<is_copy_constructible<_Tp>,
+			       is_convertible<_Up&&, _Tp>>(),
+			"Cannot return value");
+
+	  return this->_M_is_engaged()
+	    ? this->_M_get()
+	    : static_cast<_Tp>(std::forward<_Up>(__u));
+	}
+
+      template<typename _Up>
+	_Tp
+	value_or(_Up&& __u) &&
+	{
+	  static_assert(__and_<is_move_constructible<_Tp>,
+			       is_convertible<_Up&&, _Tp>>(),
+			"Cannot return value" );
+
+	  return this->_M_is_engaged()
+	    ? std::move(this->_M_get())
+	    : static_cast<_Tp>(std::forward<_Up>(__u));
+	}
+    };
+
+  // [X.Y.8] Comparisons between optional values.
+  template<typename _Tp>
+    constexpr bool
+    operator==(const optional<_Tp>& __lhs, const optional<_Tp>& __rhs)
+    {
+      return static_cast<bool>(__lhs) == static_cast<bool>(__rhs)
+	     && (!__lhs || *__lhs == *__rhs);
+    }
+
+  template<typename _Tp>
+    constexpr bool
+    operator!=(const optional<_Tp>& __lhs, const optional<_Tp>& __rhs)
+    { return !(__lhs == __rhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<(const optional<_Tp>& __lhs, const optional<_Tp>& __rhs)
+    {
+      return static_cast<bool>(__rhs) && (!__lhs || *__lhs < *__rhs);
+    }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>(const optional<_Tp>& __lhs, const optional<_Tp>& __rhs)
+    { return __rhs < __lhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<=(const optional<_Tp>& __lhs, const optional<_Tp>& __rhs)
+    { return !(__rhs < __lhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>=(const optional<_Tp>& __lhs, const optional<_Tp>& __rhs)
+    { return !(__lhs < __rhs); }
+
+  // [X.Y.9] Comparisons with nullopt.
+  template<typename _Tp>
+    constexpr bool
+    operator==(const optional<_Tp>& __lhs, nullopt_t) noexcept
+    { return !__lhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator==(nullopt_t, const optional<_Tp>& __rhs) noexcept
+    { return !__rhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator!=(const optional<_Tp>& __lhs, nullopt_t) noexcept
+    { return static_cast<bool>(__lhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator!=(nullopt_t, const optional<_Tp>& __rhs) noexcept
+    { return static_cast<bool>(__rhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<(const optional<_Tp>& /* __lhs */, nullopt_t) noexcept
+    { return false; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<(nullopt_t, const optional<_Tp>& __rhs) noexcept
+    { return static_cast<bool>(__rhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>(const optional<_Tp>& __lhs, nullopt_t) noexcept
+    { return static_cast<bool>(__lhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>(nullopt_t, const optional<_Tp>& /* __rhs */) noexcept
+    { return false; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<=(const optional<_Tp>& __lhs, nullopt_t) noexcept
+    { return !__lhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<=(nullopt_t, const optional<_Tp>& /* __rhs */) noexcept
+    { return true; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>=(const optional<_Tp>& /* __lhs */, nullopt_t) noexcept
+    { return true; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>=(nullopt_t, const optional<_Tp>& __rhs) noexcept
+    { return !__rhs; }
+
+  // [X.Y.10] Comparisons with value type.
+  template<typename _Tp>
+    constexpr bool
+    operator==(const optional<_Tp>& __lhs, const _Tp& __rhs)
+    { return __lhs && *__lhs == __rhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator==(const _Tp& __lhs, const optional<_Tp>& __rhs)
+    { return __rhs && __lhs == *__rhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator!=(const optional<_Tp>& __lhs, _Tp const& __rhs)
+    { return !__lhs || !(*__lhs == __rhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator!=(const _Tp& __lhs, const optional<_Tp>& __rhs)
+    { return !__rhs || !(__lhs == *__rhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<(const optional<_Tp>& __lhs, const _Tp& __rhs)
+    { return !__lhs || *__lhs < __rhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<(const _Tp& __lhs, const optional<_Tp>& __rhs)
+    { return __rhs && __lhs < *__rhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>(const optional<_Tp>& __lhs, const _Tp& __rhs)
+    { return __lhs && __rhs < *__lhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>(const _Tp& __lhs, const optional<_Tp>& __rhs)
+    { return !__rhs || *__rhs < __lhs; }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<=(const optional<_Tp>& __lhs, const _Tp& __rhs)
+    { return !__lhs || !(__rhs < *__lhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator<=(const _Tp& __lhs, const optional<_Tp>& __rhs)
+    { return __rhs && !(*__rhs < __lhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>=(const optional<_Tp>& __lhs, const _Tp& __rhs)
+    { return __lhs && !(*__lhs < __rhs); }
+
+  template<typename _Tp>
+    constexpr bool
+    operator>=(const _Tp& __lhs, const optional<_Tp>& __rhs)
+    { return !__rhs || !(__lhs < *__rhs); }
+
+  // [X.Y.11]
+  template<typename _Tp>
+    inline void
+    swap(optional<_Tp>& __lhs, optional<_Tp>& __rhs)
+    noexcept(noexcept(__lhs.swap(__rhs)))
+    { __lhs.swap(__rhs); }
+
+  template<typename _Tp>
+    constexpr optional<decay_t<_Tp>>
+    make_optional(_Tp&& __t)
+    { return optional<decay_t<_Tp>> { std::forward<_Tp>(__t) }; }
+
+  // [X.Y.12]
+  template<typename _Tp>
+    struct hash<optional<_Tp>>
+    {
+      using result_type = size_t;
+      using argument_type = optional<_Tp>;
+
+      size_t
+      operator()(const optional<_Tp>& __t) const
+      noexcept(noexcept(hash<_Tp> {}(*__t)))
+      {
+        // We pick an arbitrary hash for disengaged optionals which hopefully
+        // usual values of _Tp won't typically hash to.
+        constexpr size_t __magic_disengaged_hash = static_cast<size_t>(-3333);
+        return __t ? hash<_Tp> {}(*__t) : __magic_disengaged_hash;
+      }
+    };
+
+  /// @}
+
+_GLIBCXX_END_NAMESPACE_VERSION
+} // namespace std
+
+#endif // C++17
+
+#endif // _GLIBCXX_OPTIONAL
diff --git a/libstdc++-v3/src/filesystem/ops.cc b/libstdc++-v3/src/filesystem/ops.cc
index 67ed8e6e564..9fb5b639fc0 100644
--- a/libstdc++-v3/src/filesystem/ops.cc
+++ b/libstdc++-v3/src/filesystem/ops.cc
@@ -1194,7 +1194,7 @@ fs::remove_all(const path& p, error_code& ec) noexcept
   uintmax_t count = 0;
   if (ec.value() == 0 && fs.type() == file_type::directory)
     for (directory_iterator d(p, ec), end; ec.value() == 0 && d != end; ++d)
-      count += fs::remove(d->path(), ec);
+      count += fs::remove_all(d->path(), ec);
   if (ec.value())
     return -1;
   return fs::remove(p, ec) ? ++count : -1;  // fs:remove() calls ec.clear()
diff --git a/libstdc++-v3/testsuite/20_util/any/assign/1.cc b/libstdc++-v3/testsuite/20_util/any/assign/1.cc
new file mode 100644
index 00000000000..582a92d2f07
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/assign/1.cc
@@ -0,0 +1,60 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <testsuite_hooks.h>
+
+using std::any;
+
+void test01()
+{
+  any x;
+  any y;
+  y = x;
+  VERIFY( x.empty() );
+  VERIFY( y.empty() );
+
+  y = std::move(x);
+  VERIFY( x.empty() );
+  VERIFY( y.empty() );
+}
+
+void test02()
+{
+  any x(1);
+  any y;
+  y = x;
+  VERIFY( !x.empty() );
+  VERIFY( !y.empty() );
+
+  x = std::move(y);
+  VERIFY( !x.empty() );
+  VERIFY( y.empty() );
+
+  x = y;
+  VERIFY( x.empty() );
+  VERIFY( y.empty() );
+}
+
+int main()
+{
+  test01();
+  test02();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/assign/2.cc b/libstdc++-v3/testsuite/20_util/any/assign/2.cc
new file mode 100644
index 00000000000..b333e5df796
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/assign/2.cc
@@ -0,0 +1,51 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <testsuite_hooks.h>
+
+using std::any;
+using std::any_cast;
+
+struct X
+{
+  bool moved = false;
+  bool moved_from = false;
+  X() = default;
+  X(const X&) = default;
+  X(X&& x) : moved(true) { x.moved_from = true; }
+};
+
+void test01()
+{
+  X x;
+  any a1;
+  a1 = x;
+  VERIFY(x.moved_from == false);
+  any a2;
+  a2 = std::move(x);
+  VERIFY(x.moved_from == true);
+  VERIFY(any_cast<X&>(a2).moved == true );
+}
+
+int main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/assign/self.cc b/libstdc++-v3/testsuite/20_util/any/assign/self.cc
new file mode 100644
index 00000000000..e773efad11c
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/assign/self.cc
@@ -0,0 +1,93 @@
+// Copyright (C) 2015-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++17" }
+
+#include <any>
+#include <set>
+#include <testsuite_hooks.h>
+
+std::set<const void*> live_objects;
+
+struct A {
+  A() { live_objects.insert(this); }
+  ~A() { live_objects.erase(this); }
+  A(const A& a) { VERIFY(live_objects.count(&a)); live_objects.insert(this); }
+};
+
+void
+test01()
+{
+  using std::any;
+
+  any a;
+  a = a;
+  VERIFY( a.empty() );
+
+  a = A{};
+  a = a;
+  VERIFY( !a.empty() );
+
+  a.clear();
+  VERIFY( live_objects.empty() );
+}
+
+void
+test02()
+{
+  using std::any;
+
+  struct X {
+    any a;
+  };
+
+  X x;
+  std::swap(x, x); // results in "self-move-assignment" of X::a
+  VERIFY( x.a.empty() );
+
+  x.a = A{};
+  std::swap(x, x); // results in "self-move-assignment" of X::a
+  VERIFY( !x.a.empty() );
+
+  x.a.clear();
+  VERIFY( live_objects.empty() );
+}
+
+void
+test03()
+{
+  using std::any;
+
+  any a;
+  a.swap(a);
+  VERIFY( a.empty() );
+
+  a = A{};
+  a.swap(a);
+  VERIFY( !a.empty() );
+
+  a.clear();
+  VERIFY( live_objects.empty() );
+}
+
+int
+main()
+{
+  test01();
+  test02();
+  test03();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/cons/1.cc b/libstdc++-v3/testsuite/20_util/any/cons/1.cc
new file mode 100644
index 00000000000..d66320413d4
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/cons/1.cc
@@ -0,0 +1,58 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <testsuite_hooks.h>
+
+using std::any;
+
+void test01()
+{
+  any x;
+  VERIFY( x.empty() );
+
+  any y(x);
+  VERIFY( x.empty() );
+  VERIFY( y.empty() );
+
+  any z(std::move(y));
+  VERIFY( y.empty() );
+  VERIFY( z.empty() );
+}
+
+void test02()
+{
+  any x(1);
+  VERIFY( !x.empty() );
+
+  any y(x);
+  VERIFY( !x.empty() );
+  VERIFY( !y.empty() );
+
+  any z(std::move(y));
+  VERIFY( y.empty() );
+  VERIFY( !z.empty() );
+}
+
+int main()
+{
+  test01();
+  test02();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/cons/2.cc b/libstdc++-v3/testsuite/20_util/any/cons/2.cc
new file mode 100644
index 00000000000..613fa626d06
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/cons/2.cc
@@ -0,0 +1,49 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <testsuite_hooks.h>
+
+using std::any;
+using std::any_cast;
+
+struct X
+{
+  bool moved = false;
+  bool moved_from = false;
+  X() = default;
+  X(const X&) = default;
+  X(X&& x) : moved(true) { x.moved_from = true; }
+};
+
+void test01()
+{
+  X x;
+  any a1(x);
+  VERIFY(x.moved_from == false);
+  any a2(std::move(x));
+  VERIFY(x.moved_from == true);
+  VERIFY(any_cast<X&>(a2).moved == true );
+}
+
+int main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/cons/aligned.cc b/libstdc++-v3/testsuite/20_util/any/cons/aligned.cc
new file mode 100644
index 00000000000..9b23d8ac0f4
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/cons/aligned.cc
@@ -0,0 +1,52 @@
+// Copyright (C) 2015-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++17" }
+
+#include <any>
+#include <cstdint>
+#include <testsuite_hooks.h>
+
+// Alignment requiremnts of this type prevent it being stored in 'any'
+struct alignas(2 * alignof(void*)) X { };
+
+bool
+stored_internally(void* obj, const std::any& a)
+{
+  std::uintptr_t a_addr = reinterpret_cast<std::uintptr_t>(&a);
+  std::uintptr_t a_end = a_addr + sizeof(a);
+  std::uintptr_t obj_addr = reinterpret_cast<std::uintptr_t>(obj);
+  return (a_addr <= obj_addr) && (obj_addr < a_end);
+}
+
+void
+test01()
+{
+  std::any a = X{};
+  X& x = std::any_cast<X&>(a);
+  VERIFY( !stored_internally(&x, a) );
+
+  a = 'X';
+  char& c = std::any_cast<char&>(a);
+  VERIFY( stored_internally(&c, a) );
+}
+
+int
+main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/cons/nontrivial.cc b/libstdc++-v3/testsuite/20_util/any/cons/nontrivial.cc
new file mode 100644
index 00000000000..bb46452c619
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/cons/nontrivial.cc
@@ -0,0 +1,75 @@
+// Copyright (C) 2015-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++17" }
+
+#include <any>
+#include <testsuite_hooks.h>
+
+struct LocationAware
+{
+  LocationAware() { }
+  ~LocationAware() { VERIFY(self == this); }
+  LocationAware(const LocationAware&) { }
+  LocationAware& operator=(const LocationAware&) { return *this; }
+  LocationAware(LocationAware&&) noexcept { }
+  LocationAware& operator=(LocationAware&&) noexcept { return *this; }
+
+  void* const self = this;
+};
+static_assert(std::is_nothrow_move_constructible<LocationAware>::value, "");
+static_assert(!std::is_trivially_copyable<LocationAware>::value, "");
+
+using std::any;
+
+void
+test01()
+{
+
+  LocationAware l;
+  any a = l;
+}
+
+void
+test02()
+{
+  LocationAware l;
+  any a = l;
+  any b = a;
+  {
+    any tmp = std::move(a);
+    a = std::move(b);
+    b = std::move(tmp);
+  }
+}
+
+void
+test03()
+{
+  LocationAware l;
+  any a = l;
+  any b = a;
+  swap(a, b);
+}
+
+int
+main()
+{
+  test01();
+  test02();
+  test03();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/misc/any_cast.cc b/libstdc++-v3/testsuite/20_util/any/misc/any_cast.cc
new file mode 100644
index 00000000000..96f9419e070
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/misc/any_cast.cc
@@ -0,0 +1,114 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <string>
+#include <cstring>
+#include <testsuite_hooks.h>
+
+using std::any;
+using std::any_cast;
+
+void test01()
+{
+  using std::string;
+  using std::strcmp;
+
+  // taken from example in N3804 proposal
+
+  any x(5);                                   // x holds int
+  VERIFY(any_cast<int>(x) == 5);              // cast to value
+  any_cast<int&>(x) = 10;                     // cast to reference
+  VERIFY(any_cast<int>(x) == 10); 
+
+  x = "Meow";                                 // x holds const char*
+  VERIFY(strcmp(any_cast<const char*>(x), "Meow") == 0);
+  any_cast<const char*&>(x) = "Harry";
+  VERIFY(strcmp(any_cast<const char*>(x), "Harry") == 0);
+
+  x = string("Meow");                         // x holds string
+  string s, s2("Jane");
+  s = move(any_cast<string&>(x));             // move from any 
+  VERIFY(s == "Meow");
+  any_cast<string&>(x) = move(s2);            // move to any
+  VERIFY(any_cast<const string&>(x) == "Jane");
+
+  string cat("Meow");
+  const any y(cat);                           // const y holds string
+  VERIFY(any_cast<const string&>(y) == cat);
+}
+
+void test02()
+{
+  using std::bad_any_cast;
+  any x(1);
+  auto p = any_cast<double>(&x);
+  VERIFY(p == nullptr);
+
+  x = 1.0;
+  p = any_cast<double>(&x);
+  VERIFY(p != nullptr);
+
+  x = any();
+  p = any_cast<double>(&x);
+  VERIFY(p == nullptr);
+
+  try {
+    any_cast<double>(x);
+    VERIFY(false);
+  } catch (const bad_any_cast&) {
+  }
+}
+
+static int move_count = 0;
+
+void test03()
+{
+  struct MoveEnabled
+  {
+    MoveEnabled(MoveEnabled&&)
+    {
+      ++move_count;
+    }
+    MoveEnabled() = default;
+    MoveEnabled(const MoveEnabled&) = default;
+  };
+  MoveEnabled m;
+  MoveEnabled m2 = any_cast<MoveEnabled>(any(m));
+  VERIFY(move_count == 1);
+  MoveEnabled&& m3 = any_cast<MoveEnabled&&>(any(m));
+  VERIFY(move_count == 1);
+  struct MoveDeleted
+  {
+    MoveDeleted(MoveDeleted&&) = delete;
+    MoveDeleted() = default;
+    MoveDeleted(const MoveDeleted&) = default;
+  };
+  MoveDeleted md;
+  MoveDeleted&& md2 = any_cast<MoveDeleted>(any(std::move(md)));
+  MoveDeleted&& md3 = any_cast<MoveDeleted&&>(any(std::move(md)));
+}
+
+int main()
+{
+  test01();
+  test02();
+  test03();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/misc/any_cast_neg.cc b/libstdc++-v3/testsuite/20_util/any/misc/any_cast_neg.cc
new file mode 100644
index 00000000000..43c6c6b4a26
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/misc/any_cast_neg.cc
@@ -0,0 +1,30 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+
+void test01()
+{
+  using std::any;
+  using std::any_cast;
+
+  const any y(1);
+  any_cast<int&>(y); // { dg-error "qualifiers" "" { target { *-*-* } } 357 }
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/misc/any_cast_no_rtti.cc b/libstdc++-v3/testsuite/20_util/any/misc/any_cast_no_rtti.cc
new file mode 100644
index 00000000000..fa16f2371be
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/misc/any_cast_no_rtti.cc
@@ -0,0 +1,54 @@
+// { dg-options "-std=gnu++17 -fno-rtti" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <string>
+#include <cstring>
+#include <testsuite_hooks.h>
+
+using std::any;
+using std::any_cast;
+
+void test01()
+{
+  using std::bad_any_cast;
+  any x(1);
+  auto p = any_cast<double>(&x);
+  VERIFY(p == nullptr);
+
+  x = 1.0;
+  p = any_cast<double>(&x);
+  VERIFY(p != nullptr);
+
+  x = any();
+  p = any_cast<double>(&x);
+  VERIFY(p == nullptr);
+
+  try {
+    any_cast<double>(x);
+    VERIFY(false);
+  } catch (const bad_any_cast&) {
+  }
+}
+
+int main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/misc/swap.cc b/libstdc++-v3/testsuite/20_util/any/misc/swap.cc
new file mode 100644
index 00000000000..0b3e1eb26de
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/misc/swap.cc
@@ -0,0 +1,38 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <testsuite_hooks.h>
+
+using std::any;
+
+void test01()
+{
+  any x(1);
+  any y;
+  swap(x, y);
+  VERIFY( x.empty() );
+  VERIFY( !y.empty() );
+}
+
+int main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/modifiers/1.cc b/libstdc++-v3/testsuite/20_util/any/modifiers/1.cc
new file mode 100644
index 00000000000..36b9c247843
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/modifiers/1.cc
@@ -0,0 +1,44 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <testsuite_hooks.h>
+
+using std::any;
+
+void test01()
+{
+  any x(1);
+  any y;
+  x.swap(y);
+  VERIFY( x.empty() );
+  VERIFY( !y.empty() );
+  x.swap(y);
+  VERIFY( !x.empty() );
+  VERIFY( y.empty() );
+
+  x.clear();
+  VERIFY( x.empty() );
+}
+
+int main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/observers/type.cc b/libstdc++-v3/testsuite/20_util/any/observers/type.cc
new file mode 100644
index 00000000000..af4dc30c766
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/observers/type.cc
@@ -0,0 +1,39 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <testsuite_hooks.h>
+
+using std::any;
+
+void test01()
+{
+  any x;
+  VERIFY( x.type() == typeid(void) );
+  x = 1;
+  VERIFY( x.type() == typeid(int) );
+  x = any();
+  VERIFY( x.type() == typeid(void) );
+}
+
+int main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/20_util/any/typedefs.cc b/libstdc++-v3/testsuite/20_util/any/typedefs.cc
new file mode 100644
index 00000000000..11a57924b25
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/any/typedefs.cc
@@ -0,0 +1,30 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <any>
+#include <type_traits>
+#include <typeinfo>
+
+using check1_t = std::any;
+using check2_t = std::bad_any_cast;
+
+static_assert(std::is_base_of<std::bad_cast, check2_t>::value,
+	      "bad_any_cast must derive from bad_cast");
+
diff --git a/libstdc++-v3/testsuite/20_util/optional/assignment/1.cc b/libstdc++-v3/testsuite/20_util/optional/assignment/1.cc
new file mode 100644
index 00000000000..25c62418b44
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/assignment/1.cc
@@ -0,0 +1,195 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct exception {};
+
+int counter = 0;
+
+struct mixin_counter
+{
+  mixin_counter() { ++counter; }
+  mixin_counter(mixin_counter const&) { ++counter; }
+  ~mixin_counter() { --counter; }
+};
+
+struct value_type : private mixin_counter
+{
+  enum state_type
+  {
+    zero,
+    moved_from,
+    throwing_construction,
+    throwing_copy,
+    throwing_copy_assignment,
+    throwing_move,
+    throwing_move_assignment,
+    threw,
+  };
+
+  value_type() = default;
+
+  explicit value_type(state_type state_)
+  : state(state_)
+  {
+    throw_if(throwing_construction);
+  }
+
+  value_type(value_type const& other)
+  : state(other.state)
+  {
+    throw_if(throwing_copy);
+  }
+
+  value_type&
+  operator=(value_type const& other)
+  {
+    state = other.state;
+    throw_if(throwing_copy_assignment);
+    return *this;
+  }
+
+  value_type(value_type&& other)
+  : state(other.state)
+  {
+    other.state = moved_from;
+    throw_if(throwing_move);
+  }
+
+  value_type&
+  operator=(value_type&& other)
+  {
+    state = other.state;
+    other.state = moved_from;
+    throw_if(throwing_move_assignment);
+    return *this;
+  }
+
+  void throw_if(state_type match)
+  {
+    if(state == match)
+    {
+      state = threw;
+      throw exception {};
+    }
+  }
+
+  state_type state = zero;
+};
+
+int main()
+{
+  using O = std::optional<value_type>;
+  using S = value_type::state_type;
+  auto const make = [](S s = S::zero) { return O { std::in_place, s }; };
+
+  enum outcome_type { nothrow, caught, bad_catch };
+
+  // Check copy/move assignment for disengaged optional
+
+  // From disengaged optional
+  {
+    O o;
+    VERIFY( !o );
+    O p;
+    o = p;
+    VERIFY( !o );
+    VERIFY( !p );
+  }
+
+  {
+    O o;
+    VERIFY( !o );
+    O p;
+    o = std::move(p);
+    VERIFY( !o );
+    VERIFY( !p );
+  }
+
+  {
+    O o;
+    VERIFY( !o );
+    o = {};
+    VERIFY( !o );
+  }
+
+  // From engaged optional
+  {
+    O o;
+    VERIFY( !o );
+    O p = make(S::throwing_copy_assignment);
+    o = p;
+    VERIFY( o && o->state == S::throwing_copy_assignment );
+    VERIFY( p && p->state == S::throwing_copy_assignment );
+  }
+
+  {
+    O o;
+    VERIFY( !o );
+    O p = make(S::throwing_move_assignment);
+    o = std::move(p);
+    VERIFY( o && o->state == S::throwing_move_assignment );
+    VERIFY( p && p->state == S::moved_from );
+  }
+
+  {
+    outcome_type outcome {};
+    O o;
+    VERIFY( !o );
+    O p = make(S::throwing_copy);
+
+    try
+    {
+      o = p;
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( outcome == caught );
+    VERIFY( !o );
+    VERIFY( p && p->state == S::throwing_copy );
+  }
+
+  {
+    outcome_type outcome {};
+    O o;
+    VERIFY( !o );
+    O p = make(S::throwing_move);
+
+    try
+    {
+      o = std::move(p);
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( outcome == caught );
+    VERIFY( !o );
+    VERIFY( p && p->state == S::moved_from );
+  }
+
+  VERIFY( counter == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/assignment/2.cc b/libstdc++-v3/testsuite/20_util/optional/assignment/2.cc
new file mode 100644
index 00000000000..d9d6ffab51f
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/assignment/2.cc
@@ -0,0 +1,193 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct exception {};
+
+int counter = 0;
+
+struct mixin_counter
+{
+  mixin_counter() { ++counter; }
+  mixin_counter(mixin_counter const&) { ++counter; }
+  ~mixin_counter() { --counter; }
+};
+
+struct value_type : private mixin_counter
+{
+  enum state_type
+  {
+    zero,
+    moved_from,
+    throwing_construction,
+    throwing_copy,
+    throwing_copy_assignment,
+    throwing_move,
+    throwing_move_assignment,
+    threw,
+  };
+
+  value_type() = default;
+
+  explicit value_type(state_type state_)
+  : state(state_)
+  {
+    throw_if(throwing_construction);
+  }
+
+  value_type(value_type const& other)
+  : state(other.state)
+  {
+    throw_if(throwing_copy);
+  }
+
+  value_type&
+  operator=(value_type const& other)
+  {
+    state = other.state;
+    throw_if(throwing_copy_assignment);
+    return *this;
+  }
+
+  value_type(value_type&& other)
+  : state(other.state)
+  {
+    other.state = moved_from;
+    throw_if(throwing_move);
+  }
+
+  value_type&
+  operator=(value_type&& other)
+  {
+    state = other.state;
+    other.state = moved_from;
+    throw_if(throwing_move_assignment);
+    return *this;
+  }
+
+  void throw_if(state_type match)
+  {
+    if(state == match)
+    {
+      state = threw;
+      throw exception {};
+    }
+  }
+
+  state_type state = zero;
+};
+
+int main()
+{
+  using O = std::optional<value_type>;
+  using S = value_type::state_type;
+  auto const make = [](S s = S::zero) { return O { std::in_place, s }; };
+
+  enum outcome_type { nothrow, caught, bad_catch };
+
+  // Check copy/move assignment for engaged optional
+
+  // From disengaged optional
+  {
+    O o = make(S::zero);
+    VERIFY( o );
+    O p;
+    o = p;
+    VERIFY( !o );
+    VERIFY( !p );
+  }
+
+  {
+    O o = make(S::zero);
+    VERIFY( o );
+    O p;
+    o = std::move(p);
+    VERIFY( !o );
+    VERIFY( !p );
+  }
+
+  {
+    O o = make(S::zero);
+    VERIFY( o );
+    o = {};
+    VERIFY( !o );
+  }
+
+  // From engaged optional
+  {
+    O o = make(S::zero);
+    VERIFY( o );
+    O p = make(S::throwing_copy);
+    o = p;
+    VERIFY( o && o->state == S::throwing_copy);
+    VERIFY( p && p->state == S::throwing_copy);
+  }
+
+  {
+    O o = make(S::zero);
+    VERIFY( o );
+    O p = make(S::throwing_move);
+    o = std::move(p);
+    VERIFY( o && o->state == S::throwing_move);
+    VERIFY( p && p->state == S::moved_from);
+  }
+
+  {
+    outcome_type outcome {};
+    O o = make(S::zero);
+    VERIFY( o );
+    O p = make(S::throwing_copy_assignment);
+
+    try
+    {
+      o = p;
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( o && o->state == S::threw);
+    VERIFY( p && p->state == S::throwing_copy_assignment);
+  }
+
+  {
+    outcome_type outcome {};
+    O o = make(S::zero);
+    VERIFY( o );
+    O p = make(S::throwing_move_assignment);
+
+    try
+    {
+      o = std::move(p);
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( o && o->state == S::threw);
+    VERIFY( p && p->state == S::moved_from);
+  }
+
+  VERIFY( counter == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/assignment/3.cc b/libstdc++-v3/testsuite/20_util/optional/assignment/3.cc
new file mode 100644
index 00000000000..ce038b37cac
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/assignment/3.cc
@@ -0,0 +1,158 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct exception {};
+
+int counter = 0;
+
+struct mixin_counter
+{
+  mixin_counter() { ++counter; }
+  mixin_counter(mixin_counter const&) { ++counter; }
+  ~mixin_counter() { --counter; }
+};
+
+struct value_type : private mixin_counter
+{
+  enum state_type
+  {
+    zero,
+    moved_from,
+    throwing_construction,
+    throwing_copy,
+    throwing_copy_assignment,
+    throwing_move,
+    throwing_move_assignment,
+    threw,
+  };
+
+  value_type() = default;
+
+  explicit value_type(state_type state_)
+  : state(state_)
+  {
+    throw_if(throwing_construction);
+  }
+
+  value_type(value_type const& other)
+  : state(other.state)
+  {
+    throw_if(throwing_copy);
+  }
+
+  value_type&
+  operator=(value_type const& other)
+  {
+    state = other.state;
+    throw_if(throwing_copy_assignment);
+    return *this;
+  }
+
+  value_type(value_type&& other)
+  : state(other.state)
+  {
+    other.state = moved_from;
+    throw_if(throwing_move);
+  }
+
+  value_type&
+  operator=(value_type&& other)
+  {
+    state = other.state;
+    other.state = moved_from;
+    throw_if(throwing_move_assignment);
+    return *this;
+  }
+
+  void throw_if(state_type match)
+  {
+    if(state == match)
+    {
+      state = threw;
+      throw exception {};
+    }
+  }
+
+  state_type state = zero;
+};
+
+int main()
+{
+  using O = std::optional<value_type>;
+  using S = value_type::state_type;
+  auto const make = [](S s = S::zero) { return value_type { s }; };
+
+  enum outcome_type { nothrow, caught, bad_catch };
+
+  // Check value assignment for disengaged optional
+
+  {
+    O o;
+    value_type v = make(S::throwing_copy_assignment);
+    o = v;
+    VERIFY( o && o->state == S::throwing_copy_assignment );
+  }
+
+  {
+    O o;
+    value_type v = make(S::throwing_move_assignment);
+    o = std::move(v);
+    VERIFY( o && o->state == S::throwing_move_assignment );
+  }
+
+  {
+    outcome_type outcome {};
+    O o;
+    value_type v = make(S::throwing_copy);
+
+    try
+    {
+      o = v;
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( !o );
+  }
+
+  {
+    outcome_type outcome {};
+    O o;
+    value_type v = make(S::throwing_move);
+
+    try
+    {
+      o = std::move(v);
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( !o );
+  }
+
+  VERIFY( counter == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/assignment/4.cc b/libstdc++-v3/testsuite/20_util/optional/assignment/4.cc
new file mode 100644
index 00000000000..7b972381831
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/assignment/4.cc
@@ -0,0 +1,158 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct exception {};
+
+int counter = 0;
+
+struct mixin_counter
+{
+  mixin_counter() { ++counter; }
+  mixin_counter(mixin_counter const&) { ++counter; }
+  ~mixin_counter() { --counter; }
+};
+
+struct value_type : private mixin_counter
+{
+  enum state_type
+  {
+    zero,
+    moved_from,
+    throwing_construction,
+    throwing_copy,
+    throwing_copy_assignment,
+    throwing_move,
+    throwing_move_assignment,
+    threw,
+  };
+
+  value_type() = default;
+
+  explicit value_type(state_type state_)
+  : state(state_)
+  {
+    throw_if(throwing_construction);
+  }
+
+  value_type(value_type const& other)
+  : state(other.state)
+  {
+    throw_if(throwing_copy);
+  }
+
+  value_type&
+  operator=(value_type const& other)
+  {
+    state = other.state;
+    throw_if(throwing_copy_assignment);
+    return *this;
+  }
+
+  value_type(value_type&& other)
+  : state(other.state)
+  {
+    other.state = moved_from;
+    throw_if(throwing_move);
+  }
+
+  value_type&
+  operator=(value_type&& other)
+  {
+    state = other.state;
+    other.state = moved_from;
+    throw_if(throwing_move_assignment);
+    return *this;
+  }
+
+  void throw_if(state_type match)
+  {
+    if(state == match)
+    {
+      state = threw;
+      throw exception {};
+    }
+  }
+
+  state_type state = zero;
+};
+
+int main()
+{
+  using O = std::optional<value_type>;
+  using S = value_type::state_type;
+  auto const make = [](S s = S::zero) { return value_type { s }; };
+
+  enum outcome_type { nothrow, caught, bad_catch };
+
+  // Check value assignment for engaged optional
+
+  {
+    O o = make();
+    value_type v = make(S::throwing_copy);
+    o = v;
+    VERIFY( o && o->state == S::throwing_copy);
+  }
+
+  {
+    O o = make();
+    value_type v = make(S::throwing_move);
+    o = std::move(v);
+    VERIFY( o && o->state == S::throwing_move);
+  }
+
+  {
+    outcome_type outcome {};
+    O o = make();
+    value_type v = make(S::throwing_copy_assignment);
+
+    try
+    {
+      o = v;
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( o && o->state == S::threw );
+  }
+
+  {
+    outcome_type outcome {};
+    O o = make();
+    value_type v = make(S::throwing_move_assignment);
+
+    try
+    {
+      o = std::move(v);
+    }
+    catch(exception const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( o && o->state == S::threw );
+  }
+
+  VERIFY( counter == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/assignment/5.cc b/libstdc++-v3/testsuite/20_util/optional/assignment/5.cc
new file mode 100644
index 00000000000..e450a461399
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/assignment/5.cc
@@ -0,0 +1,66 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int counter = 0;
+
+struct mixin_counter
+{
+  mixin_counter() { ++counter; }
+  mixin_counter(mixin_counter const&) { ++counter; }
+  ~mixin_counter() { --counter; }
+};
+
+struct value_type : private mixin_counter { };
+
+int main()
+{
+  using O = std::optional<value_type>;
+
+  // Check std::nullopt_t and 'default' (= {}) assignment
+
+  {
+    O o;
+    o = std::nullopt;
+    VERIFY( !o );
+  }
+
+  {
+    O o { std::in_place };
+    o = std::nullopt;
+    VERIFY( !o );
+  }
+
+  {
+    O o;
+    o = {};
+    VERIFY( !o );
+  }
+
+  {
+    O o { std::in_place };
+    o = {};
+    VERIFY( !o );
+  }
+
+  VERIFY( counter == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/assignment/6.cc b/libstdc++-v3/testsuite/20_util/optional/assignment/6.cc
new file mode 100644
index 00000000000..78e975bbe32
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/assignment/6.cc
@@ -0,0 +1,83 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int counter = 0;
+
+struct mixin_counter
+{
+  mixin_counter() { ++counter; }
+  mixin_counter(mixin_counter const&) { ++counter; }
+  ~mixin_counter() { --counter; }
+};
+
+struct value_type : private mixin_counter
+{
+  value_type() = default;
+  value_type(int) : state(1) { }
+  value_type(std::initializer_list<char>, const char*) : state(2) { }
+  int state = 0;
+};
+
+int main()
+{
+  using O = std::optional<value_type>;
+
+  // Check emplace
+
+  {
+    O o;
+    o.emplace();
+    VERIFY( o && o->state == 0 );
+  }
+  {
+    O o { std::in_place, 0 };
+    o.emplace();
+    VERIFY( o && o->state == 0 );
+  }
+
+  {
+    O o;
+    o.emplace(0);
+    VERIFY( o && o->state == 1 );
+  }
+  {
+    O o { std::in_place };
+    o.emplace(0);
+    VERIFY( o && o->state == 1 );
+  }
+
+  {
+    O o;
+    o.emplace({ 'a' }, "");
+    VERIFY( o && o->state == 2 );
+  }
+  {
+    O o { std::in_place };
+    o.emplace({ 'a' }, "");
+    VERIFY( o && o->state == 2 );
+  }
+
+  static_assert( !std::is_constructible<O, std::initializer_list<int>, int>(), "" );
+
+  VERIFY( counter == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/cons/copy.cc b/libstdc++-v3/testsuite/20_util/optional/cons/copy.cc
new file mode 100644
index 00000000000..58f91768df4
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/cons/copy.cc
@@ -0,0 +1,126 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct tracker
+{
+  tracker(int value) : value(value) { ++count; }
+  ~tracker() { --count; }
+
+  tracker(tracker const& other) : value(other.value) { ++count; }
+  tracker(tracker&& other) : value(other.value)
+  {
+    other.value = -1;
+    ++count;
+  }
+
+  tracker& operator=(tracker const&) = default;
+  tracker& operator=(tracker&&) = default;
+
+  int value;
+
+  static int count;
+};
+
+int tracker::count = 0;
+
+struct exception { };
+
+struct throwing_copy
+{
+  throwing_copy() = default;
+  throwing_copy(throwing_copy const&) { throw exception {}; }
+};
+
+int main()
+{
+  // [20.5.4.1] Constructors
+
+  {
+    std::optional<long> o;
+    auto copy = o;
+    VERIFY( !copy );
+    VERIFY( !o );
+  }
+
+  {
+    const long val = 0x1234ABCD;
+    std::optional<long> o { std::in_place, val};
+    auto copy = o;
+    VERIFY( copy );
+    VERIFY( *copy == val );
+    VERIFY( o && o == val );
+  }
+
+  {
+    std::optional<tracker> o;
+    auto copy = o;
+    VERIFY( !copy );
+    VERIFY( tracker::count == 0 );
+    VERIFY( !o );
+  }
+
+  {
+    std::optional<tracker> o { std::in_place, 333 };
+    auto copy = o;
+    VERIFY( copy );
+    VERIFY( copy->value == 333 );
+    VERIFY( tracker::count == 2 );
+    VERIFY( o && o->value == 333 );
+  }
+
+  enum outcome { nothrow, caught, bad_catch };
+
+  {
+    outcome result = nothrow;
+    std::optional<throwing_copy> o;
+
+    try
+    {
+      auto copy = o;
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == nothrow );
+  }
+
+  {
+    outcome result = nothrow;
+    std::optional<throwing_copy> o { std::in_place };
+
+    try
+    {
+      auto copy = o;
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == caught );
+  }
+
+  VERIFY( tracker::count == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/cons/default.cc b/libstdc++-v3/testsuite/20_util/optional/cons/default.cc
new file mode 100644
index 00000000000..ebde86b807d
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/cons/default.cc
@@ -0,0 +1,60 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct tracker
+{
+  tracker() { ++count; }
+  ~tracker() { --count; }
+
+  tracker(tracker const&) { ++count; }
+  tracker(tracker&&) { ++count; }
+
+  tracker& operator=(tracker const&) = default;
+  tracker& operator=(tracker&&) = default;
+
+  static int count;
+};
+
+int tracker::count = 0;
+
+int main()
+{
+  // [20.5.4.1] Constructors
+
+  {
+    std::optional<tracker> o;
+    VERIFY( !o );
+  }
+
+  {
+    std::optional<tracker> o {};
+    VERIFY( !o );
+  }
+
+  {
+    std::optional<tracker> o = {};
+    VERIFY( !o );
+  }
+
+  VERIFY( tracker::count == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/cons/move.cc b/libstdc++-v3/testsuite/20_util/optional/cons/move.cc
new file mode 100644
index 00000000000..54fd8c958e5
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/cons/move.cc
@@ -0,0 +1,126 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct tracker
+{
+  tracker(int value) : value(value) { ++count; }
+  ~tracker() { --count; }
+
+  tracker(tracker const& other) : value(other.value) { ++count; }
+  tracker(tracker&& other) : value(other.value)
+  {
+    other.value = -1;
+    ++count;
+  }
+
+  tracker& operator=(tracker const&) = default;
+  tracker& operator=(tracker&&) = default;
+
+  int value;
+
+  static int count;
+};
+
+int tracker::count = 0;
+
+struct exception { };
+
+struct throwing_move
+{
+  throwing_move() = default;
+  throwing_move(throwing_move const&) { throw exception {}; }
+};
+
+int main()
+{
+  // [20.5.4.1] Constructors
+
+  {
+    std::optional<long> o;
+    auto moved_to = std::move(o);
+    VERIFY( !moved_to );
+    VERIFY( !o );
+  }
+
+  {
+    const long val = 0x1234ABCD;
+    std::optional<long> o { std::in_place, val};
+    auto moved_to = std::move(o);
+    VERIFY( moved_to );
+    VERIFY( *moved_to == val );
+    VERIFY( o && *o == val );
+  }
+
+  {
+    std::optional<tracker> o;
+    auto moved_to = std::move(o);
+    VERIFY( !moved_to );
+    VERIFY( tracker::count == 0 );
+    VERIFY( !o );
+  }
+
+  {
+    std::optional<tracker> o { std::in_place, 333 };
+    auto moved_to = std::move(o);
+    VERIFY( moved_to );
+    VERIFY( moved_to->value == 333 );
+    VERIFY( tracker::count == 2 );
+    VERIFY( o && o->value == -1 );
+  }
+
+  enum outcome { nothrow, caught, bad_catch };
+
+  {
+    outcome result = nothrow;
+    std::optional<throwing_move> o;
+
+    try
+    {
+      auto moved_to = std::move(o);
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == nothrow );
+  }
+
+  {
+    outcome result = nothrow;
+    std::optional<throwing_move> o { std::in_place };
+
+    try
+    {
+      auto moved_to = std::move(o);
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == caught );
+  }
+
+  VERIFY( tracker::count == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/cons/value.cc b/libstdc++-v3/testsuite/20_util/optional/cons/value.cc
new file mode 100644
index 00000000000..13a6e9ca4dd
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/cons/value.cc
@@ -0,0 +1,258 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <vector>
+#include <string>
+
+struct tracker
+{
+  tracker(int value) : value(value) { ++count; }
+  ~tracker() { --count; }
+
+  tracker(tracker const& other) : value(other.value) { ++count; }
+  tracker(tracker&& other) : value(other.value)
+  {
+    other.value = -1;
+    ++count;
+  }
+
+  tracker& operator=(tracker const&) = default;
+  tracker& operator=(tracker&&) = default;
+
+  int value;
+
+  static int count;
+};
+
+int tracker::count = 0;
+
+struct exception { };
+
+struct throwing_construction
+{
+  explicit throwing_construction(bool propagate) : propagate(propagate) { }
+
+  throwing_construction(throwing_construction const& other)
+  : propagate(other.propagate)
+  {
+    if(propagate)
+      throw exception {};
+  }
+
+  bool propagate;
+};
+
+int main()
+{
+  // [20.5.4.1] Constructors
+
+  {
+    auto i = 0x1234ABCD;
+    std::optional<long> o { i };
+    VERIFY( o );
+    VERIFY( *o == 0x1234ABCD );
+    VERIFY( i == 0x1234ABCD );
+  }
+
+  {
+    auto i = 0x1234ABCD;
+    std::optional<long> o = i;
+    VERIFY( o );
+    VERIFY( *o == 0x1234ABCD );
+    VERIFY( i == 0x1234ABCD );
+  }
+
+  {
+    auto i = 0x1234ABCD;
+    std::optional<long> o = { i };
+    VERIFY( o );
+    VERIFY( *o == 0x1234ABCD );
+    VERIFY( i == 0x1234ABCD );
+  }
+
+  {
+    auto i = 0x1234ABCD;
+    std::optional<long> o { std::move(i) };
+    VERIFY( o );
+    VERIFY( *o == 0x1234ABCD );
+    VERIFY( i == 0x1234ABCD );
+  }
+
+  {
+    auto i = 0x1234ABCD;
+    std::optional<long> o = std::move(i);
+    VERIFY( o );
+    VERIFY( *o == 0x1234ABCD );
+    VERIFY( i == 0x1234ABCD );
+  }
+
+  {
+    auto i = 0x1234ABCD;
+    std::optional<long> o = { std::move(i) };
+    VERIFY( o );
+    VERIFY( *o == 0x1234ABCD );
+    VERIFY( i == 0x1234ABCD );
+  }
+
+  {
+    std::vector<int> v = { 0, 1, 2, 3, 4, 5 };
+    std::optional<std::vector<int>> o { v };
+    VERIFY( !v.empty() );
+    VERIFY( o->size() == 6 );
+  }
+
+  {
+    std::vector<int> v = { 0, 1, 2, 3, 4, 5 };
+    std::optional<std::vector<int>> o = v;
+    VERIFY( !v.empty() );
+    VERIFY( o->size() == 6 );
+  }
+
+  {
+    std::vector<int> v = { 0, 1, 2, 3, 4, 5 };
+    std::optional<std::vector<int>> o { v };
+    VERIFY( !v.empty() );
+    VERIFY( o->size() == 6 );
+  }
+
+  {
+    std::vector<int> v = { 0, 1, 2, 3, 4, 5 };
+    std::optional<std::vector<int>> o { std::move(v) };
+    VERIFY( v.empty() );
+    VERIFY( o->size() == 6 );
+  }
+
+  {
+    std::vector<int> v = { 0, 1, 2, 3, 4, 5 };
+    std::optional<std::vector<int>> o = std::move(v);
+    VERIFY( v.empty() );
+    VERIFY( o->size() == 6 );
+  }
+
+  {
+    std::vector<int> v = { 0, 1, 2, 3, 4, 5 };
+    std::optional<std::vector<int>> o { std::move(v) };
+    VERIFY( v.empty() );
+    VERIFY( o->size() == 6 );
+  }
+
+  {
+    tracker t { 333 };
+    std::optional<tracker> o = t;
+    VERIFY( o->value == 333 );
+    VERIFY( tracker::count == 2 );
+    VERIFY( t.value == 333 );
+  }
+
+  {
+    tracker t { 333 };
+    std::optional<tracker> o = std::move(t);
+    VERIFY( o->value == 333 );
+    VERIFY( tracker::count == 2 );
+    VERIFY( t.value == -1 );
+  }
+
+  enum outcome { nothrow, caught, bad_catch };
+
+  {
+    outcome result = nothrow;
+    throwing_construction t { false };
+
+    try
+    {
+      std::optional<throwing_construction> o { t };
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == nothrow );
+  }
+
+  {
+    outcome result = nothrow;
+    throwing_construction t { true };
+
+    try
+    {
+      std::optional<throwing_construction> o { t };
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == caught );
+  }
+
+  {
+    outcome result = nothrow;
+    throwing_construction t { false };
+
+    try
+    {
+      std::optional<throwing_construction> o { std::move(t) };
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == nothrow );
+  }
+
+  {
+    outcome result = nothrow;
+    throwing_construction t { true };
+
+    try
+    {
+      std::optional<throwing_construction> o { std::move(t) };
+    }
+    catch(exception const&)
+    { result = caught; }
+    catch(...)
+    { result = bad_catch; }
+
+    VERIFY( result == caught );
+  }
+
+  {
+    std::optional<std::string> os = "foo";
+    struct X
+    {
+      explicit X(int) {}
+      X& operator=(int) {return *this;}
+    };
+    std::optional<X> ox{42};
+    std::optional<int> oi{42};
+    std::optional<X> ox2{oi};
+    std::optional<std::string> os2;
+    os2 = "foo";
+    std::optional<X> ox3;
+    ox3 = 42;
+    std::optional<X> ox4;
+    ox4 = oi;
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/cons/value_neg.cc b/libstdc++-v3/testsuite/20_util/optional/cons/value_neg.cc
new file mode 100644
index 00000000000..4bf5dcc4ec2
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/cons/value_neg.cc
@@ -0,0 +1,39 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <string>
+#include <memory>
+
+int main()
+{
+  {
+    struct X
+    {
+      explicit X(int) {}
+    };
+    std::optional<X> ox{42};
+    std::optional<X> ox2 = 42; // { dg-error "conversion" }
+    std::optional<std::unique_ptr<int>> oup{new int};
+    std::optional<std::unique_ptr<int>> oup2 = new int;  // { dg-error "conversion" }
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/cons/default.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/cons/default.cc
new file mode 100644
index 00000000000..ae523dfbc16
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/cons/default.cc
@@ -0,0 +1,42 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  // [20.5.4.1] Constructors
+
+  {
+    constexpr std::optional<int> o;
+    static_assert( !o, "" );
+  }
+
+  {
+    constexpr std::optional<int> o {};
+    static_assert( !o, "" );
+  }
+
+  {
+    constexpr std::optional<int> o = {};
+    static_assert( !o, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/cons/value.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/cons/value.cc
new file mode 100644
index 00000000000..de7744d3dc8
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/cons/value.cc
@@ -0,0 +1,69 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  // [20.5.4.1] Constructors
+
+  {
+    constexpr long i = 0x1234ABCD;
+    constexpr std::optional<long> o { i };
+    static_assert( o, "" );
+    static_assert( *o == 0x1234ABCD, "" );
+  }
+
+  {
+    constexpr long i = 0x1234ABCD;
+    constexpr std::optional<long> o = i;
+    static_assert( o, "" );
+    static_assert( *o == 0x1234ABCD, "" );
+  }
+
+  {
+    constexpr long i = 0x1234ABCD;
+    constexpr std::optional<long> o = { i };
+    static_assert( o, "" );
+    static_assert( *o == 0x1234ABCD, "" );
+  }
+
+  {
+    constexpr long i = 0x1234ABCD;
+    constexpr std::optional<long> o { std::move(i) };
+    static_assert( o, "" );
+    static_assert( *o == 0x1234ABCD, "" );
+  }
+
+  {
+    constexpr long i = 0x1234ABCD;
+    constexpr std::optional<long> o = std::move(i);
+    static_assert( o, "" );
+    static_assert( *o == 0x1234ABCD, "" );
+  }
+
+  {
+    constexpr long i = 0x1234ABCD;
+    constexpr std::optional<long> o = { std::move(i) };
+    static_assert( o, "" );
+    static_assert( *o == 0x1234ABCD, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/in_place.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/in_place.cc
new file mode 100644
index 00000000000..cd75275aaff
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/in_place.cc
@@ -0,0 +1,43 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  // [20.5.5] In-place construction
+  static_assert( std::is_same<decltype(std::in_place), const std::in_place_t>(), "" );
+  static_assert( std::is_empty<std::in_place_t>(), "" );
+
+  {
+    constexpr std::optional<int> o { std::in_place };
+    static_assert( o, "" );
+    static_assert( *o == int {}, "" );
+
+    static_assert( !std::is_convertible<std::in_place_t, std::optional<int>>(), "" );
+  }
+
+  {
+    constexpr std::optional<int> o { std::in_place, 42 };
+    static_assert( o, "" );
+    static_assert( *o == 42, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/make_optional.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/make_optional.cc
new file mode 100644
index 00000000000..44ee654a07b
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/make_optional.cc
@@ -0,0 +1,30 @@
+// { dg-options "-std=gnu++17" }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  constexpr int i = 42;
+  constexpr auto o = std::make_optional(i);
+  static_assert( std::is_same<decltype(o), const std::optional<int>>(), "" );
+  static_assert( o && *o == 42, "" );
+  static_assert( &*o != &i, "" );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/nullopt.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/nullopt.cc
new file mode 100644
index 00000000000..61fddefa5a4
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/nullopt.cc
@@ -0,0 +1,46 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  // [20.5.6] Disengaged state indicator
+  static_assert( std::is_same<decltype(std::nullopt), const std::nullopt_t>(), "" );
+  static_assert( std::is_empty<std::nullopt_t>(), "" );
+  static_assert( std::is_literal_type<std::nullopt_t>(), "" );
+  static_assert( !std::is_default_constructible<std::nullopt_t>(), "" );
+
+  {
+    constexpr std::optional<int> o = std::nullopt;
+    static_assert( !o, "" );
+  }
+
+  {
+    constexpr std::optional<int> o = { std::nullopt };
+    static_assert( !o, "" );
+  }
+
+  {
+    constexpr std::optional<int> o { std::nullopt };
+    static_assert( !o, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/1.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/1.cc
new file mode 100644
index 00000000000..6c06f089ec2
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/1.cc
@@ -0,0 +1,32 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  constexpr std::optional<value_type> o { value_type { 51 } };
+  static_assert( (*o).i == 51, "" );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/2.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/2.cc
new file mode 100644
index 00000000000..11363af32cb
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/2.cc
@@ -0,0 +1,35 @@
+// { dg-options "-std=gnu++17" }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+
+struct value_type
+{
+  int i;
+
+  void* operator&() { return nullptr; } // N.B. non-const
+};
+
+int main()
+{
+  constexpr std::optional<value_type> o { value_type { 51 } };
+  static_assert( o->i == 51, "" );
+  static_assert( o->i == (*o).i, "" );
+  static_assert( &o->i == &(*o).i, "" );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/3.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/3.cc
new file mode 100644
index 00000000000..118fea92087
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/3.cc
@@ -0,0 +1,33 @@
+// { dg-options "-std=gnu++17" }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  constexpr std::optional<value_type> o { value_type { 51 } };
+  static_assert( o.value().i == 51, "" );
+  static_assert( o.value().i == (*o).i, "" );
+  static_assert( &o.value().i == &(*o).i, "" );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/4.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/4.cc
new file mode 100644
index 00000000000..3e6436c6db1
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/4.cc
@@ -0,0 +1,34 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  constexpr std::optional<value_type> o { value_type { 51 } };
+  constexpr value_type fallback { 3 };
+  static_assert( o.value_or(fallback).i == 51, "" );
+  static_assert( o.value_or(fallback).i == (*o).i, "" );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/5.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/5.cc
new file mode 100644
index 00000000000..15ac84b25ee
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/observers/5.cc
@@ -0,0 +1,39 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  {
+    constexpr std::optional<value_type> o = std::nullopt;
+    static_assert( !o, "" );
+  }
+
+  {
+    constexpr std::optional<value_type> o { value_type { 51 } };
+    static_assert( o, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/1.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/1.cc
new file mode 100644
index 00000000000..c948e170125
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/1.cc
@@ -0,0 +1,99 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    const char* s;
+  };
+
+  constexpr bool
+  strcmp(const char* lhs, const char* rhs)
+  {
+    return *lhs == *rhs && (!*lhs || strcmp(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  strrel(const char* lhs, const char* rhs)
+  {
+    return (*rhs && (!*lhs || (*lhs < *rhs)))
+      || ((*lhs && *rhs && !(*rhs < *lhs)) && strrel(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i == rhs.i) && strcmp(lhs.s, rhs.s); }
+
+  constexpr bool
+  operator!=(value_type const& lhs, value_type const& rhs)
+  { return !(lhs == rhs); }
+
+  constexpr bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i < rhs.i) || (!(rhs.i < lhs.i) && strrel(lhs.s, rhs.s)); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  {
+    constexpr O o, p;
+    static_assert( o == p, "" );
+    static_assert( !(o != p), "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } }, p;
+    static_assert( !(o == p), "" );
+    static_assert( o != p, "" );
+  }
+
+  {
+    constexpr O o, p { value_type { 42, "forty-two" } };
+    static_assert( !(o == p), "" );
+    static_assert( o != p, "" );
+  }
+
+  {
+    constexpr O o { value_type { 11, "eleventy" } }, p { value_type { 42, "forty-two" } };
+    static_assert( !(o == p), "" );
+    static_assert( o != p, "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } }, p { value_type { 11, "eleventy" } };
+    static_assert( !(o == p), "" );
+    static_assert( o != p, "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } }, p { value_type { 42, "forty-two" } };
+    static_assert( o == p, "" );
+    static_assert( !(o != p), "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/2.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/2.cc
new file mode 100644
index 00000000000..9aa9273255b
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/2.cc
@@ -0,0 +1,111 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    const char* s;
+  };
+
+  constexpr bool
+  strcmp(const char* lhs, const char* rhs)
+  {
+    return *lhs == *rhs && (!*lhs || strcmp(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  strrel(const char* lhs, const char* rhs)
+  {
+    return (*rhs && (!*lhs || (*lhs < *rhs)))
+      || ((*lhs && *rhs && !(*rhs < *lhs)) && strrel(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i == rhs.i) && strcmp(lhs.s, rhs.s); }
+
+  constexpr bool
+  operator!=(value_type const& lhs, value_type const& rhs)
+  { return !(lhs == rhs); }
+
+  constexpr bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i < rhs.i) || (!(rhs.i < lhs.i) && strrel(lhs.s, rhs.s)); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  {
+    constexpr O o, p;
+    static_assert( !(o < p), "" );
+    static_assert( !(o > p), "" );
+    static_assert( o <= p, "" );
+    static_assert( o >= p, "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } }, p;
+    static_assert( !(o < p), "" );
+    static_assert( o > p, "" );
+    static_assert( !(o <= p), "" );
+    static_assert( o >= p, "" );
+  }
+
+  {
+    constexpr O o, p { value_type { 42, "forty-two" } };
+    static_assert( o < p, "" );
+    static_assert( !(o > p), "" );
+    static_assert( o <= p, "" );
+    static_assert( !(o >= p), "" );
+  }
+
+  {
+    constexpr O o { value_type { 11, "eleventy" } }, p { value_type { 42, "forty-two" } };
+    static_assert( o < p, "" );
+    static_assert( !(o > p), "" );
+    static_assert( o <= p, "" );
+    static_assert( !(o >= p), "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } }, p { value_type { 11, "eleventy" } };
+    static_assert( !(o < p), "" );
+    static_assert( o > p, "" );
+    static_assert( !(o <= p), "" );
+    static_assert( o >= p, "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } }, p { value_type { 42, "forty-two" } };
+    static_assert( !(o < p), "" );
+    static_assert( !(o > p), "" );
+    static_assert( o <= p, "" );
+    static_assert( o >= p, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/3.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/3.cc
new file mode 100644
index 00000000000..eb34f796399
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/3.cc
@@ -0,0 +1,89 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    const char* s;
+  };
+
+  constexpr bool
+  strcmp(const char* lhs, const char* rhs)
+  {
+    return *lhs == *rhs && (!*lhs || strcmp(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  strrel(const char* lhs, const char* rhs)
+  {
+    return (*rhs && (!*lhs || (*lhs < *rhs)))
+      || ((*lhs && *rhs && !(*rhs < *lhs)) && strrel(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i == rhs.i) && strcmp(lhs.s, rhs.s); }
+
+  constexpr bool
+  operator!=(value_type const& lhs, value_type const& rhs)
+  { return !(lhs == rhs); }
+
+  constexpr bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i < rhs.i) || (!(rhs.i < lhs.i) && strrel(lhs.s, rhs.s)); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  constexpr value_type reference { 42, "forty-two" };
+
+  {
+    constexpr O o;
+    static_assert( !(o == reference), "" );
+    static_assert( !(reference == o), "" );
+    static_assert( o != reference, "" );
+    static_assert( reference != o, "" );
+  }
+
+  {
+    constexpr O o { value_type { 11, "eleventy" } };
+    static_assert( !(o == reference), "" );
+    static_assert( !(reference == o), "" );
+    static_assert( o != reference, "" );
+    static_assert( reference != o, "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } };
+    static_assert( o == reference, "" );
+    static_assert( reference == o, "" );
+    static_assert( !(o != reference), "" );
+    static_assert( !(reference != o), "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/4.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/4.cc
new file mode 100644
index 00000000000..15130d4efbd
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/4.cc
@@ -0,0 +1,101 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    const char* s;
+  };
+
+  constexpr bool
+  strcmp(const char* lhs, const char* rhs)
+  {
+    return *lhs == *rhs && (!*lhs || strcmp(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  strrel(const char* lhs, const char* rhs)
+  {
+    return (*rhs && (!*lhs || (*lhs < *rhs)))
+      || ((*lhs && *rhs && !(*rhs < *lhs)) && strrel(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i == rhs.i) && strcmp(lhs.s, rhs.s); }
+
+  constexpr bool
+  operator!=(value_type const& lhs, value_type const& rhs)
+  { return !(lhs == rhs); }
+
+  constexpr bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i < rhs.i) || (!(rhs.i < lhs.i) && strrel(lhs.s, rhs.s)); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  constexpr value_type reference { 42, "forty-two" };
+
+  {
+    constexpr O o;
+    static_assert( o < reference, "" );
+    static_assert( !(reference < o), "" );
+    static_assert( !(o > reference), "" );
+    static_assert( reference > o, "" );
+    static_assert( o <= reference, "" );
+    static_assert( !(reference <= o), "" );
+    static_assert( !(o >= reference), "" );
+    static_assert( reference >= o, "" );
+  }
+
+  {
+    constexpr O o { value_type { 11, "eleventy" } };
+    static_assert( o < reference, "" );
+    static_assert( !(reference < o), "" );
+    static_assert( !(o > reference), "" );
+    static_assert( reference > o, "" );
+    static_assert( o <= reference, "" );
+    static_assert( !(reference <= o), "" );
+    static_assert( !(o >= reference), "" );
+    static_assert( reference >= o, "" );
+  }
+
+  {
+    constexpr O o { value_type { 42, "forty-two" } };
+    static_assert( !(o < reference), "" );
+    static_assert( !(reference < o), "" );
+    static_assert( !(o > reference), "" );
+    static_assert( !(reference > o), "" );
+    static_assert( o <= reference, "" );
+    static_assert( reference <= o, "" );
+    static_assert( o >= reference, "" );
+    static_assert( reference >= o, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/5.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/5.cc
new file mode 100644
index 00000000000..99a208208bc
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/5.cc
@@ -0,0 +1,80 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    const char* s;
+  };
+
+  constexpr bool
+  strcmp(const char* lhs, const char* rhs)
+  {
+    return *lhs == *rhs && (!*lhs || strcmp(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  strrel(const char* lhs, const char* rhs)
+  {
+    return (*rhs && (!*lhs || (*lhs < *rhs)))
+      || ((*lhs && *rhs && !(*rhs < *lhs)) && strrel(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i == rhs.i) && strcmp(lhs.s, rhs.s); }
+
+  constexpr bool
+  operator!=(value_type const& lhs, value_type const& rhs)
+  { return !(lhs == rhs); }
+
+  constexpr bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i < rhs.i) || (!(rhs.i < lhs.i) && strrel(lhs.s, rhs.s)); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+  using std::nullopt;
+
+  {
+    constexpr O o;
+    static_assert( o == nullopt, "" );
+    static_assert( nullopt == o, "" );
+    static_assert( !(o != nullopt), "" );
+    static_assert( !(nullopt != o), "" );
+  }
+
+  {
+    constexpr O o { std::in_place };
+    static_assert( !(o == nullopt), "" );
+    static_assert( !(nullopt == o), "" );
+    static_assert( o != nullopt, "" );
+    static_assert( nullopt != o, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/6.cc b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/6.cc
new file mode 100644
index 00000000000..7337287852b
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/constexpr/relops/6.cc
@@ -0,0 +1,88 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    const char* s;
+  };
+
+  constexpr bool
+  strcmp(const char* lhs, const char* rhs)
+  {
+    return *lhs == *rhs && (!*lhs || strcmp(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  strrel(const char* lhs, const char* rhs)
+  {
+    return (*rhs && (!*lhs || (*lhs < *rhs)))
+      || ((*lhs && *rhs && !(*rhs < *lhs)) && strrel(lhs + 1, rhs + 1));
+  }
+
+  constexpr bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i == rhs.i) && strcmp(lhs.s, rhs.s); }
+
+  constexpr bool
+  operator!=(value_type const& lhs, value_type const& rhs)
+  { return !(lhs == rhs); }
+
+  constexpr bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return (lhs.i < rhs.i) || (!(rhs.i < lhs.i) && strrel(lhs.s, rhs.s)); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+  using std::nullopt;
+
+  {
+    constexpr O o;
+    static_assert( !(o < nullopt), "" );
+    static_assert( !(nullopt < o), "" );
+    static_assert( !(o > nullopt), "" );
+    static_assert( !(nullopt > o), "" );
+    static_assert( o <= nullopt, "" );
+    static_assert( nullopt <= o, "" );
+    static_assert( o >= nullopt, "" );
+    static_assert( nullopt >= o, "" );
+  }
+
+  {
+    constexpr O o { std::in_place };
+    static_assert( !(o < nullopt), "" );
+    static_assert( nullopt < o, "" );
+    static_assert( o > nullopt, "" );
+    static_assert( !(nullopt > o), "" );
+    static_assert( !(o <= nullopt), "" );
+    static_assert( nullopt <= o, "" );
+    static_assert( o >= nullopt, "" );
+    static_assert( !(nullopt >= o), "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/in_place.cc b/libstdc++-v3/testsuite/20_util/optional/in_place.cc
new file mode 100644
index 00000000000..ef8c744f1dc
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/in_place.cc
@@ -0,0 +1,66 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <vector>
+
+int main()
+{
+  // [20.5.5] In-place construction
+  static_assert( std::is_same<decltype(std::in_place), const std::in_place_t>(), "" );
+  static_assert( std::is_empty<std::in_place_t>(), "" );
+
+  {
+    std::optional<int> o { std::in_place };
+    VERIFY( o );
+    VERIFY( *o == int() );
+
+    static_assert( !std::is_convertible<std::in_place_t, std::optional<int>>(), "" );
+  }
+
+  {
+    std::optional<int> o { std::in_place, 42 };
+    VERIFY( o );
+    VERIFY( *o == 42 );
+  }
+
+  {
+    std::optional<std::vector<int>> o { std::in_place, 18, 4 };
+    VERIFY( o );
+    VERIFY( o->size() == 18 );
+    VERIFY( (*o)[17] == 4 );
+  }
+
+  {
+    std::optional<std::vector<int>> o { std::in_place, { 18, 4 } };
+    VERIFY( o );
+    VERIFY( o->size() == 2 );
+    VERIFY( (*o)[0] == 18 );
+  }
+
+  {
+    std::optional<std::vector<int>> o { std::in_place, { 18, 4 }, std::allocator<int> {} };
+    VERIFY( o );
+    VERIFY( o->size() == 2 );
+    VERIFY( (*o)[0] == 18 );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/make_optional.cc b/libstdc++-v3/testsuite/20_util/optional/make_optional.cc
new file mode 100644
index 00000000000..6f245c716ad
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/make_optional.cc
@@ -0,0 +1,31 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  const int i = 42;
+  auto o = std::make_optional(i);
+  static_assert( std::is_same<decltype(o), std::optional<int>>(), "" );
+  VERIFY( o && *o == 42 );
+  VERIFY( &*o != &i );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/nullopt.cc b/libstdc++-v3/testsuite/20_util/optional/nullopt.cc
new file mode 100644
index 00000000000..f9ee748b9c2
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/nullopt.cc
@@ -0,0 +1,46 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+int main()
+{
+  // [20.5.6] Disengaged state indicator
+  static_assert( std::is_same<decltype(std::nullopt), const std::nullopt_t>(), "" );
+  static_assert( std::is_empty<std::nullopt_t>(), "" );
+  static_assert( std::is_literal_type<std::nullopt_t>(), "" );
+  static_assert( !std::is_default_constructible<std::nullopt_t>(), "" );
+
+  {
+    std::optional<int> o = std::nullopt;
+    VERIFY( !o );
+  }
+
+  {
+    std::optional<int> o = { std::nullopt };
+    VERIFY( !o );
+  }
+
+  {
+    std::optional<int> o { std::nullopt };
+    VERIFY( !o );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/observers/1.cc b/libstdc++-v3/testsuite/20_util/optional/observers/1.cc
new file mode 100644
index 00000000000..ba10bce7119
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/observers/1.cc
@@ -0,0 +1,33 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  std::optional<value_type> o { value_type { 51 } };
+  VERIFY( (*o).i == 51 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/observers/2.cc b/libstdc++-v3/testsuite/20_util/optional/observers/2.cc
new file mode 100644
index 00000000000..d3799b9214a
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/observers/2.cc
@@ -0,0 +1,37 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct value_type
+{
+  int i;
+};
+
+void* operator&(const value_type&) = delete;
+
+int main()
+{
+  std::optional<value_type> o { value_type { 51 } };
+  VERIFY( o->i == 51 );
+  VERIFY( o->i == (*o).i );
+  VERIFY( &o->i == &(*o).i );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/observers/3.cc b/libstdc++-v3/testsuite/20_util/optional/observers/3.cc
new file mode 100644
index 00000000000..9ad5d01ae42
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/observers/3.cc
@@ -0,0 +1,58 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  {
+    std::optional<value_type> o { value_type { 51 } };
+    VERIFY( o.value().i == 51 );
+    VERIFY( o.value().i == (*o).i );
+    VERIFY( &o.value().i == &(*o).i );
+  }
+
+  {
+    enum outcome_type { nothrow, caught, bad_catch };
+
+    outcome_type outcome {};
+    std::optional<value_type> o = std::nullopt;
+    bool called = false;
+    auto const eat = [&called](int) { called = true; };
+
+    try
+    {
+      eat(o.value().i);
+    }
+    catch(std::bad_optional_access const&)
+    { outcome = caught; }
+    catch(...)
+    { outcome = bad_catch; }
+
+    VERIFY( outcome == caught );
+    VERIFY( !called );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/observers/4.cc b/libstdc++-v3/testsuite/20_util/optional/observers/4.cc
new file mode 100644
index 00000000000..9a305674fb0
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/observers/4.cc
@@ -0,0 +1,35 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  std::optional<value_type> o { value_type { 51 } };
+  value_type fallback { 3 };
+  VERIFY( o.value_or(fallback).i == 51 );
+  VERIFY( o.value_or(fallback).i == (*o).i );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/observers/5.cc b/libstdc++-v3/testsuite/20_util/optional/observers/5.cc
new file mode 100644
index 00000000000..386d81de2e0
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/observers/5.cc
@@ -0,0 +1,40 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct value_type
+{
+  int i;
+};
+
+int main()
+{
+  {
+    std::optional<value_type> o = std::nullopt;
+    VERIFY( !o );
+  }
+
+  {
+    std::optional<value_type> o { value_type { 51 } };
+    VERIFY( o );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/relops/1.cc b/libstdc++-v3/testsuite/20_util/optional/relops/1.cc
new file mode 100644
index 00000000000..62770329eff
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/relops/1.cc
@@ -0,0 +1,85 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <tuple>
+#include <string>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    std::string s;
+  };
+
+  bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); }
+
+  bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  {
+    O o, p;
+    VERIFY( o == p );
+    VERIFY( !(o != p) );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } }, p;
+    VERIFY( !(o == p) );
+    VERIFY( o != p );
+  }
+
+  {
+    O o, p { value_type { 42, "forty-two" } };
+    VERIFY( !(o == p) );
+    VERIFY( o != p );
+  }
+
+  {
+    O o { value_type { 11, "eleventy" } }, p { value_type { 42, "forty-two" } };
+    VERIFY( !(o == p) );
+    VERIFY( o != p );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } }, p { value_type { 11, "eleventy" } };
+    VERIFY( !(o == p) );
+    VERIFY( o != p );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } }, p { value_type { 42, "forty-two" } };
+    VERIFY( o == p );
+    VERIFY( !(o != p) );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/relops/2.cc b/libstdc++-v3/testsuite/20_util/optional/relops/2.cc
new file mode 100644
index 00000000000..65071c04bce
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/relops/2.cc
@@ -0,0 +1,97 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <tuple>
+#include <string>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    std::string s;
+  };
+
+  bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); }
+
+  bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  {
+    O o, p;
+    VERIFY( !(o < p) );
+    VERIFY( !(o > p) );
+    VERIFY( o <= p );
+    VERIFY( o >= p );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } }, p;
+    VERIFY( !(o < p) );
+    VERIFY( o > p );
+    VERIFY( !(o <= p) );
+    VERIFY( o >= p );
+  }
+
+  {
+    O o, p { value_type { 42, "forty-two" } };
+    VERIFY( o < p );
+    VERIFY( !(o > p) );
+    VERIFY( o <= p );
+    VERIFY( !(o >= p) );
+  }
+
+  {
+    O o { value_type { 11, "eleventy" } }, p { value_type { 42, "forty-two" } };
+    VERIFY( o < p );
+    VERIFY( !(o > p) );
+    VERIFY( o <= p );
+    VERIFY( !(o >= p) );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } }, p { value_type { 11, "eleventy" } };
+    VERIFY( !(o < p) );
+    VERIFY( o > p );
+    VERIFY( !(o <= p) );
+    VERIFY( o >= p );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } }, p { value_type { 42, "forty-two" } };
+    VERIFY( !(o < p) );
+    VERIFY( !(o > p) );
+    VERIFY( o <= p );
+    VERIFY( o >= p );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/relops/3.cc b/libstdc++-v3/testsuite/20_util/optional/relops/3.cc
new file mode 100644
index 00000000000..2fd9e8bc1e7
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/relops/3.cc
@@ -0,0 +1,75 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <tuple>
+#include <string>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    std::string s;
+  };
+
+  bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); }
+
+  bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  value_type const reference { 42, "forty-two" };
+
+  {
+    O o;
+    VERIFY( !(o == reference) );
+    VERIFY( !(reference == o) );
+    VERIFY( o != reference );
+    VERIFY( reference != o );
+  }
+
+  {
+    O o { value_type { 11, "eleventy" } };
+    VERIFY( !(o == reference) );
+    VERIFY( !(reference == o) );
+    VERIFY( o != reference );
+    VERIFY( reference != o );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } };
+    VERIFY( o == reference );
+    VERIFY( reference == o );
+    VERIFY( !(o != reference) );
+    VERIFY( !(reference != o) );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/relops/4.cc b/libstdc++-v3/testsuite/20_util/optional/relops/4.cc
new file mode 100644
index 00000000000..363e633a40c
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/relops/4.cc
@@ -0,0 +1,87 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <tuple>
+#include <string>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    std::string s;
+  };
+
+  bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); }
+
+  bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+
+  value_type const reference { 42, "forty-two" };
+
+  {
+    O o;
+    VERIFY( o < reference );
+    VERIFY( !(reference < o) );
+    VERIFY( !(o > reference) );
+    VERIFY( reference > o );
+    VERIFY( o <= reference );
+    VERIFY( !(reference <= o) );
+    VERIFY( !(o >= reference) );
+    VERIFY( reference >= o );
+  }
+
+  {
+    O o { value_type { 11, "eleventy" } };
+    VERIFY( o < reference );
+    VERIFY( !(reference < o) );
+    VERIFY( !(o > reference) );
+    VERIFY( reference > o );
+    VERIFY( o <= reference );
+    VERIFY( !(reference <= o) );
+    VERIFY( !(o >= reference) );
+    VERIFY( reference >= o );
+  }
+
+  {
+    O o { value_type { 42, "forty-two" } };
+    VERIFY( !(o < reference) );
+    VERIFY( !(reference < o) );
+    VERIFY( !(o > reference) );
+    VERIFY( !(reference > o) );
+    VERIFY( o <= reference );
+    VERIFY( reference <= o );
+    VERIFY( o >= reference );
+    VERIFY( reference >= o );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/relops/5.cc b/libstdc++-v3/testsuite/20_util/optional/relops/5.cc
new file mode 100644
index 00000000000..e79e0dbc278
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/relops/5.cc
@@ -0,0 +1,66 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <tuple>
+#include <string>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    std::string s;
+  };
+
+  bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); }
+
+  bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+  using std::nullopt;
+
+  {
+    O o;
+    VERIFY( o == nullopt );
+    VERIFY( nullopt == o );
+    VERIFY( !(o != nullopt) );
+    VERIFY( !(nullopt != o) );
+  }
+
+  {
+    O o { std::in_place };
+    VERIFY( !(o == nullopt) );
+    VERIFY( !(nullopt == o) );
+    VERIFY( o != nullopt );
+    VERIFY( nullopt != o );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/relops/6.cc b/libstdc++-v3/testsuite/20_util/optional/relops/6.cc
new file mode 100644
index 00000000000..4ead5d1acda
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/relops/6.cc
@@ -0,0 +1,74 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <tuple>
+#include <string>
+
+namespace ns
+{
+  struct value_type
+  {
+    int i;
+    std::string s;
+  };
+
+  bool
+  operator==(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); }
+
+  bool
+  operator<(value_type const& lhs, value_type const& rhs)
+  { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); }
+
+} // namespace ns
+
+int main()
+{
+  using ns::value_type;
+  using O = std::optional<value_type>;
+  using std::nullopt;
+
+  {
+    O o;
+    VERIFY( !(o < nullopt) );
+    VERIFY( !(nullopt < o) );
+    VERIFY( !(o > nullopt) );
+    VERIFY( !(nullopt > o) );
+    VERIFY( o <= nullopt );
+    VERIFY( nullopt <= o );
+    VERIFY( o >= nullopt );
+    VERIFY( nullopt >= o );
+  }
+
+  {
+    O o { std::in_place };
+    VERIFY( !(o < nullopt) );
+    VERIFY( nullopt < o );
+    VERIFY( o > nullopt );
+    VERIFY( !(nullopt > o) );
+    VERIFY( !(o <= nullopt) );
+    VERIFY( nullopt <= o );
+    VERIFY( o >= nullopt );
+    VERIFY( !(nullopt >= o) );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/requirements.cc b/libstdc++-v3/testsuite/20_util/optional/requirements.cc
new file mode 100644
index 00000000000..aab572f5795
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/requirements.cc
@@ -0,0 +1,259 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+#include <tuple>
+
+using std::bad_optional_access;
+static_assert( std::is_default_constructible<bad_optional_access>::value, "" );
+
+struct trivially_destructible
+{
+  trivially_destructible() = delete;
+  trivially_destructible(trivially_destructible const&) = delete;
+  trivially_destructible& operator=(trivially_destructible const&) = delete;
+  trivially_destructible(trivially_destructible&&) = delete;
+  trivially_destructible& operator=(trivially_destructible&&) = delete;
+  ~trivially_destructible() noexcept = default;
+};
+
+static_assert( std::is_trivially_destructible<trivially_destructible>(), "" );
+
+struct no_default_constructor
+{
+  no_default_constructor() = delete;
+};
+
+struct no_copy_constructor
+{
+  no_copy_constructor() = default;
+  no_copy_constructor(no_copy_constructor const&) = delete;
+  no_copy_constructor& operator=(no_copy_constructor const&) = default;
+  no_copy_constructor(no_copy_constructor&&) = default;
+  no_copy_constructor& operator=(no_copy_constructor&&) = default;
+};
+
+struct no_copy_assignment
+{
+  no_copy_assignment() = default;
+  no_copy_assignment(no_copy_assignment const&) = default;
+  no_copy_assignment(no_copy_assignment&&) = default;
+  no_copy_assignment& operator=(no_copy_assignment&&) = default;
+};
+
+struct no_move_constructor
+{
+  no_move_constructor() = default;
+  no_move_constructor(no_move_constructor const&) = default;
+  no_move_constructor& operator=(no_move_constructor const&) = default;
+  no_move_constructor(no_move_constructor&&) = delete;
+  no_move_constructor& operator=(no_move_constructor&&) = default;
+};
+
+struct no_move_assignment
+{
+  no_move_assignment() = default;
+  no_move_assignment(no_move_assignment const&) = default;
+  no_move_assignment& operator=(no_move_assignment const&) = default;
+  no_move_assignment(no_move_assignment&&) = default;
+  no_move_assignment& operator=(no_move_assignment&&) = delete;
+};
+
+struct no_copy : no_copy_constructor, no_copy_assignment { };
+struct no_move : no_move_constructor, no_move_assignment { };
+
+// Laxest possible model of a value type for optional
+struct only_destructible
+{
+  only_destructible(only_destructible&&) = delete;
+};
+
+int main()
+{
+  {
+    static_assert( std::is_trivially_destructible<std::optional<trivially_destructible>>(), "" );
+  }
+
+  {
+    using T = no_default_constructor;
+    using O = std::optional<T>;
+    static_assert( std::is_same<O::value_type, T>(), "" );
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( std::is_copy_constructible<O>(), "" );
+    { O o; auto copy = o; }
+    static_assert( std::is_copy_assignable<O>(), "" );
+    { O o, p; p = o; }
+    static_assert( std::is_move_constructible<O>(), "" );
+    { O o; auto moved_to = std::move(o); }
+    static_assert( std::is_move_assignable<O>(), "" );
+    { O o, p; p = std::move(o); }
+  }
+
+  {
+    using T = no_copy_constructor;
+    using O = std::optional<T>;
+    static_assert( std::is_same<O::value_type, T>(), "" );
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( !std::is_copy_constructible<O>(), "" );
+    static_assert( !std::is_copy_assignable<O>(), "" );
+    static_assert( std::is_move_constructible<O>(), "" );
+    { O o; auto moved_to = std::move(o); }
+    static_assert( std::is_move_assignable<O>(), "" );
+    { O o, p; p = std::move(o); }
+  }
+
+  {
+    using T = no_copy_assignment;
+    using O = std::optional<T>;
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( std::is_copy_constructible<O>(), "" );
+    { O o; auto copy = o; }
+    static_assert( !std::is_copy_assignable<O>(), "" );
+    static_assert( std::is_move_constructible<O>(), "" );
+    { O o; auto moved_to = std::move(o); }
+    static_assert( std::is_move_assignable<O>(), "" );
+    { O o, p; p = std::move(o); }
+  }
+
+  {
+    using T = no_copy;
+    using O = std::optional<T>;
+    static_assert( std::is_same<O::value_type, T>(), "" );
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( !std::is_copy_constructible<O>(), "" );
+    static_assert( !std::is_copy_assignable<O>(), "" );
+    static_assert( std::is_move_constructible<O>(), "" );
+    { O o; auto moved_to = std::move(o); }
+    static_assert( std::is_move_assignable<O>(), "" );
+    { O o, p; p = std::move(o); }
+  }
+
+  {
+    using T = no_move_constructor;
+    using O = std::optional<T>;
+    static_assert( std::is_same<O::value_type, T>(), "" );
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( std::is_copy_constructible<O>(), "" );
+    { O o; auto copy = o; }
+    static_assert( std::is_copy_assignable<O>(), "" );
+    /*
+     * T should be move constructible due to [12.8/11], which is a new rule in C++1y
+     * not yet implemented by GCC. Because there is already a special exception in C++11
+     * for the generation of the special members that GCC implements (at least some of the
+     * time), this does not affect the std::optional implementation however. So the assertion
+     * for T should be changed (or removed altogether) when the time comes, but the rest
+     * should however remain correct and unchanged.
+     */
+    static_assert( !std::is_move_constructible<T>(), "" );
+    static_assert( std::is_move_constructible<O>(), "" );
+    { O o; auto moved_to = std::move(o); }
+    static_assert( std::is_move_assignable<O>(), "" );
+    { O o, p; p = std::move(o); }
+  }
+
+  {
+    using T = no_move_assignment;
+    using O = std::optional<T>;
+    static_assert( std::is_same<O::value_type, T>(), "" );
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( std::is_copy_constructible<O>(), "" );
+    { O o; auto copy = o; }
+    static_assert( std::is_copy_assignable<O>(), "" );
+    { O o, p; p = o; }
+    static_assert( std::is_move_constructible<O>(), "" );
+    { O o; auto moved_to = std::move(o); }
+    /*
+     * Paragraph 23 of same leads to a similar situation but with respect to move
+     * assignment.
+     */
+    static_assert( !std::is_move_assignable<T>(), "" );
+    static_assert( std::is_move_assignable<O>(), "" );
+    { O o, p; p = std::move(o); }
+  }
+
+  {
+    using T = no_move;
+    using O = std::optional<T>;
+    static_assert( std::is_same<O::value_type, T>(), "" );
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( std::is_copy_constructible<O>(), "" );
+    { O o; auto copy = o; }
+    static_assert( std::is_copy_assignable<O>(), "" );
+    { O o, p; p = o; }
+    static_assert( std::is_move_constructible<O>(), "" );
+    { O o; auto moved_to = std::move(o); }
+    static_assert( std::is_move_assignable<O>(), "" );
+    { O o, p; p = std::move(o); }
+  }
+
+  {
+    using T = only_destructible;
+    using O = std::optional<T>;
+    static_assert( std::is_same<O::value_type, T>(), "" );
+    static_assert( std::is_default_constructible<O>(), "" );
+    { O o; }
+    static_assert( !std::is_copy_constructible<O>(), "" );
+    static_assert( !std::is_copy_assignable<O>(), "" );
+    static_assert( !std::is_move_constructible<O>(), "" );
+    static_assert( !std::is_move_assignable<O>(), "" );
+  }
+
+  {
+    /*
+     * Should not complain about 'invalid' specializations as long as
+     * they're not instantiated.
+     */
+    using A = std::optional<int&>;
+    using B = std::optional<int&&>;
+    using C1 = std::optional<std::in_place_t>;
+    using C2 = std::optional<std::in_place_t const>;
+    using C3 = std::optional<std::in_place_t volatile>;
+    using C4 = std::optional<std::in_place_t const volatile>;
+    using D1 = std::optional<std::nullopt_t>;
+    using D2 = std::optional<std::nullopt_t const>;
+    using D3 = std::optional<std::nullopt_t volatile>;
+    using D4 = std::optional<std::nullopt_t const volatile>;
+
+    using X = std::tuple<A, B, C1, C2, C3, C4, D1, D2, D3, D4>;
+  }
+
+  {
+    std::optional<const int> o { 42 };
+    static_assert( std::is_same<decltype(o)::value_type, const int>(), "" );
+    VERIFY( o );
+    VERIFY( *o == 42 );
+  }
+
+  {
+    constexpr std::optional<const int> o { 33 };
+    static_assert( std::is_same<decltype(o)::value_type, const int>(), "" );
+    static_assert( o, "" );
+    static_assert( *o == 33, "" );
+  }
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/swap/1.cc b/libstdc++-v3/testsuite/20_util/optional/swap/1.cc
new file mode 100644
index 00000000000..b077fe4c583
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/swap/1.cc
@@ -0,0 +1,95 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do run }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <testsuite_hooks.h>
+
+struct exception {};
+
+int counter = 0;
+
+struct mixin_counter
+{
+  mixin_counter() { ++counter; }
+  mixin_counter(mixin_counter const&) { ++counter; }
+  ~mixin_counter() { --counter; }
+};
+
+namespace ns
+{
+
+struct value_type : private mixin_counter
+{
+  explicit value_type(int state) : state(state) { }
+  int state;
+};
+
+int swaps = 0;
+
+void
+swap(value_type& lhs, value_type& rhs)
+{
+  ++swaps;
+  using std::swap;
+  swap(lhs.state, rhs.state);
+}
+
+} // namespace ns
+
+int main()
+{
+  using O = std::optional<ns::value_type>;
+
+  VERIFY( ns::swaps == 0 );
+
+  {
+    O o, p;
+    swap(o, p);
+    VERIFY( !o );
+    VERIFY( !p );
+  }
+
+  {
+    O o { std::in_place, 45 }, p;
+    swap(o, p);
+    VERIFY( !o );
+    VERIFY( p && p->state == 45 );
+  }
+
+  {
+    O o, p { std::in_place, 45 };
+    swap(o, p);
+    VERIFY( o && o->state == 45 );
+    VERIFY( !p );
+  }
+
+  {
+    O o { std::in_place, 167 }, p { std::in_place, 999 };
+    VERIFY( ns::swaps == 0 );
+
+    swap(o, p);
+
+    VERIFY( o && o->state == 999 );
+    VERIFY( p && p->state == 167 );
+    VERIFY( ns::swaps == 1 );
+  }
+
+  VERIFY( counter == 0 );
+}
diff --git a/libstdc++-v3/testsuite/20_util/optional/typedefs.cc b/libstdc++-v3/testsuite/20_util/optional/typedefs.cc
new file mode 100644
index 00000000000..5ec95d850ec
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/typedefs.cc
@@ -0,0 +1,33 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile }
+
+// Copyright (C) 2014-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <optional>
+#include <type_traits>
+#include <stdexcept>
+
+template<typename T>
+  using check1_t = std::optional<T>;
+
+using check2_t = std::in_place_t;
+using check3_t = std::nullopt_t;
+using check4_t = std::bad_optional_access;
+
+static_assert(std::is_base_of<std::logic_error, check4_t>::value,
+	      "bad_optional_access must derive from logic_error");
diff --git a/libstdc++-v3/testsuite/23_containers/array/tuple_interface/get_debug_neg.cc b/libstdc++-v3/testsuite/23_containers/array/tuple_interface/get_debug_neg.cc
index 36feb3c140c..6d469a54389 100644
--- a/libstdc++-v3/testsuite/23_containers/array/tuple_interface/get_debug_neg.cc
+++ b/libstdc++-v3/testsuite/23_containers/array/tuple_interface/get_debug_neg.cc
@@ -28,6 +28,6 @@ int n1 = std::get<1>(a);
 int n2 = std::get<1>(std::move(a));
 int n3 = std::get<1>(ca);
 
-// { dg-error "static assertion failed" "" { target *-*-* } 274 }
-// { dg-error "static assertion failed" "" { target *-*-* } 283 }
-// { dg-error "static assertion failed" "" { target *-*-* } 291 }
+// { dg-error "static assertion failed" "" { target *-*-* } 273 }
+// { dg-error "static assertion failed" "" { target *-*-* } 282 }
+// { dg-error "static assertion failed" "" { target *-*-* } 290 }
diff --git a/libstdc++-v3/testsuite/23_containers/array/tuple_interface/tuple_element_debug_neg.cc b/libstdc++-v3/testsuite/23_containers/array/tuple_interface/tuple_element_debug_neg.cc
index b761005f8a0..6789f233c75 100644
--- a/libstdc++-v3/testsuite/23_containers/array/tuple_interface/tuple_element_debug_neg.cc
+++ b/libstdc++-v3/testsuite/23_containers/array/tuple_interface/tuple_element_debug_neg.cc
@@ -23,4 +23,4 @@
 
 typedef std::tuple_element<1, std::array<int, 1>>::type type;
 
-// { dg-error "static assertion failed" "" { target *-*-* } 309 }
+// { dg-error "static assertion failed" "" { target *-*-* } 308 }
diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/construction.cc b/libstdc++-v3/testsuite/23_containers/vector/allocator/construction.cc
new file mode 100644
index 00000000000..8040949c04c
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/construction.cc
@@ -0,0 +1,105 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++11" }
+// { dg-do compile }
+
+#include <vector>
+
+struct Tag { };
+
+template<typename T>
+  struct TaggingAllocator
+  {
+    using value_type = T;
+
+    TaggingAllocator() = default;
+
+    template<typename U>
+      TaggingAllocator(const TaggingAllocator<U>&) { }
+
+    T*
+    allocate(std::size_t n) { return std::allocator<T>{}.allocate(n); }
+
+    void
+    deallocate(T* p, std::size_t n) { std::allocator<T>{}.deallocate(p, n); }
+
+    template<typename U, typename... Args>
+      void
+      construct(U* p, Args&&... args)
+      { ::new((void*)p) U(Tag{}, std::forward<Args>(args)...); }
+
+    template<typename U, typename... Args>
+      void
+      destroy(U* p)
+      { p->~U(); }
+  };
+
+template<typename T, typename U>
+  bool
+  operator==(const TaggingAllocator<T>&, const TaggingAllocator<U>&)
+  { return true; }
+
+template<typename T, typename U>
+  bool
+  operator!=(const TaggingAllocator<T>&, const TaggingAllocator<U>&)
+  { return false; }
+
+struct X
+{
+  // All constructors must be passed the Tag type.
+
+  // DefaultInsertable into vector<X, TaggingAllocator<X>>,
+  X(Tag) { }
+  // CopyInsertable into vector<X, TaggingAllocator<X>>,
+  X(Tag, const X&) { }
+  // MoveInsertable into vector<X, TaggingAllocator<X>>, and
+  X(Tag, X&&) { }
+
+  // EmplaceConstructible into vector<X, TaggingAllocator<X>> from args.
+  template<typename... Args>
+    X(Tag, Args&&...) { }
+
+  // not DefaultConstructible, CopyConstructible or MoveConstructible.
+  X() = delete;
+  X(const X&) = delete;
+  X(X&&) = delete;
+
+  // CopyAssignable.
+  X& operator=(const X&) { return *this; }
+
+  // MoveAssignable.
+  X& operator=(X&&) { return *this; }
+
+private:
+  // Not Destructible.
+  ~X() { }
+
+  // Erasable from vector<X, TaggingAllocator<X>>.
+  friend class TaggingAllocator<X>;
+};
+
+template class std::vector<X, TaggingAllocator<X>>;
+
+void test01()
+{
+  std::vector<X, TaggingAllocator<X>> v;
+  v.reserve(3);
+  v.emplace_back();
+  v.emplace(v.begin());
+  v.emplace(v.begin(), 1, 2, 3);
+}
diff --git a/libstdc++-v3/testsuite/23_containers/vector/check_construct_destroy.cc b/libstdc++-v3/testsuite/23_containers/vector/check_construct_destroy.cc
index cf2f7c7a0d7..b92a1521aa2 100644
--- a/libstdc++-v3/testsuite/23_containers/vector/check_construct_destroy.cc
+++ b/libstdc++-v3/testsuite/23_containers/vector/check_construct_destroy.cc
@@ -49,9 +49,9 @@ int main()
     c.reserve(100);
     tracker_allocator_counter::reset();
     c.insert(c.begin(), arr10[0]);
-    ok = check_construct_destroy("Insert element", 1, 0) && ok;
+    ok = check_construct_destroy("Insert element", 2, 1) && ok;
   }
-  ok = check_construct_destroy("Insert element", 1, 11) && ok;
+  ok = check_construct_destroy("Insert element", 2, 12) && ok;
 
   {
     Container c(arr10, arr10 + 10);
diff --git a/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc b/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc
new file mode 100644
index 00000000000..d452b5b6325
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/vector/modifiers/emplace/self_emplace.cc
@@ -0,0 +1,144 @@
+// { dg-options "-std=gnu++11" }
+
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <vector>
+#include "testsuite_hooks.h"
+
+bool test __attribute__((unused)) = true;
+
+void
+test01()
+{
+  std::vector<std::vector<int>> vv =
+    {
+      { 2, 3 },
+      { 4, 5 },
+      { 0, 1 }
+    };
+
+  // Make sure emplace will imply reallocation.
+  VERIFY( vv.capacity() == 3 );
+
+  vv.emplace(vv.begin(), vv[0]);
+
+  VERIFY( vv.size() == 4 );
+  VERIFY( vv[0].size() == 2 );
+  VERIFY( vv[0][0] == 2 );
+  VERIFY( vv[0][1] == 3 );
+}
+
+void
+test02()
+{
+  std::vector<std::vector<int>> vv =
+    {
+      { 2, 3 },
+      { 4, 5 },
+      { 0, 1 }
+    };
+
+  // Make sure emplace won't reallocate.
+  vv.reserve(4);
+  vv.emplace(vv.begin(), vv[0]);
+
+  VERIFY( vv.size() == 4 );
+  VERIFY( vv[0].size() == 2 );
+  VERIFY( vv[0][0] == 2 );
+  VERIFY( vv[0][1] == 3 );
+}
+
+struct A
+{
+  A(int i) : _i(i)
+  { }
+
+  A(const A& other) : _i(other._i)
+  {
+    VERIFY( other._i >= 0 );
+  }
+
+  A(A&& other) : _i(other._i)
+  {
+    VERIFY( other._i >= 0 );
+
+    other._i = -1;
+  }
+
+  A(std::vector<A>::iterator it) : _i(it->_i)
+  {
+    VERIFY( it->_i >= 0 );
+  }
+
+  A& operator=(const A&) = default;
+  A& operator=(A&& other)
+  {
+    VERIFY(other._i >= 0 );
+
+    _i = other._i;
+    other._i = -1;
+    return *this;
+  }
+
+  int _i;
+};
+
+void
+test03()
+{
+  std::vector<A> va =
+    {
+      { A(1) },
+      { A(2) },
+      { A(3) }
+    };
+
+  // Make sure emplace will imply reallocation.
+  VERIFY( va.capacity() == 3 );
+
+  va.emplace(va.begin(), va.begin());
+
+  VERIFY( va.size() == 4 );
+  VERIFY( va[0]._i == 1 );
+}
+
+void
+test04()
+{
+  std::vector<A> va =
+    {
+      { A(1) },
+      { A(2) },
+      { A(3) }
+    };
+
+  // Make sure emplace won't reallocate.
+  va.reserve(4);
+  va.emplace(va.begin(), va.begin());
+
+  VERIFY( va.size() == 4 );
+  VERIFY( va[0]._i == 1 );
+}
+
+int main()
+{
+  test01();
+  test02();
+  test03();
+  test04();
+}
diff --git a/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert/aliasing.cc b/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert/aliasing.cc
new file mode 100644
index 00000000000..2ef13b47ec4
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert/aliasing.cc
@@ -0,0 +1,79 @@
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+// { dg-options "-std=gnu++14" }
+
+#include <vector>
+#include <memory>
+#include <testsuite_hooks.h>
+
+// See https://gcc.gnu.org/ml/libstdc++/2016-07/msg00008.html for background.
+
+struct T
+{
+ T(int v = 0) : value(v) { }
+ T(const T& t);
+ T& operator=(const T& t);
+ void make_child() { child = std::make_unique<T>(value + 10); }
+ std::unique_ptr<T> child;
+ int value;
+};
+
+T::T(const T& t) : value(t.value)
+{
+ if (t.child)
+   child.reset(new T(*t.child));
+}
+
+T& T::operator=(const T& t)
+{
+ value = t.value;
+ if (t.child)
+ {
+   if (child)
+     *child = *t.child;
+   else
+     child.reset(new T(*t.child));
+ }
+ else
+   child.reset();
+ return *this;
+}
+
+void
+test01()
+{
+ std::vector<T> v;
+ v.reserve(3);
+ v.push_back(T(1));
+ v.back().make_child();
+ v.push_back(T(2));
+ v.back().make_child();
+
+ VERIFY(v[1].child->value == 12);
+ VERIFY(v[1].child->child == nullptr);
+
+ v.insert(v.begin(), *v[1].child);
+
+ VERIFY(v[0].value == 12);
+ VERIFY(v[0].child == nullptr);
+}
+
+int main()
+{
+  test01();
+}
diff --git a/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert/self_insert.cc b/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert/self_insert.cc
new file mode 100644
index 00000000000..9944cbbfbb7
--- /dev/null
+++ b/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert/self_insert.cc
@@ -0,0 +1,70 @@
+// { dg-options "-std=gnu++11" }
+
+// Copyright (C) 2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <vector>
+
+#include "testsuite_hooks.h"
+
+bool test __attribute__((unused)) = true;
+
+void test01()
+{
+  std::vector<std::vector<int>> vv =
+    {
+      { 2, 3 },
+      { 4, 5 },
+      { 0, 1 }
+    };
+
+  // Make sure it doesn't reallocate during insertion.
+  vv.reserve(4);
+
+  vv.insert(vv.begin(), vv[0]);
+
+  VERIFY( vv.size() == 4 );
+  VERIFY( vv[0].size() == 2 );
+  VERIFY( vv[0][0] == 2 );
+  VERIFY( vv[0][1] == 3 );
+}
+
+void test02()
+{
+  std::vector<std::vector<int>> vv =
+    {
+      { 2, 3 },
+      { 4, 5 },
+      { 0, 1 }
+    };
+
+  // Make sure we will reallocate for insertion.
+  VERIFY( vv.capacity() == 3 );
+
+  vv.insert(vv.begin(), vv[0]);
+
+  VERIFY( vv.size() == 4 );
+  VERIFY( vv[0].size() == 2 );
+  VERIFY( vv[0][0] == 2 );
+  VERIFY( vv[0][1] == 3 );
+}
+
+int main()
+{
+  test01();
+  test02();
+}
diff --git a/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert_vs_emplace.cc b/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert_vs_emplace.cc
index 39a3f031b46..1b461240592 100644
--- a/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert_vs_emplace.cc
+++ b/libstdc++-v3/testsuite/23_containers/vector/modifiers/insert_vs_emplace.cc
@@ -223,7 +223,8 @@ test03()
 void
 test04()
 {
-  const X::special expected{ 0, 3, 1, 0, 3, 0 };
+  const X::special expected_ins{ 0, 3, 1, 0, 3, 0 };
+  const X::special expected_emp{ 0, 4, 1, 0, 4, 0 };
   X::special ins, emp;
   {
     std::vector<X> v;
@@ -253,8 +254,8 @@ test04()
     // std::cout << "----\n";
     emp = X::sp;
   }
-  VERIFY( ins == emp );
-  VERIFY( ins == expected );
+  VERIFY( ins == expected_ins );
+  VERIFY( emp == expected_emp );
 }
 
 // insert vs emplace xvalue reallocation
diff --git a/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/debug/irreflexive_neg.cc b/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/debug/irreflexive_neg.cc
deleted file mode 100644
index 26e7f87eb78..00000000000
--- a/libstdc++-v3/testsuite/25_algorithms/lexicographical_compare/debug/irreflexive_neg.cc
+++ /dev/null
@@ -1,70 +0,0 @@
-// Copyright (C) 2015-2016 Free Software Foundation, Inc.
-//
-// This file is part of the GNU ISO C++ Library.  This library is free
-// software; you can redistribute it and/or modify it under the
-// terms of the GNU General Public License as published by the
-// Free Software Foundation; either version 3, or (at your option)
-// any later version.
-//
-// This library is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License along
-// with this library; see the file COPYING3.  If not see
-// <http://www.gnu.org/licenses/>.
-//
-// { dg-options "-std=gnu++11" }
-// { dg-require-debug-mode "" }
-// { dg-do run { xfail *-*-* } }
-
-#include <algorithm>
-#include <testsuite_hooks.h>
-
-struct A
-{
-  A(int i) : _i(i)
-  { }
-
-  int _i;
-};
-
-bool
-operator<(A a, int i)
-{ return a._i < i; }
-
-bool
-operator<(int i, A a)
-{ return i < a._i; }
-
-void test01()
-{
-  bool test __attribute__((unused)) = true;
-
-  A as[] { 0, 1, 2, 3 };
-  int is[] { 0, 1, 2, 3 };
-  VERIFY( !std::lexicographical_compare(as, as + 4, is, is + 4) );
-}
-
-bool
-bad_lower(int lhs, int rhs)
-{
-  if (lhs == 0)
-    return true;
-
-  return lhs < rhs;
-}
-
-void test02()
-{
-  int is[] { 0, 1, 2, 3 };
-  std::lexicographical_compare(is, is + 4, is, is + 4, bad_lower);
-}
-
-int main()
-{
-  test01();
-  test02();
-  return 0;
-}
diff --git a/libstdc++-v3/testsuite/29_atomics/atomic/65913.cc b/libstdc++-v3/testsuite/29_atomics/atomic/65913.cc
index 713ef42d03c..32a58ec991b 100644
--- a/libstdc++-v3/testsuite/29_atomics/atomic/65913.cc
+++ b/libstdc++-v3/testsuite/29_atomics/atomic/65913.cc
@@ -15,7 +15,8 @@
 // with this library; see the file COPYING3.  If not see
 // <http://www.gnu.org/licenses/>.
 
-// { dg-do run { target x86_64-*-linux* powerpc*-*-linux* } }
+// { dg-do run }
+// { dg-require-atomic-builtins "" }
 // { dg-options "-std=gnu++11 -O0" }
 
 #include <atomic>
diff --git a/libstdc++-v3/testsuite/backward/hash_set/check_construct_destroy.cc b/libstdc++-v3/testsuite/backward/hash_set/check_construct_destroy.cc
index 5693c76c386..5740fe1bf8b 100644
--- a/libstdc++-v3/testsuite/backward/hash_set/check_construct_destroy.cc
+++ b/libstdc++-v3/testsuite/backward/hash_set/check_construct_destroy.cc
@@ -39,45 +39,48 @@ int main()
 
   int buckets;
 
+  // Add 1 to all counts, because the std::vector used internally by the
+  // hashtable creates and destroys a temporary object using the allocator.
+
   tracker_allocator_counter::reset();
   {
     Container c;
     buckets = c.bucket_count();
-    ok = check_construct_destroy("empty container", buckets, 0) && ok;
+    ok = check_construct_destroy("empty container", buckets+1, 1) && ok;
   }
-  ok = check_construct_destroy("empty container", buckets, buckets) && ok;
+  ok = check_construct_destroy("empty container", buckets+1, buckets+1) && ok;
 
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
-    ok = check_construct_destroy("Construct from range", buckets+10, 0) && ok;
+    ok = check_construct_destroy("Construct from range", buckets+10+1, 1) && ok;
   }
-  ok = check_construct_destroy("Construct from range", buckets+10, buckets+10) && ok;
+  ok = check_construct_destroy("Construct from range", buckets+10+1, buckets+10+1) && ok;
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
     c.insert(arr10a[0]);
-    ok = check_construct_destroy("Insert element", buckets+11, 0) && ok;
+    ok = check_construct_destroy("Insert element", buckets+11+1, 1) && ok;
   }
-  ok = check_construct_destroy("Insert element", buckets+11, buckets+11) && ok;
+  ok = check_construct_destroy("Insert element", buckets+11+1, buckets+11+1) && ok;
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
     c.insert(arr10a, arr10a+3);
-    ok = check_construct_destroy("Insert short range", buckets+13, 0) && ok;
+    ok = check_construct_destroy("Insert short range", buckets+13+1, 1) && ok;
   }
-  ok = check_construct_destroy("Insert short range", buckets+13, buckets+13) && ok;
+  ok = check_construct_destroy("Insert short range", buckets+13+1, buckets+13+1) && ok;
 
   tracker_allocator_counter::reset();
   {
     Container c(arr10, arr10 + 10);
     c.insert(arr10a, arr10a+10);
-    ok = check_construct_destroy("Insert long range", buckets+20, 0) && ok;
+    ok = check_construct_destroy("Insert long range", buckets+20+1, 1) && ok;
   }
-  ok = check_construct_destroy("Insert long range", buckets+20, buckets+20) && ok;
+  ok = check_construct_destroy("Insert long range", buckets+20+1, buckets+20+1) && ok;
 
   return ok ? 0 : 1;
 }
diff --git a/libstdc++-v3/testsuite/experimental/any/misc/any_cast.cc b/libstdc++-v3/testsuite/experimental/any/misc/any_cast.cc
index ce3f2135889..bb0f754f549 100644
--- a/libstdc++-v3/testsuite/experimental/any/misc/any_cast.cc
+++ b/libstdc++-v3/testsuite/experimental/any/misc/any_cast.cc
@@ -77,8 +77,38 @@ void test02()
   }
 }
 
+static int move_count = 0;
+
+void test03()
+{
+  struct MoveEnabled
+  {
+    MoveEnabled(MoveEnabled&&)
+    {
+      ++move_count;
+    }
+    MoveEnabled() = default;
+    MoveEnabled(const MoveEnabled&) = default;
+  };
+  MoveEnabled m;
+  MoveEnabled m2 = any_cast<MoveEnabled>(any(m));
+  VERIFY(move_count == 1);
+  MoveEnabled&& m3 = any_cast<MoveEnabled&&>(any(m));
+  VERIFY(move_count == 1);
+  struct MoveDeleted
+  {
+    MoveDeleted(MoveDeleted&&) = delete;
+    MoveDeleted() = default;
+    MoveDeleted(const MoveDeleted&) = default;
+  };
+  MoveDeleted md;
+  MoveDeleted&& md2 = any_cast<MoveDeleted>(any(std::move(md)));
+  MoveDeleted&& md3 = any_cast<MoveDeleted&&>(any(std::move(md)));
+}
+
 int main()
 {
   test01();
   test02();
+  test03();
 }
diff --git a/libstdc++-v3/testsuite/experimental/any/misc/any_cast_neg.cc b/libstdc++-v3/testsuite/experimental/any/misc/any_cast_neg.cc
index 1361db89d4c..82957a1f544 100644
--- a/libstdc++-v3/testsuite/experimental/any/misc/any_cast_neg.cc
+++ b/libstdc++-v3/testsuite/experimental/any/misc/any_cast_neg.cc
@@ -26,5 +26,5 @@ void test01()
   using std::experimental::any_cast;
 
   const any y(1);
-  any_cast<int&>(y); // { dg-error "qualifiers" "" { target { *-*-* } } 353 }
+  any_cast<int&>(y); // { dg-error "qualifiers" "" { target { *-*-* } } 368 }
 }
diff --git a/libstdc++-v3/testsuite/experimental/filesystem/operations/create_directories.cc b/libstdc++-v3/testsuite/experimental/filesystem/operations/create_directories.cc
index 4be41a6c47c..a52efe4ce5c 100644
--- a/libstdc++-v3/testsuite/experimental/filesystem/operations/create_directories.cc
+++ b/libstdc++-v3/testsuite/experimental/filesystem/operations/create_directories.cc
@@ -65,7 +65,8 @@ test01()
   VERIFY( b );
   VERIFY( is_directory(p/"./d4/../d5") );
 
-  remove_all(p, ec);
+  std::uintmax_t count = remove_all(p, ec);
+  VERIFY( count == 6 );
 }
 
 int
diff --git a/libstdc++-v3/testsuite/experimental/optional/cons/value.cc b/libstdc++-v3/testsuite/experimental/optional/cons/value.cc
index a916951b874..123a89ede04 100644
--- a/libstdc++-v3/testsuite/experimental/optional/cons/value.cc
+++ b/libstdc++-v3/testsuite/experimental/optional/cons/value.cc
@@ -22,6 +22,7 @@
 #include <testsuite_hooks.h>
 
 #include <vector>
+#include <string>
 
 struct tracker
 {
@@ -236,4 +237,22 @@ int main()
 
     VERIFY( result == caught );
   }
+
+  {
+    std::experimental::optional<std::string> os = "foo";
+    struct X
+    {
+      explicit X(int) {}
+      X& operator=(int) {return *this;}
+    };
+    std::experimental::optional<X> ox{42};
+    std::experimental::optional<int> oi{42};
+    std::experimental::optional<X> ox2{oi};
+    std::experimental::optional<std::string> os2;
+    os2 = "foo";
+    std::experimental::optional<X> ox3;
+    ox3 = 42;
+    std::experimental::optional<X> ox4;
+    ox4 = oi;
+  }
 }
diff --git a/libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc b/libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc
new file mode 100644
index 00000000000..c862a04986a
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/optional/cons/value_neg.cc
@@ -0,0 +1,39 @@
+// { dg-options "-std=gnu++14" }
+// { dg-do compile }
+
+// Copyright (C) 2013-2016 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a moved_to of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// <http://www.gnu.org/licenses/>.
+
+#include <experimental/optional>
+#include <testsuite_hooks.h>
+
+#include <string>
+#include <memory>
+
+int main()
+{
+  {
+    struct X
+    {
+      explicit X(int) {}
+    };
+    std::experimental::optional<X> ox{42};
+    std::experimental::optional<X> ox2 = 42; // { dg-error "conversion" }
+    std::experimental::optional<std::unique_ptr<int>> oup{new int};
+    std::experimental::optional<std::unique_ptr<int>> oup2 = new int;  // { dg-error "conversion" }
+  }
+}