diff options
-rw-r--r-- | gcc/ChangeLog.rewrite | 9 | ||||
-rw-r--r-- | gcc/config.gcc | 6 | ||||
-rw-r--r-- | gcc/config/mips/elf.h | 5 | ||||
-rw-r--r-- | gcc/config/mips/elf64.h | 5 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 51 | ||||
-rw-r--r-- | gcc/config/mips/mips.h | 23 |
6 files changed, 19 insertions, 80 deletions
diff --git a/gcc/ChangeLog.rewrite b/gcc/ChangeLog.rewrite index 15d19d7dd2f..34962bf9a56 100644 --- a/gcc/ChangeLog.rewrite +++ b/gcc/ChangeLog.rewrite @@ -1,3 +1,12 @@ +2003-01-08 Eric Christopher <echristo@redhat.com> + + * config.gcc (mipsisa32*): Change ABI_MEABI to ABI_EABI. + * config/mips/elf.h (STARTFILE_SPEC): Remove ABI_MEABI references and + configure check for libgloss. + * config/mips/elf64.h: Ditto. + * config/mips/mips.c: Remove ABI_MEABI. + * config/mips/mips.h: Ditto. + 2002-11-05 Richard Sandiford <rsandifo@redhat.com> Fix merge fallout. diff --git a/gcc/config.gcc b/gcc/config.gcc index 1c2ada8cee2..5b8b7d74f9f 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -1831,19 +1831,19 @@ mips-*-ecoff* | mipsel-*-ecoff*) mipsisa32-*-elf* | mipsisa32el-*-elf*) tm_file="${tm_file} mips/elf.h" tmake_file=mips/t-isa3264 - tm_defines="MIPS_ISA_DEFAULT=32 MIPS_ABI_DEFAULT=ABI_MEABI" + tm_defines="MIPS_ISA_DEFAULT=32 MIPS_ABI_DEFAULT=ABI_EABI" ;; mipsisa64-*-elf* | mipsisa64el-*-elf*) tm_file="${tm_file} mips/elf.h" tmake_file=mips/t-isa3264 target_cpu_default="MASK_64BIT|MASK_FLOAT64|MASK_GAS" - tm_defines="MIPS_ISA_DEFAULT=64 MIPS_ABI_DEFAULT=ABI_MEABI" + tm_defines="MIPS_ISA_DEFAULT=64 MIPS_ABI_DEFAULT=ABI_EABI" ;; mipsisa64sr71k-*-elf*) tm_file="${tm_file} mips/elf.h" tmake_file=mips/t-sr71k target_cpu_default="MASK_64BIT|MASK_FLOAT64|MASK_GAS" - tm_defines="MIPS_ISA_DEFAULT=64 MIPS_CPU_STRING_DEFAULT=\\\"sr71000\\\" MIPS_ABI_DEFAULT=ABI_MEABI" + tm_defines="MIPS_ISA_DEFAULT=64 MIPS_CPU_STRING_DEFAULT=\\\"sr71000\\\" MIPS_ABI_DEFAULT=ABI_EABI" ;; mipsisa64sb1-*-elf* | mipsisa64sb1el-*-elf*) tm_file="${tm_file} mips/elf.h" diff --git a/gcc/config/mips/elf.h b/gcc/config/mips/elf.h index c64bb46b621..5ee6ca4a46b 100644 --- a/gcc/config/mips/elf.h +++ b/gcc/config/mips/elf.h @@ -234,12 +234,7 @@ void FN () \ #define LIB_SPEC "" #undef STARTFILE_SPEC -#if defined(HAVE_MIPS_LIBGLOSS_STARTUP_DIRECTIVES) \ - || (MIPS_ABI_DEFAULT == ABI_MEABI) #define STARTFILE_SPEC "crti%O%s crtbegin%O%s" -#else -#define STARTFILE_SPEC "crti%O%s crtbegin%O%s %{!mno-crt0:crt0%O%s}" -#endif #undef ENDFILE_SPEC #define ENDFILE_SPEC "crtend%O%s crtn%O%s" diff --git a/gcc/config/mips/elf64.h b/gcc/config/mips/elf64.h index e9bed21da10..eb12237a3ae 100644 --- a/gcc/config/mips/elf64.h +++ b/gcc/config/mips/elf64.h @@ -192,12 +192,7 @@ void FN () \ #define LIB_SPEC "" #undef STARTFILE_SPEC -#if defined(HAVE_MIPS_LIBGLOSS_STARTUP_DIRECTIVES) \ - || (MIPS_ABI_DEFAULT == ABI_MEABI) #define STARTFILE_SPEC "crti%O%s crtbegin%O%s" -#else -#define STARTFILE_SPEC "crti%O%s crtbegin%O%s %{!mno-crt0:crt0%O%s}" -#endif #undef ENDFILE_SPEC #define ENDFILE_SPEC "crtend%O%s crtn%O%s" diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 63b0727e5f3..3712e0797c9 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -3808,7 +3808,6 @@ output_block_move (insn, operands, num_regs, move_type) constant addresses into registers when generating N32/N64 code, just in case we might emit an unaligned load instruction. */ if (num_regs > 2 && (bytes > 2 * align || move_type != BLOCK_MOVE_NORMAL - || mips_abi == ABI_MEABI || mips_abi == ABI_N32 || mips_abi == ABI_64)) { @@ -4178,13 +4177,6 @@ mips_arg_info (cum, mode, type, named, info) info->fpr_p = true; break; - case ABI_MEABI: - /* The MIPS eabi says only structures containing doubles get - passed in a fp register, so force a structure containing - a float to be passed in the integer registers. */ - info->fpr_p = (named && !(mode == SFmode && info->struct_p)); - break; - default: info->fpr_p = named; break; @@ -4273,8 +4265,7 @@ function_arg_advance (cum, mode, type, named) && info.reg_words == 1 && info.num_bytes < UNITS_PER_WORD && !TARGET_64BIT - && mips_abi != ABI_EABI - && mips_abi != ABI_MEABI) + && mips_abi != ABI_EABI) { rtx amount = GEN_INT (BITS_PER_WORD - info.num_bytes * BITS_PER_UNIT); rtx reg = gen_rtx_REG (word_mode, GP_ARG_FIRST + info.reg_offset); @@ -4408,25 +4399,6 @@ function_arg (cum, mode, type, named) } } - if (mips_abi == ABI_MEABI && info.fpr_p && !cum->prototype) - { - /* To make K&R varargs work we need to pass floating - point arguments in both integer and FP registers. */ - return gen_rtx_PARALLEL - (mode, - gen_rtvec (2, - gen_rtx_EXPR_LIST (VOIDmode, - gen_rtx_REG (mode, - GP_ARG_FIRST - + info.reg_offset), - const0_rtx), - gen_rtx_EXPR_LIST (VOIDmode, - gen_rtx_REG (mode, - FP_ARG_FIRST - + info.reg_offset), - const0_rtx))); - } - if (info.fpr_p) return gen_rtx_REG (mode, FP_ARG_FIRST + info.reg_offset); else @@ -4985,8 +4957,6 @@ override_options () mips_abi = ABI_64; else if (strcmp (mips_abi_string, "eabi") == 0) mips_abi = ABI_EABI; - else if (strcmp (mips_abi_string, "meabi") == 0) - mips_abi = ABI_MEABI; else fatal_error ("bad value (%s) for -mabi= switch", mips_abi_string); } @@ -5324,14 +5294,7 @@ override_options () temp = ((regno & 1) == 0 || size <= UNITS_PER_WORD); else if (FP_REG_P (regno)) - temp = (((regno % FP_INC) == 0 - /* I think this change is OK regardless of abi, but - I'm being cautions untill I can test this more. - HARD_REGNO_MODE_OK is about whether or not you - can move to and from a register without changing - the value, not about whether math works on the - register. */ - || (mips_abi == ABI_MEABI && size <= 4)) + temp = ((regno % FP_INC) == 0) && (((class == MODE_FLOAT || class == MODE_COMPLEX_FLOAT) && size <= UNITS_PER_FPVALUE) /* Allow integer modes that fit into a single @@ -5339,7 +5302,7 @@ override_options () when using instructions like cvt and trunc. */ || (class == MODE_INT && size <= UNITS_PER_FPREG) /* Allow TFmode for CCmode reloads. */ - || (ISA_HAS_8CC && mode == TFmode))); + || (ISA_HAS_8CC && mode == TFmode)); else if (MD_REG_P (regno)) temp = (class == MODE_INT @@ -5423,7 +5386,7 @@ mips_conditional_register_usage () call_really_used_regs[regno] = call_used_regs[regno] = 1; } /* odd registers from fp21 to fp31 are now caller saved. */ - if (mips_abi == ABI_N32 || mips_abi == ABI_MEABI) + if (mips_abi == ABI_N32) { int regno; for (regno = FP_REG_FIRST + 21; regno <= FP_REG_FIRST + 31; regno+=2) @@ -6310,7 +6273,6 @@ mips_asm_file_start (stream) case ABI_64: abi_string = "abi64"; break; case ABI_O64: abi_string = "abiO64"; break; case ABI_EABI: abi_string = TARGET_64BIT ? "eabi64" : "eabi32"; break; - case ABI_MEABI:abi_string = TARGET_64BIT ? "meabi64" : "meabi32"; break; default: abort (); } @@ -6697,7 +6659,7 @@ mips_initial_elimination_offset (from, to) case ARG_POINTER_REGNUM: compute_frame_size (get_frame_size ()); offset = cfun->machine->frame.total_size; - if (mips_abi == ABI_N32 || mips_abi == ABI_64 || mips_abi == ABI_MEABI) + if (mips_abi == ABI_N32 || mips_abi == ABI_64) offset -= current_function_pretend_args_size; break; @@ -8264,7 +8226,6 @@ function_arg_pass_by_reference (cum, mode, type, named) /* ??? cum can be NULL when called from mips_va_arg. The problem handled here hopefully is not relevant to mips_va_arg. */ if (cum && MUST_PASS_IN_STACK (mode, type) - && mips_abi != ABI_MEABI && FUNCTION_ARG (*cum, mode, type, named) != 0) return 1; @@ -10068,7 +10029,7 @@ mips_output_conditional_branch (insn, l: .set macro .set reorder - + When generating non-embedded PIC, instead of: j target diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index b092ae37002..a04bef94ed8 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -91,17 +91,6 @@ enum processor_type { #define ABI_64 2 #define ABI_EABI 3 #define ABI_O64 4 -/* MEABI is gcc's internal name for MIPS' new EABI (defined by MIPS) - which is not the same as the above EABI (defined by Cygnus, - Greenhills, and Toshiba?). MEABI is not yet complete or published, - but at this point it looks like N32 as far as calling conventions go, - but allows for either 32 or 64 bit registers. - - Currently MIPS is calling their EABI "the" MIPS EABI, and Cygnus' - EABI the legacy EABI. In the end we may end up calling both ABI's - EABI but give them different version numbers, but for now I'm going - with different names. */ -#define ABI_MEABI 5 /* Whether to emit abicalls code sequences or not. */ @@ -524,8 +513,6 @@ extern void sbss_section PARAMS ((void)); #define TARGET_SWITCHES \ { \ - {"no-crt0", 0, \ - N_("No default crt0.o") }, \ {"int64", MASK_INT64 | MASK_LONG64, \ N_("Use 64-bit int type")}, \ {"long64", MASK_LONG64, \ @@ -1001,12 +988,6 @@ extern int mips_abi; #define ASM_ABI_DEFAULT_SPEC "-mabi=eabi" #endif -#if MIPS_ABI_DEFAULT == ABI_MEABI -/* Most GAS don't know about MEABI. */ -#define MULTILIB_ABI_DEFAULT "mabi=meabi" -#define ASM_ABI_DEFAULT_SPEC "" -#endif - /* Only ELF targets can switch the ABI. */ #ifndef OBJECT_FORMAT_ELF #undef ASM_ABI_DEFAULT_SPEC @@ -1628,9 +1609,7 @@ do { \ /* Force right-alignment for small varargs in 32 bit little_endian mode */ -#define PAD_VARARGS_DOWN (TARGET_64BIT \ - || mips_abi == ABI_MEABI \ - ? BYTES_BIG_ENDIAN : !BYTES_BIG_ENDIAN) +#define PAD_VARARGS_DOWN (TARGET_64BIT ? BYTES_BIG_ENDIAN : !BYTES_BIG_ENDIAN) /* Define this macro if an argument declared as `char' or `short' in a prototype should actually be passed as an `int'. In addition to |