diff options
25 files changed, 419 insertions, 69 deletions
diff --git a/fixincludes/fixincl.c b/fixincludes/fixincl.c index 39b389d6775..489f1457ebc 100644 --- a/fixincludes/fixincl.c +++ b/fixincludes/fixincl.c @@ -829,7 +829,7 @@ fix_with_system (tFixDesc* p_fixd, /* * Now add the fix number and file names that may be needed */ - sprintf (pz_scan, " %ld '%s' '%s' (long) (p_fixd - fixDescList), + sprintf (pz_scan, " %ld '%s' '%s'", (long) (p_fixd - fixDescList), pz_fix_file, pz_file_source, pz_temp_file); } else /* NOT an "internal" fix: */ diff --git a/fixincludes/fixlib.c b/fixincludes/fixlib.c index 2dc9bb1cd9e..379d604aad7 100644 --- a/fixincludes/fixlib.c +++ b/fixincludes/fixlib.c @@ -259,7 +259,7 @@ make_raw_shell_str( char* pz_d, tCC* pz_s, size_t smax ) *(pz_d++) = '\''; for (;;) { - if (((size_t) (pz_d - pz_d_start) >= smax) + if ((size_t) (pz_d - pz_d_start) >= smax) return (char*)NULL; switch (*(pz_d++) = *(pz_s++)) { case NUL: diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1e546d5164d..6453c503355 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,8 +1,46 @@ -2008-04-25 Kai Tietz <kai.tietz@onevision.com> - - * config/i386/mingw32.h (SUBTARGET_INIT_BUILTINS): New. - * config/i386/i386.c (ix86_init_builtins): Use of - SUBTARGET_INIT_BUILTINS. +2008-04-26 Simon Baldwin <simonb@google.com> + + PR c/35652 + * builtins.c (c_strlen): Suppressed multiple warnings that can occur + with propagated string constants. + +2008-04-26 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (fix_trunc<mode>_i387_fisttp_with_temp): Use 'X' + constraint for operand 2 when operand 0 is memory operand. + (fix_truncdi_i387_with_temp): : Use 'X' constraint for operand 4 when + operand 0 is memory operand. + (fix_trunc<mode>_i387_with_temp): Ditto. + (*floatsi<mode>2_vector_mixed_with_temp): Use 'X' constraint for + operand 2 when operand 1 is memory operand. + (*float<SSEMODEI24:mode><MODEF:mode>2_mixed_with_temp): Ditto. + (*floatsi<mode>2_vector_sse_with_temp): Ditto. + (*float<SSEMODEI24:mode><MODEF:mode>2_sse_with_temp): Ditto. + (*float<SSEMODEI24:mode><X87MODEF:mode>2_i387_with_temp): Ditto. + (floatdi<X87MODEF:mode>2_i387_with_xmm): Use 'X' constraint for + operands 2,3 and 4 when operand 1 is memory operand. + (fistdi2_with_temp): Use 'X' constraint for operand 2 when operand 0 + is memory operand. + (fistdi2_floor_with_temp): Ditto. + (fist<mode>2_floor_with_temp): Ditto. + (fistdi2_ceil_with_temp): Ditto. + (fist<mode>2_ceil_with_temp): Ditto. + (*truncdfsf_fast_mixed): Merge alternatives 0 and 1. + +2008-04-26 David Daney <ddaney@avtrex.com> + + * config/mips/mips.md (UNSPEC_COMPARE_AND_SWAP_12): New + unspec_volitile. + (UNSPEC_SYNC_OLD_OP, UNSPEC_SYNC_NEW_OP, UNSPEC_SYNC_EXCHANGE, + UNSPEC_MEMORY_BARRIER, UNSPEC_SET_GOT_VERSION, + UNSPEC_UPDATE_GOT_VERSION): Renumber. + (sync_compare_and_swap<mode>): New expand for QI and HI modes. + (compare_and_swap_12): New insn. + * config/mips/mips-protos.h (mips_expand_compare_and_swap_12): Declare. + * config/mips/mips.c (mips_force_binary): New function. + (mips_emit_int_order_test, mips_expand_synci_loop): Use it. + (mips_expand_compare_and_swap_12): New function. + * config/mips/mips.h (MIPS_COMPARE_AND_SWAP_12): New macro. 2008-04-25 Jan Hubicka <jh@suse.cz> diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index af1b67727f8..3f4dfd2dae6 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20080425 +20080426 diff --git a/gcc/builtins.c b/gcc/builtins.c index ad1eda47e10..8892b48890b 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -447,7 +447,12 @@ c_strlen (tree src, int only_value) runtime. */ if (offset < 0 || offset > max) { - warning (0, "offset outside bounds of constant string"); + /* Suppress multiple warnings for propagated constant strings. */ + if (! TREE_NO_WARNING (src)) + { + warning (0, "offset outside bounds of constant string"); + TREE_NO_WARNING (src) = 1; + } return NULL_TREE; } diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 3a1ae746f9a..924602278a6 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -35,6 +35,7 @@ along with GCC; see the file COPYING3. If not see #include "insn-codes.h" #include "insn-attr.h" #include "flags.h" +#include "c-common.h" #include "except.h" #include "function.h" #include "recog.h" @@ -20017,10 +20018,6 @@ ix86_init_builtins (void) { if (TARGET_MMX) ix86_init_mmx_sse_builtins (); - -#ifdef SUBTARGET_INIT_BUILTINS - SUBTARGET_INIT_BUILTINS; -#endif } /* Errors in the source file can cause expand_expr to return const0_rtx diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 291fc6fdfee..ee9d24fa109 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4208,23 +4208,22 @@ "") (define_insn "*truncdfsf_fast_mixed" - [(set (match_operand:SF 0 "nonimmediate_operand" "=m,f,x") + [(set (match_operand:SF 0 "nonimmediate_operand" "=fm,x") (float_truncate:SF - (match_operand:DF 1 "nonimmediate_operand" "f ,f,xm")))] + (match_operand:DF 1 "nonimmediate_operand" "f ,xm")))] "TARGET_SSE2 && TARGET_MIX_SSE_I387 && flag_unsafe_math_optimizations" { switch (which_alternative) { case 0: - case 1: return output_387_reg_move (insn, operands); - case 2: + case 1: return "cvtsd2ss\t{%1, %0|%0, %1}"; default: gcc_unreachable (); } } - [(set_attr "type" "fmov,fmov,ssecvt") + [(set_attr "type" "fmov,ssecvt") (set_attr "mode" "SF")]) ;; Yes, this one doesn't depend on flag_unsafe_math_optimizations, @@ -4642,7 +4641,7 @@ (define_insn "fix_trunc<mode>_i387_fisttp_with_temp" [(set (match_operand:X87MODEI 0 "nonimmediate_operand" "=m,?r") (fix:X87MODEI (match_operand 1 "register_operand" "f,f"))) - (clobber (match_operand:X87MODEI 2 "memory_operand" "=m,m")) + (clobber (match_operand:X87MODEI 2 "memory_operand" "=X,m")) (clobber (match_scratch:XF 3 "=&1f,&1f"))] "X87_FLOAT_MODE_P (GET_MODE (operands[1])) && TARGET_FISTTP @@ -4731,7 +4730,7 @@ (fix:DI (match_operand 1 "register_operand" "f,f"))) (use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m")) - (clobber (match_operand:DI 4 "memory_operand" "=m,m")) + (clobber (match_operand:DI 4 "memory_operand" "=X,m")) (clobber (match_scratch:XF 5 "=&1f,&1f"))] "X87_FLOAT_MODE_P (GET_MODE (operands[1])) && !TARGET_FISTTP @@ -4788,7 +4787,7 @@ (fix:X87MODEI12 (match_operand 1 "register_operand" "f,f"))) (use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m")) - (clobber (match_operand:X87MODEI12 4 "memory_operand" "=m,m"))] + (clobber (match_operand:X87MODEI12 4 "memory_operand" "=X,m"))] "X87_FLOAT_MODE_P (GET_MODE (operands[1])) && !TARGET_FISTTP && !SSE_FLOAT_MODE_P (GET_MODE (operands[1]))" @@ -4965,7 +4964,7 @@ [(set (match_operand:MODEF 0 "register_operand" "=f,f,x,x,x") (float:MODEF (match_operand:SI 1 "nonimmediate_operand" "m,?r,r,m,!x"))) - (clobber (match_operand:SI 2 "memory_operand" "=m,m,m,m,m"))] + (clobber (match_operand:SI 2 "memory_operand" "=X,m,m,X,m"))] "TARGET_SSE2 && TARGET_MIX_SSE_I387 && TARGET_USE_VECTOR_CONVERTS && !optimize_size" "#" @@ -4995,7 +4994,7 @@ [(set (match_operand:MODEF 0 "register_operand" "=f,f,x,x") (float:MODEF (match_operand:SSEMODEI24 1 "nonimmediate_operand" "m,?r,r,m"))) - (clobber (match_operand:SSEMODEI24 2 "memory_operand" "=m,m,m,m"))] + (clobber (match_operand:SSEMODEI24 2 "memory_operand" "=X,m,m,X"))] "(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387" "#" @@ -5073,7 +5072,7 @@ [(set (match_operand:MODEF 0 "register_operand" "=x,x,x") (float:MODEF (match_operand:SI 1 "nonimmediate_operand" "r,m,!x"))) - (clobber (match_operand:SI 2 "memory_operand" "=m,m,m"))] + (clobber (match_operand:SI 2 "memory_operand" "=m,X,m"))] "TARGET_SSE2 && TARGET_SSE_MATH && TARGET_USE_VECTOR_CONVERTS && !optimize_size" "#" @@ -5217,7 +5216,7 @@ [(set (match_operand:MODEF 0 "register_operand" "=x,x") (float:MODEF (match_operand:SSEMODEI24 1 "nonimmediate_operand" "r,m"))) - (clobber (match_operand:SSEMODEI24 2 "memory_operand" "=m,m"))] + (clobber (match_operand:SSEMODEI24 2 "memory_operand" "=m,X"))] "(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT) && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH" "#" @@ -5303,7 +5302,7 @@ [(set (match_operand:X87MODEF 0 "register_operand" "=f,f") (float:X87MODEF (match_operand:SSEMODEI24 1 "nonimmediate_operand" "m,?r"))) - (clobber (match_operand:SSEMODEI24 2 "memory_operand" "=m,m"))] + (clobber (match_operand:SSEMODEI24 2 "memory_operand" "=X,m"))] "TARGET_80387" "@ fild%z1\t%1 @@ -5351,9 +5350,9 @@ [(set (match_operand:X87MODEF 0 "register_operand" "=f,f") (float:X87MODEF (match_operand:DI 1 "nonimmediate_operand" "m,?r"))) - (clobber (match_scratch:V4SI 3 "=&x,x")) - (clobber (match_scratch:V4SI 4 "=&x,x")) - (clobber (match_operand:DI 2 "memory_operand" "=m,m"))] + (clobber (match_scratch:V4SI 3 "=X,x")) + (clobber (match_scratch:V4SI 4 "=X,x")) + (clobber (match_operand:DI 2 "memory_operand" "=X,m"))] "TARGET_80387 && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES && !TARGET_64BIT && !optimize_size" "#" @@ -17532,7 +17531,7 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r") (unspec:DI [(match_operand:XF 1 "register_operand" "f,f")] UNSPEC_FIST)) - (clobber (match_operand:DI 2 "memory_operand" "=m,m")) + (clobber (match_operand:DI 2 "memory_operand" "=X,m")) (clobber (match_scratch:XF 3 "=&1f,&1f"))] "TARGET_USE_FANCY_MATH_387" "#" @@ -17782,7 +17781,7 @@ UNSPEC_FIST_FLOOR)) (use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m")) - (clobber (match_operand:DI 4 "memory_operand" "=m,m")) + (clobber (match_operand:DI 4 "memory_operand" "=X,m")) (clobber (match_scratch:XF 5 "=&1f,&1f"))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" @@ -17841,7 +17840,7 @@ UNSPEC_FIST_FLOOR)) (use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m")) - (clobber (match_operand:X87MODEI12 4 "memory_operand" "=m,m"))] + (clobber (match_operand:X87MODEI12 4 "memory_operand" "=X,m"))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" "#" @@ -18047,7 +18046,7 @@ UNSPEC_FIST_CEIL)) (use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m")) - (clobber (match_operand:DI 4 "memory_operand" "=m,m")) + (clobber (match_operand:DI 4 "memory_operand" "=X,m")) (clobber (match_scratch:XF 5 "=&1f,&1f"))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" @@ -18106,7 +18105,7 @@ UNSPEC_FIST_CEIL)) (use (match_operand:HI 2 "memory_operand" "m,m")) (use (match_operand:HI 3 "memory_operand" "m,m")) - (clobber (match_operand:X87MODEI12 4 "memory_operand" "=m,m"))] + (clobber (match_operand:X87MODEI12 4 "memory_operand" "=X,m"))] "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" "#" diff --git a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h index 19b57dbecc8..3a3b74cf8be 100644 --- a/gcc/config/i386/mingw32.h +++ b/gcc/config/i386/mingw32.h @@ -180,23 +180,6 @@ __enable_execute_stack (void *addr) \ #undef ENABLE_EXECUTE_STACK #define ENABLE_EXECUTE_STACK MINGW_ENABLE_EXECUTE_STACK -#define SUBTARGET_INIT_BUILTINS \ -do { \ - if (TARGET_64BIT_MS_ABI) \ - { \ - /* These builtin functions have a different return \ - type (intptr_t) on 64-bit MS Windows. */ \ - disable_builtin_function ("execl"); \ - disable_builtin_function ("execlp"); \ - disable_builtin_function ("execle"); \ - disable_builtin_function ("execv"); \ - disable_builtin_function ("execvp"); \ - disable_builtin_function ("execve"); \ - } \ - /* Second argument of MS scalb is long, not double. */ \ - disable_builtin_function ("scalb"); \ -} while (0) \ - #ifdef IN_LIBGCC2 #include <windows.h> #endif diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index deb99a08867..fbac8fcfd07 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -292,5 +292,6 @@ extern bool mips_use_ins_ext_p (rtx, HOST_WIDE_INT, HOST_WIDE_INT); extern const char *mips16e_output_save_restore (rtx, HOST_WIDE_INT); extern bool mips16e_save_restore_pattern_p (rtx, HOST_WIDE_INT, struct mips16e_save_restore_info *); +extern void mips_expand_compare_and_swap_12 (rtx, rtx, rtx, rtx); #endif /* ! GCC_MIPS_PROTOS_H */ diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 94a14274533..86072acf4ab 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1,6 +1,6 @@ /* Subroutines used for MIPS code generation. Copyright (C) 1989, 1990, 1991, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. Contributed by A. Lichnewsky, lich@inria.inria.fr. Changes by Michael Meissner, meissner@osf.org. @@ -2121,6 +2121,19 @@ mips_emit_binary (enum rtx_code code, rtx target, rtx op0, rtx op1) gen_rtx_fmt_ee (code, GET_MODE (target), op0, op1))); } +/* Compute (CODE OP0 OP1) and store the result in a new register + of mode MODE. Return that new register. */ + +static rtx +mips_force_binary (enum machine_mode mode, enum rtx_code code, rtx op0, rtx op1) +{ + rtx reg; + + reg = gen_reg_rtx (mode); + mips_emit_binary (code, reg, op0, op1); + return reg; +} + /* Copy VALUE to a register and return that register. If new pseudos are allowed, copy it into a new register, otherwise use DEST. */ @@ -3741,8 +3754,10 @@ mips_emit_int_order_test (enum rtx_code code, bool *invert_ptr, } else if (invert_ptr == 0) { - rtx inv_target = gen_reg_rtx (GET_MODE (target)); - mips_emit_binary (inv_code, inv_target, cmp0, cmp1); + rtx inv_target; + + inv_target = mips_force_binary (GET_MODE (target), + inv_code, cmp0, cmp1); mips_emit_binary (XOR, target, inv_target, const1_rtx); } else @@ -5850,8 +5865,7 @@ mips_expand_synci_loop (rtx begin, rtx end) emit_insn (gen_synci (begin)); - cmp = gen_reg_rtx (Pmode); - mips_emit_binary (GTU, cmp, begin, end); + cmp = mips_force_binary (Pmode, GTU, begin, end); mips_emit_binary (PLUS, begin, begin, inc); @@ -5859,6 +5873,68 @@ mips_expand_synci_loop (rtx begin, rtx end) emit_jump_insn (gen_condjump (cmp_result, label)); } +/* Expand a QI or HI mode compare_and_swap. The operands are the same + as for the generator function. */ + +void +mips_expand_compare_and_swap_12 (rtx result, rtx mem, rtx oldval, rtx newval) +{ + rtx orig_addr, memsi_addr, memsi, shift, shiftsi, unshifted_mask; + rtx mask, inverted_mask, oldvalsi, old_shifted, newvalsi, new_shifted, res; + + /* Compute the address of the containing SImode value. */ + orig_addr = force_reg (Pmode, XEXP (mem, 0)); + memsi_addr = mips_force_binary (Pmode, AND, orig_addr, + force_reg (Pmode, GEN_INT (-4))); + + /* Create a memory reference for it. */ + memsi = gen_rtx_MEM (SImode, memsi_addr); + set_mem_alias_set (memsi, ALIAS_SET_MEMORY_BARRIER); + MEM_VOLATILE_P (memsi) = MEM_VOLATILE_P (mem); + + /* Work out the byte offset of the QImode or HImode value, + counting from the least significant byte. */ + shift = mips_force_binary (Pmode, AND, orig_addr, GEN_INT (3)); + if (TARGET_BIG_ENDIAN) + mips_emit_binary (XOR, shift, shift, + GEN_INT (GET_MODE (mem) == QImode ? 3 : 2)); + + /* Multiply by eight to convert the shift value from bytes to bits. */ + mips_emit_binary (ASHIFT, shift, shift, GEN_INT (3)); + + /* Make the final shift an SImode value, so that it can be used in + SImode operations. */ + shiftsi = force_reg (SImode, gen_lowpart (SImode, shift)); + + /* Set MASK to an inclusive mask of the QImode or HImode value. */ + unshifted_mask = GEN_INT (GET_MODE_MASK (GET_MODE (mem))); + unshifted_mask = force_reg (SImode, unshifted_mask); + mask = mips_force_binary (SImode, ASHIFT, unshifted_mask, shiftsi); + + /* Compute the equivalent exclusive mask. */ + inverted_mask = gen_reg_rtx (SImode); + emit_insn (gen_rtx_SET (VOIDmode, inverted_mask, + gen_rtx_NOT (SImode, mask))); + + /* Shift the old value into place. */ + oldvalsi = force_reg (SImode, gen_lowpart (SImode, oldval)); + old_shifted = mips_force_binary (SImode, ASHIFT, oldvalsi, shiftsi); + + /* Do the same for the new value. */ + newvalsi = force_reg (SImode, gen_lowpart (SImode, newval)); + new_shifted = mips_force_binary (SImode, ASHIFT, newvalsi, shiftsi); + + /* Do the SImode atomic access. */ + res = gen_reg_rtx (SImode); + emit_insn (gen_compare_and_swap_12 (res, memsi, mask, inverted_mask, + old_shifted, new_shifted)); + + /* Shift and convert the result. */ + mips_emit_binary (AND, res, res, mask); + mips_emit_binary (LSHIFTRT, res, res, shiftsi); + mips_emit_move (result, gen_lowpart (GET_MODE (result), res)); +} + /* Return true if it is possible to use left/right accesses for a bitfield of WIDTH bits starting BITPOS bits into *OP. When returning true, update *OP, *LEFT and *RIGHT as follows: diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 3a0e58c96e6..cda433aa4f0 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2906,6 +2906,30 @@ while (0) /* Return an asm string that atomically: + - Given that %2 contains a bit mask and %3 the inverted mask and + that %4 and %5 have already been ANDed with $2. + + - Compares the bits in memory reference %1 selected by mask %2 to + register %4 and, if they are equal, changes the selected bits + in memory to %5. + + - Sets register %0 to the old value of memory reference %1. + */ +#define MIPS_COMPARE_AND_SWAP_12 \ + "%(%<%[%|sync\n" \ + "1:\tll\t%0,%1\n" \ + "\tand\t%@,%0,%2\n" \ + "\tbne\t%@,%4,2f\n" \ + "\tand\t%@,%0,%3\n" \ + "\tor\t%@,%@,%5\n" \ + "\tsc\t%@,%1\n" \ + "\tbeq\t%@,%.,1b\n" \ + "\tnop\n" \ + "\tsync%-%]%>%)\n" \ + "2:\n" + +/* Return an asm string that atomically: + - Sets memory reference %0 to %0 INSN %1. SUFFIX is the suffix that should be added to "ll" and "sc" diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index cbdcdc6ed13..05adf2226d4 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -54,12 +54,13 @@ (UNSPEC_SYNCI 35) (UNSPEC_SYNC 36) (UNSPEC_COMPARE_AND_SWAP 37) - (UNSPEC_SYNC_OLD_OP 38) - (UNSPEC_SYNC_NEW_OP 39) - (UNSPEC_SYNC_EXCHANGE 40) - (UNSPEC_MEMORY_BARRIER 41) - (UNSPEC_SET_GOT_VERSION 42) - (UNSPEC_UPDATE_GOT_VERSION 43) + (UNSPEC_COMPARE_AND_SWAP_12 38) + (UNSPEC_SYNC_OLD_OP 39) + (UNSPEC_SYNC_NEW_OP 40) + (UNSPEC_SYNC_EXCHANGE 41) + (UNSPEC_MEMORY_BARRIER 42) + (UNSPEC_SET_GOT_VERSION 43) + (UNSPEC_UPDATE_GOT_VERSION 44) (UNSPEC_ADDRESS_FIRST 100) @@ -4447,6 +4448,34 @@ } [(set_attr "length" "32")]) +(define_expand "sync_compare_and_swap<mode>" + [(match_operand:SHORT 0 "register_operand") + (match_operand:SHORT 1 "memory_operand") + (match_operand:SHORT 2 "general_operand") + (match_operand:SHORT 3 "general_operand")] + "GENERATE_LL_SC" +{ + mips_expand_compare_and_swap_12 (operands[0], operands[1], + operands[2], operands[3]); + DONE; +}) + +;; Helper insn for mips_expand_compare_and_swap_12. +(define_insn "compare_and_swap_12" + [(set (match_operand:SI 0 "register_operand" "=&d") + (match_operand:SI 1 "memory_operand" "+R")) + (set (match_dup 1) + (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "d") + (match_operand:SI 3 "register_operand" "d") + (match_operand:SI 4 "register_operand" "d") + (match_operand:SI 5 "register_operand" "d")] + UNSPEC_COMPARE_AND_SWAP_12))] + "GENERATE_LL_SC" +{ + return MIPS_COMPARE_AND_SWAP_12; +} + [(set_attr "length" "40")]) + (define_insn "sync_add<mode>" [(set (match_operand:GPR 0 "memory_operand" "+R,R") (unspec_volatile:GPR diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index ee39ef18c3c..dbe52c3ff1a 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,10 @@ +2008-04-26 George Helffrich <george@gcc.gnu.org> + + PR fortran/35892 + PR fortran/35154 + * trans-common.c (create_common): Add decl to function + chain (if inside one) to preserve identifier scope in debug output. + 2008-04-25 Jan Hubicka <jh@suse.cz> * trans-decl.c (trans_function_start): Update. diff --git a/gcc/fortran/trans-common.c b/gcc/fortran/trans-common.c index c6a386e0120..5c91bf57946 100644 --- a/gcc/fortran/trans-common.c +++ b/gcc/fortran/trans-common.c @@ -685,10 +685,14 @@ create_common (gfc_common_head *com, segment_info *head, bool saw_equiv) /* This is a fake variable just for debugging purposes. */ TREE_ASM_WRITTEN (var_decl) = 1; - if (com) + /* To preserve identifier names in COMMON, chain to procedure + scope unless at top level in a module definition. */ + if (com + && s->sym->ns->proc_name + && s->sym->ns->proc_name->attr.flavor == FL_MODULE) var_decl = pushdecl_top_level (var_decl); else - gfc_add_decl_to_function (var_decl); + gfc_add_decl_to_function (var_decl); SET_DECL_VALUE_EXPR (var_decl, fold_build3 (COMPONENT_REF, TREE_TYPE (s->field), diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bbb71b265ed..d99b8451b5e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,24 @@ +2008-04-26 H.J. Lu <hongjiu.lu@intel.com> + + PR testsuite/36053 + * gcc.dg/large-size-array-2.c: Fix x86_64-*-mingw* check. + * gcc.dg/large-size-array-4.c: Likewise. + +2008-04-26 George Helffrich <george@gcc.gnu.org> + + PRs fortran/PR35154, fortran/PR23057 + * gfortran.dg/debug/pr35154-stabs.f: New test case for + .stabs functionality. + * gfortran.dg/debug/pr35154-dwarf2.f: New test case for + DWARF functionality. + +2008-04-26 Richard Sandiford <rsandifo@nildram.co.uk> + + * gcc.target/mips/gcc-have-sync-compare-and-swap-1.c: Expect + __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 and + __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 to be defined. + * gcc.target/mips/gcc-have-sync-compare-and-swap-2.c: Likewise. + 2008-04-25 Tobias Burnus <burnus@net-b.de> * gfortran/array_constructor_23.f: Change REAL(10) into kind > 8. diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c index 72eff4da37c..4c642258f7b 100644 --- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c +++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c @@ -1,11 +1,11 @@ /* { dg-do preprocess } */ /* { dg-mips-options "-mips2" } */ -#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 +#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1) == defined (__mips16) #error nonono #endif -#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 +#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2) == defined (__mips16) #error nonono #endif diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c index fed2b38a57f..4265e4167ba 100644 --- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c +++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c @@ -1,11 +1,11 @@ /* { dg-do preprocess } */ /* { dg-mips-options "-mgp64" } */ -#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 +#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1) == defined (__mips16) #error nonono #endif -#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 +#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2) == defined (__mips16) #error nonono #endif diff --git a/gcc/testsuite/gfortran.dg/debug/pr35154-dwarf2.f b/gcc/testsuite/gfortran.dg/debug/pr35154-dwarf2.f new file mode 100644 index 00000000000..0203d134a62 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/debug/pr35154-dwarf2.f @@ -0,0 +1,37 @@ +C Test program for common block debugging. G. Helffrich 11 July 2004. +C { dg-do compile } +C { dg-skip-if "DWARF-2 only" { "*-*-*" } { "*" } { "-gdwarf-2" } } +C { dg-options "-dA" } + common i,j + common /label/l,m + i = 1 + j = 2 + k = 3 + l = 4 + m = 5 + call sub + end + subroutine sub + common /label/l,m + logical first + save n + data first /.true./ + if (first) then + n = 0 + first = .false. + endif + n = n + 1 + l = l + 1 + return + end + +C { dg-final { scan-assembler "(DIE.*DW_TAG_common_block)" } } +C { dg-final { scan-assembler "DW_AT_name: \"__BLNK__\"" } } +C { dg-final { scan-assembler "(DIE.*DW_TAG_member)" } } +C { dg-final { scan-assembler "\"i.*\".*DW_AT_name" } } +C { dg-final { scan-assembler "\"j.*\".*DW_AT_name" } } +C { dg-final { scan-assembler "(DIE.*DW_TAG_common_block)" } } +C { dg-final { scan-assembler "DW_AT_name: \"label\"" } } +C { dg-final { scan-assembler "(DIE.*DW_TAG_member)" } } +C { dg-final { scan-assembler "\"l.*\".*DW_AT_name" } } +C { dg-final { scan-assembler "\"m.*\".*DW_AT_name" } } diff --git a/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f b/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f new file mode 100644 index 00000000000..7294771bd3e --- /dev/null +++ b/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f @@ -0,0 +1,35 @@ +C Test program for common block debugging. G. Helffrich 11 July 2004. +C { dg-do compile } +C { dg-skip-if "No stabs" { mmix-*-* *-*-netware* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-sysv5* *-*-vxworks* } { "*" } { "" } } +C { dg-skip-if "No stabs" {*-*-* } { "*" } { "-gstabs" } } + common i,j + common /label/l,m + i = 1 + j = 2 + k = 3 + l = 4 + m = 5 + call sub + end + subroutine sub + common /label/l,m + logical first + save n + data first /.true./ + if (first) then + n = 0 + first = .false. + endif + n = n + 1 + l = l + 1 + return + end + +C { dg-final { scan-assembler ".stabs.*\"__BLNK__\",226" } } +C { dg-final { scan-assembler ".stabs.*\"i:V.*\",.*,0" } } +C { dg-final { scan-assembler ".stabs.*\"j:V.*\",.*,4" } } +C { dg-final { scan-assembler ".stabs.*\"__BLNK__\",228" } } +C { dg-final { scan-assembler ".stabs.*\"label_\",226" } } +C { dg-final { scan-assembler ".stabs.*\"l:V.*\",.*,0" } } +C { dg-final { scan-assembler ".stabs.*\"m:V.*\",.*,4" } } +C { dg-final { scan-assembler ".stabs.*\"label_\",228" } } diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 23057295399..ded6f51a2ab 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,5 +1,19 @@ 2008-04-25 Benjamin Kosnik <bkoz@redhat.com> + PR libstdc++/35922 + * include/std/unordered_map: Include debug/unordered_map if + _GLIBCXX_DEBUG. + * testsuite/23_containers/unordered_map/requirements/debug.cc: Move... + * testsuite/23_containers/unordered_map/requirements/ + debug_container.cc: ...here. + * testsuite/23_containers/unordered_map/requirements/debug_mode.cc: New. + * testsuite/23_containers/unordered_set/requirements/debug.cc: Move... + * testsuite/23_containers/unordered_set/requirements/ + debug_container.cc: ...here. + * testsuite/23_containers/unordered_set/requirements/debug_mode.cc: New. + +2008-04-25 Benjamin Kosnik <bkoz@redhat.com> + PR libstdc++/35887 * acinclude.m4: (GLIBCXX_ENABLE_PARALLEL): Check for thread support. * configure.ac: Re-order compiler macros. diff --git a/libstdc++-v3/include/std/unordered_map b/libstdc++-v3/include/std/unordered_map index 5fb714dd48d..73be402e474 100644 --- a/libstdc++-v3/include/std/unordered_map +++ b/libstdc++-v3/include/std/unordered_map @@ -1,6 +1,6 @@ // <unordered_map> -*- C++ -*- -// Copyright (C) 2007 Free Software Foundation, Inc. +// Copyright (C) 2007, 2008 Free Software Foundation, Inc. // // This file is part of the GNU ISO C++ Library. This library is free // software; you can redistribute it and/or modify it under the @@ -73,4 +73,8 @@ # undef _GLIBCXX_INCLUDE_AS_CXX0X #endif +#ifdef _GLIBCXX_DEBUG +# include <debug/unordered_map> +#endif + #endif // _GLIBCXX_UNORDERED_MAP diff --git a/libstdc++-v3/testsuite/23_containers/unordered_map/requirements/debug.cc b/libstdc++-v3/testsuite/23_containers/unordered_map/requirements/debug_container.cc index a880bdc57a8..a880bdc57a8 100644 --- a/libstdc++-v3/testsuite/23_containers/unordered_map/requirements/debug.cc +++ b/libstdc++-v3/testsuite/23_containers/unordered_map/requirements/debug_container.cc diff --git a/libstdc++-v3/testsuite/23_containers/unordered_map/requirements/debug_mode.cc b/libstdc++-v3/testsuite/23_containers/unordered_map/requirements/debug_mode.cc new file mode 100644 index 00000000000..c2d3ffe88da --- /dev/null +++ b/libstdc++-v3/testsuite/23_containers/unordered_map/requirements/debug_mode.cc @@ -0,0 +1,38 @@ +// { dg-options "-std=gnu++0x -D_GLIBCXX_DEBUG" } +// { dg-do compile } + +// Copyright (C) 2007 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 2, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING. If not, write to the Free +// Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, +// USA. + +// As a special exception, you may use this file as part of a free software +// library without restriction. Specifically, if other files instantiate +// templates or use macros or inline functions from this file, or you compile +// this file and link it with other files to produce an executable, this +// file does not by itself cause the resulting executable to be covered by +// the GNU General Public License. This exception does not however +// invalidate any other reasons why the executable file might be covered by +// the GNU General Public License. + +#include <unordered_map> + +//PR libstdc++/35922 +int main() +{ + std::unordered_map<int, int> m; +} + diff --git a/libstdc++-v3/testsuite/23_containers/unordered_set/requirements/debug.cc b/libstdc++-v3/testsuite/23_containers/unordered_set/requirements/debug_container.cc index 2894dff0edb..2894dff0edb 100644 --- a/libstdc++-v3/testsuite/23_containers/unordered_set/requirements/debug.cc +++ b/libstdc++-v3/testsuite/23_containers/unordered_set/requirements/debug_container.cc diff --git a/libstdc++-v3/testsuite/23_containers/unordered_set/requirements/debug_mode.cc b/libstdc++-v3/testsuite/23_containers/unordered_set/requirements/debug_mode.cc new file mode 100644 index 00000000000..463e6a361f0 --- /dev/null +++ b/libstdc++-v3/testsuite/23_containers/unordered_set/requirements/debug_mode.cc @@ -0,0 +1,38 @@ +// { dg-options "-std=gnu++0x -D_GLIBCXX_DEBUG" } +// { dg-do compile } + +// Copyright (C) 2007 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 2, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING. If not, write to the Free +// Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, +// USA. + +// As a special exception, you may use this file as part of a free software +// library without restriction. Specifically, if other files instantiate +// templates or use macros or inline functions from this file, or you compile +// this file and link it with other files to produce an executable, this +// file does not by itself cause the resulting executable to be covered by +// the GNU General Public License. This exception does not however +// invalidate any other reasons why the executable file might be covered by +// the GNU General Public License. + +#include <unordered_set> + +//PR libstdc++/35922 +int main() +{ + std::unordered_set<int> s; +} + |