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-rw-r--r--gcc/config/alpha/alpha-protos.h1
-rw-r--r--gcc/config/alpha/alpha.c83
-rw-r--r--gcc/config/alpha/alpha.h43
-rw-r--r--gcc/config/alpha/alpha.md65
-rw-r--r--gcc/config/alpha/elf.h35
-rw-r--r--gcc/config/alpha/freebsd.h4
-rw-r--r--gcc/config/alpha/linux.h60
-rw-r--r--gcc/config/alpha/osf.h42
-rw-r--r--gcc/config/alpha/osf5.h34
-rw-r--r--gcc/config/alpha/t-interix5
-rw-r--r--gcc/config/alpha/t-osf410
-rw-r--r--gcc/config/alpha/xm-alpha.h5
12 files changed, 277 insertions, 110 deletions
diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h
index c12b92d9c79..06ecfa3848b 100644
--- a/gcc/config/alpha/alpha-protos.h
+++ b/gcc/config/alpha/alpha-protos.h
@@ -100,6 +100,7 @@ extern int alpha_expand_block_move PARAMS ((rtx []));
extern int alpha_expand_block_clear PARAMS ((rtx []));
extern int alpha_adjust_cost PARAMS ((rtx, rtx, rtx, int));
extern rtx alpha_return_addr PARAMS ((int, rtx));
+extern rtx alpha_gp_save_rtx PARAMS ((void));
extern void print_operand PARAMS ((FILE *, rtx, int));
extern void print_operand_address PARAMS ((FILE *, rtx));
extern void alpha_initialize_trampoline PARAMS ((rtx, rtx, rtx, int, int, int));
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 25d7d3b503f..b2dc931dc88 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1,6 +1,6 @@
/* Subroutines used for code generation on the DEC Alpha.
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000 Free Software Foundation, Inc.
+ 2000, 2001 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GNU CC.
@@ -29,7 +29,6 @@ Boston, MA 02111-1307, USA. */
#include "real.h"
#include "insn-config.h"
#include "conditions.h"
-#include "insn-flags.h"
#include "output.h"
#include "insn-attr.h"
#include "flags.h"
@@ -343,6 +342,19 @@ override_options ()
if (!g_switch_set)
g_switch_value = 8;
+ /* Align labels and loops for optimal branching. */
+ /* ??? Kludge these by not doing anything if we don't optimize and also if
+ we are writing ECOFF symbols to work around a bug in DEC's assembler. */
+ if (optimize > 0 && write_symbols != SDB_DEBUG)
+ {
+ if (align_loops <= 0)
+ align_loops = 16;
+ if (align_jumps <= 0)
+ align_jumps = 16;
+ }
+ if (align_functions <= 0)
+ align_functions = 16;
+
/* Acquire a unique set number for our register saves and restores. */
alpha_sr_alias_set = new_alias_set ();
@@ -3665,8 +3677,8 @@ alpha_mark_machine_status (p)
if (machine)
{
- ggc_mark_rtx (machine->eh_epilogue_sp_ofs);
ggc_mark_rtx (machine->ra_rtx);
+ ggc_mark_rtx (machine->gp_save_rtx);
}
}
@@ -3708,6 +3720,29 @@ alpha_return_addr (count, frame)
return reg;
}
+/* Return or create a pseudo containing the gp value for the current
+ function. Needed only if TARGET_LD_BUGGY_LDGP. */
+
+rtx
+alpha_gp_save_rtx ()
+{
+ rtx init, reg;
+
+ reg = cfun->machine->gp_save_rtx;
+ if (reg == NULL)
+ {
+ reg = gen_reg_rtx (DImode);
+ cfun->machine->gp_save_rtx = reg;
+ init = gen_rtx_SET (VOIDmode, reg, gen_rtx_REG (DImode, 29));
+
+ push_topmost_sequence ();
+ emit_insn_after (init, get_insns ());
+ pop_topmost_sequence ();
+ }
+
+ return reg;
+}
+
static int
alpha_ra_ever_killed ()
{
@@ -4317,6 +4352,7 @@ alpha_va_arg (valist, type)
tree t;
tree offset_field, base_field, addr_tree, addend;
tree wide_type, wide_ofs;
+ int indirect = 0;
if (TARGET_OPEN_VMS)
return std_expand_builtin_va_arg (valist, type);
@@ -4335,7 +4371,13 @@ alpha_va_arg (valist, type)
wide_ofs = save_expr (build1 (CONVERT_EXPR, wide_type, offset_field));
addend = wide_ofs;
- if (FLOAT_TYPE_P (type))
+
+ if (TYPE_MODE (type) == TFmode || TYPE_MODE (type) == TCmode)
+ {
+ indirect = 1;
+ tsize = UNITS_PER_WORD;
+ }
+ else if (FLOAT_TYPE_P (type))
{
tree fpaddend, cond;
@@ -4361,6 +4403,12 @@ alpha_va_arg (valist, type)
TREE_SIDE_EFFECTS (t) = 1;
expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
+ if (indirect)
+ {
+ addr = force_reg (Pmode, addr);
+ addr = gen_rtx_MEM (Pmode, addr);
+ }
+
return addr;
}
@@ -4417,6 +4465,18 @@ alpha_sa_mask (imaskP, fmaskP)
fmask |= (1L << (i - 32));
}
+ /* We need to restore these for the handler. */
+ if (current_function_calls_eh_return)
+ {
+ for (i = 0; ; ++i)
+ {
+ unsigned regno = EH_RETURN_DATA_REGNO (i);
+ if (regno == INVALID_REGNUM)
+ break;
+ imask |= 1L << regno;
+ }
+ }
+
if (imask || fmask || alpha_ra_ever_killed ())
imask |= (1L << REG_RA);
}
@@ -5113,7 +5173,11 @@ alpha_expand_epilogue ()
fp_offset = 0;
sa_reg = stack_pointer_rtx;
- eh_ofs = cfun->machine->eh_epilogue_sp_ofs;
+ if (current_function_calls_eh_return)
+ eh_ofs = EH_RETURN_STACKADJ_RTX;
+ else
+ eh_ofs = NULL_RTX;
+
if (sa_size)
{
/* If we have a frame pointer, restore SP from it. */
@@ -5141,12 +5205,11 @@ alpha_expand_epilogue ()
/* Restore registers in order, excepting a true frame pointer. */
+ mem = gen_rtx_MEM (DImode, plus_constant (sa_reg, reg_offset));
if (! eh_ofs)
- {
- mem = gen_rtx_MEM (DImode, plus_constant(sa_reg, reg_offset));
- MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
- FRP (emit_move_insn (gen_rtx_REG (DImode, REG_RA), mem));
- }
+ MEM_ALIAS_SET (mem) = alpha_sr_alias_set;
+ FRP (emit_move_insn (gen_rtx_REG (DImode, REG_RA), mem));
+
reg_offset += 8;
imask &= ~(1L << REG_RA);
diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h
index dc2a1ec4439..ce644f1747c 100644
--- a/gcc/config/alpha/alpha.h
+++ b/gcc/config/alpha/alpha.h
@@ -186,6 +186,9 @@ extern enum alpha_fp_trap_mode alpha_fptm;
#ifndef TARGET_PROFILING_NEEDS_GP
#define TARGET_PROFILING_NEEDS_GP 0
#endif
+#ifndef TARGET_LD_BUGGY_LDGP
+#define TARGET_LD_BUGGY_LDGP 0
+#endif
/* Macro to define tables used to set the flags.
This is a list in braces of pairs in braces,
@@ -494,7 +497,7 @@ extern const char *alpha_mlat_string; /* For -mmemory-latency= */
#define STACK_BOUNDARY 64
/* Allocation boundary (in *bits*) for the code of a function. */
-#define FUNCTION_BOUNDARY 128
+#define FUNCTION_BOUNDARY 32
/* Alignment of field after `int : 0' in a structure. */
#define EMPTY_FIELD_BOUNDARY 64
@@ -505,22 +508,6 @@ extern const char *alpha_mlat_string; /* For -mmemory-latency= */
/* A bitfield declared as `int' forces `int' alignment for the struct. */
#define PCC_BITFIELD_TYPE_MATTERS 1
-/* Align loop starts for optimal branching.
-
- ??? Kludge this and the next macro for the moment by not doing anything if
- we don't optimize and also if we are writing ECOFF symbols to work around
- a bug in DEC's assembler. */
-
-#define LOOP_ALIGN(LABEL) \
- (optimize > 0 && write_symbols != SDB_DEBUG ? 4 : 0)
-
-/* This is how to align an instruction for optimal branching. On
- Alpha we'll get better performance by aligning on an octaword
- boundary. */
-
-#define LABEL_ALIGN_AFTER_BARRIER(FILE) \
- (optimize > 0 && write_symbols != SDB_DEBUG ? 4 : 0)
-
/* No data type wants to be aligned rounder than this. */
#define BIGGEST_ALIGNMENT 128
@@ -1213,11 +1200,11 @@ extern struct alpha_compare alpha_compare;
struct machine_function
{
- /* An offset to apply to the stack pointer when unwinding from EH. */
- struct rtx_def *eh_epilogue_sp_ofs;
-
/* If non-null, this rtx holds the return address for the function. */
struct rtx_def *ra_rtx;
+
+ /* If non-null, this rtx holds a saved copy of the GP for the function. */
+ struct rtx_def *gp_save_rtx;
};
/* Make (or fake) .linkage entry for function call.
@@ -1342,6 +1329,13 @@ do { \
/* Before the prologue, RA lives in $26. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
+
+/* Describe how we implement __builtin_eh_return. */
+#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
+#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
+#define EH_RETURN_HANDLER_RTX \
+ gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
+ current_function_outgoing_args_size))
/* Addressing modes, and classification of registers for them. */
@@ -1926,15 +1920,6 @@ do { \
/* Control the assembler format that we output. */
-/* We don't emit these labels, so as to avoid getting linker errors about
- missing exception handling info. If we emit a gcc_compiled. label into
- text, and the file has no code, then the DEC assembler gives us a zero
- sized text section with no associated exception handling info. The
- DEC linker sees this text section, and gives a warning saying that
- the exception handling info is missing. */
-#define ASM_IDENTIFY_GCC(x)
-#define ASM_IDENTIFY_LANGUAGE(x)
-
/* Output to assembler file text saying following lines
may contain character constants, extra white space, comments, etc. */
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index 9961617a3dc..cafee4453e7 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -4276,6 +4276,20 @@
}
}")
+(define_insn "*call_osf_1_noreturn"
+ [(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,i"))
+ (match_operand 1 "" ""))
+ (clobber (reg:DI 27))
+ (clobber (reg:DI 26))]
+ "! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS
+ && find_reg_note (insn, REG_NORETURN, NULL_RTX)"
+ "@
+ jsr $26,($27),0
+ bsr $26,$%0..ng
+ jsr $26,%0"
+ [(set_attr "type" "jsr")
+ (set_attr "length" "*,*,8")])
+
(define_insn "*call_osf_1"
[(call (mem:DI (match_operand:DI 0 "call_operand" "c,R,i"))
(match_operand 1 "" ""))
@@ -4659,7 +4673,7 @@
"
{
alpha_split_tfmode_pair (operands);
- if (rtx_equal_p (operands[0], operands[3]))
+ if (reg_overlap_mentioned_p (operands[0], operands[3]))
{
rtx tmp;
tmp = operands[0], operands[0] = operands[1], operands[1] = tmp;
@@ -4717,7 +4731,7 @@
st%, %R1,%0"
[(set_attr "type" "ilog,iadd,iadd,ild,ist,fcpys,fld,fst")])
-(define_insn "*movsf_fix"
+(define_insn "*movsi_fix"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r,m,*f,*f,m,r,*f")
(match_operand:SI 1 "input_operand" "rJ,K,L,m,rJ,*fJ,m,*f,*f,r"))]
"! TARGET_WINDOWS_NT && ! TARGET_OPEN_VMS && TARGET_FIX
@@ -5886,22 +5900,6 @@
DONE;
}")
-(define_expand "eh_epilogue"
- [(use (match_operand:DI 0 "register_operand" "r"))
- (use (match_operand:DI 1 "register_operand" "r"))
- (use (match_operand:DI 2 "register_operand" "r"))]
- "! TARGET_OPEN_VMS"
- "
-{
- cfun->machine->eh_epilogue_sp_ofs = operands[1];
- if (GET_CODE (operands[2]) != REG || REGNO (operands[2]) != 26)
- {
- rtx ra = gen_rtx_REG (Pmode, 26);
- emit_move_insn (ra, operands[2]);
- operands[2] = ra;
- }
-}")
-
;; In creating a large stack frame, NT _must_ use ldah+lda to load
;; the frame size into a register. We use this pattern to ensure
;; we get lda instead of addq.
@@ -5961,13 +5959,36 @@
[(set_attr "length" "12")
(set_attr "type" "multi")])
-(define_insn "exception_receiver"
- [(unspec_volatile [(const_int 0)] 7)]
+(define_expand "exception_receiver"
+ [(unspec_volatile [(match_dup 0)] 7)]
"! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT"
- "br $29,$LSJ%=\\n$LSJ%=:\;ldgp $29,0($29)"
- [(set_attr "length" "12")
+ "
+{
+ if (TARGET_LD_BUGGY_LDGP)
+ operands[0] = alpha_gp_save_rtx ();
+ else
+ operands[0] = const0_rtx;
+}")
+
+(define_insn "*exception_receiver_1"
+ [(unspec_volatile [(const_int 0)] 7)]
+ "! TARGET_LD_BUGGY_LDGP"
+ "ldgp $29,0($26)"
+ [(set_attr "length" "8")
(set_attr "type" "multi")])
+;; ??? We don't represent the usage of $29 properly in address loads
+;; and function calls. This leads to the following move being deleted
+;; as dead code unless it is represented as a volatile unspec.
+
+(define_insn "*exception_receiver_2"
+ [(unspec_volatile [(match_operand:DI 0 "nonimmediate_operand" "r,m")] 7)]
+ "TARGET_LD_BUGGY_LDGP"
+ "@
+ mov %0,$29
+ ldq $29,%0"
+ [(set_attr "type" "ilog,ild")])
+
(define_expand "nonlocal_goto_receiver"
[(unspec_volatile [(const_int 0)] 1)
(set (reg:DI 27) (mem:DI (reg:DI 29)))
diff --git a/gcc/config/alpha/elf.h b/gcc/config/alpha/elf.h
index 9224a393d47..a77a64328d9 100644
--- a/gcc/config/alpha/elf.h
+++ b/gcc/config/alpha/elf.h
@@ -66,31 +66,9 @@ do { \
} \
} while (0)
-/* Attach a special .ident directive to the end of the file to identify
- the version of GCC which compiled this code. The format of the
- .ident string is patterned after the ones produced by native svr4
- C compilers. */
-
#undef IDENT_ASM_OP
#define IDENT_ASM_OP "\t.ident\t"
-#ifdef IDENTIFY_WITH_IDENT
-#undef ASM_IDENTIFY_GCC
-#define ASM_IDENTIFY_GCC(FILE) /* nothing */
-#undef ASM_IDENTIFY_LANGUAGE
-#define ASM_IDENTIFY_LANGUAGE(FILE) \
- fprintf(FILE, "%s\"GCC (%s) %s\"\n", IDENT_ASM_OP, \
- lang_identify(), version_string)
-#else
-#undef ASM_FILE_END
-#define ASM_FILE_END(FILE) \
-do { \
- if (!flag_no_ident) \
- fprintf ((FILE), "%s\"GCC: (GNU) %s\"\n", \
- IDENT_ASM_OP, version_string); \
- } while (0)
-#endif
-
/* Allow #sccs in preprocessor. */
#define SCCS_DIRECTIVE
@@ -480,6 +458,8 @@ void FN () \
} \
while (0)
+#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1)
+
#define UNIQUE_SECTION_P(DECL) (DECL_ONE_ONLY (DECL))
#undef UNIQUE_SECTION
@@ -707,3 +687,14 @@ void FN () \
#undef UNALIGNED_SHORT_ASM_OP
#undef UNALIGNED_INT_ASM_OP
#undef UNALIGNED_DOUBLE_INT_ASM_OP
+
+/* Select a format to encode pointers in exception handling data. CODE
+ is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
+ true if the symbol may be affected by dynamic relocations.
+
+ Since application size is already constrained to <2GB by the form of
+ the ldgp relocation, we can use a 32-bit pc-relative relocation to
+ static data. Dynamic data is accessed indirectly to allow for read
+ only EH sections. */
+#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
+ (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4)
diff --git a/gcc/config/alpha/freebsd.h b/gcc/config/alpha/freebsd.h
index f7c76b2a876..494fdab7a98 100644
--- a/gcc/config/alpha/freebsd.h
+++ b/gcc/config/alpha/freebsd.h
@@ -19,10 +19,6 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
-#undef CPP_PREDEFINES
-#define CPP_PREDEFINES \
- "-D__ELF__ -Dunix -D__FreeBSD__ -Asystem(unix) -Asystem(bsd) -Asystem(FreeBSD)"
-
/* Provide a CPP_SPEC appropriate for FreeBSD/alpha. Besides the dealing with
the GCC option `-posix', and PIC issues as on all FreeBSD platforms, we must
deal with the Alpha's FP issues. */
diff --git a/gcc/config/alpha/linux.h b/gcc/config/alpha/linux.h
index c8f649a7582..e2a6e6004d7 100644
--- a/gcc/config/alpha/linux.h
+++ b/gcc/config/alpha/linux.h
@@ -28,8 +28,15 @@ Boston, MA 02111-1307, USA. */
"-Dlinux -Dunix -Asystem=linux -D_LONGLONG -D__alpha__ " \
SUB_CPP_PREDEFINES
+/* The GNU C++ standard library requires that these macros be defined. */
+#undef CPLUSPLUS_CPP_SPEC
+#define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)"
+
#undef LIB_SPEC
-#define LIB_SPEC "%{pg:-lgmon} %{pg:-lc_p} %{!pg:-lc}"
+#define LIB_SPEC \
+ "%{shared: -lc} \
+ %{!shared: %{pthread:-lpthread} \
+ %{profile:-lc_p} %{!profile: -lc}}"
/* Show that we need a GP when profiling. */
#undef TARGET_PROFILING_NEEDS_GP
@@ -44,3 +51,54 @@ SUB_CPP_PREDEFINES
/* Define this so that all GNU/Linux targets handle the same pragmas. */
#define HANDLE_PRAGMA_PACK_PUSH_POP
+
+/* Do code reading to identify a signal frame, and set the frame
+ state data appropriately. See unwind-dw2.c for the structs. */
+
+#ifdef IN_LIBGCC2
+#include <signal.h>
+#include <sys/ucontext.h>
+#endif
+
+#define MD_FALLBACK_FRAME_STATE_FOR(CONTEXT, FS, SUCCESS) \
+ do { \
+ unsigned int *pc_ = (CONTEXT)->ra; \
+ struct sigcontext *sc_; \
+ long new_cfa_, i_; \
+ \
+ if (pc_[0] != 0x47fe0410 /* mov $30,$16 */ \
+ || pc_[2] != 0x00000083 /* callsys */) \
+ break; \
+ if (pc_[1] == 0x201f0067) /* lda $0,NR_sigreturn */ \
+ sc_ = (CONTEXT)->cfa; \
+ else if (pc_[1] == 0x201f015f) /* lda $0,NR_rt_sigreturn */ \
+ { \
+ struct rt_sigframe { \
+ struct siginfo info; \
+ struct ucontext uc; \
+ } *rt_ = (CONTEXT)->cfa; \
+ sc_ = &rt_->uc.uc_mcontext; \
+ } \
+ else \
+ break; \
+ new_cfa_ = sc_->sc_regs[30]; \
+ (FS)->cfa_how = CFA_REG_OFFSET; \
+ (FS)->cfa_reg = 30; \
+ (FS)->cfa_offset = new_cfa_ - (long) (CONTEXT)->cfa; \
+ for (i_ = 0; i_ < 30; ++i_) \
+ { \
+ (FS)->regs.reg[i_].how = REG_SAVED_OFFSET; \
+ (FS)->regs.reg[i_].loc.offset \
+ = (long)&sc_->sc_regs[i_] - new_cfa_; \
+ } \
+ for (i_ = 0; i_ < 31; ++i_) \
+ { \
+ (FS)->regs.reg[i_+32].how = REG_SAVED_OFFSET; \
+ (FS)->regs.reg[i_+32].loc.offset \
+ = (long)&sc_->sc_fpregs[i_] - new_cfa_; \
+ } \
+ (FS)->regs.reg[31].how = REG_SAVED_OFFSET; \
+ (FS)->regs.reg[31].loc.offset = (long)&sc_->sc_pc - new_cfa_; \
+ (FS)->retaddr_column = 31; \
+ goto SUCCESS; \
+ } while (0)
diff --git a/gcc/config/alpha/osf.h b/gcc/config/alpha/osf.h
index 1d1109b3c2f..1aecf33ad39 100644
--- a/gcc/config/alpha/osf.h
+++ b/gcc/config/alpha/osf.h
@@ -36,13 +36,18 @@ Boston, MA 02111-1307, USA. */
-Dunix -D__osf__ -D_LONGLONG -DSYSTYPE_BSD \
-D_SYSTYPE_BSD -Asystem=unix -Asystem=xpg4"
+/* Tru64 UNIX V5 requires additional definitions for 16 byte long double
+ support. Empty by default. */
+
+#define CPP_XFLOAT_SPEC ""
+
/* Accept DEC C flags for multithreaded programs. We use _PTHREAD_USE_D4
instead of PTHREAD_USE_D4 since both have the same effect and the former
doesn't invade the users' namespace. */
#undef CPP_SUBTARGET_SPEC
#define CPP_SUBTARGET_SPEC \
-"%{pthread|threads:-D_REENTRANT} %{threads:-D_PTHREAD_USE_D4}"
+"%{pthread|threads:-D_REENTRANT} %{threads:-D_PTHREAD_USE_D4} %(cpp_xfloat)"
/* Under OSF4, -p and -pg require -lprof1, and -lprof1 requires -lpdf. */
@@ -52,11 +57,13 @@ Boston, MA 02111-1307, USA. */
/* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are
optimizing, -O1 if we are not. Pass -shared, -non_shared or
- -call_shared as appropriate. Also pass -pg. */
+ -call_shared as appropriate. Pass -hidden_symbol so that our
+ constructor and call-frame data structures are not accidentally
+ overridden. */
#define LINK_SPEC \
"-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} \
- %{!static:%{shared:-shared} %{!shared:-call_shared}} %{pg} %{taso} \
- %{rpath*}"
+ %{!static:%{shared:-shared -hidden_symbol _GLOBAL_*} \
+ %{!shared:-call_shared}} %{pg} %{taso} %{rpath*}"
#define STARTFILE_SPEC \
"%{!shared:%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}"
@@ -79,10 +86,14 @@ Boston, MA 02111-1307, USA. */
ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
}
+/* Tru64 UNIX V5.1 requires a special as flag. Empty by default. */
+
+#define ASM_OLDAS_SPEC ""
+
/* No point in running CPP on our assembler output. */
#if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
/* Don't pass -g to GNU as, because some versions don't accept this option. */
-#define ASM_SPEC "%{malpha-as:-g} -nocpp %{pg}"
+#define ASM_SPEC "%{malpha-as:-g %(asm_oldas)} -nocpp %{pg}"
#else
/* In OSF/1 v3.2c, the assembler by default does not output file names which
causes mips-tfile to fail. Passing -g to the assembler fixes this problem.
@@ -91,7 +102,7 @@ Boston, MA 02111-1307, USA. */
if the user does not specify -g. If we don't pass -g, then mips-tfile
will need to be fixed to work in this case. Pass -O0 since some
optimization are broken and don't help us anyway. */
-#define ASM_SPEC "%{!mgas:-g} -nocpp %{pg} -O0"
+#define ASM_SPEC "%{!mgas:-g %(asm_oldas)} -nocpp %{pg} -O0"
#endif
/* Specify to run a post-processor, mips-tfile after the assembler
@@ -120,6 +131,11 @@ Boston, MA 02111-1307, USA. */
#endif
+#undef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS \
+ { "cpp_xfloat", CPP_XFLOAT_SPEC }, \
+ { "asm_oldas", ASM_OLDAS_SPEC }
+
/* Indicate that we have a stamp.h to use. */
#ifndef CROSS_COMPILE
#define HAVE_STAMP_H 1
@@ -153,3 +169,17 @@ __enable_execute_stack (addr) \
#define HAS_INIT_SECTION
#define LD_INIT_SWITCH "-init"
#define LD_FINI_SWITCH "-fini"
+
+/* Select a format to encode pointers in exception handling data. CODE
+ is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
+ true if the symbol may be affected by dynamic relocations.
+
+ We really ought to be using the SREL32 relocations that ECOFF has,
+ but no version of the native assembler supports creating such things,
+ and Compaq has no plans to rectify this. Worse, the dynamic loader
+ cannot handle unaligned relocations, so we have to make sure that
+ things get padded appropriately. */
+#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
+ (TARGET_GAS \
+ ? (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4) \
+ : DW_EH_PE_aligned)
diff --git a/gcc/config/alpha/osf5.h b/gcc/config/alpha/osf5.h
index 1c336bd0670..c832c574188 100644
--- a/gcc/config/alpha/osf5.h
+++ b/gcc/config/alpha/osf5.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for DEC Alpha on Tru64 5.
- Copyright (C) 2000 Free Software Foundation, Inc.
+ Copyright (C) 2000, 2001 Free Software Foundation, Inc.
This file is part of GNU CC.
@@ -20,3 +20,35 @@
#undef LONG_DOUBLE_TYPE_SIZE
#define LONG_DOUBLE_TYPE_SIZE 128
+
+/* Tru64 UNIX V5 has a 16 byte long double type and requires __X_FLOAT to be
+ defined to get the appropriate prototypes for the long double functions
+ in <math.h>. */
+
+#undef CPP_XFLOAT_SPEC
+#define CPP_XFLOAT_SPEC "-D__X_FLOAT"
+
+/* In Tru64 UNIX V5.1, Compaq introduced a new assembler
+ (/usr/lib/cmplrs/cc/adu) which currently (versions between 3.04.29 and
+ 3.04.32) breaks mips-tfile. Passing the undocumented -oldas flag reverts
+ to using the old assembler (/usr/lib/cmplrs/cc/as[01]).
+
+ The V5.0 and V5.0A assemblers silently ignore -oldas, so it can be
+ specified here.
+
+ It is clearly not desirable to depend on this undocumented flag, and
+ Compaq wants -oldas to go away soon, but until they have released a
+ new adu that works with mips-tfile, this is the only option.
+
+ In some versions of the DTK, the assembler driver invokes ld after
+ assembly. This has been fixed in current versions, but adding -c
+ works as expected for all versions. */
+
+#undef ASM_OLDAS_SPEC
+#define ASM_OLDAS_SPEC "-oldas -c"
+
+/* The linker appears to perform invalid code optimizations that result
+ in the ldgp emitted for the exception_receiver pattern being incorrectly
+ linked. */
+#undef TARGET_LD_BUGGY_LDGP
+#define TARGET_LD_BUGGY_LDGP 1
diff --git a/gcc/config/alpha/t-interix b/gcc/config/alpha/t-interix
index d6d80e9c085..85474359320 100644
--- a/gcc/config/alpha/t-interix
+++ b/gcc/config/alpha/t-interix
@@ -4,11 +4,6 @@
# Even LANG_EXTRA_HEADERS may be temporary.
USER_H=$(LANG_EXTRA_HEADERS)
-# We don't want this one either.
-INSTALL_ASSERT_H=
-
-
-
CROSS_LIBGCC1 = libgcc1-asm.a
LIBGCC1 = libgcc1-asm.a
diff --git a/gcc/config/alpha/t-osf4 b/gcc/config/alpha/t-osf4
index 5c7bd8afe65..af1a67dfcbb 100644
--- a/gcc/config/alpha/t-osf4
+++ b/gcc/config/alpha/t-osf4
@@ -7,12 +7,12 @@ TARGET_LIBGCC2_CFLAGS = -fPIC
# Build a shared libgcc library.
SHLIB_EXT = .so
SHLIB_LINK = $(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \
- -Wl,-msym -Wl,-set_version,gcc.0 -Wl,-soname,@shlib_base_name@.so.0 \
+ -Wl,-msym -Wl,-set_version,gcc.1 -Wl,-soname,@shlib_base_name@.so.1 \
-o @shlib_base_name@.so @multilib_flags@ @shlib_objs@ -lc && \
- rm -f @shlib_base_name@.so.0 && \
- $(LN_S) @shlib_base_name@.so @shlib_base_name@.so.0
+ rm -f @shlib_base_name@.so.1 && \
+ $(LN_S) @shlib_base_name@.so @shlib_base_name@.so.1
# $(slibdir) double quoted to protect it from expansion while building
# libgcc.mk. We want this delayed until actual install time.
-SHLIB_INSTALL = $(INSTALL_DATA) @shlib_base_name@.so $$(slibdir)/@shlib_base_name@.so.0; \
+SHLIB_INSTALL = $(INSTALL_DATA) @shlib_base_name@.so $$(slibdir)/@shlib_base_name@.so.1; \
rm -f $$(slibdir)/@shlib_base_name@.so; \
- $(LN_S) @shlib_base_name@.so.0 $$(slibdir)/@shlib_base_name@.so
+ $(LN_S) @shlib_base_name@.so.1 $$(slibdir)/@shlib_base_name@.so
diff --git a/gcc/config/alpha/xm-alpha.h b/gcc/config/alpha/xm-alpha.h
index 57ebeb11469..036975c98ef 100644
--- a/gcc/config/alpha/xm-alpha.h
+++ b/gcc/config/alpha/xm-alpha.h
@@ -20,11 +20,6 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-
-/* #defines that need visibility everywhere. */
-#define FALSE 0
-#define TRUE 1
-
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16