aboutsummaryrefslogtreecommitdiff
path: root/gcc/config/arm/arm.md
diff options
context:
space:
mode:
Diffstat (limited to 'gcc/config/arm/arm.md')
-rw-r--r--gcc/config/arm/arm.md64
1 files changed, 34 insertions, 30 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index ee4a9086ed7..3ec838b30ca 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1251,8 +1251,8 @@
emit_insn (gen_ashlsi3 (op0, operands[3],
GEN_INT (32 - INTVAL (operands[1]))));
- emit_insn (gen_iorsi3 (op1, gen_rtx (LSHIFTRT, SImode, operands[0],
- operands[1]),
+ emit_insn (gen_iorsi3 (op1, gen_rtx_LSHIFTRT (SImode, operands[0],
+ operands[1]),
op0));
emit_insn (gen_rotlsi3 (subtarget, op1, operands[1]));
}
@@ -1269,8 +1269,8 @@
GEN_INT (32 - INTVAL (operands[1]))));
emit_insn (gen_ashlsi3 (op1, operands[0], operands[1]));
emit_insn (gen_iorsi3 (subtarget,
- gen_rtx (LSHIFTRT, SImode, op1,
- operands[1]), op0));
+ gen_rtx_LSHIFTRT (SImode, op1, operands[1]),
+ op0));
}
else
{
@@ -1306,12 +1306,12 @@
}
if (INTVAL (operands[2]) != 0)
- op0 = gen_rtx (ASHIFT, SImode, op0, operands[2]);
+ op0 = gen_rtx_ASHIFT (SImode, op0, operands[2]);
emit_insn (gen_andsi_notsi_si (op2, operands[0], op0));
}
if (INTVAL (operands[2]) != 0)
- op1 = gen_rtx (ASHIFT, SImode, op1, operands[2]);
+ op1 = gen_rtx_ASHIFT (SImode, op1, operands[2]);
emit_insn (gen_iorsi3 (subtarget, op1, op2));
}
@@ -2139,8 +2139,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
- emit_insn (gen_rtx (SET, VOIDmode, operands[0],
- gen_rtx (ZERO_EXTEND, SImode, operands[1])));
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+ gen_rtx_ZERO_EXTEND (SImode, operands[1])));
DONE;
}
if (TARGET_SHORT_BY_BYTES && GET_CODE (operands[1]) == MEM)
@@ -2241,8 +2241,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
- emit_insn (gen_rtx (SET, VOIDmode, operands[0],
- gen_rtx (SIGN_EXTEND, SImode, operands[1])));
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+ gen_rtx_SIGN_EXTEND (SImode, operands[1])));
DONE;
}
@@ -2333,8 +2333,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
- emit_insn (gen_rtx (SET, VOIDmode, operands[0],
- gen_rtx (SIGN_EXTEND, HImode, operands[1])));
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+ gen_rtx_SIGN_EXTEND (HImode, operands[1])));
DONE;
}
if (! s_register_operand (operands[1], QImode))
@@ -2363,8 +2363,8 @@
{
if (arm_arch4 && GET_CODE (operands[1]) == MEM)
{
- emit_insn (gen_rtx (SET, VOIDmode, operands[0],
- gen_rtx (SIGN_EXTEND, SImode, operands[1])));
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+ gen_rtx_SIGN_EXTEND (SImode, operands[1])));
DONE;
}
if (! s_register_operand (operands[1], QImode))
@@ -2755,7 +2755,7 @@
}
emit_insn (gen_movsi (reg, GEN_INT (val)));
- operands[1] = gen_rtx (SUBREG, HImode, reg, 0);
+ operands[1] = gen_rtx_SUBREG (HImode, reg, 0);
}
else if (! arm_arch4)
{
@@ -2775,8 +2775,11 @@
{
HOST_WIDE_INT new_offset = INTVAL (offset) & ~2;
- emit_insn (gen_movsi (reg, gen_rtx (MEM, SImode,
- plus_constant (base, new_offset))));
+ emit_insn (gen_movsi (reg,
+ gen_rtx_MEM
+ (SImode,
+ plus_constant (base,
+ new_offset))));
if (((INTVAL (offset) & 2) != 0)
^ (BYTES_BIG_ENDIAN ? 1 : 0))
{
@@ -2808,15 +2811,16 @@
if ((INTVAL (offset) & 2) == 2)
{
HOST_WIDE_INT new_offset = INTVAL (offset) ^ 2;
- new_mem = gen_rtx (MEM, SImode,
- plus_constant (base, new_offset));
+ new_mem = gen_rtx_MEM (SImode,
+ plus_constant (base,
+ new_offset));
emit_insn (gen_movsi (reg, new_mem));
}
else
{
- new_mem = gen_rtx (MEM, SImode,
- XEXP (operands[1], 0));
+ new_mem = gen_rtx_MEM (SImode,
+ XEXP (operands[1], 0));
emit_insn (gen_rotated_loadsi (reg, new_mem));
}
@@ -2841,7 +2845,7 @@
if (GET_CODE (operands[0]) != REG)
abort ();
- operands[0] = gen_rtx (SUBREG, SImode, operands[0], 0);
+ operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0);
emit_insn (gen_movsi (operands[0], operands[1]));
DONE;
}
@@ -2858,7 +2862,7 @@
rtx ops[2];
ops[0] = operands[0];
- ops[1] = gen_rtx (MEM, SImode, plus_constant (XEXP (operands[1], 0), 2));
+ ops[1] = gen_rtx_MEM (SImode, plus_constant (XEXP (operands[1], 0), 2));
output_asm_insn (\"ldr%?\\t%0, %1\\t%@ load-rotate\", ops);
return \"\";
}"
@@ -3002,7 +3006,7 @@
rtx reg = gen_reg_rtx (SImode);
emit_insn (gen_movsi (reg, operands[1]));
- operands[1] = gen_rtx (SUBREG, QImode, reg, 0);
+ operands[1] = gen_rtx_SUBREG (QImode, reg, 0);
}
if (GET_CODE (operands[0]) == MEM)
operands[1] = force_reg (QImode, operands[1]);
@@ -3090,8 +3094,8 @@
operands[2] = XEXP (operands[0], 0);
else if (code == POST_INC || code == PRE_DEC)
{
- operands[0] = gen_rtx (SUBREG, DImode, operands[0], 0);
- operands[1] = gen_rtx (SUBREG, DImode, operands[1], 0);
+ operands[0] = gen_rtx_SUBREG (DImode, operands[0], 0);
+ operands[1] = gen_rtx_SUBREG (DImode, operands[1], 0);
emit_insn (gen_movdi (operands[0], operands[1]));
DONE;
}
@@ -3107,8 +3111,8 @@
emit_insn (gen_addsi3 (operands[2], XEXP (XEXP (operands[0], 0), 0),
XEXP (XEXP (operands[0], 0), 1)));
- emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (MEM, DFmode, operands[2]),
- operands[1]));
+ emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_MEM (DFmode, operands[2]),
+ operands[1]));
if (code == POST_DEC)
emit_insn (gen_addsi3 (operands[2], operands[2], GEN_INT (-8)));
@@ -5992,8 +5996,8 @@
enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2],
operands[3]);
- operands[6] = gen_rtx (REG, mode, 24);
- operands[7] = gen_rtx (COMPARE, mode, operands[2], operands[3]);
+ operands[6] = gen_rtx_REG (mode, 24);
+ operands[7] = gen_rtx_COMPARE (mode, operands[2], operands[3]);
}
")
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-18 04:50:12 +0000