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-rw-r--r--gcc/config/h8300/h8300.md67
1 files changed, 31 insertions, 36 deletions
diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 7e49af5ef75..b0132f924b2 100644
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -1,5 +1,6 @@
;; GCC machine description for Hitachi H8/300
-;; Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
+;; Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 2000 Free Software
+;; Foundation, Inc.
;; Contributed by Steve Chamberlain (sac@cygnus.com),
;; Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
@@ -400,8 +401,8 @@
(set_attr "cc" "clobber")])
(define_insn "movsi_h8300hs"
- [(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,m,<,r,*a,*a,r")
- (match_operand:SI 1 "general_operand_src" "I,r,im,r,r,>,I,r,*a"))]
+ [(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,r,m,<,r,*a,*a,r")
+ (match_operand:SI 1 "general_operand_src" "I,r,i,m,r,r,>,I,r,*a"))]
"(TARGET_H8300S || TARGET_H8300H)
&& (register_operand (operands[0], SImode)
|| register_operand (operands[1], SImode))"
@@ -409,12 +410,12 @@
{
if (which_alternative == 0)
return \"sub.l %S0,%S0\";
- if (which_alternative == 6)
- return \"clrmac\";
if (which_alternative == 7)
- return \"clrmac\;ldmac %1,macl\";
+ return \"clrmac\";
if (which_alternative == 8)
- return \"stmac macl,%0\";
+ return \"clrmac\;ldmac %1,macl\";
+ if (which_alternative == 9)
+ return \"stmac macl,%0\";
if (GET_CODE (operands[1]) == CONST_INT)
{
int val = INTVAL (operands[1]);
@@ -443,8 +444,8 @@
}
return \"mov.l %S1,%S0\";
}"
- [(set_attr "length" "2,2,10,10,4,4,2,6,4")
- (set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv,none_0hit,none_0hit,set_znv")])
+ [(set_attr "length" "2,2,10,10,10,4,4,2,6,4")
+ (set_attr "cc" "set_zn,set_znv,clobber,set_znv,set_znv,set_znv,set_znv,none_0hit,none_0hit,set_znv")])
(define_insn "movsf_h8300h"
[(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,m,<,r")
@@ -861,7 +862,7 @@
(sign_extend:SI
(mem:HI (post_inc:SI (match_operand:SI 2 "register_operand" "r"))))))]
"TARGET_H8300S"
- "clrmac\;mac %2,%1"
+ "clrmac\;mac @%2+,@%1+"
[(set_attr "length" "6")
(set_attr "cc" "none_0hit")])
@@ -874,7 +875,7 @@
(post_inc:SI (match_operand:SI 2 "register_operand" "r")))))
(match_operand:SI 3 "register_operand" "0")))]
"TARGET_H8300S"
- "mac %2,%1"
+ "mac @%2+,@%1+"
[(set_attr "length" "4")
(set_attr "cc" "none_0hit")])
@@ -1674,7 +1675,7 @@
(define_expand "zero_extendhisi2"
[(set (match_operand:SI 0 "register_operand" "")
- (zero_extend:SI (match_operand:HI 1 "general_operand" "")))]
+ (zero_extend:SI (match_operand:HI 1 "register_operand" "")))]
""
"
{
@@ -1709,18 +1710,16 @@
(set_attr "cc" "clobber,clobber,clobber")])
(define_insn ""
- [(set (match_operand:SI 0 "register_operand" "=r,r")
- (zero_extend:SI (match_operand:HI 1 "general_operand_src" "0,g>")))]
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (zero_extend:SI (match_operand:HI 1 "register_operand" "0")))]
"TARGET_H8300H || TARGET_H8300S"
- "@
- extu.l %S0
- mov.w %T1,%T0\;extu.l %S0"
- [(set_attr "length" "2,4")
- (set_attr "cc" "set_znv,set_znv")])
+ "extu.l %S0"
+ [(set_attr "length" "2")
+ (set_attr "cc" "set_znv")])
(define_expand "extendqihi2"
[(set (match_operand:HI 0 "register_operand" "")
- (sign_extend:HI (match_operand:QI 1 "general_operand" "")))]
+ (sign_extend:HI (match_operand:QI 1 "register_operand" "")))]
""
"")
@@ -1735,14 +1734,12 @@
(set_attr "cc" "clobber,clobber")])
(define_insn ""
- [(set (match_operand:HI 0 "register_operand" "=r,r")
- (sign_extend:HI (match_operand:QI 1 "general_operand_src" "0,g>")))]
+ [(set (match_operand:HI 0 "register_operand" "=r")
+ (sign_extend:HI (match_operand:QI 1 "register_operand" "0")))]
"TARGET_H8300H || TARGET_H8300S"
- "@
- exts.w %T0
- mov.b %R1,%s0\;exts.w %T0"
- [(set_attr "length" "2,4")
- (set_attr "cc" "set_znv,set_znv")])
+ "exts.w %T0"
+ [(set_attr "length" "2")
+ (set_attr "cc" "set_znv")])
;; The compiler can synthesize a 300H variant of this which is
;; just as efficient as one that we'd create
@@ -1758,7 +1755,7 @@
(define_expand "extendhisi2"
[(set (match_operand:SI 0 "register_operand" "")
- (sign_extend:SI (match_operand:HI 1 "general_operand" "")))]
+ (sign_extend:SI (match_operand:HI 1 "register_operand" "")))]
""
"
{
@@ -1791,14 +1788,12 @@
(set_attr "cc" "clobber,clobber")])
(define_insn ""
- [(set (match_operand:SI 0 "register_operand" "=r,r")
- (sign_extend:SI (match_operand:HI 1 "general_operand_src" "0,g>")))]
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (sign_extend:SI (match_operand:HI 1 "register_operand" "0")))]
"TARGET_H8300H || TARGET_H8300S"
- "@
- exts.l %S0
- mov.w %T1,%T0\;exts.l %S0"
- [(set_attr "length" "2,4")
- (set_attr "cc" "set_znv,set_znv")])
+ "exts.l %S0"
+ [(set_attr "length" "2")
+ (set_attr "cc" "set_znv")])
;; ----------------------------------------------------------------------
;; SHIFTS
@@ -2292,7 +2287,7 @@
(define_peephole
[(set (match_operand:HI 1 "register_operand" "")
- (plus:HI (match_dup 1) (const_int -1)))
+ (plus:HI (match_dup 1) (const_int -2)))
(set (mem:HI (match_dup 1))
(match_operand:HI 0 "register_operand" ""))]
"REGNO(operands[1]) != REGNO(operands[0])"